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a40cbfa3 1/* tc-ip2k.c -- Assembler for the Scenix IP2xxx.
6f2750fe 2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
a40cbfa3
NC
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
4b4da160
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18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
a40cbfa3 20
a40cbfa3 21#include "as.h"
3739860c 22#include "subsegs.h"
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23#include "symcat.h"
24#include "opcodes/ip2k-desc.h"
25#include "opcodes/ip2k-opc.h"
26#include "cgen.h"
27#include "elf/common.h"
28#include "elf/ip2k.h"
29#include "libbfd.h"
30
31/* Structure to hold all of the different components describing
32 an individual instruction. */
33typedef struct
34{
35 const CGEN_INSN * insn;
36 const CGEN_INSN * orig_insn;
37 CGEN_FIELDS fields;
38#if CGEN_INT_INSN_P
39 CGEN_INSN_INT buffer [1];
40#define INSN_VALUE(buf) (*(buf))
41#else
42 unsigned char buffer [CGEN_MAX_INSN_SIZE];
43#define INSN_VALUE(buf) (buf)
44#endif
45 char * addr;
46 fragS * frag;
47 int num_fixups;
48 fixS * fixups [GAS_CGEN_MAX_FIXUPS];
49 int indices [MAX_OPERAND_INSTANCES];
50}
51ip2k_insn;
52
53const char comment_chars[] = ";";
54const char line_comment_chars[] = "#";
3739860c 55const char line_separator_chars[] = "";
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56const char EXP_CHARS[] = "eE";
57const char FLT_CHARS[] = "dD";
58
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59/* Flag to detect when switching to code section where insn alignment is
60 implied. */
61static int force_code_align = 0;
62
63/* Mach selected from command line. */
64static int ip2k_mach = 0;
65static unsigned ip2k_mach_bitmask = 0;
66
67
68static void
69ip2k_elf_section_rtn (int i)
70{
71 obj_elf_section(i);
72
73 if (force_code_align)
74 {
75 /* The s_align_ptwo function expects that we are just after a .align
76 directive and it will either try and read the align value or stop
77 if end of line so we must fake it out so it thinks we are at the
78 end of the line. */
79 char *old_input_line_pointer = input_line_pointer;
80 input_line_pointer = "\n";
81 s_align_ptwo (1);
82 force_code_align = 0;
83 /* Restore. */
84 input_line_pointer = old_input_line_pointer;
85 }
86}
87
88static void
89ip2k_elf_section_text (int i)
90{
91 char *old_input_line_pointer;
92 obj_elf_text(i);
93
94 /* the s_align_ptwo function expects that we are just after a .align
95 directive and it will either try and read the align value or stop if
96 end of line so we must fake it out so it thinks we are at the end of
97 the line. */
98 old_input_line_pointer = input_line_pointer;
99 input_line_pointer = "\n";
100 s_align_ptwo (1);
101 force_code_align = 0;
102 /* Restore. */
103 input_line_pointer = old_input_line_pointer;
104}
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105
106/* The target specific pseudo-ops which we support. */
107const pseudo_typeS md_pseudo_table[] =
108{
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109 { "text", ip2k_elf_section_text, 0 },
110 { "sect", ip2k_elf_section_rtn, 0 },
111 { NULL, NULL, 0 }
112};
113
114\f
115
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116enum options
117{
118 OPTION_CPU_IP2022 = OPTION_MD_BASE,
119 OPTION_CPU_IP2022EXT
120};
a40cbfa3 121
3739860c 122struct option md_longopts[] =
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123{
124 { "mip2022", no_argument, NULL, OPTION_CPU_IP2022 },
125 { "mip2022ext", no_argument, NULL, OPTION_CPU_IP2022EXT },
126 { NULL, no_argument, NULL, 0 },
127};
128size_t md_longopts_size = sizeof (md_longopts);
129
130const char * md_shortopts = "";
131
a40cbfa3 132int
ea1562b3 133md_parse_option (int c ATTRIBUTE_UNUSED, char * arg ATTRIBUTE_UNUSED)
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134{
135 switch (c)
136 {
137 case OPTION_CPU_IP2022:
138 ip2k_mach = bfd_mach_ip2022;
139 ip2k_mach_bitmask = 1 << MACH_IP2022;
140 break;
141
142 case OPTION_CPU_IP2022EXT:
143 ip2k_mach = bfd_mach_ip2022ext;
144 ip2k_mach_bitmask = 1 << MACH_IP2022EXT;
145 break;
146
147 default:
148 return 0;
149 }
150
151 return 1;
152}
153
a40cbfa3 154void
ea1562b3 155md_show_usage (FILE * stream)
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156{
157 fprintf (stream, _("IP2K specific command line options:\n"));
158 fprintf (stream, _(" -mip2022 restrict to IP2022 insns \n"));
159 fprintf (stream, _(" -mip2022ext permit extended IP2022 insn\n"));
160}
161
162\f
163void
ea1562b3 164md_begin (void)
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165{
166 /* Initialize the `cgen' interface. */
3739860c 167
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168 /* Set the machine number and endian. */
169 gas_cgen_cpu_desc = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS,
170 ip2k_mach_bitmask,
171 CGEN_CPU_OPEN_ENDIAN,
172 CGEN_ENDIAN_BIG,
173 CGEN_CPU_OPEN_END);
174 ip2k_cgen_init_asm (gas_cgen_cpu_desc);
175
176 /* This is a callback from cgen to gas to parse operands. */
177 cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
178
179 /* Set the machine type. */
180 bfd_default_set_arch_mach (stdoutput, bfd_arch_ip2k, ip2k_mach);
181}
182
183
184void
ea1562b3 185md_assemble (char * str)
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186{
187 ip2k_insn insn;
188 char * errmsg;
189
190 /* Initialize GAS's cgen interface for a new instruction. */
191 gas_cgen_init_parse ();
192
193 insn.insn = ip2k_cgen_assemble_insn
194 (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
195
196 if (!insn.insn)
197 {
198 as_bad ("%s", errmsg);
199 return;
200 }
201
202 /* Check for special relocation required by SKIP instructions. */
203 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_SKIPA))
204 /* Unconditional skip has a 1-bit relocation of the current pc, so
205 that we emit either sb pcl.0 or snb pcl.0 depending on whether
206 the PCL (pc + 2) >> 1 is odd or even. */
207 {
208 enum cgen_parse_operand_result result_type;
2132e3a3 209 bfd_vma value;
a40cbfa3 210 const char *curpc_plus_2 = ".+2";
64384dfd 211 const char *err;
a40cbfa3 212
64384dfd
AM
213 err = cgen_parse_address (gas_cgen_cpu_desc, & curpc_plus_2,
214 IP2K_OPERAND_ADDR16CJP,
215 BFD_RELOC_IP2K_PC_SKIP,
216 & result_type, & value);
217 if (err)
a40cbfa3 218 {
64384dfd 219 as_bad ("%s", err);
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220 return;
221 }
222 }
223
224 /* Doesn't really matter what we pass for RELAX_P here. */
225 gas_cgen_finish_insn (insn.insn, insn.buffer,
226 CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
227}
228
229valueT
ea1562b3 230md_section_align (segT segment, valueT size)
a40cbfa3
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231{
232 int align = bfd_get_section_alignment (stdoutput, segment);
233
8d3842cd 234 return ((size + (1 << align) - 1) & -(1 << align));
a40cbfa3
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235}
236
237
238symbolS *
ea1562b3 239md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
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240{
241 return 0;
242}
243\f
244int
ea1562b3
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245md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED,
246 segT segment ATTRIBUTE_UNUSED)
a40cbfa3 247{
b2f58c0c 248 as_fatal (_("relaxation not supported\n"));
a40cbfa3 249 return 1;
3739860c 250}
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251
252
253/* *fragP has been relaxed to its final size, and now needs to have
254 the bytes inside it modified to conform to the new size.
255
256 Called after relaxation is finished.
257 fragP->fr_type == rs_machine_dependent.
258 fragP->fr_subtype is the subtype of what the address relaxed to. */
259
260void
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261md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
262 segT sec ATTRIBUTE_UNUSED,
263 fragS * fragP ATTRIBUTE_UNUSED)
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264{
265}
266
267\f
268/* Functions concerning relocs. */
269
270long
b2f58c0c 271md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
a40cbfa3 272{
b2f58c0c 273 abort ();
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274}
275
276
277/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
278 Returns BFD_RELOC_NONE if no reloc type can be found.
279 *FIXP may be modified if desired. */
280
281bfd_reloc_code_real_type
ea1562b3
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282md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
283 const CGEN_OPERAND * operand,
284 fixS * fixP ATTRIBUTE_UNUSED)
a40cbfa3
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285{
286 bfd_reloc_code_real_type result;
287
288 result = BFD_RELOC_NONE;
289
290 switch (operand->type)
291 {
292 case IP2K_OPERAND_FR:
293 case IP2K_OPERAND_ADDR16L:
294 case IP2K_OPERAND_ADDR16H:
295 case IP2K_OPERAND_LIT8:
296 /* These may have been processed at parse time. */
297 if (fixP->fx_cgen.opinfo != 0)
298 result = fixP->fx_cgen.opinfo;
299 fixP->fx_no_overflow = 1;
300 break;
301
302 case IP2K_OPERAND_ADDR16CJP:
303 result = fixP->fx_cgen.opinfo;
304 if (result == 0 || result == BFD_RELOC_NONE)
305 result = BFD_RELOC_IP2K_ADDR16CJP;
306 fixP->fx_no_overflow = 1;
307 break;
308
309 case IP2K_OPERAND_ADDR16P:
310 result = BFD_RELOC_IP2K_PAGE3;
311 fixP->fx_no_overflow = 1;
312 break;
313
314 default:
315 result = BFD_RELOC_NONE;
316 break;
317 }
318
319 return result;
320}
321
322
323/* Write a value out to the object file, using the appropriate endianness. */
324
325void
ea1562b3 326md_number_to_chars (char * buf, valueT val, int n)
a40cbfa3
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327{
328 number_to_chars_bigendian (buf, val, n);
329}
330
a40cbfa3 331char *
ea1562b3 332md_atof (int type, char * litP, int * sizeP)
a40cbfa3 333{
499ac353 334 return ieee_md_atof (type, litP, sizeP, TRUE);
a40cbfa3
NC
335}
336
337
338/* See whether we need to force a relocation into the output file.
339 Force most of them, since the linker's bfd relocation engine
340 understands range limits better than gas' cgen fixup engine.
341 Consider the case of a fixup intermediate value being larger than
342 the instruction it will be eventually encoded within. */
343
344int
ea1562b3 345ip2k_force_relocation (fixS * fix)
a40cbfa3
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346{
347 switch (fix->fx_r_type)
348 {
a40cbfa3
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349 case BFD_RELOC_IP2K_FR9:
350 case BFD_RELOC_IP2K_FR_OFFSET:
351 case BFD_RELOC_IP2K_BANK:
352 case BFD_RELOC_IP2K_ADDR16CJP:
353 case BFD_RELOC_IP2K_PAGE3:
354 case BFD_RELOC_IP2K_LO8DATA:
355 case BFD_RELOC_IP2K_HI8DATA:
356 case BFD_RELOC_IP2K_EX8DATA:
357 case BFD_RELOC_IP2K_LO8INSN:
358 case BFD_RELOC_IP2K_HI8INSN:
359 case BFD_RELOC_IP2K_PC_SKIP:
360 case BFD_RELOC_IP2K_TEXT:
361 return 1;
362
363 case BFD_RELOC_16:
a161fe53 364 if (fix->fx_subsy && S_IS_DEFINED (fix->fx_subsy)
a40cbfa3
NC
365 && fix->fx_addsy && S_IS_DEFINED (fix->fx_addsy)
366 && (S_GET_SEGMENT (fix->fx_addsy)->flags & SEC_CODE))
367 {
368 fix->fx_r_type = BFD_RELOC_IP2K_TEXT;
369 return 0;
370 }
a161fe53 371 break;
a40cbfa3
NC
372
373 default:
a161fe53 374 break;
a40cbfa3 375 }
a161fe53 376
ae6063d4 377 return generic_force_reloc (fix);
a40cbfa3
NC
378}
379
380void
55cf6793 381ip2k_apply_fix (fixS *fixP, valueT *valueP, segT seg)
a40cbfa3
NC
382{
383 if (fixP->fx_r_type == BFD_RELOC_IP2K_TEXT
384 && ! fixP->fx_addsy
385 && ! fixP->fx_subsy)
386 {
ea1562b3 387 *valueP = ((int)(* valueP)) / 2;
a40cbfa3
NC
388 fixP->fx_r_type = BFD_RELOC_16;
389 }
390 else if (fixP->fx_r_type == BFD_RELOC_UNUSED + IP2K_OPERAND_FR)
391 {
392 /* Must be careful when we are fixing up an FR. We could be
393 fixing up an offset to (SP) or (DP) in which case we don't
394 want to step on the top 2 bits of the FR operand. The
55cf6793 395 gas_cgen_md_apply_fix doesn't know any better and overwrites
a40cbfa3
NC
396 the entire operand. We counter this by adding the bits
397 to the new value. */
398 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
399
400 /* Canonical name, since used a lot. */
401 CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
402 CGEN_INSN_INT insn_value
2132e3a3 403 = cgen_get_insn_value (cd, (unsigned char *) where,
a40cbfa3
NC
404 CGEN_INSN_BITSIZE (fixP->fx_cgen.insn));
405 /* Preserve (DP) or (SP) specification. */
406 *valueP += (insn_value & 0x180);
407 }
408
55cf6793 409 gas_cgen_md_apply_fix (fixP, valueP, seg);
a40cbfa3
NC
410}
411
412int
01e1a5bc
NC
413ip2k_elf_section_flags (flagword flags,
414 bfd_vma attr ATTRIBUTE_UNUSED,
ea1562b3 415 int type ATTRIBUTE_UNUSED)
a40cbfa3
NC
416{
417 /* This is used to detect when the section changes to an executable section.
418 This function is called by the elf section processing. When we note an
419 executable section specifier we set an internal flag to denote when
420 word alignment should be forced. */
421 if (flags & SEC_CODE)
422 force_code_align = 1;
3739860c 423
a40cbfa3
NC
424 return flags;
425}
426