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252b5132 1/* ns32k.c -- Assemble on the National Semiconductor 32k series
a2c58332 2 Copyright (C) 1987-2022 Free Software Foundation, Inc.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
252b5132 20
c6a7ab1f 21/*#define SHOW_NUM 1*//* Uncomment for debugging. */
252b5132 22
252b5132
RH
23#include "as.h"
24#include "opcode/ns32k.h"
25
26#include "obstack.h"
27
c6a7ab1f
NC
28/* Macros. */
29#define IIF_ENTRIES 13 /* Number of entries in iif. */
30#define PRIVATE_SIZE 256 /* Size of my garbage memory. */
252b5132
RH
31#define MAX_ARGS 4
32#define DEFAULT -1 /* addr_mode returns this value when
33 plain constant or label is
c6a7ab1f 34 encountered. */
252b5132
RH
35
36#define IIF(ptr,a1,c1,e1,g1,i1,k1,m1,o1,q1,s1,u1) \
ea1562b3
NC
37 iif.iifP[ptr].type = a1; \
38 iif.iifP[ptr].size = c1; \
39 iif.iifP[ptr].object = e1; \
40 iif.iifP[ptr].object_adjust = g1; \
41 iif.iifP[ptr].pcrel = i1; \
42 iif.iifP[ptr].pcrel_adjust = k1; \
43 iif.iifP[ptr].im_disp = m1; \
44 iif.iifP[ptr].relax_substate = o1; \
45 iif.iifP[ptr].bit_fixP = q1; \
46 iif.iifP[ptr].addr_mode = s1; \
47 iif.iifP[ptr].bsr = u1;
252b5132
RH
48
49#ifdef SEQUENT_COMPATABILITY
50#define LINE_COMMENT_CHARS "|"
51#define ABSOLUTE_PREFIX '@'
52#define IMMEDIATE_PREFIX '#'
53#endif
54
55#ifndef LINE_COMMENT_CHARS
56#define LINE_COMMENT_CHARS "#"
57#endif
58
59const char comment_chars[] = "#";
60const char line_comment_chars[] = LINE_COMMENT_CHARS;
63a0b638 61const char line_separator_chars[] = ";";
4eb6b71c 62static int default_disp_size = 4; /* Displacement size for external refs. */
c6a7ab1f 63
252b5132 64#if !defined(ABSOLUTE_PREFIX) && !defined(IMMEDIATE_PREFIX)
4eb6b71c 65#define ABSOLUTE_PREFIX '@' /* One or the other MUST be defined. */
252b5132
RH
66#endif
67
68struct addr_mode
ea1562b3
NC
69{
70 signed char mode; /* Addressing mode of operand (0-31). */
71 signed char scaled_mode; /* Mode combined with scaled mode. */
72 char scaled_reg; /* Register used in scaled+1 (1-8). */
73 char float_flag; /* Set if R0..R7 was F0..F7 ie a
4eb6b71c 74 floating-point-register. */
ea1562b3 75 char am_size; /* Estimated max size of general addr-mode
4eb6b71c 76 parts. */
ea1562b3
NC
77 char im_disp; /* If im_disp==1 we have a displacement. */
78 char pcrel; /* 1 if pcrel, this is really redundant info. */
79 char disp_suffix[2]; /* Length of displacement(s), 0=undefined. */
80 char *disp[2]; /* Pointer(s) at displacement(s)
4eb6b71c 81 or immediates(s) (ascii). */
ea1562b3
NC
82 char index_byte; /* Index byte. */
83};
252b5132
RH
84typedef struct addr_mode addr_modeS;
85
c6a7ab1f 86char *freeptr, *freeptr_static; /* Points at some number of free bytes. */
629310ab 87htab_t inst_hash_handle;
252b5132 88
c6a7ab1f 89struct ns32k_opcode *desc; /* Pointer at description of instruction. */
252b5132
RH
90addr_modeS addr_modeP;
91const char EXP_CHARS[] = "eE";
c6a7ab1f
NC
92const char FLT_CHARS[] = "fd"; /* We don't want to support lowercase,
93 do we? */
252b5132
RH
94
95/* UPPERCASE denotes live names when an instruction is built, IIF is
4eb6b71c
NC
96 used as an intermediate form to store the actual parts of the
97 instruction. A ns32k machine instruction can be divided into a
98 couple of sub PARTs. When an instruction is assembled the
99 appropriate PART get an assignment. When an IIF has been completed
100 it is converted to a FRAGment as specified in AS.H. */
252b5132 101
c6a7ab1f 102/* Internal structs. */
252b5132 103struct ns32k_option
c6a7ab1f 104{
e0471c16 105 const char *pattern;
c6a7ab1f
NC
106 unsigned long or;
107 unsigned long and;
108};
252b5132
RH
109
110typedef struct
ea1562b3
NC
111{
112 int type; /* How to interpret object. */
113 int size; /* Estimated max size of object. */
114 unsigned long object; /* Binary data. */
115 int object_adjust; /* Number added to object. */
116 int pcrel; /* True if object is pcrel. */
117 int pcrel_adjust; /* Length in bytes from the instruction
4eb6b71c 118 start to the displacement. */
ea1562b3
NC
119 int im_disp; /* True if the object is a displacement. */
120 relax_substateT relax_substate;/*Initial relaxsubstate. */
121 bit_fixS *bit_fixP; /* Pointer at bit_fix struct. */
122 int addr_mode; /* What addrmode do we associate with this
4eb6b71c 123 iif-entry. */
ea1562b3
NC
124 char bsr; /* Sequent hack. */
125} iif_entryT; /* Internal Instruction Format. */
252b5132
RH
126
127struct int_ins_form
ea1562b3
NC
128{
129 int instr_size; /* Max size of instruction in bytes. */
130 iif_entryT iifP[IIF_ENTRIES + 1];
131};
c6a7ab1f 132
252b5132
RH
133struct int_ins_form iif;
134expressionS exprP;
c6a7ab1f
NC
135
136/* Description of the PARTs in IIF
137 object[n]:
138 0 total length in bytes of entries in iif
139 1 opcode
140 2 index_byte_a
141 3 index_byte_b
142 4 disp_a_1
143 5 disp_a_2
144 6 disp_b_1
145 7 disp_b_2
146 8 imm_a
147 9 imm_b
148 10 implied1
149 11 implied2
0b7410c4 150
33eaf5de
NC
151 For every entry there is a data length in bytes. This is stored in size[n].
152 0, the object length is not explicitly given by the instruction
c6a7ab1f
NC
153 and the operand is undefined. This is a case for relaxation.
154 Reserve 4 bytes for the final object.
0b7410c4 155
c6a7ab1f
NC
156 1, the entry contains one byte
157 2, the entry contains two bytes
158 3, the entry contains three bytes
159 4, the entry contains four bytes
160 etc
0b7410c4 161
c6a7ab1f 162 Furthermore, every entry has a data type identifier in type[n].
0b7410c4 163
c6a7ab1f
NC
164 0, the entry is void, ignore it.
165 1, the entry is a binary number.
166 2, the entry is a pointer at an expression.
167 Where expression may be as simple as a single '1',
168 and as complicated as foo-bar+12,
169 foo and bar may be undefined but suffixed by :{b|w|d} to
170 control the length of the object.
0b7410c4 171
c6a7ab1f 172 3, the entry is a pointer at a bignum struct
0b7410c4 173
67c1ffbe 174 The low-order-byte corresponds to low physical memory.
c6a7ab1f 175 Obviously a FRAGment must be created for each valid disp in PART whose
33eaf5de 176 data length is undefined (to bad) .
c6a7ab1f 177 The case where just the expression is undefined is less severe and is
33eaf5de 178 handled by fix. Here the number of bytes in the object file is known.
c6a7ab1f
NC
179 With this representation we simplify the assembly and separates the
180 machine dependent/independent parts in a more clean way (said OE). */
252b5132 181\f
4eb6b71c 182struct ns32k_option opt1[] = /* restore, exit. */
252b5132
RH
183{
184 {"r0", 0x80, 0xff},
185 {"r1", 0x40, 0xff},
186 {"r2", 0x20, 0xff},
187 {"r3", 0x10, 0xff},
188 {"r4", 0x08, 0xff},
189 {"r5", 0x04, 0xff},
190 {"r6", 0x02, 0xff},
191 {"r7", 0x01, 0xff},
192 {0, 0x00, 0xff}
193};
4eb6b71c 194struct ns32k_option opt2[] = /* save, enter. */
252b5132
RH
195{
196 {"r0", 0x01, 0xff},
197 {"r1", 0x02, 0xff},
198 {"r2", 0x04, 0xff},
199 {"r3", 0x08, 0xff},
200 {"r4", 0x10, 0xff},
201 {"r5", 0x20, 0xff},
202 {"r6", 0x40, 0xff},
203 {"r7", 0x80, 0xff},
204 {0, 0x00, 0xff}
205};
4eb6b71c 206struct ns32k_option opt3[] = /* setcfg. */
252b5132
RH
207{
208 {"c", 0x8, 0xff},
209 {"m", 0x4, 0xff},
210 {"f", 0x2, 0xff},
211 {"i", 0x1, 0xff},
212 {0, 0x0, 0xff}
213};
4eb6b71c 214struct ns32k_option opt4[] = /* cinv. */
252b5132
RH
215{
216 {"a", 0x4, 0xff},
217 {"i", 0x2, 0xff},
218 {"d", 0x1, 0xff},
219 {0, 0x0, 0xff}
220};
4eb6b71c 221struct ns32k_option opt5[] = /* String inst. */
252b5132
RH
222{
223 {"b", 0x2, 0xff},
224 {"u", 0xc, 0xff},
225 {"w", 0x4, 0xff},
226 {0, 0x0, 0xff}
227};
4eb6b71c 228struct ns32k_option opt6[] = /* Plain reg ext,cvtp etc. */
252b5132
RH
229{
230 {"r0", 0x00, 0xff},
231 {"r1", 0x01, 0xff},
232 {"r2", 0x02, 0xff},
233 {"r3", 0x03, 0xff},
234 {"r4", 0x04, 0xff},
235 {"r5", 0x05, 0xff},
236 {"r6", 0x06, 0xff},
237 {"r7", 0x07, 0xff},
238 {0, 0x00, 0xff}
239};
240
241#if !defined(NS32032) && !defined(NS32532)
242#define NS32532
243#endif
244
4eb6b71c 245struct ns32k_option cpureg_532[] = /* lpr spr. */
252b5132
RH
246{
247 {"us", 0x0, 0xff},
248 {"dcr", 0x1, 0xff},
249 {"bpc", 0x2, 0xff},
250 {"dsr", 0x3, 0xff},
251 {"car", 0x4, 0xff},
252 {"fp", 0x8, 0xff},
253 {"sp", 0x9, 0xff},
254 {"sb", 0xa, 0xff},
255 {"usp", 0xb, 0xff},
256 {"cfg", 0xc, 0xff},
257 {"psr", 0xd, 0xff},
258 {"intbase", 0xe, 0xff},
259 {"mod", 0xf, 0xff},
260 {0, 0x00, 0xff}
261};
4eb6b71c 262struct ns32k_option mmureg_532[] = /* lmr smr. */
252b5132
RH
263{
264 {"mcr", 0x9, 0xff},
265 {"msr", 0xa, 0xff},
266 {"tear", 0xb, 0xff},
267 {"ptb0", 0xc, 0xff},
268 {"ptb1", 0xd, 0xff},
269 {"ivar0", 0xe, 0xff},
270 {"ivar1", 0xf, 0xff},
271 {0, 0x0, 0xff}
272};
273
4eb6b71c 274struct ns32k_option cpureg_032[] = /* lpr spr. */
252b5132
RH
275{
276 {"upsr", 0x0, 0xff},
277 {"fp", 0x8, 0xff},
278 {"sp", 0x9, 0xff},
279 {"sb", 0xa, 0xff},
280 {"psr", 0xd, 0xff},
281 {"intbase", 0xe, 0xff},
282 {"mod", 0xf, 0xff},
283 {0, 0x0, 0xff}
284};
4eb6b71c 285struct ns32k_option mmureg_032[] = /* lmr smr. */
252b5132
RH
286{
287 {"bpr0", 0x0, 0xff},
288 {"bpr1", 0x1, 0xff},
289 {"pf0", 0x4, 0xff},
290 {"pf1", 0x5, 0xff},
291 {"sc", 0x8, 0xff},
292 {"msr", 0xa, 0xff},
293 {"bcnt", 0xb, 0xff},
294 {"ptb0", 0xc, 0xff},
295 {"ptb1", 0xd, 0xff},
296 {"eia", 0xf, 0xff},
297 {0, 0x0, 0xff}
298};
299
300#if defined(NS32532)
301struct ns32k_option *cpureg = cpureg_532;
302struct ns32k_option *mmureg = mmureg_532;
303#else
304struct ns32k_option *cpureg = cpureg_032;
305struct ns32k_option *mmureg = mmureg_032;
306#endif
307\f
308
309const pseudo_typeS md_pseudo_table[] =
c6a7ab1f 310{ /* So far empty. */
252b5132
RH
311 {0, 0, 0}
312};
313
314#define IND(x,y) (((x)<<2)+(y))
315
c6a7ab1f 316/* Those are index's to relax groups in md_relax_table ie it must be
252b5132 317 multiplied by 4 to point at a group start. Viz IND(x,y) Se function
c6a7ab1f 318 relax_segment in write.c for more info. */
252b5132
RH
319
320#define BRANCH 1
321#define PCREL 2
322
c6a7ab1f 323/* Those are index's to entries in a relax group. */
252b5132
RH
324
325#define BYTE 0
326#define WORD 1
327#define DOUBLE 2
328#define UNDEF 3
329/* Those limits are calculated from the displacement start in memory.
67c1ffbe 330 The ns32k uses the beginning of the instruction as displacement
252b5132
RH
331 base. This type of displacements could be handled here by moving
332 the limit window up or down. I choose to use an internal
333 displacement base-adjust as there are other routines that must
334 consider this. Also, as we have two various offset-adjusts in the
335 ns32k (acb versus br/brs/jsr/bcond), two set of limits would have
2b0f3761 336 had to be used. Now we don't have to think about that. */
252b5132
RH
337
338const relax_typeS md_relax_table[] =
339{
340 {1, 1, 0, 0},
341 {1, 1, 0, 0},
342 {1, 1, 0, 0},
343 {1, 1, 0, 0},
344
345 {(63), (-64), 1, IND (BRANCH, WORD)},
346 {(8192), (-8192), 2, IND (BRANCH, DOUBLE)},
347 {0, 0, 4, 0},
348 {1, 1, 0, 0}
349};
350
351/* Array used to test if mode contains displacements.
c6a7ab1f 352 Value is true if mode contains displacement. */
252b5132
RH
353
354char disp_test[] =
355{0, 0, 0, 0, 0, 0, 0, 0,
356 1, 1, 1, 1, 1, 1, 1, 1,
357 1, 1, 1, 0, 0, 1, 1, 0,
358 1, 1, 1, 1, 1, 1, 1, 1};
359
c6a7ab1f 360/* Array used to calculate max size of displacements. */
252b5132
RH
361
362char disp_size[] =
363{4, 1, 2, 0, 4};
364\f
33eaf5de 365/* Parse a general operand into an addressing mode struct
c6a7ab1f
NC
366
367 In: pointer at operand in ascii form
368 pointer at addr_mode struct for result
369 the level of recursion. (always 0 or 1)
252b5132 370
c6a7ab1f 371 Out: data in addr_mode struct. */
252b5132 372
4eb6b71c 373static int
ea1562b3 374addr_mode (char *operand,
91d6fa6a 375 addr_modeS *addrmodeP,
ea1562b3 376 int recursive_level)
252b5132 377{
4eb6b71c
NC
378 char *str;
379 int i;
380 int strl;
381 int mode;
252b5132 382 int j;
0b7410c4 383
4eb6b71c 384 mode = DEFAULT; /* Default. */
91d6fa6a
NC
385 addrmodeP->scaled_mode = 0; /* Why not. */
386 addrmodeP->scaled_reg = 0; /* If 0, not scaled index. */
387 addrmodeP->float_flag = 0;
388 addrmodeP->am_size = 0;
389 addrmodeP->im_disp = 0;
390 addrmodeP->pcrel = 0; /* Not set in this function. */
391 addrmodeP->disp_suffix[0] = 0;
392 addrmodeP->disp_suffix[1] = 0;
393 addrmodeP->disp[0] = NULL;
394 addrmodeP->disp[1] = NULL;
252b5132 395 str = operand;
0b7410c4 396
252b5132 397 if (str[0] == 0)
c6a7ab1f
NC
398 return 0;
399
252b5132 400 strl = strlen (str);
0b7410c4 401
252b5132
RH
402 switch (str[0])
403 {
c6a7ab1f
NC
404 /* The following three case statements controls the mode-chars
405 this is the place to ed if you want to change them. */
252b5132
RH
406#ifdef ABSOLUTE_PREFIX
407 case ABSOLUTE_PREFIX:
408 if (str[strl - 1] == ']')
409 break;
91d6fa6a
NC
410 addrmodeP->mode = 21; /* absolute */
411 addrmodeP->disp[0] = str + 1;
c6a7ab1f 412 return -1;
252b5132
RH
413#endif
414#ifdef IMMEDIATE_PREFIX
415 case IMMEDIATE_PREFIX:
416 if (str[strl - 1] == ']')
417 break;
91d6fa6a
NC
418 addrmodeP->mode = 20; /* immediate */
419 addrmodeP->disp[0] = str + 1;
c6a7ab1f 420 return -1;
252b5132
RH
421#endif
422 case '.':
423 if (str[strl - 1] != ']')
424 {
425 switch (str[1])
426 {
427 case '-':
428 case '+':
429 if (str[2] != '\000')
430 {
91d6fa6a
NC
431 addrmodeP->mode = 27; /* pc-relative */
432 addrmodeP->disp[0] = str + 2;
c6a7ab1f 433 return -1;
252b5132 434 }
1a0670f3 435 /* Fall through. */
252b5132 436 default:
4eb6b71c 437 as_bad (_("Invalid syntax in PC-relative addressing mode"));
c6a7ab1f 438 return 0;
252b5132
RH
439 }
440 }
441 break;
442 case 'e':
443 if (str[strl - 1] != ']')
444 {
d34049e8 445 if ((startswith (str, "ext(")) && strl > 7)
252b5132 446 { /* external */
91d6fa6a 447 addrmodeP->disp[0] = str + 4;
252b5132
RH
448 i = 0;
449 j = 2;
450 do
4eb6b71c 451 { /* disp[0]'s termination point. */
252b5132
RH
452 j += 1;
453 if (str[j] == '(')
454 i++;
455 if (str[j] == ')')
456 i--;
457 }
458 while (j < strl && i != 0);
459 if (i != 0 || !(str[j + 1] == '-' || str[j + 1] == '+'))
460 {
4eb6b71c 461 as_bad (_("Invalid syntax in External addressing mode"));
252b5132
RH
462 return (0);
463 }
464 str[j] = '\000'; /* null terminate disp[0] */
91d6fa6a
NC
465 addrmodeP->disp[1] = str + j + 2;
466 addrmodeP->mode = 22;
c6a7ab1f 467 return -1;
252b5132
RH
468 }
469 }
470 break;
0b7410c4 471
c6a7ab1f
NC
472 default:
473 ;
252b5132 474 }
0b7410c4 475
252b5132 476 strl = strlen (str);
0b7410c4 477
252b5132
RH
478 switch (strl)
479 {
480 case 2:
481 switch (str[0])
482 {
483 case 'f':
91d6fa6a 484 addrmodeP->float_flag = 1;
1a0670f3 485 /* Fall through. */
252b5132
RH
486 case 'r':
487 if (str[1] >= '0' && str[1] < '8')
488 {
91d6fa6a 489 addrmodeP->mode = str[1] - '0';
c6a7ab1f 490 return -1;
252b5132 491 }
c6a7ab1f
NC
492 break;
493 default:
494 break;
252b5132 495 }
f03fb292 496 /* Fall through. */
0b7410c4 497
252b5132 498 case 3:
d34049e8 499 if (startswith (str, "tos"))
252b5132 500 {
91d6fa6a 501 addrmodeP->mode = 23; /* TopOfStack */
c6a7ab1f 502 return -1;
252b5132 503 }
c6a7ab1f 504 break;
0b7410c4 505
c6a7ab1f
NC
506 default:
507 break;
252b5132 508 }
0b7410c4 509
252b5132
RH
510 if (strl > 4)
511 {
512 if (str[strl - 1] == ')')
513 {
514 if (str[strl - 2] == ')')
515 {
d34049e8 516 if (startswith (&str[strl - 5], "(fp"))
c6a7ab1f 517 mode = 16; /* Memory Relative. */
d34049e8 518 else if (startswith (&str[strl - 5], "(sp"))
c6a7ab1f 519 mode = 17;
d34049e8 520 else if (startswith (&str[strl - 5], "(sb"))
c6a7ab1f
NC
521 mode = 18;
522
252b5132 523 if (mode != DEFAULT)
4eb6b71c
NC
524 {
525 /* Memory relative. */
91d6fa6a 526 addrmodeP->mode = mode;
c6a7ab1f 527 j = strl - 5; /* Temp for end of disp[0]. */
252b5132 528 i = 0;
0b7410c4 529
252b5132
RH
530 do
531 {
532 strl -= 1;
533 if (str[strl] == ')')
534 i++;
535 if (str[strl] == '(')
536 i--;
537 }
538 while (strl > -1 && i != 0);
0b7410c4 539
252b5132
RH
540 if (i != 0)
541 {
4eb6b71c 542 as_bad (_("Invalid syntax in Memory Relative addressing mode"));
252b5132
RH
543 return (0);
544 }
0b7410c4 545
91d6fa6a
NC
546 addrmodeP->disp[1] = str;
547 addrmodeP->disp[0] = str + strl + 1;
0b7410c4 548 str[j] = '\000'; /* Null terminate disp[0] . */
c6a7ab1f 549 str[strl] = '\000'; /* Null terminate disp[1]. */
0b7410c4 550
c6a7ab1f 551 return -1;
252b5132
RH
552 }
553 }
0b7410c4 554
252b5132
RH
555 switch (str[strl - 3])
556 {
557 case 'r':
558 case 'R':
559 if (str[strl - 2] >= '0'
560 && str[strl - 2] < '8'
561 && str[strl - 4] == '(')
562 {
91d6fa6a
NC
563 addrmodeP->mode = str[strl - 2] - '0' + 8;
564 addrmodeP->disp[0] = str;
252b5132 565 str[strl - 4] = 0;
c6a7ab1f 566 return -1; /* reg rel */
252b5132 567 }
1a0670f3 568 /* Fall through. */
0b7410c4 569
252b5132 570 default:
d34049e8 571 if (startswith (&str[strl - 4], "(fp"))
c6a7ab1f 572 mode = 24;
d34049e8 573 else if (startswith (&str[strl - 4], "(sp"))
c6a7ab1f 574 mode = 25;
d34049e8 575 else if (startswith (&str[strl - 4], "(sb"))
c6a7ab1f 576 mode = 26;
d34049e8 577 else if (startswith (&str[strl - 4], "(pc"))
c6a7ab1f 578 mode = 27;
0b7410c4 579
252b5132
RH
580 if (mode != DEFAULT)
581 {
91d6fa6a
NC
582 addrmodeP->mode = mode;
583 addrmodeP->disp[0] = str;
252b5132 584 str[strl - 4] = '\0';
0b7410c4 585
c6a7ab1f 586 return -1; /* Memory space. */
252b5132
RH
587 }
588 }
589 }
0b7410c4 590
c6a7ab1f 591 /* No trailing ')' do we have a ']' ? */
252b5132
RH
592 if (str[strl - 1] == ']')
593 {
594 switch (str[strl - 2])
595 {
596 case 'b':
597 mode = 28;
598 break;
599 case 'w':
600 mode = 29;
601 break;
602 case 'd':
603 mode = 30;
604 break;
605 case 'q':
606 mode = 31;
607 break;
c6a7ab1f 608 default:
4eb6b71c 609 as_bad (_("Invalid scaled-indexed mode, use (b,w,d,q)"));
0b7410c4 610
252b5132
RH
611 if (str[strl - 3] != ':' || str[strl - 6] != '['
612 || str[strl - 5] == 'r' || str[strl - 4] < '0'
613 || str[strl - 4] > '7')
4eb6b71c 614 as_bad (_("Syntax in scaled-indexed mode, use [Rn:m] where n=[0..7] m={b,w,d,q}"));
c6a7ab1f
NC
615 } /* Scaled index. */
616
617 if (recursive_level > 0)
618 {
4eb6b71c 619 as_bad (_("Scaled-indexed addressing mode combined with scaled-index"));
c6a7ab1f
NC
620 return 0;
621 }
0b7410c4 622
91d6fa6a 623 addrmodeP->am_size += 1; /* scaled index byte. */
4eb6b71c 624 j = str[strl - 4] - '0'; /* store temporary. */
33eaf5de 625 str[strl - 6] = '\000'; /* null terminate for recursive call. */
91d6fa6a 626 i = addr_mode (str, addrmodeP, 1);
0b7410c4 627
91d6fa6a 628 if (!i || addrmodeP->mode == 20)
c6a7ab1f 629 {
4eb6b71c 630 as_bad (_("Invalid or illegal addressing mode combined with scaled-index"));
c6a7ab1f
NC
631 return 0;
632 }
0b7410c4 633
91d6fa6a
NC
634 addrmodeP->scaled_mode = addrmodeP->mode; /* Store the inferior mode. */
635 addrmodeP->mode = mode;
636 addrmodeP->scaled_reg = j + 1;
0b7410c4 637
c6a7ab1f 638 return -1;
252b5132
RH
639 }
640 }
0b7410c4 641
91d6fa6a
NC
642 addrmodeP->mode = DEFAULT; /* Default to whatever. */
643 addrmodeP->disp[0] = str;
0b7410c4 644
c6a7ab1f 645 return -1;
252b5132
RH
646}
647\f
ea1562b3
NC
648static void
649evaluate_expr (expressionS *resultP, char *ptr)
650{
651 char *tmp_line;
652
653 tmp_line = input_line_pointer;
654 input_line_pointer = ptr;
655 expression (resultP);
656 input_line_pointer = tmp_line;
657}
658
252b5132
RH
659/* ptr points at string addr_modeP points at struct with result This
660 routine calls addr_mode to determine the general addr.mode of the
661 operand. When this is ready it parses the displacements for size
662 specifying suffixes and determines size of immediate mode via
663 ns32k-opcode. Also builds index bytes if needed. */
c6a7ab1f 664
4eb6b71c 665static int
91d6fa6a 666get_addr_mode (char *ptr, addr_modeS *addrmodeP)
252b5132
RH
667{
668 int tmp;
0b7410c4 669
91d6fa6a 670 addr_mode (ptr, addrmodeP, 0);
0b7410c4 671
91d6fa6a 672 if (addrmodeP->mode == DEFAULT || addrmodeP->scaled_mode == -1)
252b5132 673 {
67c1ffbe 674 /* Resolve ambiguous operands, this shouldn't be necessary if
252b5132 675 one uses standard NSC operand syntax. But the sequent
67c1ffbe 676 compiler doesn't!!! This finds a proper addressing mode
c6a7ab1f
NC
677 if it is implicitly stated. See ns32k-opcode.h. */
678 (void) evaluate_expr (&exprP, ptr); /* This call takes time Sigh! */
0b7410c4 679
91d6fa6a 680 if (addrmodeP->mode == DEFAULT)
252b5132
RH
681 {
682 if (exprP.X_add_symbol || exprP.X_op_symbol)
91d6fa6a 683 addrmodeP->mode = desc->default_model; /* We have a label. */
252b5132 684 else
91d6fa6a 685 addrmodeP->mode = desc->default_modec; /* We have a constant. */
252b5132
RH
686 }
687 else
688 {
689 if (exprP.X_add_symbol || exprP.X_op_symbol)
91d6fa6a 690 addrmodeP->scaled_mode = desc->default_model;
252b5132 691 else
91d6fa6a 692 addrmodeP->scaled_mode = desc->default_modec;
252b5132 693 }
0b7410c4 694
c6a7ab1f
NC
695 /* Must put this mess down in addr_mode to handle the scaled
696 case better. */
252b5132 697 }
0b7410c4 698
252b5132
RH
699 /* It appears as the sequent compiler wants an absolute when we have
700 a label without @. Constants becomes immediates besides the addr
701 case. Think it does so with local labels too, not optimum, pcrel
702 is better. When I have time I will make gas check this and
703 select pcrel when possible Actually that is trivial. */
91d6fa6a 704 if ((tmp = addrmodeP->scaled_reg))
c6a7ab1f
NC
705 { /* Build indexbyte. */
706 tmp--; /* Remember regnumber comes incremented for
33eaf5de 707 flag purpose. */
91d6fa6a
NC
708 tmp |= addrmodeP->scaled_mode << 3;
709 addrmodeP->index_byte = (char) tmp;
710 addrmodeP->am_size += 1;
252b5132 711 }
0b7410c4 712
3739860c 713 gas_assert (addrmodeP->mode >= 0);
91d6fa6a 714 if (disp_test[(unsigned int) addrmodeP->mode])
c6a7ab1f 715 {
4eb6b71c
NC
716 char c;
717 char suffix;
718 char suffix_sub;
719 int i;
720 char *toP;
721 char *fromP;
c6a7ab1f
NC
722
723 /* There was a displacement, probe for length specifying suffix. */
91d6fa6a 724 addrmodeP->pcrel = 0;
0b7410c4 725
91d6fa6a
NC
726 gas_assert (addrmodeP->mode >= 0);
727 if (disp_test[(unsigned int) addrmodeP->mode])
c6a7ab1f
NC
728 {
729 /* There is a displacement. */
91d6fa6a 730 if (addrmodeP->mode == 27 || addrmodeP->scaled_mode == 27)
c6a7ab1f 731 /* Do we have pcrel. mode. */
91d6fa6a 732 addrmodeP->pcrel = 1;
0b7410c4 733
91d6fa6a 734 addrmodeP->im_disp = 1;
0b7410c4 735
c6a7ab1f
NC
736 for (i = 0; i < 2; i++)
737 {
738 suffix_sub = suffix = 0;
0b7410c4 739
91d6fa6a 740 if ((toP = addrmodeP->disp[i]))
c6a7ab1f
NC
741 {
742 /* Suffix of expression, the largest size rules. */
743 fromP = toP;
0b7410c4 744
4eb6b71c 745 while ((c = *fromP++))
c6a7ab1f
NC
746 {
747 *toP++ = c;
748 if (c == ':')
749 {
750 switch (*fromP)
751 {
752 case '\0':
753 as_warn (_("Premature end of suffix -- Defaulting to d"));
754 suffix = 4;
755 continue;
756 case 'b':
757 suffix_sub = 1;
758 break;
759 case 'w':
760 suffix_sub = 2;
761 break;
762 case 'd':
763 suffix_sub = 4;
764 break;
765 default:
766 as_warn (_("Bad suffix after ':' use {b|w|d} Defaulting to d"));
767 suffix = 4;
768 }
0b7410c4 769
c6a7ab1f
NC
770 fromP ++;
771 toP --; /* So we write over the ':' */
0b7410c4 772
c6a7ab1f
NC
773 if (suffix < suffix_sub)
774 suffix = suffix_sub;
775 }
776 }
0b7410c4 777
c6a7ab1f 778 *toP = '\0'; /* Terminate properly. */
91d6fa6a
NC
779 addrmodeP->disp_suffix[i] = suffix;
780 addrmodeP->am_size += suffix ? suffix : 4;
c6a7ab1f
NC
781 }
782 }
783 }
252b5132
RH
784 }
785 else
786 {
91d6fa6a 787 if (addrmodeP->mode == 20)
c6a7ab1f
NC
788 {
789 /* Look in ns32k_opcode for size. */
91d6fa6a
NC
790 addrmodeP->disp_suffix[0] = addrmodeP->am_size = desc->im_size;
791 addrmodeP->im_disp = 0;
252b5132
RH
792 }
793 }
0b7410c4 794
91d6fa6a 795 return addrmodeP->mode;
252b5132
RH
796}
797
33eaf5de 798/* Read an option list. */
252b5132 799
4eb6b71c 800static void
ea1562b3
NC
801optlist (char *str, /* The string to extract options from. */
802 struct ns32k_option *optionP, /* How to search the string. */
803 unsigned long *default_map) /* Default pattern and output. */
252b5132 804{
4eb6b71c 805 int i, j, k, strlen1, strlen2;
e0471c16 806 const char *patternP, *strP;
0b7410c4 807
252b5132 808 strlen1 = strlen (str);
0b7410c4 809
252b5132 810 if (strlen1 < 1)
c6a7ab1f 811 as_fatal (_("Very short instr to option, ie you can't do it on a NULLstr"));
0b7410c4 812
252b5132
RH
813 for (i = 0; optionP[i].pattern != 0; i++)
814 {
815 strlen2 = strlen (optionP[i].pattern);
0b7410c4 816
252b5132
RH
817 for (j = 0; j < strlen1; j++)
818 {
819 patternP = optionP[i].pattern;
820 strP = &str[j];
0b7410c4 821
252b5132
RH
822 for (k = 0; k < strlen2; k++)
823 {
824 if (*(strP++) != *(patternP++))
825 break;
826 }
0b7410c4 827
252b5132
RH
828 if (k == strlen2)
829 { /* match */
830 *default_map |= optionP[i].or;
831 *default_map &= optionP[i].and;
832 }
833 }
834 }
835}
836
c6a7ab1f 837/* Search struct for symbols.
252b5132
RH
838 This function is used to get the short integer form of reg names in
839 the instructions lmr, smr, lpr, spr return true if str is found in
c6a7ab1f 840 list. */
252b5132 841
4eb6b71c 842static int
ea1562b3
NC
843list_search (char *str, /* The string to match. */
844 struct ns32k_option *optionP, /* List to search. */
845 unsigned long *default_map) /* Default pattern and output. */
252b5132 846{
4eb6b71c 847 int i;
0b7410c4 848
252b5132
RH
849 for (i = 0; optionP[i].pattern != 0; i++)
850 {
851 if (!strncmp (optionP[i].pattern, str, 20))
c6a7ab1f
NC
852 {
853 /* Use strncmp to be safe. */
252b5132
RH
854 *default_map |= optionP[i].or;
855 *default_map &= optionP[i].and;
0b7410c4 856
252b5132
RH
857 return -1;
858 }
859 }
0b7410c4 860
4eb6b71c 861 as_bad (_("No such entry in list. (cpu/mmu register)"));
252b5132
RH
862 return 0;
863}
ea1562b3
NC
864\f
865/* Create a bit_fixS in obstack 'notes'.
866 This struct is used to profile the normal fix. If the bit_fixP is a
867 valid pointer (not NULL) the bit_fix data will be used to format
868 the fix. */
252b5132 869
ea1562b3
NC
870static bit_fixS *
871bit_fix_new (int size, /* Length of bitfield. */
872 int offset, /* Bit offset to bitfield. */
873 long min, /* Signextended min for bitfield. */
874 long max, /* Signextended max for bitfield. */
875 long add, /* Add mask, used for huffman prefix. */
876 long base_type, /* 0 or 1, if 1 it's exploded to opcode ptr. */
877 long base_adj)
252b5132 878{
ea1562b3 879 bit_fixS *bit_fixP;
252b5132 880
5e429f4c 881 bit_fixP = XOBNEW (&notes, bit_fixS);
ea1562b3
NC
882
883 bit_fixP->fx_bit_size = size;
884 bit_fixP->fx_bit_offset = offset;
885 bit_fixP->fx_bit_base = base_type;
886 bit_fixP->fx_bit_base_adj = base_adj;
887 bit_fixP->fx_bit_max = max;
888 bit_fixP->fx_bit_min = min;
889 bit_fixP->fx_bit_add = add;
890
891 return bit_fixP;
252b5132 892}
ea1562b3 893
252b5132
RH
894/* Convert operands to iif-format and adds bitfields to the opcode.
895 Operands are parsed in such an order that the opcode is updated from
896 its most significant bit, that is when the operand need to alter the
897 opcode.
67c1ffbe 898 Be careful not to put to objects in the same iif-slot. */
252b5132 899
4eb6b71c 900static void
ea1562b3
NC
901encode_operand (int argc,
902 char **argv,
903 const char *operandsP,
904 const char *suffixP,
905 char im_size ATTRIBUTE_UNUSED,
906 char opcode_bit_ptr)
252b5132 907{
4eb6b71c 908 int i, j;
252b5132 909 char d;
4eb6b71c
NC
910 int pcrel, b, loop, pcrel_adjust;
911 unsigned long tmp;
0b7410c4 912
252b5132
RH
913 for (loop = 0; loop < argc; loop++)
914 {
c6a7ab1f
NC
915 /* What operand are we supposed to work on. */
916 i = operandsP[loop << 1] - '1';
252b5132
RH
917 if (i > 3)
918 as_fatal (_("Internal consistency error. check ns32k-opcode.h"));
0b7410c4 919
252b5132
RH
920 pcrel = 0;
921 pcrel_adjust = 0;
922 tmp = 0;
0b7410c4 923
252b5132
RH
924 switch ((d = operandsP[(loop << 1) + 1]))
925 {
4eb6b71c 926 case 'f': /* Operand of sfsr turns out to be a nasty
33eaf5de 927 special-case. */
252b5132 928 opcode_bit_ptr -= 5;
1a0670f3 929 /* Fall through. */
4eb6b71c
NC
930 case 'Z': /* Float not immediate. */
931 case 'F': /* 32 bit float general form. */
932 case 'L': /* 64 bit float. */
933 case 'I': /* Integer not immediate. */
934 case 'B': /* Byte */
935 case 'W': /* Word */
936 case 'D': /* Double-word. */
937 case 'A': /* Double-word gen-address-form ie no regs
938 allowed. */
252b5132 939 get_addr_mode (argv[i], &addr_modeP);
0b7410c4 940
c6a7ab1f
NC
941 if ((addr_modeP.mode == 20) &&
942 (d == 'I' || d == 'Z' || d == 'A'))
943 as_fatal (d == 'A'? _("Address of immediate operand"):
944 _("Invalid immediate write operand."));
252b5132
RH
945
946 if (opcode_bit_ptr == desc->opcode_size)
947 b = 4;
948 else
949 b = 6;
0b7410c4 950
252b5132
RH
951 for (j = b; j < (b + 2); j++)
952 {
953 if (addr_modeP.disp[j - b])
954 {
955 IIF (j,
956 2,
957 addr_modeP.disp_suffix[j - b],
958 (unsigned long) addr_modeP.disp[j - b],
959 0,
960 addr_modeP.pcrel,
961 iif.instr_size,
962 addr_modeP.im_disp,
963 IND (BRANCH, BYTE),
964 NULL,
965 (addr_modeP.scaled_reg ? addr_modeP.scaled_mode
966 : addr_modeP.mode),
967 0);
968 }
969 }
0b7410c4 970
252b5132
RH
971 opcode_bit_ptr -= 5;
972 iif.iifP[1].object |= ((long) addr_modeP.mode) << opcode_bit_ptr;
0b7410c4 973
252b5132
RH
974 if (addr_modeP.scaled_reg)
975 {
976 j = b / 2;
977 IIF (j, 1, 1, (unsigned long) addr_modeP.index_byte,
978 0, 0, 0, 0, 0, NULL, -1, 0);
979 }
980 break;
0b7410c4 981
4eb6b71c
NC
982 case 'b': /* Multiple instruction disp. */
983 freeptr++; /* OVE:this is an useful hack. */
984 sprintf (freeptr, "((%s-1)*%d)", argv[i], desc->im_size);
252b5132 985 argv[i] = freeptr;
67c1ffbe 986 pcrel -= 1; /* Make pcrel 0 in spite of what case 'p':
4eb6b71c 987 wants. */
2b0f3761 988 /* fallthru */
4eb6b71c 989 case 'p': /* Displacement - pc relative addressing. */
252b5132 990 pcrel += 1;
2b0f3761 991 /* fallthru */
4eb6b71c 992 case 'd': /* Displacement. */
252b5132
RH
993 iif.instr_size += suffixP[i] ? suffixP[i] : 4;
994 IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
995 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 0);
996 break;
4eb6b71c
NC
997 case 'H': /* Sequent-hack: the linker wants a bit set
998 when bsr. */
252b5132
RH
999 pcrel = 1;
1000 iif.instr_size += suffixP[i] ? suffixP[i] : 4;
1001 IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
1002 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 1);
1003 break;
1004 case 'q': /* quick */
1005 opcode_bit_ptr -= 4;
1006 IIF (11, 2, 42, (unsigned long) argv[i], 0, 0, 0, 0, 0,
1007 bit_fix_new (4, opcode_bit_ptr, -8, 7, 0, 1, 0), -1, 0);
1008 break;
4eb6b71c 1009 case 'r': /* Register number (3 bits). */
252b5132
RH
1010 list_search (argv[i], opt6, &tmp);
1011 opcode_bit_ptr -= 3;
1012 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1013 break;
33eaf5de 1014 case 'O': /* Setcfg instruction options list. */
252b5132
RH
1015 optlist (argv[i], opt3, &tmp);
1016 opcode_bit_ptr -= 4;
1017 iif.iifP[1].object |= tmp << 15;
1018 break;
33eaf5de 1019 case 'C': /* Cinv instruction options list. */
252b5132
RH
1020 optlist (argv[i], opt4, &tmp);
1021 opcode_bit_ptr -= 4;
4eb6b71c 1022 iif.iifP[1].object |= tmp << 15; /* Insert the regtype in opcode. */
252b5132 1023 break;
4eb6b71c 1024 case 'S': /* String instruction options list. */
252b5132
RH
1025 optlist (argv[i], opt5, &tmp);
1026 opcode_bit_ptr -= 4;
1027 iif.iifP[1].object |= tmp << 15;
1028 break;
1029 case 'u':
4eb6b71c 1030 case 'U': /* Register list. */
252b5132
RH
1031 IIF (10, 1, 1, 0, 0, 0, 0, 0, 0, NULL, -1, 0);
1032 switch (operandsP[(i << 1) + 1])
1033 {
4eb6b71c 1034 case 'u': /* Restore, exit. */
252b5132
RH
1035 optlist (argv[i], opt1, &iif.iifP[10].object);
1036 break;
4eb6b71c 1037 case 'U': /* Save, enter. */
252b5132
RH
1038 optlist (argv[i], opt2, &iif.iifP[10].object);
1039 break;
1040 }
1041 iif.instr_size += 1;
1042 break;
4eb6b71c 1043 case 'M': /* MMU register. */
252b5132
RH
1044 list_search (argv[i], mmureg, &tmp);
1045 opcode_bit_ptr -= 4;
1046 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1047 break;
4eb6b71c 1048 case 'P': /* CPU register. */
252b5132
RH
1049 list_search (argv[i], cpureg, &tmp);
1050 opcode_bit_ptr -= 4;
1051 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1052 break;
4eb6b71c
NC
1053 case 'g': /* Inss exts. */
1054 iif.instr_size += 1; /* 1 byte is allocated after the opcode. */
252b5132 1055 IIF (10, 2, 1,
4eb6b71c 1056 (unsigned long) argv[i], /* i always 2 here. */
252b5132 1057 0, 0, 0, 0, 0,
4eb6b71c
NC
1058 bit_fix_new (3, 5, 0, 7, 0, 0, 0), /* A bit_fix is targeted to
1059 the byte. */
252b5132
RH
1060 -1, 0);
1061 break;
1062 case 'G':
1063 IIF (11, 2, 42,
4eb6b71c 1064 (unsigned long) argv[i], /* i always 3 here. */
252b5132
RH
1065 0, 0, 0, 0, 0,
1066 bit_fix_new (5, 0, 1, 32, -1, 0, -1), -1, 0);
1067 break;
1068 case 'i':
1069 iif.instr_size += 1;
4eb6b71c 1070 b = 2 + i; /* Put the extension byte after opcode. */
252b5132
RH
1071 IIF (b, 2, 1, 0, 0, 0, 0, 0, 0, 0, -1, 0);
1072 break;
1073 default:
1074 as_fatal (_("Bad opcode-table-option, check in file ns32k-opcode.h"));
1075 }
1076 }
1077}
1078\f
1079/* in: instruction line
1080 out: internal structure of instruction
1081 that has been prepared for direct conversion to fragment(s) and
1082 fixes in a systematical fashion
4eb6b71c 1083 Return-value = recursive_level. */
c6a7ab1f
NC
1084/* Build iif of one assembly text line. */
1085
4eb6b71c 1086static int
ea1562b3 1087parse (const char *line, int recursive_level)
252b5132 1088{
4cd62c96
AM
1089 const char *lineptr;
1090 char c, suffix_separator;
4eb6b71c
NC
1091 int i;
1092 unsigned int argc;
1093 int arg_type;
252b5132 1094 char sqr, sep;
c6a7ab1f 1095 char suffix[MAX_ARGS], *argv[MAX_ARGS]; /* No more than 4 operands. */
0b7410c4 1096
252b5132 1097 if (recursive_level <= 0)
c6a7ab1f
NC
1098 {
1099 /* Called from md_assemble. */
1100 for (lineptr = line; (*lineptr) != '\0' && (*lineptr) != ' '; lineptr++)
1101 continue;
0b7410c4 1102
252b5132 1103 c = *lineptr;
4cd62c96 1104 *(char *) lineptr = '\0';
0b7410c4 1105
fe0e921f
AM
1106 desc = (struct ns32k_opcode *) str_hash_find (inst_hash_handle, line);
1107 if (!desc)
c6a7ab1f
NC
1108 as_fatal (_("No such opcode"));
1109
4cd62c96 1110 *(char *) lineptr = c;
252b5132
RH
1111 }
1112 else
ea1562b3 1113 lineptr = line;
0b7410c4 1114
252b5132 1115 argc = 0;
0b7410c4 1116
252b5132
RH
1117 if (*desc->operands)
1118 {
1119 if (*lineptr++ != '\0')
1120 {
1121 sqr = '[';
1122 sep = ',';
0b7410c4 1123
252b5132
RH
1124 while (*lineptr != '\0')
1125 {
1126 if (desc->operands[argc << 1])
1127 {
1128 suffix[argc] = 0;
1129 arg_type = desc->operands[(argc << 1) + 1];
0b7410c4 1130
252b5132
RH
1131 switch (arg_type)
1132 {
1133 case 'd':
1134 case 'b':
1135 case 'p':
c6a7ab1f
NC
1136 case 'H':
1137 /* The operand is supposed to be a displacement. */
252b5132 1138 /* Hackwarning: do not forget to update the 4
c6a7ab1f 1139 cases above when editing ns32k-opcode.h. */
252b5132
RH
1140 suffix_separator = ':';
1141 break;
1142 default:
c6a7ab1f
NC
1143 /* If this char occurs we loose. */
1144 suffix_separator = '\255';
1145 break;
252b5132 1146 }
0b7410c4 1147
4eb6b71c 1148 suffix[argc] = 0; /* 0 when no ':' is encountered. */
252b5132
RH
1149 argv[argc] = freeptr;
1150 *freeptr = '\0';
0b7410c4 1151
252b5132
RH
1152 while ((c = *lineptr) != '\0' && c != sep)
1153 {
1154 if (c == sqr)
1155 {
1156 if (sqr == '[')
1157 {
1158 sqr = ']';
1159 sep = '\0';
1160 }
1161 else
1162 {
1163 sqr = '[';
1164 sep = ',';
1165 }
1166 }
0b7410c4 1167
252b5132 1168 if (c == suffix_separator)
c6a7ab1f
NC
1169 {
1170 /* ':' - label/suffix separator. */
252b5132
RH
1171 switch (lineptr[1])
1172 {
1173 case 'b':
1174 suffix[argc] = 1;
1175 break;
1176 case 'w':
1177 suffix[argc] = 2;
1178 break;
1179 case 'd':
1180 suffix[argc] = 4;
1181 break;
1182 default:
1183 as_warn (_("Bad suffix, defaulting to d"));
1184 suffix[argc] = 4;
1185 if (lineptr[1] == '\0' || lineptr[1] == sep)
1186 {
1187 lineptr += 1;
1188 continue;
1189 }
c6a7ab1f 1190 break;
252b5132 1191 }
0b7410c4 1192
252b5132
RH
1193 lineptr += 2;
1194 continue;
1195 }
0b7410c4 1196
252b5132
RH
1197 *freeptr++ = c;
1198 lineptr++;
1199 }
0b7410c4 1200
252b5132
RH
1201 *freeptr++ = '\0';
1202 argc += 1;
0b7410c4 1203
252b5132
RH
1204 if (*lineptr == '\0')
1205 continue;
0b7410c4 1206
252b5132
RH
1207 lineptr += 1;
1208 }
1209 else
ea1562b3 1210 as_fatal (_("Too many operands passed to instruction"));
252b5132
RH
1211 }
1212 }
1213 }
0b7410c4 1214
252b5132
RH
1215 if (argc != strlen (desc->operands) / 2)
1216 {
1217 if (strlen (desc->default_args))
c6a7ab1f
NC
1218 {
1219 /* We can apply default, don't goof. */
252b5132 1220 if (parse (desc->default_args, 1) != 1)
c6a7ab1f
NC
1221 /* Check error in default. */
1222 as_fatal (_("Wrong numbers of operands in default, check ns32k-opcodes.h"));
252b5132
RH
1223 }
1224 else
ea1562b3 1225 as_fatal (_("Wrong number of operands"));
252b5132 1226 }
0b7410c4 1227
252b5132 1228 for (i = 0; i < IIF_ENTRIES; i++)
c6a7ab1f
NC
1229 /* Mark all entries as void. */
1230 iif.iifP[i].type = 0;
252b5132 1231
c6a7ab1f 1232 /* Build opcode iif-entry. */
252b5132
RH
1233 iif.instr_size = desc->opcode_size / 8;
1234 IIF (1, 1, iif.instr_size, desc->opcode_seed, 0, 0, 0, 0, 0, 0, -1, 0);
1235
c6a7ab1f 1236 /* This call encodes operands to iif format. */
252b5132 1237 if (argc)
ea1562b3
NC
1238 encode_operand (argc, argv, &desc->operands[0],
1239 &suffix[0], desc->im_size, desc->opcode_size);
1240
252b5132
RH
1241 return recursive_level;
1242}
1243\f
ea1562b3 1244/* This functionality should really be in the bfd library. */
252b5132 1245
ea1562b3
NC
1246static bfd_reloc_code_real_type
1247reloc (int size, int pcrel, int type)
252b5132 1248{
91d6fa6a 1249 int length, rel_index;
ea1562b3
NC
1250 bfd_reloc_code_real_type relocs[] =
1251 {
1252 BFD_RELOC_NS32K_IMM_8,
1253 BFD_RELOC_NS32K_IMM_16,
1254 BFD_RELOC_NS32K_IMM_32,
1255 BFD_RELOC_NS32K_IMM_8_PCREL,
1256 BFD_RELOC_NS32K_IMM_16_PCREL,
1257 BFD_RELOC_NS32K_IMM_32_PCREL,
252b5132 1258
ea1562b3
NC
1259 /* ns32k displacements. */
1260 BFD_RELOC_NS32K_DISP_8,
1261 BFD_RELOC_NS32K_DISP_16,
1262 BFD_RELOC_NS32K_DISP_32,
1263 BFD_RELOC_NS32K_DISP_8_PCREL,
1264 BFD_RELOC_NS32K_DISP_16_PCREL,
1265 BFD_RELOC_NS32K_DISP_32_PCREL,
252b5132 1266
ea1562b3
NC
1267 /* Normal 2's complement. */
1268 BFD_RELOC_8,
1269 BFD_RELOC_16,
1270 BFD_RELOC_32,
1271 BFD_RELOC_8_PCREL,
1272 BFD_RELOC_16_PCREL,
1273 BFD_RELOC_32_PCREL
1274 };
1275
1276 switch (size)
252b5132 1277 {
ea1562b3
NC
1278 case 1:
1279 length = 0;
1280 break;
1281 case 2:
1282 length = 1;
1283 break;
1284 case 4:
1285 length = 2;
1286 break;
1287 default:
1288 length = -1;
1289 break;
1290 }
0b7410c4 1291
91d6fa6a 1292 rel_index = length + 3 * pcrel + 6 * type;
0b7410c4 1293
91d6fa6a
NC
1294 if (rel_index >= 0 && (unsigned int) rel_index < sizeof (relocs) / sizeof (relocs[0]))
1295 return relocs[rel_index];
0b7410c4 1296
ea1562b3
NC
1297 if (pcrel)
1298 as_bad (_("Can not do %d byte pc-relative relocation for storage type %d"),
1299 size, type);
1300 else
1301 as_bad (_("Can not do %d byte relocation for storage type %d"),
1302 size, type);
0b7410c4 1303
ea1562b3 1304 return BFD_RELOC_NONE;
0b7410c4 1305
ea1562b3 1306}
252b5132 1307
ea1562b3
NC
1308static void
1309fix_new_ns32k (fragS *frag, /* Which frag? */
1310 int where, /* Where in that frag? */
1311 int size, /* 1, 2 or 4 usually. */
1312 symbolS *add_symbol, /* X_add_symbol. */
1313 long offset, /* X_add_number. */
1314 int pcrel, /* True if PC-relative relocation. */
1315 char im_disp, /* True if the value to write is a
1316 displacement. */
1317 bit_fixS *bit_fixP, /* Pointer at struct of bit_fix's, ignored if
1318 NULL. */
1319 char bsr, /* Sequent-linker-hack: 1 when relocobject is
1320 a bsr. */
1321 fragS *opcode_frag,
1322 unsigned int opcode_offset)
1323{
1324 fixS *fixP = fix_new (frag, where, size, add_symbol,
1325 offset, pcrel,
ea1562b3 1326 bit_fixP ? NO_RELOC : reloc (size, pcrel, im_disp)
ea1562b3
NC
1327 );
1328
1329 fix_opcode_frag (fixP) = opcode_frag;
1330 fix_opcode_offset (fixP) = opcode_offset;
1331 fix_im_disp (fixP) = im_disp;
1332 fix_bsr (fixP) = bsr;
1333 fix_bit_fixP (fixP) = bit_fixP;
1334 /* We have a MD overflow check for displacements. */
5bc11336 1335 fixP->fx_no_overflow = im_disp != 0 || bit_fixP != NULL;
ea1562b3
NC
1336}
1337
1338static void
1339fix_new_ns32k_exp (fragS *frag, /* Which frag? */
1340 int where, /* Where in that frag? */
1341 int size, /* 1, 2 or 4 usually. */
1342 expressionS *exp, /* Expression. */
1343 int pcrel, /* True if PC-relative relocation. */
1344 char im_disp, /* True if the value to write is a
1345 displacement. */
1346 bit_fixS *bit_fixP, /* Pointer at struct of bit_fix's, ignored if
1347 NULL. */
1348 char bsr, /* Sequent-linker-hack: 1 when relocobject is
1349 a bsr. */
1350 fragS *opcode_frag,
1351 unsigned int opcode_offset)
1352{
1353 fixS *fixP = fix_new_exp (frag, where, size, exp, pcrel,
ea1562b3 1354 bit_fixP ? NO_RELOC : reloc (size, pcrel, im_disp)
ea1562b3
NC
1355 );
1356
1357 fix_opcode_frag (fixP) = opcode_frag;
1358 fix_opcode_offset (fixP) = opcode_offset;
1359 fix_im_disp (fixP) = im_disp;
1360 fix_bsr (fixP) = bsr;
1361 fix_bit_fixP (fixP) = bit_fixP;
1362 /* We have a MD overflow check for displacements. */
5bc11336 1363 fixP->fx_no_overflow = im_disp != 0 || bit_fixP != NULL;
ea1562b3
NC
1364}
1365
1366/* Convert number to chars in correct order. */
1367
1368void
1369md_number_to_chars (char *buf, valueT value, int nbytes)
1370{
1371 number_to_chars_littleendian (buf, value, nbytes);
1372}
1373
33eaf5de 1374/* This is a variant of md_numbers_to_chars. The reason for its
ea1562b3
NC
1375 existence is the fact that ns32k uses Huffman coded
1376 displacements. This implies that the bit order is reversed in
1377 displacements and that they are prefixed with a size-tag.
1378
1379 binary: msb -> lsb
1380 0xxxxxxx byte
1381 10xxxxxx xxxxxxxx word
1382 11xxxxxx xxxxxxxx xxxxxxxx xxxxxxxx double word
1383
1384 This must be taken care of and we do it here! */
1385
1386static void
1387md_number_to_disp (char *buf, long val, int n)
1388{
1389 switch (n)
1390 {
1391 case 1:
1392 if (val < -64 || val > 63)
1393 as_bad (_("value of %ld out of byte displacement range."), val);
1394 val &= 0x7f;
1395#ifdef SHOW_NUM
1396 printf ("%x ", val & 0xff);
1397#endif
1398 *buf++ = val;
1399 break;
1400
1401 case 2:
1402 if (val < -8192 || val > 8191)
1403 as_bad (_("value of %ld out of word displacement range."), val);
1404 val &= 0x3fff;
1405 val |= 0x8000;
1406#ifdef SHOW_NUM
1407 printf ("%x ", val >> 8 & 0xff);
1408#endif
1409 *buf++ = (val >> 8);
1410#ifdef SHOW_NUM
1411 printf ("%x ", val & 0xff);
1412#endif
1413 *buf++ = val;
1414 break;
1415
1416 case 4:
1417 if (val < -0x20000000 || val >= 0x20000000)
1418 as_bad (_("value of %ld out of double word displacement range."), val);
1419 val |= 0xc0000000;
1420#ifdef SHOW_NUM
1421 printf ("%x ", val >> 24 & 0xff);
1422#endif
1423 *buf++ = (val >> 24);
1424#ifdef SHOW_NUM
1425 printf ("%x ", val >> 16 & 0xff);
1426#endif
1427 *buf++ = (val >> 16);
1428#ifdef SHOW_NUM
1429 printf ("%x ", val >> 8 & 0xff);
1430#endif
1431 *buf++ = (val >> 8);
1432#ifdef SHOW_NUM
1433 printf ("%x ", val & 0xff);
1434#endif
1435 *buf++ = val;
1436 break;
1437
1438 default:
33eaf5de 1439 as_fatal (_("Internal logic error. Line %d, file: \"%s\""),
ea1562b3
NC
1440 __LINE__, __FILE__);
1441 }
1442}
1443
1444static void
1445md_number_to_imm (char *buf, long val, int n)
1446{
1447 switch (n)
1448 {
1449 case 1:
1450#ifdef SHOW_NUM
1451 printf ("%x ", val & 0xff);
1452#endif
1453 *buf++ = val;
1454 break;
1455
1456 case 2:
1457#ifdef SHOW_NUM
1458 printf ("%x ", val >> 8 & 0xff);
1459#endif
1460 *buf++ = (val >> 8);
1461#ifdef SHOW_NUM
1462 printf ("%x ", val & 0xff);
1463#endif
1464 *buf++ = val;
1465 break;
1466
1467 case 4:
1468#ifdef SHOW_NUM
1469 printf ("%x ", val >> 24 & 0xff);
1470#endif
1471 *buf++ = (val >> 24);
1472#ifdef SHOW_NUM
1473 printf ("%x ", val >> 16 & 0xff);
1474#endif
1475 *buf++ = (val >> 16);
1476#ifdef SHOW_NUM
1477 printf ("%x ", val >> 8 & 0xff);
1478#endif
1479 *buf++ = (val >> 8);
1480#ifdef SHOW_NUM
1481 printf ("%x ", val & 0xff);
1482#endif
1483 *buf++ = val;
1484 break;
1485
1486 default:
1487 as_fatal (_("Internal logic error. line %d, file \"%s\""),
1488 __LINE__, __FILE__);
1489 }
1490}
1491
1492/* Fast bitfiddling support. */
1493/* Mask used to zero bitfield before oring in the true field. */
1494
1495static unsigned long l_mask[] =
1496{
1497 0xffffffff, 0xfffffffe, 0xfffffffc, 0xfffffff8,
1498 0xfffffff0, 0xffffffe0, 0xffffffc0, 0xffffff80,
1499 0xffffff00, 0xfffffe00, 0xfffffc00, 0xfffff800,
1500 0xfffff000, 0xffffe000, 0xffffc000, 0xffff8000,
1501 0xffff0000, 0xfffe0000, 0xfffc0000, 0xfff80000,
1502 0xfff00000, 0xffe00000, 0xffc00000, 0xff800000,
1503 0xff000000, 0xfe000000, 0xfc000000, 0xf8000000,
1504 0xf0000000, 0xe0000000, 0xc0000000, 0x80000000,
1505};
1506static unsigned long r_mask[] =
1507{
1508 0x00000000, 0x00000001, 0x00000003, 0x00000007,
1509 0x0000000f, 0x0000001f, 0x0000003f, 0x0000007f,
1510 0x000000ff, 0x000001ff, 0x000003ff, 0x000007ff,
1511 0x00000fff, 0x00001fff, 0x00003fff, 0x00007fff,
1512 0x0000ffff, 0x0001ffff, 0x0003ffff, 0x0007ffff,
1513 0x000fffff, 0x001fffff, 0x003fffff, 0x007fffff,
1514 0x00ffffff, 0x01ffffff, 0x03ffffff, 0x07ffffff,
1515 0x0fffffff, 0x1fffffff, 0x3fffffff, 0x7fffffff,
1516};
1517#define MASK_BITS 31
1518/* Insert bitfield described by field_ptr and val at buf
1519 This routine is written for modification of the first 4 bytes pointed
1520 to by buf, to yield speed.
1521 The ifdef stuff is for selection between a ns32k-dependent routine
1522 and a general version. (My advice: use the general version!). */
1523
1524static void
1525md_number_to_field (char *buf, long val, bit_fixS *field_ptr)
1526{
1527 unsigned long object;
1528 unsigned long mask;
1529 /* Define ENDIAN on a ns32k machine. */
1530#ifdef ENDIAN
1531 unsigned long *mem_ptr;
1532#else
1533 char *mem_ptr;
1534#endif
1535
1536 if (field_ptr->fx_bit_min <= val && val <= field_ptr->fx_bit_max)
1537 {
1538#ifdef ENDIAN
1539 if (field_ptr->fx_bit_base)
1540 /* Override buf. */
1541 mem_ptr = (unsigned long *) field_ptr->fx_bit_base;
1542 else
1543 mem_ptr = (unsigned long *) buf;
1544
1545 mem_ptr = ((unsigned long *)
1546 ((char *) mem_ptr + field_ptr->fx_bit_base_adj));
1547#else
1548 if (field_ptr->fx_bit_base)
1549 mem_ptr = (char *) field_ptr->fx_bit_base;
1550 else
1551 mem_ptr = buf;
1552
1553 mem_ptr += field_ptr->fx_bit_base_adj;
1554#endif
1555#ifdef ENDIAN
1556 /* We have a nice ns32k machine with lowbyte at low-physical mem. */
1557 object = *mem_ptr; /* get some bytes */
1558#else /* OVE Goof! the machine is a m68k or dito. */
1559 /* That takes more byte fiddling. */
1560 object = 0;
1561 object |= mem_ptr[3] & 0xff;
1562 object <<= 8;
1563 object |= mem_ptr[2] & 0xff;
1564 object <<= 8;
1565 object |= mem_ptr[1] & 0xff;
1566 object <<= 8;
1567 object |= mem_ptr[0] & 0xff;
1568#endif
1569 mask = 0;
1570 mask |= (r_mask[field_ptr->fx_bit_offset]);
1571 mask |= (l_mask[field_ptr->fx_bit_offset + field_ptr->fx_bit_size]);
1572 object &= mask;
1573 val += field_ptr->fx_bit_add;
1574 object |= ((val << field_ptr->fx_bit_offset) & (mask ^ 0xffffffff));
1575#ifdef ENDIAN
1576 *mem_ptr = object;
1577#else
1578 mem_ptr[0] = (char) object;
1579 object >>= 8;
1580 mem_ptr[1] = (char) object;
1581 object >>= 8;
1582 mem_ptr[2] = (char) object;
1583 object >>= 8;
1584 mem_ptr[3] = (char) object;
1585#endif
1586 }
1587 else
1588 as_bad (_("Bit field out of range"));
1589}
1590
1591/* Convert iif to fragments. From this point we start to dribble with
1592 functions in other files than this one.(Except hash.c) So, if it's
1593 possible to make an iif for an other CPU, you don't need to know
1594 what frags, relax, obstacks, etc is in order to port this
1595 assembler. You only need to know if it's possible to reduce your
1596 cpu-instruction to iif-format (takes some work) and adopt the other
1597 md_? parts according to given instructions Note that iif was
1598 invented for the clean ns32k`s architecture. */
1599
1600/* GAS for the ns32k has a problem. PC relative displacements are
1601 relative to the address of the opcode, not the address of the
1602 operand. We used to keep track of the offset between the operand
1603 and the opcode in pcrel_adjust for each frag and each fix. However,
1604 we get into trouble where there are two or more pc-relative
1605 operands and the size of the first one can't be determined. Then in
1606 the relax phase, the size of the first operand will change and
1607 pcrel_adjust will no longer be correct. The current solution is
1608 keep a pointer to the frag with the opcode in it and the offset in
1609 that frag for each frag and each fix. Then, when needed, we can
1610 always figure out how far it is between the opcode and the pcrel
1611 object. See also md_pcrel_adjust and md_fix_pcrel_adjust. For
1612 objects not part of an instruction, the pointer to the opcode frag
1613 is always zero. */
1614
1615static void
1616convert_iif (void)
1617{
1618 int i;
1619 bit_fixS *j;
1620 fragS *inst_frag;
1621 unsigned int inst_offset;
1622 char *inst_opcode;
1623 char *memP;
1624 int l;
1625 int k;
1626 char type;
1627 char size = 0;
1628
1629 frag_grow (iif.instr_size); /* This is important. */
1630 memP = frag_more (0);
1631 inst_opcode = memP;
1632 inst_offset = (memP - frag_now->fr_literal);
1633 inst_frag = frag_now;
1634
1635 for (i = 0; i < IIF_ENTRIES; i++)
1636 {
1637 if ((type = iif.iifP[i].type))
1638 {
1639 /* The object exist, so handle it. */
1640 switch (size = iif.iifP[i].size)
1641 {
1642 case 42:
1643 size = 0;
1644 /* It's a bitfix that operates on an existing object. */
1645 if (iif.iifP[i].bit_fixP->fx_bit_base)
1646 /* Expand fx_bit_base to point at opcode. */
1647 iif.iifP[i].bit_fixP->fx_bit_base = (long) inst_opcode;
1648 /* Fall through. */
1649
1650 case 8: /* bignum or doublefloat. */
1651 case 1:
1652 case 2:
1653 case 3:
1654 case 4:
1655 /* The final size in objectmemory is known. */
1656 memP = frag_more (size);
1657 j = iif.iifP[i].bit_fixP;
1658
1659 switch (type)
1660 {
1661 case 1: /* The object is pure binary. */
1662 if (j)
1663 md_number_to_field (memP, exprP.X_add_number, j);
1664
1665 else if (iif.iifP[i].pcrel)
1666 fix_new_ns32k (frag_now,
1667 (long) (memP - frag_now->fr_literal),
1668 size,
1669 0,
1670 iif.iifP[i].object,
1671 iif.iifP[i].pcrel,
1672 iif.iifP[i].im_disp,
1673 0,
1674 iif.iifP[i].bsr, /* Sequent hack. */
1675 inst_frag, inst_offset);
1676 else
1677 {
1678 /* Good, just put them bytes out. */
1679 switch (iif.iifP[i].im_disp)
1680 {
1681 case 0:
1682 md_number_to_chars (memP, iif.iifP[i].object, size);
1683 break;
1684 case 1:
1685 md_number_to_disp (memP, iif.iifP[i].object, size);
1686 break;
1687 default:
1688 as_fatal (_("iif convert internal pcrel/binary"));
1689 }
1690 }
1691 break;
1692
1693 case 2:
1694 /* The object is a pointer at an expression, so
1695 unpack it, note that bignums may result from the
1696 expression. */
1697 evaluate_expr (&exprP, (char *) iif.iifP[i].object);
1698 if (exprP.X_op == O_big || size == 8)
1699 {
1700 if ((k = exprP.X_add_number) > 0)
1701 {
1702 /* We have a bignum ie a quad. This can only
1703 happens in a long suffixed instruction. */
1704 if (k * 2 > size)
1705 as_bad (_("Bignum too big for long"));
1706
1707 if (k == 3)
1708 memP += 2;
1709
1710 for (l = 0; k > 0; k--, l += 2)
1711 md_number_to_chars (memP + l,
1712 generic_bignum[l >> 1],
1713 sizeof (LITTLENUM_TYPE));
1714 }
1715 else
1716 {
1717 /* flonum. */
1718 LITTLENUM_TYPE words[4];
1719
1720 switch (size)
1721 {
1722 case 4:
1723 gen_to_words (words, 2, 8);
1724 md_number_to_imm (memP, (long) words[0],
1725 sizeof (LITTLENUM_TYPE));
1726 md_number_to_imm (memP + sizeof (LITTLENUM_TYPE),
1727 (long) words[1],
1728 sizeof (LITTLENUM_TYPE));
1729 break;
1730 case 8:
1731 gen_to_words (words, 4, 11);
1732 md_number_to_imm (memP, (long) words[0],
1733 sizeof (LITTLENUM_TYPE));
1734 md_number_to_imm (memP + sizeof (LITTLENUM_TYPE),
1735 (long) words[1],
1736 sizeof (LITTLENUM_TYPE));
1737 md_number_to_imm ((memP + 2
1738 * sizeof (LITTLENUM_TYPE)),
1739 (long) words[2],
1740 sizeof (LITTLENUM_TYPE));
1741 md_number_to_imm ((memP + 3
1742 * sizeof (LITTLENUM_TYPE)),
1743 (long) words[3],
1744 sizeof (LITTLENUM_TYPE));
1745 break;
1746 }
1747 }
1748 break;
1749 }
1750 if (exprP.X_add_symbol ||
1751 exprP.X_op_symbol ||
1752 iif.iifP[i].pcrel)
252b5132
RH
1753 {
1754 /* The expression was undefined due to an
1755 undefined label. Create a fix so we can fix
c6a7ab1f 1756 the object later. */
252b5132
RH
1757 exprP.X_add_number += iif.iifP[i].object_adjust;
1758 fix_new_ns32k_exp (frag_now,
1759 (long) (memP - frag_now->fr_literal),
1760 size,
1761 &exprP,
1762 iif.iifP[i].pcrel,
1763 iif.iifP[i].im_disp,
1764 j,
1765 iif.iifP[i].bsr,
1766 inst_frag, inst_offset);
1767 }
4eb6b71c 1768 else if (j)
ea1562b3 1769 md_number_to_field (memP, exprP.X_add_number, j);
252b5132
RH
1770 else
1771 {
c6a7ab1f 1772 /* Good, just put them bytes out. */
252b5132
RH
1773 switch (iif.iifP[i].im_disp)
1774 {
1775 case 0:
1776 md_number_to_imm (memP, exprP.X_add_number, size);
1777 break;
1778 case 1:
1779 md_number_to_disp (memP, exprP.X_add_number, size);
1780 break;
1781 default:
1782 as_fatal (_("iif convert internal pcrel/pointer"));
1783 }
1784 }
1785 break;
1786 default:
1787 as_fatal (_("Internal logic error in iif.iifP[n].type"));
1788 }
1789 break;
0b7410c4 1790
252b5132 1791 case 0:
c6a7ab1f 1792 /* Too bad, the object may be undefined as far as its
252b5132
RH
1793 final nsize in object memory is concerned. The size
1794 of the object in objectmemory is not explicitly
1795 given. If the object is defined its length can be
c6a7ab1f 1796 determined and a fix can replace the frag. */
252b5132
RH
1797 {
1798 evaluate_expr (&exprP, (char *) iif.iifP[i].object);
0b7410c4 1799
252b5132
RH
1800 if ((exprP.X_add_symbol || exprP.X_op_symbol) &&
1801 !iif.iifP[i].pcrel)
1802 {
4eb6b71c
NC
1803 /* Size is unknown until link time so have to default. */
1804 size = default_disp_size; /* Normally 4 bytes. */
07726851 1805 memP = frag_more (size);
252b5132
RH
1806 fix_new_ns32k_exp (frag_now,
1807 (long) (memP - frag_now->fr_literal),
1808 size,
1809 &exprP,
1810 0, /* never iif.iifP[i].pcrel, */
1811 1, /* always iif.iifP[i].im_disp */
1812 (bit_fixS *) 0, 0,
1813 inst_frag,
1814 inst_offset);
4eb6b71c 1815 break; /* Exit this absolute hack. */
252b5132
RH
1816 }
1817
1818 if (exprP.X_add_symbol || exprP.X_op_symbol)
c6a7ab1f
NC
1819 {
1820 /* Frag it. */
252b5132 1821 if (exprP.X_op_symbol)
2b0f3761 1822 /* We can't relax this case. */
ea1562b3 1823 as_fatal (_("Can't relax difference"));
252b5132
RH
1824 else
1825 {
c6a7ab1f
NC
1826 /* Size is not important. This gets fixed by
1827 relax, but we assume 0 in what follows. */
07726851 1828 memP = frag_more (4); /* Max size. */
252b5132
RH
1829 size = 0;
1830
1831 {
1832 fragS *old_frag = frag_now;
1833 frag_variant (rs_machine_dependent,
c6a7ab1f
NC
1834 4, /* Max size. */
1835 0, /* Size. */
1836 IND (BRANCH, UNDEF), /* Expecting
1837 the worst. */
252b5132
RH
1838 exprP.X_add_symbol,
1839 exprP.X_add_number,
1840 inst_opcode);
c6a7ab1f
NC
1841 frag_opcode_frag (old_frag) = inst_frag;
1842 frag_opcode_offset (old_frag) = inst_offset;
1843 frag_bsr (old_frag) = iif.iifP[i].bsr;
252b5132
RH
1844 }
1845 }
1846 }
1847 else
1848 {
c6a7ab1f 1849 /* This duplicates code in md_number_to_disp. */
252b5132 1850 if (-64 <= exprP.X_add_number && exprP.X_add_number <= 63)
ea1562b3 1851 size = 1;
252b5132
RH
1852 else
1853 {
1854 if (-8192 <= exprP.X_add_number
1855 && exprP.X_add_number <= 8191)
ea1562b3 1856 size = 2;
252b5132
RH
1857 else
1858 {
c6a7ab1f
NC
1859 if (-0x20000000 <= exprP.X_add_number
1860 && exprP.X_add_number<=0x1fffffff)
ea1562b3 1861 size = 4;
252b5132
RH
1862 else
1863 {
5091343a 1864 as_bad (_("Displacement too large for :d"));
252b5132
RH
1865 size = 4;
1866 }
1867 }
1868 }
0b7410c4 1869
c6a7ab1f 1870 memP = frag_more (size);
252b5132
RH
1871 md_number_to_disp (memP, exprP.X_add_number, size);
1872 }
1873 }
1874 break;
0b7410c4 1875
252b5132
RH
1876 default:
1877 as_fatal (_("Internal logic error in iif.iifP[].type"));
1878 }
1879 }
ea1562b3
NC
1880 }
1881}
1882\f
1883void
1884md_assemble (char *line)
1885{
1886 freeptr = freeptr_static;
1887 parse (line, 0); /* Explode line to more fix form in iif. */
1888 convert_iif (); /* Convert iif to frags, fix's etc. */
252b5132 1889#ifdef SHOW_NUM
ea1562b3 1890 printf (" \t\t\t%s\n", line);
252b5132 1891#endif
252b5132
RH
1892}
1893
ea1562b3
NC
1894void
1895md_begin (void)
252b5132 1896{
ea1562b3
NC
1897 /* Build a hashtable of the instructions. */
1898 const struct ns32k_opcode *ptr;
ea1562b3
NC
1899 const struct ns32k_opcode *endop;
1900
629310ab 1901 inst_hash_handle = str_htab_create ();
ea1562b3
NC
1902
1903 endop = ns32k_opcodes + sizeof (ns32k_opcodes) / sizeof (ns32k_opcodes[0]);
1904 for (ptr = ns32k_opcodes; ptr < endop; ptr++)
fe0e921f
AM
1905 if (str_hash_insert (inst_hash_handle, ptr->name, ptr, 0) != NULL)
1906 as_fatal (_("duplicate %s"), ptr->name);
ea1562b3
NC
1907
1908 /* Some private space please! */
325801bd 1909 freeptr_static = XNEWVEC (char, PRIVATE_SIZE);
252b5132
RH
1910}
1911
ea1562b3
NC
1912/* Turn the string pointed to by litP into a floating point constant
1913 of type TYPE, and emit the appropriate bytes. The number of
1914 LITTLENUMS emitted is stored in *SIZEP. An error message is
1915 returned, or NULL on OK. */
252b5132 1916
6d4af3c2 1917const char *
ea1562b3 1918md_atof (int type, char *litP, int *sizeP)
252b5132 1919{
5b7c81bd 1920 return ieee_md_atof (type, litP, sizeP, false);
ea1562b3
NC
1921}
1922\f
c6a7ab1f 1923int
ea1562b3 1924md_pcrel_adjust (fragS *fragP)
252b5132
RH
1925{
1926 fragS *opcode_frag;
1927 addressT opcode_address;
1928 unsigned int offset;
0b7410c4 1929
c6a7ab1f 1930 opcode_frag = frag_opcode_frag (fragP);
252b5132
RH
1931 if (opcode_frag == 0)
1932 return 0;
0b7410c4 1933
c6a7ab1f 1934 offset = frag_opcode_offset (fragP);
252b5132 1935 opcode_address = offset + opcode_frag->fr_address;
0b7410c4 1936
252b5132
RH
1937 return fragP->fr_address + fragP->fr_fix - opcode_address;
1938}
1939
4eb6b71c 1940static int
ea1562b3 1941md_fix_pcrel_adjust (fixS *fixP)
252b5132 1942{
252b5132
RH
1943 fragS *opcode_frag;
1944 addressT opcode_address;
1945 unsigned int offset;
0b7410c4 1946
c6a7ab1f 1947 opcode_frag = fix_opcode_frag (fixP);
252b5132
RH
1948 if (opcode_frag == 0)
1949 return 0;
0b7410c4 1950
c6a7ab1f 1951 offset = fix_opcode_offset (fixP);
252b5132 1952 opcode_address = offset + opcode_frag->fr_address;
0b7410c4 1953
252b5132
RH
1954 return fixP->fx_where + fixP->fx_frag->fr_address - opcode_address;
1955}
1956
1957/* Apply a fixS (fixup of an instruction or data that we didn't have
1958 enough info to complete immediately) to the data in a frag.
1959
1960 On the ns32k, everything is in a different format, so we have broken
1961 out separate functions for each kind of thing we could be fixing.
1962 They all get called from here. */
1963
252b5132 1964void
55cf6793 1965md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
252b5132 1966{
94f592af 1967 long val = * (long *) valP;
252b5132
RH
1968 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1969
c6a7ab1f 1970 if (fix_bit_fixP (fixP))
ea1562b3
NC
1971 /* Bitfields to fix, sigh. */
1972 md_number_to_field (buf, val, fix_bit_fixP (fixP));
94f592af
NC
1973 else switch (fix_im_disp (fixP))
1974 {
1975 case 0:
1976 /* Immediate field. */
1977 md_number_to_imm (buf, val, fixP->fx_size);
1978 break;
252b5132 1979
94f592af
NC
1980 case 1:
1981 /* Displacement field. */
4eb6b71c 1982 /* Calculate offset. */
94f592af
NC
1983 md_number_to_disp (buf,
1984 (fixP->fx_pcrel ? val + md_fix_pcrel_adjust (fixP)
1985 : val), fixP->fx_size);
1986 break;
1987
1988 case 2:
1989 /* Pointer in a data object. */
1990 md_number_to_chars (buf, val, fixP->fx_size);
1991 break;
1992 }
1993
1994 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1995 fixP->fx_done = 1;
252b5132
RH
1996}
1997\f
4eb6b71c 1998/* Convert a relaxed displacement to ditto in final output. */
252b5132 1999
252b5132 2000void
ea1562b3
NC
2001md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
2002 segT sec ATTRIBUTE_UNUSED,
2003 fragS *fragP)
252b5132
RH
2004{
2005 long disp;
2006 long ext = 0;
252b5132 2007 /* Address in gas core of the place to store the displacement. */
4eb6b71c 2008 char *buffer_address = fragP->fr_fix + fragP->fr_literal;
252b5132
RH
2009 /* Address in object code of the displacement. */
2010 int object_address;
2011
252b5132
RH
2012 switch (fragP->fr_subtype)
2013 {
2014 case IND (BRANCH, BYTE):
2015 ext = 1;
2016 break;
2017 case IND (BRANCH, WORD):
2018 ext = 2;
2019 break;
2020 case IND (BRANCH, DOUBLE):
2021 ext = 4;
2022 break;
2023 }
2024
c6a7ab1f 2025 if (ext == 0)
252b5132
RH
2026 return;
2027
2028 know (fragP->fr_symbol);
2029
2030 object_address = fragP->fr_fix + fragP->fr_address;
0b7410c4 2031
252b5132
RH
2032 /* The displacement of the address, from current location. */
2033 disp = (S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset) - object_address;
c6a7ab1f 2034 disp += md_pcrel_adjust (fragP);
252b5132
RH
2035
2036 md_number_to_disp (buffer_address, (long) disp, (int) ext);
2037 fragP->fr_fix += ext;
2038}
2039
2040/* This function returns the estimated size a variable object will occupy,
2041 one can say that we tries to guess the size of the objects before we
c6a7ab1f 2042 actually know it. */
252b5132
RH
2043
2044int
ea1562b3 2045md_estimate_size_before_relax (fragS *fragP, segT segment)
252b5132 2046{
606ab118 2047 if (fragP->fr_subtype == IND (BRANCH, UNDEF))
252b5132 2048 {
606ab118 2049 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
252b5132 2050 {
606ab118 2051 /* We don't relax symbols defined in another segment. The
c6a7ab1f 2052 thing to do is to assume the object will occupy 4 bytes. */
252b5132
RH
2053 fix_new_ns32k (fragP,
2054 (int) (fragP->fr_fix),
2055 4,
2056 fragP->fr_symbol,
2057 fragP->fr_offset,
2058 1,
2059 1,
2060 0,
4eb6b71c 2061 frag_bsr(fragP), /* Sequent hack. */
c6a7ab1f
NC
2062 frag_opcode_frag (fragP),
2063 frag_opcode_offset (fragP));
252b5132 2064 fragP->fr_fix += 4;
252b5132 2065 frag_wane (fragP);
606ab118 2066 return 4;
252b5132 2067 }
93c2a809 2068
606ab118
AM
2069 /* Relaxable case. Set up the initial guess for the variable
2070 part of the frag. */
2071 fragP->fr_subtype = IND (BRANCH, BYTE);
252b5132 2072 }
0b7410c4 2073
606ab118
AM
2074 if (fragP->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2075 abort ();
2076
2077 /* Return the size of the variable part of the frag. */
2078 return md_relax_table[fragP->fr_subtype].rlx_length;
252b5132
RH
2079}
2080
2081int md_short_jump_size = 3;
2082int md_long_jump_size = 5;
252b5132
RH
2083
2084void
ea1562b3
NC
2085md_create_short_jump (char *ptr,
2086 addressT from_addr,
2087 addressT to_addr,
2088 fragS *frag ATTRIBUTE_UNUSED,
2089 symbolS *to_symbol ATTRIBUTE_UNUSED)
252b5132
RH
2090{
2091 valueT offset;
2092
2093 offset = to_addr - from_addr;
2094 md_number_to_chars (ptr, (valueT) 0xEA, 1);
2095 md_number_to_disp (ptr + 1, (valueT) offset, 2);
2096}
2097
2098void
ea1562b3
NC
2099md_create_long_jump (char *ptr,
2100 addressT from_addr,
2101 addressT to_addr,
2102 fragS *frag ATTRIBUTE_UNUSED,
2103 symbolS *to_symbol ATTRIBUTE_UNUSED)
252b5132
RH
2104{
2105 valueT offset;
2106
2107 offset = to_addr - from_addr;
2108 md_number_to_chars (ptr, (valueT) 0xEA, 1);
2109 md_number_to_disp (ptr + 1, (valueT) offset, 4);
2110}
2111\f
5a38dc70 2112const char *md_shortopts = "m:";
c6a7ab1f
NC
2113
2114struct option md_longopts[] =
2115{
4eb6b71c
NC
2116#define OPTION_DISP_SIZE (OPTION_MD_BASE)
2117 {"disp-size-default", required_argument , NULL, OPTION_DISP_SIZE},
252b5132
RH
2118 {NULL, no_argument, NULL, 0}
2119};
c6a7ab1f
NC
2120
2121size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
2122
2123int
17b9d67d 2124md_parse_option (int c, const char *arg)
252b5132
RH
2125{
2126 switch (c)
2127 {
2128 case 'm':
2129 if (!strcmp (arg, "32032"))
2130 {
2131 cpureg = cpureg_032;
2132 mmureg = mmureg_032;
2133 }
2134 else if (!strcmp (arg, "32532"))
2135 {
2136 cpureg = cpureg_532;
2137 mmureg = mmureg_532;
2138 }
2139 else
2140 {
4eb6b71c 2141 as_warn (_("invalid architecture option -m%s, ignored"), arg);
252b5132
RH
2142 return 0;
2143 }
2144 break;
4eb6b71c
NC
2145 case OPTION_DISP_SIZE:
2146 {
2147 int size = atoi(arg);
2148 switch (size)
2149 {
2150 case 1: case 2: case 4:
2151 default_disp_size = size;
2152 break;
2153 default:
2154 as_warn (_("invalid default displacement size \"%s\". Defaulting to %d."),
2155 arg, default_disp_size);
2156 }
2157 break;
2158 }
252b5132
RH
2159
2160 default:
2161 return 0;
2162 }
2163
2164 return 1;
2165}
2166
2167void
ea1562b3 2168md_show_usage (FILE *stream)
252b5132 2169{
c6a7ab1f 2170 fprintf (stream, _("\
252b5132 2171NS32K options:\n\
4eb6b71c
NC
2172-m32032 | -m32532 select variant of NS32K architecture\n\
2173--disp-size-default=<1|2|4>\n"));
252b5132 2174}
252b5132 2175\f
252b5132
RH
2176/* This is TC_CONS_FIX_NEW, called by emit_expr in read.c. */
2177
2178void
ea1562b3
NC
2179cons_fix_new_ns32k (fragS *frag, /* Which frag? */
2180 int where, /* Where in that frag? */
2181 int size, /* 1, 2 or 4 usually. */
62ebcb5c
AM
2182 expressionS *exp, /* Expression. */
2183 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
252b5132
RH
2184{
2185 fix_new_ns32k_exp (frag, where, size, exp,
2186 0, 2, 0, 0, 0, 0);
2187}
2188
2189/* We have no need to default values of symbols. */
2190
2191symbolS *
ea1562b3 2192md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH
2193{
2194 return 0;
2195}
2196
2197/* Round up a section size to the appropriate boundary. */
c6a7ab1f 2198
252b5132 2199valueT
ea1562b3 2200md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size)
252b5132 2201{
c6a7ab1f 2202 return size; /* Byte alignment is fine. */
252b5132
RH
2203}
2204
2205/* Exactly what point is a PC-relative offset relative TO? On the
c6a7ab1f
NC
2206 ns32k, they're relative to the start of the instruction. */
2207
252b5132 2208long
ea1562b3 2209md_pcrel_from (fixS *fixP)
252b5132
RH
2210{
2211 long res;
4eb6b71c 2212
252b5132
RH
2213 res = fixP->fx_where + fixP->fx_frag->fr_address;
2214#ifdef SEQUENT_COMPATABILITY
c6a7ab1f
NC
2215 if (frag_bsr (fixP->fx_frag))
2216 res += 0x12 /* FOO Kludge alert! */
252b5132
RH
2217#endif
2218 return res;
2219}
2220
252b5132 2221arelent *
ea1562b3 2222tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH
2223{
2224 arelent *rel;
2225 bfd_reloc_code_real_type code;
2226
c6a7ab1f 2227 code = reloc (fixp->fx_size, fixp->fx_pcrel, fix_im_disp (fixp));
252b5132 2228
325801bd
TS
2229 rel = XNEW (arelent);
2230 rel->sym_ptr_ptr = XNEW (asymbol *);
310b5aa2 2231 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2232 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2233 if (fixp->fx_pcrel)
2234 rel->addend = fixp->fx_addnumber;
2235 else
2236 rel->addend = 0;
2237
2238 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
2239 if (!rel->howto)
2240 {
2241 const char *name;
2242
2243 name = S_GET_NAME (fixp->fx_addsy);
2244 if (name == NULL)
2245 name = _("<unknown>");
2246 as_fatal (_("Cannot find relocation type for symbol %s, code %d"),
2247 name, (int) code);
2248 }
2249
2250 return rel;
2251}