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pdp11 reloc processing
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e135f41b 1/* tc-pdp11.c - pdp11-specific -
b3adc24a 2 Copyright (C) 2001-2020 Free Software Foundation, Inc.
e135f41b
NC
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
e135f41b
NC
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
bb0a86e1
NC
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
e135f41b 20
e135f41b 21#include "as.h"
3882b010 22#include "safe-ctype.h"
e135f41b
NC
23#include "opcode/pdp11.h"
24
4d5f9b2a 25extern int flonum_gen2vax (int, FLONUM_TYPE * f, LITTLENUM_TYPE *);
cd3cde86 26
4d5f9b2a 27#define TRUE 1
e135f41b
NC
28#define FALSE 0
29
4d5f9b2a 30/* A representation for PDP-11 machine code. */
e135f41b
NC
31struct pdp11_code
32{
6d4af3c2 33 const char *error;
e135f41b 34 int code;
4d5f9b2a
NC
35 int additional; /* Is there an additional word? */
36 int word; /* Additional word, if any. */
e135f41b
NC
37 struct
38 {
39 bfd_reloc_code_real_type type;
40 expressionS exp;
41 int pc_rel;
42 } reloc;
43};
44
4d5f9b2a
NC
45/* Instruction set extensions.
46
47 If you change this from an array to something else, please update
48 the "PDP-11 instruction set extensions" comment in pdp11.h. */
e135f41b
NC
49int pdp11_extension[PDP11_EXT_NUM];
50
4d5f9b2a 51/* Assembly options. */
e135f41b
NC
52
53#define ASM_OPT_PIC 1
54#define ASM_OPT_NUM 2
55
56int asm_option[ASM_OPT_NUM];
57
58/* These chars start a comment anywhere in a source file (except inside
4d5f9b2a 59 another comment. */
5a38dc70 60const char comment_chars[] = "#/";
e135f41b 61
5cd4edbe 62/* These chars only start a comment at the beginning of a line. */
5a38dc70 63const char line_comment_chars[] = "#/";
e135f41b 64
5a38dc70 65const char line_separator_chars[] = ";";
e135f41b 66
4d5f9b2a 67/* Chars that can be used to separate mant from exp in floating point nums. */
5a38dc70 68const char EXP_CHARS[] = "eE";
e135f41b 69
4d5f9b2a
NC
70/* Chars that mean this number is a floating point constant. */
71/* as in 0f123.456. */
72/* or 0H1.234E-12 (see exp chars above). */
5a38dc70 73const char FLT_CHARS[] = "dDfF";
e135f41b
NC
74
75void pseudo_even (int);
76void pseudo_bss (int);
77
5a38dc70 78const pseudo_typeS md_pseudo_table[] =
e135f41b
NC
79{
80 { "bss", pseudo_bss, 0 },
81 { "even", pseudo_even, 0 },
82 { 0, 0, 0 },
83};
84
4d5f9b2a
NC
85static struct hash_control *insn_hash = NULL;
86\f
87static int
17b9d67d 88set_option (const char *arg)
4d5f9b2a
NC
89{
90 int yes = 1;
91
92 if (strcmp (arg, "all-extensions") == 0
93 || strcmp (arg, "all") == 0)
94 {
95 memset (pdp11_extension, ~0, sizeof pdp11_extension);
96 pdp11_extension[PDP11_NONE] = 0;
97 return 1;
98 }
99 else if (strcmp (arg, "no-extensions") == 0)
100 {
101 memset (pdp11_extension, 0, sizeof pdp11_extension);
102 pdp11_extension[PDP11_BASIC] = 1;
103 return 1;
104 }
105
106 if (strncmp (arg, "no-", 3) == 0)
107 {
108 yes = 0;
109 arg += 3;
110 }
111
33eaf5de 112 /* Commercial instructions. */
4d5f9b2a
NC
113 if (strcmp (arg, "cis") == 0)
114 pdp11_extension[PDP11_CIS] = yes;
115 /* Call supervisor mode. */
116 else if (strcmp (arg, "csm") == 0)
117 pdp11_extension[PDP11_CSM] = yes;
118 /* Extended instruction set. */
119 else if (strcmp (arg, "eis") == 0)
120 pdp11_extension[PDP11_EIS] = pdp11_extension[PDP11_LEIS] = yes;
121 /* KEV11 floating-point. */
122 else if (strcmp (arg, "fis") == 0
123 || strcmp (arg, "kev11") == 0
124 || strcmp (arg, "kev-11") == 0)
125 pdp11_extension[PDP11_FIS] = yes;
126 /* FP-11 floating-point. */
127 else if (strcmp (arg, "fpp") == 0
128 || strcmp (arg, "fpu") == 0
129 || strcmp (arg, "fp11") == 0
130 || strcmp (arg, "fp-11") == 0
131 || strcmp (arg, "fpj11") == 0
132 || strcmp (arg, "fp-j11") == 0
133 || strcmp (arg, "fpj-11") == 0)
134 pdp11_extension[PDP11_FPP] = yes;
135 /* Limited extended insns. */
136 else if (strcmp (arg, "limited-eis") == 0)
137 {
138 pdp11_extension[PDP11_LEIS] = yes;
139 if (!pdp11_extension[PDP11_LEIS])
140 pdp11_extension[PDP11_EIS] = 0;
141 }
142 /* Move from processor type. */
143 else if (strcmp (arg, "mfpt") == 0)
144 pdp11_extension[PDP11_MFPT] = yes;
145 /* Multiprocessor insns: */
146 else if (strncmp (arg, "mproc", 5) == 0
147 /* TSTSET, WRTLCK */
148 || strncmp (arg, "multiproc", 9) == 0)
149 pdp11_extension[PDP11_MPROC] = yes;
150 /* Move from/to proc status. */
151 else if (strcmp (arg, "mxps") == 0)
152 pdp11_extension[PDP11_MXPS] = yes;
153 /* Position-independent code. */
154 else if (strcmp (arg, "pic") == 0)
155 asm_option[ASM_OPT_PIC] = yes;
156 /* Set priority level. */
157 else if (strcmp (arg, "spl") == 0)
158 pdp11_extension[PDP11_SPL] = yes;
159 /* Microcode instructions: */
160 else if (strcmp (arg, "ucode") == 0
161 /* LDUB, MED, XFC */
162 || strcmp (arg, "microcode") == 0)
163 pdp11_extension[PDP11_UCODE] = yes;
164 else
165 return 0;
166
167 return 1;
168}
169
170
e135f41b 171static void
4d5f9b2a 172init_defaults (void)
e135f41b
NC
173{
174 static int first = 1;
175
176 if (first)
177 {
178 set_option ("all-extensions");
179 set_option ("pic");
180 first = 0;
181 }
182}
183
e135f41b 184void
4d5f9b2a 185md_begin (void)
e135f41b
NC
186{
187 int i;
188
189 init_defaults ();
190
191 insn_hash = hash_new ();
192 if (insn_hash == NULL)
20203fb9 193 as_fatal (_("Virtual memory exhausted"));
5cd4edbe 194
e135f41b 195 for (i = 0; i < pdp11_num_opcodes; i++)
4d5f9b2a 196 hash_insert (insn_hash, pdp11_opcodes[i].name, (void *) (pdp11_opcodes + i));
e135f41b 197 for (i = 0; i < pdp11_num_aliases; i++)
4d5f9b2a 198 hash_insert (insn_hash, pdp11_aliases[i].name, (void *) (pdp11_aliases + i));
e135f41b
NC
199}
200
201void
4d5f9b2a 202md_number_to_chars (char con[], valueT value, int nbytes)
e135f41b
NC
203{
204 /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
4d5f9b2a 205 0x12345678 is stored as "\x56\x78\x12\x34". It's
33eaf5de 206 anyone's guess what 0x123456 would be stored like. */
e135f41b
NC
207
208 switch (nbytes)
209 {
210 case 0:
211 break;
212 case 1:
213 con[0] = value & 0xff;
214 break;
215 case 2:
4d5f9b2a 216 con[0] = value & 0xff;
e135f41b
NC
217 con[1] = (value >> 8) & 0xff;
218 break;
219 case 4:
220 con[0] = (value >> 16) & 0xff;
221 con[1] = (value >> 24) & 0xff;
4d5f9b2a 222 con[2] = value & 0xff;
e135f41b
NC
223 con[3] = (value >> 8) & 0xff;
224 break;
225 default:
226 BAD_CASE (nbytes);
5cd4edbe 227 }
e135f41b
NC
228}
229
230/* Fix up some data or instructions after we find out the value of a symbol
94f592af 231 that they reference. Knows about order of bytes in address. */
e135f41b 232
94f592af 233void
55cf6793 234md_apply_fix (fixS *fixP,
4d5f9b2a
NC
235 valueT * valP,
236 segT seg ATTRIBUTE_UNUSED)
e135f41b
NC
237{
238 valueT code;
239 valueT mask;
94f592af 240 valueT val = * valP;
e135f41b
NC
241 char *buf;
242 int shift;
243 int size;
244
245 buf = fixP->fx_where + fixP->fx_frag->fr_literal;
246 size = fixP->fx_size;
3ec2b351 247 code = md_chars_to_number ((unsigned char *) buf, size);
e135f41b
NC
248
249 switch (fixP->fx_r_type)
250 {
7553c869
AM
251 case BFD_RELOC_8:
252 mask = 0xff;
253 shift = 0;
254 break;
e135f41b
NC
255 case BFD_RELOC_16:
256 case BFD_RELOC_16_PCREL:
257 mask = 0xffff;
258 shift = 0;
259 break;
10a95fcc
AM
260 case BFD_RELOC_32:
261 mask = 0xffffffff;
262 shift = 0;
263 break;
e135f41b
NC
264 case BFD_RELOC_PDP11_DISP_8_PCREL:
265 mask = 0x00ff;
266 shift = 1;
267 break;
268 case BFD_RELOC_PDP11_DISP_6_PCREL:
269 mask = 0x003f;
270 shift = 1;
14127cc4 271 val = -val;
e135f41b
NC
272 break;
273 default:
274 BAD_CASE (fixP->fx_r_type);
275 }
276
277 if (fixP->fx_addsy != NULL)
94f592af 278 val += symbol_get_bfdsym (fixP->fx_addsy)->section->vma;
e135f41b
NC
279 /* *value += fixP->fx_addsy->bsym->section->vma; */
280
281 code &= ~mask;
94f592af 282 code |= (val >> shift) & mask;
e135f41b 283 number_to_chars_littleendian (buf, code, size);
94f592af
NC
284
285 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
286 fixP->fx_done = 1;
e135f41b
NC
287}
288
289long
e046cf80 290md_chars_to_number (unsigned char *con, int nbytes)
e135f41b
NC
291{
292 /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
4d5f9b2a 293 0x12345678 is stored as "\x56\x78\x12\x34". It's
33eaf5de 294 anyone's guess what 0x123456 would be stored like. */
e135f41b
NC
295 switch (nbytes)
296 {
297 case 0:
298 return 0;
299 case 1:
300 return con[0];
301 case 2:
302 return (con[1] << BITS_PER_CHAR) | con[0];
303 case 4:
304 return
4d5f9b2a
NC
305 (((con[1] << BITS_PER_CHAR) | con[0]) << (2 * BITS_PER_CHAR))
306 |((con[3] << BITS_PER_CHAR) | con[2]);
e135f41b
NC
307 default:
308 BAD_CASE (nbytes);
309 return 0;
5cd4edbe 310 }
e135f41b
NC
311}
312\f
313static char *
314skip_whitespace (char *str)
315{
316 while (*str == ' ' || *str == '\t')
317 str++;
318 return str;
319}
320
321static char *
322find_whitespace (char *str)
323{
324 while (*str != ' ' && *str != '\t' && *str != 0)
325 str++;
326 return str;
327}
328
e135f41b
NC
329static char *
330parse_reg (char *str, struct pdp11_code *operand)
331{
332 str = skip_whitespace (str);
3882b010 333 if (TOLOWER (*str) == 'r')
e135f41b
NC
334 {
335 str++;
336 switch (*str)
337 {
338 case '0': case '1': case '2': case '3':
339 case '4': case '5': case '6': case '7':
340 operand->code = *str - '0';
341 str++;
342 break;
343 default:
20203fb9 344 operand->error = _("Bad register name");
e135f41b
NC
345 return str - 1;
346 }
347 }
4d5f9b2a
NC
348 else if (strncmp (str, "sp", 2) == 0
349 || strncmp (str, "SP", 2) == 0)
e135f41b
NC
350 {
351 operand->code = 6;
352 str += 2;
353 }
4d5f9b2a
NC
354 else if (strncmp (str, "pc", 2) == 0
355 || strncmp (str, "PC", 2) == 0)
e135f41b
NC
356 {
357 operand->code = 7;
358 str += 2;
359 }
360 else
8f9ea98b 361 operand->error = _("Bad register name");
e135f41b
NC
362
363 return str;
364}
365
366static char *
cd3cde86 367parse_ac5 (char *str, struct pdp11_code *operand)
e135f41b
NC
368{
369 str = skip_whitespace (str);
4d5f9b2a
NC
370 if (strncmp (str, "fr", 2) == 0
371 || strncmp (str, "FR", 2) == 0
372 || strncmp (str, "ac", 2) == 0
373 || strncmp (str, "AC", 2) == 0)
e135f41b
NC
374 {
375 str += 2;
376 switch (*str)
377 {
378 case '0': case '1': case '2': case '3':
cd3cde86 379 case '4': case '5':
e135f41b
NC
380 operand->code = *str - '0';
381 str++;
382 break;
383 default:
20203fb9 384 operand->error = _("Bad register name");
e135f41b
NC
385 return str - 2;
386 }
387 }
388 else
389 {
20203fb9 390 operand->error = _("Bad register name");
e135f41b
NC
391 return str;
392 }
393
394 return str;
395}
396
cd3cde86
AM
397static char *
398parse_ac (char *str, struct pdp11_code *operand)
399{
400 str = parse_ac5 (str, operand);
401 if (!operand->error && operand->code > 3)
402 {
20203fb9 403 operand->error = _("Bad register name");
cd3cde86
AM
404 return str - 3;
405 }
406
407 return str;
408}
409
e135f41b
NC
410static char *
411parse_expression (char *str, struct pdp11_code *operand)
412{
413 char *save_input_line_pointer;
414 segT seg;
415
416 save_input_line_pointer = input_line_pointer;
417 input_line_pointer = str;
418 seg = expression (&operand->reloc.exp);
419 if (seg == NULL)
420 {
421 input_line_pointer = save_input_line_pointer;
20203fb9 422 operand->error = _("Error in expression");
e135f41b
NC
423 return str;
424 }
425
426 str = input_line_pointer;
427 input_line_pointer = save_input_line_pointer;
428
429 operand->reloc.pc_rel = 0;
430
e135f41b
NC
431 return str;
432}
433
434static char *
435parse_op_no_deferred (char *str, struct pdp11_code *operand)
436{
cd3cde86
AM
437 LITTLENUM_TYPE literal_float[2];
438
e135f41b
NC
439 str = skip_whitespace (str);
440
441 switch (*str)
442 {
443 case '(': /* (rn) and (rn)+ */
444 str = parse_reg (str + 1, operand);
445 if (operand->error)
446 return str;
447 str = skip_whitespace (str);
448 if (*str != ')')
449 {
20203fb9 450 operand->error = _("Missing ')'");
e135f41b
NC
451 return str;
452 }
453 str++;
454 if (*str == '+')
455 {
456 operand->code |= 020;
457 str++;
458 }
459 else
460 {
461 operand->code |= 010;
462 }
463 break;
464
4d5f9b2a
NC
465 /* Immediate. */
466 case '#':
5cd4edbe 467 case '$':
e135f41b
NC
468 str = parse_expression (str + 1, operand);
469 if (operand->error)
470 return str;
471 operand->additional = TRUE;
472 operand->word = operand->reloc.exp.X_add_number;
473 switch (operand->reloc.exp.X_op)
474 {
475 case O_constant:
476 break;
477 case O_symbol:
478 case O_add:
479 case O_subtract:
480 operand->reloc.type = BFD_RELOC_16;
481 operand->reloc.pc_rel = 0;
482 break;
cd3cde86
AM
483 case O_big:
484 if (operand->reloc.exp.X_add_number > 0)
485 {
20203fb9 486 operand->error = _("Error in expression");
cd3cde86
AM
487 break;
488 }
4d5f9b2a 489 /* It's a floating literal... */
cd3cde86
AM
490 know (operand->reloc.exp.X_add_number < 0);
491 flonum_gen2vax ('f', &generic_floating_point_number, literal_float);
492 operand->word = literal_float[0];
493 if (literal_float[1] != 0)
494 as_warn (_("Low order bits truncated in immediate float operand"));
495 break;
e135f41b 496 default:
20203fb9 497 operand->error = _("Error in expression");
e135f41b
NC
498 break;
499 }
500 operand->code = 027;
501 break;
502
4d5f9b2a
NC
503 /* label, d(rn), -(rn) */
504 default:
e135f41b 505 {
e135f41b
NC
506 if (strncmp (str, "-(", 2) == 0) /* -(rn) */
507 {
508 str = parse_reg (str + 2, operand);
509 if (operand->error)
510 return str;
511 str = skip_whitespace (str);
512 if (*str != ')')
513 {
20203fb9 514 operand->error = _("Missing ')'");
e135f41b
NC
515 return str;
516 }
517 operand->code |= 040;
518 str++;
519 break;
520 }
521
522 str = parse_expression (str, operand);
523 if (operand->error)
524 return str;
525
526 str = skip_whitespace (str);
527
4d5f9b2a 528 if (*str != '(')
e135f41b 529 {
e135f41b
NC
530 operand->code = 067;
531 operand->additional = 1;
532 operand->word = 0;
533 operand->reloc.type = BFD_RELOC_16_PCREL;
534 operand->reloc.pc_rel = 1;
535 break;
536 }
537
4d5f9b2a
NC
538 /* d(rn) */
539 str++;
e135f41b
NC
540 str = parse_reg (str, operand);
541 if (operand->error)
542 return str;
543
544 str = skip_whitespace (str);
545
546 if (*str != ')')
547 {
20203fb9 548 operand->error = _("Missing ')'");
e135f41b
NC
549 return str;
550 }
551
552 str++;
553 operand->additional = TRUE;
554 operand->code |= 060;
555 switch (operand->reloc.exp.X_op)
556 {
557 case O_symbol:
bb0a86e1
NC
558 operand->reloc.type = BFD_RELOC_16;
559 operand->reloc.pc_rel = 0;
e135f41b
NC
560 break;
561 case O_constant:
562 if ((operand->code & 7) == 7)
563 {
564 operand->reloc.pc_rel = 1;
565 operand->word = operand->reloc.exp.X_add_number;
566 }
567 else
4d5f9b2a
NC
568 operand->word = operand->reloc.exp.X_add_number;
569
e135f41b
NC
570 break;
571 default:
572 BAD_CASE (operand->reloc.exp.X_op);
573 }
574 break;
575 }
576 }
577
578 return str;
579}
580
581static char *
cd3cde86 582parse_op_noreg (char *str, struct pdp11_code *operand)
e135f41b
NC
583{
584 str = skip_whitespace (str);
e135f41b
NC
585 operand->error = NULL;
586
587 if (*str == '@' || *str == '*')
588 {
3cf2b669
JPC
589 /* @(Rn) == @0(Rn): Mode 7, Indexed deferred.
590 Check for auto-increment deferred. */
591 if (str[1] == '('
592 && str[2] != 0
593 && str[3] != 0
594 && str[4] != 0
595 && str[5] != '+')
596 {
597 /* Change implied to explicit index deferred. */
598 *str = '0';
599 str = parse_op_no_deferred (str, operand);
600 }
601 else
8f9ea98b
JPC
602 {
603 /* @Rn == (Rn): Register deferred. */
604 str = parse_reg (str + 1, operand);
605
606 /* Not @Rn */
607 if (operand->error)
608 {
609 operand->error = NULL;
610 str = parse_op_no_deferred (str, operand);
611 }
612 }
3cf2b669 613
e135f41b
NC
614 if (operand->error)
615 return str;
8f9ea98b 616
e135f41b
NC
617 operand->code |= 010;
618 }
619 else
620 str = parse_op_no_deferred (str, operand);
621
622 return str;
623}
624
cd3cde86
AM
625static char *
626parse_op (char *str, struct pdp11_code *operand)
627{
628 str = skip_whitespace (str);
629
630 str = parse_reg (str, operand);
631 if (!operand->error)
632 return str;
633
634 operand->error = NULL;
635 parse_ac5 (str, operand);
636 if (!operand->error)
637 {
20203fb9 638 operand->error = _("Float AC not legal as integer operand");
cd3cde86
AM
639 return str;
640 }
5d6255fe 641
cd3cde86
AM
642 return parse_op_noreg (str, operand);
643}
644
645static char *
646parse_fop (char *str, struct pdp11_code *operand)
647{
648 str = skip_whitespace (str);
649
650 str = parse_ac5 (str, operand);
651 if (!operand->error)
652 return str;
653
654 operand->error = NULL;
655 parse_reg (str, operand);
656 if (!operand->error)
657 {
20203fb9 658 operand->error = _("General register not legal as float operand");
cd3cde86
AM
659 return str;
660 }
661
662 return parse_op_noreg (str, operand);
663}
664
e135f41b
NC
665static char *
666parse_separator (char *str, int *error)
667{
668 str = skip_whitespace (str);
669 *error = (*str != ',');
670 if (!*error)
671 str++;
672 return str;
673}
674
675void
4d5f9b2a 676md_assemble (char *instruction_string)
e135f41b 677{
5a38dc70 678 const struct pdp11_opcode *op;
e135f41b
NC
679 struct pdp11_code insn, op1, op2;
680 int error;
681 int size;
6d4af3c2 682 const char *err = NULL;
e135f41b
NC
683 char *str;
684 char *p;
685 char c;
686
687 str = skip_whitespace (instruction_string);
688 p = find_whitespace (str);
689 if (p - str == 0)
690 {
20203fb9 691 as_bad (_("No instruction found"));
e135f41b
NC
692 return;
693 }
694
695 c = *p;
696 *p = '\0';
697 op = (struct pdp11_opcode *)hash_find (insn_hash, str);
698 *p = c;
699 if (op == 0)
700 {
cd3cde86 701 as_bad (_("Unknown instruction '%s'"), str);
e135f41b
NC
702 return;
703 }
704
705 if (!pdp11_extension[op->extension])
706 {
20203fb9 707 as_warn (_("Unsupported instruction set extension: %s"), op->name);
e135f41b
NC
708 return;
709 }
710
711 insn.error = NULL;
712 insn.code = op->opcode;
713 insn.reloc.type = BFD_RELOC_NONE;
714 op1.error = NULL;
715 op1.additional = FALSE;
716 op1.reloc.type = BFD_RELOC_NONE;
717 op2.error = NULL;
718 op2.additional = FALSE;
719 op2.reloc.type = BFD_RELOC_NONE;
720
721 str = p;
722 size = 2;
723
724 switch (op->type)
725 {
726 case PDP11_OPCODE_NO_OPS:
727 str = skip_whitespace (str);
e135f41b
NC
728 break;
729
730 case PDP11_OPCODE_IMM3:
731 case PDP11_OPCODE_IMM6:
732 case PDP11_OPCODE_IMM8:
733 str = skip_whitespace (str);
734 if (*str == '#' || *str == '$')
735 str++;
736 str = parse_expression (str, &op1);
737 if (op1.error)
738 break;
cd3cde86
AM
739 if (op1.reloc.exp.X_op != O_constant || op1.reloc.type != BFD_RELOC_NONE)
740 {
20203fb9 741 op1.error = _("operand is not an absolute constant");
cd3cde86
AM
742 break;
743 }
e135f41b
NC
744 switch (op->type)
745 {
746 case PDP11_OPCODE_IMM3:
cd3cde86 747 if (op1.reloc.exp.X_add_number & ~7)
e135f41b 748 {
20203fb9 749 op1.error = _("3-bit immediate out of range");
e135f41b
NC
750 break;
751 }
752 break;
753 case PDP11_OPCODE_IMM6:
cd3cde86 754 if (op1.reloc.exp.X_add_number & ~0x3f)
e135f41b 755 {
20203fb9 756 op1.error = _("6-bit immediate out of range");
e135f41b
NC
757 break;
758 }
759 break;
760 case PDP11_OPCODE_IMM8:
cd3cde86 761 if (op1.reloc.exp.X_add_number & ~0xff)
e135f41b 762 {
20203fb9 763 op1.error = _("8-bit immediate out of range");
e135f41b
NC
764 break;
765 }
766 break;
767 }
cd3cde86 768 insn.code |= op1.reloc.exp.X_add_number;
e135f41b
NC
769 break;
770
771 case PDP11_OPCODE_DISPL:
772 {
d3ce72d0
NC
773 char *new_pointer;
774 new_pointer = parse_expression (str, &op1);
e135f41b
NC
775 op1.code = 0;
776 op1.reloc.pc_rel = 1;
777 op1.reloc.type = BFD_RELOC_PDP11_DISP_8_PCREL;
778 if (op1.reloc.exp.X_op != O_symbol)
779 {
20203fb9 780 op1.error = _("Symbol expected");
e135f41b
NC
781 break;
782 }
783 if (op1.code & ~0xff)
784 {
20203fb9 785 err = _("8-bit displacement out of range");
e135f41b
NC
786 break;
787 }
d3ce72d0 788 str = new_pointer;
e135f41b
NC
789 insn.code |= op1.code;
790 insn.reloc = op1.reloc;
791 }
792 break;
793
794 case PDP11_OPCODE_REG:
795 str = parse_reg (str, &op1);
796 if (op1.error)
797 break;
798 insn.code |= op1.code;
799 break;
800
801 case PDP11_OPCODE_OP:
802 str = parse_op (str, &op1);
803 if (op1.error)
804 break;
805 insn.code |= op1.code;
806 if (op1.additional)
807 size += 2;
808 break;
809
cd3cde86
AM
810 case PDP11_OPCODE_FOP:
811 str = parse_fop (str, &op1);
812 if (op1.error)
813 break;
814 insn.code |= op1.code;
815 if (op1.additional)
816 size += 2;
817 break;
818
e135f41b
NC
819 case PDP11_OPCODE_REG_OP:
820 str = parse_reg (str, &op2);
821 if (op2.error)
822 break;
823 insn.code |= op2.code << 6;
824 str = parse_separator (str, &error);
825 if (error)
826 {
20203fb9 827 op2.error = _("Missing ','");
e135f41b
NC
828 break;
829 }
830 str = parse_op (str, &op1);
831 if (op1.error)
832 break;
833 insn.code |= op1.code;
834 if (op1.additional)
835 size += 2;
836 break;
837
838 case PDP11_OPCODE_REG_OP_REV:
839 str = parse_op (str, &op1);
840 if (op1.error)
841 break;
842 insn.code |= op1.code;
843 if (op1.additional)
844 size += 2;
845 str = parse_separator (str, &error);
846 if (error)
847 {
20203fb9 848 op2.error = _("Missing ','");
e135f41b
NC
849 break;
850 }
851 str = parse_reg (str, &op2);
852 if (op2.error)
853 break;
854 insn.code |= op2.code << 6;
855 break;
856
cd3cde86
AM
857 case PDP11_OPCODE_AC_FOP:
858 str = parse_ac (str, &op2);
859 if (op2.error)
860 break;
861 insn.code |= op2.code << 6;
862 str = parse_separator (str, &error);
863 if (error)
864 {
20203fb9 865 op1.error = _("Missing ','");
cd3cde86
AM
866 break;
867 }
868 str = parse_fop (str, &op1);
869 if (op1.error)
870 break;
871 insn.code |= op1.code;
872 if (op1.additional)
873 size += 2;
874 break;
875
876 case PDP11_OPCODE_FOP_AC:
877 str = parse_fop (str, &op1);
878 if (op1.error)
879 break;
880 insn.code |= op1.code;
881 if (op1.additional)
882 size += 2;
883 str = parse_separator (str, &error);
884 if (error)
885 {
20203fb9 886 op1.error = _("Missing ','");
cd3cde86
AM
887 break;
888 }
889 str = parse_ac (str, &op2);
890 if (op2.error)
891 break;
892 insn.code |= op2.code << 6;
893 break;
894
e135f41b
NC
895 case PDP11_OPCODE_AC_OP:
896 str = parse_ac (str, &op2);
897 if (op2.error)
898 break;
899 insn.code |= op2.code << 6;
900 str = parse_separator (str, &error);
901 if (error)
902 {
20203fb9 903 op1.error = _("Missing ','");
e135f41b
NC
904 break;
905 }
906 str = parse_op (str, &op1);
907 if (op1.error)
908 break;
909 insn.code |= op1.code;
910 if (op1.additional)
911 size += 2;
912 break;
913
cd3cde86
AM
914 case PDP11_OPCODE_OP_AC:
915 str = parse_op (str, &op1);
916 if (op1.error)
917 break;
918 insn.code |= op1.code;
919 if (op1.additional)
920 size += 2;
921 str = parse_separator (str, &error);
922 if (error)
923 {
20203fb9 924 op1.error = _("Missing ','");
cd3cde86
AM
925 break;
926 }
927 str = parse_ac (str, &op2);
928 if (op2.error)
929 break;
930 insn.code |= op2.code << 6;
931 break;
932
e135f41b
NC
933 case PDP11_OPCODE_OP_OP:
934 str = parse_op (str, &op1);
935 if (op1.error)
936 break;
937 insn.code |= op1.code << 6;
938 if (op1.additional)
939 size += 2;
940 str = parse_separator (str, &error);
941 if (error)
942 {
20203fb9 943 op2.error = _("Missing ','");
e135f41b
NC
944 break;
945 }
946 str = parse_op (str, &op2);
947 if (op2.error)
948 break;
949 insn.code |= op2.code;
950 if (op2.additional)
951 size += 2;
952 break;
953
954 case PDP11_OPCODE_REG_DISPL:
955 {
d3ce72d0 956 char *new_pointer;
e135f41b
NC
957 str = parse_reg (str, &op2);
958 if (op2.error)
959 break;
960 insn.code |= op2.code << 6;
961 str = parse_separator (str, &error);
962 if (error)
963 {
20203fb9 964 op1.error = _("Missing ','");
e135f41b
NC
965 break;
966 }
d3ce72d0 967 new_pointer = parse_expression (str, &op1);
e135f41b
NC
968 op1.code = 0;
969 op1.reloc.pc_rel = 1;
970 op1.reloc.type = BFD_RELOC_PDP11_DISP_6_PCREL;
971 if (op1.reloc.exp.X_op != O_symbol)
972 {
20203fb9 973 op1.error = _("Symbol expected");
e135f41b
NC
974 break;
975 }
976 if (op1.code & ~0x3f)
977 {
20203fb9 978 err = _("6-bit displacement out of range");
e135f41b
NC
979 break;
980 }
d3ce72d0 981 str = new_pointer;
e135f41b
NC
982 insn.code |= op1.code;
983 insn.reloc = op1.reloc;
984 }
985 break;
5cd4edbe 986
e135f41b
NC
987 default:
988 BAD_CASE (op->type);
989 }
990
991 if (op1.error)
992 err = op1.error;
993 else if (op2.error)
994 err = op2.error;
995 else
996 {
997 str = skip_whitespace (str);
998 if (*str)
20203fb9 999 err = _("Too many operands");
e135f41b
NC
1000 }
1001
1002 {
1003 char *to = NULL;
5cd4edbe 1004
e135f41b
NC
1005 if (err)
1006 {
20203fb9 1007 as_bad ("%s", err);
e135f41b
NC
1008 return;
1009 }
1010
1011 to = frag_more (size);
1012
1013 md_number_to_chars (to, insn.code, 2);
1014 if (insn.reloc.type != BFD_RELOC_NONE)
1015 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1016 &insn.reloc.exp, insn.reloc.pc_rel, insn.reloc.type);
1017 to += 2;
1018
1019 if (op1.additional)
1020 {
1021 md_number_to_chars (to, op1.word, 2);
1022 if (op1.reloc.type != BFD_RELOC_NONE)
1023 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1024 &op1.reloc.exp, op1.reloc.pc_rel, op1.reloc.type);
1025 to += 2;
1026 }
1027
1028 if (op2.additional)
1029 {
1030 md_number_to_chars (to, op2.word, 2);
1031 if (op2.reloc.type != BFD_RELOC_NONE)
1032 fix_new_exp (frag_now, to - frag_now->fr_literal, 2,
1033 &op2.reloc.exp, op2.reloc.pc_rel, op2.reloc.type);
1034 }
1035 }
1036}
1037
1038int
4d5f9b2a
NC
1039md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
1040 segT segment ATTRIBUTE_UNUSED)
e135f41b
NC
1041{
1042 return 0;
1043}
1044
1045void
4d5f9b2a
NC
1046md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
1047 segT seg ATTRIBUTE_UNUSED,
1048 fragS *fragP ATTRIBUTE_UNUSED)
e135f41b
NC
1049{
1050}
1051
2b4f075a
HPN
1052int md_short_jump_size = 2;
1053int md_long_jump_size = 4;
e135f41b
NC
1054
1055void
4d5f9b2a
NC
1056md_create_short_jump (char *ptr ATTRIBUTE_UNUSED,
1057 addressT from_addr ATTRIBUTE_UNUSED,
1058 addressT to_addr ATTRIBUTE_UNUSED,
1059 fragS *frag ATTRIBUTE_UNUSED,
1060 symbolS *to_symbol ATTRIBUTE_UNUSED)
e135f41b
NC
1061{
1062}
1063
1064void
4d5f9b2a
NC
1065md_create_long_jump (char *ptr ATTRIBUTE_UNUSED,
1066 addressT from_addr ATTRIBUTE_UNUSED,
1067 addressT to_addr ATTRIBUTE_UNUSED,
1068 fragS *frag ATTRIBUTE_UNUSED,
1069 symbolS *to_symbol ATTRIBUTE_UNUSED)
e135f41b
NC
1070{
1071}
1072
1073static int
17b9d67d 1074set_cpu_model (const char *arg)
e135f41b
NC
1075{
1076 char buf[4];
1077 char *model = buf;
1078
1079 if (arg[0] == 'k')
1080 arg++;
1081
1082 *model++ = *arg++;
1083
1084 if (strchr ("abdx", model[-1]) == NULL)
1085 return 0;
1086
1087 if (model[-1] == 'd')
1088 {
4d5f9b2a 1089 if (arg[0] == 'f' || arg[0] == 'j')
e135f41b
NC
1090 model[-1] = *arg++;
1091 }
1092 else if (model[-1] == 'x')
1093 {
1094 if (arg[0] == 't')
1095 model[-1] = *arg++;
1096 }
1097
1098 if (arg[0] == '-')
1099 arg++;
1100
1101 if (strncmp (arg, "11", 2) != 0)
1102 return 0;
1103 arg += 2;
1104
1105 if (arg[0] == '-')
1106 {
1107 if (*++arg == 0)
1108 return 0;
1109 }
1110
4d5f9b2a 1111 /* Allow up to two revision letters. */
e135f41b
NC
1112 if (arg[0] != 0)
1113 *model++ = *arg++;
1114 if (arg[0] != 0)
1115 *model++ = *arg++;
1116
1117 *model++ = 0;
1118
1119 set_option ("no-extensions");
1120
4d5f9b2a
NC
1121 /* KA11 (11/15/20). */
1122 if (strncmp (buf, "a", 1) == 0)
1123 return 1; /* No extensions. */
e135f41b 1124
4d5f9b2a
NC
1125 /* KB11 (11/45/50/55/70). */
1126 else if (strncmp (buf, "b", 1) == 0)
1127 return set_option ("eis") && set_option ("spl");
e135f41b 1128
4d5f9b2a
NC
1129 /* KD11-A (11/35/40). */
1130 else if (strncmp (buf, "da", 2) == 0)
e135f41b
NC
1131 return set_option ("limited-eis");
1132
4d5f9b2a
NC
1133 /* KD11-B (11/05/10). */
1134 else if (strncmp (buf, "db", 2) == 0
1135 /* KD11-D (11/04). */
1136 || strncmp (buf, "dd", 2) == 0)
e135f41b
NC
1137 return 1; /* no extensions */
1138
4d5f9b2a
NC
1139 /* KD11-E (11/34). */
1140 else if (strncmp (buf, "de", 2) == 0)
1141 return set_option ("eis") && set_option ("mxps");
1142
1143 /* KD11-F (11/03). */
1144 else if (strncmp (buf, "df", 2) == 0
1145 /* KD11-H (11/03). */
1146 || strncmp (buf, "dh", 2) == 0
1147 /* KD11-Q (11/03). */
1148 || strncmp (buf, "dq", 2) == 0)
1149 return set_option ("limited-eis") && set_option ("mxps");
1150
1151 /* KD11-K (11/60). */
1152 else if (strncmp (buf, "dk", 2) == 0)
1153 return set_option ("eis")
1154 && set_option ("mxps")
1155 && set_option ("ucode");
1156
1157 /* KD11-Z (11/44). */
1158 else if (strncmp (buf, "dz", 2) == 0)
1159 return set_option ("csm")
1160 && set_option ("eis")
1161 && set_option ("mfpt")
1162 && set_option ("mxps")
1163 && set_option ("spl");
1164
1165 /* F11 (11/23/24). */
1166 else if (strncmp (buf, "f", 1) == 0)
1167 return set_option ("eis")
1168 && set_option ("mfpt")
1169 && set_option ("mxps");
1170
1171 /* J11 (11/53/73/83/84/93/94). */
1172 else if (strncmp (buf, "j", 1) == 0)
1173 return set_option ("csm")
1174 && set_option ("eis")
1175 && set_option ("mfpt")
1176 && set_option ("multiproc")
1177 && set_option ("mxps")
1178 && set_option ("spl");
1179
1180 /* T11 (11/21). */
1181 else if (strncmp (buf, "t", 1) == 0)
1182 return set_option ("limited-eis")
1183 && set_option ("mxps");
e135f41b
NC
1184
1185 else
1186 return 0;
1187}
1188
1189static int
17b9d67d 1190set_machine_model (const char *arg)
e135f41b 1191{
4d5f9b2a
NC
1192 if (strncmp (arg, "pdp-11/", 7) != 0
1193 && strncmp (arg, "pdp11/", 6) != 0
1194 && strncmp (arg, "11/", 3) != 0)
e135f41b
NC
1195 return 0;
1196
1197 if (strncmp (arg, "pdp", 3) == 0)
1198 arg += 3;
1199 if (arg[0] == '-')
1200 arg++;
1201 if (strncmp (arg, "11/", 3) == 0)
1202 arg += 3;
1203
4d5f9b2a
NC
1204 if (strcmp (arg, "03") == 0)
1205 return set_cpu_model ("kd11f");
1206
1207 else if (strcmp (arg, "04") == 0)
1208 return set_cpu_model ("kd11d");
e135f41b 1209
4d5f9b2a
NC
1210 else if (strcmp (arg, "05") == 0
1211 || strcmp (arg, "10") == 0)
1212 return set_cpu_model ("kd11b");
e135f41b 1213
4d5f9b2a
NC
1214 else if (strcmp (arg, "15") == 0
1215 || strcmp (arg, "20") == 0)
1216 return set_cpu_model ("ka11");
e135f41b 1217
4d5f9b2a
NC
1218 else if (strcmp (arg, "21") == 0)
1219 return set_cpu_model ("t11");
e135f41b 1220
4d5f9b2a
NC
1221 else if (strcmp (arg, "23") == 0
1222 || strcmp (arg, "24") == 0)
1223 return set_cpu_model ("f11");
e135f41b 1224
4d5f9b2a
NC
1225 else if (strcmp (arg, "34") == 0
1226 || strcmp (arg, "34a") == 0)
1227 return set_cpu_model ("kd11e");
e135f41b 1228
4d5f9b2a
NC
1229 else if (strcmp (arg, "35") == 0
1230 || strcmp (arg, "40") == 0)
1231 return set_cpu_model ("kd11da");
e135f41b 1232
4d5f9b2a
NC
1233 else if (strcmp (arg, "44") == 0)
1234 return set_cpu_model ("kd11dz");
e135f41b 1235
4d5f9b2a
NC
1236 else if (strcmp (arg, "45") == 0
1237 || strcmp (arg, "50") == 0
1238 || strcmp (arg, "55") == 0
1239 || strcmp (arg, "70") == 0)
1240 return set_cpu_model ("kb11");
e135f41b 1241
4d5f9b2a
NC
1242 else if (strcmp (arg, "60") == 0)
1243 return set_cpu_model ("kd11k");
e135f41b 1244
4d5f9b2a
NC
1245 else if (strcmp (arg, "53") == 0
1246 || strcmp (arg, "73") == 0
1247 || strcmp (arg, "83") == 0
1248 || strcmp (arg, "84") == 0
1249 || strcmp (arg, "93") == 0
1250 || strcmp (arg, "94") == 0)
1251 return set_cpu_model ("j11")
1252 && set_option ("fpp");
e135f41b 1253
e135f41b
NC
1254 else
1255 return 0;
1256}
1257
5a38dc70 1258const char *md_shortopts = "m:";
e135f41b
NC
1259
1260struct option md_longopts[] =
1261{
1262#define OPTION_CPU 257
1263 { "cpu", required_argument, NULL, OPTION_CPU },
1264#define OPTION_MACHINE 258
1265 { "machine", required_argument, NULL, OPTION_MACHINE },
1266#define OPTION_PIC 259
1267 { "pic", no_argument, NULL, OPTION_PIC },
1268 { NULL, no_argument, NULL, 0 }
1269};
1270
07726851 1271size_t md_longopts_size = sizeof (md_longopts);
e135f41b 1272
4d5f9b2a
NC
1273/* Invocation line includes a switch not recognized by the base assembler.
1274 See if it's a processor-specific option. */
e135f41b
NC
1275
1276int
17b9d67d 1277md_parse_option (int c, const char *arg)
e135f41b
NC
1278{
1279 init_defaults ();
1280
1281 switch (c)
1282 {
1283 case 'm':
1284 if (set_option (arg))
1285 return 1;
1286 if (set_cpu_model (arg))
1287 return 1;
1288 if (set_machine_model (arg))
1289 return 1;
1290 break;
1291
1292 case OPTION_CPU:
1293 if (set_cpu_model (arg))
1294 return 1;
1295 break;
1296
1297 case OPTION_MACHINE:
1298 if (set_machine_model (arg))
1299 return 1;
1300 break;
1301
1302 case OPTION_PIC:
1303 if (set_option ("pic"))
1304 return 1;
1305 break;
1306
1307 default:
1308 break;
1309 }
1310
e135f41b
NC
1311 return 0;
1312}
1313
e135f41b 1314void
4d5f9b2a 1315md_show_usage (FILE *stream)
e135f41b
NC
1316{
1317 fprintf (stream, "\
1318\n\
2b0f3761 1319PDP-11 instruction set extensions:\n\
e135f41b 1320\n\
33eaf5de 1321-m(no-)cis allow (disallow) commercial instruction set\n\
e135f41b
NC
1322-m(no-)csm allow (disallow) CSM instruction\n\
1323-m(no-)eis allow (disallow) full extended instruction set\n\
1324-m(no-)fis allow (disallow) KEV11 floating-point instructions\n\
1325-m(no-)fpp allow (disallow) FP-11 floating-point instructions\n\
1326-m(no-)fpu allow (disallow) FP-11 floating-point instructions\n\
1327-m(no-)limited-eis allow (disallow) limited extended instruction set\n\
1328-m(no-)mfpt allow (disallow) processor type instruction\n\
1329-m(no-)multiproc allow (disallow) multiprocessor instructions\n\
1330-m(no-)mxps allow (disallow) processor status instructions\n\
1331-m(no-)spl allow (disallow) SPL instruction\n\
1332-m(no-)ucode allow (disallow) microcode instructions\n\
1333-mall-extensions allow all instruction set extensions\n\
1334 (this is the default)\n\
33eaf5de
NC
1335-mno-extensions disallow all instruction set extensions\n\
1336-pic generate position-independent code\n\
e135f41b
NC
1337\n\
1338PDP-11 CPU model options:\n\
1339\n\
1340-mka11* KA11 CPU. base line instruction set only\n\
1341-mkb11* KB11 CPU. enable full EIS and SPL\n\
1342-mkd11a* KD11-A CPU. enable limited EIS\n\
1343-mkd11b* KD11-B CPU. base line instruction set only\n\
1344-mkd11d* KD11-D CPU. base line instruction set only\n\
1345-mkd11e* KD11-E CPU. enable full EIS, MTPS, and MFPS\n\
1346-mkd11f* KD11-F CPU. enable limited EIS, MTPS, and MFPS\n\
1347-mkd11h* KD11-H CPU. enable limited EIS, MTPS, and MFPS\n\
1348-mkd11q* KD11-Q CPU. enable limited EIS, MTPS, and MFPS\n\
1349-mkd11k* KD11-K CPU. enable full EIS, MTPS, MFPS, LDUB, MED,\n\
1350 XFC, and MFPT\n\
1351-mkd11z* KD11-Z CPU. enable full EIS, MTPS, MFPS, MFPT, SPL,\n\
1352 and CSM\n\
1353-mf11* F11 CPU. enable full EIS, MFPS, MTPS, and MFPT\n\
1354-mj11* J11 CPU. enable full EIS, MTPS, MFPS, MFPT, SPL,\n\
1355 CSM, TSTSET, and WRTLCK\n\
1356-mt11* T11 CPU. enable limited EIS, MTPS, and MFPS\n\
1357\n\
1358PDP-11 machine model options:\n\
1359\n\
1360-m11/03 same as -mkd11f\n\
1361-m11/04 same as -mkd11d\n\
1362-m11/05 same as -mkd11b\n\
1363-m11/10 same as -mkd11b\n\
1364-m11/15 same as -mka11\n\
1365-m11/20 same as -mka11\n\
1366-m11/21 same as -mt11\n\
1367-m11/23 same as -mf11\n\
1368-m11/24 same as -mf11\n\
1369-m11/34 same as -mkd11e\n\
1370-m11/34a same as -mkd11e -mfpp\n\
1371-m11/35 same as -mkd11a\n\
1372-m11/40 same as -mkd11a\n\
1373-m11/44 same as -mkd11z\n\
1374-m11/45 same as -mkb11\n\
1375-m11/50 same as -mkb11\n\
1376-m11/53 same as -mj11\n\
1377-m11/55 same as -mkb11\n\
1378-m11/60 same as -mkd11k\n\
1379-m11/70 same as -mkb11\n\
1380-m11/73 same as -mj11\n\
1381-m11/83 same as -mj11\n\
1382-m11/84 same as -mj11\n\
1383-m11/93 same as -mj11\n\
1384-m11/94 same as -mj11\n\
1385");
1386}
1387
1388symbolS *
4d5f9b2a 1389md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
e135f41b
NC
1390{
1391 return 0;
1392}
1393
1394valueT
4d5f9b2a
NC
1395md_section_align (segT segment ATTRIBUTE_UNUSED,
1396 valueT size)
e135f41b
NC
1397{
1398 return (size + 1) & ~1;
1399}
1400
1401long
4d5f9b2a 1402md_pcrel_from (fixS *fixP)
e135f41b
NC
1403{
1404 return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size;
1405}
1406
1407/* Translate internal representation of relocation info to BFD target
1408 format. */
4d5f9b2a 1409
e135f41b 1410arelent *
4d5f9b2a
NC
1411tc_gen_reloc (asection *section ATTRIBUTE_UNUSED,
1412 fixS *fixp)
e135f41b
NC
1413{
1414 arelent *reloc;
1415 bfd_reloc_code_real_type code;
1416
325801bd 1417 reloc = XNEW (arelent);
e135f41b 1418
325801bd 1419 reloc->sym_ptr_ptr = XNEW (asymbol *);
e135f41b
NC
1420 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1421 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1422
55cf6793 1423 /* This is taken account for in md_apply_fix(). */
e135f41b
NC
1424 reloc->addend = -symbol_get_bfdsym (fixp->fx_addsy)->section->vma;
1425
10a95fcc
AM
1426 code = fixp->fx_r_type;
1427 if (fixp->fx_pcrel)
e135f41b 1428 {
10a95fcc
AM
1429 switch (code)
1430 {
1431 case BFD_RELOC_16:
1432 code = BFD_RELOC_16_PCREL;
1433 break;
e135f41b 1434
10a95fcc
AM
1435 case BFD_RELOC_16_PCREL:
1436 break;
e135f41b 1437
10a95fcc
AM
1438 default:
1439 BAD_CASE (code);
1440 return NULL;
1441 }
e135f41b
NC
1442 }
1443
1444 reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
1445
1446 if (reloc->howto == NULL)
1447 {
1448 as_bad_where (fixp->fx_file, fixp->fx_line,
20203fb9 1449 _("Can not represent %s relocation in this object file format"),
e135f41b
NC
1450 bfd_get_reloc_code_name (code));
1451 return NULL;
1452 }
1453
1454 return reloc;
1455}
1456
1457void
4d5f9b2a 1458pseudo_bss (int c ATTRIBUTE_UNUSED)
e135f41b
NC
1459{
1460 int temp;
1461
1462 temp = get_absolute_expression ();
1463 subseg_set (bss_section, temp);
1464 demand_empty_rest_of_line ();
1465}
1466
1467void
4d5f9b2a 1468pseudo_even (int c ATTRIBUTE_UNUSED)
e135f41b
NC
1469{
1470 int alignment = 1; /* 2^1 */
1471 frag_align (alignment, 0, 1);
1472 record_alignment (now_seg, alignment);
1473}
499ac353 1474
6d4af3c2 1475const char *
499ac353
NC
1476md_atof (int type, char * litP, int * sizeP)
1477{
1478 return vax_md_atof (type, litP, sizeP);
1479}