]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/config/tc-ppc.c
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
binutils/
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
ed84b57b 3 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
066be9f7
PB		 361
362 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
363 { "f.33", 33 },
364 { "f.34", 34 },
365 { "f.35", 35 },
366 { "f.36", 36 },
367 { "f.37", 37 },
368 { "f.38", 38 },
369 { "f.39", 39 },
81d4177b 370 { "f.4", 4 },
066be9f7
PB		 371 { "f.40", 40 },
372 { "f.41", 41 },
373 { "f.42", 42 },
374 { "f.43", 43 },
375 { "f.44", 44 },
376 { "f.45", 45 },
377 { "f.46", 46 },
378 { "f.47", 47 },
379 { "f.48", 48 },
380 { "f.49", 49 },
81d4177b 381 { "f.5", 5 },
066be9f7
PB		 382 { "f.50", 50 },
383 { "f.51", 51 },
384 { "f.52", 52 },
385 { "f.53", 53 },
386 { "f.54", 54 },
387 { "f.55", 55 },
388 { "f.56", 56 },
389 { "f.57", 57 },
390 { "f.58", 58 },
391 { "f.59", 59 },
81d4177b 392 { "f.6", 6 },
066be9f7
PB		 393 { "f.60", 60 },
394 { "f.61", 61 },
395 { "f.62", 62 },
396 { "f.63", 63 },
81d4177b
KH		 397 { "f.7", 7 },
398 { "f.8", 8 },
399 { "f.9", 9 },
400
401 { "f0", 0 },
402 { "f1", 1 },
403 { "f10", 10 },
404 { "f11", 11 },
405 { "f12", 12 },
406 { "f13", 13 },
407 { "f14", 14 },
408 { "f15", 15 },
409 { "f16", 16 },
410 { "f17", 17 },
411 { "f18", 18 },
412 { "f19", 19 },
413 { "f2", 2 },
414 { "f20", 20 },
415 { "f21", 21 },
416 { "f22", 22 },
417 { "f23", 23 },
418 { "f24", 24 },
419 { "f25", 25 },
420 { "f26", 26 },
421 { "f27", 27 },
422 { "f28", 28 },
423 { "f29", 29 },
424 { "f3", 3 },
252b5132
RH		 425 { "f30", 30 },
426 { "f31", 31 },
066be9f7
PB		 427
428 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
429 { "f33", 33 },
430 { "f34", 34 },
431 { "f35", 35 },
432 { "f36", 36 },
433 { "f37", 37 },
434 { "f38", 38 },
435 { "f39", 39 },
81d4177b 436 { "f4", 4 },
066be9f7
PB		 437 { "f40", 40 },
438 { "f41", 41 },
439 { "f42", 42 },
440 { "f43", 43 },
441 { "f44", 44 },
442 { "f45", 45 },
443 { "f46", 46 },
444 { "f47", 47 },
445 { "f48", 48 },
446 { "f49", 49 },
81d4177b 447 { "f5", 5 },
066be9f7
PB		 448 { "f50", 50 },
449 { "f51", 51 },
450 { "f52", 52 },
451 { "f53", 53 },
452 { "f54", 54 },
453 { "f55", 55 },
454 { "f56", 56 },
455 { "f57", 57 },
456 { "f58", 58 },
457 { "f59", 59 },
81d4177b 458 { "f6", 6 },
066be9f7
PB		 459 { "f60", 60 },
460 { "f61", 61 },
461 { "f62", 62 },
462 { "f63", 63 },
81d4177b
KH		 463 { "f7", 7 },
464 { "f8", 8 },
465 { "f9", 9 },
252b5132
RH		 466
467 { "fpscr", 0 },
468
c3d65c1c
BE		 469 /* Quantization registers used with pair single instructions. */
470 { "gqr.0", 0 },
471 { "gqr.1", 1 },
472 { "gqr.2", 2 },
473 { "gqr.3", 3 },
474 { "gqr.4", 4 },
475 { "gqr.5", 5 },
476 { "gqr.6", 6 },
477 { "gqr.7", 7 },
478 { "gqr0", 0 },
479 { "gqr1", 1 },
480 { "gqr2", 2 },
481 { "gqr3", 3 },
482 { "gqr4", 4 },
483 { "gqr5", 5 },
484 { "gqr6", 6 },
485 { "gqr7", 7 },
486
252b5132
RH		 487 { "lr", 8 }, /* Link Register */
488
489 { "pmr", 0 },
490
491 { "r.0", 0 }, /* General Purpose Registers */
492 { "r.1", 1 },
493 { "r.10", 10 },
494 { "r.11", 11 },
495 { "r.12", 12 },
496 { "r.13", 13 },
497 { "r.14", 14 },
498 { "r.15", 15 },
499 { "r.16", 16 },
500 { "r.17", 17 },
501 { "r.18", 18 },
502 { "r.19", 19 },
503 { "r.2", 2 },
504 { "r.20", 20 },
505 { "r.21", 21 },
506 { "r.22", 22 },
507 { "r.23", 23 },
508 { "r.24", 24 },
509 { "r.25", 25 },
510 { "r.26", 26 },
511 { "r.27", 27 },
512 { "r.28", 28 },
513 { "r.29", 29 },
514 { "r.3", 3 },
515 { "r.30", 30 },
516 { "r.31", 31 },
517 { "r.4", 4 },
518 { "r.5", 5 },
519 { "r.6", 6 },
520 { "r.7", 7 },
521 { "r.8", 8 },
522 { "r.9", 9 },
523
524 { "r.sp", 1 }, /* Stack Pointer */
525
526 { "r.toc", 2 }, /* Pointer to the table of contents */
527
528 { "r0", 0 }, /* More general purpose registers */
529 { "r1", 1 },
530 { "r10", 10 },
531 { "r11", 11 },
532 { "r12", 12 },
533 { "r13", 13 },
534 { "r14", 14 },
535 { "r15", 15 },
536 { "r16", 16 },
537 { "r17", 17 },
538 { "r18", 18 },
539 { "r19", 19 },
540 { "r2", 2 },
541 { "r20", 20 },
542 { "r21", 21 },
543 { "r22", 22 },
544 { "r23", 23 },
545 { "r24", 24 },
546 { "r25", 25 },
547 { "r26", 26 },
548 { "r27", 27 },
549 { "r28", 28 },
550 { "r29", 29 },
551 { "r3", 3 },
552 { "r30", 30 },
553 { "r31", 31 },
554 { "r4", 4 },
555 { "r5", 5 },
556 { "r6", 6 },
557 { "r7", 7 },
558 { "r8", 8 },
559 { "r9", 9 },
560
561 { "rtoc", 2 }, /* Table of contents */
562
563 { "sdr1", 25 }, /* Storage Description Register 1 */
564
565 { "sp", 1 },
566
567 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
568 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 569
066be9f7 570 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 571 { "v.1", 1 },
572 { "v.10", 10 },
573 { "v.11", 11 },
574 { "v.12", 12 },
575 { "v.13", 13 },
576 { "v.14", 14 },
577 { "v.15", 15 },
578 { "v.16", 16 },
579 { "v.17", 17 },
580 { "v.18", 18 },
581 { "v.19", 19 },
582 { "v.2", 2 },
583 { "v.20", 20 },
584 { "v.21", 21 },
585 { "v.22", 22 },
586 { "v.23", 23 },
587 { "v.24", 24 },
588 { "v.25", 25 },
589 { "v.26", 26 },
590 { "v.27", 27 },
591 { "v.28", 28 },
592 { "v.29", 29 },
593 { "v.3", 3 },
7a899fff
C		 594 { "v.30", 30 },
595 { "v.31", 31 },
81d4177b
KH		 596 { "v.4", 4 },
597 { "v.5", 5 },
598 { "v.6", 6 },
599 { "v.7", 7 },
600 { "v.8", 8 },
601 { "v.9", 9 },
7a899fff
C		 602
603 { "v0", 0 },
81d4177b
KH		 604 { "v1", 1 },
605 { "v10", 10 },
606 { "v11", 11 },
607 { "v12", 12 },
608 { "v13", 13 },
609 { "v14", 14 },
610 { "v15", 15 },
611 { "v16", 16 },
612 { "v17", 17 },
613 { "v18", 18 },
614 { "v19", 19 },
615 { "v2", 2 },
616 { "v20", 20 },
617 { "v21", 21 },
618 { "v22", 22 },
619 { "v23", 23 },
620 { "v24", 24 },
621 { "v25", 25 },
622 { "v26", 26 },
623 { "v27", 27 },
624 { "v28", 28 },
625 { "v29", 29 },
626 { "v3", 3 },
7a899fff
C		 627 { "v30", 30 },
628 { "v31", 31 },
81d4177b
KH		 629 { "v4", 4 },
630 { "v5", 5 },
631 { "v6", 6 },
632 { "v7", 7 },
633 { "v8", 8 },
7a899fff 634 { "v9", 9 },
252b5132 635
066be9f7
PB		 636 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
637 { "vs.1", 1 },
638 { "vs.10", 10 },
639 { "vs.11", 11 },
640 { "vs.12", 12 },
641 { "vs.13", 13 },
642 { "vs.14", 14 },
643 { "vs.15", 15 },
644 { "vs.16", 16 },
645 { "vs.17", 17 },
646 { "vs.18", 18 },
647 { "vs.19", 19 },
648 { "vs.2", 2 },
649 { "vs.20", 20 },
650 { "vs.21", 21 },
651 { "vs.22", 22 },
652 { "vs.23", 23 },
653 { "vs.24", 24 },
654 { "vs.25", 25 },
655 { "vs.26", 26 },
656 { "vs.27", 27 },
657 { "vs.28", 28 },
658 { "vs.29", 29 },
659 { "vs.3", 3 },
660 { "vs.30", 30 },
661 { "vs.31", 31 },
662 { "vs.32", 32 },
663 { "vs.33", 33 },
664 { "vs.34", 34 },
665 { "vs.35", 35 },
666 { "vs.36", 36 },
667 { "vs.37", 37 },
668 { "vs.38", 38 },
669 { "vs.39", 39 },
670 { "vs.4", 4 },
671 { "vs.40", 40 },
672 { "vs.41", 41 },
673 { "vs.42", 42 },
674 { "vs.43", 43 },
675 { "vs.44", 44 },
676 { "vs.45", 45 },
677 { "vs.46", 46 },
678 { "vs.47", 47 },
679 { "vs.48", 48 },
680 { "vs.49", 49 },
681 { "vs.5", 5 },
682 { "vs.50", 50 },
683 { "vs.51", 51 },
684 { "vs.52", 52 },
685 { "vs.53", 53 },
686 { "vs.54", 54 },
687 { "vs.55", 55 },
688 { "vs.56", 56 },
689 { "vs.57", 57 },
690 { "vs.58", 58 },
691 { "vs.59", 59 },
692 { "vs.6", 6 },
693 { "vs.60", 60 },
694 { "vs.61", 61 },
695 { "vs.62", 62 },
696 { "vs.63", 63 },
697 { "vs.7", 7 },
698 { "vs.8", 8 },
699 { "vs.9", 9 },
700
701 { "vs0", 0 },
702 { "vs1", 1 },
703 { "vs10", 10 },
704 { "vs11", 11 },
705 { "vs12", 12 },
706 { "vs13", 13 },
707 { "vs14", 14 },
708 { "vs15", 15 },
709 { "vs16", 16 },
710 { "vs17", 17 },
711 { "vs18", 18 },
712 { "vs19", 19 },
713 { "vs2", 2 },
714 { "vs20", 20 },
715 { "vs21", 21 },
716 { "vs22", 22 },
717 { "vs23", 23 },
718 { "vs24", 24 },
719 { "vs25", 25 },
720 { "vs26", 26 },
721 { "vs27", 27 },
722 { "vs28", 28 },
723 { "vs29", 29 },
724 { "vs3", 3 },
725 { "vs30", 30 },
726 { "vs31", 31 },
727 { "vs32", 32 },
728 { "vs33", 33 },
729 { "vs34", 34 },
730 { "vs35", 35 },
731 { "vs36", 36 },
732 { "vs37", 37 },
733 { "vs38", 38 },
734 { "vs39", 39 },
735 { "vs4", 4 },
736 { "vs40", 40 },
737 { "vs41", 41 },
738 { "vs42", 42 },
739 { "vs43", 43 },
740 { "vs44", 44 },
741 { "vs45", 45 },
742 { "vs46", 46 },
743 { "vs47", 47 },
744 { "vs48", 48 },
745 { "vs49", 49 },
746 { "vs5", 5 },
747 { "vs50", 50 },
748 { "vs51", 51 },
749 { "vs52", 52 },
750 { "vs53", 53 },
751 { "vs54", 54 },
752 { "vs55", 55 },
753 { "vs56", 56 },
754 { "vs57", 57 },
755 { "vs58", 58 },
756 { "vs59", 59 },
757 { "vs6", 6 },
758 { "vs60", 60 },
759 { "vs61", 61 },
760 { "vs62", 62 },
761 { "vs63", 63 },
762 { "vs7", 7 },
763 { "vs8", 8 },
764 { "vs9", 9 },
765
252b5132
RH		 766 { "xer", 1 },
767
768};
769
bc805888 770#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 771
772/* Given NAME, find the register number associated with that name, return
773 the integer value associated with the given name or -1 on failure. */
774
252b5132 775static int
98027b10 776reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 777{
778 int middle, low, high;
779 int cmp;
780
781 low = 0;
782 high = regcount - 1;
783
784 do
785 {
786 middle = (low + high) / 2;
787 cmp = strcasecmp (name, regs[middle].name);
788 if (cmp < 0)
789 high = middle - 1;
790 else if (cmp > 0)
791 low = middle + 1;
792 else
793 return regs[middle].value;
794 }
795 while (low <= high);
796
797 return -1;
798}
799
800/*
99a814a1 801 * Summary of register_name.
252b5132
RH		 802 *
803 * in: Input_line_pointer points to 1st char of operand.
804 *
805 * out: A expressionS.
806 * The operand may have been a register: in this case, X_op == O_register,
807 * X_add_number is set to the register number, and truth is returned.
808 * Input_line_pointer->(next non-blank) char after operand, or is in its
809 * original state.
810 */
811
b34976b6 812static bfd_boolean
98027b10 813register_name (expressionS *expressionP)
252b5132
RH		 814{
815 int reg_number;
816 char *name;
817 char *start;
818 char c;
819
99a814a1 820 /* Find the spelling of the operand. */
252b5132 821 start = name = input_line_pointer;
3882b010 822 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 823 name = ++input_line_pointer;
824
3882b010 825 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 826 return FALSE;
252b5132
RH		 827
828 c = get_symbol_end ();
829 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
830
468cced8
AM		 831 /* Put back the delimiting char. */
832 *input_line_pointer = c;
833
99a814a1 834 /* Look to see if it's in the register table. */
81d4177b 835 if (reg_number >= 0)
252b5132
RH		 836 {
837 expressionP->X_op = O_register;
838 expressionP->X_add_number = reg_number;
81d4177b 839
99a814a1 840 /* Make the rest nice. */
252b5132
RH		 841 expressionP->X_add_symbol = NULL;
842 expressionP->X_op_symbol = NULL;
b34976b6 843 return TRUE;
252b5132 844 }
468cced8
AM		 845
846 /* Reset the line as if we had not done anything. */
847 input_line_pointer = start;
b34976b6 848 return FALSE;
252b5132
RH		 849}
850\f
851/* This function is called for each symbol seen in an expression. It
852 handles the special parsing which PowerPC assemblers are supposed
853 to use for condition codes. */
854
855/* Whether to do the special parsing. */
b34976b6 856static bfd_boolean cr_operand;
252b5132
RH		 857
858/* Names to recognize in a condition code. This table is sorted. */
859static const struct pd_reg cr_names[] =
860{
861 { "cr0", 0 },
862 { "cr1", 1 },
863 { "cr2", 2 },
864 { "cr3", 3 },
865 { "cr4", 4 },
866 { "cr5", 5 },
867 { "cr6", 6 },
868 { "cr7", 7 },
869 { "eq", 2 },
870 { "gt", 1 },
871 { "lt", 0 },
872 { "so", 3 },
873 { "un", 3 }
874};
875
876/* Parsing function. This returns non-zero if it recognized an
877 expression. */
878
879int
98027b10 880ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 881{
882 int val;
883
884 if (! cr_operand)
885 return 0;
886
13abbae3
AM		 887 if (*name == '%')
888 ++name;
252b5132
RH		 889 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
890 name);
891 if (val < 0)
892 return 0;
893
894 expr->X_op = O_constant;
895 expr->X_add_number = val;
896
897 return 1;
898}
899\f
900/* Local variables. */
901
2b3c4602
AM		 902/* Whether to target xcoff64/elf64. */
903static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 904
252b5132
RH		 905/* Opcode hash table. */
906static struct hash_control *ppc_hash;
907
908/* Macro hash table. */
909static struct hash_control *ppc_macro_hash;
910
911#ifdef OBJ_ELF
99a814a1 912/* What type of shared library support to use. */
5d6f4f16 913static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 914
99a814a1 915/* Flags to set in the elf header. */
252b5132
RH		 916static flagword ppc_flags = 0;
917
918/* Whether this is Solaris or not. */
919#ifdef TARGET_SOLARIS_COMMENT
b34976b6 920#define SOLARIS_P TRUE
252b5132 921#else
b34976b6 922#define SOLARIS_P FALSE
252b5132
RH		 923#endif
924
b34976b6 925static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 926#endif
927
928#ifdef OBJ_XCOFF
929
930/* The RS/6000 assembler uses the .csect pseudo-op to generate code
931 using a bunch of different sections. These assembler sections,
932 however, are all encompassed within the .text or .data sections of
933 the final output file. We handle this by using different
934 subsegments within these main segments. */
935
936/* Next subsegment to allocate within the .text segment. */
937static subsegT ppc_text_subsegment = 2;
938
939/* Linked list of csects in the text section. */
940static symbolS *ppc_text_csects;
941
942/* Next subsegment to allocate within the .data segment. */
943static subsegT ppc_data_subsegment = 2;
944
945/* Linked list of csects in the data section. */
946static symbolS *ppc_data_csects;
947
948/* The current csect. */
949static symbolS *ppc_current_csect;
950
951/* The RS/6000 assembler uses a TOC which holds addresses of functions
952 and variables. Symbols are put in the TOC with the .tc pseudo-op.
953 A special relocation is used when accessing TOC entries. We handle
954 the TOC as a subsegment within the .data segment. We set it up if
955 we see a .toc pseudo-op, and save the csect symbol here. */
956static symbolS *ppc_toc_csect;
957
958/* The first frag in the TOC subsegment. */
959static fragS *ppc_toc_frag;
960
961/* The first frag in the first subsegment after the TOC in the .data
962 segment. NULL if there are no subsegments after the TOC. */
963static fragS *ppc_after_toc_frag;
964
965/* The current static block. */
966static symbolS *ppc_current_block;
967
968/* The COFF debugging section; set by md_begin. This is not the
969 .debug section, but is instead the secret BFD section which will
970 cause BFD to set the section number of a symbol to N_DEBUG. */
971static asection *ppc_coff_debug_section;
972
973#endif /* OBJ_XCOFF */
974
975#ifdef TE_PE
976
977/* Various sections that we need for PE coff support. */
978static segT ydata_section;
979static segT pdata_section;
980static segT reldata_section;
981static segT rdata_section;
982static segT tocdata_section;
983
81d4177b 984/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 985static segT ppc_previous_section;
986static segT ppc_current_section;
987
988#endif /* TE_PE */
989
990#ifdef OBJ_ELF
991symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 992#define PPC_APUINFO_ISEL 0x40
993#define PPC_APUINFO_PMR 0x41
994#define PPC_APUINFO_RFMCI 0x42
995#define PPC_APUINFO_CACHELCK 0x43
996#define PPC_APUINFO_SPE 0x100
997#define PPC_APUINFO_EFS 0x101
998#define PPC_APUINFO_BRLOCK 0x102
999
b34976b6
AM		 1000/*
1001 * We keep a list of APUinfo
6a0c61b7
EZ		 1002 */
1003unsigned long *ppc_apuinfo_list;
1004unsigned int ppc_apuinfo_num;
1005unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1006#endif /* OBJ_ELF */
1007\f
1008#ifdef OBJ_ELF
15c1449b 1009const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1010#else
15c1449b 1011const char *const md_shortopts = "um:";
252b5132 1012#endif
15c1449b 1013const struct option md_longopts[] = {
252b5132
RH		 1014 {NULL, no_argument, NULL, 0}
1015};
15c1449b 1016const size_t md_longopts_size = sizeof (md_longopts);
252b5132 1017
69c040df
AM		 1018
1019/* Handle -m options that set cpu type, and .machine arg. */
1020
1021static int
1022parse_cpu (const char *arg)
1023{
9b4e5766
PB		 1024 ppc_cpu_t retain_flags =
1025 ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SPE);
b0e34bfe 1026
69c040df
AM		 1027 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
1028 (RIOS2). */
1029 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
1030 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
1031 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
1032 else if (strcmp (arg, "pwr") == 0)
1033 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
1034 /* -m601 means to assemble for the PowerPC 601, which includes
1035 instructions that are holdovers from the Power. */
1036 else if (strcmp (arg, "601") == 0)
1037 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1038 | PPC_OPCODE_601 | PPC_OPCODE_32);
1039 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
1040 PowerPC 603/604. */
1041 else if (strcmp (arg, "ppc") == 0
1042 || strcmp (arg, "ppc32") == 0
1043 || strcmp (arg, "603") == 0
1044 || strcmp (arg, "604") == 0)
1045 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 1046 /* Do all PPC750s have paired single ops? */
1047 else if (strcmp (arg, "750cl") == 0)
1048 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
081ba1b3 1049 else if (strcmp (arg, "403") == 0)
69c040df
AM		 1050 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1051 | PPC_OPCODE_403 | PPC_OPCODE_32);
081ba1b3
AM		 1052 else if (strcmp (arg, "405") == 0)
1053 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1054 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
c8187e15
PB		 1055 else if (strcmp (arg, "440") == 0
1056 || strcmp (arg, "464") == 0)
69c040df
AM		 1057 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
1058 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
1059 else if (strcmp (arg, "7400") == 0
1060 || strcmp (arg, "7410") == 0
1061 || strcmp (arg, "7450") == 0
1062 || strcmp (arg, "7455") == 0)
1063 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1064 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 1065 else if (strcmp (arg, "e300") == 0)
1066 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
1067 | PPC_OPCODE_E300);
69c040df
AM		 1068 else if (strcmp (arg, "altivec") == 0)
1069 {
1070 if (ppc_cpu == 0)
b0e34bfe
NC		 1071 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
1072
9b4e5766
PB		 1073 retain_flags |= PPC_OPCODE_ALTIVEC;
1074 }
1075 else if (strcmp (arg, "vsx") == 0)
1076 {
1077 if (ppc_cpu == 0)
1078 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
1079
1080 retain_flags |= PPC_OPCODE_VSX;
69c040df
AM		 1081 }
1082 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
1083 {
1084 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
1085 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
1086 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
19a6653c
AM		 1087 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
1088 }
1089 else if (strcmp (arg, "e500mc") == 0)
1090 {
1091 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
1092 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
1093 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
69c040df
AM		 1094 }
1095 else if (strcmp (arg, "spe") == 0)
1096 {
1097 if (ppc_cpu == 0)
b0e34bfe
NC		 1098 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
1099
9b4e5766 1100 retain_flags |= PPC_OPCODE_SPE;
69c040df
AM		 1101 }
1102 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
1103 620. */
1104 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
1105 {
1106 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1107 }
1108 else if (strcmp (arg, "ppc64bridge") == 0)
1109 {
1110 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1111 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
1112 }
1113 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
1114 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
1115 {
1116 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
1117 }
69c040df
AM		 1118 else if (strcmp (arg, "power4") == 0)
1119 {
1120 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1121 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
1122 }
b0648eec
AM		 1123 else if (strcmp (arg, "power5") == 0)
1124 {
1125 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1126 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
1127 | PPC_OPCODE_POWER5);
1128 }
9622b051
AM		 1129 else if (strcmp (arg, "power6") == 0)
1130 {
1131 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1132 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209
PB		 1133 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
1134 | PPC_OPCODE_ALTIVEC);
9622b051 1135 }
9b4e5766
PB		 1136 else if (strcmp (arg, "power7") == 0)
1137 {
1138 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
066be9f7
PB		 1139 | PPC_OPCODE_ISEL | PPC_OPCODE_64
1140 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
1141 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
9b4e5766
PB		 1142 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
1143 }
ede602d7
AM		 1144 else if (strcmp (arg, "cell") == 0)
1145 {
1146 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
1147 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209 1148 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
ede602d7 1149 }
69c040df
AM		 1150 /* -mcom means assemble for the common intersection between Power
1151 and PowerPC. At present, we just allow the union, rather
1152 than the intersection. */
1153 else if (strcmp (arg, "com") == 0)
1154 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
1155 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
1156 else if (strcmp (arg, "any") == 0)
1157 ppc_cpu |= PPC_OPCODE_ANY;
1158 else
1159 return 0;
1160
9b4e5766
PB		 1161 /* Make sure the the Altivec, VSX and SPE bits are not lost. */
1162 ppc_cpu |= retain_flags;
69c040df
AM		 1163 return 1;
1164}
1165
252b5132 1166int
98027b10 1167md_parse_option (int c, char *arg)
252b5132
RH		 1168{
1169 switch (c)
1170 {
1171 case 'u':
1172 /* -u means that any undefined symbols should be treated as
1173 external, which is the default for gas anyhow. */
1174 break;
1175
1176#ifdef OBJ_ELF
1177 case 'l':
1178 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1179 sake, recognize -be also. */
252b5132
RH		 1180 if (strcmp (arg, "e") == 0)
1181 {
1182 target_big_endian = 0;
1183 set_target_endian = 1;
1184 }
1185 else
1186 return 0;
1187
1188 break;
1189
1190 case 'b':
1191 if (strcmp (arg, "e") == 0)
1192 {
1193 target_big_endian = 1;
1194 set_target_endian = 1;
1195 }
1196 else
1197 return 0;
1198
1199 break;
1200
1201 case 'K':
99a814a1 1202 /* Recognize -K PIC. */
252b5132
RH		 1203 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1204 {
1205 shlib = SHLIB_PIC;
1206 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1207 }
1208 else
1209 return 0;
1210
1211 break;
1212#endif
1213
7f6d05e8
CP		 1214 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1215 case 'a':
1216 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1217 {
1218#ifdef BFD64
1219 ppc_obj64 = 1;
1220#else
1221 as_fatal (_("%s unsupported"), "-a64");
1222#endif
1223 }
7f6d05e8 1224 else if (strcmp (arg, "32") == 0)
2b3c4602 1225 ppc_obj64 = 0;
7f6d05e8
CP		 1226 else
1227 return 0;
1228 break;
81d4177b 1229
252b5132 1230 case 'm':
69c040df
AM		 1231 if (parse_cpu (arg))
1232 ;
252b5132
RH		 1233
1234 else if (strcmp (arg, "regnames") == 0)
b34976b6 1235 reg_names_p = TRUE;
252b5132
RH		 1236
1237 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1238 reg_names_p = FALSE;
252b5132
RH		 1239
1240#ifdef OBJ_ELF
99a814a1
AM		 1241 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1242 that require relocation. */
252b5132
RH		 1243 else if (strcmp (arg, "relocatable") == 0)
1244 {
5d6f4f16 1245 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1246 ppc_flags |= EF_PPC_RELOCATABLE;
1247 }
1248
1249 else if (strcmp (arg, "relocatable-lib") == 0)
1250 {
5d6f4f16 1251 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1252 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1253 }
1254
99a814a1 1255 /* -memb, set embedded bit. */
252b5132
RH		 1256 else if (strcmp (arg, "emb") == 0)
1257 ppc_flags |= EF_PPC_EMB;
1258
99a814a1
AM		 1259 /* -mlittle/-mbig set the endianess. */
1260 else if (strcmp (arg, "little") == 0
1261 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1262 {
1263 target_big_endian = 0;
1264 set_target_endian = 1;
1265 }
1266
1267 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1268 {
1269 target_big_endian = 1;
1270 set_target_endian = 1;
1271 }
1272
1273 else if (strcmp (arg, "solaris") == 0)
1274 {
b34976b6 1275 msolaris = TRUE;
252b5132
RH		 1276 ppc_comment_chars = ppc_solaris_comment_chars;
1277 }
1278
1279 else if (strcmp (arg, "no-solaris") == 0)
1280 {
b34976b6 1281 msolaris = FALSE;
252b5132
RH		 1282 ppc_comment_chars = ppc_eabi_comment_chars;
1283 }
1284#endif
1285 else
1286 {
1287 as_bad (_("invalid switch -m%s"), arg);
1288 return 0;
1289 }
1290 break;
1291
1292#ifdef OBJ_ELF
1293 /* -V: SVR4 argument to print version ID. */
1294 case 'V':
1295 print_version_id ();
1296 break;
1297
1298 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1299 should be emitted or not. FIXME: Not implemented. */
1300 case 'Q':
1301 break;
1302
1303 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1304 rather than .stabs.excl, which is ignored by the linker.
1305 FIXME: Not implemented. */
1306 case 's':
1307 if (arg)
1308 return 0;
1309
1310 break;
1311#endif
1312
1313 default:
1314 return 0;
1315 }
1316
1317 return 1;
1318}
1319
1320void
98027b10 1321md_show_usage (FILE *stream)
252b5132 1322{
bc805888 1323 fprintf (stream, _("\
252b5132 1324PowerPC options:\n\
df12615d
AM		 1325-a32 generate ELF32/XCOFF32\n\
1326-a64 generate ELF64/XCOFF64\n\
252b5132 1327-u ignored\n\
23e1d84c
AM		 1328-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1329-mpwr generate code for POWER (RIOS1)\n\
1330-m601 generate code for PowerPC 601\n\
418c1742 1331-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1332 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1333-m403 generate code for PowerPC 403\n\
1334-m405 generate code for PowerPC 405\n\
3d8aea2f 1335-m440 generate code for PowerPC 440\n\
c8187e15 1336-m464 generate code for PowerPC 464\n\
f5c120c5 1337-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1338 generate code for PowerPC 7400/7410/7450/7455\n\
1339-m750cl generate code for PowerPC 750cl\n"));
df12615d 1340 fprintf (stream, _("\
23e1d84c 1341-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1342-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1343-mbooke generate code for 32-bit PowerPC BookE\n\
23e1d84c 1344-mpower4 generate code for Power4 architecture\n\
b0648eec 1345-mpower5 generate code for Power5 architecture\n\
9622b051 1346-mpower6 generate code for Power6 architecture\n\
9b4e5766 1347-mpower7 generate code for Power7 architecture\n\
ede602d7 1348-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1349-mcom generate code Power/PowerPC common instructions\n\
df12615d 1350-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1351 fprintf (stream, _("\
df12615d 1352-maltivec generate code for AltiVec\n\
9b4e5766 1353-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1354-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1355-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1356-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1357-mspe generate code for Motorola SPE instructions\n\
1358-mregnames Allow symbolic names for registers\n\
1359-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1360#ifdef OBJ_ELF
bc805888 1361 fprintf (stream, _("\
252b5132
RH		 1362-mrelocatable support for GCC's -mrelocatble option\n\
1363-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1364-memb set PPC_EMB bit in ELF flags\n\
df12615d 1365-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1366 generate code for a little endian machine\n\
df12615d
AM		 1367-mbig, -mbig-endian, -b, -be\n\
1368 generate code for a big endian machine\n\
252b5132
RH		 1369-msolaris generate code for Solaris\n\
1370-mno-solaris do not generate code for Solaris\n\
1371-V print assembler version number\n\
1372-Qy, -Qn ignored\n"));
1373#endif
1374}
1375\f
1376/* Set ppc_cpu if it is not already set. */
1377
1378static void
98027b10 1379ppc_set_cpu (void)
252b5132
RH		 1380{
1381 const char *default_os = TARGET_OS;
1382 const char *default_cpu = TARGET_CPU;
1383
3c9030c1 1384 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1385 {
2a98c3a6 1386 if (ppc_obj64)
3c9030c1 1387 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1388 else if (strncmp (default_os, "aix", 3) == 0
1389 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1390 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1391 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1392 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1393 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1394 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1395 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1396 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1397 else
99a814a1
AM		 1398 as_fatal (_("Unknown default cpu = %s, os = %s"),
1399 default_cpu, default_os);
252b5132
RH		 1400 }
1401}
1402
9232bbb0
AM		 1403/* Figure out the BFD architecture to use. This function and ppc_mach
1404 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1405
1406enum bfd_architecture
98027b10 1407ppc_arch (void)
252b5132
RH		 1408{
1409 const char *default_cpu = TARGET_CPU;
1410 ppc_set_cpu ();
1411
1412 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1413 return bfd_arch_powerpc;
1414 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1415 return bfd_arch_rs6000;
1416 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1417 {
1418 if (strcmp (default_cpu, "rs6000") == 0)
1419 return bfd_arch_rs6000;
0baf16f2 1420 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1421 return bfd_arch_powerpc;
1422 }
1423
1424 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1425 return bfd_arch_unknown;
1426}
1427
7f6d05e8 1428unsigned long
98027b10 1429ppc_mach (void)
7f6d05e8 1430{
2a98c3a6
AM		 1431 if (ppc_obj64)
1432 return bfd_mach_ppc64;
1433 else if (ppc_arch () == bfd_arch_rs6000)
1434 return bfd_mach_rs6k;
1435 else
1436 return bfd_mach_ppc;
7f6d05e8
CP		 1437}
1438
81d4177b 1439extern char*
98027b10 1440ppc_target_format (void)
7f6d05e8
CP		 1441{
1442#ifdef OBJ_COFF
1443#ifdef TE_PE
99a814a1 1444 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1445#elif TE_POWERMAC
0baf16f2 1446 return "xcoff-powermac";
7f6d05e8 1447#else
eb1e0e80 1448# ifdef TE_AIX5
2b3c4602 1449 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1450# else
2b3c4602 1451 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1452# endif
7f6d05e8 1453#endif
7f6d05e8
CP		 1454#endif
1455#ifdef OBJ_ELF
9d8504b1
PB		 1456# ifdef TE_VXWORKS
1457 return "elf32-powerpc-vxworks";
1458# else
0baf16f2 1459 return (target_big_endian
2b3c4602
AM		 1460 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1461 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1462# endif
7f6d05e8
CP		 1463#endif
1464}
1465
69c040df
AM		 1466/* Insert opcodes and macros into hash tables. Called at startup and
1467 for .cpu pseudo. */
252b5132 1468
69c040df
AM		 1469static void
1470ppc_setup_opcodes (void)
252b5132 1471{
98027b10 1472 const struct powerpc_opcode *op;
252b5132
RH		 1473 const struct powerpc_opcode *op_end;
1474 const struct powerpc_macro *macro;
1475 const struct powerpc_macro *macro_end;
b84bf58a 1476 bfd_boolean bad_insn = FALSE;
252b5132 1477
69c040df
AM		 1478 if (ppc_hash != NULL)
1479 hash_die (ppc_hash);
1480 if (ppc_macro_hash != NULL)
1481 hash_die (ppc_macro_hash);
252b5132
RH		 1482
1483 /* Insert the opcodes into a hash table. */
1484 ppc_hash = hash_new ();
1485
c43a438d 1486 if (ENABLE_CHECKING)
b84bf58a 1487 {
c43a438d 1488 unsigned int i;
b84bf58a 1489
c43a438d
AM		 1490 /* Check operand masks. Code here and in the disassembler assumes
1491 all the 1's in the mask are contiguous. */
1492 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1493 {
c43a438d
AM		 1494 unsigned long mask = powerpc_operands[i].bitm;
1495 unsigned long right_bit;
1496 unsigned int j;
1497
1498 right_bit = mask & -mask;
1499 mask += right_bit;
1500 right_bit = mask & -mask;
1501 if (mask != right_bit)
1502 {
1503 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1504 bad_insn = TRUE;
1505 }
1506 for (j = i + 1; j < num_powerpc_operands; ++j)
1507 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1508 sizeof (powerpc_operands[0])) == 0)
1509 {
1510 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1511 j, i);
1512 bad_insn = TRUE;
1513 }
b84bf58a
AM		 1514 }
1515 }
1516
252b5132
RH		 1517 op_end = powerpc_opcodes + powerpc_num_opcodes;
1518 for (op = powerpc_opcodes; op < op_end; op++)
1519 {
c43a438d 1520 if (ENABLE_CHECKING)
b84bf58a 1521 {
c43a438d
AM		 1522 const unsigned char *o;
1523 unsigned long omask = op->mask;
8dbcd839 1524
d815f1a9 1525 if (op != powerpc_opcodes)
8dbcd839 1526 {
d815f1a9
AM		 1527 /* The major opcodes had better be sorted. Code in the
1528 disassembler assumes the insns are sorted according to
1529 major opcode. */
1530 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1531 {
1532 as_bad (_("major opcode is not sorted for %s"),
1533 op->name);
1534 bad_insn = TRUE;
1535 }
1536
1537 /* Warn if the table isn't more strictly ordered.
1538 Unfortunately it doesn't seem possible to order the
1539 table on much more than the major opcode, which makes
1540 it difficult to implement a binary search in the
1541 disassembler. The problem is that we have multiple
1542 ways to disassemble instructions, and we usually want
1543 to choose a more specific form (with more bits set in
1544 the opcode) than a more general form. eg. all of the
1545 following are equivalent:
1546 bne label # opcode = 0x40820000, mask = 0xff830003
1547 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1548 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1549
1550 There are also cases where the table needs to be out
1551 of order to disassemble the correct instruction for
2f3bb96a 1552 processor variants. */
d815f1a9
AM		 1553 else if (0)
1554 {
1555 unsigned long t1 = op[0].opcode;
1556 unsigned long t2 = op[-1].opcode;
1557
1558 if (((t1 ^ t2) & 0xfc0007ff) == 0
1559 && (t1 & 0xfc0006df) == 0x7c000286)
1560 {
1561 /* spr field is split. */
1562 t1 = ((t1 & ~0x1ff800)
1563 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1564 t2 = ((t2 & ~0x1ff800)
1565 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1566 }
1567 if (t1 < t2)
1568 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1569 op[0].name, op[0].opcode, op[0].mask,
1570 op[-1].name, op[-1].opcode, op[-1].mask);
1571 }
8dbcd839 1572 }
c43a438d
AM		 1573
1574 /* The mask had better not trim off opcode bits. */
1575 if ((op->opcode & omask) != op->opcode)
1576 {
1577 as_bad (_("mask trims opcode bits for %s"),
1578 op->name);
1579 bad_insn = TRUE;
1580 }
1581
1582 /* The operands must not overlap the opcode or each other. */
1583 for (o = op->operands; *o; ++o)
1584 if (*o >= num_powerpc_operands)
1585 {
1586 as_bad (_("operand index error for %s"),
1587 op->name);
1588 bad_insn = TRUE;
1589 }
1590 else
b84bf58a 1591 {
c43a438d
AM		 1592 const struct powerpc_operand *operand = &powerpc_operands[*o];
1593 if (operand->shift >= 0)
b84bf58a 1594 {
c43a438d
AM		 1595 unsigned long mask = operand->bitm << operand->shift;
1596 if (omask & mask)
1597 {
1598 as_bad (_("operand %d overlap in %s"),
1599 (int) (o - op->operands), op->name);
1600 bad_insn = TRUE;
1601 }
1602 omask |= mask;
b84bf58a 1603 }
b84bf58a 1604 }
c43a438d 1605 }
252b5132 1606
2b3c4602 1607 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1608 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1609 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1610 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1611 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1612 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1613 {
1614 const char *retval;
1615
98027b10 1616 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1617 if (retval != NULL)
252b5132 1618 {
99a814a1 1619 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1620 if ((ppc_cpu & PPC_OPCODE_601) != 0
1621 && (op->flags & PPC_OPCODE_POWER) != 0)
1622 continue;
1623
b84bf58a 1624 as_bad (_("duplicate instruction %s"),
99a814a1 1625 op->name);
b84bf58a 1626 bad_insn = TRUE;
252b5132
RH		 1627 }
1628 }
1629 }
1630
3c9030c1
AM		 1631 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1632 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1633 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1634
252b5132
RH		 1635 /* Insert the macros into a hash table. */
1636 ppc_macro_hash = hash_new ();
1637
1638 macro_end = powerpc_macros + powerpc_num_macros;
1639 for (macro = powerpc_macros; macro < macro_end; macro++)
1640 {
1641 if ((macro->flags & ppc_cpu) != 0)
1642 {
1643 const char *retval;
1644
98027b10 1645 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1646 if (retval != (const char *) NULL)
1647 {
b84bf58a
AM		 1648 as_bad (_("duplicate macro %s"), macro->name);
1649 bad_insn = TRUE;
252b5132
RH		 1650 }
1651 }
1652 }
1653
b84bf58a 1654 if (bad_insn)
252b5132 1655 abort ();
69c040df
AM		 1656}
1657
1658/* This function is called when the assembler starts up. It is called
1659 after the options have been parsed and the output file has been
1660 opened. */
1661
1662void
98027b10 1663md_begin (void)
69c040df
AM		 1664{
1665 ppc_set_cpu ();
1666
1667 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1668
1669#ifdef OBJ_ELF
1670 /* Set the ELF flags if desired. */
1671 if (ppc_flags && !msolaris)
1672 bfd_set_private_flags (stdoutput, ppc_flags);
1673#endif
1674
1675 ppc_setup_opcodes ();
252b5132 1676
67c1ffbe 1677 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1678 by the user. */
252b5132
RH		 1679 if (!set_target_endian)
1680 {
1681 set_target_endian = 1;
1682 target_big_endian = PPC_BIG_ENDIAN;
1683 }
1684
1685#ifdef OBJ_XCOFF
1686 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1687
1688 /* Create dummy symbols to serve as initial csects. This forces the
1689 text csects to precede the data csects. These symbols will not
1690 be output. */
1691 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1692 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1693 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1694 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1695#endif
1696
1697#ifdef TE_PE
1698
1699 ppc_current_section = text_section;
81d4177b 1700 ppc_previous_section = 0;
252b5132
RH		 1701
1702#endif
1703}
1704
6a0c61b7 1705void
98027b10 1706ppc_cleanup (void)
6a0c61b7 1707{
dc1d03fc 1708#ifdef OBJ_ELF
6a0c61b7
EZ		 1709 if (ppc_apuinfo_list == NULL)
1710 return;
1711
1712 /* Ok, so write the section info out. We have this layout:
1713
1714 byte data what
1715 ---- ---- ----
1716 0 8 length of "APUinfo\0"
1717 4 (n*4) number of APU's (4 bytes each)
1718 8 2 note type 2
1719 12 "APUinfo\0" name
1720 20 APU#1 first APU's info
1721 24 APU#2 second APU's info
1722 ... ...
1723 */
1724 {
1725 char *p;
1726 asection *seg = now_seg;
1727 subsegT subseg = now_subseg;
1728 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1729 unsigned int i;
6a0c61b7
EZ		 1730
1731 /* Create the .PPC.EMB.apuinfo section. */
1732 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1733 bfd_set_section_flags (stdoutput,
1734 apuinfo_secp,
e1a9cb8e 1735 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1736
1737 p = frag_more (4);
1738 md_number_to_chars (p, (valueT) 8, 4);
1739
1740 p = frag_more (4);
e98d298c 1741 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1742
1743 p = frag_more (4);
1744 md_number_to_chars (p, (valueT) 2, 4);
1745
1746 p = frag_more (8);
1747 strcpy (p, "APUinfo");
1748
1749 for (i = 0; i < ppc_apuinfo_num; i++)
1750 {
b34976b6
AM		 1751 p = frag_more (4);
1752 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1753 }
1754
1755 frag_align (2, 0, 0);
1756
1757 /* We probably can't restore the current segment, for there likely
1758 isn't one yet... */
1759 if (seg && subseg)
1760 subseg_set (seg, subseg);
1761 }
dc1d03fc 1762#endif
6a0c61b7
EZ		 1763}
1764
252b5132
RH		 1765/* Insert an operand value into an instruction. */
1766
1767static unsigned long
a1867a27
AM		 1768ppc_insert_operand (unsigned long insn,
1769 const struct powerpc_operand *operand,
1770 offsetT val,
fa452fa6 1771 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1772 char *file,
1773 unsigned int line)
252b5132 1774{
b84bf58a 1775 long min, max, right;
eb42fac1 1776
b84bf58a
AM		 1777 max = operand->bitm;
1778 right = max & -max;
1779 min = 0;
1780
1781 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1782 {
b84bf58a 1783 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1784 max = (max >> 1) & -right;
1785 min = ~max & -right;
b84bf58a 1786 }
252b5132 1787
b84bf58a 1788 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1789 max++;
252b5132 1790
b84bf58a 1791 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1792 {
1793 long tmp = min;
1794 min = -max;
1795 max = -tmp;
1796 }
b84bf58a 1797
a1867a27
AM		 1798 if (min <= max)
1799 {
1800 /* Some people write constants with the sign extension done by
1801 hand but only up to 32 bits. This shouldn't really be valid,
1802 but, to permit this code to assemble on a 64-bit host, we
1803 sign extend the 32-bit value to 64 bits if so doing makes the
1804 value valid. */
1805 if (val > max
1806 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1807 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1808 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1809 val = val - 0x80000000 - 0x80000000;
1810
1811 /* Similarly, people write expressions like ~(1<<15), and expect
1812 this to be OK for a 32-bit unsigned value. */
1813 else if (val < min
1814 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1815 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1816 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1817 val = val + 0x80000000 + 0x80000000;
1818
1819 else if (val < min
1820 || val > max
1821 || (val & (right - 1)) != 0)
1822 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1823 }
b84bf58a 1824
252b5132
RH		 1825 if (operand->insert)
1826 {
1827 const char *errmsg;
1828
1829 errmsg = NULL;
2b3c4602 1830 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1831 if (errmsg != (const char *) NULL)
ee2c9aa9 1832 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1833 }
1834 else
b84bf58a 1835 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1836
1837 return insn;
1838}
1839
1840\f
1841#ifdef OBJ_ELF
1842/* Parse @got, etc. and return the desired relocation. */
1843static bfd_reloc_code_real_type
98027b10 1844ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1845{
1846 struct map_bfd {
1847 char *string;
b7d7dc63
AM		 1848 unsigned int length : 8;
1849 unsigned int valid32 : 1;
1850 unsigned int valid64 : 1;
1851 unsigned int reloc;
252b5132
RH		 1852 };
1853
1854 char ident[20];
1855 char *str = *str_p;
1856 char *str2;
1857 int ch;
1858 int len;
15c1449b 1859 const struct map_bfd *ptr;
252b5132 1860
b7d7dc63
AM		 1861#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1862#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1863#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1864
15c1449b 1865 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1866 MAP ("l", BFD_RELOC_LO16),
1867 MAP ("h", BFD_RELOC_HI16),
1868 MAP ("ha", BFD_RELOC_HI16_S),
1869 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1870 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1871 MAP ("got", BFD_RELOC_16_GOTOFF),
1872 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1873 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1874 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1875 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1876 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1877 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1878 MAP ("copy", BFD_RELOC_PPC_COPY),
1879 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1880 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1881 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1882 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1883 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1884 MAP ("tls", BFD_RELOC_PPC_TLS),
1885 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1886 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1887 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1888 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1889 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1890 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1891 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1892 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1893 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1894 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1895 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1896 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1897 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1898 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1899 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1900 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1901 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1902 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1903 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1904 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1905 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1906 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1907 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1908 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1909 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1910 MAP32 ("fixup", BFD_RELOC_CTOR),
1911 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1912 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1913 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1914 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1915 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1916 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1917 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1918 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1919 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1920 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1921 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1922 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1923 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1924 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1925 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1926 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1927 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1928 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1929 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1930 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1931 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1932 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1933 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1934 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1935 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1936 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1937 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1938 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1939 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1940 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1941 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1942 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1943 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1944 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1945 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1946 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1947 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1948 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1949 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1950 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1951 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1952 };
1953
1954 if (*str++ != '@')
1955 return BFD_RELOC_UNUSED;
1956
1957 for (ch = *str, str2 = ident;
1958 (str2 < ident + sizeof (ident) - 1
3882b010 1959 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1960 ch = *++str)
1961 {
3882b010 1962 *str2++ = TOLOWER (ch);
252b5132
RH		 1963 }
1964
1965 *str2 = '\0';
1966 len = str2 - ident;
1967
1968 ch = ident[0];
1969 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1970 if (ch == ptr->string[0]
1971 && len == ptr->length
b7d7dc63
AM		 1972 && memcmp (ident, ptr->string, ptr->length) == 0
1973 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1974 {
15c1449b
AM		 1975 int reloc = ptr->reloc;
1976
727fc41e
AM		 1977 if (!ppc_obj64 && exp_p->X_add_number != 0)
1978 {
1979 switch (reloc)
1980 {
1981 case BFD_RELOC_16_GOTOFF:
1982 case BFD_RELOC_LO16_GOTOFF:
1983 case BFD_RELOC_HI16_GOTOFF:
1984 case BFD_RELOC_HI16_S_GOTOFF:
1985 as_warn (_("identifier+constant@got means "
1986 "identifier@got+constant"));
1987 break;
1988
1989 case BFD_RELOC_PPC_GOT_TLSGD16:
1990 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1991 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1992 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1993 case BFD_RELOC_PPC_GOT_TLSLD16:
1994 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1995 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1996 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1997 case BFD_RELOC_PPC_GOT_DTPREL16:
1998 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1999 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2000 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2001 case BFD_RELOC_PPC_GOT_TPREL16:
2002 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2003 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2004 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2005 as_bad (_("symbol+offset not supported for got tls"));
2006 break;
2007 }
2008 }
5f6db75a
AM		 2009
2010 /* Now check for identifier@suffix+constant. */
2011 if (*str == '-' || *str == '+')
252b5132 2012 {
5f6db75a
AM		 2013 char *orig_line = input_line_pointer;
2014 expressionS new_exp;
2015
2016 input_line_pointer = str;
2017 expression (&new_exp);
2018 if (new_exp.X_op == O_constant)
252b5132 2019 {
5f6db75a
AM		 2020 exp_p->X_add_number += new_exp.X_add_number;
2021 str = input_line_pointer;
252b5132 2022 }
5f6db75a
AM		 2023
2024 if (&input_line_pointer != str_p)
2025 input_line_pointer = orig_line;
252b5132 2026 }
252b5132 2027 *str_p = str;
0baf16f2 2028
2b3c4602 2029 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2030 && exp_p->X_op == O_symbol
2031 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2032 {
9f2b53d7
AM		 2033 /* Change the symbol so that the dummy .TOC. symbol can be
2034 omitted from the object file. */
0baf16f2
AM		 2035 exp_p->X_add_symbol = &abs_symbol;
2036 }
2037
15c1449b 2038 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2039 }
2040
2041 return BFD_RELOC_UNUSED;
2042}
2043
99a814a1
AM		 2044/* Like normal .long/.short/.word, except support @got, etc.
2045 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2046static void
98027b10 2047ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2048{
2049 expressionS exp;
2050 bfd_reloc_code_real_type reloc;
2051
2052 if (is_it_end_of_statement ())
2053 {
2054 demand_empty_rest_of_line ();
2055 return;
2056 }
2057
2058 do
2059 {
2060 expression (&exp);
2061 if (exp.X_op == O_symbol
2062 && *input_line_pointer == '@'
99a814a1
AM		 2063 && (reloc = ppc_elf_suffix (&input_line_pointer,
2064 &exp)) != BFD_RELOC_UNUSED)
252b5132 2065 {
99a814a1
AM		 2066 reloc_howto_type *reloc_howto;
2067 int size;
2068
2069 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2070 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2071
2072 if (size > nbytes)
0baf16f2
AM		 2073 {
2074 as_bad (_("%s relocations do not fit in %d bytes\n"),
2075 reloc_howto->name, nbytes);
2076 }
252b5132
RH		 2077 else
2078 {
0baf16f2
AM		 2079 char *p;
2080 int offset;
252b5132 2081
0baf16f2
AM		 2082 p = frag_more (nbytes);
2083 offset = 0;
2084 if (target_big_endian)
2085 offset = nbytes - size;
99a814a1
AM		 2086 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2087 &exp, 0, reloc);
252b5132
RH		 2088 }
2089 }
2090 else
2091 emit_expr (&exp, (unsigned int) nbytes);
2092 }
2093 while (*input_line_pointer++ == ',');
2094
99a814a1
AM		 2095 /* Put terminator back into stream. */
2096 input_line_pointer--;
252b5132
RH		 2097 demand_empty_rest_of_line ();
2098}
2099
2100/* Solaris pseduo op to change to the .rodata section. */
2101static void
98027b10 2102ppc_elf_rdata (int xxx)
252b5132
RH		 2103{
2104 char *save_line = input_line_pointer;
2105 static char section[] = ".rodata\n";
2106
99a814a1 2107 /* Just pretend this is .section .rodata */
252b5132
RH		 2108 input_line_pointer = section;
2109 obj_elf_section (xxx);
2110
2111 input_line_pointer = save_line;
2112}
2113
99a814a1 2114/* Pseudo op to make file scope bss items. */
252b5132 2115static void
98027b10 2116ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2117{
98027b10
AM		 2118 char *name;
2119 char c;
2120 char *p;
252b5132 2121 offsetT size;
98027b10 2122 symbolS *symbolP;
252b5132
RH		 2123 offsetT align;
2124 segT old_sec;
2125 int old_subsec;
2126 char *pfrag;
2127 int align2;
2128
2129 name = input_line_pointer;
2130 c = get_symbol_end ();
2131
99a814a1 2132 /* just after name is now '\0'. */
252b5132
RH		 2133 p = input_line_pointer;
2134 *p = c;
2135 SKIP_WHITESPACE ();
2136 if (*input_line_pointer != ',')
2137 {
2138 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2139 ignore_rest_of_line ();
2140 return;
2141 }
2142
2143 input_line_pointer++; /* skip ',' */
2144 if ((size = get_absolute_expression ()) < 0)
2145 {
2146 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2147 ignore_rest_of_line ();
2148 return;
2149 }
2150
2151 /* The third argument to .lcomm is the alignment. */
2152 if (*input_line_pointer != ',')
2153 align = 8;
2154 else
2155 {
2156 ++input_line_pointer;
2157 align = get_absolute_expression ();
2158 if (align <= 0)
2159 {
2160 as_warn (_("ignoring bad alignment"));
2161 align = 8;
2162 }
2163 }
2164
2165 *p = 0;
2166 symbolP = symbol_find_or_make (name);
2167 *p = c;
2168
2169 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2170 {
2171 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2172 S_GET_NAME (symbolP));
2173 ignore_rest_of_line ();
2174 return;
2175 }
2176
2177 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2178 {
2179 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2180 S_GET_NAME (symbolP),
2181 (long) S_GET_VALUE (symbolP),
2182 (long) size);
2183
2184 ignore_rest_of_line ();
2185 return;
2186 }
2187
99a814a1 2188 /* Allocate_bss. */
252b5132
RH		 2189 old_sec = now_seg;
2190 old_subsec = now_subseg;
2191 if (align)
2192 {
99a814a1 2193 /* Convert to a power of 2 alignment. */
252b5132
RH		 2194 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2195 if (align != 1)
2196 {
2197 as_bad (_("Common alignment not a power of 2"));
2198 ignore_rest_of_line ();
2199 return;
2200 }
2201 }
2202 else
2203 align2 = 0;
2204
2205 record_alignment (bss_section, align2);
2206 subseg_set (bss_section, 0);
2207 if (align2)
2208 frag_align (align2, 0, 0);
2209 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2210 symbol_get_frag (symbolP)->fr_symbol = 0;
2211 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2212 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2213 (char *) 0);
2214 *pfrag = 0;
2215 S_SET_SIZE (symbolP, size);
2216 S_SET_SEGMENT (symbolP, bss_section);
2217 subseg_set (old_sec, old_subsec);
2218 demand_empty_rest_of_line ();
2219}
2220
2221/* Validate any relocations emitted for -mrelocatable, possibly adding
2222 fixups for word relocations in writable segments, so we can adjust
2223 them at runtime. */
2224static void
98027b10 2225ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2226{
2227 if (fixp->fx_done || fixp->fx_pcrel)
2228 return;
2229
2230 switch (shlib)
2231 {
2232 case SHLIB_NONE:
2233 case SHLIB_PIC:
2234 return;
2235
5d6f4f16 2236 case SHLIB_MRELOCATABLE:
252b5132
RH		 2237 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2238 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2239 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2240 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2241 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2242 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2243 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2244 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2245 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2246 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2247 && strcmp (segment_name (seg), ".got2") != 0
2248 && strcmp (segment_name (seg), ".dtors") != 0
2249 && strcmp (segment_name (seg), ".ctors") != 0
2250 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2251 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2252 && strcmp (segment_name (seg), ".eh_frame") != 0
2253 && strcmp (segment_name (seg), ".ex_shared") != 0)
2254 {
2255 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2256 || fixp->fx_r_type != BFD_RELOC_CTOR)
2257 {
2258 as_bad_where (fixp->fx_file, fixp->fx_line,
2259 _("Relocation cannot be done when using -mrelocatable"));
2260 }
2261 }
2262 return;
2263 }
2264}
0baf16f2 2265
7e8d4ab4
AM		 2266/* Prevent elf_frob_file_before_adjust removing a weak undefined
2267 function descriptor sym if the corresponding code sym is used. */
2268
2269void
98027b10 2270ppc_frob_file_before_adjust (void)
0baf16f2 2271{
7e8d4ab4 2272 symbolS *symp;
9232bbb0 2273 asection *toc;
0baf16f2 2274
7e8d4ab4
AM		 2275 if (!ppc_obj64)
2276 return;
2277
2278 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2279 {
7e8d4ab4
AM		 2280 const char *name;
2281 char *dotname;
2282 symbolS *dotsym;
2283 size_t len;
2284
2285 name = S_GET_NAME (symp);
2286 if (name[0] == '.')
2287 continue;
2288
2289 if (! S_IS_WEAK (symp)
2290 || S_IS_DEFINED (symp))
2291 continue;
2292
2293 len = strlen (name) + 1;
2294 dotname = xmalloc (len + 1);
2295 dotname[0] = '.';
2296 memcpy (dotname + 1, name, len);
461b725f 2297 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2298 free (dotname);
2299 if (dotsym != NULL && (symbol_used_p (dotsym)
2300 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2301 symbol_mark_used (symp);
2302
0baf16f2
AM		 2303 }
2304
9232bbb0
AM		 2305 toc = bfd_get_section_by_name (stdoutput, ".toc");
2306 if (toc != NULL
2307 && bfd_section_size (stdoutput, toc) > 0x10000)
2308 as_warn (_("TOC section size exceeds 64k"));
2309
7e8d4ab4
AM		 2310 /* Don't emit .TOC. symbol. */
2311 symp = symbol_find (".TOC.");
2312 if (symp != NULL)
2313 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2314}
252b5132
RH		 2315#endif /* OBJ_ELF */
2316\f
2317#ifdef TE_PE
2318
2319/*
99a814a1 2320 * Summary of parse_toc_entry.
252b5132
RH		 2321 *
2322 * in: Input_line_pointer points to the '[' in one of:
2323 *
2324 * [toc] [tocv] [toc32] [toc64]
2325 *
2326 * Anything else is an error of one kind or another.
2327 *
81d4177b 2328 * out:
252b5132
RH		 2329 * return value: success or failure
2330 * toc_kind: kind of toc reference
2331 * input_line_pointer:
2332 * success: first char after the ']'
2333 * failure: unchanged
2334 *
2335 * settings:
2336 *
2337 * [toc] - rv == success, toc_kind = default_toc
2338 * [tocv] - rv == success, toc_kind = data_in_toc
2339 * [toc32] - rv == success, toc_kind = must_be_32
2340 * [toc64] - rv == success, toc_kind = must_be_64
2341 *
2342 */
2343
81d4177b
KH		 2344enum toc_size_qualifier
2345{
252b5132
RH		 2346 default_toc, /* The toc cell constructed should be the system default size */
2347 data_in_toc, /* This is a direct reference to a toc cell */
2348 must_be_32, /* The toc cell constructed must be 32 bits wide */
2349 must_be_64 /* The toc cell constructed must be 64 bits wide */
2350};
2351
2352static int
98027b10 2353parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2354{
2355 char *start;
2356 char *toc_spec;
2357 char c;
2358 enum toc_size_qualifier t;
2359
99a814a1 2360 /* Save the input_line_pointer. */
252b5132
RH		 2361 start = input_line_pointer;
2362
99a814a1 2363 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2364 ++input_line_pointer;
2365 SKIP_WHITESPACE ();
81d4177b 2366
99a814a1 2367 /* Find the spelling of the operand. */
252b5132
RH		 2368 toc_spec = input_line_pointer;
2369 c = get_symbol_end ();
2370
99a814a1 2371 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2372 {
2373 t = default_toc;
2374 }
99a814a1 2375 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2376 {
2377 t = data_in_toc;
2378 }
99a814a1 2379 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2380 {
2381 t = must_be_32;
2382 }
99a814a1 2383 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2384 {
2385 t = must_be_64;
2386 }
2387 else
2388 {
2389 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2390 *input_line_pointer = c;
2391 input_line_pointer = start;
252b5132
RH		 2392 return 0;
2393 }
2394
99a814a1
AM		 2395 /* Now find the ']'. */
2396 *input_line_pointer = c;
252b5132 2397
81d4177b
KH		 2398 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2399 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2400
2401 if (c != ']')
2402 {
2403 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2404 input_line_pointer = start;
252b5132
RH		 2405 return 0;
2406 }
2407
99a814a1 2408 *toc_kind = t;
252b5132
RH		 2409 return 1;
2410}
2411#endif
2412\f
2413
dc1d03fc 2414#ifdef OBJ_ELF
6a0c61b7
EZ		 2415#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2416static void
98027b10 2417ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2418{
2419 unsigned int i;
2420
2421 /* Check we don't already exist. */
2422 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2423 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2424 return;
b34976b6 2425
6a0c61b7
EZ		 2426 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2427 {
2428 if (ppc_apuinfo_num_alloc == 0)
2429 {
2430 ppc_apuinfo_num_alloc = 4;
2431 ppc_apuinfo_list = (unsigned long *)
2432 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2433 }
2434 else
2435 {
2436 ppc_apuinfo_num_alloc += 4;
2437 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2438 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2439 }
2440 }
dc1d03fc 2441 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2442}
2443#undef APUID
dc1d03fc 2444#endif
6a0c61b7
EZ		 2445\f
2446
252b5132
RH		 2447/* We need to keep a list of fixups. We can't simply generate them as
2448 we go, because that would require us to first create the frag, and
2449 that would screw up references to ``.''. */
2450
2451struct ppc_fixup
2452{
2453 expressionS exp;
2454 int opindex;
2455 bfd_reloc_code_real_type reloc;
2456};
2457
2458#define MAX_INSN_FIXUPS (5)
2459
2460/* This routine is called for each instruction to be assembled. */
2461
2462void
98027b10 2463md_assemble (char *str)
252b5132
RH		 2464{
2465 char *s;
2466 const struct powerpc_opcode *opcode;
2467 unsigned long insn;
2468 const unsigned char *opindex_ptr;
2469 int skip_optional;
2470 int need_paren;
2471 int next_opindex;
2472 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2473 int fc;
2474 char *f;
09b935ac 2475 int addr_mod;
252b5132
RH		 2476 int i;
2477#ifdef OBJ_ELF
2478 bfd_reloc_code_real_type reloc;
2479#endif
2480
2481 /* Get the opcode. */
3882b010 2482 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2483 ;
2484 if (*s != '\0')
2485 *s++ = '\0';
2486
2487 /* Look up the opcode in the hash table. */
2488 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2489 if (opcode == (const struct powerpc_opcode *) NULL)
2490 {
2491 const struct powerpc_macro *macro;
2492
2493 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2494 if (macro == (const struct powerpc_macro *) NULL)
2495 as_bad (_("Unrecognized opcode: `%s'"), str);
2496 else
2497 ppc_macro (s, macro);
2498
2499 return;
2500 }
2501
2502 insn = opcode->opcode;
2503
2504 str = s;
3882b010 2505 while (ISSPACE (*str))
252b5132
RH		 2506 ++str;
2507
2508 /* PowerPC operands are just expressions. The only real issue is
2509 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2510 an optional operand separate the operands only with commas (in some
2511 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2512 have optional operands). Most instructions with optional operands
2513 have only one. Those that have more than one optional operand can
2514 take either all their operands or none. So, before we start seriously
2515 parsing the operands, we check to see if we have optional operands,
2516 and if we do, we count the number of commas to see which operands
2517 have been omitted. */
252b5132
RH		 2518 skip_optional = 0;
2519 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2520 {
2521 const struct powerpc_operand *operand;
2522
2523 operand = &powerpc_operands[*opindex_ptr];
2524 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2525 {
2526 unsigned int opcount;
7fe9cf6b
NC		 2527 unsigned int num_operands_expected;
2528 unsigned int i;
252b5132
RH		 2529
2530 /* There is an optional operand. Count the number of
2531 commas in the input line. */
2532 if (*str == '\0')
2533 opcount = 0;
2534 else
2535 {
2536 opcount = 1;
2537 s = str;
2538 while ((s = strchr (s, ',')) != (char *) NULL)
2539 {
2540 ++opcount;
2541 ++s;
2542 }
2543 }
2544
7fe9cf6b
NC		 2545 /* Compute the number of expected operands.
2546 Do not count fake operands. */
2547 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2548 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2549 ++ num_operands_expected;
2550
252b5132
RH		 2551 /* If there are fewer operands in the line then are called
2552 for by the instruction, we want to skip the optional
1f6c9eb0 2553 operands. */
7fe9cf6b 2554 if (opcount < num_operands_expected)
252b5132
RH		 2555 skip_optional = 1;
2556
2557 break;
2558 }
2559 }
2560
2561 /* Gather the operands. */
2562 need_paren = 0;
2563 next_opindex = 0;
2564 fc = 0;
2565 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2566 {
2567 const struct powerpc_operand *operand;
2568 const char *errmsg;
2569 char *hold;
2570 expressionS ex;
2571 char endc;
2572
2573 if (next_opindex == 0)
2574 operand = &powerpc_operands[*opindex_ptr];
2575 else
2576 {
2577 operand = &powerpc_operands[next_opindex];
2578 next_opindex = 0;
2579 }
252b5132
RH		 2580 errmsg = NULL;
2581
2582 /* If this is a fake operand, then we do not expect anything
2583 from the input. */
2584 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2585 {
2b3c4602 2586 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2587 if (errmsg != (const char *) NULL)
ee2c9aa9 2588 as_bad ("%s", errmsg);
252b5132
RH		 2589 continue;
2590 }
2591
2592 /* If this is an optional operand, and we are skipping it, just
2593 insert a zero. */
2594 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2595 && skip_optional)
2596 {
2597 if (operand->insert)
2598 {
2b3c4602 2599 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2600 if (errmsg != (const char *) NULL)
ee2c9aa9 2601 as_bad ("%s", errmsg);
252b5132
RH		 2602 }
2603 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2604 next_opindex = *opindex_ptr + 1;
2605 continue;
2606 }
2607
2608 /* Gather the operand. */
2609 hold = input_line_pointer;
2610 input_line_pointer = str;
2611
2612#ifdef TE_PE
81d4177b 2613 if (*input_line_pointer == '[')
252b5132
RH		 2614 {
2615 /* We are expecting something like the second argument here:
99a814a1
AM		 2616 *
2617 * lwz r4,[toc].GS.0.static_int(rtoc)
2618 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2619 * The argument following the `]' must be a symbol name, and the
2620 * register must be the toc register: 'rtoc' or '2'
2621 *
2622 * The effect is to 0 as the displacement field
2623 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2624 * the appropriate variation) reloc against it based on the symbol.
2625 * The linker will build the toc, and insert the resolved toc offset.
2626 *
2627 * Note:
2628 * o The size of the toc entry is currently assumed to be
2629 * 32 bits. This should not be assumed to be a hard coded
2630 * number.
2631 * o In an effort to cope with a change from 32 to 64 bits,
2632 * there are also toc entries that are specified to be
2633 * either 32 or 64 bits:
2634 * lwz r4,[toc32].GS.0.static_int(rtoc)
2635 * lwz r4,[toc64].GS.0.static_int(rtoc)
2636 * These demand toc entries of the specified size, and the
2637 * instruction probably requires it.
2638 */
252b5132
RH		 2639
2640 int valid_toc;
2641 enum toc_size_qualifier toc_kind;
2642 bfd_reloc_code_real_type toc_reloc;
2643
99a814a1
AM		 2644 /* Go parse off the [tocXX] part. */
2645 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2646
81d4177b 2647 if (!valid_toc)
252b5132 2648 {
99a814a1
AM		 2649 /* Note: message has already been issued.
2650 FIXME: what sort of recovery should we do?
2651 demand_rest_of_line (); return; ? */
252b5132
RH		 2652 }
2653
99a814a1
AM		 2654 /* Now get the symbol following the ']'. */
2655 expression (&ex);
252b5132
RH		 2656
2657 switch (toc_kind)
2658 {
2659 case default_toc:
99a814a1
AM		 2660 /* In this case, we may not have seen the symbol yet,
2661 since it is allowed to appear on a .extern or .globl
2662 or just be a label in the .data section. */
252b5132
RH		 2663 toc_reloc = BFD_RELOC_PPC_TOC16;
2664 break;
2665 case data_in_toc:
99a814a1
AM		 2666 /* 1. The symbol must be defined and either in the toc
2667 section, or a global.
2668 2. The reloc generated must have the TOCDEFN flag set
2669 in upper bit mess of the reloc type.
2670 FIXME: It's a little confusing what the tocv
2671 qualifier can be used for. At the very least, I've
2672 seen three uses, only one of which I'm sure I can
2673 explain. */
81d4177b
KH		 2674 if (ex.X_op == O_symbol)
2675 {
252b5132 2676 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2677 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2678 != tocdata_section)
252b5132 2679 {
99a814a1 2680 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2681 }
2682 }
2683
2684 toc_reloc = BFD_RELOC_PPC_TOC16;
2685 break;
2686 case must_be_32:
99a814a1
AM		 2687 /* FIXME: these next two specifically specify 32/64 bit
2688 toc entries. We don't support them today. Is this
2689 the right way to say that? */
252b5132
RH		 2690 toc_reloc = BFD_RELOC_UNUSED;
2691 as_bad (_("Unimplemented toc32 expression modifier"));
2692 break;
2693 case must_be_64:
99a814a1 2694 /* FIXME: see above. */
252b5132
RH		 2695 toc_reloc = BFD_RELOC_UNUSED;
2696 as_bad (_("Unimplemented toc64 expression modifier"));
2697 break;
2698 default:
bc805888 2699 fprintf (stderr,
99a814a1
AM		 2700 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2701 toc_kind);
bc805888 2702 abort ();
252b5132
RH		 2703 break;
2704 }
2705
2706 /* We need to generate a fixup for this expression. */
2707 if (fc >= MAX_INSN_FIXUPS)
2708 as_fatal (_("too many fixups"));
2709
2710 fixups[fc].reloc = toc_reloc;
2711 fixups[fc].exp = ex;
2712 fixups[fc].opindex = *opindex_ptr;
2713 ++fc;
2714
99a814a1
AM		 2715 /* Ok. We've set up the fixup for the instruction. Now make it
2716 look like the constant 0 was found here. */
252b5132
RH		 2717 ex.X_unsigned = 1;
2718 ex.X_op = O_constant;
2719 ex.X_add_number = 0;
2720 ex.X_add_symbol = NULL;
2721 ex.X_op_symbol = NULL;
2722 }
2723
2724 else
2725#endif /* TE_PE */
2726 {
2ad068be
AM		 2727 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2728 || !register_name (&ex))
252b5132 2729 {
13abbae3
AM		 2730 char save_lex = lex_type['%'];
2731
252b5132 2732 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2733 {
2734 cr_operand = TRUE;
2735 lex_type['%'] |= LEX_BEGIN_NAME;
2736 }
252b5132 2737 expression (&ex);
b34976b6 2738 cr_operand = FALSE;
13abbae3 2739 lex_type['%'] = save_lex;
252b5132
RH		 2740 }
2741 }
2742
2743 str = input_line_pointer;
2744 input_line_pointer = hold;
2745
2746 if (ex.X_op == O_illegal)
2747 as_bad (_("illegal operand"));
2748 else if (ex.X_op == O_absent)
2749 as_bad (_("missing operand"));
2750 else if (ex.X_op == O_register)
2751 {
2752 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2753 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2754 }
2755 else if (ex.X_op == O_constant)
2756 {
2757#ifdef OBJ_ELF
81d4177b 2758 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2759 char *orig_str = str;
2760
2761 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2762 switch (reloc)
2763 {
2764 default:
2765 str = orig_str;
2766 break;
2767
2768 case BFD_RELOC_LO16:
2769 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2770 something which cleared it, we always produce a
2771 signed value. */
2772 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2773 ex.X_add_number &= 0xffff;
2774 else
0baf16f2 2775 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2776 break;
2777
2778 case BFD_RELOC_HI16:
0baf16f2
AM		 2779 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2780 ex.X_add_number = PPC_HI (ex.X_add_number);
2781 else
2782 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2783 break;
2784
2785 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2786 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2787 ex.X_add_number = PPC_HA (ex.X_add_number);
2788 else
2789 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2790 break;
2791
0baf16f2
AM		 2792 case BFD_RELOC_PPC64_HIGHER:
2793 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2794 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2795 else
2796 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2797 break;
2798
2799 case BFD_RELOC_PPC64_HIGHER_S:
2800 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2801 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2802 else
2803 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2804 break;
0baf16f2
AM		 2805
2806 case BFD_RELOC_PPC64_HIGHEST:
2807 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2808 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2809 else
2810 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2811 break;
2812
2813 case BFD_RELOC_PPC64_HIGHEST_S:
2814 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2815 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2816 else
2817 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2818 break;
252b5132 2819 }
0baf16f2 2820#endif /* OBJ_ELF */
252b5132 2821 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2822 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2823 }
2824#ifdef OBJ_ELF
727fc41e 2825 else
252b5132 2826 {
727fc41e 2827 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2828 {
727fc41e
AM		 2829 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2830 if (sym_name[0] == '.')
2831 ++sym_name;
cdba85ec 2832
727fc41e 2833 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2834 {
727fc41e
AM		 2835 expressionS tls_exp;
2836
2837 hold = input_line_pointer;
2838 input_line_pointer = str + 1;
2839 expression (&tls_exp);
2840 if (tls_exp.X_op == O_symbol)
2841 {
2842 reloc = BFD_RELOC_UNUSED;
2843 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2844 {
2845 reloc = BFD_RELOC_PPC_TLSGD;
2846 input_line_pointer += 7;
2847 }
2848 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2849 {
2850 reloc = BFD_RELOC_PPC_TLSLD;
2851 input_line_pointer += 7;
2852 }
2853 if (reloc != BFD_RELOC_UNUSED)
2854 {
2855 SKIP_WHITESPACE ();
2856 str = input_line_pointer;
2857
2858 if (fc >= MAX_INSN_FIXUPS)
2859 as_fatal (_("too many fixups"));
2860 fixups[fc].exp = tls_exp;
2861 fixups[fc].opindex = *opindex_ptr;
2862 fixups[fc].reloc = reloc;
2863 ++fc;
2864 }
2865 }
2866 input_line_pointer = hold;
252b5132
RH		 2867 }
2868 }
2869
727fc41e 2870 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2871 {
727fc41e 2872 /* Some TLS tweaks. */
0baf16f2
AM		 2873 switch (reloc)
2874 {
727fc41e 2875 default:
cdba85ec 2876 break;
727fc41e
AM		 2877
2878 case BFD_RELOC_PPC_TLS:
2879 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2880 ppc_cpu, (char *) NULL, 0);
cdba85ec 2881 break;
727fc41e
AM		 2882
2883 /* We'll only use the 32 (or 64) bit form of these relocations
2884 in constants. Instructions get the 16 bit form. */
2885 case BFD_RELOC_PPC_DTPREL:
2886 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2887 break;
727fc41e
AM		 2888 case BFD_RELOC_PPC_TPREL:
2889 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2890 break;
2891 }
727fc41e
AM		 2892
2893 /* For the absolute forms of branches, convert the PC
2894 relative form back into the absolute. */
2895 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2896 {
2897 switch (reloc)
2898 {
2899 case BFD_RELOC_PPC_B26:
2900 reloc = BFD_RELOC_PPC_BA26;
2901 break;
2902 case BFD_RELOC_PPC_B16:
2903 reloc = BFD_RELOC_PPC_BA16;
2904 break;
2905 case BFD_RELOC_PPC_B16_BRTAKEN:
2906 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2907 break;
2908 case BFD_RELOC_PPC_B16_BRNTAKEN:
2909 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2910 break;
2911 default:
2912 break;
2913 }
2914 }
2915
2916 if (ppc_obj64
2917 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2918 {
2919 switch (reloc)
2920 {
2921 case BFD_RELOC_16:
2922 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2923 break;
2924 case BFD_RELOC_LO16:
2925 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2926 break;
2927 case BFD_RELOC_16_GOTOFF:
2928 reloc = BFD_RELOC_PPC64_GOT16_DS;
2929 break;
2930 case BFD_RELOC_LO16_GOTOFF:
2931 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2932 break;
2933 case BFD_RELOC_LO16_PLTOFF:
2934 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2935 break;
2936 case BFD_RELOC_16_BASEREL:
2937 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2938 break;
2939 case BFD_RELOC_LO16_BASEREL:
2940 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2941 break;
2942 case BFD_RELOC_PPC_TOC16:
2943 reloc = BFD_RELOC_PPC64_TOC16_DS;
2944 break;
2945 case BFD_RELOC_PPC64_TOC16_LO:
2946 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2947 break;
2948 case BFD_RELOC_PPC64_PLTGOT16:
2949 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2950 break;
2951 case BFD_RELOC_PPC64_PLTGOT16_LO:
2952 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2953 break;
2954 case BFD_RELOC_PPC_DTPREL16:
2955 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2956 break;
2957 case BFD_RELOC_PPC_DTPREL16_LO:
2958 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2959 break;
2960 case BFD_RELOC_PPC_TPREL16:
2961 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2962 break;
2963 case BFD_RELOC_PPC_TPREL16_LO:
2964 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2965 break;
2966 case BFD_RELOC_PPC_GOT_DTPREL16:
2967 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2968 case BFD_RELOC_PPC_GOT_TPREL16:
2969 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2970 break;
2971 default:
2972 as_bad (_("unsupported relocation for DS offset field"));
2973 break;
2974 }
2975 }
0baf16f2
AM		 2976 }
2977
252b5132
RH		 2978 /* We need to generate a fixup for this expression. */
2979 if (fc >= MAX_INSN_FIXUPS)
2980 as_fatal (_("too many fixups"));
2981 fixups[fc].exp = ex;
727fc41e 2982 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2983 fixups[fc].reloc = reloc;
2984 ++fc;
2985 }
727fc41e 2986#else /* OBJ_ELF */
252b5132
RH		 2987 else
2988 {
2989 /* We need to generate a fixup for this expression. */
2990 if (fc >= MAX_INSN_FIXUPS)
2991 as_fatal (_("too many fixups"));
2992 fixups[fc].exp = ex;
2993 fixups[fc].opindex = *opindex_ptr;
2994 fixups[fc].reloc = BFD_RELOC_UNUSED;
2995 ++fc;
2996 }
727fc41e 2997#endif /* OBJ_ELF */
252b5132
RH		 2998
2999 if (need_paren)
3000 {
3001 endc = ')';
3002 need_paren = 0;
c3d65c1c
BE		 3003 /* If expecting more operands, then we want to see "),". */
3004 if (*str == endc && opindex_ptr[1] != 0)
3005 {
3006 do
3007 ++str;
3008 while (ISSPACE (*str));
3009 endc = ',';
3010 }
252b5132
RH		 3011 }
3012 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3013 {
3014 endc = '(';
3015 need_paren = 1;
3016 }
3017 else
3018 endc = ',';
3019
3020 /* The call to expression should have advanced str past any
3021 whitespace. */
3022 if (*str != endc
3023 && (endc != ',' || *str != '\0'))
3024 {
3025 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
3026 break;
3027 }
3028
3029 if (*str != '\0')
3030 ++str;
3031 }
3032
3882b010 3033 while (ISSPACE (*str))
252b5132
RH		 3034 ++str;
3035
3036 if (*str != '\0')
3037 as_bad (_("junk at end of line: `%s'"), str);
3038
dc1d03fc 3039#ifdef OBJ_ELF
6a0c61b7 3040 /* Do we need/want a APUinfo section? */
ed84b57b 3041 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 3042 {
3043 /* These are all version "1". */
3044 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3045 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3046 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3047 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3048 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3049 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3050 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3051 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3052 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3053 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3054 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3055 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3056 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3057 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 3058 }
dc1d03fc 3059#endif
6a0c61b7 3060
252b5132
RH		 3061 /* Write out the instruction. */
3062 f = frag_more (4);
09b935ac
AM		 3063 addr_mod = frag_now_fix () & 3;
3064 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3065 as_bad (_("instruction address is not a multiple of 4"));
3066 frag_now->insn_addr = addr_mod;
3067 frag_now->has_code = 1;
252b5132
RH		 3068 md_number_to_chars (f, insn, 4);
3069
5d6f4f16
GK		 3070#ifdef OBJ_ELF
3071 dwarf2_emit_insn (4);
3072#endif
3073
252b5132
RH		 3074 /* Create any fixups. At this point we do not use a
3075 bfd_reloc_code_real_type, but instead just use the
3076 BFD_RELOC_UNUSED plus the operand index. This lets us easily
3077 handle fixups for any operand type, although that is admittedly
3078 not a very exciting feature. We pick a BFD reloc type in
55cf6793 3079 md_apply_fix. */
252b5132
RH		 3080 for (i = 0; i < fc; i++)
3081 {
252b5132
RH		 3082 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3083 {
99a814a1 3084 reloc_howto_type *reloc_howto;
252b5132
RH		 3085 int size;
3086 int offset;
3087 fixS *fixP;
3088
99a814a1 3089 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3090 if (!reloc_howto)
3091 abort ();
3092
3093 size = bfd_get_reloc_size (reloc_howto);
3094 offset = target_big_endian ? (4 - size) : 0;
3095
3096 if (size < 1 || size > 4)
bc805888 3097 abort ();
252b5132 3098
99a814a1
AM		 3099 fixP = fix_new_exp (frag_now,
3100 f - frag_now->fr_literal + offset,
3101 size,
3102 &fixups[i].exp,
3103 reloc_howto->pc_relative,
252b5132
RH		 3104 fixups[i].reloc);
3105
3106 /* Turn off complaints that the addend is too large for things like
3107 foo+100000@ha. */
3108 switch (fixups[i].reloc)
3109 {
3110 case BFD_RELOC_16_GOTOFF:
3111 case BFD_RELOC_PPC_TOC16:
3112 case BFD_RELOC_LO16:
3113 case BFD_RELOC_HI16:
3114 case BFD_RELOC_HI16_S:
0baf16f2 3115#ifdef OBJ_ELF
0baf16f2
AM		 3116 case BFD_RELOC_PPC64_HIGHER:
3117 case BFD_RELOC_PPC64_HIGHER_S:
3118 case BFD_RELOC_PPC64_HIGHEST:
3119 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3120#endif
252b5132
RH		 3121 fixP->fx_no_overflow = 1;
3122 break;
3123 default:
3124 break;
3125 }
3126 }
3127 else
727fc41e
AM		 3128 {
3129 const struct powerpc_operand *operand;
3130
3131 operand = &powerpc_operands[fixups[i].opindex];
3132 fix_new_exp (frag_now,
3133 f - frag_now->fr_literal,
3134 4,
3135 &fixups[i].exp,
3136 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3137 ((bfd_reloc_code_real_type)
3138 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3139 }
252b5132
RH		 3140 }
3141}
3142
3143/* Handle a macro. Gather all the operands, transform them as
3144 described by the macro, and call md_assemble recursively. All the
3145 operands are separated by commas; we don't accept parentheses
3146 around operands here. */
3147
3148static void
98027b10 3149ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3150{
3151 char *operands[10];
3152 unsigned int count;
3153 char *s;
3154 unsigned int len;
3155 const char *format;
db557034 3156 unsigned int arg;
252b5132
RH		 3157 char *send;
3158 char *complete;
3159
3160 /* Gather the users operands into the operands array. */
3161 count = 0;
3162 s = str;
3163 while (1)
3164 {
3165 if (count >= sizeof operands / sizeof operands[0])
3166 break;
3167 operands[count++] = s;
3168 s = strchr (s, ',');
3169 if (s == (char *) NULL)
3170 break;
3171 *s++ = '\0';
81d4177b 3172 }
252b5132
RH		 3173
3174 if (count != macro->operands)
3175 {
3176 as_bad (_("wrong number of operands"));
3177 return;
3178 }
3179
3180 /* Work out how large the string must be (the size is unbounded
3181 because it includes user input). */
3182 len = 0;
3183 format = macro->format;
3184 while (*format != '\0')
3185 {
3186 if (*format != '%')
3187 {
3188 ++len;
3189 ++format;
3190 }
3191 else
3192 {
3193 arg = strtol (format + 1, &send, 10);
db557034 3194 know (send != format && arg < count);
252b5132
RH		 3195 len += strlen (operands[arg]);
3196 format = send;
3197 }
3198 }
3199
3200 /* Put the string together. */
3201 complete = s = (char *) alloca (len + 1);
3202 format = macro->format;
3203 while (*format != '\0')
3204 {
3205 if (*format != '%')
3206 *s++ = *format++;
3207 else
3208 {
3209 arg = strtol (format + 1, &send, 10);
3210 strcpy (s, operands[arg]);
3211 s += strlen (s);
3212 format = send;
3213 }
3214 }
3215 *s = '\0';
3216
3217 /* Assemble the constructed instruction. */
3218 md_assemble (complete);
81d4177b 3219}
252b5132
RH		 3220\f
3221#ifdef OBJ_ELF
99a814a1 3222/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3223
01e1a5bc 3224bfd_vma
98027b10 3225ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3226{
3227 if (letter == 'e')
3228 return SHF_EXCLUDE;
3229
13ae64f3 3230 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3231 return -1;
252b5132
RH		 3232}
3233
01e1a5bc 3234bfd_vma
98027b10 3235ppc_section_word (char *str, size_t len)
252b5132 3236{
9de8d8f1
RH		 3237 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3238 return SHF_EXCLUDE;
252b5132 3239
9de8d8f1 3240 return -1;
252b5132
RH		 3241}
3242
3243int
98027b10 3244ppc_section_type (char *str, size_t len)
252b5132 3245{
9de8d8f1
RH		 3246 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3247 return SHT_ORDERED;
252b5132 3248
9de8d8f1 3249 return -1;
252b5132
RH		 3250}
3251
3252int
01e1a5bc 3253ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3254{
3255 if (type == SHT_ORDERED)
3256 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3257
3258 if (attr & SHF_EXCLUDE)
3259 flags |= SEC_EXCLUDE;
3260
3261 return flags;
3262}
3263#endif /* OBJ_ELF */
3264
3265\f
3266/* Pseudo-op handling. */
3267
3268/* The .byte pseudo-op. This is similar to the normal .byte
3269 pseudo-op, but it can also take a single ASCII string. */
3270
3271static void
98027b10 3272ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3273{
3274 if (*input_line_pointer != '\"')
3275 {
3276 cons (1);
3277 return;
3278 }
3279
3280 /* Gather characters. A real double quote is doubled. Unusual
3281 characters are not permitted. */
3282 ++input_line_pointer;
3283 while (1)
3284 {
3285 char c;
3286
3287 c = *input_line_pointer++;
3288
3289 if (c == '\"')
3290 {
3291 if (*input_line_pointer != '\"')
3292 break;
3293 ++input_line_pointer;
3294 }
3295
3296 FRAG_APPEND_1_CHAR (c);
3297 }
3298
3299 demand_empty_rest_of_line ();
3300}
3301\f
3302#ifdef OBJ_XCOFF
3303
3304/* XCOFF specific pseudo-op handling. */
3305
3306/* This is set if we are creating a .stabx symbol, since we don't want
3307 to handle symbol suffixes for such symbols. */
b34976b6 3308static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3309
3310/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3311 symbols in the .bss segment as though they were local common
67c1ffbe 3312 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3313 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3314
3315static void
98027b10 3316ppc_comm (int lcomm)
252b5132
RH		 3317{
3318 asection *current_seg = now_seg;
3319 subsegT current_subseg = now_subseg;
3320 char *name;
3321 char endc;
3322 char *end_name;
3323 offsetT size;
3324 offsetT align;
3325 symbolS *lcomm_sym = NULL;
3326 symbolS *sym;
3327 char *pfrag;
3328
3329 name = input_line_pointer;
3330 endc = get_symbol_end ();
3331 end_name = input_line_pointer;
3332 *end_name = endc;
3333
3334 if (*input_line_pointer != ',')
3335 {
3336 as_bad (_("missing size"));
3337 ignore_rest_of_line ();
3338 return;
3339 }
3340 ++input_line_pointer;
3341
3342 size = get_absolute_expression ();
3343 if (size < 0)
3344 {
3345 as_bad (_("negative size"));
3346 ignore_rest_of_line ();
3347 return;
3348 }
3349
3350 if (! lcomm)
3351 {
3352 /* The third argument to .comm is the alignment. */
3353 if (*input_line_pointer != ',')
1ad63b2f 3354 align = 2;
252b5132
RH		 3355 else
3356 {
3357 ++input_line_pointer;
3358 align = get_absolute_expression ();
3359 if (align <= 0)
3360 {
3361 as_warn (_("ignoring bad alignment"));
1ad63b2f 3362 align = 2;
252b5132
RH		 3363 }
3364 }
3365 }
3366 else
3367 {
3368 char *lcomm_name;
3369 char lcomm_endc;
3370
1ad63b2f 3371 if (size <= 4)
252b5132
RH		 3372 align = 2;
3373 else
3374 align = 3;
3375
3376 /* The third argument to .lcomm appears to be the real local
3377 common symbol to create. References to the symbol named in
3378 the first argument are turned into references to the third
3379 argument. */
3380 if (*input_line_pointer != ',')
3381 {
3382 as_bad (_("missing real symbol name"));
3383 ignore_rest_of_line ();
3384 return;
3385 }
3386 ++input_line_pointer;
3387
3388 lcomm_name = input_line_pointer;
3389 lcomm_endc = get_symbol_end ();
81d4177b 3390
252b5132
RH		 3391 lcomm_sym = symbol_find_or_make (lcomm_name);
3392
3393 *input_line_pointer = lcomm_endc;
3394 }
3395
3396 *end_name = '\0';
3397 sym = symbol_find_or_make (name);
3398 *end_name = endc;
3399
3400 if (S_IS_DEFINED (sym)
3401 || S_GET_VALUE (sym) != 0)
3402 {
3403 as_bad (_("attempt to redefine symbol"));
3404 ignore_rest_of_line ();
3405 return;
3406 }
81d4177b 3407
252b5132 3408 record_alignment (bss_section, align);
81d4177b 3409
252b5132
RH		 3410 if (! lcomm
3411 || ! S_IS_DEFINED (lcomm_sym))
3412 {
3413 symbolS *def_sym;
3414 offsetT def_size;
3415
3416 if (! lcomm)
3417 {
3418 def_sym = sym;
3419 def_size = size;
3420 S_SET_EXTERNAL (sym);
3421 }
3422 else
3423 {
809ffe0d 3424 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3425 def_sym = lcomm_sym;
3426 def_size = 0;
3427 }
3428
3429 subseg_set (bss_section, 1);
3430 frag_align (align, 0, 0);
81d4177b 3431
809ffe0d 3432 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3433 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3434 def_size, (char *) NULL);
3435 *pfrag = 0;
3436 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3437 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3438 }
3439 else if (lcomm)
3440 {
3441 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3442 symbol_get_frag (lcomm_sym)->fr_offset =
3443 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3444 &~ ((1 << align) - 1));
809ffe0d
ILT		 3445 if (align > symbol_get_tc (lcomm_sym)->align)
3446 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3447 }
3448
3449 if (lcomm)
3450 {
3451 /* Make sym an offset from lcomm_sym. */
3452 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3453 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3454 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3455 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3456 }
3457
3458 subseg_set (current_seg, current_subseg);
3459
3460 demand_empty_rest_of_line ();
3461}
3462
3463/* The .csect pseudo-op. This switches us into a different
3464 subsegment. The first argument is a symbol whose value is the
3465 start of the .csect. In COFF, csect symbols get special aux
3466 entries defined by the x_csect field of union internal_auxent. The
3467 optional second argument is the alignment (the default is 2). */
3468
3469static void
98027b10 3470ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3471{
3472 char *name;
3473 char endc;
3474 symbolS *sym;
931e13a6 3475 offsetT align;
252b5132
RH		 3476
3477 name = input_line_pointer;
3478 endc = get_symbol_end ();
81d4177b 3479
252b5132
RH		 3480 sym = symbol_find_or_make (name);
3481
3482 *input_line_pointer = endc;
3483
3484 if (S_GET_NAME (sym)[0] == '\0')
3485 {
3486 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3487 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3488 }
3489
931e13a6 3490 align = 2;
252b5132
RH		 3491 if (*input_line_pointer == ',')
3492 {
3493 ++input_line_pointer;
931e13a6 3494 align = get_absolute_expression ();
252b5132
RH		 3495 }
3496
931e13a6
AM		 3497 ppc_change_csect (sym, align);
3498
252b5132
RH		 3499 demand_empty_rest_of_line ();
3500}
3501
3502/* Change to a different csect. */
3503
3504static void
98027b10 3505ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3506{
3507 if (S_IS_DEFINED (sym))
809ffe0d 3508 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3509 else
3510 {
3511 symbolS **list_ptr;
3512 int after_toc;
3513 int hold_chunksize;
3514 symbolS *list;
931e13a6
AM		 3515 int is_code;
3516 segT sec;
252b5132
RH		 3517
3518 /* This is a new csect. We need to look at the symbol class to
3519 figure out whether it should go in the text section or the
3520 data section. */
3521 after_toc = 0;
931e13a6 3522 is_code = 0;
809ffe0d 3523 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3524 {
3525 case XMC_PR:
3526 case XMC_RO:
3527 case XMC_DB:
3528 case XMC_GL:
3529 case XMC_XO:
3530 case XMC_SV:
3531 case XMC_TI:
3532 case XMC_TB:
3533 S_SET_SEGMENT (sym, text_section);
809ffe0d 3534 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3535 ++ppc_text_subsegment;
3536 list_ptr = &ppc_text_csects;
931e13a6 3537 is_code = 1;
252b5132
RH		 3538 break;
3539 case XMC_RW:
3540 case XMC_TC0:
3541 case XMC_TC:
3542 case XMC_DS:
3543 case XMC_UA:
3544 case XMC_BS:
3545 case XMC_UC:
3546 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3547 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3548 == ppc_data_subsegment))
252b5132
RH		 3549 after_toc = 1;
3550 S_SET_SEGMENT (sym, data_section);
809ffe0d 3551 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3552 ++ppc_data_subsegment;
3553 list_ptr = &ppc_data_csects;
3554 break;
3555 default:
3556 abort ();
3557 }
3558
3559 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3560 changing subsegments, so that we don't use a lot of memory
3561 space for what may be a small section. */
252b5132
RH		 3562 hold_chunksize = chunksize;
3563 chunksize = 64;
3564
931e13a6
AM		 3565 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3566 symbol_get_tc (sym)->subseg);
252b5132
RH		 3567
3568 chunksize = hold_chunksize;
3569
3570 if (after_toc)
3571 ppc_after_toc_frag = frag_now;
3572
931e13a6
AM		 3573 record_alignment (sec, align);
3574 if (is_code)
3575 frag_align_code (align, 0);
3576 else
3577 frag_align (align, 0, 0);
3578
809ffe0d 3579 symbol_set_frag (sym, frag_now);
252b5132
RH		 3580 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3581
931e13a6 3582 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3583 symbol_get_tc (sym)->output = 1;
3584 symbol_get_tc (sym)->within = sym;
81d4177b 3585
252b5132 3586 for (list = *list_ptr;
809ffe0d
ILT		 3587 symbol_get_tc (list)->next != (symbolS *) NULL;
3588 list = symbol_get_tc (list)->next)
252b5132 3589 ;
809ffe0d 3590 symbol_get_tc (list)->next = sym;
81d4177b 3591
252b5132 3592 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3593 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3594 &symbol_lastP);
252b5132
RH		 3595 }
3596
3597 ppc_current_csect = sym;
3598}
3599
3600/* This function handles the .text and .data pseudo-ops. These
3601 pseudo-ops aren't really used by XCOFF; we implement them for the
3602 convenience of people who aren't used to XCOFF. */
3603
3604static void
98027b10 3605ppc_section (int type)
252b5132
RH		 3606{
3607 const char *name;
3608 symbolS *sym;
3609
3610 if (type == 't')
3611 name = ".text[PR]";
3612 else if (type == 'd')
3613 name = ".data[RW]";
3614 else
3615 abort ();
3616
3617 sym = symbol_find_or_make (name);
3618
931e13a6 3619 ppc_change_csect (sym, 2);
252b5132
RH		 3620
3621 demand_empty_rest_of_line ();
3622}
3623
3624/* This function handles the .section pseudo-op. This is mostly to
3625 give an error, since XCOFF only supports .text, .data and .bss, but
3626 we do permit the user to name the text or data section. */
3627
3628static void
98027b10 3629ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3630{
3631 char *user_name;
3632 const char *real_name;
3633 char c;
3634 symbolS *sym;
3635
3636 user_name = input_line_pointer;
3637 c = get_symbol_end ();
3638
3639 if (strcmp (user_name, ".text") == 0)
3640 real_name = ".text[PR]";
3641 else if (strcmp (user_name, ".data") == 0)
3642 real_name = ".data[RW]";
3643 else
3644 {
3645 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3646 *input_line_pointer = c;
3647 ignore_rest_of_line ();
3648 return;
3649 }
3650
3651 *input_line_pointer = c;
3652
3653 sym = symbol_find_or_make (real_name);
3654
931e13a6 3655 ppc_change_csect (sym, 2);
252b5132
RH		 3656
3657 demand_empty_rest_of_line ();
3658}
3659
3660/* The .extern pseudo-op. We create an undefined symbol. */
3661
3662static void
98027b10 3663ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3664{
3665 char *name;
3666 char endc;
3667
3668 name = input_line_pointer;
3669 endc = get_symbol_end ();
3670
3671 (void) symbol_find_or_make (name);
3672
3673 *input_line_pointer = endc;
3674
3675 demand_empty_rest_of_line ();
3676}
3677
3678/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3679
3680static void
98027b10 3681ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3682{
3683 char *name;
3684 char endc;
3685 symbolS *sym;
3686
3687 name = input_line_pointer;
3688 endc = get_symbol_end ();
3689
3690 sym = symbol_find_or_make (name);
3691
3692 *input_line_pointer = endc;
3693
809ffe0d 3694 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3695
3696 demand_empty_rest_of_line ();
3697}
3698
3699/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3700 although I don't know why it bothers. */
3701
3702static void
98027b10 3703ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3704{
3705 char *name;
3706 char endc;
3707 symbolS *sym;
3708 int len;
3709
3710 name = input_line_pointer;
3711 endc = get_symbol_end ();
3712
3713 sym = symbol_find_or_make (name);
3714
3715 *input_line_pointer = endc;
3716
3717 if (*input_line_pointer != ',')
3718 {
3719 as_bad (_("missing rename string"));
3720 ignore_rest_of_line ();
3721 return;
3722 }
3723 ++input_line_pointer;
3724
809ffe0d 3725 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3726
3727 demand_empty_rest_of_line ();
3728}
3729
3730/* The .stabx pseudo-op. This is similar to a normal .stabs
3731 pseudo-op, but slightly different. A sample is
3732 .stabx "main:F-1",.main,142,0
3733 The first argument is the symbol name to create. The second is the
3734 value, and the third is the storage class. The fourth seems to be
3735 always zero, and I am assuming it is the type. */
3736
3737static void
98027b10 3738ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3739{
3740 char *name;
3741 int len;
3742 symbolS *sym;
3743 expressionS exp;
3744
3745 name = demand_copy_C_string (&len);
3746
3747 if (*input_line_pointer != ',')
3748 {
3749 as_bad (_("missing value"));
3750 return;
3751 }
3752 ++input_line_pointer;
3753
b34976b6 3754 ppc_stab_symbol = TRUE;
252b5132 3755 sym = symbol_make (name);
b34976b6 3756 ppc_stab_symbol = FALSE;
252b5132 3757
809ffe0d 3758 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3759
3760 (void) expression (&exp);
3761
3762 switch (exp.X_op)
3763 {
3764 case O_illegal:
3765 case O_absent:
3766 case O_big:
3767 as_bad (_("illegal .stabx expression; zero assumed"));
3768 exp.X_add_number = 0;
3769 /* Fall through. */
3770 case O_constant:
3771 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3772 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3773 break;
3774
3775 case O_symbol:
3776 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3777 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3778 else
3779 {
3780 S_SET_VALUE (sym,
3781 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3782 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3783 }
3784 break;
3785
3786 default:
3787 /* The value is some complex expression. This will probably
99a814a1
AM		 3788 fail at some later point, but this is probably the right
3789 thing to do here. */
809ffe0d 3790 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3791 break;
3792 }
3793
3794 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3795 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3796
3797 if (*input_line_pointer != ',')
3798 {
3799 as_bad (_("missing class"));
3800 return;
3801 }
3802 ++input_line_pointer;
3803
3804 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3805
3806 if (*input_line_pointer != ',')
3807 {
3808 as_bad (_("missing type"));
3809 return;
3810 }
3811 ++input_line_pointer;
3812
3813 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3814
809ffe0d 3815 symbol_get_tc (sym)->output = 1;
252b5132 3816
6877bb43 3817 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3818
809ffe0d 3819 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3820
41ea10b1 3821 /* In this case :
99a814a1 3822
41ea10b1
TR		 3823 .bs name
3824 .stabx "z",arrays_,133,0
3825 .es
99a814a1 3826
41ea10b1 3827 .comm arrays_,13768,3
99a814a1 3828
41ea10b1
TR		 3829 resolve_symbol_value will copy the exp's "within" into sym's when the
3830 offset is 0. Since this seems to be corner case problem,
3831 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3832 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3833
3834 if (exp.X_op == O_symbol)
41ea10b1
TR		 3835 {
3836 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3837 }
6877bb43 3838 }
99a814a1 3839
252b5132
RH		 3840 if (exp.X_op != O_symbol
3841 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3842 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3843 ppc_frob_label (sym);
3844 else
3845 {
3846 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3847 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3848 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3849 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3850 }
3851
3852 demand_empty_rest_of_line ();
3853}
3854
3855/* The .function pseudo-op. This takes several arguments. The first
3856 argument seems to be the external name of the symbol. The second
67c1ffbe 3857 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3858 uses the same name for both. I have no idea what the third and
3859 fourth arguments are meant to be. The optional fifth argument is
3860 an expression for the size of the function. In COFF this symbol
3861 gets an aux entry like that used for a csect. */
3862
3863static void
98027b10 3864ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3865{
3866 char *name;
3867 char endc;
3868 char *s;
3869 symbolS *ext_sym;
3870 symbolS *lab_sym;
3871
3872 name = input_line_pointer;
3873 endc = get_symbol_end ();
3874
3875 /* Ignore any [PR] suffix. */
3876 name = ppc_canonicalize_symbol_name (name);
3877 s = strchr (name, '[');
3878 if (s != (char *) NULL
3879 && strcmp (s + 1, "PR]") == 0)
3880 *s = '\0';
3881
3882 ext_sym = symbol_find_or_make (name);
3883
3884 *input_line_pointer = endc;
3885
3886 if (*input_line_pointer != ',')
3887 {
3888 as_bad (_("missing symbol name"));
3889 ignore_rest_of_line ();
3890 return;
3891 }
3892 ++input_line_pointer;
3893
3894 name = input_line_pointer;
3895 endc = get_symbol_end ();
3896
3897 lab_sym = symbol_find_or_make (name);
3898
3899 *input_line_pointer = endc;
3900
3901 if (ext_sym != lab_sym)
3902 {
809ffe0d
ILT		 3903 expressionS exp;
3904
3905 exp.X_op = O_symbol;
3906 exp.X_add_symbol = lab_sym;
3907 exp.X_op_symbol = NULL;
3908 exp.X_add_number = 0;
3909 exp.X_unsigned = 0;
3910 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3911 }
3912
809ffe0d
ILT		 3913 if (symbol_get_tc (ext_sym)->class == -1)
3914 symbol_get_tc (ext_sym)->class = XMC_PR;
3915 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3916
3917 if (*input_line_pointer == ',')
3918 {
3919 expressionS ignore;
3920
3921 /* Ignore the third argument. */
3922 ++input_line_pointer;
3923 expression (&ignore);
3924 if (*input_line_pointer == ',')
3925 {
3926 /* Ignore the fourth argument. */
3927 ++input_line_pointer;
3928 expression (&ignore);
3929 if (*input_line_pointer == ',')
3930 {
3931 /* The fifth argument is the function size. */
3932 ++input_line_pointer;
809ffe0d
ILT		 3933 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3934 absolute_section,
3935 (valueT) 0,
3936 &zero_address_frag);
3937 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3938 }
3939 }
3940 }
3941
3942 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3943 SF_SET_FUNCTION (ext_sym);
3944 SF_SET_PROCESS (ext_sym);
3945 coff_add_linesym (ext_sym);
3946
3947 demand_empty_rest_of_line ();
3948}
3949
3950/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3951 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3952 with the correct line number */
5d6255fe 3953
8642cce8 3954static symbolS *saved_bi_sym = 0;
252b5132
RH		 3955
3956static void
98027b10 3957ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3958{
3959 symbolS *sym;
3960
3961 sym = symbol_make (".bf");
3962 S_SET_SEGMENT (sym, text_section);
809ffe0d 3963 symbol_set_frag (sym, frag_now);
252b5132
RH		 3964 S_SET_VALUE (sym, frag_now_fix ());
3965 S_SET_STORAGE_CLASS (sym, C_FCN);
3966
3967 coff_line_base = get_absolute_expression ();
3968
3969 S_SET_NUMBER_AUXILIARY (sym, 1);
3970 SA_SET_SYM_LNNO (sym, coff_line_base);
3971
8642cce8 3972 /* Line number for bi. */
5d6255fe 3973 if (saved_bi_sym)
8642cce8
TR		 3974 {
3975 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3976 saved_bi_sym = 0;
3977 }
5d6255fe 3978
8642cce8 3979
809ffe0d 3980 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3981
3982 ppc_frob_label (sym);
3983
3984 demand_empty_rest_of_line ();
3985}
3986
3987/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3988 ".ef", except that the line number is absolute, not relative to the
3989 most recent ".bf" symbol. */
3990
3991static void
98027b10 3992ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3993{
3994 symbolS *sym;
3995
3996 sym = symbol_make (".ef");
3997 S_SET_SEGMENT (sym, text_section);
809ffe0d 3998 symbol_set_frag (sym, frag_now);
252b5132
RH		 3999 S_SET_VALUE (sym, frag_now_fix ());
4000 S_SET_STORAGE_CLASS (sym, C_FCN);
4001 S_SET_NUMBER_AUXILIARY (sym, 1);
4002 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4003 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4004
4005 ppc_frob_label (sym);
4006
4007 demand_empty_rest_of_line ();
4008}
4009
4010/* The .bi and .ei pseudo-ops. These take a string argument and
4011 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4012 the symbol list. The value of .bi will be know when the next .bf
4013 is encountered. */
252b5132
RH		 4014
4015static void
98027b10 4016ppc_biei (int ei)
252b5132
RH		 4017{
4018 static symbolS *last_biei;
4019
4020 char *name;
4021 int len;
4022 symbolS *sym;
4023 symbolS *look;
4024
4025 name = demand_copy_C_string (&len);
4026
4027 /* The value of these symbols is actually file offset. Here we set
4028 the value to the index into the line number entries. In
4029 ppc_frob_symbols we set the fix_line field, which will cause BFD
4030 to do the right thing. */
4031
4032 sym = symbol_make (name);
4033 /* obj-coff.c currently only handles line numbers correctly in the
4034 .text section. */
4035 S_SET_SEGMENT (sym, text_section);
4036 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4037 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4038
4039 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4040 symbol_get_tc (sym)->output = 1;
81d4177b 4041
8642cce8 4042 /* Save bi. */
5d6255fe 4043 if (ei)
8642cce8
TR		 4044 saved_bi_sym = 0;
4045 else
4046 saved_bi_sym = sym;
4047
252b5132
RH		 4048 for (look = last_biei ? last_biei : symbol_rootP;
4049 (look != (symbolS *) NULL
4050 && (S_GET_STORAGE_CLASS (look) == C_FILE
4051 || S_GET_STORAGE_CLASS (look) == C_BINCL
4052 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4053 look = symbol_next (look))
4054 ;
4055 if (look != (symbolS *) NULL)
4056 {
4057 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4058 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4059 last_biei = sym;
4060 }
4061
4062 demand_empty_rest_of_line ();
4063}
4064
4065/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4066 There is one argument, which is a csect symbol. The value of the
4067 .bs symbol is the index of this csect symbol. */
4068
4069static void
98027b10 4070ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4071{
4072 char *name;
4073 char endc;
4074 symbolS *csect;
4075 symbolS *sym;
4076
4077 if (ppc_current_block != NULL)
4078 as_bad (_("nested .bs blocks"));
4079
4080 name = input_line_pointer;
4081 endc = get_symbol_end ();
4082
4083 csect = symbol_find_or_make (name);
4084
4085 *input_line_pointer = endc;
4086
4087 sym = symbol_make (".bs");
4088 S_SET_SEGMENT (sym, now_seg);
4089 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4090 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4091 symbol_get_tc (sym)->output = 1;
252b5132 4092
809ffe0d 4093 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4094
4095 ppc_frob_label (sym);
4096
4097 ppc_current_block = sym;
4098
4099 demand_empty_rest_of_line ();
4100}
4101
4102/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4103
4104static void
98027b10 4105ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4106{
4107 symbolS *sym;
4108
4109 if (ppc_current_block == NULL)
4110 as_bad (_(".es without preceding .bs"));
4111
4112 sym = symbol_make (".es");
4113 S_SET_SEGMENT (sym, now_seg);
4114 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4115 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4116 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4117
4118 ppc_frob_label (sym);
4119
4120 ppc_current_block = NULL;
4121
4122 demand_empty_rest_of_line ();
4123}
4124
4125/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4126 line number. */
4127
4128static void
98027b10 4129ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4130{
4131 symbolS *sym;
4132
4133 sym = symbol_make (".bb");
4134 S_SET_SEGMENT (sym, text_section);
809ffe0d 4135 symbol_set_frag (sym, frag_now);
252b5132
RH		 4136 S_SET_VALUE (sym, frag_now_fix ());
4137 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4138
4139 S_SET_NUMBER_AUXILIARY (sym, 1);
4140 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4141
809ffe0d 4142 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4143
4144 SF_SET_PROCESS (sym);
4145
4146 ppc_frob_label (sym);
4147
4148 demand_empty_rest_of_line ();
4149}
4150
4151/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4152 line number. */
4153
4154static void
98027b10 4155ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4156{
4157 symbolS *sym;
4158
4159 sym = symbol_make (".eb");
4160 S_SET_SEGMENT (sym, text_section);
809ffe0d 4161 symbol_set_frag (sym, frag_now);
252b5132
RH		 4162 S_SET_VALUE (sym, frag_now_fix ());
4163 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4164 S_SET_NUMBER_AUXILIARY (sym, 1);
4165 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4166 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4167
4168 SF_SET_PROCESS (sym);
4169
4170 ppc_frob_label (sym);
4171
4172 demand_empty_rest_of_line ();
4173}
4174
4175/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4176 specified name. */
4177
4178static void
98027b10 4179ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4180{
4181 char *name;
4182 int len;
4183 symbolS *sym;
4184
4185 name = demand_copy_C_string (&len);
4186 sym = symbol_make (name);
4187 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4188 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4189 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4190 S_SET_VALUE (sym, 0);
809ffe0d 4191 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4192
4193 ppc_frob_label (sym);
4194
4195 demand_empty_rest_of_line ();
4196}
4197
4198/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4199
4200static void
98027b10 4201ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4202{
4203 symbolS *sym;
4204
4205 sym = symbol_make (".ec");
4206 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4207 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4208 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4209 S_SET_VALUE (sym, 0);
809ffe0d 4210 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4211
4212 ppc_frob_label (sym);
4213
4214 demand_empty_rest_of_line ();
4215}
4216
4217/* The .toc pseudo-op. Switch to the .toc subsegment. */
4218
4219static void
98027b10 4220ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4221{
4222 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4223 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4224 else
4225 {
4226 subsegT subseg;
4227 symbolS *sym;
4228 symbolS *list;
81d4177b 4229
252b5132
RH		 4230 subseg = ppc_data_subsegment;
4231 ++ppc_data_subsegment;
4232
4233 subseg_new (segment_name (data_section), subseg);
4234 ppc_toc_frag = frag_now;
4235
4236 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4237 symbol_set_frag (sym, frag_now);
252b5132
RH		 4238 S_SET_SEGMENT (sym, data_section);
4239 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4240 symbol_get_tc (sym)->subseg = subseg;
4241 symbol_get_tc (sym)->output = 1;
4242 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4243
4244 ppc_toc_csect = sym;
81d4177b 4245
252b5132 4246 for (list = ppc_data_csects;
809ffe0d
ILT		 4247 symbol_get_tc (list)->next != (symbolS *) NULL;
4248 list = symbol_get_tc (list)->next)
252b5132 4249 ;
809ffe0d 4250 symbol_get_tc (list)->next = sym;
252b5132
RH		 4251
4252 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4253 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4254 &symbol_lastP);
252b5132
RH		 4255 }
4256
4257 ppc_current_csect = ppc_toc_csect;
4258
4259 demand_empty_rest_of_line ();
4260}
4261
4262/* The AIX assembler automatically aligns the operands of a .long or
4263 .short pseudo-op, and we want to be compatible. */
4264
4265static void
98027b10 4266ppc_xcoff_cons (int log_size)
252b5132
RH		 4267{
4268 frag_align (log_size, 0, 0);
4269 record_alignment (now_seg, log_size);
4270 cons (1 << log_size);
4271}
4272
4273static void
98027b10 4274ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4275{
4276 expressionS exp;
4277 int byte_count;
4278
4279 (void) expression (&exp);
4280
4281 if (exp.X_op != O_constant)
4282 {
4283 as_bad (_("non-constant byte count"));
4284 return;
4285 }
4286
4287 byte_count = exp.X_add_number;
4288
4289 if (*input_line_pointer != ',')
4290 {
4291 as_bad (_("missing value"));
4292 return;
4293 }
4294
4295 ++input_line_pointer;
4296 cons (byte_count);
4297}
4298
4299#endif /* OBJ_XCOFF */
0baf16f2 4300#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4301\f
4302/* The .tc pseudo-op. This is used when generating either XCOFF or
4303 ELF. This takes two or more arguments.
4304
4305 When generating XCOFF output, the first argument is the name to
4306 give to this location in the toc; this will be a symbol with class
0baf16f2 4307 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4308 this location in the TOC; often there is just one more argument, a
1049f94e 4309 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4310 depends on target word size. A 32-bit target uses 4-byte values, a
4311 64-bit target uses 8-byte values.
252b5132
RH		 4312
4313 When not generating XCOFF output, the arguments are the same, but
4314 the first argument is simply ignored. */
4315
4316static void
98027b10 4317ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4318{
4319#ifdef OBJ_XCOFF
4320
4321 /* Define the TOC symbol name. */
4322 {
4323 char *name;
4324 char endc;
4325 symbolS *sym;
4326
4327 if (ppc_toc_csect == (symbolS *) NULL
4328 || ppc_toc_csect != ppc_current_csect)
4329 {
4330 as_bad (_(".tc not in .toc section"));
4331 ignore_rest_of_line ();
4332 return;
4333 }
4334
4335 name = input_line_pointer;
4336 endc = get_symbol_end ();
4337
4338 sym = symbol_find_or_make (name);
4339
4340 *input_line_pointer = endc;
4341
4342 if (S_IS_DEFINED (sym))
4343 {
4344 symbolS *label;
4345
809ffe0d
ILT		 4346 label = symbol_get_tc (ppc_current_csect)->within;
4347 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4348 {
4349 as_bad (_(".tc with no label"));
4350 ignore_rest_of_line ();
4351 return;
4352 }
4353
4354 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4355 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4356 S_SET_VALUE (label, S_GET_VALUE (sym));
4357
4358 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4359 ++input_line_pointer;
4360
4361 return;
4362 }
4363
4364 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4365 symbol_set_frag (sym, frag_now);
252b5132 4366 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4367 symbol_get_tc (sym)->class = XMC_TC;
4368 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4369
4370 ppc_frob_label (sym);
4371 }
4372
0baf16f2
AM		 4373#endif /* OBJ_XCOFF */
4374#ifdef OBJ_ELF
9c7977b3 4375 int align;
252b5132
RH		 4376
4377 /* Skip the TOC symbol name. */
4378 while (is_part_of_name (*input_line_pointer)
d13d4015 4379 || *input_line_pointer == ' '
252b5132
RH		 4380 || *input_line_pointer == '['
4381 || *input_line_pointer == ']'
4382 || *input_line_pointer == '{'
4383 || *input_line_pointer == '}')
4384 ++input_line_pointer;
4385
0baf16f2 4386 /* Align to a four/eight byte boundary. */
2b3c4602 4387 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4388 frag_align (align, 0, 0);
4389 record_alignment (now_seg, align);
0baf16f2 4390#endif /* OBJ_ELF */
252b5132
RH		 4391
4392 if (*input_line_pointer != ',')
4393 demand_empty_rest_of_line ();
4394 else
4395 {
4396 ++input_line_pointer;
2b3c4602 4397 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4398 }
4399}
0baf16f2
AM		 4400
4401/* Pseudo-op .machine. */
0baf16f2
AM		 4402
4403static void
98027b10 4404ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4405{
69c040df
AM		 4406 char *cpu_string;
4407#define MAX_HISTORY 100
fa452fa6 4408 static ppc_cpu_t *cpu_history;
69c040df
AM		 4409 static int curr_hist;
4410
4411 SKIP_WHITESPACE ();
4412
4413 if (*input_line_pointer == '"')
4414 {
4415 int len;
4416 cpu_string = demand_copy_C_string (&len);
4417 }
4418 else
4419 {
4420 char c;
4421 cpu_string = input_line_pointer;
4422 c = get_symbol_end ();
4423 cpu_string = xstrdup (cpu_string);
4424 *input_line_pointer = c;
4425 }
4426
4427 if (cpu_string != NULL)
4428 {
fa452fa6 4429 ppc_cpu_t old_cpu = ppc_cpu;
69c040df
AM		 4430 char *p;
4431
4432 for (p = cpu_string; *p != 0; p++)
4433 *p = TOLOWER (*p);
4434
4435 if (strcmp (cpu_string, "push") == 0)
4436 {
4437 if (cpu_history == NULL)
4438 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4439
4440 if (curr_hist >= MAX_HISTORY)
4441 as_bad (_(".machine stack overflow"));
4442 else
4443 cpu_history[curr_hist++] = ppc_cpu;
4444 }
4445 else if (strcmp (cpu_string, "pop") == 0)
4446 {
4447 if (curr_hist <= 0)
4448 as_bad (_(".machine stack underflow"));
4449 else
4450 ppc_cpu = cpu_history[--curr_hist];
4451 }
4452 else if (parse_cpu (cpu_string))
4453 ;
4454 else
4455 as_bad (_("invalid machine `%s'"), cpu_string);
4456
4457 if (ppc_cpu != old_cpu)
4458 ppc_setup_opcodes ();
4459 }
4460
4461 demand_empty_rest_of_line ();
0baf16f2
AM		 4462}
4463
4464/* See whether a symbol is in the TOC section. */
4465
4466static int
98027b10 4467ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4468{
4469#ifdef OBJ_XCOFF
4470 return symbol_get_tc (sym)->class == XMC_TC;
4471#endif
4472#ifdef OBJ_ELF
4473 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4474 if (ppc_obj64)
0baf16f2
AM		 4475 return strcmp (sname, ".toc") == 0;
4476 else
4477 return strcmp (sname, ".got") == 0;
4478#endif
4479}
4480#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4481\f
4482#ifdef TE_PE
4483
99a814a1 4484/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4485
4486/* Set the current section. */
4487static void
98027b10 4488ppc_set_current_section (segT new)
252b5132
RH		 4489{
4490 ppc_previous_section = ppc_current_section;
4491 ppc_current_section = new;
4492}
4493
4494/* pseudo-op: .previous
4495 behaviour: toggles the current section with the previous section.
4496 errors: None
99a814a1
AM		 4497 warnings: "No previous section" */
4498
252b5132 4499static void
98027b10 4500ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4501{
4502 symbolS *tmp;
4503
81d4177b 4504 if (ppc_previous_section == NULL)
252b5132 4505 {
99a814a1 4506 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4507 return;
4508 }
4509
99a814a1 4510 subseg_set (ppc_previous_section, 0);
252b5132 4511
99a814a1 4512 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4513}
4514
4515/* pseudo-op: .pdata
4516 behaviour: predefined read only data section
b34976b6 4517 double word aligned
252b5132
RH		 4518 errors: None
4519 warnings: None
4520 initial: .section .pdata "adr3"
b34976b6 4521 a - don't know -- maybe a misprint
252b5132
RH		 4522 d - initialized data
4523 r - readable
4524 3 - double word aligned (that would be 4 byte boundary)
4525
4526 commentary:
4527 Tag index tables (also known as the function table) for exception
99a814a1 4528 handling, debugging, etc. */
252b5132 4529
252b5132 4530static void
98027b10 4531ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4532{
81d4177b 4533 if (pdata_section == 0)
252b5132
RH		 4534 {
4535 pdata_section = subseg_new (".pdata", 0);
81d4177b 4536
252b5132
RH		 4537 bfd_set_section_flags (stdoutput, pdata_section,
4538 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4539 | SEC_READONLY | SEC_DATA ));
81d4177b 4540
252b5132
RH		 4541 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4542 }
4543 else
4544 {
99a814a1 4545 pdata_section = subseg_new (".pdata", 0);
252b5132 4546 }
99a814a1 4547 ppc_set_current_section (pdata_section);
252b5132
RH		 4548}
4549
4550/* pseudo-op: .ydata
4551 behaviour: predefined read only data section
b34976b6 4552 double word aligned
252b5132
RH		 4553 errors: None
4554 warnings: None
4555 initial: .section .ydata "drw3"
b34976b6 4556 a - don't know -- maybe a misprint
252b5132
RH		 4557 d - initialized data
4558 r - readable
4559 3 - double word aligned (that would be 4 byte boundary)
4560 commentary:
4561 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4562 debugging, etc. */
4563
252b5132 4564static void
98027b10 4565ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4566{
81d4177b 4567 if (ydata_section == 0)
252b5132
RH		 4568 {
4569 ydata_section = subseg_new (".ydata", 0);
4570 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4571 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4572 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4573
4574 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4575 }
4576 else
4577 {
4578 ydata_section = subseg_new (".ydata", 0);
4579 }
99a814a1 4580 ppc_set_current_section (ydata_section);
252b5132
RH		 4581}
4582
4583/* pseudo-op: .reldata
4584 behaviour: predefined read write data section
b34976b6 4585 double word aligned (4-byte)
252b5132
RH		 4586 FIXME: relocation is applied to it
4587 FIXME: what's the difference between this and .data?
4588 errors: None
4589 warnings: None
4590 initial: .section .reldata "drw3"
4591 d - initialized data
4592 r - readable
4593 w - writeable
4594 3 - double word aligned (that would be 8 byte boundary)
4595
4596 commentary:
4597 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4598 function descriptors, etc. */
4599
252b5132 4600static void
98027b10 4601ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4602{
4603 if (reldata_section == 0)
4604 {
4605 reldata_section = subseg_new (".reldata", 0);
4606
4607 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4608 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4609 | SEC_DATA));
252b5132
RH		 4610
4611 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4612 }
4613 else
4614 {
4615 reldata_section = subseg_new (".reldata", 0);
4616 }
99a814a1 4617 ppc_set_current_section (reldata_section);
252b5132
RH		 4618}
4619
4620/* pseudo-op: .rdata
4621 behaviour: predefined read only data section
b34976b6 4622 double word aligned
252b5132
RH		 4623 errors: None
4624 warnings: None
4625 initial: .section .rdata "dr3"
4626 d - initialized data
4627 r - readable
99a814a1
AM		 4628 3 - double word aligned (that would be 4 byte boundary) */
4629
252b5132 4630static void
98027b10 4631ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4632{
4633 if (rdata_section == 0)
4634 {
4635 rdata_section = subseg_new (".rdata", 0);
4636 bfd_set_section_flags (stdoutput, rdata_section,
4637 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4638 | SEC_READONLY | SEC_DATA ));
4639
4640 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4641 }
4642 else
4643 {
4644 rdata_section = subseg_new (".rdata", 0);
4645 }
99a814a1 4646 ppc_set_current_section (rdata_section);
252b5132
RH		 4647}
4648
4649/* pseudo-op: .ualong
81d4177b 4650 behaviour: much like .int, with the exception that no alignment is
b34976b6 4651 performed.
252b5132
RH		 4652 FIXME: test the alignment statement
4653 errors: None
99a814a1
AM		 4654 warnings: None */
4655
252b5132 4656static void
98027b10 4657ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4658{
99a814a1
AM		 4659 /* Try for long. */
4660 cons (4);
252b5132
RH		 4661}
4662
4663/* pseudo-op: .znop <symbol name>
4664 behaviour: Issue a nop instruction
b34976b6 4665 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4666 the supplied symbol name.
4667 errors: None
99a814a1
AM		 4668 warnings: Missing symbol name */
4669
252b5132 4670static void
98027b10 4671ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4672{
4673 unsigned long insn;
4674 const struct powerpc_opcode *opcode;
4675 expressionS ex;
4676 char *f;
252b5132 4677 symbolS *sym;
252b5132
RH		 4678 char *symbol_name;
4679 char c;
4680 char *name;
4681 unsigned int exp;
4682 flagword flags;
4683 asection *sec;
4684
99a814a1 4685 /* Strip out the symbol name. */
252b5132
RH		 4686 symbol_name = input_line_pointer;
4687 c = get_symbol_end ();
4688
4689 name = xmalloc (input_line_pointer - symbol_name + 1);
4690 strcpy (name, symbol_name);
4691
4692 sym = symbol_find_or_make (name);
4693
4694 *input_line_pointer = c;
4695
4696 SKIP_WHITESPACE ();
4697
4698 /* Look up the opcode in the hash table. */
4699 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4700
99a814a1 4701 /* Stick in the nop. */
252b5132
RH		 4702 insn = opcode->opcode;
4703
4704 /* Write out the instruction. */
4705 f = frag_more (4);
4706 md_number_to_chars (f, insn, 4);
4707 fix_new (frag_now,
4708 f - frag_now->fr_literal,
4709 4,
4710 sym,
4711 0,
4712 0,
4713 BFD_RELOC_16_GOT_PCREL);
4714
4715}
4716
81d4177b
KH		 4717/* pseudo-op:
4718 behaviour:
4719 errors:
99a814a1
AM		 4720 warnings: */
4721
252b5132 4722static void
98027b10 4723ppc_pe_comm (int lcomm)
252b5132 4724{
98027b10
AM		 4725 char *name;
4726 char c;
4727 char *p;
252b5132 4728 offsetT temp;
98027b10 4729 symbolS *symbolP;
252b5132
RH		 4730 offsetT align;
4731
4732 name = input_line_pointer;
4733 c = get_symbol_end ();
4734
99a814a1 4735 /* just after name is now '\0'. */
252b5132
RH		 4736 p = input_line_pointer;
4737 *p = c;
4738 SKIP_WHITESPACE ();
4739 if (*input_line_pointer != ',')
4740 {
4741 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4742 ignore_rest_of_line ();
4743 return;
4744 }
4745
4746 input_line_pointer++; /* skip ',' */
4747 if ((temp = get_absolute_expression ()) < 0)
4748 {
4749 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4750 ignore_rest_of_line ();
4751 return;
4752 }
4753
4754 if (! lcomm)
4755 {
4756 /* The third argument to .comm is the alignment. */
4757 if (*input_line_pointer != ',')
4758 align = 3;
4759 else
4760 {
4761 ++input_line_pointer;
4762 align = get_absolute_expression ();
4763 if (align <= 0)
4764 {
4765 as_warn (_("ignoring bad alignment"));
4766 align = 3;
4767 }
4768 }
4769 }
4770
4771 *p = 0;
4772 symbolP = symbol_find_or_make (name);
4773
4774 *p = c;
4775 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4776 {
4777 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4778 S_GET_NAME (symbolP));
4779 ignore_rest_of_line ();
4780 return;
4781 }
4782
4783 if (S_GET_VALUE (symbolP))
4784 {
4785 if (S_GET_VALUE (symbolP) != (valueT) temp)
4786 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4787 S_GET_NAME (symbolP),
4788 (long) S_GET_VALUE (symbolP),
4789 (long) temp);
4790 }
4791 else
4792 {
4793 S_SET_VALUE (symbolP, (valueT) temp);
4794 S_SET_EXTERNAL (symbolP);
86ebace2 4795 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4796 }
4797
4798 demand_empty_rest_of_line ();
4799}
4800
4801/*
4802 * implement the .section pseudo op:
4803 * .section name {, "flags"}
4804 * ^ ^
4805 * | +--- optional flags: 'b' for bss
4806 * | 'i' for info
4807 * +-- section name 'l' for lib
4808 * 'n' for noload
4809 * 'o' for over
4810 * 'w' for data
4811 * 'd' (apparently m88k for data)
4812 * 'x' for text
4813 * But if the argument is not a quoted string, treat it as a
4814 * subsegment number.
4815 *
4816 * FIXME: this is a copy of the section processing from obj-coff.c, with
4817 * additions/changes for the moto-pas assembler support. There are three
4818 * categories:
4819 *
81d4177b 4820 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4821 * setting bits that bfd probably neither understands or uses. The
4822 * correct approach (?) will have to incorporate extra fields attached
4823 * to the section to hold the system specific stuff. (krk)
4824 *
4825 * Section Contents:
4826 * 'a' - unknown - referred to in documentation, but no definition supplied
4827 * 'c' - section has code
4828 * 'd' - section has initialized data
4829 * 'u' - section has uninitialized data
4830 * 'i' - section contains directives (info)
4831 * 'n' - section can be discarded
4832 * 'R' - remove section at link time
4833 *
4834 * Section Protection:
4835 * 'r' - section is readable
4836 * 'w' - section is writeable
4837 * 'x' - section is executable
4838 * 's' - section is sharable
4839 *
4840 * Section Alignment:
4841 * '0' - align to byte boundary
4842 * '1' - align to halfword undary
4843 * '2' - align to word boundary
4844 * '3' - align to doubleword boundary
4845 * '4' - align to quadword boundary
4846 * '5' - align to 32 byte boundary
4847 * '6' - align to 64 byte boundary
4848 *
4849 */
4850
4851void
98027b10 4852ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4853{
99a814a1 4854 /* Strip out the section name. */
252b5132
RH		 4855 char *section_name;
4856 char c;
4857 char *name;
4858 unsigned int exp;
4859 flagword flags;
4860 segT sec;
4861 int align;
4862
4863 section_name = input_line_pointer;
4864 c = get_symbol_end ();
4865
4866 name = xmalloc (input_line_pointer - section_name + 1);
4867 strcpy (name, section_name);
4868
4869 *input_line_pointer = c;
4870
4871 SKIP_WHITESPACE ();
4872
4873 exp = 0;
4874 flags = SEC_NO_FLAGS;
4875
4876 if (strcmp (name, ".idata$2") == 0)
4877 {
4878 align = 0;
4879 }
4880 else if (strcmp (name, ".idata$3") == 0)
4881 {
4882 align = 0;
4883 }
4884 else if (strcmp (name, ".idata$4") == 0)
4885 {
4886 align = 2;
4887 }
4888 else if (strcmp (name, ".idata$5") == 0)
4889 {
4890 align = 2;
4891 }
4892 else if (strcmp (name, ".idata$6") == 0)
4893 {
4894 align = 1;
4895 }
4896 else
99a814a1
AM		 4897 /* Default alignment to 16 byte boundary. */
4898 align = 4;
252b5132
RH		 4899
4900 if (*input_line_pointer == ',')
4901 {
4902 ++input_line_pointer;
4903 SKIP_WHITESPACE ();
4904 if (*input_line_pointer != '"')
4905 exp = get_absolute_expression ();
4906 else
4907 {
4908 ++input_line_pointer;
4909 while (*input_line_pointer != '"'
4910 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4911 {
4912 switch (*input_line_pointer)
4913 {
4914 /* Section Contents */
4915 case 'a': /* unknown */
4916 as_bad (_("Unsupported section attribute -- 'a'"));
4917 break;
4918 case 'c': /* code section */
81d4177b 4919 flags |= SEC_CODE;
252b5132
RH		 4920 break;
4921 case 'd': /* section has initialized data */
4922 flags |= SEC_DATA;
4923 break;
4924 case 'u': /* section has uninitialized data */
4925 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4926 in winnt.h */
4927 flags |= SEC_ROM;
4928 break;
4929 case 'i': /* section contains directives (info) */
4930 /* FIXME: This is IMAGE_SCN_LNK_INFO
4931 in winnt.h */
4932 flags |= SEC_HAS_CONTENTS;
4933 break;
4934 case 'n': /* section can be discarded */
81d4177b 4935 flags &=~ SEC_LOAD;
252b5132
RH		 4936 break;
4937 case 'R': /* Remove section at link time */
4938 flags |= SEC_NEVER_LOAD;
4939 break;
8d452c78 4940#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4941 /* Section Protection */
4942 case 'r': /* section is readable */
4943 flags |= IMAGE_SCN_MEM_READ;
4944 break;
4945 case 'w': /* section is writeable */
4946 flags |= IMAGE_SCN_MEM_WRITE;
4947 break;
4948 case 'x': /* section is executable */
4949 flags |= IMAGE_SCN_MEM_EXECUTE;
4950 break;
4951 case 's': /* section is sharable */
4952 flags |= IMAGE_SCN_MEM_SHARED;
4953 break;
4954
4955 /* Section Alignment */
4956 case '0': /* align to byte boundary */
4957 flags |= IMAGE_SCN_ALIGN_1BYTES;
4958 align = 0;
4959 break;
4960 case '1': /* align to halfword boundary */
4961 flags |= IMAGE_SCN_ALIGN_2BYTES;
4962 align = 1;
4963 break;
4964 case '2': /* align to word boundary */
4965 flags |= IMAGE_SCN_ALIGN_4BYTES;
4966 align = 2;
4967 break;
4968 case '3': /* align to doubleword boundary */
4969 flags |= IMAGE_SCN_ALIGN_8BYTES;
4970 align = 3;
4971 break;
4972 case '4': /* align to quadword boundary */
4973 flags |= IMAGE_SCN_ALIGN_16BYTES;
4974 align = 4;
4975 break;
4976 case '5': /* align to 32 byte boundary */
4977 flags |= IMAGE_SCN_ALIGN_32BYTES;
4978 align = 5;
4979 break;
4980 case '6': /* align to 64 byte boundary */
4981 flags |= IMAGE_SCN_ALIGN_64BYTES;
4982 align = 6;
4983 break;
8d452c78 4984#endif
252b5132 4985 default:
99a814a1
AM		 4986 as_bad (_("unknown section attribute '%c'"),
4987 *input_line_pointer);
252b5132
RH		 4988 break;
4989 }
4990 ++input_line_pointer;
4991 }
4992 if (*input_line_pointer == '"')
4993 ++input_line_pointer;
4994 }
4995 }
4996
4997 sec = subseg_new (name, (subsegT) exp);
4998
99a814a1 4999 ppc_set_current_section (sec);
252b5132
RH		 5000
5001 if (flags != SEC_NO_FLAGS)
5002 {
5003 if (! bfd_set_section_flags (stdoutput, sec, flags))
5004 as_bad (_("error setting flags for \"%s\": %s"),
5005 bfd_section_name (stdoutput, sec),
5006 bfd_errmsg (bfd_get_error ()));
5007 }
5008
99a814a1 5009 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5010}
5011
5012static void
98027b10 5013ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5014{
5015 char *name;
5016 char endc;
5017 symbolS *ext_sym;
5018
5019 name = input_line_pointer;
5020 endc = get_symbol_end ();
5021
5022 ext_sym = symbol_find_or_make (name);
5023
5024 *input_line_pointer = endc;
5025
5026 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5027 SF_SET_FUNCTION (ext_sym);
5028 SF_SET_PROCESS (ext_sym);
5029 coff_add_linesym (ext_sym);
5030
5031 demand_empty_rest_of_line ();
5032}
5033
5034static void
98027b10 5035ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5036{
5037 if (tocdata_section == 0)
5038 {
5039 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5040 /* FIXME: section flags won't work. */
252b5132
RH		 5041 bfd_set_section_flags (stdoutput, tocdata_section,
5042 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5043 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5044
5045 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5046 }
5047 else
5048 {
5049 rdata_section = subseg_new (".tocd", 0);
5050 }
5051
99a814a1 5052 ppc_set_current_section (tocdata_section);
252b5132
RH		 5053
5054 demand_empty_rest_of_line ();
5055}
5056
5057/* Don't adjust TOC relocs to use the section symbol. */
5058
5059int
98027b10 5060ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5061{
5062 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5063}
5064
5065#endif
5066\f
5067#ifdef OBJ_XCOFF
5068
5069/* XCOFF specific symbol and file handling. */
5070
5071/* Canonicalize the symbol name. We use the to force the suffix, if
5072 any, to use square brackets, and to be in upper case. */
5073
5074char *
98027b10 5075ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5076{
5077 char *s;
5078
5079 if (ppc_stab_symbol)
5080 return name;
5081
5082 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5083 ;
5084 if (*s != '\0')
5085 {
5086 char brac;
5087
5088 if (*s == '[')
5089 brac = ']';
5090 else
5091 {
5092 *s = '[';
5093 brac = '}';
5094 }
5095
5096 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5097 *s = TOUPPER (*s);
252b5132
RH		 5098
5099 if (*s == '\0' || s[1] != '\0')
5100 as_bad (_("bad symbol suffix"));
5101
5102 *s = ']';
5103 }
5104
5105 return name;
5106}
5107
5108/* Set the class of a symbol based on the suffix, if any. This is
5109 called whenever a new symbol is created. */
5110
5111void
98027b10 5112ppc_symbol_new_hook (symbolS *sym)
252b5132 5113{
809ffe0d 5114 struct ppc_tc_sy *tc;
252b5132
RH		 5115 const char *s;
5116
809ffe0d
ILT		 5117 tc = symbol_get_tc (sym);
5118 tc->next = NULL;
5119 tc->output = 0;
5120 tc->class = -1;
5121 tc->real_name = NULL;
5122 tc->subseg = 0;
5123 tc->align = 0;
5124 tc->size = NULL;
5125 tc->within = NULL;
252b5132
RH		 5126
5127 if (ppc_stab_symbol)
5128 return;
5129
5130 s = strchr (S_GET_NAME (sym), '[');
5131 if (s == (const char *) NULL)
5132 {
5133 /* There is no suffix. */
5134 return;
5135 }
5136
5137 ++s;
5138
5139 switch (s[0])
5140 {
5141 case 'B':
5142 if (strcmp (s, "BS]") == 0)
809ffe0d 5143 tc->class = XMC_BS;
252b5132
RH		 5144 break;
5145 case 'D':
5146 if (strcmp (s, "DB]") == 0)
809ffe0d 5147 tc->class = XMC_DB;
252b5132 5148 else if (strcmp (s, "DS]") == 0)
809ffe0d 5149 tc->class = XMC_DS;
252b5132
RH		 5150 break;
5151 case 'G':
5152 if (strcmp (s, "GL]") == 0)
809ffe0d 5153 tc->class = XMC_GL;
252b5132
RH		 5154 break;
5155 case 'P':
5156 if (strcmp (s, "PR]") == 0)
809ffe0d 5157 tc->class = XMC_PR;
252b5132
RH		 5158 break;
5159 case 'R':
5160 if (strcmp (s, "RO]") == 0)
809ffe0d 5161 tc->class = XMC_RO;
252b5132 5162 else if (strcmp (s, "RW]") == 0)
809ffe0d 5163 tc->class = XMC_RW;
252b5132
RH		 5164 break;
5165 case 'S':
5166 if (strcmp (s, "SV]") == 0)
809ffe0d 5167 tc->class = XMC_SV;
252b5132
RH		 5168 break;
5169 case 'T':
5170 if (strcmp (s, "TC]") == 0)
809ffe0d 5171 tc->class = XMC_TC;
252b5132 5172 else if (strcmp (s, "TI]") == 0)
809ffe0d 5173 tc->class = XMC_TI;
252b5132 5174 else if (strcmp (s, "TB]") == 0)
809ffe0d 5175 tc->class = XMC_TB;
252b5132 5176 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 5177 tc->class = XMC_TC0;
252b5132
RH		 5178 break;
5179 case 'U':
5180 if (strcmp (s, "UA]") == 0)
809ffe0d 5181 tc->class = XMC_UA;
252b5132 5182 else if (strcmp (s, "UC]") == 0)
809ffe0d 5183 tc->class = XMC_UC;
252b5132
RH		 5184 break;
5185 case 'X':
5186 if (strcmp (s, "XO]") == 0)
809ffe0d 5187 tc->class = XMC_XO;
252b5132
RH		 5188 break;
5189 }
5190
809ffe0d 5191 if (tc->class == -1)
252b5132
RH		 5192 as_bad (_("Unrecognized symbol suffix"));
5193}
5194
5195/* Set the class of a label based on where it is defined. This
5196 handles symbols without suffixes. Also, move the symbol so that it
5197 follows the csect symbol. */
5198
5199void
98027b10 5200ppc_frob_label (symbolS *sym)
252b5132
RH		 5201{
5202 if (ppc_current_csect != (symbolS *) NULL)
5203 {
809ffe0d
ILT		 5204 if (symbol_get_tc (sym)->class == -1)
5205 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 5206
5207 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5208 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5209 &symbol_rootP, &symbol_lastP);
5210 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5211 }
07a53e5c
RH		 5212
5213#ifdef OBJ_ELF
5214 dwarf2_emit_label (sym);
5215#endif
252b5132
RH		 5216}
5217
5218/* This variable is set by ppc_frob_symbol if any absolute symbols are
5219 seen. It tells ppc_adjust_symtab whether it needs to look through
5220 the symbols. */
5221
b34976b6 5222static bfd_boolean ppc_saw_abs;
252b5132
RH		 5223
5224/* Change the name of a symbol just before writing it out. Set the
5225 real name if the .rename pseudo-op was used. Otherwise, remove any
5226 class suffix. Return 1 if the symbol should not be included in the
5227 symbol table. */
5228
5229int
98027b10 5230ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5231{
5232 static symbolS *ppc_last_function;
5233 static symbolS *set_end;
5234
5235 /* Discard symbols that should not be included in the output symbol
5236 table. */
809ffe0d
ILT		 5237 if (! symbol_used_in_reloc_p (sym)
5238 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5239 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5240 && ! symbol_get_tc (sym)->output
252b5132
RH		 5241 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5242 return 1;
5243
a161fe53
AM		 5244 /* This one will disappear anyway. Don't make a csect sym for it. */
5245 if (sym == abs_section_sym)
5246 return 1;
5247
809ffe0d
ILT		 5248 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5249 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5250 else
5251 {
5252 const char *name;
5253 const char *s;
5254
5255 name = S_GET_NAME (sym);
5256 s = strchr (name, '[');
5257 if (s != (char *) NULL)
5258 {
5259 unsigned int len;
5260 char *snew;
5261
5262 len = s - name;
5263 snew = xmalloc (len + 1);
5264 memcpy (snew, name, len);
5265 snew[len] = '\0';
5266
5267 S_SET_NAME (sym, snew);
5268 }
5269 }
5270
5271 if (set_end != (symbolS *) NULL)
5272 {
5273 SA_SET_SYM_ENDNDX (set_end, sym);
5274 set_end = NULL;
5275 }
5276
5277 if (SF_GET_FUNCTION (sym))
5278 {
5279 if (ppc_last_function != (symbolS *) NULL)
5280 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5281 ppc_last_function = sym;
809ffe0d 5282 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5283 {
6386f3a7 5284 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5285 SA_SET_SYM_FSIZE (sym,
5286 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5287 }
5288 }
5289 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5290 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5291 {
5292 if (ppc_last_function == (symbolS *) NULL)
5293 as_bad (_(".ef with no preceding .function"));
5294 else
5295 {
5296 set_end = ppc_last_function;
5297 ppc_last_function = NULL;
5298
5299 /* We don't have a C_EFCN symbol, but we need to force the
5300 COFF backend to believe that it has seen one. */
5301 coff_last_function = NULL;
5302 }
5303 }
5304
670ec21d 5305 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5306 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5307 && S_GET_STORAGE_CLASS (sym) != C_FILE
5308 && S_GET_STORAGE_CLASS (sym) != C_FCN
5309 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5310 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5311 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5312 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5313 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5314 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5315 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5316
5317 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5318 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5319 {
5320 int i;
5321 union internal_auxent *a;
5322
5323 /* Create a csect aux. */
5324 i = S_GET_NUMBER_AUXILIARY (sym);
5325 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5326 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5327 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5328 {
5329 /* This is the TOC table. */
5330 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5331 a->x_csect.x_scnlen.l = 0;
5332 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5333 }
809ffe0d 5334 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5335 {
5336 /* This is a csect symbol. x_scnlen is the size of the
5337 csect. */
809ffe0d 5338 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5339 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5340 S_GET_SEGMENT (sym))
5341 - S_GET_VALUE (sym));
5342 else
5343 {
6386f3a7 5344 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5345 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5346 - S_GET_VALUE (sym));
5347 }
809ffe0d 5348 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5349 }
5350 else if (S_GET_SEGMENT (sym) == bss_section)
5351 {
5352 /* This is a common symbol. */
809ffe0d
ILT		 5353 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5354 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5355 if (S_IS_EXTERNAL (sym))
809ffe0d 5356 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5357 else
809ffe0d 5358 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5359 }
5360 else if (S_GET_SEGMENT (sym) == absolute_section)
5361 {
5362 /* This is an absolute symbol. The csect will be created by
99a814a1 5363 ppc_adjust_symtab. */
b34976b6 5364 ppc_saw_abs = TRUE;
252b5132 5365 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5366 if (symbol_get_tc (sym)->class == -1)
5367 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5368 }
5369 else if (! S_IS_DEFINED (sym))
5370 {
5371 /* This is an external symbol. */
5372 a->x_csect.x_scnlen.l = 0;
5373 a->x_csect.x_smtyp = XTY_ER;
5374 }
809ffe0d 5375 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5376 {
5377 symbolS *next;
5378
5379 /* This is a TOC definition. x_scnlen is the size of the
5380 TOC entry. */
5381 next = symbol_next (sym);
809ffe0d 5382 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5383 next = symbol_next (next);
5384 if (next == (symbolS *) NULL
809ffe0d 5385 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5386 {
5387 if (ppc_after_toc_frag == (fragS *) NULL)
5388 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5389 data_section)
5390 - S_GET_VALUE (sym));
5391 else
5392 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5393 - S_GET_VALUE (sym));
5394 }
5395 else
5396 {
6386f3a7 5397 resolve_symbol_value (next);
252b5132
RH		 5398 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5399 - S_GET_VALUE (sym));
5400 }
5401 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5402 }
5403 else
5404 {
5405 symbolS *csect;
5406
5407 /* This is a normal symbol definition. x_scnlen is the
5408 symbol index of the containing csect. */
5409 if (S_GET_SEGMENT (sym) == text_section)
5410 csect = ppc_text_csects;
5411 else if (S_GET_SEGMENT (sym) == data_section)
5412 csect = ppc_data_csects;
5413 else
5414 abort ();
5415
5416 /* Skip the initial dummy symbol. */
809ffe0d 5417 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5418
5419 if (csect == (symbolS *) NULL)
5420 {
5421 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5422 a->x_csect.x_scnlen.l = 0;
5423 }
5424 else
5425 {
809ffe0d 5426 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5427 {
6386f3a7 5428 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5429 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5430 > S_GET_VALUE (sym))
252b5132 5431 break;
809ffe0d 5432 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5433 }
5434
809ffe0d
ILT		 5435 a->x_csect.x_scnlen.p =
5436 coffsymbol (symbol_get_bfdsym (csect))->native;
5437 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5438 1;
252b5132
RH		 5439 }
5440 a->x_csect.x_smtyp = XTY_LD;
5441 }
81d4177b 5442
252b5132
RH		 5443 a->x_csect.x_parmhash = 0;
5444 a->x_csect.x_snhash = 0;
809ffe0d 5445 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5446 a->x_csect.x_smclas = XMC_PR;
5447 else
809ffe0d 5448 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5449 a->x_csect.x_stab = 0;
5450 a->x_csect.x_snstab = 0;
5451
5452 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5453 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5454 }
5455 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5456 {
5457 /* We want the value to be the symbol index of the referenced
5458 csect symbol. BFD will do that for us if we set the right
5459 flags. */
b782de16
AM		 5460 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5461 combined_entry_type *c = coffsymbol (bsym)->native;
5462
5463 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5464 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5465 }
5466 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5467 {
5468 symbolS *block;
5469 symbolS *csect;
5470
5471 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5472 block = symbol_get_tc (sym)->within;
5473 csect = symbol_get_tc (block)->within;
6386f3a7 5474 resolve_symbol_value (csect);
252b5132
RH		 5475 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5476 }
5477 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5478 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5479 {
5480 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5481 BFD will do that for us if we set the right flags. We have
5482 already set the value correctly. */
809ffe0d 5483 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5484 }
5485
5486 return 0;
5487}
5488
5489/* Adjust the symbol table. This creates csect symbols for all
5490 absolute symbols. */
5491
5492void
98027b10 5493ppc_adjust_symtab (void)
252b5132
RH		 5494{
5495 symbolS *sym;
5496
5497 if (! ppc_saw_abs)
5498 return;
5499
5500 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5501 {
5502 symbolS *csect;
5503 int i;
5504 union internal_auxent *a;
5505
5506 if (S_GET_SEGMENT (sym) != absolute_section)
5507 continue;
5508
5509 csect = symbol_create (".abs[XO]", absolute_section,
5510 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5511 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5512 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5513 i = S_GET_NUMBER_AUXILIARY (csect);
5514 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5515 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5516 a->x_csect.x_scnlen.l = 0;
5517 a->x_csect.x_smtyp = XTY_SD;
5518 a->x_csect.x_parmhash = 0;
5519 a->x_csect.x_snhash = 0;
5520 a->x_csect.x_smclas = XMC_XO;
5521 a->x_csect.x_stab = 0;
5522 a->x_csect.x_snstab = 0;
5523
5524 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5525
5526 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5527 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5528 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5529 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5530 }
5531
b34976b6 5532 ppc_saw_abs = FALSE;
252b5132
RH		 5533}
5534
5535/* Set the VMA for a section. This is called on all the sections in
5536 turn. */
5537
5538void
98027b10 5539ppc_frob_section (asection *sec)
252b5132 5540{
931e13a6 5541 static bfd_vma vma = 0;
252b5132 5542
931e13a6 5543 vma = md_section_align (sec, vma);
252b5132
RH		 5544 bfd_set_section_vma (stdoutput, sec, vma);
5545 vma += bfd_section_size (stdoutput, sec);
5546}
5547
5548#endif /* OBJ_XCOFF */
5549\f
252b5132 5550char *
98027b10 5551md_atof (int type, char *litp, int *sizep)
252b5132 5552{
499ac353 5553 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5554}
5555
5556/* Write a value out to the object file, using the appropriate
5557 endianness. */
5558
5559void
98027b10 5560md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5561{
5562 if (target_big_endian)
5563 number_to_chars_bigendian (buf, val, n);
5564 else
5565 number_to_chars_littleendian (buf, val, n);
5566}
5567
5568/* Align a section (I don't know why this is machine dependent). */
5569
5570valueT
3aeeedbb 5571md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5572{
3aeeedbb
AM		 5573#ifdef OBJ_ELF
5574 return addr;
5575#else
252b5132
RH		 5576 int align = bfd_get_section_alignment (stdoutput, seg);
5577
5578 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5579#endif
252b5132
RH		 5580}
5581
5582/* We don't have any form of relaxing. */
5583
5584int
98027b10
AM		 5585md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5586 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5587{
5588 abort ();
5589 return 0;
5590}
5591
5592/* Convert a machine dependent frag. We never generate these. */
5593
5594void
98027b10
AM		 5595md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5596 asection *sec ATTRIBUTE_UNUSED,
5597 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5598{
5599 abort ();
5600}
5601
5602/* We have no need to default values of symbols. */
5603
252b5132 5604symbolS *
98027b10 5605md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5606{
5607 return 0;
5608}
5609\f
5610/* Functions concerning relocs. */
5611
5612/* The location from which a PC relative jump should be calculated,
5613 given a PC relative reloc. */
5614
5615long
98027b10 5616md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5617{
5618 return fixp->fx_frag->fr_address + fixp->fx_where;
5619}
5620
5621#ifdef OBJ_XCOFF
5622
5623/* This is called to see whether a fixup should be adjusted to use a
5624 section symbol. We take the opportunity to change a fixup against
5625 a symbol in the TOC subsegment into a reloc against the
5626 corresponding .tc symbol. */
5627
5628int
98027b10 5629ppc_fix_adjustable (fixS *fix)
252b5132 5630{
b782de16
AM		 5631 valueT val = resolve_symbol_value (fix->fx_addsy);
5632 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5633 TC_SYMFIELD_TYPE *tc;
5634
5635 if (symseg == absolute_section)
5636 return 0;
252b5132 5637
252b5132 5638 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5639 && fix->fx_addsy != ppc_toc_csect
b782de16 5640 && symseg == data_section
252b5132
RH		 5641 && val >= ppc_toc_frag->fr_address
5642 && (ppc_after_toc_frag == (fragS *) NULL
5643 || val < ppc_after_toc_frag->fr_address))
5644 {
5645 symbolS *sy;
5646
5647 for (sy = symbol_next (ppc_toc_csect);
5648 sy != (symbolS *) NULL;
5649 sy = symbol_next (sy))
5650 {
b782de16
AM		 5651 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5652
5653 if (sy_tc->class == XMC_TC0)
252b5132 5654 continue;
b782de16 5655 if (sy_tc->class != XMC_TC)
252b5132 5656 break;
b782de16 5657 if (val == resolve_symbol_value (sy))
252b5132
RH		 5658 {
5659 fix->fx_addsy = sy;
5660 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5661 return 0;
5662 }
5663 }
5664
5665 as_bad_where (fix->fx_file, fix->fx_line,
5666 _("symbol in .toc does not match any .tc"));
5667 }
5668
5669 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5670 tc = symbol_get_tc (fix->fx_addsy);
5671 if (tc->subseg == 0
5672 && tc->class != XMC_TC0
5673 && tc->class != XMC_TC
5674 && symseg != bss_section
252b5132 5675 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5676 && (symseg != data_section
252b5132
RH		 5677 || ppc_toc_csect == NULL
5678 || val < ppc_toc_frag->fr_address
5679 || (ppc_after_toc_frag != NULL
5680 && val >= ppc_after_toc_frag->fr_address)))
5681 {
5682 symbolS *csect;
b782de16 5683 symbolS *next_csect;
252b5132 5684
b782de16 5685 if (symseg == text_section)
252b5132 5686 csect = ppc_text_csects;
b782de16 5687 else if (symseg == data_section)
252b5132
RH		 5688 csect = ppc_data_csects;
5689 else
5690 abort ();
5691
5692 /* Skip the initial dummy symbol. */
809ffe0d 5693 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5694
5695 if (csect != (symbolS *) NULL)
5696 {
b782de16
AM		 5697 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5698 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5699 {
5700 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5701 have to look through the full symbol table to see
5702 whether this is the csect we want. Note that we will
5703 only get here if the csect has zero length. */
b782de16
AM		 5704 if (symbol_get_frag (csect)->fr_address == val
5705 && S_GET_VALUE (csect) == val)
252b5132
RH		 5706 {
5707 symbolS *scan;
5708
809ffe0d 5709 for (scan = symbol_next (csect);
252b5132 5710 scan != NULL;
809ffe0d 5711 scan = symbol_next (scan))
252b5132 5712 {
809ffe0d 5713 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5714 break;
5715 if (scan == fix->fx_addsy)
5716 break;
5717 }
5718
5719 /* If we found the symbol before the next csect
99a814a1 5720 symbol, then this is the csect we want. */
252b5132
RH		 5721 if (scan == fix->fx_addsy)
5722 break;
5723 }
5724
b782de16 5725 csect = next_csect;
252b5132
RH		 5726 }
5727
b782de16 5728 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5729 fix->fx_addsy = csect;
5730 }
b782de16 5731 return 0;
252b5132
RH		 5732 }
5733
5734 /* Adjust a reloc against a .lcomm symbol to be against the base
5735 .lcomm. */
b782de16 5736 if (symseg == bss_section
252b5132
RH		 5737 && ! S_IS_EXTERNAL (fix->fx_addsy))
5738 {
b782de16
AM		 5739 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5740
5741 fix->fx_offset += val - resolve_symbol_value (sy);
5742 fix->fx_addsy = sy;
252b5132
RH		 5743 }
5744
5745 return 0;
5746}
5747
5748/* A reloc from one csect to another must be kept. The assembler
5749 will, of course, keep relocs between sections, and it will keep
5750 absolute relocs, but we need to force it to keep PC relative relocs
5751 between two csects in the same section. */
5752
5753int
98027b10 5754ppc_force_relocation (fixS *fix)
252b5132
RH		 5755{
5756 /* At this point fix->fx_addsy should already have been converted to
5757 a csect symbol. If the csect does not include the fragment, then
5758 we need to force the relocation. */
5759 if (fix->fx_pcrel
5760 && fix->fx_addsy != NULL
809ffe0d
ILT		 5761 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5762 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5763 > fix->fx_frag->fr_address)
5764 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5765 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5766 <= fix->fx_frag->fr_address))))
5767 return 1;
5768
ae6063d4 5769 return generic_force_reloc (fix);
252b5132
RH		 5770}
5771
5772#endif /* OBJ_XCOFF */
5773
0baf16f2 5774#ifdef OBJ_ELF
a161fe53
AM		 5775/* If this function returns non-zero, it guarantees that a relocation
5776 will be emitted for a fixup. */
5777
5778int
98027b10 5779ppc_force_relocation (fixS *fix)
a161fe53
AM		 5780{
5781 /* Branch prediction relocations must force a relocation, as must
5782 the vtable description relocs. */
5783 switch (fix->fx_r_type)
5784 {
5785 case BFD_RELOC_PPC_B16_BRTAKEN:
5786 case BFD_RELOC_PPC_B16_BRNTAKEN:
5787 case BFD_RELOC_PPC_BA16_BRTAKEN:
5788 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5789 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5790 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5791 return 1;
5792 default:
5793 break;
5794 }
5795
cdba85ec
AM		 5796 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5797 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5798 return 1;
5799
ae6063d4 5800 return generic_force_reloc (fix);
a161fe53
AM		 5801}
5802
0baf16f2 5803int
98027b10 5804ppc_fix_adjustable (fixS *fix)
252b5132 5805{
0baf16f2
AM		 5806 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5807 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5808 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5809 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5810 && fix->fx_r_type != BFD_RELOC_GPREL16
5811 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5812 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5813 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5814 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5815}
0baf16f2 5816#endif
252b5132 5817
3aeeedbb
AM		 5818/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5819 rs_align_code frag. */
5820
5821void
5822ppc_handle_align (struct frag *fragP)
5823{
5824 valueT count = (fragP->fr_next->fr_address
5825 - (fragP->fr_address + fragP->fr_fix));
5826
5827 if (count != 0 && (count & 3) == 0)
5828 {
5829 char *dest = fragP->fr_literal + fragP->fr_fix;
5830
5831 fragP->fr_var = 4;
5832 md_number_to_chars (dest, 0x60000000, 4);
5833
5834 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5835 {
5836 /* For power6, we want the last nop to be a group terminating
5837 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5838 immediately after this one, with its address set to the last
5839 nop location. This will automatically reduce the number of
5840 nops in the current frag by one. */
5841 if (count > 4)
5842 {
5843 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5844
5845 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5846 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5847 group_nop->fr_fix = 0;
5848 group_nop->fr_offset = 1;
5849 group_nop->fr_type = rs_fill;
5850 fragP->fr_next = group_nop;
5851 dest = group_nop->fr_literal;
5852 }
5853
5854 md_number_to_chars (dest, 0x60210000, 4);
5855 }
5856 }
5857}
5858
252b5132
RH		 5859/* Apply a fixup to the object code. This is called for all the
5860 fixups we generated by the call to fix_new_exp, above. In the call
5861 above we used a reloc code which was the largest legal reloc code
5862 plus the operand index. Here we undo that to recover the operand
5863 index. At this point all symbol values should be fully resolved,
5864 and we attempt to completely resolve the reloc. If we can not do
5865 that, we determine the correct reloc code and put it back in the
5866 fixup. */
5867
94f592af 5868void
98027b10 5869md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5870{
94f592af 5871 valueT value = * valP;
252b5132
RH		 5872
5873#ifdef OBJ_ELF
94f592af 5874 if (fixP->fx_addsy != NULL)
252b5132 5875 {
a161fe53 5876 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5877 if (fixP->fx_pcrel)
5878 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5879 }
5880 else
94f592af 5881 fixP->fx_done = 1;
252b5132 5882#else
a161fe53 5883 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5884 the symbol values. If we are doing this relocation the code in
5885 write.c is going to call bfd_install_relocation, which is also
5886 going to use the symbol value. That means that if the reloc is
5887 fully resolved we want to use *valP since bfd_install_relocation is
5888 not being used.
252b5132 5889 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5890 *valP, and must use fx_offset instead. However, if the reloc
5891 is PC relative, we do want to use *valP since it includes the
252b5132 5892 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5893 if (fixP->fx_addsy == (symbolS *) NULL)
5894 fixP->fx_done = 1;
5895
5896 else if (fixP->fx_pcrel)
5897 ;
5898
252b5132 5899 else
a161fe53
AM		 5900 value = fixP->fx_offset;
5901#endif
5902
5903 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5904 {
a161fe53
AM		 5905 /* We can't actually support subtracting a symbol. */
5906 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5907 }
252b5132 5908
94f592af 5909 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5910 {
5911 int opindex;
5912 const struct powerpc_operand *operand;
5913 char *where;
5914 unsigned long insn;
5915
94f592af 5916 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5917
5918 operand = &powerpc_operands[opindex];
5919
5920#ifdef OBJ_XCOFF
0baf16f2
AM		 5921 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5922 does not generate a reloc. It uses the offset of `sym' within its
5923 csect. Other usages, such as `.long sym', generate relocs. This
5924 is the documented behaviour of non-TOC symbols. */
252b5132 5925 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5926 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5927 && operand->shift == 0
2b3c4602 5928 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5929 && fixP->fx_addsy != NULL
5930 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5931 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5932 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5933 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5934 {
94f592af
NC		 5935 value = fixP->fx_offset;
5936 fixP->fx_done = 1;
252b5132
RH		 5937 }
5938#endif
5939
5940 /* Fetch the instruction, insert the fully resolved operand
5941 value, and stuff the instruction back again. */
94f592af 5942 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5943 if (target_big_endian)
5944 insn = bfd_getb32 ((unsigned char *) where);
5945 else
5946 insn = bfd_getl32 ((unsigned char *) where);
5947 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5948 fixP->tc_fix_data.ppc_cpu,
94f592af 5949 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5950 if (target_big_endian)
5951 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5952 else
5953 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5954
94f592af
NC		 5955 if (fixP->fx_done)
5956 /* Nothing else to do here. */
5957 return;
252b5132 5958
94f592af 5959 assert (fixP->fx_addsy != NULL);
0baf16f2 5960
252b5132
RH		 5961 /* Determine a BFD reloc value based on the operand information.
5962 We are only prepared to turn a few of the operands into
0baf16f2 5963 relocs. */
11b37b7b 5964 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5965 && operand->bitm == 0x3fffffc
11b37b7b 5966 && operand->shift == 0)
94f592af 5967 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5968 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5969 && operand->bitm == 0xfffc
11b37b7b 5970 && operand->shift == 0)
95210096
AM		 5971 {
5972 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5973#ifdef OBJ_XCOFF
5974 fixP->fx_size = 2;
5975 if (target_big_endian)
5976 fixP->fx_where += 2;
5977#endif
5978 }
11b37b7b 5979 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5980 && operand->bitm == 0x3fffffc
11b37b7b 5981 && operand->shift == 0)
94f592af 5982 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5983 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5984 && operand->bitm == 0xfffc
11b37b7b 5985 && operand->shift == 0)
95210096
AM		 5986 {
5987 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5988#ifdef OBJ_XCOFF
5989 fixP->fx_size = 2;
5990 if (target_big_endian)
5991 fixP->fx_where += 2;
5992#endif
5993 }
0baf16f2 5994#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5995 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5996 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5997 && operand->shift == 0)
11b37b7b 5998 {
a7fc733f
AM		 5999 if (ppc_is_toc_sym (fixP->fx_addsy))
6000 {
6001 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 6002#ifdef OBJ_ELF
a7fc733f
AM		 6003 if (ppc_obj64
6004 && (operand->flags & PPC_OPERAND_DS) != 0)
6005 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
6006#endif
6007 }
6008 else
6009 {
6010 fixP->fx_r_type = BFD_RELOC_16;
6011#ifdef OBJ_ELF
6012 if (ppc_obj64
6013 && (operand->flags & PPC_OPERAND_DS) != 0)
6014 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 6015#endif
a7fc733f 6016 }
94f592af 6017 fixP->fx_size = 2;
11b37b7b 6018 if (target_big_endian)
94f592af 6019 fixP->fx_where += 2;
11b37b7b 6020 }
0baf16f2 6021#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6022 else
252b5132
RH		 6023 {
6024 char *sfile;
6025 unsigned int sline;
6026
6027 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6028 symbol. */
94f592af
NC		 6029 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6030 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6031 _("unresolved expression that must be resolved"));
6032 else
94f592af 6033 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6034 _("unsupported relocation against %s"),
94f592af
NC		 6035 S_GET_NAME (fixP->fx_addsy));
6036 fixP->fx_done = 1;
6037 return;
252b5132
RH		 6038 }
6039 }
6040 else
6041 {
6042#ifdef OBJ_ELF
94f592af 6043 ppc_elf_validate_fix (fixP, seg);
252b5132 6044#endif
94f592af 6045 switch (fixP->fx_r_type)
252b5132 6046 {
252b5132 6047 case BFD_RELOC_CTOR:
2b3c4602 6048 if (ppc_obj64)
9c7977b3
AM		 6049 goto ctor64;
6050 /* fall through */
6051
0baf16f2 6052 case BFD_RELOC_32:
94f592af
NC		 6053 if (fixP->fx_pcrel)
6054 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6055 /* fall through */
252b5132
RH		 6056
6057 case BFD_RELOC_RVA:
6058 case BFD_RELOC_32_PCREL:
252b5132 6059 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6060 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6061 value, 4);
6062 break;
6063
7f6d05e8 6064 case BFD_RELOC_64:
9c7977b3 6065 ctor64:
94f592af
NC		 6066 if (fixP->fx_pcrel)
6067 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6068 /* fall through */
0baf16f2 6069
7f6d05e8 6070 case BFD_RELOC_64_PCREL:
94f592af 6071 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6072 value, 8);
81d4177b 6073 break;
0baf16f2 6074
252b5132
RH		 6075 case BFD_RELOC_GPREL16:
6076 case BFD_RELOC_16_GOT_PCREL:
6077 case BFD_RELOC_16_GOTOFF:
6078 case BFD_RELOC_LO16_GOTOFF:
6079 case BFD_RELOC_HI16_GOTOFF:
6080 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6081 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6082 case BFD_RELOC_LO16_BASEREL:
6083 case BFD_RELOC_HI16_BASEREL:
6084 case BFD_RELOC_HI16_S_BASEREL:
6085 case BFD_RELOC_PPC_EMB_NADDR16:
6086 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6087 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6088 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6089 case BFD_RELOC_PPC_EMB_SDAI16:
6090 case BFD_RELOC_PPC_EMB_SDA2REL:
6091 case BFD_RELOC_PPC_EMB_SDA2I16:
6092 case BFD_RELOC_PPC_EMB_RELSEC16:
6093 case BFD_RELOC_PPC_EMB_RELST_LO:
6094 case BFD_RELOC_PPC_EMB_RELST_HI:
6095 case BFD_RELOC_PPC_EMB_RELST_HA:
6096 case BFD_RELOC_PPC_EMB_RELSDA:
6097 case BFD_RELOC_PPC_TOC16:
0baf16f2 6098#ifdef OBJ_ELF
0baf16f2
AM		 6099 case BFD_RELOC_PPC64_TOC16_LO:
6100 case BFD_RELOC_PPC64_TOC16_HI:
6101 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6102#endif
94f592af 6103 if (fixP->fx_pcrel)
252b5132 6104 {
94f592af
NC		 6105 if (fixP->fx_addsy != NULL)
6106 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6107 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6108 bfd_get_reloc_code_name (fixP->fx_r_type),
6109 S_GET_NAME (fixP->fx_addsy));
252b5132 6110 else
94f592af 6111 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6112 _("cannot emit PC relative %s relocation"),
94f592af 6113 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6114 }
6115
94f592af 6116 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6117 value, 2);
6118 break;
6119
3c9d25f4
AM		 6120 case BFD_RELOC_16:
6121 if (fixP->fx_pcrel)
6122 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6123 /* fall through */
6124
6125 case BFD_RELOC_16_PCREL:
6126 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6127 value, 2);
6128 break;
6129
6130 case BFD_RELOC_LO16:
6131 if (fixP->fx_pcrel)
6132 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6133 /* fall through */
6134
6135 case BFD_RELOC_LO16_PCREL:
6136 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6137 value, 2);
6138 break;
6139
252b5132
RH		 6140 /* This case happens when you write, for example,
6141 lis %r3,(L1-L2)@ha
6142 where L1 and L2 are defined later. */
6143 case BFD_RELOC_HI16:
94f592af 6144 if (fixP->fx_pcrel)
3c9d25f4
AM		 6145 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6146 /* fall through */
6147
6148 case BFD_RELOC_HI16_PCREL:
94f592af 6149 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6150 PPC_HI (value), 2);
252b5132 6151 break;
0baf16f2 6152
252b5132 6153 case BFD_RELOC_HI16_S:
94f592af 6154 if (fixP->fx_pcrel)
3c9d25f4
AM		 6155 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6156 /* fall through */
6157
6158 case BFD_RELOC_HI16_S_PCREL:
94f592af 6159 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6160 PPC_HA (value), 2);
6161 break;
6162
6163#ifdef OBJ_ELF
0baf16f2 6164 case BFD_RELOC_PPC64_HIGHER:
94f592af 6165 if (fixP->fx_pcrel)
0baf16f2 6166 abort ();
94f592af 6167 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6168 PPC_HIGHER (value), 2);
252b5132
RH		 6169 break;
6170
0baf16f2 6171 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6172 if (fixP->fx_pcrel)
0baf16f2 6173 abort ();
94f592af 6174 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6175 PPC_HIGHERA (value), 2);
6176 break;
6177
6178 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6179 if (fixP->fx_pcrel)
0baf16f2 6180 abort ();
94f592af 6181 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6182 PPC_HIGHEST (value), 2);
6183 break;
6184
6185 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6186 if (fixP->fx_pcrel)
0baf16f2 6187 abort ();
94f592af 6188 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6189 PPC_HIGHESTA (value), 2);
6190 break;
6191
6192 case BFD_RELOC_PPC64_ADDR16_DS:
6193 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6194 case BFD_RELOC_PPC64_GOT16_DS:
6195 case BFD_RELOC_PPC64_GOT16_LO_DS:
6196 case BFD_RELOC_PPC64_PLT16_LO_DS:
6197 case BFD_RELOC_PPC64_SECTOFF_DS:
6198 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6199 case BFD_RELOC_PPC64_TOC16_DS:
6200 case BFD_RELOC_PPC64_TOC16_LO_DS:
6201 case BFD_RELOC_PPC64_PLTGOT16_DS:
6202 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6203 if (fixP->fx_pcrel)
0baf16f2
AM		 6204 abort ();
6205 {
2132e3a3 6206 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6207 unsigned long val, mask;
0baf16f2
AM		 6208
6209 if (target_big_endian)
adadcc0c 6210 val = bfd_getb32 (where - 2);
0baf16f2 6211 else
adadcc0c
AM		 6212 val = bfd_getl32 (where);
6213 mask = 0xfffc;
6214 /* lq insns reserve the four lsbs. */
6215 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6216 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6217 mask = 0xfff0;
6218 val |= value & mask;
0baf16f2
AM		 6219 if (target_big_endian)
6220 bfd_putb16 ((bfd_vma) val, where);
6221 else
6222 bfd_putl16 ((bfd_vma) val, where);
6223 }
6224 break;
cdba85ec 6225
ba0b2174
AM		 6226 case BFD_RELOC_PPC_B16_BRTAKEN:
6227 case BFD_RELOC_PPC_B16_BRNTAKEN:
6228 case BFD_RELOC_PPC_BA16_BRTAKEN:
6229 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6230 break;
6231
cdba85ec 6232 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6233 case BFD_RELOC_PPC_TLSGD:
6234 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6235 break;
6236
cdba85ec
AM		 6237 case BFD_RELOC_PPC_DTPMOD:
6238 case BFD_RELOC_PPC_TPREL16:
6239 case BFD_RELOC_PPC_TPREL16_LO:
6240 case BFD_RELOC_PPC_TPREL16_HI:
6241 case BFD_RELOC_PPC_TPREL16_HA:
6242 case BFD_RELOC_PPC_TPREL:
6243 case BFD_RELOC_PPC_DTPREL16:
6244 case BFD_RELOC_PPC_DTPREL16_LO:
6245 case BFD_RELOC_PPC_DTPREL16_HI:
6246 case BFD_RELOC_PPC_DTPREL16_HA:
6247 case BFD_RELOC_PPC_DTPREL:
6248 case BFD_RELOC_PPC_GOT_TLSGD16:
6249 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6250 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6251 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6252 case BFD_RELOC_PPC_GOT_TLSLD16:
6253 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6254 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6255 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6256 case BFD_RELOC_PPC_GOT_TPREL16:
6257 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6258 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6259 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6260 case BFD_RELOC_PPC_GOT_DTPREL16:
6261 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6262 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6263 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6264 case BFD_RELOC_PPC64_TPREL16_DS:
6265 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6266 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6267 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6268 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6269 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6270 case BFD_RELOC_PPC64_DTPREL16_DS:
6271 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6272 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6273 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6274 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6275 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6276 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6277 break;
0baf16f2 6278#endif
252b5132 6279 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6280 bytes, rather than 2, so offset it here appropriately. */
252b5132 6281 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6282 if (fixP->fx_pcrel)
252b5132
RH		 6283 abort ();
6284
94f592af 6285 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6286 + ((target_big_endian) ? 2 : 0),
6287 value, 2);
6288 break;
6289
6290 case BFD_RELOC_8:
94f592af 6291 if (fixP->fx_pcrel)
31a91399
NC		 6292 {
6293 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6294 ".byte <undefined_symbol> - ." */
31a91399
NC		 6295 if (fixP->fx_addsy)
6296 as_bad (_("Unable to handle reference to symbol %s"),
6297 S_GET_NAME (fixP->fx_addsy));
6298 else
6299 as_bad (_("Unable to resolve expression"));
6300 fixP->fx_done = 1;
6301 }
6302 else
6303 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6304 value, 1);
252b5132
RH		 6305 break;
6306
6307 case BFD_RELOC_24_PLT_PCREL:
6308 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6309 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6310 abort ();
6311
94f592af 6312 if (fixP->fx_done)
99a814a1
AM		 6313 {
6314 char *where;
6315 unsigned long insn;
6316
6317 /* Fetch the instruction, insert the fully resolved operand
6318 value, and stuff the instruction back again. */
94f592af 6319 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6320 if (target_big_endian)
6321 insn = bfd_getb32 ((unsigned char *) where);
6322 else
6323 insn = bfd_getl32 ((unsigned char *) where);
6324 if ((value & 3) != 0)
94f592af 6325 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6326 _("must branch to an address a multiple of 4"));
6327 if ((offsetT) value < -0x40000000
6328 || (offsetT) value >= 0x40000000)
94f592af 6329 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6330 _("@local or @plt branch destination is too far away, %ld bytes"),
6331 (long) value);
6332 insn = insn | (value & 0x03fffffc);
6333 if (target_big_endian)
6334 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6335 else
6336 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6337 }
252b5132
RH		 6338 break;
6339
6340 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6341 fixP->fx_done = 0;
6342 if (fixP->fx_addsy
6343 && !S_IS_DEFINED (fixP->fx_addsy)
6344 && !S_IS_WEAK (fixP->fx_addsy))
6345 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6346 break;
6347
6348 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6349 fixP->fx_done = 0;
252b5132
RH		 6350 break;
6351
0baf16f2 6352#ifdef OBJ_ELF
0baf16f2
AM		 6353 /* Generated by reference to `sym@tocbase'. The sym is
6354 ignored by the linker. */
6355 case BFD_RELOC_PPC64_TOC:
94f592af 6356 fixP->fx_done = 0;
0baf16f2 6357 break;
0baf16f2 6358#endif
252b5132 6359 default:
bc805888 6360 fprintf (stderr,
94f592af 6361 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6362 fflush (stderr);
252b5132
RH		 6363 abort ();
6364 }
6365 }
6366
6367#ifdef OBJ_ELF
94f592af 6368 fixP->fx_addnumber = value;
4e6935a6
AM		 6369
6370 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6371 from the section contents. If we are going to be emitting a reloc
6372 then the section contents are immaterial, so don't warn if they
6373 happen to overflow. Leave such warnings to ld. */
6374 if (!fixP->fx_done)
6375 fixP->fx_no_overflow = 1;
252b5132 6376#else
94f592af
NC		 6377 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6378 fixP->fx_addnumber = 0;
252b5132
RH		 6379 else
6380 {
6381#ifdef TE_PE
94f592af 6382 fixP->fx_addnumber = 0;
252b5132 6383#else
8edcbfcd
TG		 6384 /* We want to use the offset within the toc, not the actual VMA
6385 of the symbol. */
94f592af 6386 fixP->fx_addnumber =
8edcbfcd
TG		 6387 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6388 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6389#endif
6390 }
6391#endif
252b5132
RH		 6392}
6393
6394/* Generate a reloc for a fixup. */
6395
6396arelent *
98027b10 6397tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6398{
6399 arelent *reloc;
6400
6401 reloc = (arelent *) xmalloc (sizeof (arelent));
6402
49309057
ILT		 6403 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6404 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6405 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6406 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6407 if (reloc->howto == (reloc_howto_type *) NULL)
6408 {
6409 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6410 _("reloc %d not supported by object file format"),
6411 (int) fixp->fx_r_type);
252b5132
RH		 6412 return NULL;
6413 }
6414 reloc->addend = fixp->fx_addnumber;
6415
6416 return reloc;
6417}
75e21f08
JJ		 6418
6419void
98027b10 6420ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6421{
6422 cfi_add_CFA_def_cfa (1, 0);
6423}
6424
6425int
1df69f4f 6426tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6427{
6428 unsigned int regnum = -1;
6429 unsigned int i;
6430 const char *p;
6431 char *q;
6432 static struct { char *name; int dw2regnum; } regnames[] =
6433 {
6434 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6435 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6436 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6437 { "spe_acc", 111 }, { "spefscr", 112 }
6438 };
6439
6440 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6441 if (strcmp (regnames[i].name, regname) == 0)
6442 return regnames[i].dw2regnum;
6443
6444 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6445 {
6446 p = regname + 1 + (regname[1] == '.');
6447 regnum = strtoul (p, &q, 10);
6448 if (p == q || *q || regnum >= 32)
6449 return -1;
6450 if (regname[0] == 'f')
b7d7dc63 6451 regnum += 32;
75e21f08 6452 else if (regname[0] == 'v')
b7d7dc63 6453 regnum += 77;
75e21f08
JJ		 6454 }
6455 else if (regname[0] == 'c' && regname[1] == 'r')
6456 {
6457 p = regname + 2 + (regname[2] == '.');
6458 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6459 return -1;
75e21f08
JJ		 6460 regnum = p[0] - '0' + 68;
6461 }
6462 return regnum;
6463}
A mirror of the official binutils-gdb repository