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* elf32-ppc.c (ppc_elf_check_relocs): Remove dead ifunc code.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163
AM		 182
183/* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 185ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 186\f
187/* The target specific pseudo-ops which we support. */
188
189const pseudo_typeS md_pseudo_table[] =
190{
191 /* Pseudo-ops which must be overridden. */
192 { "byte", ppc_byte, 0 },
193
194#ifdef OBJ_XCOFF
195 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
196 legitimately belong in the obj-*.c file. However, XCOFF is based
197 on COFF, and is only implemented for the RS/6000. We just use
198 obj-coff.c, and add what we need here. */
199 { "comm", ppc_comm, 0 },
200 { "lcomm", ppc_comm, 1 },
201 { "bb", ppc_bb, 0 },
202 { "bc", ppc_bc, 0 },
203 { "bf", ppc_bf, 0 },
204 { "bi", ppc_biei, 0 },
205 { "bs", ppc_bs, 0 },
206 { "csect", ppc_csect, 0 },
207 { "data", ppc_section, 'd' },
208 { "eb", ppc_eb, 0 },
209 { "ec", ppc_ec, 0 },
210 { "ef", ppc_ef, 0 },
211 { "ei", ppc_biei, 1 },
212 { "es", ppc_es, 0 },
213 { "extern", ppc_extern, 0 },
214 { "function", ppc_function, 0 },
215 { "lglobl", ppc_lglobl, 0 },
c865e45b 216 { "ref", ppc_ref, 0 },
252b5132
RH		 217 { "rename", ppc_rename, 0 },
218 { "section", ppc_named_section, 0 },
219 { "stabx", ppc_stabx, 0 },
220 { "text", ppc_section, 't' },
221 { "toc", ppc_toc, 0 },
222 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 223 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 224 { "word", ppc_xcoff_cons, 1 },
225 { "short", ppc_xcoff_cons, 1 },
226 { "vbyte", ppc_vbyte, 0 },
227#endif
228
229#ifdef OBJ_ELF
0baf16f2
AM		 230 { "llong", ppc_elf_cons, 8 },
231 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 232 { "long", ppc_elf_cons, 4 },
233 { "word", ppc_elf_cons, 2 },
234 { "short", ppc_elf_cons, 2 },
235 { "rdata", ppc_elf_rdata, 0 },
236 { "rodata", ppc_elf_rdata, 0 },
237 { "lcomm", ppc_elf_lcomm, 0 },
238#endif
239
240#ifdef TE_PE
99a814a1 241 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 242 { "previous", ppc_previous, 0 },
243 { "pdata", ppc_pdata, 0 },
244 { "ydata", ppc_ydata, 0 },
245 { "reldata", ppc_reldata, 0 },
246 { "rdata", ppc_rdata, 0 },
247 { "ualong", ppc_ualong, 0 },
248 { "znop", ppc_znop, 0 },
249 { "comm", ppc_pe_comm, 0 },
250 { "lcomm", ppc_pe_comm, 1 },
251 { "section", ppc_pe_section, 0 },
252 { "function", ppc_pe_function,0 },
253 { "tocd", ppc_pe_tocd, 0 },
254#endif
255
0baf16f2 256#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 257 { "tc", ppc_tc, 0 },
0baf16f2
AM		 258 { "machine", ppc_machine, 0 },
259#endif
252b5132
RH		 260
261 { NULL, NULL, 0 }
262};
263
264\f
99a814a1
AM		 265/* Predefined register names if -mregnames (or default for Windows NT).
266 In general, there are lots of them, in an attempt to be compatible
267 with a number of other Windows NT assemblers. */
252b5132
RH		 268
269/* Structure to hold information about predefined registers. */
270struct pd_reg
271 {
272 char *name;
273 int value;
274 };
275
276/* List of registers that are pre-defined:
277
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
281
252b5132
RH		 282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
285
7a899fff
C		 286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
289
252b5132
RH		 290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
293
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
297 fpscr has the value 0
298 xer has the value 1
299 lr has the value 8
300 ctr has the value 9
301 pmr has the value 0
302 dar has the value 19
303 dsisr has the value 18
304 dec has the value 22
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
308
81d4177b 309 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 310
311static const struct pd_reg pre_defined_registers[] =
312{
313 { "cr.0", 0 }, /* Condition Registers */
314 { "cr.1", 1 },
315 { "cr.2", 2 },
316 { "cr.3", 3 },
317 { "cr.4", 4 },
318 { "cr.5", 5 },
319 { "cr.6", 6 },
320 { "cr.7", 7 },
321
322 { "cr0", 0 },
323 { "cr1", 1 },
324 { "cr2", 2 },
325 { "cr3", 3 },
326 { "cr4", 4 },
327 { "cr5", 5 },
328 { "cr6", 6 },
329 { "cr7", 7 },
330
331 { "ctr", 9 },
332
333 { "dar", 19 }, /* Data Access Register */
334 { "dec", 22 }, /* Decrementer */
335 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
336
337 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 338 { "f.1", 1 },
339 { "f.10", 10 },
340 { "f.11", 11 },
341 { "f.12", 12 },
342 { "f.13", 13 },
343 { "f.14", 14 },
344 { "f.15", 15 },
345 { "f.16", 16 },
346 { "f.17", 17 },
347 { "f.18", 18 },
348 { "f.19", 19 },
349 { "f.2", 2 },
350 { "f.20", 20 },
351 { "f.21", 21 },
352 { "f.22", 22 },
353 { "f.23", 23 },
354 { "f.24", 24 },
355 { "f.25", 25 },
356 { "f.26", 26 },
357 { "f.27", 27 },
358 { "f.28", 28 },
359 { "f.29", 29 },
360 { "f.3", 3 },
252b5132
RH		 361 { "f.30", 30 },
362 { "f.31", 31 },
066be9f7
PB		 363
364 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
365 { "f.33", 33 },
366 { "f.34", 34 },
367 { "f.35", 35 },
368 { "f.36", 36 },
369 { "f.37", 37 },
370 { "f.38", 38 },
371 { "f.39", 39 },
81d4177b 372 { "f.4", 4 },
066be9f7
PB		 373 { "f.40", 40 },
374 { "f.41", 41 },
375 { "f.42", 42 },
376 { "f.43", 43 },
377 { "f.44", 44 },
378 { "f.45", 45 },
379 { "f.46", 46 },
380 { "f.47", 47 },
381 { "f.48", 48 },
382 { "f.49", 49 },
81d4177b 383 { "f.5", 5 },
066be9f7
PB		 384 { "f.50", 50 },
385 { "f.51", 51 },
386 { "f.52", 52 },
387 { "f.53", 53 },
388 { "f.54", 54 },
389 { "f.55", 55 },
390 { "f.56", 56 },
391 { "f.57", 57 },
392 { "f.58", 58 },
393 { "f.59", 59 },
81d4177b 394 { "f.6", 6 },
066be9f7
PB		 395 { "f.60", 60 },
396 { "f.61", 61 },
397 { "f.62", 62 },
398 { "f.63", 63 },
81d4177b
KH		 399 { "f.7", 7 },
400 { "f.8", 8 },
401 { "f.9", 9 },
402
403 { "f0", 0 },
404 { "f1", 1 },
405 { "f10", 10 },
406 { "f11", 11 },
407 { "f12", 12 },
408 { "f13", 13 },
409 { "f14", 14 },
410 { "f15", 15 },
411 { "f16", 16 },
412 { "f17", 17 },
413 { "f18", 18 },
414 { "f19", 19 },
415 { "f2", 2 },
416 { "f20", 20 },
417 { "f21", 21 },
418 { "f22", 22 },
419 { "f23", 23 },
420 { "f24", 24 },
421 { "f25", 25 },
422 { "f26", 26 },
423 { "f27", 27 },
424 { "f28", 28 },
425 { "f29", 29 },
426 { "f3", 3 },
252b5132
RH		 427 { "f30", 30 },
428 { "f31", 31 },
066be9f7
PB		 429
430 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
431 { "f33", 33 },
432 { "f34", 34 },
433 { "f35", 35 },
434 { "f36", 36 },
435 { "f37", 37 },
436 { "f38", 38 },
437 { "f39", 39 },
81d4177b 438 { "f4", 4 },
066be9f7
PB		 439 { "f40", 40 },
440 { "f41", 41 },
441 { "f42", 42 },
442 { "f43", 43 },
443 { "f44", 44 },
444 { "f45", 45 },
445 { "f46", 46 },
446 { "f47", 47 },
447 { "f48", 48 },
448 { "f49", 49 },
81d4177b 449 { "f5", 5 },
066be9f7
PB		 450 { "f50", 50 },
451 { "f51", 51 },
452 { "f52", 52 },
453 { "f53", 53 },
454 { "f54", 54 },
455 { "f55", 55 },
456 { "f56", 56 },
457 { "f57", 57 },
458 { "f58", 58 },
459 { "f59", 59 },
81d4177b 460 { "f6", 6 },
066be9f7
PB		 461 { "f60", 60 },
462 { "f61", 61 },
463 { "f62", 62 },
464 { "f63", 63 },
81d4177b
KH		 465 { "f7", 7 },
466 { "f8", 8 },
467 { "f9", 9 },
252b5132
RH		 468
469 { "fpscr", 0 },
470
c3d65c1c
BE		 471 /* Quantization registers used with pair single instructions. */
472 { "gqr.0", 0 },
473 { "gqr.1", 1 },
474 { "gqr.2", 2 },
475 { "gqr.3", 3 },
476 { "gqr.4", 4 },
477 { "gqr.5", 5 },
478 { "gqr.6", 6 },
479 { "gqr.7", 7 },
480 { "gqr0", 0 },
481 { "gqr1", 1 },
482 { "gqr2", 2 },
483 { "gqr3", 3 },
484 { "gqr4", 4 },
485 { "gqr5", 5 },
486 { "gqr6", 6 },
487 { "gqr7", 7 },
488
252b5132
RH		 489 { "lr", 8 }, /* Link Register */
490
491 { "pmr", 0 },
492
493 { "r.0", 0 }, /* General Purpose Registers */
494 { "r.1", 1 },
495 { "r.10", 10 },
496 { "r.11", 11 },
497 { "r.12", 12 },
498 { "r.13", 13 },
499 { "r.14", 14 },
500 { "r.15", 15 },
501 { "r.16", 16 },
502 { "r.17", 17 },
503 { "r.18", 18 },
504 { "r.19", 19 },
505 { "r.2", 2 },
506 { "r.20", 20 },
507 { "r.21", 21 },
508 { "r.22", 22 },
509 { "r.23", 23 },
510 { "r.24", 24 },
511 { "r.25", 25 },
512 { "r.26", 26 },
513 { "r.27", 27 },
514 { "r.28", 28 },
515 { "r.29", 29 },
516 { "r.3", 3 },
517 { "r.30", 30 },
518 { "r.31", 31 },
519 { "r.4", 4 },
520 { "r.5", 5 },
521 { "r.6", 6 },
522 { "r.7", 7 },
523 { "r.8", 8 },
524 { "r.9", 9 },
525
526 { "r.sp", 1 }, /* Stack Pointer */
527
528 { "r.toc", 2 }, /* Pointer to the table of contents */
529
530 { "r0", 0 }, /* More general purpose registers */
531 { "r1", 1 },
532 { "r10", 10 },
533 { "r11", 11 },
534 { "r12", 12 },
535 { "r13", 13 },
536 { "r14", 14 },
537 { "r15", 15 },
538 { "r16", 16 },
539 { "r17", 17 },
540 { "r18", 18 },
541 { "r19", 19 },
542 { "r2", 2 },
543 { "r20", 20 },
544 { "r21", 21 },
545 { "r22", 22 },
546 { "r23", 23 },
547 { "r24", 24 },
548 { "r25", 25 },
549 { "r26", 26 },
550 { "r27", 27 },
551 { "r28", 28 },
552 { "r29", 29 },
553 { "r3", 3 },
554 { "r30", 30 },
555 { "r31", 31 },
556 { "r4", 4 },
557 { "r5", 5 },
558 { "r6", 6 },
559 { "r7", 7 },
560 { "r8", 8 },
561 { "r9", 9 },
562
563 { "rtoc", 2 }, /* Table of contents */
564
565 { "sdr1", 25 }, /* Storage Description Register 1 */
566
567 { "sp", 1 },
568
569 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
570 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 571
066be9f7 572 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 573 { "v.1", 1 },
574 { "v.10", 10 },
575 { "v.11", 11 },
576 { "v.12", 12 },
577 { "v.13", 13 },
578 { "v.14", 14 },
579 { "v.15", 15 },
580 { "v.16", 16 },
581 { "v.17", 17 },
582 { "v.18", 18 },
583 { "v.19", 19 },
584 { "v.2", 2 },
585 { "v.20", 20 },
586 { "v.21", 21 },
587 { "v.22", 22 },
588 { "v.23", 23 },
589 { "v.24", 24 },
590 { "v.25", 25 },
591 { "v.26", 26 },
592 { "v.27", 27 },
593 { "v.28", 28 },
594 { "v.29", 29 },
595 { "v.3", 3 },
7a899fff
C		 596 { "v.30", 30 },
597 { "v.31", 31 },
81d4177b
KH		 598 { "v.4", 4 },
599 { "v.5", 5 },
600 { "v.6", 6 },
601 { "v.7", 7 },
602 { "v.8", 8 },
603 { "v.9", 9 },
7a899fff
C		 604
605 { "v0", 0 },
81d4177b
KH		 606 { "v1", 1 },
607 { "v10", 10 },
608 { "v11", 11 },
609 { "v12", 12 },
610 { "v13", 13 },
611 { "v14", 14 },
612 { "v15", 15 },
613 { "v16", 16 },
614 { "v17", 17 },
615 { "v18", 18 },
616 { "v19", 19 },
617 { "v2", 2 },
618 { "v20", 20 },
619 { "v21", 21 },
620 { "v22", 22 },
621 { "v23", 23 },
622 { "v24", 24 },
623 { "v25", 25 },
624 { "v26", 26 },
625 { "v27", 27 },
626 { "v28", 28 },
627 { "v29", 29 },
628 { "v3", 3 },
7a899fff
C		 629 { "v30", 30 },
630 { "v31", 31 },
81d4177b
KH		 631 { "v4", 4 },
632 { "v5", 5 },
633 { "v6", 6 },
634 { "v7", 7 },
635 { "v8", 8 },
7a899fff 636 { "v9", 9 },
252b5132 637
066be9f7
PB		 638 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
639 { "vs.1", 1 },
640 { "vs.10", 10 },
641 { "vs.11", 11 },
642 { "vs.12", 12 },
643 { "vs.13", 13 },
644 { "vs.14", 14 },
645 { "vs.15", 15 },
646 { "vs.16", 16 },
647 { "vs.17", 17 },
648 { "vs.18", 18 },
649 { "vs.19", 19 },
650 { "vs.2", 2 },
651 { "vs.20", 20 },
652 { "vs.21", 21 },
653 { "vs.22", 22 },
654 { "vs.23", 23 },
655 { "vs.24", 24 },
656 { "vs.25", 25 },
657 { "vs.26", 26 },
658 { "vs.27", 27 },
659 { "vs.28", 28 },
660 { "vs.29", 29 },
661 { "vs.3", 3 },
662 { "vs.30", 30 },
663 { "vs.31", 31 },
664 { "vs.32", 32 },
665 { "vs.33", 33 },
666 { "vs.34", 34 },
667 { "vs.35", 35 },
668 { "vs.36", 36 },
669 { "vs.37", 37 },
670 { "vs.38", 38 },
671 { "vs.39", 39 },
672 { "vs.4", 4 },
673 { "vs.40", 40 },
674 { "vs.41", 41 },
675 { "vs.42", 42 },
676 { "vs.43", 43 },
677 { "vs.44", 44 },
678 { "vs.45", 45 },
679 { "vs.46", 46 },
680 { "vs.47", 47 },
681 { "vs.48", 48 },
682 { "vs.49", 49 },
683 { "vs.5", 5 },
684 { "vs.50", 50 },
685 { "vs.51", 51 },
686 { "vs.52", 52 },
687 { "vs.53", 53 },
688 { "vs.54", 54 },
689 { "vs.55", 55 },
690 { "vs.56", 56 },
691 { "vs.57", 57 },
692 { "vs.58", 58 },
693 { "vs.59", 59 },
694 { "vs.6", 6 },
695 { "vs.60", 60 },
696 { "vs.61", 61 },
697 { "vs.62", 62 },
698 { "vs.63", 63 },
699 { "vs.7", 7 },
700 { "vs.8", 8 },
701 { "vs.9", 9 },
702
703 { "vs0", 0 },
704 { "vs1", 1 },
705 { "vs10", 10 },
706 { "vs11", 11 },
707 { "vs12", 12 },
708 { "vs13", 13 },
709 { "vs14", 14 },
710 { "vs15", 15 },
711 { "vs16", 16 },
712 { "vs17", 17 },
713 { "vs18", 18 },
714 { "vs19", 19 },
715 { "vs2", 2 },
716 { "vs20", 20 },
717 { "vs21", 21 },
718 { "vs22", 22 },
719 { "vs23", 23 },
720 { "vs24", 24 },
721 { "vs25", 25 },
722 { "vs26", 26 },
723 { "vs27", 27 },
724 { "vs28", 28 },
725 { "vs29", 29 },
726 { "vs3", 3 },
727 { "vs30", 30 },
728 { "vs31", 31 },
729 { "vs32", 32 },
730 { "vs33", 33 },
731 { "vs34", 34 },
732 { "vs35", 35 },
733 { "vs36", 36 },
734 { "vs37", 37 },
735 { "vs38", 38 },
736 { "vs39", 39 },
737 { "vs4", 4 },
738 { "vs40", 40 },
739 { "vs41", 41 },
740 { "vs42", 42 },
741 { "vs43", 43 },
742 { "vs44", 44 },
743 { "vs45", 45 },
744 { "vs46", 46 },
745 { "vs47", 47 },
746 { "vs48", 48 },
747 { "vs49", 49 },
748 { "vs5", 5 },
749 { "vs50", 50 },
750 { "vs51", 51 },
751 { "vs52", 52 },
752 { "vs53", 53 },
753 { "vs54", 54 },
754 { "vs55", 55 },
755 { "vs56", 56 },
756 { "vs57", 57 },
757 { "vs58", 58 },
758 { "vs59", 59 },
759 { "vs6", 6 },
760 { "vs60", 60 },
761 { "vs61", 61 },
762 { "vs62", 62 },
763 { "vs63", 63 },
764 { "vs7", 7 },
765 { "vs8", 8 },
766 { "vs9", 9 },
767
252b5132
RH		 768 { "xer", 1 },
769
770};
771
bc805888 772#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 773
774/* Given NAME, find the register number associated with that name, return
775 the integer value associated with the given name or -1 on failure. */
776
252b5132 777static int
98027b10 778reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 779{
780 int middle, low, high;
781 int cmp;
782
783 low = 0;
784 high = regcount - 1;
785
786 do
787 {
788 middle = (low + high) / 2;
789 cmp = strcasecmp (name, regs[middle].name);
790 if (cmp < 0)
791 high = middle - 1;
792 else if (cmp > 0)
793 low = middle + 1;
794 else
795 return regs[middle].value;
796 }
797 while (low <= high);
798
799 return -1;
800}
801
802/*
99a814a1 803 * Summary of register_name.
252b5132
RH		 804 *
805 * in: Input_line_pointer points to 1st char of operand.
806 *
807 * out: A expressionS.
808 * The operand may have been a register: in this case, X_op == O_register,
809 * X_add_number is set to the register number, and truth is returned.
810 * Input_line_pointer->(next non-blank) char after operand, or is in its
811 * original state.
812 */
813
b34976b6 814static bfd_boolean
98027b10 815register_name (expressionS *expressionP)
252b5132
RH		 816{
817 int reg_number;
818 char *name;
819 char *start;
820 char c;
821
99a814a1 822 /* Find the spelling of the operand. */
252b5132 823 start = name = input_line_pointer;
3882b010 824 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 825 name = ++input_line_pointer;
826
3882b010 827 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 828 return FALSE;
252b5132
RH		 829
830 c = get_symbol_end ();
831 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
832
468cced8
AM		 833 /* Put back the delimiting char. */
834 *input_line_pointer = c;
835
99a814a1 836 /* Look to see if it's in the register table. */
81d4177b 837 if (reg_number >= 0)
252b5132
RH		 838 {
839 expressionP->X_op = O_register;
840 expressionP->X_add_number = reg_number;
81d4177b 841
99a814a1 842 /* Make the rest nice. */
252b5132
RH		 843 expressionP->X_add_symbol = NULL;
844 expressionP->X_op_symbol = NULL;
b34976b6 845 return TRUE;
252b5132 846 }
468cced8
AM		 847
848 /* Reset the line as if we had not done anything. */
849 input_line_pointer = start;
b34976b6 850 return FALSE;
252b5132
RH		 851}
852\f
853/* This function is called for each symbol seen in an expression. It
854 handles the special parsing which PowerPC assemblers are supposed
855 to use for condition codes. */
856
857/* Whether to do the special parsing. */
b34976b6 858static bfd_boolean cr_operand;
252b5132
RH		 859
860/* Names to recognize in a condition code. This table is sorted. */
861static const struct pd_reg cr_names[] =
862{
863 { "cr0", 0 },
864 { "cr1", 1 },
865 { "cr2", 2 },
866 { "cr3", 3 },
867 { "cr4", 4 },
868 { "cr5", 5 },
869 { "cr6", 6 },
870 { "cr7", 7 },
871 { "eq", 2 },
872 { "gt", 1 },
873 { "lt", 0 },
874 { "so", 3 },
875 { "un", 3 }
876};
877
878/* Parsing function. This returns non-zero if it recognized an
879 expression. */
880
881int
91d6fa6a 882ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 883{
884 int val;
885
886 if (! cr_operand)
887 return 0;
888
13abbae3
AM		 889 if (*name == '%')
890 ++name;
252b5132
RH		 891 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
892 name);
893 if (val < 0)
894 return 0;
895
91d6fa6a
NC		 896 exp->X_op = O_constant;
897 exp->X_add_number = val;
252b5132
RH		 898
899 return 1;
900}
901\f
902/* Local variables. */
903
2b3c4602
AM		 904/* Whether to target xcoff64/elf64. */
905static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 906
252b5132
RH		 907/* Opcode hash table. */
908static struct hash_control *ppc_hash;
909
910/* Macro hash table. */
911static struct hash_control *ppc_macro_hash;
912
913#ifdef OBJ_ELF
99a814a1 914/* What type of shared library support to use. */
5d6f4f16 915static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 916
99a814a1 917/* Flags to set in the elf header. */
252b5132
RH		 918static flagword ppc_flags = 0;
919
920/* Whether this is Solaris or not. */
921#ifdef TARGET_SOLARIS_COMMENT
b34976b6 922#define SOLARIS_P TRUE
252b5132 923#else
b34976b6 924#define SOLARIS_P FALSE
252b5132
RH		 925#endif
926
b34976b6 927static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 928#endif
929
930#ifdef OBJ_XCOFF
931
932/* The RS/6000 assembler uses the .csect pseudo-op to generate code
933 using a bunch of different sections. These assembler sections,
934 however, are all encompassed within the .text or .data sections of
935 the final output file. We handle this by using different
936 subsegments within these main segments. */
937
938/* Next subsegment to allocate within the .text segment. */
939static subsegT ppc_text_subsegment = 2;
940
941/* Linked list of csects in the text section. */
942static symbolS *ppc_text_csects;
943
944/* Next subsegment to allocate within the .data segment. */
945static subsegT ppc_data_subsegment = 2;
946
947/* Linked list of csects in the data section. */
948static symbolS *ppc_data_csects;
949
950/* The current csect. */
951static symbolS *ppc_current_csect;
952
953/* The RS/6000 assembler uses a TOC which holds addresses of functions
954 and variables. Symbols are put in the TOC with the .tc pseudo-op.
955 A special relocation is used when accessing TOC entries. We handle
956 the TOC as a subsegment within the .data segment. We set it up if
957 we see a .toc pseudo-op, and save the csect symbol here. */
958static symbolS *ppc_toc_csect;
959
960/* The first frag in the TOC subsegment. */
961static fragS *ppc_toc_frag;
962
963/* The first frag in the first subsegment after the TOC in the .data
964 segment. NULL if there are no subsegments after the TOC. */
965static fragS *ppc_after_toc_frag;
966
967/* The current static block. */
968static symbolS *ppc_current_block;
969
970/* The COFF debugging section; set by md_begin. This is not the
971 .debug section, but is instead the secret BFD section which will
972 cause BFD to set the section number of a symbol to N_DEBUG. */
973static asection *ppc_coff_debug_section;
974
975#endif /* OBJ_XCOFF */
976
977#ifdef TE_PE
978
979/* Various sections that we need for PE coff support. */
980static segT ydata_section;
981static segT pdata_section;
982static segT reldata_section;
983static segT rdata_section;
984static segT tocdata_section;
985
81d4177b 986/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 987static segT ppc_previous_section;
988static segT ppc_current_section;
989
990#endif /* TE_PE */
991
992#ifdef OBJ_ELF
993symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 994#define PPC_APUINFO_ISEL 0x40
995#define PPC_APUINFO_PMR 0x41
996#define PPC_APUINFO_RFMCI 0x42
997#define PPC_APUINFO_CACHELCK 0x43
998#define PPC_APUINFO_SPE 0x100
999#define PPC_APUINFO_EFS 0x101
1000#define PPC_APUINFO_BRLOCK 0x102
1001
b34976b6
AM		 1002/*
1003 * We keep a list of APUinfo
6a0c61b7
EZ		 1004 */
1005unsigned long *ppc_apuinfo_list;
1006unsigned int ppc_apuinfo_num;
1007unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1008#endif /* OBJ_ELF */
1009\f
1010#ifdef OBJ_ELF
15c1449b 1011const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1012#else
15c1449b 1013const char *const md_shortopts = "um:";
252b5132 1014#endif
15c1449b 1015const struct option md_longopts[] = {
252b5132
RH		 1016 {NULL, no_argument, NULL, 0}
1017};
15c1449b 1018const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1019
1020int
98027b10 1021md_parse_option (int c, char *arg)
252b5132 1022{
69fe9ce5
AM		 1023 ppc_cpu_t new_cpu;
1024
252b5132
RH		 1025 switch (c)
1026 {
1027 case 'u':
1028 /* -u means that any undefined symbols should be treated as
1029 external, which is the default for gas anyhow. */
1030 break;
1031
1032#ifdef OBJ_ELF
1033 case 'l':
1034 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1035 sake, recognize -be also. */
252b5132
RH		 1036 if (strcmp (arg, "e") == 0)
1037 {
1038 target_big_endian = 0;
1039 set_target_endian = 1;
1040 }
1041 else
1042 return 0;
1043
1044 break;
1045
1046 case 'b':
1047 if (strcmp (arg, "e") == 0)
1048 {
1049 target_big_endian = 1;
1050 set_target_endian = 1;
1051 }
1052 else
1053 return 0;
1054
1055 break;
1056
1057 case 'K':
99a814a1 1058 /* Recognize -K PIC. */
252b5132
RH		 1059 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1060 {
1061 shlib = SHLIB_PIC;
1062 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068#endif
1069
7f6d05e8
CP		 1070 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1071 case 'a':
1072 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1073 {
1074#ifdef BFD64
1075 ppc_obj64 = 1;
1076#else
1077 as_fatal (_("%s unsupported"), "-a64");
1078#endif
1079 }
7f6d05e8 1080 else if (strcmp (arg, "32") == 0)
2b3c4602 1081 ppc_obj64 = 0;
7f6d05e8
CP		 1082 else
1083 return 0;
1084 break;
81d4177b 1085
252b5132 1086 case 'm':
69fe9ce5
AM		 1087 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1088 ppc_cpu = new_cpu;
252b5132
RH		 1089
1090 else if (strcmp (arg, "regnames") == 0)
b34976b6 1091 reg_names_p = TRUE;
252b5132
RH		 1092
1093 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1094 reg_names_p = FALSE;
252b5132
RH		 1095
1096#ifdef OBJ_ELF
99a814a1
AM		 1097 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1098 that require relocation. */
252b5132
RH		 1099 else if (strcmp (arg, "relocatable") == 0)
1100 {
5d6f4f16 1101 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1102 ppc_flags |= EF_PPC_RELOCATABLE;
1103 }
1104
1105 else if (strcmp (arg, "relocatable-lib") == 0)
1106 {
5d6f4f16 1107 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1108 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1109 }
1110
99a814a1 1111 /* -memb, set embedded bit. */
252b5132
RH		 1112 else if (strcmp (arg, "emb") == 0)
1113 ppc_flags |= EF_PPC_EMB;
1114
99a814a1
AM		 1115 /* -mlittle/-mbig set the endianess. */
1116 else if (strcmp (arg, "little") == 0
1117 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1118 {
1119 target_big_endian = 0;
1120 set_target_endian = 1;
1121 }
1122
1123 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1124 {
1125 target_big_endian = 1;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "solaris") == 0)
1130 {
b34976b6 1131 msolaris = TRUE;
252b5132
RH		 1132 ppc_comment_chars = ppc_solaris_comment_chars;
1133 }
1134
1135 else if (strcmp (arg, "no-solaris") == 0)
1136 {
b34976b6 1137 msolaris = FALSE;
252b5132
RH		 1138 ppc_comment_chars = ppc_eabi_comment_chars;
1139 }
1140#endif
1141 else
1142 {
1143 as_bad (_("invalid switch -m%s"), arg);
1144 return 0;
1145 }
1146 break;
1147
1148#ifdef OBJ_ELF
1149 /* -V: SVR4 argument to print version ID. */
1150 case 'V':
1151 print_version_id ();
1152 break;
1153
1154 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1155 should be emitted or not. FIXME: Not implemented. */
1156 case 'Q':
1157 break;
1158
1159 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1160 rather than .stabs.excl, which is ignored by the linker.
1161 FIXME: Not implemented. */
1162 case 's':
1163 if (arg)
1164 return 0;
1165
1166 break;
1167#endif
1168
1169 default:
1170 return 0;
1171 }
1172
1173 return 1;
1174}
1175
1176void
98027b10 1177md_show_usage (FILE *stream)
252b5132 1178{
bc805888 1179 fprintf (stream, _("\
252b5132 1180PowerPC options:\n\
df12615d
AM		 1181-a32 generate ELF32/XCOFF32\n\
1182-a64 generate ELF64/XCOFF64\n\
252b5132 1183-u ignored\n\
23e1d84c
AM		 1184-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1185-mpwr generate code for POWER (RIOS1)\n\
1186-m601 generate code for PowerPC 601\n\
418c1742 1187-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1188 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1189-m403 generate code for PowerPC 403\n\
1190-m405 generate code for PowerPC 405\n\
3d8aea2f 1191-m440 generate code for PowerPC 440\n\
c8187e15 1192-m464 generate code for PowerPC 464\n\
9fe54b1c 1193-m476 generate code for PowerPC 476\n\
f5c120c5 1194-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1195 generate code for PowerPC 7400/7410/7450/7455\n\
1196-m750cl generate code for PowerPC 750cl\n"));
df12615d 1197 fprintf (stream, _("\
23e1d84c 1198-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1199-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1200-mbooke generate code for 32-bit PowerPC BookE\n\
634b50f2 1201-ma2 generate code for A2 architecture\n\
23e1d84c 1202-mpower4 generate code for Power4 architecture\n\
b0648eec 1203-mpower5 generate code for Power5 architecture\n\
9622b051 1204-mpower6 generate code for Power6 architecture\n\
9b4e5766 1205-mpower7 generate code for Power7 architecture\n\
ede602d7 1206-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1207-mcom generate code Power/PowerPC common instructions\n\
df12615d 1208-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1209 fprintf (stream, _("\
df12615d 1210-maltivec generate code for AltiVec\n\
9b4e5766 1211-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1212-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1213-me500, -me500x2 generate code for Motorola e500 core complex\n\
0dc93057
AM		 1214-me500mc, generate code for Freescale e500mc core complex\n\
1215-me500mc64, generate code for Freescale e500mc64 core complex\n\
df12615d
AM		 1216-mspe generate code for Motorola SPE instructions\n\
1217-mregnames Allow symbolic names for registers\n\
1218-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1219#ifdef OBJ_ELF
bc805888 1220 fprintf (stream, _("\
252b5132
RH		 1221-mrelocatable support for GCC's -mrelocatble option\n\
1222-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1223-memb set PPC_EMB bit in ELF flags\n\
df12615d 1224-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1225 generate code for a little endian machine\n\
df12615d
AM		 1226-mbig, -mbig-endian, -b, -be\n\
1227 generate code for a big endian machine\n\
252b5132
RH		 1228-msolaris generate code for Solaris\n\
1229-mno-solaris do not generate code for Solaris\n\
1230-V print assembler version number\n\
1231-Qy, -Qn ignored\n"));
1232#endif
1233}
1234\f
1235/* Set ppc_cpu if it is not already set. */
1236
1237static void
98027b10 1238ppc_set_cpu (void)
252b5132
RH		 1239{
1240 const char *default_os = TARGET_OS;
1241 const char *default_cpu = TARGET_CPU;
1242
3c9030c1 1243 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1244 {
2a98c3a6 1245 if (ppc_obj64)
3c9030c1 1246 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1247 else if (strncmp (default_os, "aix", 3) == 0
1248 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1249 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1250 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1251 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1252 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1253 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1254 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1255 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1256 else
99a814a1
AM		 1257 as_fatal (_("Unknown default cpu = %s, os = %s"),
1258 default_cpu, default_os);
252b5132
RH		 1259 }
1260}
1261
9232bbb0
AM		 1262/* Figure out the BFD architecture to use. This function and ppc_mach
1263 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1264
1265enum bfd_architecture
98027b10 1266ppc_arch (void)
252b5132
RH		 1267{
1268 const char *default_cpu = TARGET_CPU;
1269 ppc_set_cpu ();
1270
1271 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1272 return bfd_arch_powerpc;
1273 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1274 return bfd_arch_rs6000;
1275 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1276 {
1277 if (strcmp (default_cpu, "rs6000") == 0)
1278 return bfd_arch_rs6000;
0baf16f2 1279 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1280 return bfd_arch_powerpc;
1281 }
1282
1283 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1284 return bfd_arch_unknown;
1285}
1286
7f6d05e8 1287unsigned long
98027b10 1288ppc_mach (void)
7f6d05e8 1289{
2a98c3a6
AM		 1290 if (ppc_obj64)
1291 return bfd_mach_ppc64;
1292 else if (ppc_arch () == bfd_arch_rs6000)
1293 return bfd_mach_rs6k;
1294 else
1295 return bfd_mach_ppc;
7f6d05e8
CP		 1296}
1297
81d4177b 1298extern char*
98027b10 1299ppc_target_format (void)
7f6d05e8
CP		 1300{
1301#ifdef OBJ_COFF
1302#ifdef TE_PE
99a814a1 1303 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1304#elif TE_POWERMAC
0baf16f2 1305 return "xcoff-powermac";
7f6d05e8 1306#else
eb1e0e80 1307# ifdef TE_AIX5
2b3c4602 1308 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1309# else
2b3c4602 1310 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1311# endif
7f6d05e8 1312#endif
7f6d05e8
CP		 1313#endif
1314#ifdef OBJ_ELF
9d8504b1
PB		 1315# ifdef TE_VXWORKS
1316 return "elf32-powerpc-vxworks";
1317# else
0baf16f2 1318 return (target_big_endian
2b3c4602
AM		 1319 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1320 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1321# endif
7f6d05e8
CP		 1322#endif
1323}
1324
69c040df
AM		 1325/* Insert opcodes and macros into hash tables. Called at startup and
1326 for .cpu pseudo. */
252b5132 1327
69c040df
AM		 1328static void
1329ppc_setup_opcodes (void)
252b5132 1330{
98027b10 1331 const struct powerpc_opcode *op;
252b5132
RH		 1332 const struct powerpc_opcode *op_end;
1333 const struct powerpc_macro *macro;
1334 const struct powerpc_macro *macro_end;
b84bf58a 1335 bfd_boolean bad_insn = FALSE;
252b5132 1336
69c040df
AM		 1337 if (ppc_hash != NULL)
1338 hash_die (ppc_hash);
1339 if (ppc_macro_hash != NULL)
1340 hash_die (ppc_macro_hash);
252b5132
RH		 1341
1342 /* Insert the opcodes into a hash table. */
1343 ppc_hash = hash_new ();
1344
c43a438d 1345 if (ENABLE_CHECKING)
b84bf58a 1346 {
c43a438d 1347 unsigned int i;
b84bf58a 1348
c43a438d
AM		 1349 /* Check operand masks. Code here and in the disassembler assumes
1350 all the 1's in the mask are contiguous. */
1351 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1352 {
c43a438d
AM		 1353 unsigned long mask = powerpc_operands[i].bitm;
1354 unsigned long right_bit;
1355 unsigned int j;
1356
1357 right_bit = mask & -mask;
1358 mask += right_bit;
1359 right_bit = mask & -mask;
1360 if (mask != right_bit)
1361 {
1362 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1363 bad_insn = TRUE;
1364 }
1365 for (j = i + 1; j < num_powerpc_operands; ++j)
1366 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1367 sizeof (powerpc_operands[0])) == 0)
1368 {
1369 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1370 j, i);
1371 bad_insn = TRUE;
1372 }
b84bf58a
AM		 1373 }
1374 }
1375
252b5132
RH		 1376 op_end = powerpc_opcodes + powerpc_num_opcodes;
1377 for (op = powerpc_opcodes; op < op_end; op++)
1378 {
c43a438d 1379 if (ENABLE_CHECKING)
b84bf58a 1380 {
c43a438d
AM		 1381 const unsigned char *o;
1382 unsigned long omask = op->mask;
8dbcd839 1383
d815f1a9 1384 if (op != powerpc_opcodes)
8dbcd839 1385 {
d815f1a9
AM		 1386 /* The major opcodes had better be sorted. Code in the
1387 disassembler assumes the insns are sorted according to
1388 major opcode. */
1389 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1390 {
1391 as_bad (_("major opcode is not sorted for %s"),
1392 op->name);
1393 bad_insn = TRUE;
1394 }
1395
1396 /* Warn if the table isn't more strictly ordered.
1397 Unfortunately it doesn't seem possible to order the
1398 table on much more than the major opcode, which makes
1399 it difficult to implement a binary search in the
1400 disassembler. The problem is that we have multiple
1401 ways to disassemble instructions, and we usually want
1402 to choose a more specific form (with more bits set in
1403 the opcode) than a more general form. eg. all of the
1404 following are equivalent:
1405 bne label # opcode = 0x40820000, mask = 0xff830003
1406 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1407 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1408
1409 There are also cases where the table needs to be out
1410 of order to disassemble the correct instruction for
2f3bb96a 1411 processor variants. */
d815f1a9
AM		 1412 else if (0)
1413 {
1414 unsigned long t1 = op[0].opcode;
1415 unsigned long t2 = op[-1].opcode;
1416
1417 if (((t1 ^ t2) & 0xfc0007ff) == 0
1418 && (t1 & 0xfc0006df) == 0x7c000286)
1419 {
1420 /* spr field is split. */
1421 t1 = ((t1 & ~0x1ff800)
1422 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1423 t2 = ((t2 & ~0x1ff800)
1424 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1425 }
1426 if (t1 < t2)
1427 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1428 op[0].name, op[0].opcode, op[0].mask,
1429 op[-1].name, op[-1].opcode, op[-1].mask);
1430 }
8dbcd839 1431 }
c43a438d
AM		 1432
1433 /* The mask had better not trim off opcode bits. */
1434 if ((op->opcode & omask) != op->opcode)
1435 {
1436 as_bad (_("mask trims opcode bits for %s"),
1437 op->name);
1438 bad_insn = TRUE;
1439 }
1440
1441 /* The operands must not overlap the opcode or each other. */
1442 for (o = op->operands; *o; ++o)
1443 if (*o >= num_powerpc_operands)
1444 {
1445 as_bad (_("operand index error for %s"),
1446 op->name);
1447 bad_insn = TRUE;
1448 }
1449 else
b84bf58a 1450 {
c43a438d
AM		 1451 const struct powerpc_operand *operand = &powerpc_operands[*o];
1452 if (operand->shift >= 0)
b84bf58a 1453 {
c43a438d
AM		 1454 unsigned long mask = operand->bitm << operand->shift;
1455 if (omask & mask)
1456 {
1457 as_bad (_("operand %d overlap in %s"),
1458 (int) (o - op->operands), op->name);
1459 bad_insn = TRUE;
1460 }
1461 omask |= mask;
b84bf58a 1462 }
b84bf58a 1463 }
c43a438d 1464 }
252b5132 1465
2b3c4602 1466 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1467 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1468 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1469 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1470 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1471 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1472 {
1473 const char *retval;
1474
98027b10 1475 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1476 if (retval != NULL)
252b5132 1477 {
99a814a1 1478 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1479 if ((ppc_cpu & PPC_OPCODE_601) != 0
1480 && (op->flags & PPC_OPCODE_POWER) != 0)
1481 continue;
1482
b84bf58a 1483 as_bad (_("duplicate instruction %s"),
99a814a1 1484 op->name);
b84bf58a 1485 bad_insn = TRUE;
252b5132
RH		 1486 }
1487 }
1488 }
1489
3c9030c1
AM		 1490 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1491 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1492 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1493
252b5132
RH		 1494 /* Insert the macros into a hash table. */
1495 ppc_macro_hash = hash_new ();
1496
1497 macro_end = powerpc_macros + powerpc_num_macros;
1498 for (macro = powerpc_macros; macro < macro_end; macro++)
1499 {
1500 if ((macro->flags & ppc_cpu) != 0)
1501 {
1502 const char *retval;
1503
98027b10 1504 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1505 if (retval != (const char *) NULL)
1506 {
b84bf58a
AM		 1507 as_bad (_("duplicate macro %s"), macro->name);
1508 bad_insn = TRUE;
252b5132
RH		 1509 }
1510 }
1511 }
1512
b84bf58a 1513 if (bad_insn)
252b5132 1514 abort ();
69c040df
AM		 1515}
1516
1517/* This function is called when the assembler starts up. It is called
1518 after the options have been parsed and the output file has been
1519 opened. */
1520
1521void
98027b10 1522md_begin (void)
69c040df
AM		 1523{
1524 ppc_set_cpu ();
1525
1526 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1527
1528#ifdef OBJ_ELF
1529 /* Set the ELF flags if desired. */
1530 if (ppc_flags && !msolaris)
1531 bfd_set_private_flags (stdoutput, ppc_flags);
1532#endif
1533
1534 ppc_setup_opcodes ();
252b5132 1535
67c1ffbe 1536 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1537 by the user. */
252b5132
RH		 1538 if (!set_target_endian)
1539 {
1540 set_target_endian = 1;
1541 target_big_endian = PPC_BIG_ENDIAN;
1542 }
1543
1544#ifdef OBJ_XCOFF
1545 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1546
1547 /* Create dummy symbols to serve as initial csects. This forces the
1548 text csects to precede the data csects. These symbols will not
1549 be output. */
1550 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1551 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1552 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1553 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1554#endif
1555
1556#ifdef TE_PE
1557
1558 ppc_current_section = text_section;
81d4177b 1559 ppc_previous_section = 0;
252b5132
RH		 1560
1561#endif
1562}
1563
6a0c61b7 1564void
98027b10 1565ppc_cleanup (void)
6a0c61b7 1566{
dc1d03fc 1567#ifdef OBJ_ELF
6a0c61b7
EZ		 1568 if (ppc_apuinfo_list == NULL)
1569 return;
1570
1571 /* Ok, so write the section info out. We have this layout:
1572
1573 byte data what
1574 ---- ---- ----
1575 0 8 length of "APUinfo\0"
1576 4 (n*4) number of APU's (4 bytes each)
1577 8 2 note type 2
1578 12 "APUinfo\0" name
1579 20 APU#1 first APU's info
1580 24 APU#2 second APU's info
1581 ... ...
1582 */
1583 {
1584 char *p;
1585 asection *seg = now_seg;
1586 subsegT subseg = now_subseg;
1587 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1588 unsigned int i;
6a0c61b7
EZ		 1589
1590 /* Create the .PPC.EMB.apuinfo section. */
1591 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1592 bfd_set_section_flags (stdoutput,
1593 apuinfo_secp,
e1a9cb8e 1594 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1595
1596 p = frag_more (4);
1597 md_number_to_chars (p, (valueT) 8, 4);
1598
1599 p = frag_more (4);
e98d298c 1600 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1601
1602 p = frag_more (4);
1603 md_number_to_chars (p, (valueT) 2, 4);
1604
1605 p = frag_more (8);
1606 strcpy (p, "APUinfo");
1607
1608 for (i = 0; i < ppc_apuinfo_num; i++)
1609 {
b34976b6
AM		 1610 p = frag_more (4);
1611 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1612 }
1613
1614 frag_align (2, 0, 0);
1615
1616 /* We probably can't restore the current segment, for there likely
1617 isn't one yet... */
1618 if (seg && subseg)
1619 subseg_set (seg, subseg);
1620 }
dc1d03fc 1621#endif
6a0c61b7
EZ		 1622}
1623
252b5132
RH		 1624/* Insert an operand value into an instruction. */
1625
1626static unsigned long
a1867a27
AM		 1627ppc_insert_operand (unsigned long insn,
1628 const struct powerpc_operand *operand,
1629 offsetT val,
91d6fa6a 1630 ppc_cpu_t cpu,
a1867a27
AM		 1631 char *file,
1632 unsigned int line)
252b5132 1633{
b84bf58a 1634 long min, max, right;
eb42fac1 1635
b84bf58a
AM		 1636 max = operand->bitm;
1637 right = max & -max;
1638 min = 0;
1639
1640 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1641 {
b84bf58a 1642 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1643 max = (max >> 1) & -right;
1644 min = ~max & -right;
b84bf58a 1645 }
252b5132 1646
b84bf58a 1647 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1648 max++;
252b5132 1649
b84bf58a 1650 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1651 {
1652 long tmp = min;
1653 min = -max;
1654 max = -tmp;
1655 }
b84bf58a 1656
a1867a27
AM		 1657 if (min <= max)
1658 {
1659 /* Some people write constants with the sign extension done by
1660 hand but only up to 32 bits. This shouldn't really be valid,
1661 but, to permit this code to assemble on a 64-bit host, we
1662 sign extend the 32-bit value to 64 bits if so doing makes the
1663 value valid. */
1664 if (val > max
1665 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1666 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1667 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1668 val = val - 0x80000000 - 0x80000000;
1669
1670 /* Similarly, people write expressions like ~(1<<15), and expect
1671 this to be OK for a 32-bit unsigned value. */
1672 else if (val < min
1673 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1674 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1675 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1676 val = val + 0x80000000 + 0x80000000;
1677
1678 else if (val < min
1679 || val > max
1680 || (val & (right - 1)) != 0)
1681 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1682 }
b84bf58a 1683
252b5132
RH		 1684 if (operand->insert)
1685 {
1686 const char *errmsg;
1687
1688 errmsg = NULL;
91d6fa6a 1689 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1690 if (errmsg != (const char *) NULL)
ee2c9aa9 1691 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1692 }
1693 else
b84bf58a 1694 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1695
1696 return insn;
1697}
1698
1699\f
1700#ifdef OBJ_ELF
1701/* Parse @got, etc. and return the desired relocation. */
1702static bfd_reloc_code_real_type
98027b10 1703ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1704{
1705 struct map_bfd {
1706 char *string;
b7d7dc63
AM		 1707 unsigned int length : 8;
1708 unsigned int valid32 : 1;
1709 unsigned int valid64 : 1;
1710 unsigned int reloc;
252b5132
RH		 1711 };
1712
1713 char ident[20];
1714 char *str = *str_p;
1715 char *str2;
1716 int ch;
1717 int len;
15c1449b 1718 const struct map_bfd *ptr;
252b5132 1719
b7d7dc63
AM		 1720#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1721#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1722#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1723
15c1449b 1724 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1725 MAP ("l", BFD_RELOC_LO16),
1726 MAP ("h", BFD_RELOC_HI16),
1727 MAP ("ha", BFD_RELOC_HI16_S),
1728 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1729 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1730 MAP ("got", BFD_RELOC_16_GOTOFF),
1731 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1732 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1733 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1734 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1735 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1736 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1737 MAP ("copy", BFD_RELOC_PPC_COPY),
1738 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1739 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1740 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1741 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1742 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1743 MAP ("tls", BFD_RELOC_PPC_TLS),
1744 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1745 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1746 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1747 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1748 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1749 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1750 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1751 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1752 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1753 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1754 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1755 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1756 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1757 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1758 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1759 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1760 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1761 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1762 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1763 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1764 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1765 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1766 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1767 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1768 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1769 MAP32 ("fixup", BFD_RELOC_CTOR),
1770 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1771 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1772 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1773 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1774 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1775 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1776 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1777 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1778 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1779 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1780 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1781 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1782 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1783 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1784 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1785 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1786 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1787 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1788 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1789 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1790 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1791 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1792 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1793 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1794 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1795 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1796 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1797 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1798 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1799 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1800 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1801 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1802 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1803 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1804 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1805 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1806 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1807 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1808 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1809 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1810 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1811 };
1812
1813 if (*str++ != '@')
1814 return BFD_RELOC_UNUSED;
1815
1816 for (ch = *str, str2 = ident;
1817 (str2 < ident + sizeof (ident) - 1
3882b010 1818 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1819 ch = *++str)
1820 {
3882b010 1821 *str2++ = TOLOWER (ch);
252b5132
RH		 1822 }
1823
1824 *str2 = '\0';
1825 len = str2 - ident;
1826
1827 ch = ident[0];
1828 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1829 if (ch == ptr->string[0]
1830 && len == ptr->length
b7d7dc63
AM		 1831 && memcmp (ident, ptr->string, ptr->length) == 0
1832 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1833 {
15c1449b
AM		 1834 int reloc = ptr->reloc;
1835
727fc41e
AM		 1836 if (!ppc_obj64 && exp_p->X_add_number != 0)
1837 {
1838 switch (reloc)
1839 {
1840 case BFD_RELOC_16_GOTOFF:
1841 case BFD_RELOC_LO16_GOTOFF:
1842 case BFD_RELOC_HI16_GOTOFF:
1843 case BFD_RELOC_HI16_S_GOTOFF:
1844 as_warn (_("identifier+constant@got means "
1845 "identifier@got+constant"));
1846 break;
1847
1848 case BFD_RELOC_PPC_GOT_TLSGD16:
1849 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1850 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1851 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1852 case BFD_RELOC_PPC_GOT_TLSLD16:
1853 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1854 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1855 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1856 case BFD_RELOC_PPC_GOT_DTPREL16:
1857 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1858 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1859 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1860 case BFD_RELOC_PPC_GOT_TPREL16:
1861 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1862 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1863 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1864 as_bad (_("symbol+offset not supported for got tls"));
1865 break;
1866 }
1867 }
5f6db75a
AM		 1868
1869 /* Now check for identifier@suffix+constant. */
1870 if (*str == '-' || *str == '+')
252b5132 1871 {
5f6db75a
AM		 1872 char *orig_line = input_line_pointer;
1873 expressionS new_exp;
1874
1875 input_line_pointer = str;
1876 expression (&new_exp);
1877 if (new_exp.X_op == O_constant)
252b5132 1878 {
5f6db75a
AM		 1879 exp_p->X_add_number += new_exp.X_add_number;
1880 str = input_line_pointer;
252b5132 1881 }
5f6db75a
AM		 1882
1883 if (&input_line_pointer != str_p)
1884 input_line_pointer = orig_line;
252b5132 1885 }
252b5132 1886 *str_p = str;
0baf16f2 1887
2b3c4602 1888 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1889 && exp_p->X_op == O_symbol
1890 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1891 {
9f2b53d7
AM		 1892 /* Change the symbol so that the dummy .TOC. symbol can be
1893 omitted from the object file. */
0baf16f2
AM		 1894 exp_p->X_add_symbol = &abs_symbol;
1895 }
1896
15c1449b 1897 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1898 }
1899
1900 return BFD_RELOC_UNUSED;
1901}
1902
99a814a1
AM		 1903/* Like normal .long/.short/.word, except support @got, etc.
1904 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1905static void
98027b10 1906ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1907{
1908 expressionS exp;
1909 bfd_reloc_code_real_type reloc;
1910
1911 if (is_it_end_of_statement ())
1912 {
1913 demand_empty_rest_of_line ();
1914 return;
1915 }
1916
1917 do
1918 {
1919 expression (&exp);
1920 if (exp.X_op == O_symbol
1921 && *input_line_pointer == '@'
99a814a1
AM		 1922 && (reloc = ppc_elf_suffix (&input_line_pointer,
1923 &exp)) != BFD_RELOC_UNUSED)
252b5132 1924 {
99a814a1
AM		 1925 reloc_howto_type *reloc_howto;
1926 int size;
1927
1928 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1929 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1930
1931 if (size > nbytes)
0baf16f2
AM		 1932 {
1933 as_bad (_("%s relocations do not fit in %d bytes\n"),
1934 reloc_howto->name, nbytes);
1935 }
252b5132
RH		 1936 else
1937 {
0baf16f2
AM		 1938 char *p;
1939 int offset;
252b5132 1940
0baf16f2
AM		 1941 p = frag_more (nbytes);
1942 offset = 0;
1943 if (target_big_endian)
1944 offset = nbytes - size;
99a814a1
AM		 1945 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1946 &exp, 0, reloc);
252b5132
RH		 1947 }
1948 }
1949 else
1950 emit_expr (&exp, (unsigned int) nbytes);
1951 }
1952 while (*input_line_pointer++ == ',');
1953
99a814a1
AM		 1954 /* Put terminator back into stream. */
1955 input_line_pointer--;
252b5132
RH		 1956 demand_empty_rest_of_line ();
1957}
1958
1959/* Solaris pseduo op to change to the .rodata section. */
1960static void
98027b10 1961ppc_elf_rdata (int xxx)
252b5132
RH		 1962{
1963 char *save_line = input_line_pointer;
1964 static char section[] = ".rodata\n";
1965
99a814a1 1966 /* Just pretend this is .section .rodata */
252b5132
RH		 1967 input_line_pointer = section;
1968 obj_elf_section (xxx);
1969
1970 input_line_pointer = save_line;
1971}
1972
99a814a1 1973/* Pseudo op to make file scope bss items. */
252b5132 1974static void
98027b10 1975ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1976{
98027b10
AM		 1977 char *name;
1978 char c;
1979 char *p;
252b5132 1980 offsetT size;
98027b10 1981 symbolS *symbolP;
252b5132
RH		 1982 offsetT align;
1983 segT old_sec;
1984 int old_subsec;
1985 char *pfrag;
1986 int align2;
1987
1988 name = input_line_pointer;
1989 c = get_symbol_end ();
1990
99a814a1 1991 /* just after name is now '\0'. */
252b5132
RH		 1992 p = input_line_pointer;
1993 *p = c;
1994 SKIP_WHITESPACE ();
1995 if (*input_line_pointer != ',')
1996 {
1997 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1998 ignore_rest_of_line ();
1999 return;
2000 }
2001
2002 input_line_pointer++; /* skip ',' */
2003 if ((size = get_absolute_expression ()) < 0)
2004 {
2005 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2006 ignore_rest_of_line ();
2007 return;
2008 }
2009
2010 /* The third argument to .lcomm is the alignment. */
2011 if (*input_line_pointer != ',')
2012 align = 8;
2013 else
2014 {
2015 ++input_line_pointer;
2016 align = get_absolute_expression ();
2017 if (align <= 0)
2018 {
2019 as_warn (_("ignoring bad alignment"));
2020 align = 8;
2021 }
2022 }
2023
2024 *p = 0;
2025 symbolP = symbol_find_or_make (name);
2026 *p = c;
2027
2028 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2029 {
2030 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2031 S_GET_NAME (symbolP));
2032 ignore_rest_of_line ();
2033 return;
2034 }
2035
2036 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2037 {
2038 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2039 S_GET_NAME (symbolP),
2040 (long) S_GET_VALUE (symbolP),
2041 (long) size);
2042
2043 ignore_rest_of_line ();
2044 return;
2045 }
2046
99a814a1 2047 /* Allocate_bss. */
252b5132
RH		 2048 old_sec = now_seg;
2049 old_subsec = now_subseg;
2050 if (align)
2051 {
99a814a1 2052 /* Convert to a power of 2 alignment. */
252b5132
RH		 2053 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2054 if (align != 1)
2055 {
2056 as_bad (_("Common alignment not a power of 2"));
2057 ignore_rest_of_line ();
2058 return;
2059 }
2060 }
2061 else
2062 align2 = 0;
2063
2064 record_alignment (bss_section, align2);
2065 subseg_set (bss_section, 0);
2066 if (align2)
2067 frag_align (align2, 0, 0);
2068 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2069 symbol_get_frag (symbolP)->fr_symbol = 0;
2070 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2071 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2072 (char *) 0);
2073 *pfrag = 0;
2074 S_SET_SIZE (symbolP, size);
2075 S_SET_SEGMENT (symbolP, bss_section);
2076 subseg_set (old_sec, old_subsec);
2077 demand_empty_rest_of_line ();
2078}
2079
2080/* Validate any relocations emitted for -mrelocatable, possibly adding
2081 fixups for word relocations in writable segments, so we can adjust
2082 them at runtime. */
2083static void
98027b10 2084ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2085{
2086 if (fixp->fx_done || fixp->fx_pcrel)
2087 return;
2088
2089 switch (shlib)
2090 {
2091 case SHLIB_NONE:
2092 case SHLIB_PIC:
2093 return;
2094
5d6f4f16 2095 case SHLIB_MRELOCATABLE:
252b5132
RH		 2096 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2097 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2098 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2099 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2100 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2101 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2102 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2103 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2104 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2105 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2106 && strcmp (segment_name (seg), ".got2") != 0
2107 && strcmp (segment_name (seg), ".dtors") != 0
2108 && strcmp (segment_name (seg), ".ctors") != 0
2109 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2110 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2111 && strcmp (segment_name (seg), ".eh_frame") != 0
2112 && strcmp (segment_name (seg), ".ex_shared") != 0)
2113 {
2114 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2115 || fixp->fx_r_type != BFD_RELOC_CTOR)
2116 {
2117 as_bad_where (fixp->fx_file, fixp->fx_line,
2118 _("Relocation cannot be done when using -mrelocatable"));
2119 }
2120 }
2121 return;
2122 }
2123}
0baf16f2 2124
7e8d4ab4
AM		 2125/* Prevent elf_frob_file_before_adjust removing a weak undefined
2126 function descriptor sym if the corresponding code sym is used. */
2127
2128void
98027b10 2129ppc_frob_file_before_adjust (void)
0baf16f2 2130{
7e8d4ab4 2131 symbolS *symp;
9232bbb0 2132 asection *toc;
0baf16f2 2133
7e8d4ab4
AM		 2134 if (!ppc_obj64)
2135 return;
2136
2137 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2138 {
7e8d4ab4
AM		 2139 const char *name;
2140 char *dotname;
2141 symbolS *dotsym;
2142 size_t len;
2143
2144 name = S_GET_NAME (symp);
2145 if (name[0] == '.')
2146 continue;
2147
2148 if (! S_IS_WEAK (symp)
2149 || S_IS_DEFINED (symp))
2150 continue;
2151
2152 len = strlen (name) + 1;
2153 dotname = xmalloc (len + 1);
2154 dotname[0] = '.';
2155 memcpy (dotname + 1, name, len);
461b725f 2156 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2157 free (dotname);
2158 if (dotsym != NULL && (symbol_used_p (dotsym)
2159 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2160 symbol_mark_used (symp);
2161
0baf16f2
AM		 2162 }
2163
9232bbb0
AM		 2164 toc = bfd_get_section_by_name (stdoutput, ".toc");
2165 if (toc != NULL
2166 && bfd_section_size (stdoutput, toc) > 0x10000)
2167 as_warn (_("TOC section size exceeds 64k"));
2168
7e8d4ab4
AM		 2169 /* Don't emit .TOC. symbol. */
2170 symp = symbol_find (".TOC.");
2171 if (symp != NULL)
2172 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2173}
252b5132
RH		 2174#endif /* OBJ_ELF */
2175\f
2176#ifdef TE_PE
2177
2178/*
99a814a1 2179 * Summary of parse_toc_entry.
252b5132
RH		 2180 *
2181 * in: Input_line_pointer points to the '[' in one of:
2182 *
2183 * [toc] [tocv] [toc32] [toc64]
2184 *
2185 * Anything else is an error of one kind or another.
2186 *
81d4177b 2187 * out:
252b5132
RH		 2188 * return value: success or failure
2189 * toc_kind: kind of toc reference
2190 * input_line_pointer:
2191 * success: first char after the ']'
2192 * failure: unchanged
2193 *
2194 * settings:
2195 *
2196 * [toc] - rv == success, toc_kind = default_toc
2197 * [tocv] - rv == success, toc_kind = data_in_toc
2198 * [toc32] - rv == success, toc_kind = must_be_32
2199 * [toc64] - rv == success, toc_kind = must_be_64
2200 *
2201 */
2202
81d4177b
KH		 2203enum toc_size_qualifier
2204{
252b5132
RH		 2205 default_toc, /* The toc cell constructed should be the system default size */
2206 data_in_toc, /* This is a direct reference to a toc cell */
2207 must_be_32, /* The toc cell constructed must be 32 bits wide */
2208 must_be_64 /* The toc cell constructed must be 64 bits wide */
2209};
2210
2211static int
98027b10 2212parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2213{
2214 char *start;
2215 char *toc_spec;
2216 char c;
2217 enum toc_size_qualifier t;
2218
99a814a1 2219 /* Save the input_line_pointer. */
252b5132
RH		 2220 start = input_line_pointer;
2221
99a814a1 2222 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2223 ++input_line_pointer;
2224 SKIP_WHITESPACE ();
81d4177b 2225
99a814a1 2226 /* Find the spelling of the operand. */
252b5132
RH		 2227 toc_spec = input_line_pointer;
2228 c = get_symbol_end ();
2229
99a814a1 2230 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2231 {
2232 t = default_toc;
2233 }
99a814a1 2234 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2235 {
2236 t = data_in_toc;
2237 }
99a814a1 2238 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2239 {
2240 t = must_be_32;
2241 }
99a814a1 2242 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2243 {
2244 t = must_be_64;
2245 }
2246 else
2247 {
2248 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2249 *input_line_pointer = c;
2250 input_line_pointer = start;
252b5132
RH		 2251 return 0;
2252 }
2253
99a814a1
AM		 2254 /* Now find the ']'. */
2255 *input_line_pointer = c;
252b5132 2256
81d4177b
KH		 2257 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2258 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2259
2260 if (c != ']')
2261 {
2262 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2263 input_line_pointer = start;
252b5132
RH		 2264 return 0;
2265 }
2266
99a814a1 2267 *toc_kind = t;
252b5132
RH		 2268 return 1;
2269}
2270#endif
2271\f
2272
dc1d03fc 2273#ifdef OBJ_ELF
6a0c61b7
EZ		 2274#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2275static void
98027b10 2276ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2277{
2278 unsigned int i;
2279
2280 /* Check we don't already exist. */
2281 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2282 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2283 return;
b34976b6 2284
6a0c61b7
EZ		 2285 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2286 {
2287 if (ppc_apuinfo_num_alloc == 0)
2288 {
2289 ppc_apuinfo_num_alloc = 4;
2290 ppc_apuinfo_list = (unsigned long *)
2291 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2292 }
2293 else
2294 {
2295 ppc_apuinfo_num_alloc += 4;
2296 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2297 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2298 }
2299 }
dc1d03fc 2300 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2301}
2302#undef APUID
dc1d03fc 2303#endif
6a0c61b7
EZ		 2304\f
2305
252b5132
RH		 2306/* We need to keep a list of fixups. We can't simply generate them as
2307 we go, because that would require us to first create the frag, and
2308 that would screw up references to ``.''. */
2309
2310struct ppc_fixup
2311{
2312 expressionS exp;
2313 int opindex;
2314 bfd_reloc_code_real_type reloc;
2315};
2316
2317#define MAX_INSN_FIXUPS (5)
2318
2319/* This routine is called for each instruction to be assembled. */
2320
2321void
98027b10 2322md_assemble (char *str)
252b5132
RH		 2323{
2324 char *s;
2325 const struct powerpc_opcode *opcode;
2326 unsigned long insn;
2327 const unsigned char *opindex_ptr;
2328 int skip_optional;
2329 int need_paren;
2330 int next_opindex;
2331 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2332 int fc;
2333 char *f;
09b935ac 2334 int addr_mod;
252b5132
RH		 2335 int i;
2336#ifdef OBJ_ELF
2337 bfd_reloc_code_real_type reloc;
2338#endif
2339
2340 /* Get the opcode. */
3882b010 2341 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2342 ;
2343 if (*s != '\0')
2344 *s++ = '\0';
2345
2346 /* Look up the opcode in the hash table. */
2347 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2348 if (opcode == (const struct powerpc_opcode *) NULL)
2349 {
2350 const struct powerpc_macro *macro;
2351
2352 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2353 if (macro == (const struct powerpc_macro *) NULL)
2354 as_bad (_("Unrecognized opcode: `%s'"), str);
2355 else
2356 ppc_macro (s, macro);
2357
2358 return;
2359 }
2360
2361 insn = opcode->opcode;
2362
2363 str = s;
3882b010 2364 while (ISSPACE (*str))
252b5132
RH		 2365 ++str;
2366
2367 /* PowerPC operands are just expressions. The only real issue is
2368 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2369 an optional operand separate the operands only with commas (in some
2370 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2371 have optional operands). Most instructions with optional operands
2372 have only one. Those that have more than one optional operand can
2373 take either all their operands or none. So, before we start seriously
2374 parsing the operands, we check to see if we have optional operands,
2375 and if we do, we count the number of commas to see which operands
2376 have been omitted. */
252b5132
RH		 2377 skip_optional = 0;
2378 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2379 {
2380 const struct powerpc_operand *operand;
2381
2382 operand = &powerpc_operands[*opindex_ptr];
2383 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2384 {
2385 unsigned int opcount;
7fe9cf6b 2386 unsigned int num_operands_expected;
252b5132
RH		 2387
2388 /* There is an optional operand. Count the number of
2389 commas in the input line. */
2390 if (*str == '\0')
2391 opcount = 0;
2392 else
2393 {
2394 opcount = 1;
2395 s = str;
2396 while ((s = strchr (s, ',')) != (char *) NULL)
2397 {
2398 ++opcount;
2399 ++s;
2400 }
2401 }
2402
7fe9cf6b
NC		 2403 /* Compute the number of expected operands.
2404 Do not count fake operands. */
2405 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2406 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2407 ++ num_operands_expected;
2408
252b5132
RH		 2409 /* If there are fewer operands in the line then are called
2410 for by the instruction, we want to skip the optional
1f6c9eb0 2411 operands. */
7fe9cf6b 2412 if (opcount < num_operands_expected)
252b5132
RH		 2413 skip_optional = 1;
2414
2415 break;
2416 }
2417 }
2418
2419 /* Gather the operands. */
2420 need_paren = 0;
2421 next_opindex = 0;
2422 fc = 0;
2423 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2424 {
2425 const struct powerpc_operand *operand;
2426 const char *errmsg;
2427 char *hold;
2428 expressionS ex;
2429 char endc;
2430
2431 if (next_opindex == 0)
2432 operand = &powerpc_operands[*opindex_ptr];
2433 else
2434 {
2435 operand = &powerpc_operands[next_opindex];
2436 next_opindex = 0;
2437 }
252b5132
RH		 2438 errmsg = NULL;
2439
2440 /* If this is a fake operand, then we do not expect anything
2441 from the input. */
2442 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2443 {
2b3c4602 2444 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2445 if (errmsg != (const char *) NULL)
ee2c9aa9 2446 as_bad ("%s", errmsg);
252b5132
RH		 2447 continue;
2448 }
2449
2450 /* If this is an optional operand, and we are skipping it, just
2451 insert a zero. */
2452 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2453 && skip_optional)
2454 {
2455 if (operand->insert)
2456 {
2b3c4602 2457 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2458 if (errmsg != (const char *) NULL)
ee2c9aa9 2459 as_bad ("%s", errmsg);
252b5132
RH		 2460 }
2461 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2462 next_opindex = *opindex_ptr + 1;
2463 continue;
2464 }
2465
2466 /* Gather the operand. */
2467 hold = input_line_pointer;
2468 input_line_pointer = str;
2469
2470#ifdef TE_PE
81d4177b 2471 if (*input_line_pointer == '[')
252b5132
RH		 2472 {
2473 /* We are expecting something like the second argument here:
99a814a1
AM		 2474 *
2475 * lwz r4,[toc].GS.0.static_int(rtoc)
2476 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2477 * The argument following the `]' must be a symbol name, and the
2478 * register must be the toc register: 'rtoc' or '2'
2479 *
2480 * The effect is to 0 as the displacement field
2481 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2482 * the appropriate variation) reloc against it based on the symbol.
2483 * The linker will build the toc, and insert the resolved toc offset.
2484 *
2485 * Note:
2486 * o The size of the toc entry is currently assumed to be
2487 * 32 bits. This should not be assumed to be a hard coded
2488 * number.
2489 * o In an effort to cope with a change from 32 to 64 bits,
2490 * there are also toc entries that are specified to be
2491 * either 32 or 64 bits:
2492 * lwz r4,[toc32].GS.0.static_int(rtoc)
2493 * lwz r4,[toc64].GS.0.static_int(rtoc)
2494 * These demand toc entries of the specified size, and the
2495 * instruction probably requires it.
2496 */
252b5132
RH		 2497
2498 int valid_toc;
2499 enum toc_size_qualifier toc_kind;
2500 bfd_reloc_code_real_type toc_reloc;
2501
99a814a1
AM		 2502 /* Go parse off the [tocXX] part. */
2503 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2504
81d4177b 2505 if (!valid_toc)
252b5132 2506 {
99a814a1
AM		 2507 /* Note: message has already been issued.
2508 FIXME: what sort of recovery should we do?
2509 demand_rest_of_line (); return; ? */
252b5132
RH		 2510 }
2511
99a814a1
AM		 2512 /* Now get the symbol following the ']'. */
2513 expression (&ex);
252b5132
RH		 2514
2515 switch (toc_kind)
2516 {
2517 case default_toc:
99a814a1
AM		 2518 /* In this case, we may not have seen the symbol yet,
2519 since it is allowed to appear on a .extern or .globl
2520 or just be a label in the .data section. */
252b5132
RH		 2521 toc_reloc = BFD_RELOC_PPC_TOC16;
2522 break;
2523 case data_in_toc:
99a814a1
AM		 2524 /* 1. The symbol must be defined and either in the toc
2525 section, or a global.
2526 2. The reloc generated must have the TOCDEFN flag set
2527 in upper bit mess of the reloc type.
2528 FIXME: It's a little confusing what the tocv
2529 qualifier can be used for. At the very least, I've
2530 seen three uses, only one of which I'm sure I can
2531 explain. */
81d4177b
KH		 2532 if (ex.X_op == O_symbol)
2533 {
9c2799c2 2534 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2535 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2536 != tocdata_section)
252b5132 2537 {
99a814a1 2538 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2539 }
2540 }
2541
2542 toc_reloc = BFD_RELOC_PPC_TOC16;
2543 break;
2544 case must_be_32:
99a814a1
AM		 2545 /* FIXME: these next two specifically specify 32/64 bit
2546 toc entries. We don't support them today. Is this
2547 the right way to say that? */
252b5132
RH		 2548 toc_reloc = BFD_RELOC_UNUSED;
2549 as_bad (_("Unimplemented toc32 expression modifier"));
2550 break;
2551 case must_be_64:
99a814a1 2552 /* FIXME: see above. */
252b5132
RH		 2553 toc_reloc = BFD_RELOC_UNUSED;
2554 as_bad (_("Unimplemented toc64 expression modifier"));
2555 break;
2556 default:
bc805888 2557 fprintf (stderr,
99a814a1
AM		 2558 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2559 toc_kind);
bc805888 2560 abort ();
252b5132
RH		 2561 break;
2562 }
2563
2564 /* We need to generate a fixup for this expression. */
2565 if (fc >= MAX_INSN_FIXUPS)
2566 as_fatal (_("too many fixups"));
2567
2568 fixups[fc].reloc = toc_reloc;
2569 fixups[fc].exp = ex;
2570 fixups[fc].opindex = *opindex_ptr;
2571 ++fc;
2572
99a814a1
AM		 2573 /* Ok. We've set up the fixup for the instruction. Now make it
2574 look like the constant 0 was found here. */
252b5132
RH		 2575 ex.X_unsigned = 1;
2576 ex.X_op = O_constant;
2577 ex.X_add_number = 0;
2578 ex.X_add_symbol = NULL;
2579 ex.X_op_symbol = NULL;
2580 }
2581
2582 else
2583#endif /* TE_PE */
2584 {
2ad068be
AM		 2585 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2586 || !register_name (&ex))
252b5132 2587 {
13abbae3
AM		 2588 char save_lex = lex_type['%'];
2589
252b5132 2590 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2591 {
2592 cr_operand = TRUE;
2593 lex_type['%'] |= LEX_BEGIN_NAME;
2594 }
252b5132 2595 expression (&ex);
b34976b6 2596 cr_operand = FALSE;
13abbae3 2597 lex_type['%'] = save_lex;
252b5132
RH		 2598 }
2599 }
2600
2601 str = input_line_pointer;
2602 input_line_pointer = hold;
2603
2604 if (ex.X_op == O_illegal)
2605 as_bad (_("illegal operand"));
2606 else if (ex.X_op == O_absent)
2607 as_bad (_("missing operand"));
2608 else if (ex.X_op == O_register)
2609 {
2610 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2611 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2612 }
2613 else if (ex.X_op == O_constant)
2614 {
2615#ifdef OBJ_ELF
81d4177b 2616 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2617 char *orig_str = str;
2618
2619 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2620 switch (reloc)
2621 {
2622 default:
2623 str = orig_str;
2624 break;
2625
2626 case BFD_RELOC_LO16:
2627 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2628 something which cleared it, we always produce a
2629 signed value. */
2630 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2631 ex.X_add_number &= 0xffff;
2632 else
0baf16f2 2633 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2634 break;
2635
2636 case BFD_RELOC_HI16:
0baf16f2
AM		 2637 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2638 ex.X_add_number = PPC_HI (ex.X_add_number);
2639 else
2640 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2641 break;
2642
2643 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2644 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2645 ex.X_add_number = PPC_HA (ex.X_add_number);
2646 else
2647 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2648 break;
2649
0baf16f2
AM		 2650 case BFD_RELOC_PPC64_HIGHER:
2651 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2652 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2653 else
2654 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2655 break;
2656
2657 case BFD_RELOC_PPC64_HIGHER_S:
2658 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2659 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2660 else
2661 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2662 break;
0baf16f2
AM		 2663
2664 case BFD_RELOC_PPC64_HIGHEST:
2665 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2666 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2667 else
2668 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2669 break;
2670
2671 case BFD_RELOC_PPC64_HIGHEST_S:
2672 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2673 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2674 else
2675 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2676 break;
252b5132 2677 }
0baf16f2 2678#endif /* OBJ_ELF */
252b5132 2679 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2680 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2681 }
2682#ifdef OBJ_ELF
727fc41e 2683 else
252b5132 2684 {
727fc41e 2685 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2686 {
727fc41e
AM		 2687 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2688 if (sym_name[0] == '.')
2689 ++sym_name;
cdba85ec 2690
727fc41e 2691 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2692 {
727fc41e
AM		 2693 expressionS tls_exp;
2694
2695 hold = input_line_pointer;
2696 input_line_pointer = str + 1;
2697 expression (&tls_exp);
2698 if (tls_exp.X_op == O_symbol)
2699 {
2700 reloc = BFD_RELOC_UNUSED;
2701 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2702 {
2703 reloc = BFD_RELOC_PPC_TLSGD;
2704 input_line_pointer += 7;
2705 }
2706 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2707 {
2708 reloc = BFD_RELOC_PPC_TLSLD;
2709 input_line_pointer += 7;
2710 }
2711 if (reloc != BFD_RELOC_UNUSED)
2712 {
2713 SKIP_WHITESPACE ();
2714 str = input_line_pointer;
2715
2716 if (fc >= MAX_INSN_FIXUPS)
2717 as_fatal (_("too many fixups"));
2718 fixups[fc].exp = tls_exp;
2719 fixups[fc].opindex = *opindex_ptr;
2720 fixups[fc].reloc = reloc;
2721 ++fc;
2722 }
2723 }
2724 input_line_pointer = hold;
252b5132
RH		 2725 }
2726 }
2727
727fc41e 2728 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2729 {
727fc41e 2730 /* Some TLS tweaks. */
0baf16f2
AM		 2731 switch (reloc)
2732 {
727fc41e 2733 default:
cdba85ec 2734 break;
727fc41e
AM		 2735
2736 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2737 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2738 as_bad (_("@tls may not be used with \"%s\" operands"),
2739 opcode->name);
2740 else if (operand->shift != 11)
2741 as_bad (_("@tls may only be used in last operand"));
2742 else
2743 insn = ppc_insert_operand (insn, operand,
2744 ppc_obj64 ? 13 : 2,
2745 ppc_cpu, (char *) NULL, 0);
cdba85ec 2746 break;
727fc41e
AM		 2747
2748 /* We'll only use the 32 (or 64) bit form of these relocations
2749 in constants. Instructions get the 16 bit form. */
2750 case BFD_RELOC_PPC_DTPREL:
2751 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2752 break;
727fc41e
AM		 2753 case BFD_RELOC_PPC_TPREL:
2754 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2755 break;
2756 }
727fc41e
AM		 2757
2758 /* For the absolute forms of branches, convert the PC
2759 relative form back into the absolute. */
2760 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2761 {
2762 switch (reloc)
2763 {
2764 case BFD_RELOC_PPC_B26:
2765 reloc = BFD_RELOC_PPC_BA26;
2766 break;
2767 case BFD_RELOC_PPC_B16:
2768 reloc = BFD_RELOC_PPC_BA16;
2769 break;
2770 case BFD_RELOC_PPC_B16_BRTAKEN:
2771 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2772 break;
2773 case BFD_RELOC_PPC_B16_BRNTAKEN:
2774 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2775 break;
2776 default:
2777 break;
2778 }
2779 }
2780
2781 if (ppc_obj64
2782 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2783 {
2784 switch (reloc)
2785 {
2786 case BFD_RELOC_16:
2787 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2788 break;
2789 case BFD_RELOC_LO16:
2790 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2791 break;
2792 case BFD_RELOC_16_GOTOFF:
2793 reloc = BFD_RELOC_PPC64_GOT16_DS;
2794 break;
2795 case BFD_RELOC_LO16_GOTOFF:
2796 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2797 break;
2798 case BFD_RELOC_LO16_PLTOFF:
2799 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2800 break;
2801 case BFD_RELOC_16_BASEREL:
2802 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2803 break;
2804 case BFD_RELOC_LO16_BASEREL:
2805 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2806 break;
2807 case BFD_RELOC_PPC_TOC16:
2808 reloc = BFD_RELOC_PPC64_TOC16_DS;
2809 break;
2810 case BFD_RELOC_PPC64_TOC16_LO:
2811 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2812 break;
2813 case BFD_RELOC_PPC64_PLTGOT16:
2814 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2815 break;
2816 case BFD_RELOC_PPC64_PLTGOT16_LO:
2817 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2818 break;
2819 case BFD_RELOC_PPC_DTPREL16:
2820 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2821 break;
2822 case BFD_RELOC_PPC_DTPREL16_LO:
2823 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2824 break;
2825 case BFD_RELOC_PPC_TPREL16:
2826 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2827 break;
2828 case BFD_RELOC_PPC_TPREL16_LO:
2829 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2830 break;
2831 case BFD_RELOC_PPC_GOT_DTPREL16:
2832 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2833 case BFD_RELOC_PPC_GOT_TPREL16:
2834 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2835 break;
2836 default:
2837 as_bad (_("unsupported relocation for DS offset field"));
2838 break;
2839 }
2840 }
0baf16f2
AM		 2841 }
2842
252b5132
RH		 2843 /* We need to generate a fixup for this expression. */
2844 if (fc >= MAX_INSN_FIXUPS)
2845 as_fatal (_("too many fixups"));
2846 fixups[fc].exp = ex;
727fc41e 2847 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2848 fixups[fc].reloc = reloc;
2849 ++fc;
2850 }
727fc41e 2851#else /* OBJ_ELF */
252b5132
RH		 2852 else
2853 {
2854 /* We need to generate a fixup for this expression. */
2855 if (fc >= MAX_INSN_FIXUPS)
2856 as_fatal (_("too many fixups"));
2857 fixups[fc].exp = ex;
2858 fixups[fc].opindex = *opindex_ptr;
2859 fixups[fc].reloc = BFD_RELOC_UNUSED;
2860 ++fc;
2861 }
727fc41e 2862#endif /* OBJ_ELF */
252b5132
RH		 2863
2864 if (need_paren)
2865 {
2866 endc = ')';
2867 need_paren = 0;
c3d65c1c
BE		 2868 /* If expecting more operands, then we want to see "),". */
2869 if (*str == endc && opindex_ptr[1] != 0)
2870 {
2871 do
2872 ++str;
2873 while (ISSPACE (*str));
2874 endc = ',';
2875 }
252b5132
RH		 2876 }
2877 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2878 {
2879 endc = '(';
2880 need_paren = 1;
2881 }
2882 else
2883 endc = ',';
2884
2885 /* The call to expression should have advanced str past any
2886 whitespace. */
2887 if (*str != endc
2888 && (endc != ',' || *str != '\0'))
2889 {
2890 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2891 break;
2892 }
2893
2894 if (*str != '\0')
2895 ++str;
2896 }
2897
3882b010 2898 while (ISSPACE (*str))
252b5132
RH		 2899 ++str;
2900
2901 if (*str != '\0')
2902 as_bad (_("junk at end of line: `%s'"), str);
2903
dc1d03fc 2904#ifdef OBJ_ELF
6a0c61b7 2905 /* Do we need/want a APUinfo section? */
ed84b57b 2906 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2907 {
2908 /* These are all version "1". */
2909 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2910 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2911 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2912 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2913 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2914 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2915 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2916 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2917 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2918 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2919 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2920 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2921 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2922 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2923 }
dc1d03fc 2924#endif
6a0c61b7 2925
252b5132
RH		 2926 /* Write out the instruction. */
2927 f = frag_more (4);
09b935ac
AM		 2928 addr_mod = frag_now_fix () & 3;
2929 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2930 as_bad (_("instruction address is not a multiple of 4"));
2931 frag_now->insn_addr = addr_mod;
2932 frag_now->has_code = 1;
252b5132
RH		 2933 md_number_to_chars (f, insn, 4);
2934
5d6f4f16
GK		 2935#ifdef OBJ_ELF
2936 dwarf2_emit_insn (4);
2937#endif
2938
252b5132
RH		 2939 /* Create any fixups. At this point we do not use a
2940 bfd_reloc_code_real_type, but instead just use the
2941 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2942 handle fixups for any operand type, although that is admittedly
2943 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2944 md_apply_fix. */
252b5132
RH		 2945 for (i = 0; i < fc; i++)
2946 {
252b5132
RH		 2947 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2948 {
99a814a1 2949 reloc_howto_type *reloc_howto;
252b5132
RH		 2950 int size;
2951 int offset;
2952 fixS *fixP;
2953
99a814a1 2954 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2955 if (!reloc_howto)
2956 abort ();
2957
2958 size = bfd_get_reloc_size (reloc_howto);
2959 offset = target_big_endian ? (4 - size) : 0;
2960
2961 if (size < 1 || size > 4)
bc805888 2962 abort ();
252b5132 2963
99a814a1
AM		 2964 fixP = fix_new_exp (frag_now,
2965 f - frag_now->fr_literal + offset,
2966 size,
2967 &fixups[i].exp,
2968 reloc_howto->pc_relative,
252b5132
RH		 2969 fixups[i].reloc);
2970
2971 /* Turn off complaints that the addend is too large for things like
2972 foo+100000@ha. */
2973 switch (fixups[i].reloc)
2974 {
2975 case BFD_RELOC_16_GOTOFF:
2976 case BFD_RELOC_PPC_TOC16:
2977 case BFD_RELOC_LO16:
2978 case BFD_RELOC_HI16:
2979 case BFD_RELOC_HI16_S:
0baf16f2 2980#ifdef OBJ_ELF
0baf16f2
AM		 2981 case BFD_RELOC_PPC64_HIGHER:
2982 case BFD_RELOC_PPC64_HIGHER_S:
2983 case BFD_RELOC_PPC64_HIGHEST:
2984 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2985#endif
252b5132
RH		 2986 fixP->fx_no_overflow = 1;
2987 break;
2988 default:
2989 break;
2990 }
2991 }
2992 else
727fc41e
AM		 2993 {
2994 const struct powerpc_operand *operand;
2995
2996 operand = &powerpc_operands[fixups[i].opindex];
2997 fix_new_exp (frag_now,
2998 f - frag_now->fr_literal,
2999 4,
3000 &fixups[i].exp,
3001 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3002 ((bfd_reloc_code_real_type)
3003 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3004 }
252b5132
RH		 3005 }
3006}
3007
3008/* Handle a macro. Gather all the operands, transform them as
3009 described by the macro, and call md_assemble recursively. All the
3010 operands are separated by commas; we don't accept parentheses
3011 around operands here. */
3012
3013static void
98027b10 3014ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3015{
3016 char *operands[10];
3017 unsigned int count;
3018 char *s;
3019 unsigned int len;
3020 const char *format;
db557034 3021 unsigned int arg;
252b5132
RH		 3022 char *send;
3023 char *complete;
3024
3025 /* Gather the users operands into the operands array. */
3026 count = 0;
3027 s = str;
3028 while (1)
3029 {
3030 if (count >= sizeof operands / sizeof operands[0])
3031 break;
3032 operands[count++] = s;
3033 s = strchr (s, ',');
3034 if (s == (char *) NULL)
3035 break;
3036 *s++ = '\0';
81d4177b 3037 }
252b5132
RH		 3038
3039 if (count != macro->operands)
3040 {
3041 as_bad (_("wrong number of operands"));
3042 return;
3043 }
3044
3045 /* Work out how large the string must be (the size is unbounded
3046 because it includes user input). */
3047 len = 0;
3048 format = macro->format;
3049 while (*format != '\0')
3050 {
3051 if (*format != '%')
3052 {
3053 ++len;
3054 ++format;
3055 }
3056 else
3057 {
3058 arg = strtol (format + 1, &send, 10);
db557034 3059 know (send != format && arg < count);
252b5132
RH		 3060 len += strlen (operands[arg]);
3061 format = send;
3062 }
3063 }
3064
3065 /* Put the string together. */
3066 complete = s = (char *) alloca (len + 1);
3067 format = macro->format;
3068 while (*format != '\0')
3069 {
3070 if (*format != '%')
3071 *s++ = *format++;
3072 else
3073 {
3074 arg = strtol (format + 1, &send, 10);
3075 strcpy (s, operands[arg]);
3076 s += strlen (s);
3077 format = send;
3078 }
3079 }
3080 *s = '\0';
3081
3082 /* Assemble the constructed instruction. */
3083 md_assemble (complete);
81d4177b 3084}
252b5132
RH		 3085\f
3086#ifdef OBJ_ELF
99a814a1 3087/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3088
01e1a5bc 3089bfd_vma
98027b10 3090ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3091{
3092 if (letter == 'e')
3093 return SHF_EXCLUDE;
3094
13ae64f3 3095 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3096 return -1;
252b5132
RH		 3097}
3098
01e1a5bc 3099bfd_vma
98027b10 3100ppc_section_word (char *str, size_t len)
252b5132 3101{
9de8d8f1
RH		 3102 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3103 return SHF_EXCLUDE;
252b5132 3104
9de8d8f1 3105 return -1;
252b5132
RH		 3106}
3107
3108int
98027b10 3109ppc_section_type (char *str, size_t len)
252b5132 3110{
9de8d8f1
RH		 3111 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3112 return SHT_ORDERED;
252b5132 3113
9de8d8f1 3114 return -1;
252b5132
RH		 3115}
3116
3117int
01e1a5bc 3118ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3119{
3120 if (type == SHT_ORDERED)
3121 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3122
3123 if (attr & SHF_EXCLUDE)
3124 flags |= SEC_EXCLUDE;
3125
3126 return flags;
3127}
3128#endif /* OBJ_ELF */
3129
3130\f
3131/* Pseudo-op handling. */
3132
3133/* The .byte pseudo-op. This is similar to the normal .byte
3134 pseudo-op, but it can also take a single ASCII string. */
3135
3136static void
98027b10 3137ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3138{
3139 if (*input_line_pointer != '\"')
3140 {
3141 cons (1);
3142 return;
3143 }
3144
3145 /* Gather characters. A real double quote is doubled. Unusual
3146 characters are not permitted. */
3147 ++input_line_pointer;
3148 while (1)
3149 {
3150 char c;
3151
3152 c = *input_line_pointer++;
3153
3154 if (c == '\"')
3155 {
3156 if (*input_line_pointer != '\"')
3157 break;
3158 ++input_line_pointer;
3159 }
3160
3161 FRAG_APPEND_1_CHAR (c);
3162 }
3163
3164 demand_empty_rest_of_line ();
3165}
3166\f
3167#ifdef OBJ_XCOFF
3168
3169/* XCOFF specific pseudo-op handling. */
3170
3171/* This is set if we are creating a .stabx symbol, since we don't want
3172 to handle symbol suffixes for such symbols. */
b34976b6 3173static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3174
3175/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3176 symbols in the .bss segment as though they were local common
67c1ffbe 3177 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3178 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3179
3180static void
98027b10 3181ppc_comm (int lcomm)
252b5132
RH		 3182{
3183 asection *current_seg = now_seg;
3184 subsegT current_subseg = now_subseg;
3185 char *name;
3186 char endc;
3187 char *end_name;
3188 offsetT size;
3189 offsetT align;
3190 symbolS *lcomm_sym = NULL;
3191 symbolS *sym;
3192 char *pfrag;
3193
3194 name = input_line_pointer;
3195 endc = get_symbol_end ();
3196 end_name = input_line_pointer;
3197 *end_name = endc;
3198
3199 if (*input_line_pointer != ',')
3200 {
3201 as_bad (_("missing size"));
3202 ignore_rest_of_line ();
3203 return;
3204 }
3205 ++input_line_pointer;
3206
3207 size = get_absolute_expression ();
3208 if (size < 0)
3209 {
3210 as_bad (_("negative size"));
3211 ignore_rest_of_line ();
3212 return;
3213 }
3214
3215 if (! lcomm)
3216 {
3217 /* The third argument to .comm is the alignment. */
3218 if (*input_line_pointer != ',')
1ad63b2f 3219 align = 2;
252b5132
RH		 3220 else
3221 {
3222 ++input_line_pointer;
3223 align = get_absolute_expression ();
3224 if (align <= 0)
3225 {
3226 as_warn (_("ignoring bad alignment"));
1ad63b2f 3227 align = 2;
252b5132
RH		 3228 }
3229 }
3230 }
3231 else
3232 {
3233 char *lcomm_name;
3234 char lcomm_endc;
3235
1ad63b2f 3236 if (size <= 4)
252b5132
RH		 3237 align = 2;
3238 else
3239 align = 3;
3240
3241 /* The third argument to .lcomm appears to be the real local
3242 common symbol to create. References to the symbol named in
3243 the first argument are turned into references to the third
3244 argument. */
3245 if (*input_line_pointer != ',')
3246 {
3247 as_bad (_("missing real symbol name"));
3248 ignore_rest_of_line ();
3249 return;
3250 }
3251 ++input_line_pointer;
3252
3253 lcomm_name = input_line_pointer;
3254 lcomm_endc = get_symbol_end ();
81d4177b 3255
252b5132
RH		 3256 lcomm_sym = symbol_find_or_make (lcomm_name);
3257
3258 *input_line_pointer = lcomm_endc;
3259 }
3260
3261 *end_name = '\0';
3262 sym = symbol_find_or_make (name);
3263 *end_name = endc;
3264
3265 if (S_IS_DEFINED (sym)
3266 || S_GET_VALUE (sym) != 0)
3267 {
3268 as_bad (_("attempt to redefine symbol"));
3269 ignore_rest_of_line ();
3270 return;
3271 }
81d4177b 3272
252b5132 3273 record_alignment (bss_section, align);
81d4177b 3274
252b5132
RH		 3275 if (! lcomm
3276 || ! S_IS_DEFINED (lcomm_sym))
3277 {
3278 symbolS *def_sym;
3279 offsetT def_size;
3280
3281 if (! lcomm)
3282 {
3283 def_sym = sym;
3284 def_size = size;
3285 S_SET_EXTERNAL (sym);
3286 }
3287 else
3288 {
809ffe0d 3289 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3290 def_sym = lcomm_sym;
3291 def_size = 0;
3292 }
3293
3294 subseg_set (bss_section, 1);
3295 frag_align (align, 0, 0);
81d4177b 3296
809ffe0d 3297 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3298 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3299 def_size, (char *) NULL);
3300 *pfrag = 0;
3301 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3302 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3303 }
3304 else if (lcomm)
3305 {
3306 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3307 symbol_get_frag (lcomm_sym)->fr_offset =
3308 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3309 &~ ((1 << align) - 1));
809ffe0d
ILT		 3310 if (align > symbol_get_tc (lcomm_sym)->align)
3311 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3312 }
3313
3314 if (lcomm)
3315 {
3316 /* Make sym an offset from lcomm_sym. */
3317 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3318 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3319 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3320 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3321 }
3322
3323 subseg_set (current_seg, current_subseg);
3324
3325 demand_empty_rest_of_line ();
3326}
3327
3328/* The .csect pseudo-op. This switches us into a different
3329 subsegment. The first argument is a symbol whose value is the
3330 start of the .csect. In COFF, csect symbols get special aux
3331 entries defined by the x_csect field of union internal_auxent. The
3332 optional second argument is the alignment (the default is 2). */
3333
3334static void
98027b10 3335ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3336{
3337 char *name;
3338 char endc;
3339 symbolS *sym;
931e13a6 3340 offsetT align;
252b5132
RH		 3341
3342 name = input_line_pointer;
3343 endc = get_symbol_end ();
81d4177b 3344
252b5132
RH		 3345 sym = symbol_find_or_make (name);
3346
3347 *input_line_pointer = endc;
3348
3349 if (S_GET_NAME (sym)[0] == '\0')
3350 {
3351 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3352 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3353 }
3354
931e13a6 3355 align = 2;
252b5132
RH		 3356 if (*input_line_pointer == ',')
3357 {
3358 ++input_line_pointer;
931e13a6 3359 align = get_absolute_expression ();
252b5132
RH		 3360 }
3361
931e13a6
AM		 3362 ppc_change_csect (sym, align);
3363
252b5132
RH		 3364 demand_empty_rest_of_line ();
3365}
3366
3367/* Change to a different csect. */
3368
3369static void
98027b10 3370ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3371{
3372 if (S_IS_DEFINED (sym))
809ffe0d 3373 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3374 else
3375 {
3376 symbolS **list_ptr;
3377 int after_toc;
3378 int hold_chunksize;
3379 symbolS *list;
931e13a6
AM		 3380 int is_code;
3381 segT sec;
252b5132
RH		 3382
3383 /* This is a new csect. We need to look at the symbol class to
3384 figure out whether it should go in the text section or the
3385 data section. */
3386 after_toc = 0;
931e13a6 3387 is_code = 0;
96d56e9f 3388 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3389 {
3390 case XMC_PR:
3391 case XMC_RO:
3392 case XMC_DB:
3393 case XMC_GL:
3394 case XMC_XO:
3395 case XMC_SV:
3396 case XMC_TI:
3397 case XMC_TB:
3398 S_SET_SEGMENT (sym, text_section);
809ffe0d 3399 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3400 ++ppc_text_subsegment;
3401 list_ptr = &ppc_text_csects;
931e13a6 3402 is_code = 1;
252b5132
RH		 3403 break;
3404 case XMC_RW:
3405 case XMC_TC0:
3406 case XMC_TC:
3407 case XMC_DS:
3408 case XMC_UA:
3409 case XMC_BS:
3410 case XMC_UC:
3411 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3412 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3413 == ppc_data_subsegment))
252b5132
RH		 3414 after_toc = 1;
3415 S_SET_SEGMENT (sym, data_section);
809ffe0d 3416 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3417 ++ppc_data_subsegment;
3418 list_ptr = &ppc_data_csects;
3419 break;
3420 default:
3421 abort ();
3422 }
3423
3424 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3425 changing subsegments, so that we don't use a lot of memory
3426 space for what may be a small section. */
252b5132
RH		 3427 hold_chunksize = chunksize;
3428 chunksize = 64;
3429
931e13a6
AM		 3430 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3431 symbol_get_tc (sym)->subseg);
252b5132
RH		 3432
3433 chunksize = hold_chunksize;
3434
3435 if (after_toc)
3436 ppc_after_toc_frag = frag_now;
3437
931e13a6
AM		 3438 record_alignment (sec, align);
3439 if (is_code)
3440 frag_align_code (align, 0);
3441 else
3442 frag_align (align, 0, 0);
3443
809ffe0d 3444 symbol_set_frag (sym, frag_now);
252b5132
RH		 3445 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3446
931e13a6 3447 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3448 symbol_get_tc (sym)->output = 1;
3449 symbol_get_tc (sym)->within = sym;
81d4177b 3450
252b5132 3451 for (list = *list_ptr;
809ffe0d
ILT		 3452 symbol_get_tc (list)->next != (symbolS *) NULL;
3453 list = symbol_get_tc (list)->next)
252b5132 3454 ;
809ffe0d 3455 symbol_get_tc (list)->next = sym;
81d4177b 3456
252b5132 3457 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3458 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3459 &symbol_lastP);
252b5132
RH		 3460 }
3461
3462 ppc_current_csect = sym;
3463}
3464
3465/* This function handles the .text and .data pseudo-ops. These
3466 pseudo-ops aren't really used by XCOFF; we implement them for the
3467 convenience of people who aren't used to XCOFF. */
3468
3469static void
98027b10 3470ppc_section (int type)
252b5132
RH		 3471{
3472 const char *name;
3473 symbolS *sym;
3474
3475 if (type == 't')
3476 name = ".text[PR]";
3477 else if (type == 'd')
3478 name = ".data[RW]";
3479 else
3480 abort ();
3481
3482 sym = symbol_find_or_make (name);
3483
931e13a6 3484 ppc_change_csect (sym, 2);
252b5132
RH		 3485
3486 demand_empty_rest_of_line ();
3487}
3488
3489/* This function handles the .section pseudo-op. This is mostly to
3490 give an error, since XCOFF only supports .text, .data and .bss, but
3491 we do permit the user to name the text or data section. */
3492
3493static void
98027b10 3494ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3495{
3496 char *user_name;
3497 const char *real_name;
3498 char c;
3499 symbolS *sym;
3500
3501 user_name = input_line_pointer;
3502 c = get_symbol_end ();
3503
3504 if (strcmp (user_name, ".text") == 0)
3505 real_name = ".text[PR]";
3506 else if (strcmp (user_name, ".data") == 0)
3507 real_name = ".data[RW]";
3508 else
3509 {
3510 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3511 *input_line_pointer = c;
3512 ignore_rest_of_line ();
3513 return;
3514 }
3515
3516 *input_line_pointer = c;
3517
3518 sym = symbol_find_or_make (real_name);
3519
931e13a6 3520 ppc_change_csect (sym, 2);
252b5132
RH		 3521
3522 demand_empty_rest_of_line ();
3523}
3524
3525/* The .extern pseudo-op. We create an undefined symbol. */
3526
3527static void
98027b10 3528ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3529{
3530 char *name;
3531 char endc;
3532
3533 name = input_line_pointer;
3534 endc = get_symbol_end ();
3535
3536 (void) symbol_find_or_make (name);
3537
3538 *input_line_pointer = endc;
3539
3540 demand_empty_rest_of_line ();
3541}
3542
3543/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3544
3545static void
98027b10 3546ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3547{
3548 char *name;
3549 char endc;
3550 symbolS *sym;
3551
3552 name = input_line_pointer;
3553 endc = get_symbol_end ();
3554
3555 sym = symbol_find_or_make (name);
3556
3557 *input_line_pointer = endc;
3558
809ffe0d 3559 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3560
3561 demand_empty_rest_of_line ();
3562}
3563
c865e45b
RS		 3564/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3565 relocations at the beginning of the current csect.
3566
3567 (In principle, there's no reason why the relocations _have_ to be at
3568 the beginning. Anywhere in the csect would do. However, inserting
3569 at the beginning is what the native assmebler does, and it helps to
3570 deal with cases where the .ref statements follow the section contents.)
3571
3572 ??? .refs don't work for empty .csects. However, the native assembler
3573 doesn't report an error in this case, and neither yet do we. */
3574
3575static void
3576ppc_ref (int ignore ATTRIBUTE_UNUSED)
3577{
3578 char *name;
3579 char c;
3580
3581 if (ppc_current_csect == NULL)
3582 {
3583 as_bad (_(".ref outside .csect"));
3584 ignore_rest_of_line ();
3585 return;
3586 }
3587
3588 do
3589 {
3590 name = input_line_pointer;
3591 c = get_symbol_end ();
3592
3593 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3594 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3595
3596 *input_line_pointer = c;
3597 SKIP_WHITESPACE ();
3598 c = *input_line_pointer;
3599 if (c == ',')
3600 {
3601 input_line_pointer++;
3602 SKIP_WHITESPACE ();
3603 if (is_end_of_line[(unsigned char) *input_line_pointer])
3604 {
3605 as_bad (_("missing symbol name"));
3606 ignore_rest_of_line ();
3607 return;
3608 }
3609 }
3610 }
3611 while (c == ',');
3612
3613 demand_empty_rest_of_line ();
3614}
3615
252b5132
RH		 3616/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3617 although I don't know why it bothers. */
3618
3619static void
98027b10 3620ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3621{
3622 char *name;
3623 char endc;
3624 symbolS *sym;
3625 int len;
3626
3627 name = input_line_pointer;
3628 endc = get_symbol_end ();
3629
3630 sym = symbol_find_or_make (name);
3631
3632 *input_line_pointer = endc;
3633
3634 if (*input_line_pointer != ',')
3635 {
3636 as_bad (_("missing rename string"));
3637 ignore_rest_of_line ();
3638 return;
3639 }
3640 ++input_line_pointer;
3641
809ffe0d 3642 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3643
3644 demand_empty_rest_of_line ();
3645}
3646
3647/* The .stabx pseudo-op. This is similar to a normal .stabs
3648 pseudo-op, but slightly different. A sample is
3649 .stabx "main:F-1",.main,142,0
3650 The first argument is the symbol name to create. The second is the
3651 value, and the third is the storage class. The fourth seems to be
3652 always zero, and I am assuming it is the type. */
3653
3654static void
98027b10 3655ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3656{
3657 char *name;
3658 int len;
3659 symbolS *sym;
3660 expressionS exp;
3661
3662 name = demand_copy_C_string (&len);
3663
3664 if (*input_line_pointer != ',')
3665 {
3666 as_bad (_("missing value"));
3667 return;
3668 }
3669 ++input_line_pointer;
3670
b34976b6 3671 ppc_stab_symbol = TRUE;
252b5132 3672 sym = symbol_make (name);
b34976b6 3673 ppc_stab_symbol = FALSE;
252b5132 3674
809ffe0d 3675 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3676
3677 (void) expression (&exp);
3678
3679 switch (exp.X_op)
3680 {
3681 case O_illegal:
3682 case O_absent:
3683 case O_big:
3684 as_bad (_("illegal .stabx expression; zero assumed"));
3685 exp.X_add_number = 0;
3686 /* Fall through. */
3687 case O_constant:
3688 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3689 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3690 break;
3691
3692 case O_symbol:
3693 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3694 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3695 else
3696 {
3697 S_SET_VALUE (sym,
3698 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3699 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3700 }
3701 break;
3702
3703 default:
3704 /* The value is some complex expression. This will probably
99a814a1
AM		 3705 fail at some later point, but this is probably the right
3706 thing to do here. */
809ffe0d 3707 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3708 break;
3709 }
3710
3711 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3712 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3713
3714 if (*input_line_pointer != ',')
3715 {
3716 as_bad (_("missing class"));
3717 return;
3718 }
3719 ++input_line_pointer;
3720
3721 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3722
3723 if (*input_line_pointer != ',')
3724 {
3725 as_bad (_("missing type"));
3726 return;
3727 }
3728 ++input_line_pointer;
3729
3730 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3731
809ffe0d 3732 symbol_get_tc (sym)->output = 1;
252b5132 3733
6877bb43 3734 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3735
809ffe0d 3736 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3737
41ea10b1 3738 /* In this case :
99a814a1 3739
41ea10b1
TR		 3740 .bs name
3741 .stabx "z",arrays_,133,0
3742 .es
99a814a1 3743
41ea10b1 3744 .comm arrays_,13768,3
99a814a1 3745
41ea10b1
TR		 3746 resolve_symbol_value will copy the exp's "within" into sym's when the
3747 offset is 0. Since this seems to be corner case problem,
3748 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3749 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3750
3751 if (exp.X_op == O_symbol)
41ea10b1
TR		 3752 {
3753 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3754 }
6877bb43 3755 }
99a814a1 3756
252b5132
RH		 3757 if (exp.X_op != O_symbol
3758 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3759 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3760 ppc_frob_label (sym);
3761 else
3762 {
3763 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3764 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3765 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3766 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3767 }
3768
3769 demand_empty_rest_of_line ();
3770}
3771
3772/* The .function pseudo-op. This takes several arguments. The first
3773 argument seems to be the external name of the symbol. The second
67c1ffbe 3774 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3775 uses the same name for both. I have no idea what the third and
3776 fourth arguments are meant to be. The optional fifth argument is
3777 an expression for the size of the function. In COFF this symbol
3778 gets an aux entry like that used for a csect. */
3779
3780static void
98027b10 3781ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3782{
3783 char *name;
3784 char endc;
3785 char *s;
3786 symbolS *ext_sym;
3787 symbolS *lab_sym;
3788
3789 name = input_line_pointer;
3790 endc = get_symbol_end ();
3791
3792 /* Ignore any [PR] suffix. */
3793 name = ppc_canonicalize_symbol_name (name);
3794 s = strchr (name, '[');
3795 if (s != (char *) NULL
3796 && strcmp (s + 1, "PR]") == 0)
3797 *s = '\0';
3798
3799 ext_sym = symbol_find_or_make (name);
3800
3801 *input_line_pointer = endc;
3802
3803 if (*input_line_pointer != ',')
3804 {
3805 as_bad (_("missing symbol name"));
3806 ignore_rest_of_line ();
3807 return;
3808 }
3809 ++input_line_pointer;
3810
3811 name = input_line_pointer;
3812 endc = get_symbol_end ();
3813
3814 lab_sym = symbol_find_or_make (name);
3815
3816 *input_line_pointer = endc;
3817
3818 if (ext_sym != lab_sym)
3819 {
809ffe0d
ILT		 3820 expressionS exp;
3821
3822 exp.X_op = O_symbol;
3823 exp.X_add_symbol = lab_sym;
3824 exp.X_op_symbol = NULL;
3825 exp.X_add_number = 0;
3826 exp.X_unsigned = 0;
3827 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3828 }
3829
96d56e9f
NC		 3830 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3831 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3832 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3833
3834 if (*input_line_pointer == ',')
3835 {
91d6fa6a 3836 expressionS exp;
252b5132
RH		 3837
3838 /* Ignore the third argument. */
3839 ++input_line_pointer;
91d6fa6a 3840 expression (& exp);
252b5132
RH		 3841 if (*input_line_pointer == ',')
3842 {
3843 /* Ignore the fourth argument. */
3844 ++input_line_pointer;
91d6fa6a 3845 expression (& exp);
252b5132
RH		 3846 if (*input_line_pointer == ',')
3847 {
3848 /* The fifth argument is the function size. */
3849 ++input_line_pointer;
809ffe0d
ILT		 3850 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3851 absolute_section,
3852 (valueT) 0,
3853 &zero_address_frag);
3854 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3855 }
3856 }
3857 }
3858
3859 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3860 SF_SET_FUNCTION (ext_sym);
3861 SF_SET_PROCESS (ext_sym);
3862 coff_add_linesym (ext_sym);
3863
3864 demand_empty_rest_of_line ();
3865}
3866
3867/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3868 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3869 with the correct line number */
5d6255fe 3870
8642cce8 3871static symbolS *saved_bi_sym = 0;
252b5132
RH		 3872
3873static void
98027b10 3874ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3875{
3876 symbolS *sym;
3877
3878 sym = symbol_make (".bf");
3879 S_SET_SEGMENT (sym, text_section);
809ffe0d 3880 symbol_set_frag (sym, frag_now);
252b5132
RH		 3881 S_SET_VALUE (sym, frag_now_fix ());
3882 S_SET_STORAGE_CLASS (sym, C_FCN);
3883
3884 coff_line_base = get_absolute_expression ();
3885
3886 S_SET_NUMBER_AUXILIARY (sym, 1);
3887 SA_SET_SYM_LNNO (sym, coff_line_base);
3888
8642cce8 3889 /* Line number for bi. */
5d6255fe 3890 if (saved_bi_sym)
8642cce8
TR		 3891 {
3892 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3893 saved_bi_sym = 0;
3894 }
5d6255fe 3895
8642cce8 3896
809ffe0d 3897 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3898
3899 ppc_frob_label (sym);
3900
3901 demand_empty_rest_of_line ();
3902}
3903
3904/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3905 ".ef", except that the line number is absolute, not relative to the
3906 most recent ".bf" symbol. */
3907
3908static void
98027b10 3909ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3910{
3911 symbolS *sym;
3912
3913 sym = symbol_make (".ef");
3914 S_SET_SEGMENT (sym, text_section);
809ffe0d 3915 symbol_set_frag (sym, frag_now);
252b5132
RH		 3916 S_SET_VALUE (sym, frag_now_fix ());
3917 S_SET_STORAGE_CLASS (sym, C_FCN);
3918 S_SET_NUMBER_AUXILIARY (sym, 1);
3919 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3920 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3921
3922 ppc_frob_label (sym);
3923
3924 demand_empty_rest_of_line ();
3925}
3926
3927/* The .bi and .ei pseudo-ops. These take a string argument and
3928 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3929 the symbol list. The value of .bi will be know when the next .bf
3930 is encountered. */
252b5132
RH		 3931
3932static void
98027b10 3933ppc_biei (int ei)
252b5132
RH		 3934{
3935 static symbolS *last_biei;
3936
3937 char *name;
3938 int len;
3939 symbolS *sym;
3940 symbolS *look;
3941
3942 name = demand_copy_C_string (&len);
3943
3944 /* The value of these symbols is actually file offset. Here we set
3945 the value to the index into the line number entries. In
3946 ppc_frob_symbols we set the fix_line field, which will cause BFD
3947 to do the right thing. */
3948
3949 sym = symbol_make (name);
3950 /* obj-coff.c currently only handles line numbers correctly in the
3951 .text section. */
3952 S_SET_SEGMENT (sym, text_section);
3953 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3954 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3955
3956 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3957 symbol_get_tc (sym)->output = 1;
81d4177b 3958
8642cce8 3959 /* Save bi. */
5d6255fe 3960 if (ei)
8642cce8
TR		 3961 saved_bi_sym = 0;
3962 else
3963 saved_bi_sym = sym;
3964
252b5132
RH		 3965 for (look = last_biei ? last_biei : symbol_rootP;
3966 (look != (symbolS *) NULL
3967 && (S_GET_STORAGE_CLASS (look) == C_FILE
3968 || S_GET_STORAGE_CLASS (look) == C_BINCL
3969 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3970 look = symbol_next (look))
3971 ;
3972 if (look != (symbolS *) NULL)
3973 {
3974 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3975 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3976 last_biei = sym;
3977 }
3978
3979 demand_empty_rest_of_line ();
3980}
3981
3982/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3983 There is one argument, which is a csect symbol. The value of the
3984 .bs symbol is the index of this csect symbol. */
3985
3986static void
98027b10 3987ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3988{
3989 char *name;
3990 char endc;
3991 symbolS *csect;
3992 symbolS *sym;
3993
3994 if (ppc_current_block != NULL)
3995 as_bad (_("nested .bs blocks"));
3996
3997 name = input_line_pointer;
3998 endc = get_symbol_end ();
3999
4000 csect = symbol_find_or_make (name);
4001
4002 *input_line_pointer = endc;
4003
4004 sym = symbol_make (".bs");
4005 S_SET_SEGMENT (sym, now_seg);
4006 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4007 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4008 symbol_get_tc (sym)->output = 1;
252b5132 4009
809ffe0d 4010 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4011
4012 ppc_frob_label (sym);
4013
4014 ppc_current_block = sym;
4015
4016 demand_empty_rest_of_line ();
4017}
4018
4019/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4020
4021static void
98027b10 4022ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4023{
4024 symbolS *sym;
4025
4026 if (ppc_current_block == NULL)
4027 as_bad (_(".es without preceding .bs"));
4028
4029 sym = symbol_make (".es");
4030 S_SET_SEGMENT (sym, now_seg);
4031 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4032 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4033 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4034
4035 ppc_frob_label (sym);
4036
4037 ppc_current_block = NULL;
4038
4039 demand_empty_rest_of_line ();
4040}
4041
4042/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4043 line number. */
4044
4045static void
98027b10 4046ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4047{
4048 symbolS *sym;
4049
4050 sym = symbol_make (".bb");
4051 S_SET_SEGMENT (sym, text_section);
809ffe0d 4052 symbol_set_frag (sym, frag_now);
252b5132
RH		 4053 S_SET_VALUE (sym, frag_now_fix ());
4054 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4055
4056 S_SET_NUMBER_AUXILIARY (sym, 1);
4057 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4058
809ffe0d 4059 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4060
4061 SF_SET_PROCESS (sym);
4062
4063 ppc_frob_label (sym);
4064
4065 demand_empty_rest_of_line ();
4066}
4067
4068/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4069 line number. */
4070
4071static void
98027b10 4072ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4073{
4074 symbolS *sym;
4075
4076 sym = symbol_make (".eb");
4077 S_SET_SEGMENT (sym, text_section);
809ffe0d 4078 symbol_set_frag (sym, frag_now);
252b5132
RH		 4079 S_SET_VALUE (sym, frag_now_fix ());
4080 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4081 S_SET_NUMBER_AUXILIARY (sym, 1);
4082 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4083 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4084
4085 SF_SET_PROCESS (sym);
4086
4087 ppc_frob_label (sym);
4088
4089 demand_empty_rest_of_line ();
4090}
4091
4092/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4093 specified name. */
4094
4095static void
98027b10 4096ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4097{
4098 char *name;
4099 int len;
4100 symbolS *sym;
4101
4102 name = demand_copy_C_string (&len);
4103 sym = symbol_make (name);
4104 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4105 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4106 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4107 S_SET_VALUE (sym, 0);
809ffe0d 4108 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4109
4110 ppc_frob_label (sym);
4111
4112 demand_empty_rest_of_line ();
4113}
4114
4115/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4116
4117static void
98027b10 4118ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4119{
4120 symbolS *sym;
4121
4122 sym = symbol_make (".ec");
4123 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4124 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4125 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4126 S_SET_VALUE (sym, 0);
809ffe0d 4127 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4128
4129 ppc_frob_label (sym);
4130
4131 demand_empty_rest_of_line ();
4132}
4133
4134/* The .toc pseudo-op. Switch to the .toc subsegment. */
4135
4136static void
98027b10 4137ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4138{
4139 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4140 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4141 else
4142 {
4143 subsegT subseg;
4144 symbolS *sym;
4145 symbolS *list;
81d4177b 4146
252b5132
RH		 4147 subseg = ppc_data_subsegment;
4148 ++ppc_data_subsegment;
4149
4150 subseg_new (segment_name (data_section), subseg);
4151 ppc_toc_frag = frag_now;
4152
4153 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4154 symbol_set_frag (sym, frag_now);
252b5132
RH		 4155 S_SET_SEGMENT (sym, data_section);
4156 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4157 symbol_get_tc (sym)->subseg = subseg;
4158 symbol_get_tc (sym)->output = 1;
4159 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4160
4161 ppc_toc_csect = sym;
81d4177b 4162
252b5132 4163 for (list = ppc_data_csects;
809ffe0d
ILT		 4164 symbol_get_tc (list)->next != (symbolS *) NULL;
4165 list = symbol_get_tc (list)->next)
252b5132 4166 ;
809ffe0d 4167 symbol_get_tc (list)->next = sym;
252b5132
RH		 4168
4169 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4170 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4171 &symbol_lastP);
252b5132
RH		 4172 }
4173
4174 ppc_current_csect = ppc_toc_csect;
4175
4176 demand_empty_rest_of_line ();
4177}
4178
4179/* The AIX assembler automatically aligns the operands of a .long or
4180 .short pseudo-op, and we want to be compatible. */
4181
4182static void
98027b10 4183ppc_xcoff_cons (int log_size)
252b5132
RH		 4184{
4185 frag_align (log_size, 0, 0);
4186 record_alignment (now_seg, log_size);
4187 cons (1 << log_size);
4188}
4189
4190static void
98027b10 4191ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4192{
4193 expressionS exp;
4194 int byte_count;
4195
4196 (void) expression (&exp);
4197
4198 if (exp.X_op != O_constant)
4199 {
4200 as_bad (_("non-constant byte count"));
4201 return;
4202 }
4203
4204 byte_count = exp.X_add_number;
4205
4206 if (*input_line_pointer != ',')
4207 {
4208 as_bad (_("missing value"));
4209 return;
4210 }
4211
4212 ++input_line_pointer;
4213 cons (byte_count);
4214}
4215
4216#endif /* OBJ_XCOFF */
0baf16f2 4217#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4218\f
4219/* The .tc pseudo-op. This is used when generating either XCOFF or
4220 ELF. This takes two or more arguments.
4221
4222 When generating XCOFF output, the first argument is the name to
4223 give to this location in the toc; this will be a symbol with class
0baf16f2 4224 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4225 this location in the TOC; often there is just one more argument, a
1049f94e 4226 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4227 depends on target word size. A 32-bit target uses 4-byte values, a
4228 64-bit target uses 8-byte values.
252b5132
RH		 4229
4230 When not generating XCOFF output, the arguments are the same, but
4231 the first argument is simply ignored. */
4232
4233static void
98027b10 4234ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4235{
4236#ifdef OBJ_XCOFF
4237
4238 /* Define the TOC symbol name. */
4239 {
4240 char *name;
4241 char endc;
4242 symbolS *sym;
4243
4244 if (ppc_toc_csect == (symbolS *) NULL
4245 || ppc_toc_csect != ppc_current_csect)
4246 {
4247 as_bad (_(".tc not in .toc section"));
4248 ignore_rest_of_line ();
4249 return;
4250 }
4251
4252 name = input_line_pointer;
4253 endc = get_symbol_end ();
4254
4255 sym = symbol_find_or_make (name);
4256
4257 *input_line_pointer = endc;
4258
4259 if (S_IS_DEFINED (sym))
4260 {
4261 symbolS *label;
4262
809ffe0d 4263 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4264 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4265 {
4266 as_bad (_(".tc with no label"));
4267 ignore_rest_of_line ();
4268 return;
4269 }
4270
4271 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4272 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4273 S_SET_VALUE (label, S_GET_VALUE (sym));
4274
4275 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4276 ++input_line_pointer;
4277
4278 return;
4279 }
4280
4281 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4282 symbol_set_frag (sym, frag_now);
252b5132 4283 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4284 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4285 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4286
4287 ppc_frob_label (sym);
4288 }
4289
0baf16f2
AM		 4290#endif /* OBJ_XCOFF */
4291#ifdef OBJ_ELF
9c7977b3 4292 int align;
252b5132
RH		 4293
4294 /* Skip the TOC symbol name. */
4295 while (is_part_of_name (*input_line_pointer)
d13d4015 4296 || *input_line_pointer == ' '
252b5132
RH		 4297 || *input_line_pointer == '['
4298 || *input_line_pointer == ']'
4299 || *input_line_pointer == '{'
4300 || *input_line_pointer == '}')
4301 ++input_line_pointer;
4302
0baf16f2 4303 /* Align to a four/eight byte boundary. */
2b3c4602 4304 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4305 frag_align (align, 0, 0);
4306 record_alignment (now_seg, align);
0baf16f2 4307#endif /* OBJ_ELF */
252b5132
RH		 4308
4309 if (*input_line_pointer != ',')
4310 demand_empty_rest_of_line ();
4311 else
4312 {
4313 ++input_line_pointer;
2b3c4602 4314 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4315 }
4316}
0baf16f2
AM		 4317
4318/* Pseudo-op .machine. */
0baf16f2
AM		 4319
4320static void
98027b10 4321ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4322{
69c040df
AM		 4323 char *cpu_string;
4324#define MAX_HISTORY 100
fa452fa6 4325 static ppc_cpu_t *cpu_history;
69c040df
AM		 4326 static int curr_hist;
4327
4328 SKIP_WHITESPACE ();
4329
4330 if (*input_line_pointer == '"')
4331 {
4332 int len;
4333 cpu_string = demand_copy_C_string (&len);
4334 }
4335 else
4336 {
4337 char c;
4338 cpu_string = input_line_pointer;
4339 c = get_symbol_end ();
4340 cpu_string = xstrdup (cpu_string);
4341 *input_line_pointer = c;
4342 }
4343
4344 if (cpu_string != NULL)
4345 {
fa452fa6 4346 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4347 ppc_cpu_t new_cpu;
69c040df
AM		 4348 char *p;
4349
4350 for (p = cpu_string; *p != 0; p++)
4351 *p = TOLOWER (*p);
4352
4353 if (strcmp (cpu_string, "push") == 0)
4354 {
4355 if (cpu_history == NULL)
4356 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4357
4358 if (curr_hist >= MAX_HISTORY)
4359 as_bad (_(".machine stack overflow"));
4360 else
4361 cpu_history[curr_hist++] = ppc_cpu;
4362 }
4363 else if (strcmp (cpu_string, "pop") == 0)
4364 {
4365 if (curr_hist <= 0)
4366 as_bad (_(".machine stack underflow"));
4367 else
4368 ppc_cpu = cpu_history[--curr_hist];
4369 }
69fe9ce5
AM		 4370 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4371 ppc_cpu = new_cpu;
69c040df
AM		 4372 else
4373 as_bad (_("invalid machine `%s'"), cpu_string);
4374
4375 if (ppc_cpu != old_cpu)
4376 ppc_setup_opcodes ();
4377 }
4378
4379 demand_empty_rest_of_line ();
0baf16f2
AM		 4380}
4381
4382/* See whether a symbol is in the TOC section. */
4383
4384static int
98027b10 4385ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4386{
4387#ifdef OBJ_XCOFF
96d56e9f 4388 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4389#endif
4390#ifdef OBJ_ELF
4391 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4392 if (ppc_obj64)
0baf16f2
AM		 4393 return strcmp (sname, ".toc") == 0;
4394 else
4395 return strcmp (sname, ".got") == 0;
4396#endif
4397}
4398#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4399\f
4400#ifdef TE_PE
4401
99a814a1 4402/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4403
4404/* Set the current section. */
4405static void
98027b10 4406ppc_set_current_section (segT new)
252b5132
RH		 4407{
4408 ppc_previous_section = ppc_current_section;
4409 ppc_current_section = new;
4410}
4411
4412/* pseudo-op: .previous
4413 behaviour: toggles the current section with the previous section.
4414 errors: None
99a814a1
AM		 4415 warnings: "No previous section" */
4416
252b5132 4417static void
98027b10 4418ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4419{
4420 symbolS *tmp;
4421
81d4177b 4422 if (ppc_previous_section == NULL)
252b5132 4423 {
99a814a1 4424 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4425 return;
4426 }
4427
99a814a1 4428 subseg_set (ppc_previous_section, 0);
252b5132 4429
99a814a1 4430 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4431}
4432
4433/* pseudo-op: .pdata
4434 behaviour: predefined read only data section
b34976b6 4435 double word aligned
252b5132
RH		 4436 errors: None
4437 warnings: None
4438 initial: .section .pdata "adr3"
b34976b6 4439 a - don't know -- maybe a misprint
252b5132
RH		 4440 d - initialized data
4441 r - readable
4442 3 - double word aligned (that would be 4 byte boundary)
4443
4444 commentary:
4445 Tag index tables (also known as the function table) for exception
99a814a1 4446 handling, debugging, etc. */
252b5132 4447
252b5132 4448static void
98027b10 4449ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4450{
81d4177b 4451 if (pdata_section == 0)
252b5132
RH		 4452 {
4453 pdata_section = subseg_new (".pdata", 0);
81d4177b 4454
252b5132
RH		 4455 bfd_set_section_flags (stdoutput, pdata_section,
4456 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4457 | SEC_READONLY | SEC_DATA ));
81d4177b 4458
252b5132
RH		 4459 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4460 }
4461 else
4462 {
99a814a1 4463 pdata_section = subseg_new (".pdata", 0);
252b5132 4464 }
99a814a1 4465 ppc_set_current_section (pdata_section);
252b5132
RH		 4466}
4467
4468/* pseudo-op: .ydata
4469 behaviour: predefined read only data section
b34976b6 4470 double word aligned
252b5132
RH		 4471 errors: None
4472 warnings: None
4473 initial: .section .ydata "drw3"
b34976b6 4474 a - don't know -- maybe a misprint
252b5132
RH		 4475 d - initialized data
4476 r - readable
4477 3 - double word aligned (that would be 4 byte boundary)
4478 commentary:
4479 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4480 debugging, etc. */
4481
252b5132 4482static void
98027b10 4483ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4484{
81d4177b 4485 if (ydata_section == 0)
252b5132
RH		 4486 {
4487 ydata_section = subseg_new (".ydata", 0);
4488 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4489 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4490 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4491
4492 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4493 }
4494 else
4495 {
4496 ydata_section = subseg_new (".ydata", 0);
4497 }
99a814a1 4498 ppc_set_current_section (ydata_section);
252b5132
RH		 4499}
4500
4501/* pseudo-op: .reldata
4502 behaviour: predefined read write data section
b34976b6 4503 double word aligned (4-byte)
252b5132
RH		 4504 FIXME: relocation is applied to it
4505 FIXME: what's the difference between this and .data?
4506 errors: None
4507 warnings: None
4508 initial: .section .reldata "drw3"
4509 d - initialized data
4510 r - readable
4511 w - writeable
4512 3 - double word aligned (that would be 8 byte boundary)
4513
4514 commentary:
4515 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4516 function descriptors, etc. */
4517
252b5132 4518static void
98027b10 4519ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4520{
4521 if (reldata_section == 0)
4522 {
4523 reldata_section = subseg_new (".reldata", 0);
4524
4525 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4526 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4527 | SEC_DATA));
252b5132
RH		 4528
4529 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4530 }
4531 else
4532 {
4533 reldata_section = subseg_new (".reldata", 0);
4534 }
99a814a1 4535 ppc_set_current_section (reldata_section);
252b5132
RH		 4536}
4537
4538/* pseudo-op: .rdata
4539 behaviour: predefined read only data section
b34976b6 4540 double word aligned
252b5132
RH		 4541 errors: None
4542 warnings: None
4543 initial: .section .rdata "dr3"
4544 d - initialized data
4545 r - readable
99a814a1
AM		 4546 3 - double word aligned (that would be 4 byte boundary) */
4547
252b5132 4548static void
98027b10 4549ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4550{
4551 if (rdata_section == 0)
4552 {
4553 rdata_section = subseg_new (".rdata", 0);
4554 bfd_set_section_flags (stdoutput, rdata_section,
4555 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4556 | SEC_READONLY | SEC_DATA ));
4557
4558 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4559 }
4560 else
4561 {
4562 rdata_section = subseg_new (".rdata", 0);
4563 }
99a814a1 4564 ppc_set_current_section (rdata_section);
252b5132
RH		 4565}
4566
4567/* pseudo-op: .ualong
81d4177b 4568 behaviour: much like .int, with the exception that no alignment is
b34976b6 4569 performed.
252b5132
RH		 4570 FIXME: test the alignment statement
4571 errors: None
99a814a1
AM		 4572 warnings: None */
4573
252b5132 4574static void
98027b10 4575ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4576{
99a814a1
AM		 4577 /* Try for long. */
4578 cons (4);
252b5132
RH		 4579}
4580
4581/* pseudo-op: .znop <symbol name>
4582 behaviour: Issue a nop instruction
b34976b6 4583 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4584 the supplied symbol name.
4585 errors: None
99a814a1
AM		 4586 warnings: Missing symbol name */
4587
252b5132 4588static void
98027b10 4589ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4590{
4591 unsigned long insn;
4592 const struct powerpc_opcode *opcode;
4593 expressionS ex;
4594 char *f;
252b5132 4595 symbolS *sym;
252b5132
RH		 4596 char *symbol_name;
4597 char c;
4598 char *name;
4599 unsigned int exp;
4600 flagword flags;
4601 asection *sec;
4602
99a814a1 4603 /* Strip out the symbol name. */
252b5132
RH		 4604 symbol_name = input_line_pointer;
4605 c = get_symbol_end ();
4606
4607 name = xmalloc (input_line_pointer - symbol_name + 1);
4608 strcpy (name, symbol_name);
4609
4610 sym = symbol_find_or_make (name);
4611
4612 *input_line_pointer = c;
4613
4614 SKIP_WHITESPACE ();
4615
4616 /* Look up the opcode in the hash table. */
4617 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4618
99a814a1 4619 /* Stick in the nop. */
252b5132
RH		 4620 insn = opcode->opcode;
4621
4622 /* Write out the instruction. */
4623 f = frag_more (4);
4624 md_number_to_chars (f, insn, 4);
4625 fix_new (frag_now,
4626 f - frag_now->fr_literal,
4627 4,
4628 sym,
4629 0,
4630 0,
4631 BFD_RELOC_16_GOT_PCREL);
4632
4633}
4634
81d4177b
KH		 4635/* pseudo-op:
4636 behaviour:
4637 errors:
99a814a1
AM		 4638 warnings: */
4639
252b5132 4640static void
98027b10 4641ppc_pe_comm (int lcomm)
252b5132 4642{
98027b10
AM		 4643 char *name;
4644 char c;
4645 char *p;
252b5132 4646 offsetT temp;
98027b10 4647 symbolS *symbolP;
252b5132
RH		 4648 offsetT align;
4649
4650 name = input_line_pointer;
4651 c = get_symbol_end ();
4652
99a814a1 4653 /* just after name is now '\0'. */
252b5132
RH		 4654 p = input_line_pointer;
4655 *p = c;
4656 SKIP_WHITESPACE ();
4657 if (*input_line_pointer != ',')
4658 {
4659 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4660 ignore_rest_of_line ();
4661 return;
4662 }
4663
4664 input_line_pointer++; /* skip ',' */
4665 if ((temp = get_absolute_expression ()) < 0)
4666 {
4667 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4668 ignore_rest_of_line ();
4669 return;
4670 }
4671
4672 if (! lcomm)
4673 {
4674 /* The third argument to .comm is the alignment. */
4675 if (*input_line_pointer != ',')
4676 align = 3;
4677 else
4678 {
4679 ++input_line_pointer;
4680 align = get_absolute_expression ();
4681 if (align <= 0)
4682 {
4683 as_warn (_("ignoring bad alignment"));
4684 align = 3;
4685 }
4686 }
4687 }
4688
4689 *p = 0;
4690 symbolP = symbol_find_or_make (name);
4691
4692 *p = c;
4693 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4694 {
4695 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4696 S_GET_NAME (symbolP));
4697 ignore_rest_of_line ();
4698 return;
4699 }
4700
4701 if (S_GET_VALUE (symbolP))
4702 {
4703 if (S_GET_VALUE (symbolP) != (valueT) temp)
4704 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4705 S_GET_NAME (symbolP),
4706 (long) S_GET_VALUE (symbolP),
4707 (long) temp);
4708 }
4709 else
4710 {
4711 S_SET_VALUE (symbolP, (valueT) temp);
4712 S_SET_EXTERNAL (symbolP);
86ebace2 4713 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4714 }
4715
4716 demand_empty_rest_of_line ();
4717}
4718
4719/*
4720 * implement the .section pseudo op:
4721 * .section name {, "flags"}
4722 * ^ ^
4723 * | +--- optional flags: 'b' for bss
4724 * | 'i' for info
4725 * +-- section name 'l' for lib
4726 * 'n' for noload
4727 * 'o' for over
4728 * 'w' for data
4729 * 'd' (apparently m88k for data)
4730 * 'x' for text
4731 * But if the argument is not a quoted string, treat it as a
4732 * subsegment number.
4733 *
4734 * FIXME: this is a copy of the section processing from obj-coff.c, with
4735 * additions/changes for the moto-pas assembler support. There are three
4736 * categories:
4737 *
81d4177b 4738 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4739 * setting bits that bfd probably neither understands or uses. The
4740 * correct approach (?) will have to incorporate extra fields attached
4741 * to the section to hold the system specific stuff. (krk)
4742 *
4743 * Section Contents:
4744 * 'a' - unknown - referred to in documentation, but no definition supplied
4745 * 'c' - section has code
4746 * 'd' - section has initialized data
4747 * 'u' - section has uninitialized data
4748 * 'i' - section contains directives (info)
4749 * 'n' - section can be discarded
4750 * 'R' - remove section at link time
4751 *
4752 * Section Protection:
4753 * 'r' - section is readable
4754 * 'w' - section is writeable
4755 * 'x' - section is executable
4756 * 's' - section is sharable
4757 *
4758 * Section Alignment:
4759 * '0' - align to byte boundary
4760 * '1' - align to halfword undary
4761 * '2' - align to word boundary
4762 * '3' - align to doubleword boundary
4763 * '4' - align to quadword boundary
4764 * '5' - align to 32 byte boundary
4765 * '6' - align to 64 byte boundary
4766 *
4767 */
4768
4769void
98027b10 4770ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4771{
99a814a1 4772 /* Strip out the section name. */
252b5132
RH		 4773 char *section_name;
4774 char c;
4775 char *name;
4776 unsigned int exp;
4777 flagword flags;
4778 segT sec;
4779 int align;
4780
4781 section_name = input_line_pointer;
4782 c = get_symbol_end ();
4783
4784 name = xmalloc (input_line_pointer - section_name + 1);
4785 strcpy (name, section_name);
4786
4787 *input_line_pointer = c;
4788
4789 SKIP_WHITESPACE ();
4790
4791 exp = 0;
4792 flags = SEC_NO_FLAGS;
4793
4794 if (strcmp (name, ".idata$2") == 0)
4795 {
4796 align = 0;
4797 }
4798 else if (strcmp (name, ".idata$3") == 0)
4799 {
4800 align = 0;
4801 }
4802 else if (strcmp (name, ".idata$4") == 0)
4803 {
4804 align = 2;
4805 }
4806 else if (strcmp (name, ".idata$5") == 0)
4807 {
4808 align = 2;
4809 }
4810 else if (strcmp (name, ".idata$6") == 0)
4811 {
4812 align = 1;
4813 }
4814 else
99a814a1
AM		 4815 /* Default alignment to 16 byte boundary. */
4816 align = 4;
252b5132
RH		 4817
4818 if (*input_line_pointer == ',')
4819 {
4820 ++input_line_pointer;
4821 SKIP_WHITESPACE ();
4822 if (*input_line_pointer != '"')
4823 exp = get_absolute_expression ();
4824 else
4825 {
4826 ++input_line_pointer;
4827 while (*input_line_pointer != '"'
4828 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4829 {
4830 switch (*input_line_pointer)
4831 {
4832 /* Section Contents */
4833 case 'a': /* unknown */
4834 as_bad (_("Unsupported section attribute -- 'a'"));
4835 break;
4836 case 'c': /* code section */
81d4177b 4837 flags |= SEC_CODE;
252b5132
RH		 4838 break;
4839 case 'd': /* section has initialized data */
4840 flags |= SEC_DATA;
4841 break;
4842 case 'u': /* section has uninitialized data */
4843 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4844 in winnt.h */
4845 flags |= SEC_ROM;
4846 break;
4847 case 'i': /* section contains directives (info) */
4848 /* FIXME: This is IMAGE_SCN_LNK_INFO
4849 in winnt.h */
4850 flags |= SEC_HAS_CONTENTS;
4851 break;
4852 case 'n': /* section can be discarded */
81d4177b 4853 flags &=~ SEC_LOAD;
252b5132
RH		 4854 break;
4855 case 'R': /* Remove section at link time */
4856 flags |= SEC_NEVER_LOAD;
4857 break;
8d452c78 4858#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4859 /* Section Protection */
4860 case 'r': /* section is readable */
4861 flags |= IMAGE_SCN_MEM_READ;
4862 break;
4863 case 'w': /* section is writeable */
4864 flags |= IMAGE_SCN_MEM_WRITE;
4865 break;
4866 case 'x': /* section is executable */
4867 flags |= IMAGE_SCN_MEM_EXECUTE;
4868 break;
4869 case 's': /* section is sharable */
4870 flags |= IMAGE_SCN_MEM_SHARED;
4871 break;
4872
4873 /* Section Alignment */
4874 case '0': /* align to byte boundary */
4875 flags |= IMAGE_SCN_ALIGN_1BYTES;
4876 align = 0;
4877 break;
4878 case '1': /* align to halfword boundary */
4879 flags |= IMAGE_SCN_ALIGN_2BYTES;
4880 align = 1;
4881 break;
4882 case '2': /* align to word boundary */
4883 flags |= IMAGE_SCN_ALIGN_4BYTES;
4884 align = 2;
4885 break;
4886 case '3': /* align to doubleword boundary */
4887 flags |= IMAGE_SCN_ALIGN_8BYTES;
4888 align = 3;
4889 break;
4890 case '4': /* align to quadword boundary */
4891 flags |= IMAGE_SCN_ALIGN_16BYTES;
4892 align = 4;
4893 break;
4894 case '5': /* align to 32 byte boundary */
4895 flags |= IMAGE_SCN_ALIGN_32BYTES;
4896 align = 5;
4897 break;
4898 case '6': /* align to 64 byte boundary */
4899 flags |= IMAGE_SCN_ALIGN_64BYTES;
4900 align = 6;
4901 break;
8d452c78 4902#endif
252b5132 4903 default:
99a814a1
AM		 4904 as_bad (_("unknown section attribute '%c'"),
4905 *input_line_pointer);
252b5132
RH		 4906 break;
4907 }
4908 ++input_line_pointer;
4909 }
4910 if (*input_line_pointer == '"')
4911 ++input_line_pointer;
4912 }
4913 }
4914
4915 sec = subseg_new (name, (subsegT) exp);
4916
99a814a1 4917 ppc_set_current_section (sec);
252b5132
RH		 4918
4919 if (flags != SEC_NO_FLAGS)
4920 {
4921 if (! bfd_set_section_flags (stdoutput, sec, flags))
4922 as_bad (_("error setting flags for \"%s\": %s"),
4923 bfd_section_name (stdoutput, sec),
4924 bfd_errmsg (bfd_get_error ()));
4925 }
4926
99a814a1 4927 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4928}
4929
4930static void
98027b10 4931ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4932{
4933 char *name;
4934 char endc;
4935 symbolS *ext_sym;
4936
4937 name = input_line_pointer;
4938 endc = get_symbol_end ();
4939
4940 ext_sym = symbol_find_or_make (name);
4941
4942 *input_line_pointer = endc;
4943
4944 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4945 SF_SET_FUNCTION (ext_sym);
4946 SF_SET_PROCESS (ext_sym);
4947 coff_add_linesym (ext_sym);
4948
4949 demand_empty_rest_of_line ();
4950}
4951
4952static void
98027b10 4953ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4954{
4955 if (tocdata_section == 0)
4956 {
4957 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4958 /* FIXME: section flags won't work. */
252b5132
RH		 4959 bfd_set_section_flags (stdoutput, tocdata_section,
4960 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4961 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4962
4963 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4964 }
4965 else
4966 {
4967 rdata_section = subseg_new (".tocd", 0);
4968 }
4969
99a814a1 4970 ppc_set_current_section (tocdata_section);
252b5132
RH		 4971
4972 demand_empty_rest_of_line ();
4973}
4974
4975/* Don't adjust TOC relocs to use the section symbol. */
4976
4977int
98027b10 4978ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4979{
4980 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4981}
4982
4983#endif
4984\f
4985#ifdef OBJ_XCOFF
4986
4987/* XCOFF specific symbol and file handling. */
4988
4989/* Canonicalize the symbol name. We use the to force the suffix, if
4990 any, to use square brackets, and to be in upper case. */
4991
4992char *
98027b10 4993ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4994{
4995 char *s;
4996
4997 if (ppc_stab_symbol)
4998 return name;
4999
5000 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5001 ;
5002 if (*s != '\0')
5003 {
5004 char brac;
5005
5006 if (*s == '[')
5007 brac = ']';
5008 else
5009 {
5010 *s = '[';
5011 brac = '}';
5012 }
5013
5014 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5015 *s = TOUPPER (*s);
252b5132
RH		 5016
5017 if (*s == '\0' || s[1] != '\0')
5018 as_bad (_("bad symbol suffix"));
5019
5020 *s = ']';
5021 }
5022
5023 return name;
5024}
5025
5026/* Set the class of a symbol based on the suffix, if any. This is
5027 called whenever a new symbol is created. */
5028
5029void
98027b10 5030ppc_symbol_new_hook (symbolS *sym)
252b5132 5031{
809ffe0d 5032 struct ppc_tc_sy *tc;
252b5132
RH		 5033 const char *s;
5034
809ffe0d
ILT		 5035 tc = symbol_get_tc (sym);
5036 tc->next = NULL;
5037 tc->output = 0;
96d56e9f 5038 tc->symbol_class = -1;
809ffe0d
ILT		 5039 tc->real_name = NULL;
5040 tc->subseg = 0;
5041 tc->align = 0;
5042 tc->size = NULL;
5043 tc->within = NULL;
252b5132
RH		 5044
5045 if (ppc_stab_symbol)
5046 return;
5047
5048 s = strchr (S_GET_NAME (sym), '[');
5049 if (s == (const char *) NULL)
5050 {
5051 /* There is no suffix. */
5052 return;
5053 }
5054
5055 ++s;
5056
5057 switch (s[0])
5058 {
5059 case 'B':
5060 if (strcmp (s, "BS]") == 0)
96d56e9f 5061 tc->symbol_class = XMC_BS;
252b5132
RH		 5062 break;
5063 case 'D':
5064 if (strcmp (s, "DB]") == 0)
96d56e9f 5065 tc->symbol_class = XMC_DB;
252b5132 5066 else if (strcmp (s, "DS]") == 0)
96d56e9f 5067 tc->symbol_class = XMC_DS;
252b5132
RH		 5068 break;
5069 case 'G':
5070 if (strcmp (s, "GL]") == 0)
96d56e9f 5071 tc->symbol_class = XMC_GL;
252b5132
RH		 5072 break;
5073 case 'P':
5074 if (strcmp (s, "PR]") == 0)
96d56e9f 5075 tc->symbol_class = XMC_PR;
252b5132
RH		 5076 break;
5077 case 'R':
5078 if (strcmp (s, "RO]") == 0)
96d56e9f 5079 tc->symbol_class = XMC_RO;
252b5132 5080 else if (strcmp (s, "RW]") == 0)
96d56e9f 5081 tc->symbol_class = XMC_RW;
252b5132
RH		 5082 break;
5083 case 'S':
5084 if (strcmp (s, "SV]") == 0)
96d56e9f 5085 tc->symbol_class = XMC_SV;
252b5132
RH		 5086 break;
5087 case 'T':
5088 if (strcmp (s, "TC]") == 0)
96d56e9f 5089 tc->symbol_class = XMC_TC;
252b5132 5090 else if (strcmp (s, "TI]") == 0)
96d56e9f 5091 tc->symbol_class = XMC_TI;
252b5132 5092 else if (strcmp (s, "TB]") == 0)
96d56e9f 5093 tc->symbol_class = XMC_TB;
252b5132 5094 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5095 tc->symbol_class = XMC_TC0;
252b5132
RH		 5096 break;
5097 case 'U':
5098 if (strcmp (s, "UA]") == 0)
96d56e9f 5099 tc->symbol_class = XMC_UA;
252b5132 5100 else if (strcmp (s, "UC]") == 0)
96d56e9f 5101 tc->symbol_class = XMC_UC;
252b5132
RH		 5102 break;
5103 case 'X':
5104 if (strcmp (s, "XO]") == 0)
96d56e9f 5105 tc->symbol_class = XMC_XO;
252b5132
RH		 5106 break;
5107 }
5108
96d56e9f 5109 if (tc->symbol_class == -1)
252b5132
RH		 5110 as_bad (_("Unrecognized symbol suffix"));
5111}
5112
5113/* Set the class of a label based on where it is defined. This
5114 handles symbols without suffixes. Also, move the symbol so that it
5115 follows the csect symbol. */
5116
5117void
98027b10 5118ppc_frob_label (symbolS *sym)
252b5132
RH		 5119{
5120 if (ppc_current_csect != (symbolS *) NULL)
5121 {
96d56e9f
NC		 5122 if (symbol_get_tc (sym)->symbol_class == -1)
5123 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5124
5125 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5126 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5127 &symbol_rootP, &symbol_lastP);
5128 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5129 }
07a53e5c
RH		 5130
5131#ifdef OBJ_ELF
5132 dwarf2_emit_label (sym);
5133#endif
252b5132
RH		 5134}
5135
5136/* This variable is set by ppc_frob_symbol if any absolute symbols are
5137 seen. It tells ppc_adjust_symtab whether it needs to look through
5138 the symbols. */
5139
b34976b6 5140static bfd_boolean ppc_saw_abs;
252b5132
RH		 5141
5142/* Change the name of a symbol just before writing it out. Set the
5143 real name if the .rename pseudo-op was used. Otherwise, remove any
5144 class suffix. Return 1 if the symbol should not be included in the
5145 symbol table. */
5146
5147int
98027b10 5148ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5149{
5150 static symbolS *ppc_last_function;
5151 static symbolS *set_end;
5152
5153 /* Discard symbols that should not be included in the output symbol
5154 table. */
809ffe0d
ILT		 5155 if (! symbol_used_in_reloc_p (sym)
5156 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5157 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5158 && ! symbol_get_tc (sym)->output
252b5132
RH		 5159 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5160 return 1;
5161
a161fe53
AM		 5162 /* This one will disappear anyway. Don't make a csect sym for it. */
5163 if (sym == abs_section_sym)
5164 return 1;
5165
809ffe0d
ILT		 5166 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5167 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5168 else
5169 {
5170 const char *name;
5171 const char *s;
5172
5173 name = S_GET_NAME (sym);
5174 s = strchr (name, '[');
5175 if (s != (char *) NULL)
5176 {
5177 unsigned int len;
5178 char *snew;
5179
5180 len = s - name;
5181 snew = xmalloc (len + 1);
5182 memcpy (snew, name, len);
5183 snew[len] = '\0';
5184
5185 S_SET_NAME (sym, snew);
5186 }
5187 }
5188
5189 if (set_end != (symbolS *) NULL)
5190 {
5191 SA_SET_SYM_ENDNDX (set_end, sym);
5192 set_end = NULL;
5193 }
5194
5195 if (SF_GET_FUNCTION (sym))
5196 {
5197 if (ppc_last_function != (symbolS *) NULL)
5198 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5199 ppc_last_function = sym;
809ffe0d 5200 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5201 {
6386f3a7 5202 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5203 SA_SET_SYM_FSIZE (sym,
5204 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5205 }
5206 }
5207 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5208 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5209 {
5210 if (ppc_last_function == (symbolS *) NULL)
5211 as_bad (_(".ef with no preceding .function"));
5212 else
5213 {
5214 set_end = ppc_last_function;
5215 ppc_last_function = NULL;
5216
5217 /* We don't have a C_EFCN symbol, but we need to force the
5218 COFF backend to believe that it has seen one. */
5219 coff_last_function = NULL;
5220 }
5221 }
5222
670ec21d 5223 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5224 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5225 && S_GET_STORAGE_CLASS (sym) != C_FILE
5226 && S_GET_STORAGE_CLASS (sym) != C_FCN
5227 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5228 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5229 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5230 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5231 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5232 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5233 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5234
5235 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5236 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5237 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5238 {
5239 int i;
5240 union internal_auxent *a;
5241
5242 /* Create a csect aux. */
5243 i = S_GET_NUMBER_AUXILIARY (sym);
5244 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5245 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5246 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5247 {
5248 /* This is the TOC table. */
5249 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5250 a->x_csect.x_scnlen.l = 0;
5251 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5252 }
809ffe0d 5253 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5254 {
5255 /* This is a csect symbol. x_scnlen is the size of the
5256 csect. */
809ffe0d 5257 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5258 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5259 S_GET_SEGMENT (sym))
5260 - S_GET_VALUE (sym));
5261 else
5262 {
6386f3a7 5263 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5264 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5265 - S_GET_VALUE (sym));
5266 }
809ffe0d 5267 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5268 }
5269 else if (S_GET_SEGMENT (sym) == bss_section)
5270 {
5271 /* This is a common symbol. */
809ffe0d
ILT		 5272 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5273 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5274 if (S_IS_EXTERNAL (sym))
96d56e9f 5275 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5276 else
96d56e9f 5277 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5278 }
5279 else if (S_GET_SEGMENT (sym) == absolute_section)
5280 {
5281 /* This is an absolute symbol. The csect will be created by
99a814a1 5282 ppc_adjust_symtab. */
b34976b6 5283 ppc_saw_abs = TRUE;
252b5132 5284 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5285 if (symbol_get_tc (sym)->symbol_class == -1)
5286 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5287 }
5288 else if (! S_IS_DEFINED (sym))
5289 {
5290 /* This is an external symbol. */
5291 a->x_csect.x_scnlen.l = 0;
5292 a->x_csect.x_smtyp = XTY_ER;
5293 }
96d56e9f 5294 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5295 {
5296 symbolS *next;
5297
5298 /* This is a TOC definition. x_scnlen is the size of the
5299 TOC entry. */
5300 next = symbol_next (sym);
96d56e9f 5301 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5302 next = symbol_next (next);
5303 if (next == (symbolS *) NULL
96d56e9f 5304 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5305 {
5306 if (ppc_after_toc_frag == (fragS *) NULL)
5307 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5308 data_section)
5309 - S_GET_VALUE (sym));
5310 else
5311 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5312 - S_GET_VALUE (sym));
5313 }
5314 else
5315 {
6386f3a7 5316 resolve_symbol_value (next);
252b5132
RH		 5317 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5318 - S_GET_VALUE (sym));
5319 }
5320 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5321 }
5322 else
5323 {
5324 symbolS *csect;
5325
5326 /* This is a normal symbol definition. x_scnlen is the
5327 symbol index of the containing csect. */
5328 if (S_GET_SEGMENT (sym) == text_section)
5329 csect = ppc_text_csects;
5330 else if (S_GET_SEGMENT (sym) == data_section)
5331 csect = ppc_data_csects;
5332 else
5333 abort ();
5334
5335 /* Skip the initial dummy symbol. */
809ffe0d 5336 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5337
5338 if (csect == (symbolS *) NULL)
5339 {
5340 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5341 a->x_csect.x_scnlen.l = 0;
5342 }
5343 else
5344 {
809ffe0d 5345 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5346 {
6386f3a7 5347 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5348 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5349 > S_GET_VALUE (sym))
252b5132 5350 break;
809ffe0d 5351 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5352 }
5353
809ffe0d
ILT		 5354 a->x_csect.x_scnlen.p =
5355 coffsymbol (symbol_get_bfdsym (csect))->native;
5356 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5357 1;
252b5132
RH		 5358 }
5359 a->x_csect.x_smtyp = XTY_LD;
5360 }
81d4177b 5361
252b5132
RH		 5362 a->x_csect.x_parmhash = 0;
5363 a->x_csect.x_snhash = 0;
96d56e9f 5364 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5365 a->x_csect.x_smclas = XMC_PR;
5366 else
96d56e9f 5367 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5368 a->x_csect.x_stab = 0;
5369 a->x_csect.x_snstab = 0;
5370
5371 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5372 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5373 }
5374 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5375 {
5376 /* We want the value to be the symbol index of the referenced
5377 csect symbol. BFD will do that for us if we set the right
5378 flags. */
b782de16
AM		 5379 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5380 combined_entry_type *c = coffsymbol (bsym)->native;
5381
5382 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5383 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5384 }
5385 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5386 {
5387 symbolS *block;
5388 symbolS *csect;
5389
5390 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5391 block = symbol_get_tc (sym)->within;
5392 csect = symbol_get_tc (block)->within;
6386f3a7 5393 resolve_symbol_value (csect);
252b5132
RH		 5394 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5395 }
5396 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5397 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5398 {
5399 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5400 BFD will do that for us if we set the right flags. We have
5401 already set the value correctly. */
809ffe0d 5402 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5403 }
5404
5405 return 0;
5406}
5407
5408/* Adjust the symbol table. This creates csect symbols for all
5409 absolute symbols. */
5410
5411void
98027b10 5412ppc_adjust_symtab (void)
252b5132
RH		 5413{
5414 symbolS *sym;
5415
5416 if (! ppc_saw_abs)
5417 return;
5418
5419 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5420 {
5421 symbolS *csect;
5422 int i;
5423 union internal_auxent *a;
5424
5425 if (S_GET_SEGMENT (sym) != absolute_section)
5426 continue;
5427
5428 csect = symbol_create (".abs[XO]", absolute_section,
5429 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5430 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5431 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5432 i = S_GET_NUMBER_AUXILIARY (csect);
5433 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5434 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5435 a->x_csect.x_scnlen.l = 0;
5436 a->x_csect.x_smtyp = XTY_SD;
5437 a->x_csect.x_parmhash = 0;
5438 a->x_csect.x_snhash = 0;
5439 a->x_csect.x_smclas = XMC_XO;
5440 a->x_csect.x_stab = 0;
5441 a->x_csect.x_snstab = 0;
5442
5443 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5444
5445 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5446 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5447 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5448 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5449 }
5450
b34976b6 5451 ppc_saw_abs = FALSE;
252b5132
RH		 5452}
5453
5454/* Set the VMA for a section. This is called on all the sections in
5455 turn. */
5456
5457void
98027b10 5458ppc_frob_section (asection *sec)
252b5132 5459{
931e13a6 5460 static bfd_vma vma = 0;
252b5132 5461
931e13a6 5462 vma = md_section_align (sec, vma);
252b5132
RH		 5463 bfd_set_section_vma (stdoutput, sec, vma);
5464 vma += bfd_section_size (stdoutput, sec);
5465}
5466
5467#endif /* OBJ_XCOFF */
5468\f
252b5132 5469char *
98027b10 5470md_atof (int type, char *litp, int *sizep)
252b5132 5471{
499ac353 5472 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5473}
5474
5475/* Write a value out to the object file, using the appropriate
5476 endianness. */
5477
5478void
98027b10 5479md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5480{
5481 if (target_big_endian)
5482 number_to_chars_bigendian (buf, val, n);
5483 else
5484 number_to_chars_littleendian (buf, val, n);
5485}
5486
5487/* Align a section (I don't know why this is machine dependent). */
5488
5489valueT
3aeeedbb 5490md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5491{
3aeeedbb
AM		 5492#ifdef OBJ_ELF
5493 return addr;
5494#else
252b5132
RH		 5495 int align = bfd_get_section_alignment (stdoutput, seg);
5496
5497 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5498#endif
252b5132
RH		 5499}
5500
5501/* We don't have any form of relaxing. */
5502
5503int
98027b10
AM		 5504md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5505 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5506{
5507 abort ();
5508 return 0;
5509}
5510
5511/* Convert a machine dependent frag. We never generate these. */
5512
5513void
98027b10
AM		 5514md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5515 asection *sec ATTRIBUTE_UNUSED,
5516 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5517{
5518 abort ();
5519}
5520
5521/* We have no need to default values of symbols. */
5522
252b5132 5523symbolS *
98027b10 5524md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5525{
5526 return 0;
5527}
5528\f
5529/* Functions concerning relocs. */
5530
5531/* The location from which a PC relative jump should be calculated,
5532 given a PC relative reloc. */
5533
5534long
98027b10 5535md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5536{
5537 return fixp->fx_frag->fr_address + fixp->fx_where;
5538}
5539
5540#ifdef OBJ_XCOFF
5541
5542/* This is called to see whether a fixup should be adjusted to use a
5543 section symbol. We take the opportunity to change a fixup against
5544 a symbol in the TOC subsegment into a reloc against the
5545 corresponding .tc symbol. */
5546
5547int
98027b10 5548ppc_fix_adjustable (fixS *fix)
252b5132 5549{
b782de16
AM		 5550 valueT val = resolve_symbol_value (fix->fx_addsy);
5551 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5552 TC_SYMFIELD_TYPE *tc;
5553
5554 if (symseg == absolute_section)
5555 return 0;
252b5132 5556
252b5132 5557 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5558 && fix->fx_addsy != ppc_toc_csect
b782de16 5559 && symseg == data_section
252b5132
RH		 5560 && val >= ppc_toc_frag->fr_address
5561 && (ppc_after_toc_frag == (fragS *) NULL
5562 || val < ppc_after_toc_frag->fr_address))
5563 {
5564 symbolS *sy;
5565
5566 for (sy = symbol_next (ppc_toc_csect);
5567 sy != (symbolS *) NULL;
5568 sy = symbol_next (sy))
5569 {
b782de16
AM		 5570 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5571
96d56e9f 5572 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5573 continue;
96d56e9f 5574 if (sy_tc->symbol_class != XMC_TC)
252b5132 5575 break;
b782de16 5576 if (val == resolve_symbol_value (sy))
252b5132
RH		 5577 {
5578 fix->fx_addsy = sy;
5579 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5580 return 0;
5581 }
5582 }
5583
5584 as_bad_where (fix->fx_file, fix->fx_line,
5585 _("symbol in .toc does not match any .tc"));
5586 }
5587
5588 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5589 tc = symbol_get_tc (fix->fx_addsy);
5590 if (tc->subseg == 0
96d56e9f
NC		 5591 && tc->symbol_class != XMC_TC0
5592 && tc->symbol_class != XMC_TC
b782de16 5593 && symseg != bss_section
252b5132 5594 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5595 && (symseg != data_section
252b5132
RH		 5596 || ppc_toc_csect == NULL
5597 || val < ppc_toc_frag->fr_address
5598 || (ppc_after_toc_frag != NULL
5599 && val >= ppc_after_toc_frag->fr_address)))
5600 {
5601 symbolS *csect;
b782de16 5602 symbolS *next_csect;
252b5132 5603
b782de16 5604 if (symseg == text_section)
252b5132 5605 csect = ppc_text_csects;
b782de16 5606 else if (symseg == data_section)
252b5132
RH		 5607 csect = ppc_data_csects;
5608 else
5609 abort ();
5610
5611 /* Skip the initial dummy symbol. */
809ffe0d 5612 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5613
5614 if (csect != (symbolS *) NULL)
5615 {
b782de16
AM		 5616 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5617 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5618 {
5619 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5620 have to look through the full symbol table to see
5621 whether this is the csect we want. Note that we will
5622 only get here if the csect has zero length. */
b782de16
AM		 5623 if (symbol_get_frag (csect)->fr_address == val
5624 && S_GET_VALUE (csect) == val)
252b5132
RH		 5625 {
5626 symbolS *scan;
5627
809ffe0d 5628 for (scan = symbol_next (csect);
252b5132 5629 scan != NULL;
809ffe0d 5630 scan = symbol_next (scan))
252b5132 5631 {
809ffe0d 5632 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5633 break;
5634 if (scan == fix->fx_addsy)
5635 break;
5636 }
5637
5638 /* If we found the symbol before the next csect
99a814a1 5639 symbol, then this is the csect we want. */
252b5132
RH		 5640 if (scan == fix->fx_addsy)
5641 break;
5642 }
5643
b782de16 5644 csect = next_csect;
252b5132
RH		 5645 }
5646
b782de16 5647 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5648 fix->fx_addsy = csect;
5649 }
b782de16 5650 return 0;
252b5132
RH		 5651 }
5652
5653 /* Adjust a reloc against a .lcomm symbol to be against the base
5654 .lcomm. */
b782de16 5655 if (symseg == bss_section
252b5132
RH		 5656 && ! S_IS_EXTERNAL (fix->fx_addsy))
5657 {
b782de16
AM		 5658 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5659
5660 fix->fx_offset += val - resolve_symbol_value (sy);
5661 fix->fx_addsy = sy;
252b5132
RH		 5662 }
5663
5664 return 0;
5665}
5666
5667/* A reloc from one csect to another must be kept. The assembler
5668 will, of course, keep relocs between sections, and it will keep
5669 absolute relocs, but we need to force it to keep PC relative relocs
5670 between two csects in the same section. */
5671
5672int
98027b10 5673ppc_force_relocation (fixS *fix)
252b5132
RH		 5674{
5675 /* At this point fix->fx_addsy should already have been converted to
5676 a csect symbol. If the csect does not include the fragment, then
5677 we need to force the relocation. */
5678 if (fix->fx_pcrel
5679 && fix->fx_addsy != NULL
809ffe0d
ILT		 5680 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5681 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5682 > fix->fx_frag->fr_address)
5683 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5684 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5685 <= fix->fx_frag->fr_address))))
5686 return 1;
5687
ae6063d4 5688 return generic_force_reloc (fix);
252b5132
RH		 5689}
5690
5691#endif /* OBJ_XCOFF */
5692
0baf16f2 5693#ifdef OBJ_ELF
a161fe53
AM		 5694/* If this function returns non-zero, it guarantees that a relocation
5695 will be emitted for a fixup. */
5696
5697int
98027b10 5698ppc_force_relocation (fixS *fix)
a161fe53
AM		 5699{
5700 /* Branch prediction relocations must force a relocation, as must
5701 the vtable description relocs. */
5702 switch (fix->fx_r_type)
5703 {
5704 case BFD_RELOC_PPC_B16_BRTAKEN:
5705 case BFD_RELOC_PPC_B16_BRNTAKEN:
5706 case BFD_RELOC_PPC_BA16_BRTAKEN:
5707 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5708 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5709 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5710 return 1;
5711 default:
5712 break;
5713 }
5714
cdba85ec
AM		 5715 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5716 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5717 return 1;
5718
ae6063d4 5719 return generic_force_reloc (fix);
a161fe53
AM		 5720}
5721
0baf16f2 5722int
98027b10 5723ppc_fix_adjustable (fixS *fix)
252b5132 5724{
0baf16f2
AM		 5725 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5726 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5727 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5728 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5729 && fix->fx_r_type != BFD_RELOC_GPREL16
5730 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5731 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5732 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5733 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5734}
0baf16f2 5735#endif
252b5132 5736
3aeeedbb
AM		 5737/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5738 rs_align_code frag. */
5739
5740void
5741ppc_handle_align (struct frag *fragP)
5742{
5743 valueT count = (fragP->fr_next->fr_address
5744 - (fragP->fr_address + fragP->fr_fix));
5745
5746 if (count != 0 && (count & 3) == 0)
5747 {
5748 char *dest = fragP->fr_literal + fragP->fr_fix;
5749
5750 fragP->fr_var = 4;
5751 md_number_to_chars (dest, 0x60000000, 4);
5752
42240548
PB		 5753 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5754 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5755 {
42240548
PB		 5756 /* For power6 and power7, we want the last nop to be a group
5757 terminating one. Do this by inserting an rs_fill frag immediately
5758 after this one, with its address set to the last nop location.
5759 This will automatically reduce the number of nops in the current
5760 frag by one. */
3aeeedbb
AM		 5761 if (count > 4)
5762 {
5763 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5764
5765 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5766 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5767 group_nop->fr_fix = 0;
5768 group_nop->fr_offset = 1;
5769 group_nop->fr_type = rs_fill;
5770 fragP->fr_next = group_nop;
5771 dest = group_nop->fr_literal;
5772 }
5773
42240548
PB		 5774 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5775 /* power7 group terminating nop: "ori 2,2,0". */
5776 md_number_to_chars (dest, 0x60420000, 4);
5777 else
5778 /* power6 group terminating nop: "ori 1,1,0". */
5779 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5780 }
5781 }
5782}
5783
252b5132
RH		 5784/* Apply a fixup to the object code. This is called for all the
5785 fixups we generated by the call to fix_new_exp, above. In the call
5786 above we used a reloc code which was the largest legal reloc code
5787 plus the operand index. Here we undo that to recover the operand
5788 index. At this point all symbol values should be fully resolved,
5789 and we attempt to completely resolve the reloc. If we can not do
5790 that, we determine the correct reloc code and put it back in the
5791 fixup. */
5792
94f592af 5793void
98027b10 5794md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5795{
94f592af 5796 valueT value = * valP;
252b5132
RH		 5797
5798#ifdef OBJ_ELF
94f592af 5799 if (fixP->fx_addsy != NULL)
252b5132 5800 {
a161fe53 5801 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5802 if (fixP->fx_pcrel)
5803 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5804 }
5805 else
94f592af 5806 fixP->fx_done = 1;
252b5132 5807#else
a161fe53 5808 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5809 the symbol values. If we are doing this relocation the code in
5810 write.c is going to call bfd_install_relocation, which is also
5811 going to use the symbol value. That means that if the reloc is
5812 fully resolved we want to use *valP since bfd_install_relocation is
5813 not being used.
9f0eb232
RS		 5814 However, if the reloc is not fully resolved we do not want to
5815 use *valP, and must use fx_offset instead. If the relocation
5816 is PC-relative, we then need to re-apply md_pcrel_from_section
5817 to this new relocation value. */
94f592af
NC		 5818 if (fixP->fx_addsy == (symbolS *) NULL)
5819 fixP->fx_done = 1;
5820
252b5132 5821 else
9f0eb232
RS		 5822 {
5823 value = fixP->fx_offset;
5824 if (fixP->fx_pcrel)
5825 value -= md_pcrel_from_section (fixP, seg);
5826 }
a161fe53
AM		 5827#endif
5828
5829 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5830 {
a161fe53
AM		 5831 /* We can't actually support subtracting a symbol. */
5832 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5833 }
252b5132 5834
94f592af 5835 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5836 {
5837 int opindex;
5838 const struct powerpc_operand *operand;
5839 char *where;
5840 unsigned long insn;
5841
94f592af 5842 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5843
5844 operand = &powerpc_operands[opindex];
5845
5846#ifdef OBJ_XCOFF
0baf16f2
AM		 5847 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5848 does not generate a reloc. It uses the offset of `sym' within its
5849 csect. Other usages, such as `.long sym', generate relocs. This
5850 is the documented behaviour of non-TOC symbols. */
252b5132 5851 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5852 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5853 && operand->shift == 0
2b3c4602 5854 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5855 && fixP->fx_addsy != NULL
5856 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5857 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5858 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5859 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5860 {
94f592af
NC		 5861 value = fixP->fx_offset;
5862 fixP->fx_done = 1;
252b5132
RH		 5863 }
5864#endif
5865
5866 /* Fetch the instruction, insert the fully resolved operand
5867 value, and stuff the instruction back again. */
94f592af 5868 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5869 if (target_big_endian)
5870 insn = bfd_getb32 ((unsigned char *) where);
5871 else
5872 insn = bfd_getl32 ((unsigned char *) where);
5873 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5874 fixP->tc_fix_data.ppc_cpu,
94f592af 5875 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5876 if (target_big_endian)
5877 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5878 else
5879 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5880
94f592af
NC		 5881 if (fixP->fx_done)
5882 /* Nothing else to do here. */
5883 return;
252b5132 5884
9c2799c2 5885 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5886
252b5132
RH		 5887 /* Determine a BFD reloc value based on the operand information.
5888 We are only prepared to turn a few of the operands into
0baf16f2 5889 relocs. */
11b37b7b 5890 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5891 && operand->bitm == 0x3fffffc
11b37b7b 5892 && operand->shift == 0)
94f592af 5893 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5894 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5895 && operand->bitm == 0xfffc
11b37b7b 5896 && operand->shift == 0)
95210096
AM		 5897 {
5898 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5899#ifdef OBJ_XCOFF
5900 fixP->fx_size = 2;
5901 if (target_big_endian)
5902 fixP->fx_where += 2;
5903#endif
5904 }
11b37b7b 5905 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5906 && operand->bitm == 0x3fffffc
11b37b7b 5907 && operand->shift == 0)
94f592af 5908 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5909 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5910 && operand->bitm == 0xfffc
11b37b7b 5911 && operand->shift == 0)
95210096
AM		 5912 {
5913 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5914#ifdef OBJ_XCOFF
5915 fixP->fx_size = 2;
5916 if (target_big_endian)
5917 fixP->fx_where += 2;
5918#endif
5919 }
0baf16f2 5920#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5921 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5922 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5923 && operand->shift == 0)
11b37b7b 5924 {
a7fc733f
AM		 5925 if (ppc_is_toc_sym (fixP->fx_addsy))
5926 {
5927 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5928#ifdef OBJ_ELF
a7fc733f
AM		 5929 if (ppc_obj64
5930 && (operand->flags & PPC_OPERAND_DS) != 0)
5931 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5932#endif
5933 }
5934 else
5935 {
5936 fixP->fx_r_type = BFD_RELOC_16;
5937#ifdef OBJ_ELF
5938 if (ppc_obj64
5939 && (operand->flags & PPC_OPERAND_DS) != 0)
5940 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5941#endif
a7fc733f 5942 }
94f592af 5943 fixP->fx_size = 2;
11b37b7b 5944 if (target_big_endian)
94f592af 5945 fixP->fx_where += 2;
11b37b7b 5946 }
0baf16f2 5947#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5948 else
252b5132
RH		 5949 {
5950 char *sfile;
5951 unsigned int sline;
5952
5953 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5954 symbol. */
94f592af
NC		 5955 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5956 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5957 _("unresolved expression that must be resolved"));
5958 else
94f592af 5959 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5960 _("unsupported relocation against %s"),
94f592af
NC		 5961 S_GET_NAME (fixP->fx_addsy));
5962 fixP->fx_done = 1;
5963 return;
252b5132
RH		 5964 }
5965 }
5966 else
5967 {
5968#ifdef OBJ_ELF
94f592af 5969 ppc_elf_validate_fix (fixP, seg);
252b5132 5970#endif
94f592af 5971 switch (fixP->fx_r_type)
252b5132 5972 {
252b5132 5973 case BFD_RELOC_CTOR:
2b3c4602 5974 if (ppc_obj64)
9c7977b3
AM		 5975 goto ctor64;
5976 /* fall through */
5977
0baf16f2 5978 case BFD_RELOC_32:
94f592af
NC		 5979 if (fixP->fx_pcrel)
5980 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5981 /* fall through */
252b5132
RH		 5982
5983 case BFD_RELOC_RVA:
5984 case BFD_RELOC_32_PCREL:
252b5132 5985 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5986 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5987 value, 4);
5988 break;
5989
7f6d05e8 5990 case BFD_RELOC_64:
9c7977b3 5991 ctor64:
94f592af
NC		 5992 if (fixP->fx_pcrel)
5993 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5994 /* fall through */
0baf16f2 5995
7f6d05e8 5996 case BFD_RELOC_64_PCREL:
94f592af 5997 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5998 value, 8);
81d4177b 5999 break;
0baf16f2 6000
252b5132
RH		 6001 case BFD_RELOC_GPREL16:
6002 case BFD_RELOC_16_GOT_PCREL:
6003 case BFD_RELOC_16_GOTOFF:
6004 case BFD_RELOC_LO16_GOTOFF:
6005 case BFD_RELOC_HI16_GOTOFF:
6006 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6007 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6008 case BFD_RELOC_LO16_BASEREL:
6009 case BFD_RELOC_HI16_BASEREL:
6010 case BFD_RELOC_HI16_S_BASEREL:
6011 case BFD_RELOC_PPC_EMB_NADDR16:
6012 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6013 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6014 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6015 case BFD_RELOC_PPC_EMB_SDAI16:
6016 case BFD_RELOC_PPC_EMB_SDA2REL:
6017 case BFD_RELOC_PPC_EMB_SDA2I16:
6018 case BFD_RELOC_PPC_EMB_RELSEC16:
6019 case BFD_RELOC_PPC_EMB_RELST_LO:
6020 case BFD_RELOC_PPC_EMB_RELST_HI:
6021 case BFD_RELOC_PPC_EMB_RELST_HA:
6022 case BFD_RELOC_PPC_EMB_RELSDA:
6023 case BFD_RELOC_PPC_TOC16:
0baf16f2 6024#ifdef OBJ_ELF
0baf16f2
AM		 6025 case BFD_RELOC_PPC64_TOC16_LO:
6026 case BFD_RELOC_PPC64_TOC16_HI:
6027 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6028#endif
94f592af 6029 if (fixP->fx_pcrel)
252b5132 6030 {
94f592af
NC		 6031 if (fixP->fx_addsy != NULL)
6032 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6033 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6034 bfd_get_reloc_code_name (fixP->fx_r_type),
6035 S_GET_NAME (fixP->fx_addsy));
252b5132 6036 else
94f592af 6037 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6038 _("cannot emit PC relative %s relocation"),
94f592af 6039 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6040 }
6041
94f592af 6042 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6043 value, 2);
6044 break;
6045
3c9d25f4
AM		 6046 case BFD_RELOC_16:
6047 if (fixP->fx_pcrel)
6048 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6049 /* fall through */
6050
6051 case BFD_RELOC_16_PCREL:
6052 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6053 value, 2);
6054 break;
6055
6056 case BFD_RELOC_LO16:
6057 if (fixP->fx_pcrel)
6058 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6059 /* fall through */
6060
6061 case BFD_RELOC_LO16_PCREL:
6062 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6063 value, 2);
6064 break;
6065
252b5132
RH		 6066 /* This case happens when you write, for example,
6067 lis %r3,(L1-L2)@ha
6068 where L1 and L2 are defined later. */
6069 case BFD_RELOC_HI16:
94f592af 6070 if (fixP->fx_pcrel)
3c9d25f4
AM		 6071 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6072 /* fall through */
6073
6074 case BFD_RELOC_HI16_PCREL:
94f592af 6075 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6076 PPC_HI (value), 2);
252b5132 6077 break;
0baf16f2 6078
252b5132 6079 case BFD_RELOC_HI16_S:
94f592af 6080 if (fixP->fx_pcrel)
3c9d25f4
AM		 6081 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6082 /* fall through */
6083
6084 case BFD_RELOC_HI16_S_PCREL:
94f592af 6085 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6086 PPC_HA (value), 2);
6087 break;
6088
c865e45b
RS		 6089#ifdef OBJ_XCOFF
6090 case BFD_RELOC_NONE:
6091 break;
6092#endif
6093
0baf16f2 6094#ifdef OBJ_ELF
0baf16f2 6095 case BFD_RELOC_PPC64_HIGHER:
94f592af 6096 if (fixP->fx_pcrel)
0baf16f2 6097 abort ();
94f592af 6098 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6099 PPC_HIGHER (value), 2);
252b5132
RH		 6100 break;
6101
0baf16f2 6102 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6103 if (fixP->fx_pcrel)
0baf16f2 6104 abort ();
94f592af 6105 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6106 PPC_HIGHERA (value), 2);
6107 break;
6108
6109 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6110 if (fixP->fx_pcrel)
0baf16f2 6111 abort ();
94f592af 6112 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6113 PPC_HIGHEST (value), 2);
6114 break;
6115
6116 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6117 if (fixP->fx_pcrel)
0baf16f2 6118 abort ();
94f592af 6119 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6120 PPC_HIGHESTA (value), 2);
6121 break;
6122
6123 case BFD_RELOC_PPC64_ADDR16_DS:
6124 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6125 case BFD_RELOC_PPC64_GOT16_DS:
6126 case BFD_RELOC_PPC64_GOT16_LO_DS:
6127 case BFD_RELOC_PPC64_PLT16_LO_DS:
6128 case BFD_RELOC_PPC64_SECTOFF_DS:
6129 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6130 case BFD_RELOC_PPC64_TOC16_DS:
6131 case BFD_RELOC_PPC64_TOC16_LO_DS:
6132 case BFD_RELOC_PPC64_PLTGOT16_DS:
6133 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6134 if (fixP->fx_pcrel)
0baf16f2
AM		 6135 abort ();
6136 {
2132e3a3 6137 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6138 unsigned long val, mask;
0baf16f2
AM		 6139
6140 if (target_big_endian)
adadcc0c 6141 val = bfd_getb32 (where - 2);
0baf16f2 6142 else
adadcc0c
AM		 6143 val = bfd_getl32 (where);
6144 mask = 0xfffc;
6145 /* lq insns reserve the four lsbs. */
6146 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6147 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6148 mask = 0xfff0;
6149 val |= value & mask;
0baf16f2
AM		 6150 if (target_big_endian)
6151 bfd_putb16 ((bfd_vma) val, where);
6152 else
6153 bfd_putl16 ((bfd_vma) val, where);
6154 }
6155 break;
cdba85ec 6156
ba0b2174
AM		 6157 case BFD_RELOC_PPC_B16_BRTAKEN:
6158 case BFD_RELOC_PPC_B16_BRNTAKEN:
6159 case BFD_RELOC_PPC_BA16_BRTAKEN:
6160 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6161 break;
6162
cdba85ec 6163 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6164 case BFD_RELOC_PPC_TLSGD:
6165 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6166 break;
6167
cdba85ec
AM		 6168 case BFD_RELOC_PPC_DTPMOD:
6169 case BFD_RELOC_PPC_TPREL16:
6170 case BFD_RELOC_PPC_TPREL16_LO:
6171 case BFD_RELOC_PPC_TPREL16_HI:
6172 case BFD_RELOC_PPC_TPREL16_HA:
6173 case BFD_RELOC_PPC_TPREL:
6174 case BFD_RELOC_PPC_DTPREL16:
6175 case BFD_RELOC_PPC_DTPREL16_LO:
6176 case BFD_RELOC_PPC_DTPREL16_HI:
6177 case BFD_RELOC_PPC_DTPREL16_HA:
6178 case BFD_RELOC_PPC_DTPREL:
6179 case BFD_RELOC_PPC_GOT_TLSGD16:
6180 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6181 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6182 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6183 case BFD_RELOC_PPC_GOT_TLSLD16:
6184 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6185 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6186 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6187 case BFD_RELOC_PPC_GOT_TPREL16:
6188 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6189 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6190 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6191 case BFD_RELOC_PPC_GOT_DTPREL16:
6192 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6193 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6194 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6195 case BFD_RELOC_PPC64_TPREL16_DS:
6196 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6197 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6198 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6199 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6200 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6201 case BFD_RELOC_PPC64_DTPREL16_DS:
6202 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6203 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6204 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6205 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6206 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6207 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6208 break;
0baf16f2 6209#endif
252b5132 6210 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6211 bytes, rather than 2, so offset it here appropriately. */
252b5132 6212 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6213 if (fixP->fx_pcrel)
252b5132
RH		 6214 abort ();
6215
94f592af 6216 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6217 + ((target_big_endian) ? 2 : 0),
6218 value, 2);
6219 break;
6220
6221 case BFD_RELOC_8:
94f592af 6222 if (fixP->fx_pcrel)
31a91399
NC		 6223 {
6224 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6225 ".byte <undefined_symbol> - ." */
31a91399
NC		 6226 if (fixP->fx_addsy)
6227 as_bad (_("Unable to handle reference to symbol %s"),
6228 S_GET_NAME (fixP->fx_addsy));
6229 else
6230 as_bad (_("Unable to resolve expression"));
6231 fixP->fx_done = 1;
6232 }
6233 else
6234 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6235 value, 1);
252b5132
RH		 6236 break;
6237
6238 case BFD_RELOC_24_PLT_PCREL:
6239 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6240 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6241 abort ();
6242
94f592af 6243 if (fixP->fx_done)
99a814a1
AM		 6244 {
6245 char *where;
6246 unsigned long insn;
6247
6248 /* Fetch the instruction, insert the fully resolved operand
6249 value, and stuff the instruction back again. */
94f592af 6250 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6251 if (target_big_endian)
6252 insn = bfd_getb32 ((unsigned char *) where);
6253 else
6254 insn = bfd_getl32 ((unsigned char *) where);
6255 if ((value & 3) != 0)
94f592af 6256 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6257 _("must branch to an address a multiple of 4"));
6258 if ((offsetT) value < -0x40000000
6259 || (offsetT) value >= 0x40000000)
94f592af 6260 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6261 _("@local or @plt branch destination is too far away, %ld bytes"),
6262 (long) value);
6263 insn = insn | (value & 0x03fffffc);
6264 if (target_big_endian)
6265 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6266 else
6267 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6268 }
252b5132
RH		 6269 break;
6270
6271 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6272 fixP->fx_done = 0;
6273 if (fixP->fx_addsy
6274 && !S_IS_DEFINED (fixP->fx_addsy)
6275 && !S_IS_WEAK (fixP->fx_addsy))
6276 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6277 break;
6278
6279 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6280 fixP->fx_done = 0;
252b5132
RH		 6281 break;
6282
0baf16f2 6283#ifdef OBJ_ELF
0baf16f2
AM		 6284 /* Generated by reference to `sym@tocbase'. The sym is
6285 ignored by the linker. */
6286 case BFD_RELOC_PPC64_TOC:
94f592af 6287 fixP->fx_done = 0;
0baf16f2 6288 break;
0baf16f2 6289#endif
252b5132 6290 default:
bc805888 6291 fprintf (stderr,
94f592af 6292 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6293 fflush (stderr);
252b5132
RH		 6294 abort ();
6295 }
6296 }
6297
6298#ifdef OBJ_ELF
94f592af 6299 fixP->fx_addnumber = value;
4e6935a6
AM		 6300
6301 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6302 from the section contents. If we are going to be emitting a reloc
6303 then the section contents are immaterial, so don't warn if they
6304 happen to overflow. Leave such warnings to ld. */
6305 if (!fixP->fx_done)
6306 fixP->fx_no_overflow = 1;
252b5132 6307#else
94f592af
NC		 6308 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6309 fixP->fx_addnumber = 0;
252b5132
RH		 6310 else
6311 {
6312#ifdef TE_PE
94f592af 6313 fixP->fx_addnumber = 0;
252b5132 6314#else
8edcbfcd
TG		 6315 /* We want to use the offset within the toc, not the actual VMA
6316 of the symbol. */
94f592af 6317 fixP->fx_addnumber =
8edcbfcd
TG		 6318 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6319 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6320#endif
6321 }
6322#endif
252b5132
RH		 6323}
6324
6325/* Generate a reloc for a fixup. */
6326
6327arelent *
98027b10 6328tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6329{
6330 arelent *reloc;
6331
6332 reloc = (arelent *) xmalloc (sizeof (arelent));
6333
49309057
ILT		 6334 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6335 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6336 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6337 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6338 if (reloc->howto == (reloc_howto_type *) NULL)
6339 {
6340 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6341 _("reloc %d not supported by object file format"),
6342 (int) fixp->fx_r_type);
252b5132
RH		 6343 return NULL;
6344 }
6345 reloc->addend = fixp->fx_addnumber;
6346
6347 return reloc;
6348}
75e21f08
JJ		 6349
6350void
98027b10 6351ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6352{
6353 cfi_add_CFA_def_cfa (1, 0);
6354}
6355
6356int
1df69f4f 6357tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6358{
6359 unsigned int regnum = -1;
6360 unsigned int i;
6361 const char *p;
6362 char *q;
6363 static struct { char *name; int dw2regnum; } regnames[] =
6364 {
6365 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6366 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6367 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6368 { "spe_acc", 111 }, { "spefscr", 112 }
6369 };
6370
6371 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6372 if (strcmp (regnames[i].name, regname) == 0)
6373 return regnames[i].dw2regnum;
6374
6375 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6376 {
6377 p = regname + 1 + (regname[1] == '.');
6378 regnum = strtoul (p, &q, 10);
6379 if (p == q || *q || regnum >= 32)
6380 return -1;
6381 if (regname[0] == 'f')
b7d7dc63 6382 regnum += 32;
75e21f08 6383 else if (regname[0] == 'v')
b7d7dc63 6384 regnum += 77;
75e21f08
JJ		 6385 }
6386 else if (regname[0] == 'c' && regname[1] == 'r')
6387 {
6388 p = regname + 2 + (regname[2] == '.');
6389 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6390 return -1;
75e21f08
JJ		 6391 regnum = p[0] - '0' + 68;
6392 }
6393 return regnum;
6394}
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