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* binutils-all/objcopy.exp (copy_setup): Don't perror, use send_log.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
b34976b6 87static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 88static void ppc_set_cpu PARAMS ((void));
89static unsigned long ppc_insert_operand
90 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
91 offsetT val, char *file, unsigned int line));
92static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
93static void ppc_byte PARAMS ((int));
0baf16f2
AM		 94
95#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 96static int ppc_is_toc_sym PARAMS ((symbolS *sym));
97static void ppc_tc PARAMS ((int));
0baf16f2
AM		 98static void ppc_machine PARAMS ((int));
99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
102static void ppc_comm PARAMS ((int));
103static void ppc_bb PARAMS ((int));
104static void ppc_bc PARAMS ((int));
105static void ppc_bf PARAMS ((int));
106static void ppc_biei PARAMS ((int));
107static void ppc_bs PARAMS ((int));
108static void ppc_eb PARAMS ((int));
109static void ppc_ec PARAMS ((int));
110static void ppc_ef PARAMS ((int));
111static void ppc_es PARAMS ((int));
112static void ppc_csect PARAMS ((int));
931e13a6 113static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 114static void ppc_function PARAMS ((int));
115static void ppc_extern PARAMS ((int));
116static void ppc_lglobl PARAMS ((int));
117static void ppc_section PARAMS ((int));
118static void ppc_named_section PARAMS ((int));
119static void ppc_stabx PARAMS ((int));
120static void ppc_rename PARAMS ((int));
121static void ppc_toc PARAMS ((int));
122static void ppc_xcoff_cons PARAMS ((int));
123static void ppc_vbyte PARAMS ((int));
124#endif
125
126#ifdef OBJ_ELF
127static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
128static void ppc_elf_cons PARAMS ((int));
129static void ppc_elf_rdata PARAMS ((int));
130static void ppc_elf_lcomm PARAMS ((int));
131static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 132static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 133#endif
134
135#ifdef TE_PE
136static void ppc_set_current_section PARAMS ((segT));
137static void ppc_previous PARAMS ((int));
138static void ppc_pdata PARAMS ((int));
139static void ppc_ydata PARAMS ((int));
140static void ppc_reldata PARAMS ((int));
141static void ppc_rdata PARAMS ((int));
142static void ppc_ualong PARAMS ((int));
143static void ppc_znop PARAMS ((int));
144static void ppc_pe_comm PARAMS ((int));
145static void ppc_pe_section PARAMS ((int));
146static void ppc_pe_function PARAMS ((int));
147static void ppc_pe_tocd PARAMS ((int));
148#endif
149\f
150/* Generic assembler global variables which must be defined by all
151 targets. */
152
153#ifdef OBJ_ELF
154/* This string holds the chars that always start a comment. If the
155 pre-processor is disabled, these aren't very useful. The macro
156 tc_comment_chars points to this. We use this, rather than the
157 usual comment_chars, so that we can switch for Solaris conventions. */
158static const char ppc_solaris_comment_chars[] = "#!";
159static const char ppc_eabi_comment_chars[] = "#";
160
161#ifdef TARGET_SOLARIS_COMMENT
162const char *ppc_comment_chars = ppc_solaris_comment_chars;
163#else
164const char *ppc_comment_chars = ppc_eabi_comment_chars;
165#endif
166#else
167const char comment_chars[] = "#";
168#endif
169
170/* Characters which start a comment at the beginning of a line. */
171const char line_comment_chars[] = "#";
172
173/* Characters which may be used to separate multiple commands on a
174 single line. */
175const char line_separator_chars[] = ";";
176
177/* Characters which are used to indicate an exponent in a floating
178 point number. */
179const char EXP_CHARS[] = "eE";
180
181/* Characters which mean that a number is a floating point constant,
182 as in 0d1.0. */
183const char FLT_CHARS[] = "dD";
5ce8663f 184
5e02f92e 185/* Anything that can start an operand needs to be mentioned here,
ac805826 186 to stop the input scrubber eating whitespace. */
5e02f92e 187const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 188
189/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
190int ppc_cie_data_alignment;
252b5132
RH		 191\f
192/* The target specific pseudo-ops which we support. */
193
194const pseudo_typeS md_pseudo_table[] =
195{
196 /* Pseudo-ops which must be overridden. */
197 { "byte", ppc_byte, 0 },
198
199#ifdef OBJ_XCOFF
200 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
201 legitimately belong in the obj-*.c file. However, XCOFF is based
202 on COFF, and is only implemented for the RS/6000. We just use
203 obj-coff.c, and add what we need here. */
204 { "comm", ppc_comm, 0 },
205 { "lcomm", ppc_comm, 1 },
206 { "bb", ppc_bb, 0 },
207 { "bc", ppc_bc, 0 },
208 { "bf", ppc_bf, 0 },
209 { "bi", ppc_biei, 0 },
210 { "bs", ppc_bs, 0 },
211 { "csect", ppc_csect, 0 },
212 { "data", ppc_section, 'd' },
213 { "eb", ppc_eb, 0 },
214 { "ec", ppc_ec, 0 },
215 { "ef", ppc_ef, 0 },
216 { "ei", ppc_biei, 1 },
217 { "es", ppc_es, 0 },
218 { "extern", ppc_extern, 0 },
219 { "function", ppc_function, 0 },
220 { "lglobl", ppc_lglobl, 0 },
221 { "rename", ppc_rename, 0 },
222 { "section", ppc_named_section, 0 },
223 { "stabx", ppc_stabx, 0 },
224 { "text", ppc_section, 't' },
225 { "toc", ppc_toc, 0 },
226 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 227 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 228 { "word", ppc_xcoff_cons, 1 },
229 { "short", ppc_xcoff_cons, 1 },
230 { "vbyte", ppc_vbyte, 0 },
231#endif
232
233#ifdef OBJ_ELF
0baf16f2
AM		 234 { "llong", ppc_elf_cons, 8 },
235 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 236 { "long", ppc_elf_cons, 4 },
237 { "word", ppc_elf_cons, 2 },
238 { "short", ppc_elf_cons, 2 },
239 { "rdata", ppc_elf_rdata, 0 },
240 { "rodata", ppc_elf_rdata, 0 },
241 { "lcomm", ppc_elf_lcomm, 0 },
242#endif
243
244#ifdef TE_PE
99a814a1 245 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 246 { "previous", ppc_previous, 0 },
247 { "pdata", ppc_pdata, 0 },
248 { "ydata", ppc_ydata, 0 },
249 { "reldata", ppc_reldata, 0 },
250 { "rdata", ppc_rdata, 0 },
251 { "ualong", ppc_ualong, 0 },
252 { "znop", ppc_znop, 0 },
253 { "comm", ppc_pe_comm, 0 },
254 { "lcomm", ppc_pe_comm, 1 },
255 { "section", ppc_pe_section, 0 },
256 { "function", ppc_pe_function,0 },
257 { "tocd", ppc_pe_tocd, 0 },
258#endif
259
0baf16f2 260#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 261 { "tc", ppc_tc, 0 },
0baf16f2
AM		 262 { "machine", ppc_machine, 0 },
263#endif
252b5132
RH		 264
265 { NULL, NULL, 0 }
266};
267
268\f
99a814a1
AM		 269/* Predefined register names if -mregnames (or default for Windows NT).
270 In general, there are lots of them, in an attempt to be compatible
271 with a number of other Windows NT assemblers. */
252b5132
RH		 272
273/* Structure to hold information about predefined registers. */
274struct pd_reg
275 {
276 char *name;
277 int value;
278 };
279
280/* List of registers that are pre-defined:
281
282 Each general register has predefined names of the form:
283 1. r<reg_num> which has the value <reg_num>.
284 2. r.<reg_num> which has the value <reg_num>.
285
252b5132
RH		 286 Each floating point register has predefined names of the form:
287 1. f<reg_num> which has the value <reg_num>.
288 2. f.<reg_num> which has the value <reg_num>.
289
7a899fff
C		 290 Each vector unit register has predefined names of the form:
291 1. v<reg_num> which has the value <reg_num>.
292 2. v.<reg_num> which has the value <reg_num>.
293
252b5132
RH		 294 Each condition register has predefined names of the form:
295 1. cr<reg_num> which has the value <reg_num>.
296 2. cr.<reg_num> which has the value <reg_num>.
297
298 There are individual registers as well:
299 sp or r.sp has the value 1
300 rtoc or r.toc has the value 2
301 fpscr has the value 0
302 xer has the value 1
303 lr has the value 8
304 ctr has the value 9
305 pmr has the value 0
306 dar has the value 19
307 dsisr has the value 18
308 dec has the value 22
309 sdr1 has the value 25
310 srr0 has the value 26
311 srr1 has the value 27
312
81d4177b 313 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 314
315static const struct pd_reg pre_defined_registers[] =
316{
317 { "cr.0", 0 }, /* Condition Registers */
318 { "cr.1", 1 },
319 { "cr.2", 2 },
320 { "cr.3", 3 },
321 { "cr.4", 4 },
322 { "cr.5", 5 },
323 { "cr.6", 6 },
324 { "cr.7", 7 },
325
326 { "cr0", 0 },
327 { "cr1", 1 },
328 { "cr2", 2 },
329 { "cr3", 3 },
330 { "cr4", 4 },
331 { "cr5", 5 },
332 { "cr6", 6 },
333 { "cr7", 7 },
334
335 { "ctr", 9 },
336
337 { "dar", 19 }, /* Data Access Register */
338 { "dec", 22 }, /* Decrementer */
339 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
340
341 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 342 { "f.1", 1 },
343 { "f.10", 10 },
344 { "f.11", 11 },
345 { "f.12", 12 },
346 { "f.13", 13 },
347 { "f.14", 14 },
348 { "f.15", 15 },
349 { "f.16", 16 },
350 { "f.17", 17 },
351 { "f.18", 18 },
352 { "f.19", 19 },
353 { "f.2", 2 },
354 { "f.20", 20 },
355 { "f.21", 21 },
356 { "f.22", 22 },
357 { "f.23", 23 },
358 { "f.24", 24 },
359 { "f.25", 25 },
360 { "f.26", 26 },
361 { "f.27", 27 },
362 { "f.28", 28 },
363 { "f.29", 29 },
364 { "f.3", 3 },
252b5132
RH		 365 { "f.30", 30 },
366 { "f.31", 31 },
81d4177b
KH		 367 { "f.4", 4 },
368 { "f.5", 5 },
369 { "f.6", 6 },
370 { "f.7", 7 },
371 { "f.8", 8 },
372 { "f.9", 9 },
373
374 { "f0", 0 },
375 { "f1", 1 },
376 { "f10", 10 },
377 { "f11", 11 },
378 { "f12", 12 },
379 { "f13", 13 },
380 { "f14", 14 },
381 { "f15", 15 },
382 { "f16", 16 },
383 { "f17", 17 },
384 { "f18", 18 },
385 { "f19", 19 },
386 { "f2", 2 },
387 { "f20", 20 },
388 { "f21", 21 },
389 { "f22", 22 },
390 { "f23", 23 },
391 { "f24", 24 },
392 { "f25", 25 },
393 { "f26", 26 },
394 { "f27", 27 },
395 { "f28", 28 },
396 { "f29", 29 },
397 { "f3", 3 },
252b5132
RH		 398 { "f30", 30 },
399 { "f31", 31 },
81d4177b
KH		 400 { "f4", 4 },
401 { "f5", 5 },
402 { "f6", 6 },
403 { "f7", 7 },
404 { "f8", 8 },
405 { "f9", 9 },
252b5132
RH		 406
407 { "fpscr", 0 },
408
409 { "lr", 8 }, /* Link Register */
410
411 { "pmr", 0 },
412
413 { "r.0", 0 }, /* General Purpose Registers */
414 { "r.1", 1 },
415 { "r.10", 10 },
416 { "r.11", 11 },
417 { "r.12", 12 },
418 { "r.13", 13 },
419 { "r.14", 14 },
420 { "r.15", 15 },
421 { "r.16", 16 },
422 { "r.17", 17 },
423 { "r.18", 18 },
424 { "r.19", 19 },
425 { "r.2", 2 },
426 { "r.20", 20 },
427 { "r.21", 21 },
428 { "r.22", 22 },
429 { "r.23", 23 },
430 { "r.24", 24 },
431 { "r.25", 25 },
432 { "r.26", 26 },
433 { "r.27", 27 },
434 { "r.28", 28 },
435 { "r.29", 29 },
436 { "r.3", 3 },
437 { "r.30", 30 },
438 { "r.31", 31 },
439 { "r.4", 4 },
440 { "r.5", 5 },
441 { "r.6", 6 },
442 { "r.7", 7 },
443 { "r.8", 8 },
444 { "r.9", 9 },
445
446 { "r.sp", 1 }, /* Stack Pointer */
447
448 { "r.toc", 2 }, /* Pointer to the table of contents */
449
450 { "r0", 0 }, /* More general purpose registers */
451 { "r1", 1 },
452 { "r10", 10 },
453 { "r11", 11 },
454 { "r12", 12 },
455 { "r13", 13 },
456 { "r14", 14 },
457 { "r15", 15 },
458 { "r16", 16 },
459 { "r17", 17 },
460 { "r18", 18 },
461 { "r19", 19 },
462 { "r2", 2 },
463 { "r20", 20 },
464 { "r21", 21 },
465 { "r22", 22 },
466 { "r23", 23 },
467 { "r24", 24 },
468 { "r25", 25 },
469 { "r26", 26 },
470 { "r27", 27 },
471 { "r28", 28 },
472 { "r29", 29 },
473 { "r3", 3 },
474 { "r30", 30 },
475 { "r31", 31 },
476 { "r4", 4 },
477 { "r5", 5 },
478 { "r6", 6 },
479 { "r7", 7 },
480 { "r8", 8 },
481 { "r9", 9 },
482
483 { "rtoc", 2 }, /* Table of contents */
484
485 { "sdr1", 25 }, /* Storage Description Register 1 */
486
487 { "sp", 1 },
488
489 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
490 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 491
7a899fff 492 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 493 { "v.1", 1 },
494 { "v.10", 10 },
495 { "v.11", 11 },
496 { "v.12", 12 },
497 { "v.13", 13 },
498 { "v.14", 14 },
499 { "v.15", 15 },
500 { "v.16", 16 },
501 { "v.17", 17 },
502 { "v.18", 18 },
503 { "v.19", 19 },
504 { "v.2", 2 },
505 { "v.20", 20 },
506 { "v.21", 21 },
507 { "v.22", 22 },
508 { "v.23", 23 },
509 { "v.24", 24 },
510 { "v.25", 25 },
511 { "v.26", 26 },
512 { "v.27", 27 },
513 { "v.28", 28 },
514 { "v.29", 29 },
515 { "v.3", 3 },
7a899fff
C		 516 { "v.30", 30 },
517 { "v.31", 31 },
81d4177b
KH		 518 { "v.4", 4 },
519 { "v.5", 5 },
520 { "v.6", 6 },
521 { "v.7", 7 },
522 { "v.8", 8 },
523 { "v.9", 9 },
7a899fff
C		 524
525 { "v0", 0 },
81d4177b
KH		 526 { "v1", 1 },
527 { "v10", 10 },
528 { "v11", 11 },
529 { "v12", 12 },
530 { "v13", 13 },
531 { "v14", 14 },
532 { "v15", 15 },
533 { "v16", 16 },
534 { "v17", 17 },
535 { "v18", 18 },
536 { "v19", 19 },
537 { "v2", 2 },
538 { "v20", 20 },
539 { "v21", 21 },
540 { "v22", 22 },
541 { "v23", 23 },
542 { "v24", 24 },
543 { "v25", 25 },
544 { "v26", 26 },
545 { "v27", 27 },
546 { "v28", 28 },
547 { "v29", 29 },
548 { "v3", 3 },
7a899fff
C		 549 { "v30", 30 },
550 { "v31", 31 },
81d4177b
KH		 551 { "v4", 4 },
552 { "v5", 5 },
553 { "v6", 6 },
554 { "v7", 7 },
555 { "v8", 8 },
7a899fff 556 { "v9", 9 },
252b5132
RH		 557
558 { "xer", 1 },
559
560};
561
bc805888 562#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 563
564/* Given NAME, find the register number associated with that name, return
565 the integer value associated with the given name or -1 on failure. */
566
567static int reg_name_search
568 PARAMS ((const struct pd_reg *, int, const char * name));
569
570static int
571reg_name_search (regs, regcount, name)
572 const struct pd_reg *regs;
573 int regcount;
574 const char *name;
575{
576 int middle, low, high;
577 int cmp;
578
579 low = 0;
580 high = regcount - 1;
581
582 do
583 {
584 middle = (low + high) / 2;
585 cmp = strcasecmp (name, regs[middle].name);
586 if (cmp < 0)
587 high = middle - 1;
588 else if (cmp > 0)
589 low = middle + 1;
590 else
591 return regs[middle].value;
592 }
593 while (low <= high);
594
595 return -1;
596}
597
598/*
99a814a1 599 * Summary of register_name.
252b5132
RH		 600 *
601 * in: Input_line_pointer points to 1st char of operand.
602 *
603 * out: A expressionS.
604 * The operand may have been a register: in this case, X_op == O_register,
605 * X_add_number is set to the register number, and truth is returned.
606 * Input_line_pointer->(next non-blank) char after operand, or is in its
607 * original state.
608 */
609
b34976b6 610static bfd_boolean
252b5132
RH		 611register_name (expressionP)
612 expressionS *expressionP;
613{
614 int reg_number;
615 char *name;
616 char *start;
617 char c;
618
99a814a1 619 /* Find the spelling of the operand. */
252b5132 620 start = name = input_line_pointer;
3882b010 621 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 622 name = ++input_line_pointer;
623
3882b010 624 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 625 return FALSE;
252b5132
RH		 626
627 c = get_symbol_end ();
628 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
629
468cced8
AM		 630 /* Put back the delimiting char. */
631 *input_line_pointer = c;
632
99a814a1 633 /* Look to see if it's in the register table. */
81d4177b 634 if (reg_number >= 0)
252b5132
RH		 635 {
636 expressionP->X_op = O_register;
637 expressionP->X_add_number = reg_number;
81d4177b 638
99a814a1 639 /* Make the rest nice. */
252b5132
RH		 640 expressionP->X_add_symbol = NULL;
641 expressionP->X_op_symbol = NULL;
b34976b6 642 return TRUE;
252b5132 643 }
468cced8
AM		 644
645 /* Reset the line as if we had not done anything. */
646 input_line_pointer = start;
b34976b6 647 return FALSE;
252b5132
RH		 648}
649\f
650/* This function is called for each symbol seen in an expression. It
651 handles the special parsing which PowerPC assemblers are supposed
652 to use for condition codes. */
653
654/* Whether to do the special parsing. */
b34976b6 655static bfd_boolean cr_operand;
252b5132
RH		 656
657/* Names to recognize in a condition code. This table is sorted. */
658static const struct pd_reg cr_names[] =
659{
660 { "cr0", 0 },
661 { "cr1", 1 },
662 { "cr2", 2 },
663 { "cr3", 3 },
664 { "cr4", 4 },
665 { "cr5", 5 },
666 { "cr6", 6 },
667 { "cr7", 7 },
668 { "eq", 2 },
669 { "gt", 1 },
670 { "lt", 0 },
671 { "so", 3 },
672 { "un", 3 }
673};
674
675/* Parsing function. This returns non-zero if it recognized an
676 expression. */
677
678int
679ppc_parse_name (name, expr)
680 const char *name;
681 expressionS *expr;
682{
683 int val;
684
685 if (! cr_operand)
686 return 0;
687
688 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
689 name);
690 if (val < 0)
691 return 0;
692
693 expr->X_op = O_constant;
694 expr->X_add_number = val;
695
696 return 1;
697}
698\f
699/* Local variables. */
700
701/* The type of processor we are assembling for. This is one or more
702 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 703static unsigned long ppc_cpu = 0;
252b5132 704
2b3c4602
AM		 705/* Whether to target xcoff64/elf64. */
706static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 707
252b5132
RH		 708/* Opcode hash table. */
709static struct hash_control *ppc_hash;
710
711/* Macro hash table. */
712static struct hash_control *ppc_macro_hash;
713
714#ifdef OBJ_ELF
99a814a1 715/* What type of shared library support to use. */
5d6f4f16 716static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 717
99a814a1 718/* Flags to set in the elf header. */
252b5132
RH		 719static flagword ppc_flags = 0;
720
721/* Whether this is Solaris or not. */
722#ifdef TARGET_SOLARIS_COMMENT
b34976b6 723#define SOLARIS_P TRUE
252b5132 724#else
b34976b6 725#define SOLARIS_P FALSE
252b5132
RH		 726#endif
727
b34976b6 728static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 729#endif
730
731#ifdef OBJ_XCOFF
732
733/* The RS/6000 assembler uses the .csect pseudo-op to generate code
734 using a bunch of different sections. These assembler sections,
735 however, are all encompassed within the .text or .data sections of
736 the final output file. We handle this by using different
737 subsegments within these main segments. */
738
739/* Next subsegment to allocate within the .text segment. */
740static subsegT ppc_text_subsegment = 2;
741
742/* Linked list of csects in the text section. */
743static symbolS *ppc_text_csects;
744
745/* Next subsegment to allocate within the .data segment. */
746static subsegT ppc_data_subsegment = 2;
747
748/* Linked list of csects in the data section. */
749static symbolS *ppc_data_csects;
750
751/* The current csect. */
752static symbolS *ppc_current_csect;
753
754/* The RS/6000 assembler uses a TOC which holds addresses of functions
755 and variables. Symbols are put in the TOC with the .tc pseudo-op.
756 A special relocation is used when accessing TOC entries. We handle
757 the TOC as a subsegment within the .data segment. We set it up if
758 we see a .toc pseudo-op, and save the csect symbol here. */
759static symbolS *ppc_toc_csect;
760
761/* The first frag in the TOC subsegment. */
762static fragS *ppc_toc_frag;
763
764/* The first frag in the first subsegment after the TOC in the .data
765 segment. NULL if there are no subsegments after the TOC. */
766static fragS *ppc_after_toc_frag;
767
768/* The current static block. */
769static symbolS *ppc_current_block;
770
771/* The COFF debugging section; set by md_begin. This is not the
772 .debug section, but is instead the secret BFD section which will
773 cause BFD to set the section number of a symbol to N_DEBUG. */
774static asection *ppc_coff_debug_section;
775
776#endif /* OBJ_XCOFF */
777
778#ifdef TE_PE
779
780/* Various sections that we need for PE coff support. */
781static segT ydata_section;
782static segT pdata_section;
783static segT reldata_section;
784static segT rdata_section;
785static segT tocdata_section;
786
81d4177b 787/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 788static segT ppc_previous_section;
789static segT ppc_current_section;
790
791#endif /* TE_PE */
792
793#ifdef OBJ_ELF
794symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 795#define PPC_APUINFO_ISEL 0x40
796#define PPC_APUINFO_PMR 0x41
797#define PPC_APUINFO_RFMCI 0x42
798#define PPC_APUINFO_CACHELCK 0x43
799#define PPC_APUINFO_SPE 0x100
800#define PPC_APUINFO_EFS 0x101
801#define PPC_APUINFO_BRLOCK 0x102
802
b34976b6
AM		 803/*
804 * We keep a list of APUinfo
6a0c61b7
EZ		 805 */
806unsigned long *ppc_apuinfo_list;
807unsigned int ppc_apuinfo_num;
808unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 809#endif /* OBJ_ELF */
810\f
811#ifdef OBJ_ELF
15c1449b 812const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 813#else
15c1449b 814const char *const md_shortopts = "um:";
252b5132 815#endif
15c1449b 816const struct option md_longopts[] = {
252b5132
RH		 817 {NULL, no_argument, NULL, 0}
818};
15c1449b 819const size_t md_longopts_size = sizeof (md_longopts);
252b5132 820
69c040df
AM		 821
822/* Handle -m options that set cpu type, and .machine arg. */
823
824static int
825parse_cpu (const char *arg)
826{
827 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
828 (RIOS2). */
829 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
830 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
831 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
832 else if (strcmp (arg, "pwr") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
834 /* -m601 means to assemble for the PowerPC 601, which includes
835 instructions that are holdovers from the Power. */
836 else if (strcmp (arg, "601") == 0)
837 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
838 | PPC_OPCODE_601 | PPC_OPCODE_32);
839 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
840 PowerPC 603/604. */
841 else if (strcmp (arg, "ppc") == 0
842 || strcmp (arg, "ppc32") == 0
843 || strcmp (arg, "603") == 0
844 || strcmp (arg, "604") == 0)
845 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
846 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
847 else if (strcmp (arg, "403") == 0
848 || strcmp (arg, "405") == 0)
849 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
850 | PPC_OPCODE_403 | PPC_OPCODE_32);
851 else if (strcmp (arg, "440") == 0)
852 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
853 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
854 else if (strcmp (arg, "7400") == 0
855 || strcmp (arg, "7410") == 0
856 || strcmp (arg, "7450") == 0
857 || strcmp (arg, "7455") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
859 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 860 else if (strcmp (arg, "e300") == 0)
861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
862 | PPC_OPCODE_E300);
69c040df
AM		 863 else if (strcmp (arg, "altivec") == 0)
864 {
865 if (ppc_cpu == 0)
866 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
867 else
868 ppc_cpu |= PPC_OPCODE_ALTIVEC;
869 }
870 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
871 {
872 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
873 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
874 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
875 | PPC_OPCODE_RFMCI);
876 }
877 else if (strcmp (arg, "spe") == 0)
878 {
879 if (ppc_cpu == 0)
880 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
881 else
882 ppc_cpu |= PPC_OPCODE_SPE;
883 }
884 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
885 620. */
886 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
887 {
888 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
889 }
890 else if (strcmp (arg, "ppc64bridge") == 0)
891 {
892 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
893 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
894 }
895 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
896 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
897 {
898 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
899 }
900 /* -mbooke64 means enable 64-bit BookE support. */
901 else if (strcmp (arg, "booke64") == 0)
902 {
903 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
904 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
905 }
906 else if (strcmp (arg, "power4") == 0)
907 {
908 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
909 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
910 }
b0648eec
AM		 911 else if (strcmp (arg, "power5") == 0)
912 {
913 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
914 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
915 | PPC_OPCODE_POWER5);
916 }
9622b051
AM		 917 else if (strcmp (arg, "power6") == 0)
918 {
919 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
920 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
921 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
922 }
ede602d7
AM		 923 else if (strcmp (arg, "cell") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
926 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
927 | PPC_OPCODE_CELL);
928 }
69c040df
AM		 929 /* -mcom means assemble for the common intersection between Power
930 and PowerPC. At present, we just allow the union, rather
931 than the intersection. */
932 else if (strcmp (arg, "com") == 0)
933 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
934 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
935 else if (strcmp (arg, "any") == 0)
936 ppc_cpu |= PPC_OPCODE_ANY;
937 else
938 return 0;
939
940 return 1;
941}
942
252b5132
RH		 943int
944md_parse_option (c, arg)
945 int c;
946 char *arg;
947{
948 switch (c)
949 {
950 case 'u':
951 /* -u means that any undefined symbols should be treated as
952 external, which is the default for gas anyhow. */
953 break;
954
955#ifdef OBJ_ELF
956 case 'l':
957 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 958 sake, recognize -be also. */
252b5132
RH		 959 if (strcmp (arg, "e") == 0)
960 {
961 target_big_endian = 0;
962 set_target_endian = 1;
963 }
964 else
965 return 0;
966
967 break;
968
969 case 'b':
970 if (strcmp (arg, "e") == 0)
971 {
972 target_big_endian = 1;
973 set_target_endian = 1;
974 }
975 else
976 return 0;
977
978 break;
979
980 case 'K':
99a814a1 981 /* Recognize -K PIC. */
252b5132
RH		 982 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
983 {
984 shlib = SHLIB_PIC;
985 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
986 }
987 else
988 return 0;
989
990 break;
991#endif
992
7f6d05e8
CP		 993 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
994 case 'a':
995 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 996 {
997#ifdef BFD64
998 ppc_obj64 = 1;
999#else
1000 as_fatal (_("%s unsupported"), "-a64");
1001#endif
1002 }
7f6d05e8 1003 else if (strcmp (arg, "32") == 0)
2b3c4602 1004 ppc_obj64 = 0;
7f6d05e8
CP		 1005 else
1006 return 0;
1007 break;
81d4177b 1008
252b5132 1009 case 'm':
69c040df
AM		 1010 if (parse_cpu (arg))
1011 ;
252b5132
RH		 1012
1013 else if (strcmp (arg, "regnames") == 0)
b34976b6 1014 reg_names_p = TRUE;
252b5132
RH		 1015
1016 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1017 reg_names_p = FALSE;
252b5132
RH		 1018
1019#ifdef OBJ_ELF
99a814a1
AM		 1020 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1021 that require relocation. */
252b5132
RH		 1022 else if (strcmp (arg, "relocatable") == 0)
1023 {
5d6f4f16 1024 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1025 ppc_flags |= EF_PPC_RELOCATABLE;
1026 }
1027
1028 else if (strcmp (arg, "relocatable-lib") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1032 }
1033
99a814a1 1034 /* -memb, set embedded bit. */
252b5132
RH		 1035 else if (strcmp (arg, "emb") == 0)
1036 ppc_flags |= EF_PPC_EMB;
1037
99a814a1
AM		 1038 /* -mlittle/-mbig set the endianess. */
1039 else if (strcmp (arg, "little") == 0
1040 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1041 {
1042 target_big_endian = 0;
1043 set_target_endian = 1;
1044 }
1045
1046 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1047 {
1048 target_big_endian = 1;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "solaris") == 0)
1053 {
b34976b6 1054 msolaris = TRUE;
252b5132
RH		 1055 ppc_comment_chars = ppc_solaris_comment_chars;
1056 }
1057
1058 else if (strcmp (arg, "no-solaris") == 0)
1059 {
b34976b6 1060 msolaris = FALSE;
252b5132
RH		 1061 ppc_comment_chars = ppc_eabi_comment_chars;
1062 }
1063#endif
1064 else
1065 {
1066 as_bad (_("invalid switch -m%s"), arg);
1067 return 0;
1068 }
1069 break;
1070
1071#ifdef OBJ_ELF
1072 /* -V: SVR4 argument to print version ID. */
1073 case 'V':
1074 print_version_id ();
1075 break;
1076
1077 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1078 should be emitted or not. FIXME: Not implemented. */
1079 case 'Q':
1080 break;
1081
1082 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1083 rather than .stabs.excl, which is ignored by the linker.
1084 FIXME: Not implemented. */
1085 case 's':
1086 if (arg)
1087 return 0;
1088
1089 break;
1090#endif
1091
1092 default:
1093 return 0;
1094 }
1095
1096 return 1;
1097}
1098
1099void
1100md_show_usage (stream)
1101 FILE *stream;
1102{
bc805888 1103 fprintf (stream, _("\
252b5132 1104PowerPC options:\n\
df12615d
AM		 1105-a32 generate ELF32/XCOFF32\n\
1106-a64 generate ELF64/XCOFF64\n\
252b5132 1107-u ignored\n\
23e1d84c
AM		 1108-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1109-mpwr generate code for POWER (RIOS1)\n\
1110-m601 generate code for PowerPC 601\n\
418c1742 1111-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1112 generate code for PowerPC 603/604\n\
df12615d 1113-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1114-m440 generate code for PowerPC 440\n\
f5c120c5 1115-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1116 generate code For PowerPC 7400/7410/7450/7455\n"));
1117 fprintf (stream, _("\
23e1d84c 1118-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1119-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1120-mbooke64 generate code for 64-bit PowerPC BookE\n\
1121-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1122-mpower4 generate code for Power4 architecture\n\
b0648eec 1123-mpower5 generate code for Power5 architecture\n\
9622b051 1124-mpower6 generate code for Power6 architecture\n\
ede602d7 1125-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1126-mcom generate code Power/PowerPC common instructions\n\
df12615d 1127-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1128 fprintf (stream, _("\
df12615d 1129-maltivec generate code for AltiVec\n\
36ae0db3 1130-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1131-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1132-mspe generate code for Motorola SPE instructions\n\
1133-mregnames Allow symbolic names for registers\n\
1134-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1135#ifdef OBJ_ELF
bc805888 1136 fprintf (stream, _("\
252b5132
RH		 1137-mrelocatable support for GCC's -mrelocatble option\n\
1138-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1139-memb set PPC_EMB bit in ELF flags\n\
df12615d 1140-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1141 generate code for a little endian machine\n\
df12615d
AM		 1142-mbig, -mbig-endian, -b, -be\n\
1143 generate code for a big endian machine\n\
252b5132
RH		 1144-msolaris generate code for Solaris\n\
1145-mno-solaris do not generate code for Solaris\n\
1146-V print assembler version number\n\
1147-Qy, -Qn ignored\n"));
1148#endif
1149}
1150\f
1151/* Set ppc_cpu if it is not already set. */
1152
1153static void
1154ppc_set_cpu ()
1155{
1156 const char *default_os = TARGET_OS;
1157 const char *default_cpu = TARGET_CPU;
1158
3c9030c1 1159 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1160 {
2a98c3a6 1161 if (ppc_obj64)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1163 else if (strncmp (default_os, "aix", 3) == 0
1164 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1165 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1166 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1168 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1170 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1171 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1172 else
99a814a1
AM		 1173 as_fatal (_("Unknown default cpu = %s, os = %s"),
1174 default_cpu, default_os);
252b5132
RH		 1175 }
1176}
1177
9232bbb0
AM		 1178/* Figure out the BFD architecture to use. This function and ppc_mach
1179 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1180
1181enum bfd_architecture
1182ppc_arch ()
1183{
1184 const char *default_cpu = TARGET_CPU;
1185 ppc_set_cpu ();
1186
1187 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1188 return bfd_arch_powerpc;
1189 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1190 return bfd_arch_rs6000;
1191 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1192 {
1193 if (strcmp (default_cpu, "rs6000") == 0)
1194 return bfd_arch_rs6000;
0baf16f2 1195 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1196 return bfd_arch_powerpc;
1197 }
1198
1199 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1200 return bfd_arch_unknown;
1201}
1202
7f6d05e8
CP		 1203unsigned long
1204ppc_mach ()
1205{
2a98c3a6
AM		 1206 if (ppc_obj64)
1207 return bfd_mach_ppc64;
1208 else if (ppc_arch () == bfd_arch_rs6000)
1209 return bfd_mach_rs6k;
1210 else
1211 return bfd_mach_ppc;
7f6d05e8
CP		 1212}
1213
81d4177b 1214extern char*
99a814a1 1215ppc_target_format ()
7f6d05e8
CP		 1216{
1217#ifdef OBJ_COFF
1218#ifdef TE_PE
99a814a1 1219 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1220#elif TE_POWERMAC
0baf16f2 1221 return "xcoff-powermac";
7f6d05e8 1222#else
eb1e0e80 1223# ifdef TE_AIX5
2b3c4602 1224 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1225# else
2b3c4602 1226 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# endif
7f6d05e8 1228#endif
7f6d05e8
CP		 1229#endif
1230#ifdef OBJ_ELF
9d8504b1
PB		 1231# ifdef TE_VXWORKS
1232 return "elf32-powerpc-vxworks";
1233# else
0baf16f2 1234 return (target_big_endian
2b3c4602
AM		 1235 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1236 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1237# endif
7f6d05e8
CP		 1238#endif
1239}
1240
69c040df
AM		 1241/* Insert opcodes and macros into hash tables. Called at startup and
1242 for .cpu pseudo. */
252b5132 1243
69c040df
AM		 1244static void
1245ppc_setup_opcodes (void)
252b5132
RH		 1246{
1247 register const struct powerpc_opcode *op;
1248 const struct powerpc_opcode *op_end;
1249 const struct powerpc_macro *macro;
1250 const struct powerpc_macro *macro_end;
b84bf58a 1251 bfd_boolean bad_insn = FALSE;
252b5132 1252
69c040df
AM		 1253 if (ppc_hash != NULL)
1254 hash_die (ppc_hash);
1255 if (ppc_macro_hash != NULL)
1256 hash_die (ppc_macro_hash);
252b5132
RH		 1257
1258 /* Insert the opcodes into a hash table. */
1259 ppc_hash = hash_new ();
1260
c43a438d 1261 if (ENABLE_CHECKING)
b84bf58a 1262 {
c43a438d 1263 unsigned int i;
b84bf58a 1264
c43a438d
AM		 1265 /* Check operand masks. Code here and in the disassembler assumes
1266 all the 1's in the mask are contiguous. */
1267 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1268 {
c43a438d
AM		 1269 unsigned long mask = powerpc_operands[i].bitm;
1270 unsigned long right_bit;
1271 unsigned int j;
1272
1273 right_bit = mask & -mask;
1274 mask += right_bit;
1275 right_bit = mask & -mask;
1276 if (mask != right_bit)
1277 {
1278 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1279 bad_insn = TRUE;
1280 }
1281 for (j = i + 1; j < num_powerpc_operands; ++j)
1282 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1283 sizeof (powerpc_operands[0])) == 0)
1284 {
1285 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1286 j, i);
1287 bad_insn = TRUE;
1288 }
b84bf58a
AM		 1289 }
1290 }
1291
252b5132
RH		 1292 op_end = powerpc_opcodes + powerpc_num_opcodes;
1293 for (op = powerpc_opcodes; op < op_end; op++)
1294 {
c43a438d 1295 if (ENABLE_CHECKING)
b84bf58a 1296 {
c43a438d
AM		 1297 const unsigned char *o;
1298 unsigned long omask = op->mask;
1299
1300 /* The mask had better not trim off opcode bits. */
1301 if ((op->opcode & omask) != op->opcode)
1302 {
1303 as_bad (_("mask trims opcode bits for %s"),
1304 op->name);
1305 bad_insn = TRUE;
1306 }
1307
1308 /* The operands must not overlap the opcode or each other. */
1309 for (o = op->operands; *o; ++o)
1310 if (*o >= num_powerpc_operands)
1311 {
1312 as_bad (_("operand index error for %s"),
1313 op->name);
1314 bad_insn = TRUE;
1315 }
1316 else
b84bf58a 1317 {
c43a438d
AM		 1318 const struct powerpc_operand *operand = &powerpc_operands[*o];
1319 if (operand->shift >= 0)
b84bf58a 1320 {
c43a438d
AM		 1321 unsigned long mask = operand->bitm << operand->shift;
1322 if (omask & mask)
1323 {
1324 as_bad (_("operand %d overlap in %s"),
1325 (int) (o - op->operands), op->name);
1326 bad_insn = TRUE;
1327 }
1328 omask |= mask;
b84bf58a 1329 }
b84bf58a 1330 }
c43a438d 1331 }
252b5132 1332
2b3c4602 1333 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1334 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1335 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1336 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1337 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1338 /* Certain instructions (eg: extsw) do not exist in the
1339 32-bit BookE instruction set, but they do exist in the
1340 64-bit BookE instruction set, and other PPC instruction
1341 sets. Check to see if the opcode has the BOOKE64 flag set.
1342 If it does make sure that the target CPU is not the BookE32. */
1343 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1344 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1345 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1346 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1347 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1348 == (ppc_cpu & PPC_OPCODE_POWER4)))
1349 && ((op->flags & PPC_OPCODE_POWER5) == 0
1350 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1351 == (ppc_cpu & PPC_OPCODE_POWER5)))
1352 && ((op->flags & PPC_OPCODE_POWER6) == 0
1353 || ((op->flags & PPC_OPCODE_POWER6)
1354 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1355 {
1356 const char *retval;
1357
1358 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1359 if (retval != NULL)
252b5132 1360 {
99a814a1 1361 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1362 if ((ppc_cpu & PPC_OPCODE_601) != 0
1363 && (op->flags & PPC_OPCODE_POWER) != 0)
1364 continue;
1365
b84bf58a 1366 as_bad (_("duplicate instruction %s"),
99a814a1 1367 op->name);
b84bf58a 1368 bad_insn = TRUE;
252b5132
RH		 1369 }
1370 }
1371 }
1372
3c9030c1
AM		 1373 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1374 for (op = powerpc_opcodes; op < op_end; op++)
1375 hash_insert (ppc_hash, op->name, (PTR) op);
1376
252b5132
RH		 1377 /* Insert the macros into a hash table. */
1378 ppc_macro_hash = hash_new ();
1379
1380 macro_end = powerpc_macros + powerpc_num_macros;
1381 for (macro = powerpc_macros; macro < macro_end; macro++)
1382 {
1383 if ((macro->flags & ppc_cpu) != 0)
1384 {
1385 const char *retval;
1386
1387 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1388 if (retval != (const char *) NULL)
1389 {
b84bf58a
AM		 1390 as_bad (_("duplicate macro %s"), macro->name);
1391 bad_insn = TRUE;
252b5132
RH		 1392 }
1393 }
1394 }
1395
b84bf58a 1396 if (bad_insn)
252b5132 1397 abort ();
69c040df
AM		 1398}
1399
1400/* This function is called when the assembler starts up. It is called
1401 after the options have been parsed and the output file has been
1402 opened. */
1403
1404void
1405md_begin ()
1406{
1407 ppc_set_cpu ();
1408
1409 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1410
1411#ifdef OBJ_ELF
1412 /* Set the ELF flags if desired. */
1413 if (ppc_flags && !msolaris)
1414 bfd_set_private_flags (stdoutput, ppc_flags);
1415#endif
1416
1417 ppc_setup_opcodes ();
252b5132 1418
67c1ffbe 1419 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1420 by the user. */
252b5132
RH		 1421 if (!set_target_endian)
1422 {
1423 set_target_endian = 1;
1424 target_big_endian = PPC_BIG_ENDIAN;
1425 }
1426
1427#ifdef OBJ_XCOFF
1428 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1429
1430 /* Create dummy symbols to serve as initial csects. This forces the
1431 text csects to precede the data csects. These symbols will not
1432 be output. */
1433 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1434 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1435 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1436 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1437#endif
1438
1439#ifdef TE_PE
1440
1441 ppc_current_section = text_section;
81d4177b 1442 ppc_previous_section = 0;
252b5132
RH		 1443
1444#endif
1445}
1446
6a0c61b7
EZ		 1447void
1448ppc_cleanup ()
1449{
dc1d03fc 1450#ifdef OBJ_ELF
6a0c61b7
EZ		 1451 if (ppc_apuinfo_list == NULL)
1452 return;
1453
1454 /* Ok, so write the section info out. We have this layout:
1455
1456 byte data what
1457 ---- ---- ----
1458 0 8 length of "APUinfo\0"
1459 4 (n*4) number of APU's (4 bytes each)
1460 8 2 note type 2
1461 12 "APUinfo\0" name
1462 20 APU#1 first APU's info
1463 24 APU#2 second APU's info
1464 ... ...
1465 */
1466 {
1467 char *p;
1468 asection *seg = now_seg;
1469 subsegT subseg = now_subseg;
1470 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1471 unsigned int i;
6a0c61b7
EZ		 1472
1473 /* Create the .PPC.EMB.apuinfo section. */
1474 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1475 bfd_set_section_flags (stdoutput,
1476 apuinfo_secp,
e1a9cb8e 1477 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1478
1479 p = frag_more (4);
1480 md_number_to_chars (p, (valueT) 8, 4);
1481
1482 p = frag_more (4);
e98d298c 1483 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1484
1485 p = frag_more (4);
1486 md_number_to_chars (p, (valueT) 2, 4);
1487
1488 p = frag_more (8);
1489 strcpy (p, "APUinfo");
1490
1491 for (i = 0; i < ppc_apuinfo_num; i++)
1492 {
b34976b6
AM		 1493 p = frag_more (4);
1494 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1495 }
1496
1497 frag_align (2, 0, 0);
1498
1499 /* We probably can't restore the current segment, for there likely
1500 isn't one yet... */
1501 if (seg && subseg)
1502 subseg_set (seg, subseg);
1503 }
dc1d03fc 1504#endif
6a0c61b7
EZ		 1505}
1506
252b5132
RH		 1507/* Insert an operand value into an instruction. */
1508
1509static unsigned long
1510ppc_insert_operand (insn, operand, val, file, line)
1511 unsigned long insn;
1512 const struct powerpc_operand *operand;
1513 offsetT val;
1514 char *file;
1515 unsigned int line;
1516{
b84bf58a
AM		 1517 long min, max, right;
1518 offsetT test;
eb42fac1 1519
b84bf58a
AM		 1520 max = operand->bitm;
1521 right = max & -max;
1522 min = 0;
1523
1524 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1525 {
b84bf58a 1526 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1527 max = (max >> 1) & -right;
1528 min = ~max & -right;
252b5132 1529
b84bf58a 1530 if (!ppc_obj64)
252b5132 1531 {
b84bf58a
AM		 1532 /* Some people write 32 bit hex constants with the sign
1533 extension done by hand. This shouldn't really be
1534 valid, but, to permit this code to assemble on a 64
1535 bit host, we sign extend the 32 bit value. */
1536 if (val > 0
1537 && (val & (offsetT) 0x80000000) != 0
1538 && (val & (offsetT) 0xffffffff) == val)
252b5132 1539 {
b84bf58a
AM		 1540 val -= 0x80000000;
1541 val -= 0x80000000;
252b5132
RH		 1542 }
1543 }
b84bf58a 1544 }
252b5132 1545
b84bf58a
AM		 1546 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1547 {
1548 max++;
1549 min++;
252b5132
RH		 1550 }
1551
b84bf58a
AM		 1552 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1553 test = - val;
1554 else
1555 test = val;
1556
eb42fac1 1557 if ((min <= max && (test < (offsetT) min || test > (offsetT) max))
b84bf58a
AM		 1558 || (test & (right - 1)) != 0)
1559 as_bad_value_out_of_range (_("operand"),
1560 test, (offsetT) min, (offsetT) max, file, line);
1561
252b5132
RH		 1562 if (operand->insert)
1563 {
1564 const char *errmsg;
1565
1566 errmsg = NULL;
2b3c4602 1567 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1568 if (errmsg != (const char *) NULL)
0baf16f2 1569 as_bad_where (file, line, errmsg);
252b5132
RH		 1570 }
1571 else
b84bf58a 1572 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1573
1574 return insn;
1575}
1576
1577\f
1578#ifdef OBJ_ELF
1579/* Parse @got, etc. and return the desired relocation. */
1580static bfd_reloc_code_real_type
1581ppc_elf_suffix (str_p, exp_p)
1582 char **str_p;
1583 expressionS *exp_p;
1584{
1585 struct map_bfd {
1586 char *string;
b7d7dc63
AM		 1587 unsigned int length : 8;
1588 unsigned int valid32 : 1;
1589 unsigned int valid64 : 1;
1590 unsigned int reloc;
252b5132
RH		 1591 };
1592
1593 char ident[20];
1594 char *str = *str_p;
1595 char *str2;
1596 int ch;
1597 int len;
15c1449b 1598 const struct map_bfd *ptr;
252b5132 1599
b7d7dc63
AM		 1600#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1601#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1602#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1603
15c1449b 1604 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1605 MAP ("l", BFD_RELOC_LO16),
1606 MAP ("h", BFD_RELOC_HI16),
1607 MAP ("ha", BFD_RELOC_HI16_S),
1608 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1609 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1610 MAP ("got", BFD_RELOC_16_GOTOFF),
1611 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1612 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1613 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1614 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1615 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1616 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1617 MAP ("copy", BFD_RELOC_PPC_COPY),
1618 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1619 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1620 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1621 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1622 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1623 MAP ("tls", BFD_RELOC_PPC_TLS),
1624 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1625 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1626 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1627 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1628 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1629 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1630 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1631 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1632 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1633 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1634 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1635 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1636 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1637 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1638 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1639 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1640 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1641 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1642 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1643 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1644 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1645 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1646 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1647 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1648 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1649 MAP32 ("fixup", BFD_RELOC_CTOR),
1650 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1651 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1652 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1653 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1654 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1655 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1656 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1657 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1658 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1659 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1660 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1661 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1662 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1663 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1664 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1665 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1666 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1667 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1668 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1669 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1670 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1671 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1672 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1673 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1674 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1675 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1676 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1677 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1678 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1679 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1680 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1681 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1682 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1683 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1684 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1685 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1686 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1687 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1688 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1689 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1690 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1691 };
1692
1693 if (*str++ != '@')
1694 return BFD_RELOC_UNUSED;
1695
1696 for (ch = *str, str2 = ident;
1697 (str2 < ident + sizeof (ident) - 1
3882b010 1698 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1699 ch = *++str)
1700 {
3882b010 1701 *str2++ = TOLOWER (ch);
252b5132
RH		 1702 }
1703
1704 *str2 = '\0';
1705 len = str2 - ident;
1706
1707 ch = ident[0];
1708 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1709 if (ch == ptr->string[0]
1710 && len == ptr->length
b7d7dc63
AM		 1711 && memcmp (ident, ptr->string, ptr->length) == 0
1712 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1713 {
15c1449b
AM		 1714 int reloc = ptr->reloc;
1715
cdba85ec 1716 if (!ppc_obj64)
5f6db75a
AM		 1717 if (exp_p->X_add_number != 0
1718 && (reloc == (int) BFD_RELOC_16_GOTOFF
1719 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1720 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1721 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1722 as_warn (_("identifier+constant@got means identifier@got+constant"));
1723
1724 /* Now check for identifier@suffix+constant. */
1725 if (*str == '-' || *str == '+')
252b5132 1726 {
5f6db75a
AM		 1727 char *orig_line = input_line_pointer;
1728 expressionS new_exp;
1729
1730 input_line_pointer = str;
1731 expression (&new_exp);
1732 if (new_exp.X_op == O_constant)
252b5132 1733 {
5f6db75a
AM		 1734 exp_p->X_add_number += new_exp.X_add_number;
1735 str = input_line_pointer;
252b5132 1736 }
5f6db75a
AM		 1737
1738 if (&input_line_pointer != str_p)
1739 input_line_pointer = orig_line;
252b5132 1740 }
252b5132 1741 *str_p = str;
0baf16f2 1742
2b3c4602 1743 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1744 && exp_p->X_op == O_symbol
1745 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1746 {
9f2b53d7
AM		 1747 /* Change the symbol so that the dummy .TOC. symbol can be
1748 omitted from the object file. */
0baf16f2
AM		 1749 exp_p->X_add_symbol = &abs_symbol;
1750 }
1751
15c1449b 1752 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1753 }
1754
1755 return BFD_RELOC_UNUSED;
1756}
1757
99a814a1
AM		 1758/* Like normal .long/.short/.word, except support @got, etc.
1759 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1760static void
1761ppc_elf_cons (nbytes)
0baf16f2 1762 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1763{
1764 expressionS exp;
1765 bfd_reloc_code_real_type reloc;
1766
1767 if (is_it_end_of_statement ())
1768 {
1769 demand_empty_rest_of_line ();
1770 return;
1771 }
1772
1773 do
1774 {
1775 expression (&exp);
1776 if (exp.X_op == O_symbol
1777 && *input_line_pointer == '@'
99a814a1
AM		 1778 && (reloc = ppc_elf_suffix (&input_line_pointer,
1779 &exp)) != BFD_RELOC_UNUSED)
252b5132 1780 {
99a814a1
AM		 1781 reloc_howto_type *reloc_howto;
1782 int size;
1783
1784 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1785 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1786
1787 if (size > nbytes)
0baf16f2
AM		 1788 {
1789 as_bad (_("%s relocations do not fit in %d bytes\n"),
1790 reloc_howto->name, nbytes);
1791 }
252b5132
RH		 1792 else
1793 {
0baf16f2
AM		 1794 char *p;
1795 int offset;
252b5132 1796
0baf16f2
AM		 1797 p = frag_more (nbytes);
1798 offset = 0;
1799 if (target_big_endian)
1800 offset = nbytes - size;
99a814a1
AM		 1801 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1802 &exp, 0, reloc);
252b5132
RH		 1803 }
1804 }
1805 else
1806 emit_expr (&exp, (unsigned int) nbytes);
1807 }
1808 while (*input_line_pointer++ == ',');
1809
99a814a1
AM		 1810 /* Put terminator back into stream. */
1811 input_line_pointer--;
252b5132
RH		 1812 demand_empty_rest_of_line ();
1813}
1814
1815/* Solaris pseduo op to change to the .rodata section. */
1816static void
1817ppc_elf_rdata (xxx)
1818 int xxx;
1819{
1820 char *save_line = input_line_pointer;
1821 static char section[] = ".rodata\n";
1822
99a814a1 1823 /* Just pretend this is .section .rodata */
252b5132
RH		 1824 input_line_pointer = section;
1825 obj_elf_section (xxx);
1826
1827 input_line_pointer = save_line;
1828}
1829
99a814a1 1830/* Pseudo op to make file scope bss items. */
252b5132 1831static void
99a814a1 1832ppc_elf_lcomm (xxx)
92161534 1833 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1834{
1835 register char *name;
1836 register char c;
1837 register char *p;
1838 offsetT size;
1839 register symbolS *symbolP;
1840 offsetT align;
1841 segT old_sec;
1842 int old_subsec;
1843 char *pfrag;
1844 int align2;
1845
1846 name = input_line_pointer;
1847 c = get_symbol_end ();
1848
99a814a1 1849 /* just after name is now '\0'. */
252b5132
RH		 1850 p = input_line_pointer;
1851 *p = c;
1852 SKIP_WHITESPACE ();
1853 if (*input_line_pointer != ',')
1854 {
1855 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1856 ignore_rest_of_line ();
1857 return;
1858 }
1859
1860 input_line_pointer++; /* skip ',' */
1861 if ((size = get_absolute_expression ()) < 0)
1862 {
1863 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1864 ignore_rest_of_line ();
1865 return;
1866 }
1867
1868 /* The third argument to .lcomm is the alignment. */
1869 if (*input_line_pointer != ',')
1870 align = 8;
1871 else
1872 {
1873 ++input_line_pointer;
1874 align = get_absolute_expression ();
1875 if (align <= 0)
1876 {
1877 as_warn (_("ignoring bad alignment"));
1878 align = 8;
1879 }
1880 }
1881
1882 *p = 0;
1883 symbolP = symbol_find_or_make (name);
1884 *p = c;
1885
1886 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1887 {
1888 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1889 S_GET_NAME (symbolP));
1890 ignore_rest_of_line ();
1891 return;
1892 }
1893
1894 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1895 {
1896 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1897 S_GET_NAME (symbolP),
1898 (long) S_GET_VALUE (symbolP),
1899 (long) size);
1900
1901 ignore_rest_of_line ();
1902 return;
1903 }
1904
99a814a1 1905 /* Allocate_bss. */
252b5132
RH		 1906 old_sec = now_seg;
1907 old_subsec = now_subseg;
1908 if (align)
1909 {
99a814a1 1910 /* Convert to a power of 2 alignment. */
252b5132
RH		 1911 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1912 if (align != 1)
1913 {
1914 as_bad (_("Common alignment not a power of 2"));
1915 ignore_rest_of_line ();
1916 return;
1917 }
1918 }
1919 else
1920 align2 = 0;
1921
1922 record_alignment (bss_section, align2);
1923 subseg_set (bss_section, 0);
1924 if (align2)
1925 frag_align (align2, 0, 0);
1926 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1927 symbol_get_frag (symbolP)->fr_symbol = 0;
1928 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1929 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1930 (char *) 0);
1931 *pfrag = 0;
1932 S_SET_SIZE (symbolP, size);
1933 S_SET_SEGMENT (symbolP, bss_section);
1934 subseg_set (old_sec, old_subsec);
1935 demand_empty_rest_of_line ();
1936}
1937
1938/* Validate any relocations emitted for -mrelocatable, possibly adding
1939 fixups for word relocations in writable segments, so we can adjust
1940 them at runtime. */
1941static void
1942ppc_elf_validate_fix (fixp, seg)
1943 fixS *fixp;
1944 segT seg;
1945{
1946 if (fixp->fx_done || fixp->fx_pcrel)
1947 return;
1948
1949 switch (shlib)
1950 {
1951 case SHLIB_NONE:
1952 case SHLIB_PIC:
1953 return;
1954
5d6f4f16 1955 case SHLIB_MRELOCATABLE:
252b5132
RH		 1956 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1957 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1958 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1959 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1960 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1961 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1962 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1963 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1964 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1965 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1966 && strcmp (segment_name (seg), ".got2") != 0
1967 && strcmp (segment_name (seg), ".dtors") != 0
1968 && strcmp (segment_name (seg), ".ctors") != 0
1969 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1970 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1971 && strcmp (segment_name (seg), ".eh_frame") != 0
1972 && strcmp (segment_name (seg), ".ex_shared") != 0)
1973 {
1974 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1975 || fixp->fx_r_type != BFD_RELOC_CTOR)
1976 {
1977 as_bad_where (fixp->fx_file, fixp->fx_line,
1978 _("Relocation cannot be done when using -mrelocatable"));
1979 }
1980 }
1981 return;
1982 }
1983}
0baf16f2 1984
7e8d4ab4
AM		 1985/* Prevent elf_frob_file_before_adjust removing a weak undefined
1986 function descriptor sym if the corresponding code sym is used. */
1987
1988void
1989ppc_frob_file_before_adjust ()
0baf16f2 1990{
7e8d4ab4 1991 symbolS *symp;
9232bbb0 1992 asection *toc;
0baf16f2 1993
7e8d4ab4
AM		 1994 if (!ppc_obj64)
1995 return;
1996
1997 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1998 {
7e8d4ab4
AM		 1999 const char *name;
2000 char *dotname;
2001 symbolS *dotsym;
2002 size_t len;
2003
2004 name = S_GET_NAME (symp);
2005 if (name[0] == '.')
2006 continue;
2007
2008 if (! S_IS_WEAK (symp)
2009 || S_IS_DEFINED (symp))
2010 continue;
2011
2012 len = strlen (name) + 1;
2013 dotname = xmalloc (len + 1);
2014 dotname[0] = '.';
2015 memcpy (dotname + 1, name, len);
461b725f 2016 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2017 free (dotname);
2018 if (dotsym != NULL && (symbol_used_p (dotsym)
2019 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2020 symbol_mark_used (symp);
2021
0baf16f2
AM		 2022 }
2023
9232bbb0
AM		 2024 toc = bfd_get_section_by_name (stdoutput, ".toc");
2025 if (toc != NULL
2026 && bfd_section_size (stdoutput, toc) > 0x10000)
2027 as_warn (_("TOC section size exceeds 64k"));
2028
7e8d4ab4
AM		 2029 /* Don't emit .TOC. symbol. */
2030 symp = symbol_find (".TOC.");
2031 if (symp != NULL)
2032 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2033}
252b5132
RH		 2034#endif /* OBJ_ELF */
2035\f
2036#ifdef TE_PE
2037
2038/*
99a814a1 2039 * Summary of parse_toc_entry.
252b5132
RH		 2040 *
2041 * in: Input_line_pointer points to the '[' in one of:
2042 *
2043 * [toc] [tocv] [toc32] [toc64]
2044 *
2045 * Anything else is an error of one kind or another.
2046 *
81d4177b 2047 * out:
252b5132
RH		 2048 * return value: success or failure
2049 * toc_kind: kind of toc reference
2050 * input_line_pointer:
2051 * success: first char after the ']'
2052 * failure: unchanged
2053 *
2054 * settings:
2055 *
2056 * [toc] - rv == success, toc_kind = default_toc
2057 * [tocv] - rv == success, toc_kind = data_in_toc
2058 * [toc32] - rv == success, toc_kind = must_be_32
2059 * [toc64] - rv == success, toc_kind = must_be_64
2060 *
2061 */
2062
81d4177b
KH		 2063enum toc_size_qualifier
2064{
252b5132
RH		 2065 default_toc, /* The toc cell constructed should be the system default size */
2066 data_in_toc, /* This is a direct reference to a toc cell */
2067 must_be_32, /* The toc cell constructed must be 32 bits wide */
2068 must_be_64 /* The toc cell constructed must be 64 bits wide */
2069};
2070
2071static int
99a814a1 2072parse_toc_entry (toc_kind)
252b5132
RH		 2073 enum toc_size_qualifier *toc_kind;
2074{
2075 char *start;
2076 char *toc_spec;
2077 char c;
2078 enum toc_size_qualifier t;
2079
99a814a1 2080 /* Save the input_line_pointer. */
252b5132
RH		 2081 start = input_line_pointer;
2082
99a814a1 2083 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2084 ++input_line_pointer;
2085 SKIP_WHITESPACE ();
81d4177b 2086
99a814a1 2087 /* Find the spelling of the operand. */
252b5132
RH		 2088 toc_spec = input_line_pointer;
2089 c = get_symbol_end ();
2090
99a814a1 2091 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2092 {
2093 t = default_toc;
2094 }
99a814a1 2095 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2096 {
2097 t = data_in_toc;
2098 }
99a814a1 2099 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2100 {
2101 t = must_be_32;
2102 }
99a814a1 2103 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2104 {
2105 t = must_be_64;
2106 }
2107 else
2108 {
2109 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2110 *input_line_pointer = c;
2111 input_line_pointer = start;
252b5132
RH		 2112 return 0;
2113 }
2114
99a814a1
AM		 2115 /* Now find the ']'. */
2116 *input_line_pointer = c;
252b5132 2117
81d4177b
KH		 2118 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2119 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2120
2121 if (c != ']')
2122 {
2123 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2124 input_line_pointer = start;
252b5132
RH		 2125 return 0;
2126 }
2127
99a814a1 2128 *toc_kind = t;
252b5132
RH		 2129 return 1;
2130}
2131#endif
2132\f
2133
dc1d03fc 2134#ifdef OBJ_ELF
6a0c61b7
EZ		 2135#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2136static void
dc1d03fc 2137ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2138 unsigned int apu, version;
2139{
2140 unsigned int i;
2141
2142 /* Check we don't already exist. */
2143 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2144 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2145 return;
b34976b6 2146
6a0c61b7
EZ		 2147 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2148 {
2149 if (ppc_apuinfo_num_alloc == 0)
2150 {
2151 ppc_apuinfo_num_alloc = 4;
2152 ppc_apuinfo_list = (unsigned long *)
2153 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2154 }
2155 else
2156 {
2157 ppc_apuinfo_num_alloc += 4;
2158 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2159 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2160 }
2161 }
dc1d03fc 2162 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2163}
2164#undef APUID
dc1d03fc 2165#endif
6a0c61b7
EZ		 2166\f
2167
252b5132
RH		 2168/* We need to keep a list of fixups. We can't simply generate them as
2169 we go, because that would require us to first create the frag, and
2170 that would screw up references to ``.''. */
2171
2172struct ppc_fixup
2173{
2174 expressionS exp;
2175 int opindex;
2176 bfd_reloc_code_real_type reloc;
2177};
2178
2179#define MAX_INSN_FIXUPS (5)
2180
2181/* This routine is called for each instruction to be assembled. */
2182
2183void
2184md_assemble (str)
2185 char *str;
2186{
2187 char *s;
2188 const struct powerpc_opcode *opcode;
2189 unsigned long insn;
2190 const unsigned char *opindex_ptr;
2191 int skip_optional;
2192 int need_paren;
2193 int next_opindex;
2194 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2195 int fc;
2196 char *f;
09b935ac 2197 int addr_mod;
252b5132
RH		 2198 int i;
2199#ifdef OBJ_ELF
2200 bfd_reloc_code_real_type reloc;
2201#endif
2202
2203 /* Get the opcode. */
3882b010 2204 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2205 ;
2206 if (*s != '\0')
2207 *s++ = '\0';
2208
2209 /* Look up the opcode in the hash table. */
2210 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2211 if (opcode == (const struct powerpc_opcode *) NULL)
2212 {
2213 const struct powerpc_macro *macro;
2214
2215 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2216 if (macro == (const struct powerpc_macro *) NULL)
2217 as_bad (_("Unrecognized opcode: `%s'"), str);
2218 else
2219 ppc_macro (s, macro);
2220
2221 return;
2222 }
2223
2224 insn = opcode->opcode;
2225
2226 str = s;
3882b010 2227 while (ISSPACE (*str))
252b5132
RH		 2228 ++str;
2229
2230 /* PowerPC operands are just expressions. The only real issue is
2231 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2232 an optional operand separate the operands only with commas (in some
2233 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2234 have optional operands). Most instructions with optional operands
2235 have only one. Those that have more than one optional operand can
2236 take either all their operands or none. So, before we start seriously
2237 parsing the operands, we check to see if we have optional operands,
2238 and if we do, we count the number of commas to see which operands
2239 have been omitted. */
252b5132
RH		 2240 skip_optional = 0;
2241 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2242 {
2243 const struct powerpc_operand *operand;
2244
2245 operand = &powerpc_operands[*opindex_ptr];
2246 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2247 {
2248 unsigned int opcount;
7fe9cf6b
NC		 2249 unsigned int num_operands_expected;
2250 unsigned int i;
252b5132
RH		 2251
2252 /* There is an optional operand. Count the number of
2253 commas in the input line. */
2254 if (*str == '\0')
2255 opcount = 0;
2256 else
2257 {
2258 opcount = 1;
2259 s = str;
2260 while ((s = strchr (s, ',')) != (char *) NULL)
2261 {
2262 ++opcount;
2263 ++s;
2264 }
2265 }
2266
7fe9cf6b
NC		 2267 /* Compute the number of expected operands.
2268 Do not count fake operands. */
2269 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2270 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2271 ++ num_operands_expected;
2272
252b5132
RH		 2273 /* If there are fewer operands in the line then are called
2274 for by the instruction, we want to skip the optional
1f6c9eb0 2275 operands. */
7fe9cf6b 2276 if (opcount < num_operands_expected)
252b5132
RH		 2277 skip_optional = 1;
2278
2279 break;
2280 }
2281 }
2282
2283 /* Gather the operands. */
2284 need_paren = 0;
2285 next_opindex = 0;
2286 fc = 0;
2287 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2288 {
2289 const struct powerpc_operand *operand;
2290 const char *errmsg;
2291 char *hold;
2292 expressionS ex;
2293 char endc;
2294
2295 if (next_opindex == 0)
2296 operand = &powerpc_operands[*opindex_ptr];
2297 else
2298 {
2299 operand = &powerpc_operands[next_opindex];
2300 next_opindex = 0;
2301 }
252b5132
RH		 2302 errmsg = NULL;
2303
2304 /* If this is a fake operand, then we do not expect anything
2305 from the input. */
2306 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2307 {
2b3c4602 2308 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2309 if (errmsg != (const char *) NULL)
2310 as_bad (errmsg);
2311 continue;
2312 }
2313
2314 /* If this is an optional operand, and we are skipping it, just
2315 insert a zero. */
2316 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2317 && skip_optional)
2318 {
2319 if (operand->insert)
2320 {
2b3c4602 2321 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2322 if (errmsg != (const char *) NULL)
2323 as_bad (errmsg);
2324 }
2325 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2326 next_opindex = *opindex_ptr + 1;
2327 continue;
2328 }
2329
2330 /* Gather the operand. */
2331 hold = input_line_pointer;
2332 input_line_pointer = str;
2333
2334#ifdef TE_PE
81d4177b 2335 if (*input_line_pointer == '[')
252b5132
RH		 2336 {
2337 /* We are expecting something like the second argument here:
99a814a1
AM		 2338 *
2339 * lwz r4,[toc].GS.0.static_int(rtoc)
2340 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2341 * The argument following the `]' must be a symbol name, and the
2342 * register must be the toc register: 'rtoc' or '2'
2343 *
2344 * The effect is to 0 as the displacement field
2345 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2346 * the appropriate variation) reloc against it based on the symbol.
2347 * The linker will build the toc, and insert the resolved toc offset.
2348 *
2349 * Note:
2350 * o The size of the toc entry is currently assumed to be
2351 * 32 bits. This should not be assumed to be a hard coded
2352 * number.
2353 * o In an effort to cope with a change from 32 to 64 bits,
2354 * there are also toc entries that are specified to be
2355 * either 32 or 64 bits:
2356 * lwz r4,[toc32].GS.0.static_int(rtoc)
2357 * lwz r4,[toc64].GS.0.static_int(rtoc)
2358 * These demand toc entries of the specified size, and the
2359 * instruction probably requires it.
2360 */
252b5132
RH		 2361
2362 int valid_toc;
2363 enum toc_size_qualifier toc_kind;
2364 bfd_reloc_code_real_type toc_reloc;
2365
99a814a1
AM		 2366 /* Go parse off the [tocXX] part. */
2367 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2368
81d4177b 2369 if (!valid_toc)
252b5132 2370 {
99a814a1
AM		 2371 /* Note: message has already been issued.
2372 FIXME: what sort of recovery should we do?
2373 demand_rest_of_line (); return; ? */
252b5132
RH		 2374 }
2375
99a814a1
AM		 2376 /* Now get the symbol following the ']'. */
2377 expression (&ex);
252b5132
RH		 2378
2379 switch (toc_kind)
2380 {
2381 case default_toc:
99a814a1
AM		 2382 /* In this case, we may not have seen the symbol yet,
2383 since it is allowed to appear on a .extern or .globl
2384 or just be a label in the .data section. */
252b5132
RH		 2385 toc_reloc = BFD_RELOC_PPC_TOC16;
2386 break;
2387 case data_in_toc:
99a814a1
AM		 2388 /* 1. The symbol must be defined and either in the toc
2389 section, or a global.
2390 2. The reloc generated must have the TOCDEFN flag set
2391 in upper bit mess of the reloc type.
2392 FIXME: It's a little confusing what the tocv
2393 qualifier can be used for. At the very least, I've
2394 seen three uses, only one of which I'm sure I can
2395 explain. */
81d4177b
KH		 2396 if (ex.X_op == O_symbol)
2397 {
252b5132 2398 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2399 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2400 != tocdata_section)
252b5132 2401 {
99a814a1 2402 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2403 }
2404 }
2405
2406 toc_reloc = BFD_RELOC_PPC_TOC16;
2407 break;
2408 case must_be_32:
99a814a1
AM		 2409 /* FIXME: these next two specifically specify 32/64 bit
2410 toc entries. We don't support them today. Is this
2411 the right way to say that? */
252b5132
RH		 2412 toc_reloc = BFD_RELOC_UNUSED;
2413 as_bad (_("Unimplemented toc32 expression modifier"));
2414 break;
2415 case must_be_64:
99a814a1 2416 /* FIXME: see above. */
252b5132
RH		 2417 toc_reloc = BFD_RELOC_UNUSED;
2418 as_bad (_("Unimplemented toc64 expression modifier"));
2419 break;
2420 default:
bc805888 2421 fprintf (stderr,
99a814a1
AM		 2422 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2423 toc_kind);
bc805888 2424 abort ();
252b5132
RH		 2425 break;
2426 }
2427
2428 /* We need to generate a fixup for this expression. */
2429 if (fc >= MAX_INSN_FIXUPS)
2430 as_fatal (_("too many fixups"));
2431
2432 fixups[fc].reloc = toc_reloc;
2433 fixups[fc].exp = ex;
2434 fixups[fc].opindex = *opindex_ptr;
2435 ++fc;
2436
99a814a1
AM		 2437 /* Ok. We've set up the fixup for the instruction. Now make it
2438 look like the constant 0 was found here. */
252b5132
RH		 2439 ex.X_unsigned = 1;
2440 ex.X_op = O_constant;
2441 ex.X_add_number = 0;
2442 ex.X_add_symbol = NULL;
2443 ex.X_op_symbol = NULL;
2444 }
2445
2446 else
2447#endif /* TE_PE */
2448 {
2449 if (! register_name (&ex))
2450 {
2451 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2452 cr_operand = TRUE;
252b5132 2453 expression (&ex);
b34976b6 2454 cr_operand = FALSE;
252b5132
RH		 2455 }
2456 }
2457
2458 str = input_line_pointer;
2459 input_line_pointer = hold;
2460
2461 if (ex.X_op == O_illegal)
2462 as_bad (_("illegal operand"));
2463 else if (ex.X_op == O_absent)
2464 as_bad (_("missing operand"));
2465 else if (ex.X_op == O_register)
2466 {
2467 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2468 (char *) NULL, 0);
2469 }
2470 else if (ex.X_op == O_constant)
2471 {
2472#ifdef OBJ_ELF
81d4177b 2473 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2474 char *orig_str = str;
2475
2476 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2477 switch (reloc)
2478 {
2479 default:
2480 str = orig_str;
2481 break;
2482
2483 case BFD_RELOC_LO16:
2484 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2485 something which cleared it, we always produce a
2486 signed value. */
2487 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2488 ex.X_add_number &= 0xffff;
2489 else
0baf16f2 2490 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2491 break;
2492
2493 case BFD_RELOC_HI16:
0baf16f2
AM		 2494 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2495 ex.X_add_number = PPC_HI (ex.X_add_number);
2496 else
2497 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2498 break;
2499
2500 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2501 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2502 ex.X_add_number = PPC_HA (ex.X_add_number);
2503 else
2504 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2505 break;
2506
0baf16f2
AM		 2507 case BFD_RELOC_PPC64_HIGHER:
2508 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2509 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2510 else
2511 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2512 break;
2513
2514 case BFD_RELOC_PPC64_HIGHER_S:
2515 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2516 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2517 else
2518 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2519 break;
0baf16f2
AM		 2520
2521 case BFD_RELOC_PPC64_HIGHEST:
2522 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2523 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2524 else
2525 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2526 break;
2527
2528 case BFD_RELOC_PPC64_HIGHEST_S:
2529 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2530 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2531 else
2532 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2533 break;
252b5132 2534 }
0baf16f2 2535#endif /* OBJ_ELF */
252b5132
RH		 2536 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2537 (char *) NULL, 0);
2538 }
2539#ifdef OBJ_ELF
2540 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2541 {
cdba85ec
AM		 2542 /* Some TLS tweaks. */
2543 switch (reloc)
2544 {
2545 default:
2546 break;
2547 case BFD_RELOC_PPC_TLS:
2548 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2549 (char *) NULL, 0);
2550 break;
2551 /* We'll only use the 32 (or 64) bit form of these relocations
2552 in constants. Instructions get the 16 bit form. */
2553 case BFD_RELOC_PPC_DTPREL:
2554 reloc = BFD_RELOC_PPC_DTPREL16;
2555 break;
2556 case BFD_RELOC_PPC_TPREL:
2557 reloc = BFD_RELOC_PPC_TPREL16;
2558 break;
2559 }
2560
99a814a1
AM		 2561 /* For the absolute forms of branches, convert the PC
2562 relative form back into the absolute. */
252b5132
RH		 2563 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2564 {
2565 switch (reloc)
2566 {
2567 case BFD_RELOC_PPC_B26:
2568 reloc = BFD_RELOC_PPC_BA26;
2569 break;
2570 case BFD_RELOC_PPC_B16:
2571 reloc = BFD_RELOC_PPC_BA16;
2572 break;
2573 case BFD_RELOC_PPC_B16_BRTAKEN:
2574 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2575 break;
2576 case BFD_RELOC_PPC_B16_BRNTAKEN:
2577 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2578 break;
2579 default:
2580 break;
2581 }
2582 }
2583
2b3c4602 2584 if (ppc_obj64
adadcc0c 2585 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2586 {
2587 switch (reloc)
2588 {
2589 case BFD_RELOC_16:
2590 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2591 break;
2592 case BFD_RELOC_LO16:
2593 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2594 break;
2595 case BFD_RELOC_16_GOTOFF:
2596 reloc = BFD_RELOC_PPC64_GOT16_DS;
2597 break;
2598 case BFD_RELOC_LO16_GOTOFF:
2599 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2600 break;
2601 case BFD_RELOC_LO16_PLTOFF:
2602 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2603 break;
1cfc59d5 2604 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2605 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2606 break;
2607 case BFD_RELOC_LO16_BASEREL:
2608 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2609 break;
2610 case BFD_RELOC_PPC_TOC16:
2611 reloc = BFD_RELOC_PPC64_TOC16_DS;
2612 break;
2613 case BFD_RELOC_PPC64_TOC16_LO:
2614 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2615 break;
2616 case BFD_RELOC_PPC64_PLTGOT16:
2617 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2618 break;
2619 case BFD_RELOC_PPC64_PLTGOT16_LO:
2620 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2621 break;
cdba85ec
AM		 2622 case BFD_RELOC_PPC_DTPREL16:
2623 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2624 break;
2625 case BFD_RELOC_PPC_DTPREL16_LO:
2626 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2627 break;
2628 case BFD_RELOC_PPC_TPREL16:
2629 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2630 break;
2631 case BFD_RELOC_PPC_TPREL16_LO:
2632 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2633 break;
2634 case BFD_RELOC_PPC_GOT_DTPREL16:
2635 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2636 case BFD_RELOC_PPC_GOT_TPREL16:
2637 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2638 break;
0baf16f2
AM		 2639 default:
2640 as_bad (_("unsupported relocation for DS offset field"));
2641 break;
2642 }
2643 }
2644
252b5132
RH		 2645 /* We need to generate a fixup for this expression. */
2646 if (fc >= MAX_INSN_FIXUPS)
2647 as_fatal (_("too many fixups"));
2648 fixups[fc].exp = ex;
2649 fixups[fc].opindex = 0;
2650 fixups[fc].reloc = reloc;
2651 ++fc;
2652 }
2653#endif /* OBJ_ELF */
2654
2655 else
2656 {
2657 /* We need to generate a fixup for this expression. */
2658 if (fc >= MAX_INSN_FIXUPS)
2659 as_fatal (_("too many fixups"));
2660 fixups[fc].exp = ex;
2661 fixups[fc].opindex = *opindex_ptr;
2662 fixups[fc].reloc = BFD_RELOC_UNUSED;
2663 ++fc;
2664 }
2665
2666 if (need_paren)
2667 {
2668 endc = ')';
2669 need_paren = 0;
2670 }
2671 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2672 {
2673 endc = '(';
2674 need_paren = 1;
2675 }
2676 else
2677 endc = ',';
2678
2679 /* The call to expression should have advanced str past any
2680 whitespace. */
2681 if (*str != endc
2682 && (endc != ',' || *str != '\0'))
2683 {
2684 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2685 break;
2686 }
2687
2688 if (*str != '\0')
2689 ++str;
2690 }
2691
3882b010 2692 while (ISSPACE (*str))
252b5132
RH		 2693 ++str;
2694
2695 if (*str != '\0')
2696 as_bad (_("junk at end of line: `%s'"), str);
2697
dc1d03fc 2698#ifdef OBJ_ELF
6a0c61b7
EZ		 2699 /* Do we need/want a APUinfo section? */
2700 if (ppc_cpu & (PPC_OPCODE_SPE
2701 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2702 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2703 | PPC_OPCODE_RFMCI))
2704 {
2705 /* These are all version "1". */
2706 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2707 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2708 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2709 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2710 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2711 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2712 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2713 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2714 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2715 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2716 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2717 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2718 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2719 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2720 }
dc1d03fc 2721#endif
6a0c61b7 2722
252b5132
RH		 2723 /* Write out the instruction. */
2724 f = frag_more (4);
09b935ac
AM		 2725 addr_mod = frag_now_fix () & 3;
2726 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2727 as_bad (_("instruction address is not a multiple of 4"));
2728 frag_now->insn_addr = addr_mod;
2729 frag_now->has_code = 1;
252b5132
RH		 2730 md_number_to_chars (f, insn, 4);
2731
5d6f4f16
GK		 2732#ifdef OBJ_ELF
2733 dwarf2_emit_insn (4);
2734#endif
2735
252b5132
RH		 2736 /* Create any fixups. At this point we do not use a
2737 bfd_reloc_code_real_type, but instead just use the
2738 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2739 handle fixups for any operand type, although that is admittedly
2740 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2741 md_apply_fix. */
252b5132
RH		 2742 for (i = 0; i < fc; i++)
2743 {
2744 const struct powerpc_operand *operand;
2745
2746 operand = &powerpc_operands[fixups[i].opindex];
2747 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2748 {
99a814a1 2749 reloc_howto_type *reloc_howto;
252b5132
RH		 2750 int size;
2751 int offset;
2752 fixS *fixP;
2753
99a814a1 2754 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2755 if (!reloc_howto)
2756 abort ();
2757
2758 size = bfd_get_reloc_size (reloc_howto);
2759 offset = target_big_endian ? (4 - size) : 0;
2760
2761 if (size < 1 || size > 4)
bc805888 2762 abort ();
252b5132 2763
99a814a1
AM		 2764 fixP = fix_new_exp (frag_now,
2765 f - frag_now->fr_literal + offset,
2766 size,
2767 &fixups[i].exp,
2768 reloc_howto->pc_relative,
252b5132
RH		 2769 fixups[i].reloc);
2770
2771 /* Turn off complaints that the addend is too large for things like
2772 foo+100000@ha. */
2773 switch (fixups[i].reloc)
2774 {
2775 case BFD_RELOC_16_GOTOFF:
2776 case BFD_RELOC_PPC_TOC16:
2777 case BFD_RELOC_LO16:
2778 case BFD_RELOC_HI16:
2779 case BFD_RELOC_HI16_S:
0baf16f2 2780#ifdef OBJ_ELF
0baf16f2
AM		 2781 case BFD_RELOC_PPC64_HIGHER:
2782 case BFD_RELOC_PPC64_HIGHER_S:
2783 case BFD_RELOC_PPC64_HIGHEST:
2784 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2785#endif
252b5132
RH		 2786 fixP->fx_no_overflow = 1;
2787 break;
2788 default:
2789 break;
2790 }
2791 }
2792 else
99a814a1
AM		 2793 fix_new_exp (frag_now,
2794 f - frag_now->fr_literal,
2795 4,
252b5132
RH		 2796 &fixups[i].exp,
2797 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2798 ((bfd_reloc_code_real_type)
99a814a1 2799 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2800 }
2801}
2802
2803/* Handle a macro. Gather all the operands, transform them as
2804 described by the macro, and call md_assemble recursively. All the
2805 operands are separated by commas; we don't accept parentheses
2806 around operands here. */
2807
2808static void
2809ppc_macro (str, macro)
2810 char *str;
2811 const struct powerpc_macro *macro;
2812{
2813 char *operands[10];
2814 unsigned int count;
2815 char *s;
2816 unsigned int len;
2817 const char *format;
db557034 2818 unsigned int arg;
252b5132
RH		 2819 char *send;
2820 char *complete;
2821
2822 /* Gather the users operands into the operands array. */
2823 count = 0;
2824 s = str;
2825 while (1)
2826 {
2827 if (count >= sizeof operands / sizeof operands[0])
2828 break;
2829 operands[count++] = s;
2830 s = strchr (s, ',');
2831 if (s == (char *) NULL)
2832 break;
2833 *s++ = '\0';
81d4177b 2834 }
252b5132
RH		 2835
2836 if (count != macro->operands)
2837 {
2838 as_bad (_("wrong number of operands"));
2839 return;
2840 }
2841
2842 /* Work out how large the string must be (the size is unbounded
2843 because it includes user input). */
2844 len = 0;
2845 format = macro->format;
2846 while (*format != '\0')
2847 {
2848 if (*format != '%')
2849 {
2850 ++len;
2851 ++format;
2852 }
2853 else
2854 {
2855 arg = strtol (format + 1, &send, 10);
db557034 2856 know (send != format && arg < count);
252b5132
RH		 2857 len += strlen (operands[arg]);
2858 format = send;
2859 }
2860 }
2861
2862 /* Put the string together. */
2863 complete = s = (char *) alloca (len + 1);
2864 format = macro->format;
2865 while (*format != '\0')
2866 {
2867 if (*format != '%')
2868 *s++ = *format++;
2869 else
2870 {
2871 arg = strtol (format + 1, &send, 10);
2872 strcpy (s, operands[arg]);
2873 s += strlen (s);
2874 format = send;
2875 }
2876 }
2877 *s = '\0';
2878
2879 /* Assemble the constructed instruction. */
2880 md_assemble (complete);
81d4177b 2881}
252b5132
RH		 2882\f
2883#ifdef OBJ_ELF
99a814a1 2884/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2885
2886int
2887ppc_section_letter (letter, ptr_msg)
2888 int letter;
2889 char **ptr_msg;
2890{
2891 if (letter == 'e')
2892 return SHF_EXCLUDE;
2893
13ae64f3 2894 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2895 return -1;
252b5132
RH		 2896}
2897
2898int
9de8d8f1
RH		 2899ppc_section_word (str, len)
2900 char *str;
2901 size_t len;
252b5132 2902{
9de8d8f1
RH		 2903 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2904 return SHF_EXCLUDE;
252b5132 2905
9de8d8f1 2906 return -1;
252b5132
RH		 2907}
2908
2909int
9de8d8f1
RH		 2910ppc_section_type (str, len)
2911 char *str;
2912 size_t len;
252b5132 2913{
9de8d8f1
RH		 2914 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2915 return SHT_ORDERED;
252b5132 2916
9de8d8f1 2917 return -1;
252b5132
RH		 2918}
2919
2920int
2921ppc_section_flags (flags, attr, type)
2922 int flags;
2923 int attr;
2924 int type;
2925{
2926 if (type == SHT_ORDERED)
2927 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2928
2929 if (attr & SHF_EXCLUDE)
2930 flags |= SEC_EXCLUDE;
2931
2932 return flags;
2933}
2934#endif /* OBJ_ELF */
2935
2936\f
2937/* Pseudo-op handling. */
2938
2939/* The .byte pseudo-op. This is similar to the normal .byte
2940 pseudo-op, but it can also take a single ASCII string. */
2941
2942static void
2943ppc_byte (ignore)
92161534 2944 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2945{
2946 if (*input_line_pointer != '\"')
2947 {
2948 cons (1);
2949 return;
2950 }
2951
2952 /* Gather characters. A real double quote is doubled. Unusual
2953 characters are not permitted. */
2954 ++input_line_pointer;
2955 while (1)
2956 {
2957 char c;
2958
2959 c = *input_line_pointer++;
2960
2961 if (c == '\"')
2962 {
2963 if (*input_line_pointer != '\"')
2964 break;
2965 ++input_line_pointer;
2966 }
2967
2968 FRAG_APPEND_1_CHAR (c);
2969 }
2970
2971 demand_empty_rest_of_line ();
2972}
2973\f
2974#ifdef OBJ_XCOFF
2975
2976/* XCOFF specific pseudo-op handling. */
2977
2978/* This is set if we are creating a .stabx symbol, since we don't want
2979 to handle symbol suffixes for such symbols. */
b34976b6 2980static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2981
2982/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2983 symbols in the .bss segment as though they were local common
67c1ffbe 2984 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2985 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2986
2987static void
2988ppc_comm (lcomm)
2989 int lcomm;
2990{
2991 asection *current_seg = now_seg;
2992 subsegT current_subseg = now_subseg;
2993 char *name;
2994 char endc;
2995 char *end_name;
2996 offsetT size;
2997 offsetT align;
2998 symbolS *lcomm_sym = NULL;
2999 symbolS *sym;
3000 char *pfrag;
3001
3002 name = input_line_pointer;
3003 endc = get_symbol_end ();
3004 end_name = input_line_pointer;
3005 *end_name = endc;
3006
3007 if (*input_line_pointer != ',')
3008 {
3009 as_bad (_("missing size"));
3010 ignore_rest_of_line ();
3011 return;
3012 }
3013 ++input_line_pointer;
3014
3015 size = get_absolute_expression ();
3016 if (size < 0)
3017 {
3018 as_bad (_("negative size"));
3019 ignore_rest_of_line ();
3020 return;
3021 }
3022
3023 if (! lcomm)
3024 {
3025 /* The third argument to .comm is the alignment. */
3026 if (*input_line_pointer != ',')
1ad63b2f 3027 align = 2;
252b5132
RH		 3028 else
3029 {
3030 ++input_line_pointer;
3031 align = get_absolute_expression ();
3032 if (align <= 0)
3033 {
3034 as_warn (_("ignoring bad alignment"));
1ad63b2f 3035 align = 2;
252b5132
RH		 3036 }
3037 }
3038 }
3039 else
3040 {
3041 char *lcomm_name;
3042 char lcomm_endc;
3043
1ad63b2f 3044 if (size <= 4)
252b5132
RH		 3045 align = 2;
3046 else
3047 align = 3;
3048
3049 /* The third argument to .lcomm appears to be the real local
3050 common symbol to create. References to the symbol named in
3051 the first argument are turned into references to the third
3052 argument. */
3053 if (*input_line_pointer != ',')
3054 {
3055 as_bad (_("missing real symbol name"));
3056 ignore_rest_of_line ();
3057 return;
3058 }
3059 ++input_line_pointer;
3060
3061 lcomm_name = input_line_pointer;
3062 lcomm_endc = get_symbol_end ();
81d4177b 3063
252b5132
RH		 3064 lcomm_sym = symbol_find_or_make (lcomm_name);
3065
3066 *input_line_pointer = lcomm_endc;
3067 }
3068
3069 *end_name = '\0';
3070 sym = symbol_find_or_make (name);
3071 *end_name = endc;
3072
3073 if (S_IS_DEFINED (sym)
3074 || S_GET_VALUE (sym) != 0)
3075 {
3076 as_bad (_("attempt to redefine symbol"));
3077 ignore_rest_of_line ();
3078 return;
3079 }
81d4177b 3080
252b5132 3081 record_alignment (bss_section, align);
81d4177b 3082
252b5132
RH		 3083 if (! lcomm
3084 || ! S_IS_DEFINED (lcomm_sym))
3085 {
3086 symbolS *def_sym;
3087 offsetT def_size;
3088
3089 if (! lcomm)
3090 {
3091 def_sym = sym;
3092 def_size = size;
3093 S_SET_EXTERNAL (sym);
3094 }
3095 else
3096 {
809ffe0d 3097 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3098 def_sym = lcomm_sym;
3099 def_size = 0;
3100 }
3101
3102 subseg_set (bss_section, 1);
3103 frag_align (align, 0, 0);
81d4177b 3104
809ffe0d 3105 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3106 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3107 def_size, (char *) NULL);
3108 *pfrag = 0;
3109 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3110 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3111 }
3112 else if (lcomm)
3113 {
3114 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3115 symbol_get_frag (lcomm_sym)->fr_offset =
3116 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3117 &~ ((1 << align) - 1));
809ffe0d
ILT		 3118 if (align > symbol_get_tc (lcomm_sym)->align)
3119 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3120 }
3121
3122 if (lcomm)
3123 {
3124 /* Make sym an offset from lcomm_sym. */
3125 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3126 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3127 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3128 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3129 }
3130
3131 subseg_set (current_seg, current_subseg);
3132
3133 demand_empty_rest_of_line ();
3134}
3135
3136/* The .csect pseudo-op. This switches us into a different
3137 subsegment. The first argument is a symbol whose value is the
3138 start of the .csect. In COFF, csect symbols get special aux
3139 entries defined by the x_csect field of union internal_auxent. The
3140 optional second argument is the alignment (the default is 2). */
3141
3142static void
3143ppc_csect (ignore)
5480ccf3 3144 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3145{
3146 char *name;
3147 char endc;
3148 symbolS *sym;
931e13a6 3149 offsetT align;
252b5132
RH		 3150
3151 name = input_line_pointer;
3152 endc = get_symbol_end ();
81d4177b 3153
252b5132
RH		 3154 sym = symbol_find_or_make (name);
3155
3156 *input_line_pointer = endc;
3157
3158 if (S_GET_NAME (sym)[0] == '\0')
3159 {
3160 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3161 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3162 }
3163
931e13a6 3164 align = 2;
252b5132
RH		 3165 if (*input_line_pointer == ',')
3166 {
3167 ++input_line_pointer;
931e13a6 3168 align = get_absolute_expression ();
252b5132
RH		 3169 }
3170
931e13a6
AM		 3171 ppc_change_csect (sym, align);
3172
252b5132
RH		 3173 demand_empty_rest_of_line ();
3174}
3175
3176/* Change to a different csect. */
3177
3178static void
931e13a6 3179ppc_change_csect (sym, align)
252b5132 3180 symbolS *sym;
931e13a6 3181 offsetT align;
252b5132
RH		 3182{
3183 if (S_IS_DEFINED (sym))
809ffe0d 3184 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3185 else
3186 {
3187 symbolS **list_ptr;
3188 int after_toc;
3189 int hold_chunksize;
3190 symbolS *list;
931e13a6
AM		 3191 int is_code;
3192 segT sec;
252b5132
RH		 3193
3194 /* This is a new csect. We need to look at the symbol class to
3195 figure out whether it should go in the text section or the
3196 data section. */
3197 after_toc = 0;
931e13a6 3198 is_code = 0;
809ffe0d 3199 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3200 {
3201 case XMC_PR:
3202 case XMC_RO:
3203 case XMC_DB:
3204 case XMC_GL:
3205 case XMC_XO:
3206 case XMC_SV:
3207 case XMC_TI:
3208 case XMC_TB:
3209 S_SET_SEGMENT (sym, text_section);
809ffe0d 3210 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3211 ++ppc_text_subsegment;
3212 list_ptr = &ppc_text_csects;
931e13a6 3213 is_code = 1;
252b5132
RH		 3214 break;
3215 case XMC_RW:
3216 case XMC_TC0:
3217 case XMC_TC:
3218 case XMC_DS:
3219 case XMC_UA:
3220 case XMC_BS:
3221 case XMC_UC:
3222 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3223 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3224 == ppc_data_subsegment))
252b5132
RH		 3225 after_toc = 1;
3226 S_SET_SEGMENT (sym, data_section);
809ffe0d 3227 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3228 ++ppc_data_subsegment;
3229 list_ptr = &ppc_data_csects;
3230 break;
3231 default:
3232 abort ();
3233 }
3234
3235 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3236 changing subsegments, so that we don't use a lot of memory
3237 space for what may be a small section. */
252b5132
RH		 3238 hold_chunksize = chunksize;
3239 chunksize = 64;
3240
931e13a6
AM		 3241 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3242 symbol_get_tc (sym)->subseg);
252b5132
RH		 3243
3244 chunksize = hold_chunksize;
3245
3246 if (after_toc)
3247 ppc_after_toc_frag = frag_now;
3248
931e13a6
AM		 3249 record_alignment (sec, align);
3250 if (is_code)
3251 frag_align_code (align, 0);
3252 else
3253 frag_align (align, 0, 0);
3254
809ffe0d 3255 symbol_set_frag (sym, frag_now);
252b5132
RH		 3256 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3257
931e13a6 3258 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3259 symbol_get_tc (sym)->output = 1;
3260 symbol_get_tc (sym)->within = sym;
81d4177b 3261
252b5132 3262 for (list = *list_ptr;
809ffe0d
ILT		 3263 symbol_get_tc (list)->next != (symbolS *) NULL;
3264 list = symbol_get_tc (list)->next)
252b5132 3265 ;
809ffe0d 3266 symbol_get_tc (list)->next = sym;
81d4177b 3267
252b5132 3268 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3269 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3270 &symbol_lastP);
252b5132
RH		 3271 }
3272
3273 ppc_current_csect = sym;
3274}
3275
3276/* This function handles the .text and .data pseudo-ops. These
3277 pseudo-ops aren't really used by XCOFF; we implement them for the
3278 convenience of people who aren't used to XCOFF. */
3279
3280static void
3281ppc_section (type)
3282 int type;
3283{
3284 const char *name;
3285 symbolS *sym;
3286
3287 if (type == 't')
3288 name = ".text[PR]";
3289 else if (type == 'd')
3290 name = ".data[RW]";
3291 else
3292 abort ();
3293
3294 sym = symbol_find_or_make (name);
3295
931e13a6 3296 ppc_change_csect (sym, 2);
252b5132
RH		 3297
3298 demand_empty_rest_of_line ();
3299}
3300
3301/* This function handles the .section pseudo-op. This is mostly to
3302 give an error, since XCOFF only supports .text, .data and .bss, but
3303 we do permit the user to name the text or data section. */
3304
3305static void
3306ppc_named_section (ignore)
5480ccf3 3307 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3308{
3309 char *user_name;
3310 const char *real_name;
3311 char c;
3312 symbolS *sym;
3313
3314 user_name = input_line_pointer;
3315 c = get_symbol_end ();
3316
3317 if (strcmp (user_name, ".text") == 0)
3318 real_name = ".text[PR]";
3319 else if (strcmp (user_name, ".data") == 0)
3320 real_name = ".data[RW]";
3321 else
3322 {
3323 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3324 *input_line_pointer = c;
3325 ignore_rest_of_line ();
3326 return;
3327 }
3328
3329 *input_line_pointer = c;
3330
3331 sym = symbol_find_or_make (real_name);
3332
931e13a6 3333 ppc_change_csect (sym, 2);
252b5132
RH		 3334
3335 demand_empty_rest_of_line ();
3336}
3337
3338/* The .extern pseudo-op. We create an undefined symbol. */
3339
3340static void
3341ppc_extern (ignore)
5480ccf3 3342 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3343{
3344 char *name;
3345 char endc;
3346
3347 name = input_line_pointer;
3348 endc = get_symbol_end ();
3349
3350 (void) symbol_find_or_make (name);
3351
3352 *input_line_pointer = endc;
3353
3354 demand_empty_rest_of_line ();
3355}
3356
3357/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3358
3359static void
3360ppc_lglobl (ignore)
5480ccf3 3361 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3362{
3363 char *name;
3364 char endc;
3365 symbolS *sym;
3366
3367 name = input_line_pointer;
3368 endc = get_symbol_end ();
3369
3370 sym = symbol_find_or_make (name);
3371
3372 *input_line_pointer = endc;
3373
809ffe0d 3374 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3375
3376 demand_empty_rest_of_line ();
3377}
3378
3379/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3380 although I don't know why it bothers. */
3381
3382static void
3383ppc_rename (ignore)
5480ccf3 3384 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3385{
3386 char *name;
3387 char endc;
3388 symbolS *sym;
3389 int len;
3390
3391 name = input_line_pointer;
3392 endc = get_symbol_end ();
3393
3394 sym = symbol_find_or_make (name);
3395
3396 *input_line_pointer = endc;
3397
3398 if (*input_line_pointer != ',')
3399 {
3400 as_bad (_("missing rename string"));
3401 ignore_rest_of_line ();
3402 return;
3403 }
3404 ++input_line_pointer;
3405
809ffe0d 3406 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3407
3408 demand_empty_rest_of_line ();
3409}
3410
3411/* The .stabx pseudo-op. This is similar to a normal .stabs
3412 pseudo-op, but slightly different. A sample is
3413 .stabx "main:F-1",.main,142,0
3414 The first argument is the symbol name to create. The second is the
3415 value, and the third is the storage class. The fourth seems to be
3416 always zero, and I am assuming it is the type. */
3417
3418static void
3419ppc_stabx (ignore)
5480ccf3 3420 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3421{
3422 char *name;
3423 int len;
3424 symbolS *sym;
3425 expressionS exp;
3426
3427 name = demand_copy_C_string (&len);
3428
3429 if (*input_line_pointer != ',')
3430 {
3431 as_bad (_("missing value"));
3432 return;
3433 }
3434 ++input_line_pointer;
3435
b34976b6 3436 ppc_stab_symbol = TRUE;
252b5132 3437 sym = symbol_make (name);
b34976b6 3438 ppc_stab_symbol = FALSE;
252b5132 3439
809ffe0d 3440 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3441
3442 (void) expression (&exp);
3443
3444 switch (exp.X_op)
3445 {
3446 case O_illegal:
3447 case O_absent:
3448 case O_big:
3449 as_bad (_("illegal .stabx expression; zero assumed"));
3450 exp.X_add_number = 0;
3451 /* Fall through. */
3452 case O_constant:
3453 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3454 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3455 break;
3456
3457 case O_symbol:
3458 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3459 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3460 else
3461 {
3462 S_SET_VALUE (sym,
3463 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3464 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3465 }
3466 break;
3467
3468 default:
3469 /* The value is some complex expression. This will probably
99a814a1
AM		 3470 fail at some later point, but this is probably the right
3471 thing to do here. */
809ffe0d 3472 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3473 break;
3474 }
3475
3476 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3477 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3478
3479 if (*input_line_pointer != ',')
3480 {
3481 as_bad (_("missing class"));
3482 return;
3483 }
3484 ++input_line_pointer;
3485
3486 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3487
3488 if (*input_line_pointer != ',')
3489 {
3490 as_bad (_("missing type"));
3491 return;
3492 }
3493 ++input_line_pointer;
3494
3495 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3496
809ffe0d 3497 symbol_get_tc (sym)->output = 1;
252b5132 3498
6877bb43 3499 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3500
809ffe0d 3501 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3502
41ea10b1 3503 /* In this case :
99a814a1 3504
41ea10b1
TR		 3505 .bs name
3506 .stabx "z",arrays_,133,0
3507 .es
99a814a1 3508
41ea10b1 3509 .comm arrays_,13768,3
99a814a1 3510
41ea10b1
TR		 3511 resolve_symbol_value will copy the exp's "within" into sym's when the
3512 offset is 0. Since this seems to be corner case problem,
3513 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3514 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3515
3516 if (exp.X_op == O_symbol)
41ea10b1
TR		 3517 {
3518 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3519 }
6877bb43 3520 }
99a814a1 3521
252b5132
RH		 3522 if (exp.X_op != O_symbol
3523 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3524 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3525 ppc_frob_label (sym);
3526 else
3527 {
3528 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3529 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3530 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3531 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3532 }
3533
3534 demand_empty_rest_of_line ();
3535}
3536
3537/* The .function pseudo-op. This takes several arguments. The first
3538 argument seems to be the external name of the symbol. The second
67c1ffbe 3539 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3540 uses the same name for both. I have no idea what the third and
3541 fourth arguments are meant to be. The optional fifth argument is
3542 an expression for the size of the function. In COFF this symbol
3543 gets an aux entry like that used for a csect. */
3544
3545static void
3546ppc_function (ignore)
5480ccf3 3547 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3548{
3549 char *name;
3550 char endc;
3551 char *s;
3552 symbolS *ext_sym;
3553 symbolS *lab_sym;
3554
3555 name = input_line_pointer;
3556 endc = get_symbol_end ();
3557
3558 /* Ignore any [PR] suffix. */
3559 name = ppc_canonicalize_symbol_name (name);
3560 s = strchr (name, '[');
3561 if (s != (char *) NULL
3562 && strcmp (s + 1, "PR]") == 0)
3563 *s = '\0';
3564
3565 ext_sym = symbol_find_or_make (name);
3566
3567 *input_line_pointer = endc;
3568
3569 if (*input_line_pointer != ',')
3570 {
3571 as_bad (_("missing symbol name"));
3572 ignore_rest_of_line ();
3573 return;
3574 }
3575 ++input_line_pointer;
3576
3577 name = input_line_pointer;
3578 endc = get_symbol_end ();
3579
3580 lab_sym = symbol_find_or_make (name);
3581
3582 *input_line_pointer = endc;
3583
3584 if (ext_sym != lab_sym)
3585 {
809ffe0d
ILT		 3586 expressionS exp;
3587
3588 exp.X_op = O_symbol;
3589 exp.X_add_symbol = lab_sym;
3590 exp.X_op_symbol = NULL;
3591 exp.X_add_number = 0;
3592 exp.X_unsigned = 0;
3593 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3594 }
3595
809ffe0d
ILT		 3596 if (symbol_get_tc (ext_sym)->class == -1)
3597 symbol_get_tc (ext_sym)->class = XMC_PR;
3598 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3599
3600 if (*input_line_pointer == ',')
3601 {
3602 expressionS ignore;
3603
3604 /* Ignore the third argument. */
3605 ++input_line_pointer;
3606 expression (&ignore);
3607 if (*input_line_pointer == ',')
3608 {
3609 /* Ignore the fourth argument. */
3610 ++input_line_pointer;
3611 expression (&ignore);
3612 if (*input_line_pointer == ',')
3613 {
3614 /* The fifth argument is the function size. */
3615 ++input_line_pointer;
809ffe0d
ILT		 3616 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3617 absolute_section,
3618 (valueT) 0,
3619 &zero_address_frag);
3620 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3621 }
3622 }
3623 }
3624
3625 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3626 SF_SET_FUNCTION (ext_sym);
3627 SF_SET_PROCESS (ext_sym);
3628 coff_add_linesym (ext_sym);
3629
3630 demand_empty_rest_of_line ();
3631}
3632
3633/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3634 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3635 with the correct line number */
5d6255fe 3636
8642cce8 3637static symbolS *saved_bi_sym = 0;
252b5132
RH		 3638
3639static void
3640ppc_bf (ignore)
5480ccf3 3641 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3642{
3643 symbolS *sym;
3644
3645 sym = symbol_make (".bf");
3646 S_SET_SEGMENT (sym, text_section);
809ffe0d 3647 symbol_set_frag (sym, frag_now);
252b5132
RH		 3648 S_SET_VALUE (sym, frag_now_fix ());
3649 S_SET_STORAGE_CLASS (sym, C_FCN);
3650
3651 coff_line_base = get_absolute_expression ();
3652
3653 S_SET_NUMBER_AUXILIARY (sym, 1);
3654 SA_SET_SYM_LNNO (sym, coff_line_base);
3655
8642cce8 3656 /* Line number for bi. */
5d6255fe 3657 if (saved_bi_sym)
8642cce8
TR		 3658 {
3659 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3660 saved_bi_sym = 0;
3661 }
5d6255fe 3662
8642cce8 3663
809ffe0d 3664 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3665
3666 ppc_frob_label (sym);
3667
3668 demand_empty_rest_of_line ();
3669}
3670
3671/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3672 ".ef", except that the line number is absolute, not relative to the
3673 most recent ".bf" symbol. */
3674
3675static void
3676ppc_ef (ignore)
5480ccf3 3677 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3678{
3679 symbolS *sym;
3680
3681 sym = symbol_make (".ef");
3682 S_SET_SEGMENT (sym, text_section);
809ffe0d 3683 symbol_set_frag (sym, frag_now);
252b5132
RH		 3684 S_SET_VALUE (sym, frag_now_fix ());
3685 S_SET_STORAGE_CLASS (sym, C_FCN);
3686 S_SET_NUMBER_AUXILIARY (sym, 1);
3687 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3688 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3689
3690 ppc_frob_label (sym);
3691
3692 demand_empty_rest_of_line ();
3693}
3694
3695/* The .bi and .ei pseudo-ops. These take a string argument and
3696 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3697 the symbol list. The value of .bi will be know when the next .bf
3698 is encountered. */
252b5132
RH		 3699
3700static void
3701ppc_biei (ei)
3702 int ei;
3703{
3704 static symbolS *last_biei;
3705
3706 char *name;
3707 int len;
3708 symbolS *sym;
3709 symbolS *look;
3710
3711 name = demand_copy_C_string (&len);
3712
3713 /* The value of these symbols is actually file offset. Here we set
3714 the value to the index into the line number entries. In
3715 ppc_frob_symbols we set the fix_line field, which will cause BFD
3716 to do the right thing. */
3717
3718 sym = symbol_make (name);
3719 /* obj-coff.c currently only handles line numbers correctly in the
3720 .text section. */
3721 S_SET_SEGMENT (sym, text_section);
3722 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3723 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3724
3725 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3726 symbol_get_tc (sym)->output = 1;
81d4177b 3727
8642cce8 3728 /* Save bi. */
5d6255fe 3729 if (ei)
8642cce8
TR		 3730 saved_bi_sym = 0;
3731 else
3732 saved_bi_sym = sym;
3733
252b5132
RH		 3734 for (look = last_biei ? last_biei : symbol_rootP;
3735 (look != (symbolS *) NULL
3736 && (S_GET_STORAGE_CLASS (look) == C_FILE
3737 || S_GET_STORAGE_CLASS (look) == C_BINCL
3738 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3739 look = symbol_next (look))
3740 ;
3741 if (look != (symbolS *) NULL)
3742 {
3743 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3744 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3745 last_biei = sym;
3746 }
3747
3748 demand_empty_rest_of_line ();
3749}
3750
3751/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3752 There is one argument, which is a csect symbol. The value of the
3753 .bs symbol is the index of this csect symbol. */
3754
3755static void
3756ppc_bs (ignore)
5480ccf3 3757 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3758{
3759 char *name;
3760 char endc;
3761 symbolS *csect;
3762 symbolS *sym;
3763
3764 if (ppc_current_block != NULL)
3765 as_bad (_("nested .bs blocks"));
3766
3767 name = input_line_pointer;
3768 endc = get_symbol_end ();
3769
3770 csect = symbol_find_or_make (name);
3771
3772 *input_line_pointer = endc;
3773
3774 sym = symbol_make (".bs");
3775 S_SET_SEGMENT (sym, now_seg);
3776 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3777 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3778 symbol_get_tc (sym)->output = 1;
252b5132 3779
809ffe0d 3780 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3781
3782 ppc_frob_label (sym);
3783
3784 ppc_current_block = sym;
3785
3786 demand_empty_rest_of_line ();
3787}
3788
3789/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3790
3791static void
3792ppc_es (ignore)
5480ccf3 3793 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3794{
3795 symbolS *sym;
3796
3797 if (ppc_current_block == NULL)
3798 as_bad (_(".es without preceding .bs"));
3799
3800 sym = symbol_make (".es");
3801 S_SET_SEGMENT (sym, now_seg);
3802 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3803 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3804 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3805
3806 ppc_frob_label (sym);
3807
3808 ppc_current_block = NULL;
3809
3810 demand_empty_rest_of_line ();
3811}
3812
3813/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3814 line number. */
3815
3816static void
3817ppc_bb (ignore)
5480ccf3 3818 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3819{
3820 symbolS *sym;
3821
3822 sym = symbol_make (".bb");
3823 S_SET_SEGMENT (sym, text_section);
809ffe0d 3824 symbol_set_frag (sym, frag_now);
252b5132
RH		 3825 S_SET_VALUE (sym, frag_now_fix ());
3826 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3827
3828 S_SET_NUMBER_AUXILIARY (sym, 1);
3829 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3830
809ffe0d 3831 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3832
3833 SF_SET_PROCESS (sym);
3834
3835 ppc_frob_label (sym);
3836
3837 demand_empty_rest_of_line ();
3838}
3839
3840/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3841 line number. */
3842
3843static void
3844ppc_eb (ignore)
5480ccf3 3845 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3846{
3847 symbolS *sym;
3848
3849 sym = symbol_make (".eb");
3850 S_SET_SEGMENT (sym, text_section);
809ffe0d 3851 symbol_set_frag (sym, frag_now);
252b5132
RH		 3852 S_SET_VALUE (sym, frag_now_fix ());
3853 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3854 S_SET_NUMBER_AUXILIARY (sym, 1);
3855 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3856 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3857
3858 SF_SET_PROCESS (sym);
3859
3860 ppc_frob_label (sym);
3861
3862 demand_empty_rest_of_line ();
3863}
3864
3865/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3866 specified name. */
3867
3868static void
3869ppc_bc (ignore)
5480ccf3 3870 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3871{
3872 char *name;
3873 int len;
3874 symbolS *sym;
3875
3876 name = demand_copy_C_string (&len);
3877 sym = symbol_make (name);
3878 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3879 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3880 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3881 S_SET_VALUE (sym, 0);
809ffe0d 3882 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3883
3884 ppc_frob_label (sym);
3885
3886 demand_empty_rest_of_line ();
3887}
3888
3889/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3890
3891static void
3892ppc_ec (ignore)
5480ccf3 3893 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3894{
3895 symbolS *sym;
3896
3897 sym = symbol_make (".ec");
3898 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3899 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3900 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3901 S_SET_VALUE (sym, 0);
809ffe0d 3902 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3903
3904 ppc_frob_label (sym);
3905
3906 demand_empty_rest_of_line ();
3907}
3908
3909/* The .toc pseudo-op. Switch to the .toc subsegment. */
3910
3911static void
3912ppc_toc (ignore)
5480ccf3 3913 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3914{
3915 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3916 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3917 else
3918 {
3919 subsegT subseg;
3920 symbolS *sym;
3921 symbolS *list;
81d4177b 3922
252b5132
RH		 3923 subseg = ppc_data_subsegment;
3924 ++ppc_data_subsegment;
3925
3926 subseg_new (segment_name (data_section), subseg);
3927 ppc_toc_frag = frag_now;
3928
3929 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3930 symbol_set_frag (sym, frag_now);
252b5132
RH		 3931 S_SET_SEGMENT (sym, data_section);
3932 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3933 symbol_get_tc (sym)->subseg = subseg;
3934 symbol_get_tc (sym)->output = 1;
3935 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3936
3937 ppc_toc_csect = sym;
81d4177b 3938
252b5132 3939 for (list = ppc_data_csects;
809ffe0d
ILT		 3940 symbol_get_tc (list)->next != (symbolS *) NULL;
3941 list = symbol_get_tc (list)->next)
252b5132 3942 ;
809ffe0d 3943 symbol_get_tc (list)->next = sym;
252b5132
RH		 3944
3945 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3946 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3947 &symbol_lastP);
252b5132
RH		 3948 }
3949
3950 ppc_current_csect = ppc_toc_csect;
3951
3952 demand_empty_rest_of_line ();
3953}
3954
3955/* The AIX assembler automatically aligns the operands of a .long or
3956 .short pseudo-op, and we want to be compatible. */
3957
3958static void
3959ppc_xcoff_cons (log_size)
3960 int log_size;
3961{
3962 frag_align (log_size, 0, 0);
3963 record_alignment (now_seg, log_size);
3964 cons (1 << log_size);
3965}
3966
3967static void
3968ppc_vbyte (dummy)
5480ccf3 3969 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3970{
3971 expressionS exp;
3972 int byte_count;
3973
3974 (void) expression (&exp);
3975
3976 if (exp.X_op != O_constant)
3977 {
3978 as_bad (_("non-constant byte count"));
3979 return;
3980 }
3981
3982 byte_count = exp.X_add_number;
3983
3984 if (*input_line_pointer != ',')
3985 {
3986 as_bad (_("missing value"));
3987 return;
3988 }
3989
3990 ++input_line_pointer;
3991 cons (byte_count);
3992}
3993
3994#endif /* OBJ_XCOFF */
0baf16f2 3995#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3996\f
3997/* The .tc pseudo-op. This is used when generating either XCOFF or
3998 ELF. This takes two or more arguments.
3999
4000 When generating XCOFF output, the first argument is the name to
4001 give to this location in the toc; this will be a symbol with class
0baf16f2 4002 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4003 this location in the TOC; often there is just one more argument, a
1049f94e 4004 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4005 depends on target word size. A 32-bit target uses 4-byte values, a
4006 64-bit target uses 8-byte values.
252b5132
RH		 4007
4008 When not generating XCOFF output, the arguments are the same, but
4009 the first argument is simply ignored. */
4010
4011static void
4012ppc_tc (ignore)
92161534 4013 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4014{
4015#ifdef OBJ_XCOFF
4016
4017 /* Define the TOC symbol name. */
4018 {
4019 char *name;
4020 char endc;
4021 symbolS *sym;
4022
4023 if (ppc_toc_csect == (symbolS *) NULL
4024 || ppc_toc_csect != ppc_current_csect)
4025 {
4026 as_bad (_(".tc not in .toc section"));
4027 ignore_rest_of_line ();
4028 return;
4029 }
4030
4031 name = input_line_pointer;
4032 endc = get_symbol_end ();
4033
4034 sym = symbol_find_or_make (name);
4035
4036 *input_line_pointer = endc;
4037
4038 if (S_IS_DEFINED (sym))
4039 {
4040 symbolS *label;
4041
809ffe0d
ILT		 4042 label = symbol_get_tc (ppc_current_csect)->within;
4043 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4044 {
4045 as_bad (_(".tc with no label"));
4046 ignore_rest_of_line ();
4047 return;
4048 }
4049
4050 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4051 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4052 S_SET_VALUE (label, S_GET_VALUE (sym));
4053
4054 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4055 ++input_line_pointer;
4056
4057 return;
4058 }
4059
4060 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4061 symbol_set_frag (sym, frag_now);
252b5132 4062 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4063 symbol_get_tc (sym)->class = XMC_TC;
4064 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4065
4066 ppc_frob_label (sym);
4067 }
4068
0baf16f2
AM		 4069#endif /* OBJ_XCOFF */
4070#ifdef OBJ_ELF
9c7977b3 4071 int align;
252b5132
RH		 4072
4073 /* Skip the TOC symbol name. */
4074 while (is_part_of_name (*input_line_pointer)
4075 || *input_line_pointer == '['
4076 || *input_line_pointer == ']'
4077 || *input_line_pointer == '{'
4078 || *input_line_pointer == '}')
4079 ++input_line_pointer;
4080
0baf16f2 4081 /* Align to a four/eight byte boundary. */
2b3c4602 4082 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4083 frag_align (align, 0, 0);
4084 record_alignment (now_seg, align);
0baf16f2 4085#endif /* OBJ_ELF */
252b5132
RH		 4086
4087 if (*input_line_pointer != ',')
4088 demand_empty_rest_of_line ();
4089 else
4090 {
4091 ++input_line_pointer;
2b3c4602 4092 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4093 }
4094}
0baf16f2
AM		 4095
4096/* Pseudo-op .machine. */
0baf16f2
AM		 4097
4098static void
4099ppc_machine (ignore)
4100 int ignore ATTRIBUTE_UNUSED;
4101{
69c040df
AM		 4102 char *cpu_string;
4103#define MAX_HISTORY 100
4104 static unsigned long *cpu_history;
4105 static int curr_hist;
4106
4107 SKIP_WHITESPACE ();
4108
4109 if (*input_line_pointer == '"')
4110 {
4111 int len;
4112 cpu_string = demand_copy_C_string (&len);
4113 }
4114 else
4115 {
4116 char c;
4117 cpu_string = input_line_pointer;
4118 c = get_symbol_end ();
4119 cpu_string = xstrdup (cpu_string);
4120 *input_line_pointer = c;
4121 }
4122
4123 if (cpu_string != NULL)
4124 {
4125 unsigned long old_cpu = ppc_cpu;
4126 char *p;
4127
4128 for (p = cpu_string; *p != 0; p++)
4129 *p = TOLOWER (*p);
4130
4131 if (strcmp (cpu_string, "push") == 0)
4132 {
4133 if (cpu_history == NULL)
4134 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4135
4136 if (curr_hist >= MAX_HISTORY)
4137 as_bad (_(".machine stack overflow"));
4138 else
4139 cpu_history[curr_hist++] = ppc_cpu;
4140 }
4141 else if (strcmp (cpu_string, "pop") == 0)
4142 {
4143 if (curr_hist <= 0)
4144 as_bad (_(".machine stack underflow"));
4145 else
4146 ppc_cpu = cpu_history[--curr_hist];
4147 }
4148 else if (parse_cpu (cpu_string))
4149 ;
4150 else
4151 as_bad (_("invalid machine `%s'"), cpu_string);
4152
4153 if (ppc_cpu != old_cpu)
4154 ppc_setup_opcodes ();
4155 }
4156
4157 demand_empty_rest_of_line ();
0baf16f2
AM		 4158}
4159
4160/* See whether a symbol is in the TOC section. */
4161
4162static int
4163ppc_is_toc_sym (sym)
4164 symbolS *sym;
4165{
4166#ifdef OBJ_XCOFF
4167 return symbol_get_tc (sym)->class == XMC_TC;
4168#endif
4169#ifdef OBJ_ELF
4170 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4171 if (ppc_obj64)
0baf16f2
AM		 4172 return strcmp (sname, ".toc") == 0;
4173 else
4174 return strcmp (sname, ".got") == 0;
4175#endif
4176}
4177#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4178\f
4179#ifdef TE_PE
4180
99a814a1 4181/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4182
4183/* Set the current section. */
4184static void
4185ppc_set_current_section (new)
4186 segT new;
4187{
4188 ppc_previous_section = ppc_current_section;
4189 ppc_current_section = new;
4190}
4191
4192/* pseudo-op: .previous
4193 behaviour: toggles the current section with the previous section.
4194 errors: None
99a814a1
AM		 4195 warnings: "No previous section" */
4196
252b5132 4197static void
99a814a1 4198ppc_previous (ignore)
5480ccf3 4199 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4200{
4201 symbolS *tmp;
4202
81d4177b 4203 if (ppc_previous_section == NULL)
252b5132 4204 {
99a814a1 4205 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4206 return;
4207 }
4208
99a814a1 4209 subseg_set (ppc_previous_section, 0);
252b5132 4210
99a814a1 4211 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4212}
4213
4214/* pseudo-op: .pdata
4215 behaviour: predefined read only data section
b34976b6 4216 double word aligned
252b5132
RH		 4217 errors: None
4218 warnings: None
4219 initial: .section .pdata "adr3"
b34976b6 4220 a - don't know -- maybe a misprint
252b5132
RH		 4221 d - initialized data
4222 r - readable
4223 3 - double word aligned (that would be 4 byte boundary)
4224
4225 commentary:
4226 Tag index tables (also known as the function table) for exception
99a814a1 4227 handling, debugging, etc. */
252b5132 4228
252b5132 4229static void
99a814a1 4230ppc_pdata (ignore)
5480ccf3 4231 int ignore ATTRIBUTE_UNUSED;
252b5132 4232{
81d4177b 4233 if (pdata_section == 0)
252b5132
RH		 4234 {
4235 pdata_section = subseg_new (".pdata", 0);
81d4177b 4236
252b5132
RH		 4237 bfd_set_section_flags (stdoutput, pdata_section,
4238 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4239 | SEC_READONLY | SEC_DATA ));
81d4177b 4240
252b5132
RH		 4241 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4242 }
4243 else
4244 {
99a814a1 4245 pdata_section = subseg_new (".pdata", 0);
252b5132 4246 }
99a814a1 4247 ppc_set_current_section (pdata_section);
252b5132
RH		 4248}
4249
4250/* pseudo-op: .ydata
4251 behaviour: predefined read only data section
b34976b6 4252 double word aligned
252b5132
RH		 4253 errors: None
4254 warnings: None
4255 initial: .section .ydata "drw3"
b34976b6 4256 a - don't know -- maybe a misprint
252b5132
RH		 4257 d - initialized data
4258 r - readable
4259 3 - double word aligned (that would be 4 byte boundary)
4260 commentary:
4261 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4262 debugging, etc. */
4263
252b5132 4264static void
99a814a1 4265ppc_ydata (ignore)
5480ccf3 4266 int ignore ATTRIBUTE_UNUSED;
252b5132 4267{
81d4177b 4268 if (ydata_section == 0)
252b5132
RH		 4269 {
4270 ydata_section = subseg_new (".ydata", 0);
4271 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4272 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4273 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4274
4275 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4276 }
4277 else
4278 {
4279 ydata_section = subseg_new (".ydata", 0);
4280 }
99a814a1 4281 ppc_set_current_section (ydata_section);
252b5132
RH		 4282}
4283
4284/* pseudo-op: .reldata
4285 behaviour: predefined read write data section
b34976b6 4286 double word aligned (4-byte)
252b5132
RH		 4287 FIXME: relocation is applied to it
4288 FIXME: what's the difference between this and .data?
4289 errors: None
4290 warnings: None
4291 initial: .section .reldata "drw3"
4292 d - initialized data
4293 r - readable
4294 w - writeable
4295 3 - double word aligned (that would be 8 byte boundary)
4296
4297 commentary:
4298 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4299 function descriptors, etc. */
4300
252b5132 4301static void
99a814a1 4302ppc_reldata (ignore)
5480ccf3 4303 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4304{
4305 if (reldata_section == 0)
4306 {
4307 reldata_section = subseg_new (".reldata", 0);
4308
4309 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4310 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4311 | SEC_DATA));
252b5132
RH		 4312
4313 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4314 }
4315 else
4316 {
4317 reldata_section = subseg_new (".reldata", 0);
4318 }
99a814a1 4319 ppc_set_current_section (reldata_section);
252b5132
RH		 4320}
4321
4322/* pseudo-op: .rdata
4323 behaviour: predefined read only data section
b34976b6 4324 double word aligned
252b5132
RH		 4325 errors: None
4326 warnings: None
4327 initial: .section .rdata "dr3"
4328 d - initialized data
4329 r - readable
99a814a1
AM		 4330 3 - double word aligned (that would be 4 byte boundary) */
4331
252b5132 4332static void
99a814a1 4333ppc_rdata (ignore)
5480ccf3 4334 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4335{
4336 if (rdata_section == 0)
4337 {
4338 rdata_section = subseg_new (".rdata", 0);
4339 bfd_set_section_flags (stdoutput, rdata_section,
4340 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4341 | SEC_READONLY | SEC_DATA ));
4342
4343 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4344 }
4345 else
4346 {
4347 rdata_section = subseg_new (".rdata", 0);
4348 }
99a814a1 4349 ppc_set_current_section (rdata_section);
252b5132
RH		 4350}
4351
4352/* pseudo-op: .ualong
81d4177b 4353 behaviour: much like .int, with the exception that no alignment is
b34976b6 4354 performed.
252b5132
RH		 4355 FIXME: test the alignment statement
4356 errors: None
99a814a1
AM		 4357 warnings: None */
4358
252b5132 4359static void
99a814a1 4360ppc_ualong (ignore)
5480ccf3 4361 int ignore ATTRIBUTE_UNUSED;
252b5132 4362{
99a814a1
AM		 4363 /* Try for long. */
4364 cons (4);
252b5132
RH		 4365}
4366
4367/* pseudo-op: .znop <symbol name>
4368 behaviour: Issue a nop instruction
b34976b6 4369 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4370 the supplied symbol name.
4371 errors: None
99a814a1
AM		 4372 warnings: Missing symbol name */
4373
252b5132 4374static void
99a814a1 4375ppc_znop (ignore)
5480ccf3 4376 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4377{
4378 unsigned long insn;
4379 const struct powerpc_opcode *opcode;
4380 expressionS ex;
4381 char *f;
252b5132 4382 symbolS *sym;
252b5132
RH		 4383 char *symbol_name;
4384 char c;
4385 char *name;
4386 unsigned int exp;
4387 flagword flags;
4388 asection *sec;
4389
99a814a1 4390 /* Strip out the symbol name. */
252b5132
RH		 4391 symbol_name = input_line_pointer;
4392 c = get_symbol_end ();
4393
4394 name = xmalloc (input_line_pointer - symbol_name + 1);
4395 strcpy (name, symbol_name);
4396
4397 sym = symbol_find_or_make (name);
4398
4399 *input_line_pointer = c;
4400
4401 SKIP_WHITESPACE ();
4402
4403 /* Look up the opcode in the hash table. */
4404 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4405
99a814a1 4406 /* Stick in the nop. */
252b5132
RH		 4407 insn = opcode->opcode;
4408
4409 /* Write out the instruction. */
4410 f = frag_more (4);
4411 md_number_to_chars (f, insn, 4);
4412 fix_new (frag_now,
4413 f - frag_now->fr_literal,
4414 4,
4415 sym,
4416 0,
4417 0,
4418 BFD_RELOC_16_GOT_PCREL);
4419
4420}
4421
81d4177b
KH		 4422/* pseudo-op:
4423 behaviour:
4424 errors:
99a814a1
AM		 4425 warnings: */
4426
252b5132 4427static void
99a814a1 4428ppc_pe_comm (lcomm)
252b5132
RH		 4429 int lcomm;
4430{
4431 register char *name;
4432 register char c;
4433 register char *p;
4434 offsetT temp;
4435 register symbolS *symbolP;
4436 offsetT align;
4437
4438 name = input_line_pointer;
4439 c = get_symbol_end ();
4440
99a814a1 4441 /* just after name is now '\0'. */
252b5132
RH		 4442 p = input_line_pointer;
4443 *p = c;
4444 SKIP_WHITESPACE ();
4445 if (*input_line_pointer != ',')
4446 {
4447 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4448 ignore_rest_of_line ();
4449 return;
4450 }
4451
4452 input_line_pointer++; /* skip ',' */
4453 if ((temp = get_absolute_expression ()) < 0)
4454 {
4455 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4456 ignore_rest_of_line ();
4457 return;
4458 }
4459
4460 if (! lcomm)
4461 {
4462 /* The third argument to .comm is the alignment. */
4463 if (*input_line_pointer != ',')
4464 align = 3;
4465 else
4466 {
4467 ++input_line_pointer;
4468 align = get_absolute_expression ();
4469 if (align <= 0)
4470 {
4471 as_warn (_("ignoring bad alignment"));
4472 align = 3;
4473 }
4474 }
4475 }
4476
4477 *p = 0;
4478 symbolP = symbol_find_or_make (name);
4479
4480 *p = c;
4481 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4482 {
4483 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4484 S_GET_NAME (symbolP));
4485 ignore_rest_of_line ();
4486 return;
4487 }
4488
4489 if (S_GET_VALUE (symbolP))
4490 {
4491 if (S_GET_VALUE (symbolP) != (valueT) temp)
4492 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4493 S_GET_NAME (symbolP),
4494 (long) S_GET_VALUE (symbolP),
4495 (long) temp);
4496 }
4497 else
4498 {
4499 S_SET_VALUE (symbolP, (valueT) temp);
4500 S_SET_EXTERNAL (symbolP);
86ebace2 4501 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4502 }
4503
4504 demand_empty_rest_of_line ();
4505}
4506
4507/*
4508 * implement the .section pseudo op:
4509 * .section name {, "flags"}
4510 * ^ ^
4511 * | +--- optional flags: 'b' for bss
4512 * | 'i' for info
4513 * +-- section name 'l' for lib
4514 * 'n' for noload
4515 * 'o' for over
4516 * 'w' for data
4517 * 'd' (apparently m88k for data)
4518 * 'x' for text
4519 * But if the argument is not a quoted string, treat it as a
4520 * subsegment number.
4521 *
4522 * FIXME: this is a copy of the section processing from obj-coff.c, with
4523 * additions/changes for the moto-pas assembler support. There are three
4524 * categories:
4525 *
81d4177b 4526 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4527 * setting bits that bfd probably neither understands or uses. The
4528 * correct approach (?) will have to incorporate extra fields attached
4529 * to the section to hold the system specific stuff. (krk)
4530 *
4531 * Section Contents:
4532 * 'a' - unknown - referred to in documentation, but no definition supplied
4533 * 'c' - section has code
4534 * 'd' - section has initialized data
4535 * 'u' - section has uninitialized data
4536 * 'i' - section contains directives (info)
4537 * 'n' - section can be discarded
4538 * 'R' - remove section at link time
4539 *
4540 * Section Protection:
4541 * 'r' - section is readable
4542 * 'w' - section is writeable
4543 * 'x' - section is executable
4544 * 's' - section is sharable
4545 *
4546 * Section Alignment:
4547 * '0' - align to byte boundary
4548 * '1' - align to halfword undary
4549 * '2' - align to word boundary
4550 * '3' - align to doubleword boundary
4551 * '4' - align to quadword boundary
4552 * '5' - align to 32 byte boundary
4553 * '6' - align to 64 byte boundary
4554 *
4555 */
4556
4557void
4558ppc_pe_section (ignore)
5480ccf3 4559 int ignore ATTRIBUTE_UNUSED;
252b5132 4560{
99a814a1 4561 /* Strip out the section name. */
252b5132
RH		 4562 char *section_name;
4563 char c;
4564 char *name;
4565 unsigned int exp;
4566 flagword flags;
4567 segT sec;
4568 int align;
4569
4570 section_name = input_line_pointer;
4571 c = get_symbol_end ();
4572
4573 name = xmalloc (input_line_pointer - section_name + 1);
4574 strcpy (name, section_name);
4575
4576 *input_line_pointer = c;
4577
4578 SKIP_WHITESPACE ();
4579
4580 exp = 0;
4581 flags = SEC_NO_FLAGS;
4582
4583 if (strcmp (name, ".idata$2") == 0)
4584 {
4585 align = 0;
4586 }
4587 else if (strcmp (name, ".idata$3") == 0)
4588 {
4589 align = 0;
4590 }
4591 else if (strcmp (name, ".idata$4") == 0)
4592 {
4593 align = 2;
4594 }
4595 else if (strcmp (name, ".idata$5") == 0)
4596 {
4597 align = 2;
4598 }
4599 else if (strcmp (name, ".idata$6") == 0)
4600 {
4601 align = 1;
4602 }
4603 else
99a814a1
AM		 4604 /* Default alignment to 16 byte boundary. */
4605 align = 4;
252b5132
RH		 4606
4607 if (*input_line_pointer == ',')
4608 {
4609 ++input_line_pointer;
4610 SKIP_WHITESPACE ();
4611 if (*input_line_pointer != '"')
4612 exp = get_absolute_expression ();
4613 else
4614 {
4615 ++input_line_pointer;
4616 while (*input_line_pointer != '"'
4617 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4618 {
4619 switch (*input_line_pointer)
4620 {
4621 /* Section Contents */
4622 case 'a': /* unknown */
4623 as_bad (_("Unsupported section attribute -- 'a'"));
4624 break;
4625 case 'c': /* code section */
81d4177b 4626 flags |= SEC_CODE;
252b5132
RH		 4627 break;
4628 case 'd': /* section has initialized data */
4629 flags |= SEC_DATA;
4630 break;
4631 case 'u': /* section has uninitialized data */
4632 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4633 in winnt.h */
4634 flags |= SEC_ROM;
4635 break;
4636 case 'i': /* section contains directives (info) */
4637 /* FIXME: This is IMAGE_SCN_LNK_INFO
4638 in winnt.h */
4639 flags |= SEC_HAS_CONTENTS;
4640 break;
4641 case 'n': /* section can be discarded */
81d4177b 4642 flags &=~ SEC_LOAD;
252b5132
RH		 4643 break;
4644 case 'R': /* Remove section at link time */
4645 flags |= SEC_NEVER_LOAD;
4646 break;
4647
4648 /* Section Protection */
4649 case 'r': /* section is readable */
4650 flags |= IMAGE_SCN_MEM_READ;
4651 break;
4652 case 'w': /* section is writeable */
4653 flags |= IMAGE_SCN_MEM_WRITE;
4654 break;
4655 case 'x': /* section is executable */
4656 flags |= IMAGE_SCN_MEM_EXECUTE;
4657 break;
4658 case 's': /* section is sharable */
4659 flags |= IMAGE_SCN_MEM_SHARED;
4660 break;
4661
4662 /* Section Alignment */
4663 case '0': /* align to byte boundary */
4664 flags |= IMAGE_SCN_ALIGN_1BYTES;
4665 align = 0;
4666 break;
4667 case '1': /* align to halfword boundary */
4668 flags |= IMAGE_SCN_ALIGN_2BYTES;
4669 align = 1;
4670 break;
4671 case '2': /* align to word boundary */
4672 flags |= IMAGE_SCN_ALIGN_4BYTES;
4673 align = 2;
4674 break;
4675 case '3': /* align to doubleword boundary */
4676 flags |= IMAGE_SCN_ALIGN_8BYTES;
4677 align = 3;
4678 break;
4679 case '4': /* align to quadword boundary */
4680 flags |= IMAGE_SCN_ALIGN_16BYTES;
4681 align = 4;
4682 break;
4683 case '5': /* align to 32 byte boundary */
4684 flags |= IMAGE_SCN_ALIGN_32BYTES;
4685 align = 5;
4686 break;
4687 case '6': /* align to 64 byte boundary */
4688 flags |= IMAGE_SCN_ALIGN_64BYTES;
4689 align = 6;
4690 break;
4691
4692 default:
99a814a1
AM		 4693 as_bad (_("unknown section attribute '%c'"),
4694 *input_line_pointer);
252b5132
RH		 4695 break;
4696 }
4697 ++input_line_pointer;
4698 }
4699 if (*input_line_pointer == '"')
4700 ++input_line_pointer;
4701 }
4702 }
4703
4704 sec = subseg_new (name, (subsegT) exp);
4705
99a814a1 4706 ppc_set_current_section (sec);
252b5132
RH		 4707
4708 if (flags != SEC_NO_FLAGS)
4709 {
4710 if (! bfd_set_section_flags (stdoutput, sec, flags))
4711 as_bad (_("error setting flags for \"%s\": %s"),
4712 bfd_section_name (stdoutput, sec),
4713 bfd_errmsg (bfd_get_error ()));
4714 }
4715
99a814a1 4716 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4717
4718}
4719
4720static void
4721ppc_pe_function (ignore)
5480ccf3 4722 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4723{
4724 char *name;
4725 char endc;
4726 symbolS *ext_sym;
4727
4728 name = input_line_pointer;
4729 endc = get_symbol_end ();
4730
4731 ext_sym = symbol_find_or_make (name);
4732
4733 *input_line_pointer = endc;
4734
4735 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4736 SF_SET_FUNCTION (ext_sym);
4737 SF_SET_PROCESS (ext_sym);
4738 coff_add_linesym (ext_sym);
4739
4740 demand_empty_rest_of_line ();
4741}
4742
4743static void
4744ppc_pe_tocd (ignore)
5480ccf3 4745 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4746{
4747 if (tocdata_section == 0)
4748 {
4749 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4750 /* FIXME: section flags won't work. */
252b5132
RH		 4751 bfd_set_section_flags (stdoutput, tocdata_section,
4752 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4753 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4754
4755 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4756 }
4757 else
4758 {
4759 rdata_section = subseg_new (".tocd", 0);
4760 }
4761
99a814a1 4762 ppc_set_current_section (tocdata_section);
252b5132
RH		 4763
4764 demand_empty_rest_of_line ();
4765}
4766
4767/* Don't adjust TOC relocs to use the section symbol. */
4768
4769int
4770ppc_pe_fix_adjustable (fix)
4771 fixS *fix;
4772{
4773 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4774}
4775
4776#endif
4777\f
4778#ifdef OBJ_XCOFF
4779
4780/* XCOFF specific symbol and file handling. */
4781
4782/* Canonicalize the symbol name. We use the to force the suffix, if
4783 any, to use square brackets, and to be in upper case. */
4784
4785char *
4786ppc_canonicalize_symbol_name (name)
4787 char *name;
4788{
4789 char *s;
4790
4791 if (ppc_stab_symbol)
4792 return name;
4793
4794 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4795 ;
4796 if (*s != '\0')
4797 {
4798 char brac;
4799
4800 if (*s == '[')
4801 brac = ']';
4802 else
4803 {
4804 *s = '[';
4805 brac = '}';
4806 }
4807
4808 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4809 *s = TOUPPER (*s);
252b5132
RH		 4810
4811 if (*s == '\0' || s[1] != '\0')
4812 as_bad (_("bad symbol suffix"));
4813
4814 *s = ']';
4815 }
4816
4817 return name;
4818}
4819
4820/* Set the class of a symbol based on the suffix, if any. This is
4821 called whenever a new symbol is created. */
4822
4823void
4824ppc_symbol_new_hook (sym)
4825 symbolS *sym;
4826{
809ffe0d 4827 struct ppc_tc_sy *tc;
252b5132
RH		 4828 const char *s;
4829
809ffe0d
ILT		 4830 tc = symbol_get_tc (sym);
4831 tc->next = NULL;
4832 tc->output = 0;
4833 tc->class = -1;
4834 tc->real_name = NULL;
4835 tc->subseg = 0;
4836 tc->align = 0;
4837 tc->size = NULL;
4838 tc->within = NULL;
252b5132
RH		 4839
4840 if (ppc_stab_symbol)
4841 return;
4842
4843 s = strchr (S_GET_NAME (sym), '[');
4844 if (s == (const char *) NULL)
4845 {
4846 /* There is no suffix. */
4847 return;
4848 }
4849
4850 ++s;
4851
4852 switch (s[0])
4853 {
4854 case 'B':
4855 if (strcmp (s, "BS]") == 0)
809ffe0d 4856 tc->class = XMC_BS;
252b5132
RH		 4857 break;
4858 case 'D':
4859 if (strcmp (s, "DB]") == 0)
809ffe0d 4860 tc->class = XMC_DB;
252b5132 4861 else if (strcmp (s, "DS]") == 0)
809ffe0d 4862 tc->class = XMC_DS;
252b5132
RH		 4863 break;
4864 case 'G':
4865 if (strcmp (s, "GL]") == 0)
809ffe0d 4866 tc->class = XMC_GL;
252b5132
RH		 4867 break;
4868 case 'P':
4869 if (strcmp (s, "PR]") == 0)
809ffe0d 4870 tc->class = XMC_PR;
252b5132
RH		 4871 break;
4872 case 'R':
4873 if (strcmp (s, "RO]") == 0)
809ffe0d 4874 tc->class = XMC_RO;
252b5132 4875 else if (strcmp (s, "RW]") == 0)
809ffe0d 4876 tc->class = XMC_RW;
252b5132
RH		 4877 break;
4878 case 'S':
4879 if (strcmp (s, "SV]") == 0)
809ffe0d 4880 tc->class = XMC_SV;
252b5132
RH		 4881 break;
4882 case 'T':
4883 if (strcmp (s, "TC]") == 0)
809ffe0d 4884 tc->class = XMC_TC;
252b5132 4885 else if (strcmp (s, "TI]") == 0)
809ffe0d 4886 tc->class = XMC_TI;
252b5132 4887 else if (strcmp (s, "TB]") == 0)
809ffe0d 4888 tc->class = XMC_TB;
252b5132 4889 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4890 tc->class = XMC_TC0;
252b5132
RH		 4891 break;
4892 case 'U':
4893 if (strcmp (s, "UA]") == 0)
809ffe0d 4894 tc->class = XMC_UA;
252b5132 4895 else if (strcmp (s, "UC]") == 0)
809ffe0d 4896 tc->class = XMC_UC;
252b5132
RH		 4897 break;
4898 case 'X':
4899 if (strcmp (s, "XO]") == 0)
809ffe0d 4900 tc->class = XMC_XO;
252b5132
RH		 4901 break;
4902 }
4903
809ffe0d 4904 if (tc->class == -1)
252b5132
RH		 4905 as_bad (_("Unrecognized symbol suffix"));
4906}
4907
4908/* Set the class of a label based on where it is defined. This
4909 handles symbols without suffixes. Also, move the symbol so that it
4910 follows the csect symbol. */
4911
4912void
4913ppc_frob_label (sym)
4914 symbolS *sym;
4915{
4916 if (ppc_current_csect != (symbolS *) NULL)
4917 {
809ffe0d
ILT		 4918 if (symbol_get_tc (sym)->class == -1)
4919 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4920
4921 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4922 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4923 &symbol_rootP, &symbol_lastP);
4924 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4925 }
07a53e5c
RH		 4926
4927#ifdef OBJ_ELF
4928 dwarf2_emit_label (sym);
4929#endif
252b5132
RH		 4930}
4931
4932/* This variable is set by ppc_frob_symbol if any absolute symbols are
4933 seen. It tells ppc_adjust_symtab whether it needs to look through
4934 the symbols. */
4935
b34976b6 4936static bfd_boolean ppc_saw_abs;
252b5132
RH		 4937
4938/* Change the name of a symbol just before writing it out. Set the
4939 real name if the .rename pseudo-op was used. Otherwise, remove any
4940 class suffix. Return 1 if the symbol should not be included in the
4941 symbol table. */
4942
4943int
4944ppc_frob_symbol (sym)
4945 symbolS *sym;
4946{
4947 static symbolS *ppc_last_function;
4948 static symbolS *set_end;
4949
4950 /* Discard symbols that should not be included in the output symbol
4951 table. */
809ffe0d
ILT		 4952 if (! symbol_used_in_reloc_p (sym)
4953 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4954 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4955 && ! symbol_get_tc (sym)->output
252b5132
RH		 4956 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4957 return 1;
4958
a161fe53
AM		 4959 /* This one will disappear anyway. Don't make a csect sym for it. */
4960 if (sym == abs_section_sym)
4961 return 1;
4962
809ffe0d
ILT		 4963 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4964 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4965 else
4966 {
4967 const char *name;
4968 const char *s;
4969
4970 name = S_GET_NAME (sym);
4971 s = strchr (name, '[');
4972 if (s != (char *) NULL)
4973 {
4974 unsigned int len;
4975 char *snew;
4976
4977 len = s - name;
4978 snew = xmalloc (len + 1);
4979 memcpy (snew, name, len);
4980 snew[len] = '\0';
4981
4982 S_SET_NAME (sym, snew);
4983 }
4984 }
4985
4986 if (set_end != (symbolS *) NULL)
4987 {
4988 SA_SET_SYM_ENDNDX (set_end, sym);
4989 set_end = NULL;
4990 }
4991
4992 if (SF_GET_FUNCTION (sym))
4993 {
4994 if (ppc_last_function != (symbolS *) NULL)
4995 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4996 ppc_last_function = sym;
809ffe0d 4997 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4998 {
6386f3a7 4999 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5000 SA_SET_SYM_FSIZE (sym,
5001 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5002 }
5003 }
5004 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5005 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5006 {
5007 if (ppc_last_function == (symbolS *) NULL)
5008 as_bad (_(".ef with no preceding .function"));
5009 else
5010 {
5011 set_end = ppc_last_function;
5012 ppc_last_function = NULL;
5013
5014 /* We don't have a C_EFCN symbol, but we need to force the
5015 COFF backend to believe that it has seen one. */
5016 coff_last_function = NULL;
5017 }
5018 }
5019
670ec21d 5020 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5021 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5022 && S_GET_STORAGE_CLASS (sym) != C_FILE
5023 && S_GET_STORAGE_CLASS (sym) != C_FCN
5024 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5025 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5026 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5027 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5028 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5029 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5030 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5031
5032 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5033 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5034 {
5035 int i;
5036 union internal_auxent *a;
5037
5038 /* Create a csect aux. */
5039 i = S_GET_NUMBER_AUXILIARY (sym);
5040 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5041 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5042 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5043 {
5044 /* This is the TOC table. */
5045 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5046 a->x_csect.x_scnlen.l = 0;
5047 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5048 }
809ffe0d 5049 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5050 {
5051 /* This is a csect symbol. x_scnlen is the size of the
5052 csect. */
809ffe0d 5053 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5054 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5055 S_GET_SEGMENT (sym))
5056 - S_GET_VALUE (sym));
5057 else
5058 {
6386f3a7 5059 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5060 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5061 - S_GET_VALUE (sym));
5062 }
809ffe0d 5063 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5064 }
5065 else if (S_GET_SEGMENT (sym) == bss_section)
5066 {
5067 /* This is a common symbol. */
809ffe0d
ILT		 5068 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5069 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5070 if (S_IS_EXTERNAL (sym))
809ffe0d 5071 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5072 else
809ffe0d 5073 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5074 }
5075 else if (S_GET_SEGMENT (sym) == absolute_section)
5076 {
5077 /* This is an absolute symbol. The csect will be created by
99a814a1 5078 ppc_adjust_symtab. */
b34976b6 5079 ppc_saw_abs = TRUE;
252b5132 5080 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5081 if (symbol_get_tc (sym)->class == -1)
5082 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5083 }
5084 else if (! S_IS_DEFINED (sym))
5085 {
5086 /* This is an external symbol. */
5087 a->x_csect.x_scnlen.l = 0;
5088 a->x_csect.x_smtyp = XTY_ER;
5089 }
809ffe0d 5090 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5091 {
5092 symbolS *next;
5093
5094 /* This is a TOC definition. x_scnlen is the size of the
5095 TOC entry. */
5096 next = symbol_next (sym);
809ffe0d 5097 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5098 next = symbol_next (next);
5099 if (next == (symbolS *) NULL
809ffe0d 5100 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5101 {
5102 if (ppc_after_toc_frag == (fragS *) NULL)
5103 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5104 data_section)
5105 - S_GET_VALUE (sym));
5106 else
5107 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5108 - S_GET_VALUE (sym));
5109 }
5110 else
5111 {
6386f3a7 5112 resolve_symbol_value (next);
252b5132
RH		 5113 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5114 - S_GET_VALUE (sym));
5115 }
5116 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5117 }
5118 else
5119 {
5120 symbolS *csect;
5121
5122 /* This is a normal symbol definition. x_scnlen is the
5123 symbol index of the containing csect. */
5124 if (S_GET_SEGMENT (sym) == text_section)
5125 csect = ppc_text_csects;
5126 else if (S_GET_SEGMENT (sym) == data_section)
5127 csect = ppc_data_csects;
5128 else
5129 abort ();
5130
5131 /* Skip the initial dummy symbol. */
809ffe0d 5132 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5133
5134 if (csect == (symbolS *) NULL)
5135 {
5136 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5137 a->x_csect.x_scnlen.l = 0;
5138 }
5139 else
5140 {
809ffe0d 5141 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5142 {
6386f3a7 5143 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5144 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5145 > S_GET_VALUE (sym))
252b5132 5146 break;
809ffe0d 5147 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5148 }
5149
809ffe0d
ILT		 5150 a->x_csect.x_scnlen.p =
5151 coffsymbol (symbol_get_bfdsym (csect))->native;
5152 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5153 1;
252b5132
RH		 5154 }
5155 a->x_csect.x_smtyp = XTY_LD;
5156 }
81d4177b 5157
252b5132
RH		 5158 a->x_csect.x_parmhash = 0;
5159 a->x_csect.x_snhash = 0;
809ffe0d 5160 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5161 a->x_csect.x_smclas = XMC_PR;
5162 else
809ffe0d 5163 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5164 a->x_csect.x_stab = 0;
5165 a->x_csect.x_snstab = 0;
5166
5167 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5168 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5169 }
5170 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5171 {
5172 /* We want the value to be the symbol index of the referenced
5173 csect symbol. BFD will do that for us if we set the right
5174 flags. */
b782de16
AM		 5175 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5176 combined_entry_type *c = coffsymbol (bsym)->native;
5177
5178 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5179 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5180 }
5181 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5182 {
5183 symbolS *block;
5184 symbolS *csect;
5185
5186 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5187 block = symbol_get_tc (sym)->within;
5188 csect = symbol_get_tc (block)->within;
6386f3a7 5189 resolve_symbol_value (csect);
252b5132
RH		 5190 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5191 }
5192 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5193 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5194 {
5195 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5196 BFD will do that for us if we set the right flags. We have
5197 already set the value correctly. */
809ffe0d 5198 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5199 }
5200
5201 return 0;
5202}
5203
5204/* Adjust the symbol table. This creates csect symbols for all
5205 absolute symbols. */
5206
5207void
5208ppc_adjust_symtab ()
5209{
5210 symbolS *sym;
5211
5212 if (! ppc_saw_abs)
5213 return;
5214
5215 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5216 {
5217 symbolS *csect;
5218 int i;
5219 union internal_auxent *a;
5220
5221 if (S_GET_SEGMENT (sym) != absolute_section)
5222 continue;
5223
5224 csect = symbol_create (".abs[XO]", absolute_section,
5225 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5226 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5227 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5228 i = S_GET_NUMBER_AUXILIARY (csect);
5229 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5230 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5231 a->x_csect.x_scnlen.l = 0;
5232 a->x_csect.x_smtyp = XTY_SD;
5233 a->x_csect.x_parmhash = 0;
5234 a->x_csect.x_snhash = 0;
5235 a->x_csect.x_smclas = XMC_XO;
5236 a->x_csect.x_stab = 0;
5237 a->x_csect.x_snstab = 0;
5238
5239 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5240
5241 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5242 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5243 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5244 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5245 }
5246
b34976b6 5247 ppc_saw_abs = FALSE;
252b5132
RH		 5248}
5249
5250/* Set the VMA for a section. This is called on all the sections in
5251 turn. */
5252
5253void
5254ppc_frob_section (sec)
5255 asection *sec;
5256{
931e13a6 5257 static bfd_vma vma = 0;
252b5132 5258
931e13a6 5259 vma = md_section_align (sec, vma);
252b5132
RH		 5260 bfd_set_section_vma (stdoutput, sec, vma);
5261 vma += bfd_section_size (stdoutput, sec);
5262}
5263
5264#endif /* OBJ_XCOFF */
5265\f
5266/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5267 of type TYPE, and store the appropriate bytes in *LITP. The number
5268 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5269 returned, or NULL on OK. */
5270
5271char *
5272md_atof (type, litp, sizep)
5273 int type;
5274 char *litp;
5275 int *sizep;
5276{
5277 int prec;
5278 LITTLENUM_TYPE words[4];
5279 char *t;
5280 int i;
5281
5282 switch (type)
5283 {
5284 case 'f':
5285 prec = 2;
5286 break;
5287
5288 case 'd':
5289 prec = 4;
5290 break;
5291
5292 default:
5293 *sizep = 0;
5294 return _("bad call to md_atof");
5295 }
5296
5297 t = atof_ieee (input_line_pointer, type, words);
5298 if (t)
5299 input_line_pointer = t;
5300
5301 *sizep = prec * 2;
5302
5303 if (target_big_endian)
5304 {
5305 for (i = 0; i < prec; i++)
5306 {
5307 md_number_to_chars (litp, (valueT) words[i], 2);
5308 litp += 2;
5309 }
5310 }
5311 else
5312 {
5313 for (i = prec - 1; i >= 0; i--)
5314 {
5315 md_number_to_chars (litp, (valueT) words[i], 2);
5316 litp += 2;
5317 }
5318 }
81d4177b 5319
252b5132
RH		 5320 return NULL;
5321}
5322
5323/* Write a value out to the object file, using the appropriate
5324 endianness. */
5325
5326void
5327md_number_to_chars (buf, val, n)
5328 char *buf;
5329 valueT val;
5330 int n;
5331{
5332 if (target_big_endian)
5333 number_to_chars_bigendian (buf, val, n);
5334 else
5335 number_to_chars_littleendian (buf, val, n);
5336}
5337
5338/* Align a section (I don't know why this is machine dependent). */
5339
5340valueT
3aeeedbb 5341md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5342{
3aeeedbb
AM		 5343#ifdef OBJ_ELF
5344 return addr;
5345#else
252b5132
RH		 5346 int align = bfd_get_section_alignment (stdoutput, seg);
5347
5348 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5349#endif
252b5132
RH		 5350}
5351
5352/* We don't have any form of relaxing. */
5353
5354int
5355md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5356 fragS *fragp ATTRIBUTE_UNUSED;
5357 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5358{
5359 abort ();
5360 return 0;
5361}
5362
5363/* Convert a machine dependent frag. We never generate these. */
5364
5365void
5366md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5367 bfd *abfd ATTRIBUTE_UNUSED;
5368 asection *sec ATTRIBUTE_UNUSED;
5369 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5370{
5371 abort ();
5372}
5373
5374/* We have no need to default values of symbols. */
5375
252b5132
RH		 5376symbolS *
5377md_undefined_symbol (name)
92161534 5378 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5379{
5380 return 0;
5381}
5382\f
5383/* Functions concerning relocs. */
5384
5385/* The location from which a PC relative jump should be calculated,
5386 given a PC relative reloc. */
5387
5388long
5389md_pcrel_from_section (fixp, sec)
5390 fixS *fixp;
92161534 5391 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5392{
5393 return fixp->fx_frag->fr_address + fixp->fx_where;
5394}
5395
5396#ifdef OBJ_XCOFF
5397
5398/* This is called to see whether a fixup should be adjusted to use a
5399 section symbol. We take the opportunity to change a fixup against
5400 a symbol in the TOC subsegment into a reloc against the
5401 corresponding .tc symbol. */
5402
5403int
5404ppc_fix_adjustable (fix)
5405 fixS *fix;
5406{
b782de16
AM		 5407 valueT val = resolve_symbol_value (fix->fx_addsy);
5408 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5409 TC_SYMFIELD_TYPE *tc;
5410
5411 if (symseg == absolute_section)
5412 return 0;
252b5132 5413
252b5132 5414 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5415 && fix->fx_addsy != ppc_toc_csect
b782de16 5416 && symseg == data_section
252b5132
RH		 5417 && val >= ppc_toc_frag->fr_address
5418 && (ppc_after_toc_frag == (fragS *) NULL
5419 || val < ppc_after_toc_frag->fr_address))
5420 {
5421 symbolS *sy;
5422
5423 for (sy = symbol_next (ppc_toc_csect);
5424 sy != (symbolS *) NULL;
5425 sy = symbol_next (sy))
5426 {
b782de16
AM		 5427 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5428
5429 if (sy_tc->class == XMC_TC0)
252b5132 5430 continue;
b782de16 5431 if (sy_tc->class != XMC_TC)
252b5132 5432 break;
b782de16 5433 if (val == resolve_symbol_value (sy))
252b5132
RH		 5434 {
5435 fix->fx_addsy = sy;
5436 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5437 return 0;
5438 }
5439 }
5440
5441 as_bad_where (fix->fx_file, fix->fx_line,
5442 _("symbol in .toc does not match any .tc"));
5443 }
5444
5445 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5446 tc = symbol_get_tc (fix->fx_addsy);
5447 if (tc->subseg == 0
5448 && tc->class != XMC_TC0
5449 && tc->class != XMC_TC
5450 && symseg != bss_section
252b5132 5451 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5452 && (symseg != data_section
252b5132
RH		 5453 || ppc_toc_csect == NULL
5454 || val < ppc_toc_frag->fr_address
5455 || (ppc_after_toc_frag != NULL
5456 && val >= ppc_after_toc_frag->fr_address)))
5457 {
5458 symbolS *csect;
b782de16 5459 symbolS *next_csect;
252b5132 5460
b782de16 5461 if (symseg == text_section)
252b5132 5462 csect = ppc_text_csects;
b782de16 5463 else if (symseg == data_section)
252b5132
RH		 5464 csect = ppc_data_csects;
5465 else
5466 abort ();
5467
5468 /* Skip the initial dummy symbol. */
809ffe0d 5469 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5470
5471 if (csect != (symbolS *) NULL)
5472 {
b782de16
AM		 5473 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5474 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5475 {
5476 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5477 have to look through the full symbol table to see
5478 whether this is the csect we want. Note that we will
5479 only get here if the csect has zero length. */
b782de16
AM		 5480 if (symbol_get_frag (csect)->fr_address == val
5481 && S_GET_VALUE (csect) == val)
252b5132
RH		 5482 {
5483 symbolS *scan;
5484
809ffe0d 5485 for (scan = symbol_next (csect);
252b5132 5486 scan != NULL;
809ffe0d 5487 scan = symbol_next (scan))
252b5132 5488 {
809ffe0d 5489 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5490 break;
5491 if (scan == fix->fx_addsy)
5492 break;
5493 }
5494
5495 /* If we found the symbol before the next csect
99a814a1 5496 symbol, then this is the csect we want. */
252b5132
RH		 5497 if (scan == fix->fx_addsy)
5498 break;
5499 }
5500
b782de16 5501 csect = next_csect;
252b5132
RH		 5502 }
5503
b782de16 5504 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5505 fix->fx_addsy = csect;
5506 }
b782de16 5507 return 0;
252b5132
RH		 5508 }
5509
5510 /* Adjust a reloc against a .lcomm symbol to be against the base
5511 .lcomm. */
b782de16 5512 if (symseg == bss_section
252b5132
RH		 5513 && ! S_IS_EXTERNAL (fix->fx_addsy))
5514 {
b782de16
AM		 5515 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5516
5517 fix->fx_offset += val - resolve_symbol_value (sy);
5518 fix->fx_addsy = sy;
252b5132
RH		 5519 }
5520
5521 return 0;
5522}
5523
5524/* A reloc from one csect to another must be kept. The assembler
5525 will, of course, keep relocs between sections, and it will keep
5526 absolute relocs, but we need to force it to keep PC relative relocs
5527 between two csects in the same section. */
5528
5529int
5530ppc_force_relocation (fix)
5531 fixS *fix;
5532{
5533 /* At this point fix->fx_addsy should already have been converted to
5534 a csect symbol. If the csect does not include the fragment, then
5535 we need to force the relocation. */
5536 if (fix->fx_pcrel
5537 && fix->fx_addsy != NULL
809ffe0d
ILT		 5538 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5539 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5540 > fix->fx_frag->fr_address)
5541 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5542 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5543 <= fix->fx_frag->fr_address))))
5544 return 1;
5545
ae6063d4 5546 return generic_force_reloc (fix);
252b5132
RH		 5547}
5548
5549#endif /* OBJ_XCOFF */
5550
0baf16f2 5551#ifdef OBJ_ELF
a161fe53
AM		 5552/* If this function returns non-zero, it guarantees that a relocation
5553 will be emitted for a fixup. */
5554
5555int
5556ppc_force_relocation (fix)
5557 fixS *fix;
5558{
5559 /* Branch prediction relocations must force a relocation, as must
5560 the vtable description relocs. */
5561 switch (fix->fx_r_type)
5562 {
5563 case BFD_RELOC_PPC_B16_BRTAKEN:
5564 case BFD_RELOC_PPC_B16_BRNTAKEN:
5565 case BFD_RELOC_PPC_BA16_BRTAKEN:
5566 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5567 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5568 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5569 return 1;
5570 default:
5571 break;
5572 }
5573
cdba85ec
AM		 5574 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5575 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5576 return 1;
5577
ae6063d4 5578 return generic_force_reloc (fix);
a161fe53
AM		 5579}
5580
0baf16f2
AM		 5581int
5582ppc_fix_adjustable (fix)
5583 fixS *fix;
252b5132 5584{
0baf16f2
AM		 5585 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5586 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5587 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5588 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5589 && fix->fx_r_type != BFD_RELOC_GPREL16
5590 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5591 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5592 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5593 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5594}
0baf16f2 5595#endif
252b5132 5596
3aeeedbb
AM		 5597/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5598 rs_align_code frag. */
5599
5600void
5601ppc_handle_align (struct frag *fragP)
5602{
5603 valueT count = (fragP->fr_next->fr_address
5604 - (fragP->fr_address + fragP->fr_fix));
5605
5606 if (count != 0 && (count & 3) == 0)
5607 {
5608 char *dest = fragP->fr_literal + fragP->fr_fix;
5609
5610 fragP->fr_var = 4;
5611 md_number_to_chars (dest, 0x60000000, 4);
5612
5613 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5614 {
5615 /* For power6, we want the last nop to be a group terminating
5616 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5617 immediately after this one, with its address set to the last
5618 nop location. This will automatically reduce the number of
5619 nops in the current frag by one. */
5620 if (count > 4)
5621 {
5622 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5623
5624 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5625 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5626 group_nop->fr_fix = 0;
5627 group_nop->fr_offset = 1;
5628 group_nop->fr_type = rs_fill;
5629 fragP->fr_next = group_nop;
5630 dest = group_nop->fr_literal;
5631 }
5632
5633 md_number_to_chars (dest, 0x60210000, 4);
5634 }
5635 }
5636}
5637
252b5132
RH		 5638/* Apply a fixup to the object code. This is called for all the
5639 fixups we generated by the call to fix_new_exp, above. In the call
5640 above we used a reloc code which was the largest legal reloc code
5641 plus the operand index. Here we undo that to recover the operand
5642 index. At this point all symbol values should be fully resolved,
5643 and we attempt to completely resolve the reloc. If we can not do
5644 that, we determine the correct reloc code and put it back in the
5645 fixup. */
5646
94f592af 5647void
55cf6793 5648md_apply_fix (fixP, valP, seg)
94f592af
NC		 5649 fixS *fixP;
5650 valueT * valP;
0baf16f2 5651 segT seg ATTRIBUTE_UNUSED;
252b5132 5652{
94f592af 5653 valueT value = * valP;
252b5132
RH		 5654
5655#ifdef OBJ_ELF
94f592af 5656 if (fixP->fx_addsy != NULL)
252b5132 5657 {
a161fe53 5658 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5659 if (fixP->fx_pcrel)
5660 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5661 }
5662 else
94f592af 5663 fixP->fx_done = 1;
252b5132 5664#else
a161fe53 5665 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5666 the symbol values. If we are doing this relocation the code in
5667 write.c is going to call bfd_install_relocation, which is also
5668 going to use the symbol value. That means that if the reloc is
5669 fully resolved we want to use *valP since bfd_install_relocation is
5670 not being used.
252b5132 5671 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5672 *valP, and must use fx_offset instead. However, if the reloc
5673 is PC relative, we do want to use *valP since it includes the
252b5132 5674 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5675 if (fixP->fx_addsy == (symbolS *) NULL)
5676 fixP->fx_done = 1;
5677
5678 else if (fixP->fx_pcrel)
5679 ;
5680
252b5132 5681 else
a161fe53
AM		 5682 value = fixP->fx_offset;
5683#endif
5684
5685 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5686 {
a161fe53
AM		 5687 /* We can't actually support subtracting a symbol. */
5688 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5689 }
252b5132 5690
94f592af 5691 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5692 {
5693 int opindex;
5694 const struct powerpc_operand *operand;
5695 char *where;
5696 unsigned long insn;
5697
94f592af 5698 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5699
5700 operand = &powerpc_operands[opindex];
5701
5702#ifdef OBJ_XCOFF
0baf16f2
AM		 5703 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5704 does not generate a reloc. It uses the offset of `sym' within its
5705 csect. Other usages, such as `.long sym', generate relocs. This
5706 is the documented behaviour of non-TOC symbols. */
252b5132 5707 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5708 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5709 && operand->shift == 0
2b3c4602 5710 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5711 && fixP->fx_addsy != NULL
5712 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5713 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5714 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5715 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5716 {
94f592af
NC		 5717 value = fixP->fx_offset;
5718 fixP->fx_done = 1;
252b5132
RH		 5719 }
5720#endif
5721
5722 /* Fetch the instruction, insert the fully resolved operand
5723 value, and stuff the instruction back again. */
94f592af 5724 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5725 if (target_big_endian)
5726 insn = bfd_getb32 ((unsigned char *) where);
5727 else
5728 insn = bfd_getl32 ((unsigned char *) where);
5729 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5730 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5731 if (target_big_endian)
5732 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5733 else
5734 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5735
94f592af
NC		 5736 if (fixP->fx_done)
5737 /* Nothing else to do here. */
5738 return;
252b5132 5739
94f592af 5740 assert (fixP->fx_addsy != NULL);
0baf16f2 5741
252b5132
RH		 5742 /* Determine a BFD reloc value based on the operand information.
5743 We are only prepared to turn a few of the operands into
0baf16f2 5744 relocs. */
11b37b7b 5745 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5746 && operand->bitm == 0x3fffffc
11b37b7b 5747 && operand->shift == 0)
94f592af 5748 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5749 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5750 && operand->bitm == 0xfffc
11b37b7b 5751 && operand->shift == 0)
95210096
AM		 5752 {
5753 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5754#ifdef OBJ_XCOFF
5755 fixP->fx_size = 2;
5756 if (target_big_endian)
5757 fixP->fx_where += 2;
5758#endif
5759 }
11b37b7b 5760 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5761 && operand->bitm == 0x3fffffc
11b37b7b 5762 && operand->shift == 0)
94f592af 5763 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5764 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5765 && operand->bitm == 0xfffc
11b37b7b 5766 && operand->shift == 0)
95210096
AM		 5767 {
5768 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5769#ifdef OBJ_XCOFF
5770 fixP->fx_size = 2;
5771 if (target_big_endian)
5772 fixP->fx_where += 2;
5773#endif
5774 }
0baf16f2 5775#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5776 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5777 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5778 && operand->shift == 0)
11b37b7b 5779 {
a7fc733f
AM		 5780 if (ppc_is_toc_sym (fixP->fx_addsy))
5781 {
5782 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5783#ifdef OBJ_ELF
a7fc733f
AM		 5784 if (ppc_obj64
5785 && (operand->flags & PPC_OPERAND_DS) != 0)
5786 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5787#endif
5788 }
5789 else
5790 {
5791 fixP->fx_r_type = BFD_RELOC_16;
5792#ifdef OBJ_ELF
5793 if (ppc_obj64
5794 && (operand->flags & PPC_OPERAND_DS) != 0)
5795 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5796#endif
a7fc733f 5797 }
94f592af 5798 fixP->fx_size = 2;
11b37b7b 5799 if (target_big_endian)
94f592af 5800 fixP->fx_where += 2;
11b37b7b 5801 }
0baf16f2 5802#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5803 else
252b5132
RH		 5804 {
5805 char *sfile;
5806 unsigned int sline;
5807
5808 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5809 symbol. */
94f592af
NC		 5810 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5811 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5812 _("unresolved expression that must be resolved"));
5813 else
94f592af 5814 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5815 _("unsupported relocation against %s"),
94f592af
NC		 5816 S_GET_NAME (fixP->fx_addsy));
5817 fixP->fx_done = 1;
5818 return;
252b5132
RH		 5819 }
5820 }
5821 else
5822 {
5823#ifdef OBJ_ELF
94f592af 5824 ppc_elf_validate_fix (fixP, seg);
252b5132 5825#endif
94f592af 5826 switch (fixP->fx_r_type)
252b5132 5827 {
252b5132 5828 case BFD_RELOC_CTOR:
2b3c4602 5829 if (ppc_obj64)
9c7977b3
AM		 5830 goto ctor64;
5831 /* fall through */
5832
0baf16f2 5833 case BFD_RELOC_32:
94f592af
NC		 5834 if (fixP->fx_pcrel)
5835 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5836 /* fall through */
252b5132
RH		 5837
5838 case BFD_RELOC_RVA:
5839 case BFD_RELOC_32_PCREL:
252b5132 5840 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5841 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5842 value, 4);
5843 break;
5844
7f6d05e8 5845 case BFD_RELOC_64:
9c7977b3 5846 ctor64:
94f592af
NC		 5847 if (fixP->fx_pcrel)
5848 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5849 /* fall through */
0baf16f2 5850
7f6d05e8 5851 case BFD_RELOC_64_PCREL:
94f592af 5852 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5853 value, 8);
81d4177b 5854 break;
0baf16f2 5855
252b5132
RH		 5856 case BFD_RELOC_GPREL16:
5857 case BFD_RELOC_16_GOT_PCREL:
5858 case BFD_RELOC_16_GOTOFF:
5859 case BFD_RELOC_LO16_GOTOFF:
5860 case BFD_RELOC_HI16_GOTOFF:
5861 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5862 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5863 case BFD_RELOC_LO16_BASEREL:
5864 case BFD_RELOC_HI16_BASEREL:
5865 case BFD_RELOC_HI16_S_BASEREL:
5866 case BFD_RELOC_PPC_EMB_NADDR16:
5867 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5868 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5869 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5870 case BFD_RELOC_PPC_EMB_SDAI16:
5871 case BFD_RELOC_PPC_EMB_SDA2REL:
5872 case BFD_RELOC_PPC_EMB_SDA2I16:
5873 case BFD_RELOC_PPC_EMB_RELSEC16:
5874 case BFD_RELOC_PPC_EMB_RELST_LO:
5875 case BFD_RELOC_PPC_EMB_RELST_HI:
5876 case BFD_RELOC_PPC_EMB_RELST_HA:
5877 case BFD_RELOC_PPC_EMB_RELSDA:
5878 case BFD_RELOC_PPC_TOC16:
0baf16f2 5879#ifdef OBJ_ELF
0baf16f2
AM		 5880 case BFD_RELOC_PPC64_TOC16_LO:
5881 case BFD_RELOC_PPC64_TOC16_HI:
5882 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5883#endif
94f592af 5884 if (fixP->fx_pcrel)
252b5132 5885 {
94f592af
NC		 5886 if (fixP->fx_addsy != NULL)
5887 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5888 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5889 bfd_get_reloc_code_name (fixP->fx_r_type),
5890 S_GET_NAME (fixP->fx_addsy));
252b5132 5891 else
94f592af 5892 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5893 _("cannot emit PC relative %s relocation"),
94f592af 5894 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5895 }
5896
94f592af 5897 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5898 value, 2);
5899 break;
5900
3c9d25f4
AM		 5901 case BFD_RELOC_16:
5902 if (fixP->fx_pcrel)
5903 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5904 /* fall through */
5905
5906 case BFD_RELOC_16_PCREL:
5907 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5908 value, 2);
5909 break;
5910
5911 case BFD_RELOC_LO16:
5912 if (fixP->fx_pcrel)
5913 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5914 /* fall through */
5915
5916 case BFD_RELOC_LO16_PCREL:
5917 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5918 value, 2);
5919 break;
5920
252b5132
RH		 5921 /* This case happens when you write, for example,
5922 lis %r3,(L1-L2)@ha
5923 where L1 and L2 are defined later. */
5924 case BFD_RELOC_HI16:
94f592af 5925 if (fixP->fx_pcrel)
3c9d25f4
AM		 5926 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5927 /* fall through */
5928
5929 case BFD_RELOC_HI16_PCREL:
94f592af 5930 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5931 PPC_HI (value), 2);
252b5132 5932 break;
0baf16f2 5933
252b5132 5934 case BFD_RELOC_HI16_S:
94f592af 5935 if (fixP->fx_pcrel)
3c9d25f4
AM		 5936 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5937 /* fall through */
5938
5939 case BFD_RELOC_HI16_S_PCREL:
94f592af 5940 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5941 PPC_HA (value), 2);
5942 break;
5943
5944#ifdef OBJ_ELF
0baf16f2 5945 case BFD_RELOC_PPC64_HIGHER:
94f592af 5946 if (fixP->fx_pcrel)
0baf16f2 5947 abort ();
94f592af 5948 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5949 PPC_HIGHER (value), 2);
252b5132
RH		 5950 break;
5951
0baf16f2 5952 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5953 if (fixP->fx_pcrel)
0baf16f2 5954 abort ();
94f592af 5955 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5956 PPC_HIGHERA (value), 2);
5957 break;
5958
5959 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5960 if (fixP->fx_pcrel)
0baf16f2 5961 abort ();
94f592af 5962 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5963 PPC_HIGHEST (value), 2);
5964 break;
5965
5966 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5967 if (fixP->fx_pcrel)
0baf16f2 5968 abort ();
94f592af 5969 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5970 PPC_HIGHESTA (value), 2);
5971 break;
5972
5973 case BFD_RELOC_PPC64_ADDR16_DS:
5974 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5975 case BFD_RELOC_PPC64_GOT16_DS:
5976 case BFD_RELOC_PPC64_GOT16_LO_DS:
5977 case BFD_RELOC_PPC64_PLT16_LO_DS:
5978 case BFD_RELOC_PPC64_SECTOFF_DS:
5979 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5980 case BFD_RELOC_PPC64_TOC16_DS:
5981 case BFD_RELOC_PPC64_TOC16_LO_DS:
5982 case BFD_RELOC_PPC64_PLTGOT16_DS:
5983 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5984 if (fixP->fx_pcrel)
0baf16f2
AM		 5985 abort ();
5986 {
2132e3a3 5987 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5988 unsigned long val, mask;
0baf16f2
AM		 5989
5990 if (target_big_endian)
adadcc0c 5991 val = bfd_getb32 (where - 2);
0baf16f2 5992 else
adadcc0c
AM		 5993 val = bfd_getl32 (where);
5994 mask = 0xfffc;
5995 /* lq insns reserve the four lsbs. */
5996 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5997 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5998 mask = 0xfff0;
5999 val |= value & mask;
0baf16f2
AM		 6000 if (target_big_endian)
6001 bfd_putb16 ((bfd_vma) val, where);
6002 else
6003 bfd_putl16 ((bfd_vma) val, where);
6004 }
6005 break;
cdba85ec 6006
ba0b2174
AM		 6007 case BFD_RELOC_PPC_B16_BRTAKEN:
6008 case BFD_RELOC_PPC_B16_BRNTAKEN:
6009 case BFD_RELOC_PPC_BA16_BRTAKEN:
6010 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6011 break;
6012
cdba85ec 6013 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 6014 break;
6015
cdba85ec
AM		 6016 case BFD_RELOC_PPC_DTPMOD:
6017 case BFD_RELOC_PPC_TPREL16:
6018 case BFD_RELOC_PPC_TPREL16_LO:
6019 case BFD_RELOC_PPC_TPREL16_HI:
6020 case BFD_RELOC_PPC_TPREL16_HA:
6021 case BFD_RELOC_PPC_TPREL:
6022 case BFD_RELOC_PPC_DTPREL16:
6023 case BFD_RELOC_PPC_DTPREL16_LO:
6024 case BFD_RELOC_PPC_DTPREL16_HI:
6025 case BFD_RELOC_PPC_DTPREL16_HA:
6026 case BFD_RELOC_PPC_DTPREL:
6027 case BFD_RELOC_PPC_GOT_TLSGD16:
6028 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6029 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6030 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6031 case BFD_RELOC_PPC_GOT_TLSLD16:
6032 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6033 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6034 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6035 case BFD_RELOC_PPC_GOT_TPREL16:
6036 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6037 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6038 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6039 case BFD_RELOC_PPC_GOT_DTPREL16:
6040 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6041 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6042 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6043 case BFD_RELOC_PPC64_TPREL16_DS:
6044 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6045 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6046 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6047 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6048 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6049 case BFD_RELOC_PPC64_DTPREL16_DS:
6050 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6051 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6052 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6053 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6054 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6055 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6056 break;
0baf16f2 6057#endif
252b5132 6058 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6059 bytes, rather than 2, so offset it here appropriately. */
252b5132 6060 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6061 if (fixP->fx_pcrel)
252b5132
RH		 6062 abort ();
6063
94f592af 6064 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6065 + ((target_big_endian) ? 2 : 0),
6066 value, 2);
6067 break;
6068
6069 case BFD_RELOC_8:
94f592af 6070 if (fixP->fx_pcrel)
31a91399
NC		 6071 {
6072 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6073 ".byte <undefined_symbol> - ." */
31a91399
NC		 6074 if (fixP->fx_addsy)
6075 as_bad (_("Unable to handle reference to symbol %s"),
6076 S_GET_NAME (fixP->fx_addsy));
6077 else
6078 as_bad (_("Unable to resolve expression"));
6079 fixP->fx_done = 1;
6080 }
6081 else
6082 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6083 value, 1);
252b5132
RH		 6084 break;
6085
6086 case BFD_RELOC_24_PLT_PCREL:
6087 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6088 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6089 abort ();
6090
94f592af 6091 if (fixP->fx_done)
99a814a1
AM		 6092 {
6093 char *where;
6094 unsigned long insn;
6095
6096 /* Fetch the instruction, insert the fully resolved operand
6097 value, and stuff the instruction back again. */
94f592af 6098 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6099 if (target_big_endian)
6100 insn = bfd_getb32 ((unsigned char *) where);
6101 else
6102 insn = bfd_getl32 ((unsigned char *) where);
6103 if ((value & 3) != 0)
94f592af 6104 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6105 _("must branch to an address a multiple of 4"));
6106 if ((offsetT) value < -0x40000000
6107 || (offsetT) value >= 0x40000000)
94f592af 6108 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6109 _("@local or @plt branch destination is too far away, %ld bytes"),
6110 (long) value);
6111 insn = insn | (value & 0x03fffffc);
6112 if (target_big_endian)
6113 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6114 else
6115 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6116 }
252b5132
RH		 6117 break;
6118
6119 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6120 fixP->fx_done = 0;
6121 if (fixP->fx_addsy
6122 && !S_IS_DEFINED (fixP->fx_addsy)
6123 && !S_IS_WEAK (fixP->fx_addsy))
6124 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6125 break;
6126
6127 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6128 fixP->fx_done = 0;
252b5132
RH		 6129 break;
6130
0baf16f2 6131#ifdef OBJ_ELF
0baf16f2
AM		 6132 /* Generated by reference to `sym@tocbase'. The sym is
6133 ignored by the linker. */
6134 case BFD_RELOC_PPC64_TOC:
94f592af 6135 fixP->fx_done = 0;
0baf16f2 6136 break;
0baf16f2 6137#endif
252b5132 6138 default:
bc805888 6139 fprintf (stderr,
94f592af 6140 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6141 fflush (stderr);
252b5132
RH		 6142 abort ();
6143 }
6144 }
6145
6146#ifdef OBJ_ELF
94f592af 6147 fixP->fx_addnumber = value;
4e6935a6
AM		 6148
6149 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6150 from the section contents. If we are going to be emitting a reloc
6151 then the section contents are immaterial, so don't warn if they
6152 happen to overflow. Leave such warnings to ld. */
6153 if (!fixP->fx_done)
6154 fixP->fx_no_overflow = 1;
252b5132 6155#else
94f592af
NC		 6156 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6157 fixP->fx_addnumber = 0;
252b5132
RH		 6158 else
6159 {
6160#ifdef TE_PE
94f592af 6161 fixP->fx_addnumber = 0;
252b5132
RH		 6162#else
6163 /* We want to use the offset within the data segment of the
6164 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6165 fixP->fx_addnumber =
6166 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6167#endif
6168 }
6169#endif
252b5132
RH		 6170}
6171
6172/* Generate a reloc for a fixup. */
6173
6174arelent *
6175tc_gen_reloc (seg, fixp)
92161534 6176 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6177 fixS *fixp;
6178{
6179 arelent *reloc;
6180
6181 reloc = (arelent *) xmalloc (sizeof (arelent));
6182
49309057
ILT		 6183 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6184 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6185 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6186 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6187 if (reloc->howto == (reloc_howto_type *) NULL)
6188 {
6189 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6190 _("reloc %d not supported by object file format"),
6191 (int) fixp->fx_r_type);
252b5132
RH		 6192 return NULL;
6193 }
6194 reloc->addend = fixp->fx_addnumber;
6195
6196 return reloc;
6197}
75e21f08
JJ		 6198
6199void
6200ppc_cfi_frame_initial_instructions ()
6201{
6202 cfi_add_CFA_def_cfa (1, 0);
6203}
6204
6205int
1df69f4f 6206tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6207{
6208 unsigned int regnum = -1;
6209 unsigned int i;
6210 const char *p;
6211 char *q;
6212 static struct { char *name; int dw2regnum; } regnames[] =
6213 {
6214 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6215 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6216 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6217 { "spe_acc", 111 }, { "spefscr", 112 }
6218 };
6219
6220 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6221 if (strcmp (regnames[i].name, regname) == 0)
6222 return regnames[i].dw2regnum;
6223
6224 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6225 {
6226 p = regname + 1 + (regname[1] == '.');
6227 regnum = strtoul (p, &q, 10);
6228 if (p == q || *q || regnum >= 32)
6229 return -1;
6230 if (regname[0] == 'f')
b7d7dc63 6231 regnum += 32;
75e21f08 6232 else if (regname[0] == 'v')
b7d7dc63 6233 regnum += 77;
75e21f08
JJ		 6234 }
6235 else if (regname[0] == 'c' && regname[1] == 'r')
6236 {
6237 p = regname + 2 + (regname[2] == '.');
6238 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6239 return -1;
75e21f08
JJ		 6240 regnum = p[0] - '0' + 68;
6241 }
6242 return regnum;
6243}
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