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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
b9c361e0
JL		 67/* Split the indicated value with the msbs in bits 11-15
68 and the lsbs in bits 21-31. */
69#define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
70
71/* Split the indicated value with the msbs in bits 6-10
72 and the lsbs in bits 21-31. */
73#define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
74
75/* #lo(value) denotes the lsb 16 bits in split16a format. */
76#define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
77
78/* #lo(value) denotes the lsb 16 bits in split16d format. */
79#define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
80
0baf16f2
AM		 81/* #hi(value) denotes bits 16 through 31 of the indicated value. */
82#define PPC_HI(v) (((v) >> 16) & 0xffff)
83
b9c361e0
JL		 84/* #lo(value) denotes the msb 16 bits in split16a format. */
85#define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
86
87/* #lo(value) denotes the msb 16 bits in split16d format. */
88#define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
89
0baf16f2
AM		 90/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
91 the indicated value, compensating for #lo() being treated as a
92 signed number. */
15c1449b 93#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2 94
b9c361e0
JL		 95/* #ha(value) denotes the high adjusted value in split16a format. */
96#define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
97
98/* #ha(value) denotes the high adjusted value in split16d format. */
99#define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
100
0baf16f2 101/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 102#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 103
104/* #highera(value) denotes bits 32 through 47 of the indicated value,
105 compensating for #lo() being treated as a signed number. */
15c1449b 106#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 107
108/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 109#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 110
111/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 112 compensating for #lo being treated as a signed number. */
113#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 114
115#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
116
b34976b6 117static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 118
98027b10
AM		 119static void ppc_macro (char *, const struct powerpc_macro *);
120static void ppc_byte (int);
0baf16f2
AM		 121
122#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 123static void ppc_tc (int);
124static void ppc_machine (int);
0baf16f2 125#endif
252b5132
RH		 126
127#ifdef OBJ_XCOFF
98027b10
AM		 128static void ppc_comm (int);
129static void ppc_bb (int);
130static void ppc_bc (int);
131static void ppc_bf (int);
132static void ppc_biei (int);
133static void ppc_bs (int);
134static void ppc_eb (int);
135static void ppc_ec (int);
136static void ppc_ef (int);
137static void ppc_es (int);
138static void ppc_csect (int);
85645aed 139static void ppc_dwsect (int);
98027b10
AM		 140static void ppc_change_csect (symbolS *, offsetT);
141static void ppc_function (int);
142static void ppc_extern (int);
143static void ppc_lglobl (int);
c865e45b 144static void ppc_ref (int);
98027b10
AM		 145static void ppc_section (int);
146static void ppc_named_section (int);
147static void ppc_stabx (int);
148static void ppc_rename (int);
149static void ppc_toc (int);
150static void ppc_xcoff_cons (int);
151static void ppc_vbyte (int);
252b5132
RH		 152#endif
153
154#ifdef OBJ_ELF
98027b10
AM		 155static void ppc_elf_cons (int);
156static void ppc_elf_rdata (int);
157static void ppc_elf_lcomm (int);
252b5132
RH		 158#endif
159
160#ifdef TE_PE
98027b10
AM		 161static void ppc_previous (int);
162static void ppc_pdata (int);
163static void ppc_ydata (int);
164static void ppc_reldata (int);
165static void ppc_rdata (int);
166static void ppc_ualong (int);
167static void ppc_znop (int);
168static void ppc_pe_comm (int);
169static void ppc_pe_section (int);
170static void ppc_pe_function (int);
171static void ppc_pe_tocd (int);
252b5132
RH		 172#endif
173\f
174/* Generic assembler global variables which must be defined by all
175 targets. */
176
177#ifdef OBJ_ELF
178/* This string holds the chars that always start a comment. If the
179 pre-processor is disabled, these aren't very useful. The macro
180 tc_comment_chars points to this. We use this, rather than the
181 usual comment_chars, so that we can switch for Solaris conventions. */
182static const char ppc_solaris_comment_chars[] = "#!";
183static const char ppc_eabi_comment_chars[] = "#";
184
185#ifdef TARGET_SOLARIS_COMMENT
186const char *ppc_comment_chars = ppc_solaris_comment_chars;
187#else
188const char *ppc_comment_chars = ppc_eabi_comment_chars;
189#endif
190#else
191const char comment_chars[] = "#";
192#endif
193
194/* Characters which start a comment at the beginning of a line. */
195const char line_comment_chars[] = "#";
196
197/* Characters which may be used to separate multiple commands on a
198 single line. */
199const char line_separator_chars[] = ";";
200
201/* Characters which are used to indicate an exponent in a floating
202 point number. */
203const char EXP_CHARS[] = "eE";
204
205/* Characters which mean that a number is a floating point constant,
206 as in 0d1.0. */
207const char FLT_CHARS[] = "dD";
5ce8663f 208
5e02f92e 209/* Anything that can start an operand needs to be mentioned here,
ac805826 210 to stop the input scrubber eating whitespace. */
5e02f92e 211const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 212
213/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
214int ppc_cie_data_alignment;
783de163 215
8fbf7334
JL		 216/* The dwarf2 minimum instruction length. */
217int ppc_dwarf2_line_min_insn_length;
218
cef4f754
AM		 219/* More than this number of nops in an alignment op gets a branch
220 instead. */
221unsigned long nop_limit = 4;
222
783de163
AM		 223/* The type of processor we are assembling for. This is one or more
224 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 225ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 226
227/* Flags set on encountering toc relocs. */
228enum {
229 has_large_toc_reloc = 1,
230 has_small_toc_reloc = 2
231} toc_reloc_types;
252b5132
RH		 232\f
233/* The target specific pseudo-ops which we support. */
234
235const pseudo_typeS md_pseudo_table[] =
236{
237 /* Pseudo-ops which must be overridden. */
238 { "byte", ppc_byte, 0 },
239
240#ifdef OBJ_XCOFF
241 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
242 legitimately belong in the obj-*.c file. However, XCOFF is based
243 on COFF, and is only implemented for the RS/6000. We just use
244 obj-coff.c, and add what we need here. */
245 { "comm", ppc_comm, 0 },
246 { "lcomm", ppc_comm, 1 },
247 { "bb", ppc_bb, 0 },
248 { "bc", ppc_bc, 0 },
249 { "bf", ppc_bf, 0 },
250 { "bi", ppc_biei, 0 },
251 { "bs", ppc_bs, 0 },
252 { "csect", ppc_csect, 0 },
85645aed 253 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 254 { "data", ppc_section, 'd' },
255 { "eb", ppc_eb, 0 },
256 { "ec", ppc_ec, 0 },
257 { "ef", ppc_ef, 0 },
258 { "ei", ppc_biei, 1 },
259 { "es", ppc_es, 0 },
260 { "extern", ppc_extern, 0 },
261 { "function", ppc_function, 0 },
262 { "lglobl", ppc_lglobl, 0 },
c865e45b 263 { "ref", ppc_ref, 0 },
252b5132
RH		 264 { "rename", ppc_rename, 0 },
265 { "section", ppc_named_section, 0 },
266 { "stabx", ppc_stabx, 0 },
267 { "text", ppc_section, 't' },
268 { "toc", ppc_toc, 0 },
269 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 270 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 271 { "word", ppc_xcoff_cons, 1 },
272 { "short", ppc_xcoff_cons, 1 },
273 { "vbyte", ppc_vbyte, 0 },
274#endif
275
276#ifdef OBJ_ELF
0baf16f2
AM		 277 { "llong", ppc_elf_cons, 8 },
278 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 279 { "long", ppc_elf_cons, 4 },
280 { "word", ppc_elf_cons, 2 },
281 { "short", ppc_elf_cons, 2 },
282 { "rdata", ppc_elf_rdata, 0 },
283 { "rodata", ppc_elf_rdata, 0 },
284 { "lcomm", ppc_elf_lcomm, 0 },
285#endif
286
287#ifdef TE_PE
99a814a1 288 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 289 { "previous", ppc_previous, 0 },
290 { "pdata", ppc_pdata, 0 },
291 { "ydata", ppc_ydata, 0 },
292 { "reldata", ppc_reldata, 0 },
293 { "rdata", ppc_rdata, 0 },
294 { "ualong", ppc_ualong, 0 },
295 { "znop", ppc_znop, 0 },
296 { "comm", ppc_pe_comm, 0 },
297 { "lcomm", ppc_pe_comm, 1 },
298 { "section", ppc_pe_section, 0 },
299 { "function", ppc_pe_function,0 },
300 { "tocd", ppc_pe_tocd, 0 },
301#endif
302
0baf16f2 303#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 304 { "tc", ppc_tc, 0 },
0baf16f2
AM		 305 { "machine", ppc_machine, 0 },
306#endif
252b5132
RH		 307
308 { NULL, NULL, 0 }
309};
310
311\f
99a814a1
AM		 312/* Predefined register names if -mregnames (or default for Windows NT).
313 In general, there are lots of them, in an attempt to be compatible
314 with a number of other Windows NT assemblers. */
252b5132
RH		 315
316/* Structure to hold information about predefined registers. */
317struct pd_reg
318 {
319 char *name;
320 int value;
321 };
322
323/* List of registers that are pre-defined:
324
325 Each general register has predefined names of the form:
326 1. r<reg_num> which has the value <reg_num>.
327 2. r.<reg_num> which has the value <reg_num>.
328
252b5132
RH		 329 Each floating point register has predefined names of the form:
330 1. f<reg_num> which has the value <reg_num>.
331 2. f.<reg_num> which has the value <reg_num>.
332
7a899fff
C		 333 Each vector unit register has predefined names of the form:
334 1. v<reg_num> which has the value <reg_num>.
335 2. v.<reg_num> which has the value <reg_num>.
336
252b5132
RH		 337 Each condition register has predefined names of the form:
338 1. cr<reg_num> which has the value <reg_num>.
339 2. cr.<reg_num> which has the value <reg_num>.
340
341 There are individual registers as well:
342 sp or r.sp has the value 1
343 rtoc or r.toc has the value 2
344 fpscr has the value 0
345 xer has the value 1
346 lr has the value 8
347 ctr has the value 9
348 pmr has the value 0
349 dar has the value 19
350 dsisr has the value 18
351 dec has the value 22
352 sdr1 has the value 25
353 srr0 has the value 26
354 srr1 has the value 27
355
81d4177b 356 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 357
358static const struct pd_reg pre_defined_registers[] =
359{
360 { "cr.0", 0 }, /* Condition Registers */
361 { "cr.1", 1 },
362 { "cr.2", 2 },
363 { "cr.3", 3 },
364 { "cr.4", 4 },
365 { "cr.5", 5 },
366 { "cr.6", 6 },
367 { "cr.7", 7 },
368
369 { "cr0", 0 },
370 { "cr1", 1 },
371 { "cr2", 2 },
372 { "cr3", 3 },
373 { "cr4", 4 },
374 { "cr5", 5 },
375 { "cr6", 6 },
376 { "cr7", 7 },
377
378 { "ctr", 9 },
379
380 { "dar", 19 }, /* Data Access Register */
381 { "dec", 22 }, /* Decrementer */
382 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
383
384 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 385 { "f.1", 1 },
386 { "f.10", 10 },
387 { "f.11", 11 },
388 { "f.12", 12 },
389 { "f.13", 13 },
390 { "f.14", 14 },
391 { "f.15", 15 },
392 { "f.16", 16 },
393 { "f.17", 17 },
394 { "f.18", 18 },
395 { "f.19", 19 },
396 { "f.2", 2 },
397 { "f.20", 20 },
398 { "f.21", 21 },
399 { "f.22", 22 },
400 { "f.23", 23 },
401 { "f.24", 24 },
402 { "f.25", 25 },
403 { "f.26", 26 },
404 { "f.27", 27 },
405 { "f.28", 28 },
406 { "f.29", 29 },
407 { "f.3", 3 },
252b5132
RH		 408 { "f.30", 30 },
409 { "f.31", 31 },
066be9f7
PB		 410
411 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
412 { "f.33", 33 },
413 { "f.34", 34 },
414 { "f.35", 35 },
415 { "f.36", 36 },
416 { "f.37", 37 },
417 { "f.38", 38 },
418 { "f.39", 39 },
81d4177b 419 { "f.4", 4 },
066be9f7
PB		 420 { "f.40", 40 },
421 { "f.41", 41 },
422 { "f.42", 42 },
423 { "f.43", 43 },
424 { "f.44", 44 },
425 { "f.45", 45 },
426 { "f.46", 46 },
427 { "f.47", 47 },
428 { "f.48", 48 },
429 { "f.49", 49 },
81d4177b 430 { "f.5", 5 },
066be9f7
PB		 431 { "f.50", 50 },
432 { "f.51", 51 },
433 { "f.52", 52 },
434 { "f.53", 53 },
435 { "f.54", 54 },
436 { "f.55", 55 },
437 { "f.56", 56 },
438 { "f.57", 57 },
439 { "f.58", 58 },
440 { "f.59", 59 },
81d4177b 441 { "f.6", 6 },
066be9f7
PB		 442 { "f.60", 60 },
443 { "f.61", 61 },
444 { "f.62", 62 },
445 { "f.63", 63 },
81d4177b
KH		 446 { "f.7", 7 },
447 { "f.8", 8 },
448 { "f.9", 9 },
449
450 { "f0", 0 },
451 { "f1", 1 },
452 { "f10", 10 },
453 { "f11", 11 },
454 { "f12", 12 },
455 { "f13", 13 },
456 { "f14", 14 },
457 { "f15", 15 },
458 { "f16", 16 },
459 { "f17", 17 },
460 { "f18", 18 },
461 { "f19", 19 },
462 { "f2", 2 },
463 { "f20", 20 },
464 { "f21", 21 },
465 { "f22", 22 },
466 { "f23", 23 },
467 { "f24", 24 },
468 { "f25", 25 },
469 { "f26", 26 },
470 { "f27", 27 },
471 { "f28", 28 },
472 { "f29", 29 },
473 { "f3", 3 },
252b5132
RH		 474 { "f30", 30 },
475 { "f31", 31 },
066be9f7
PB		 476
477 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
478 { "f33", 33 },
479 { "f34", 34 },
480 { "f35", 35 },
481 { "f36", 36 },
482 { "f37", 37 },
483 { "f38", 38 },
484 { "f39", 39 },
81d4177b 485 { "f4", 4 },
066be9f7
PB		 486 { "f40", 40 },
487 { "f41", 41 },
488 { "f42", 42 },
489 { "f43", 43 },
490 { "f44", 44 },
491 { "f45", 45 },
492 { "f46", 46 },
493 { "f47", 47 },
494 { "f48", 48 },
495 { "f49", 49 },
81d4177b 496 { "f5", 5 },
066be9f7
PB		 497 { "f50", 50 },
498 { "f51", 51 },
499 { "f52", 52 },
500 { "f53", 53 },
501 { "f54", 54 },
502 { "f55", 55 },
503 { "f56", 56 },
504 { "f57", 57 },
505 { "f58", 58 },
506 { "f59", 59 },
81d4177b 507 { "f6", 6 },
066be9f7
PB		 508 { "f60", 60 },
509 { "f61", 61 },
510 { "f62", 62 },
511 { "f63", 63 },
81d4177b
KH		 512 { "f7", 7 },
513 { "f8", 8 },
514 { "f9", 9 },
252b5132
RH		 515
516 { "fpscr", 0 },
517
c3d65c1c
BE		 518 /* Quantization registers used with pair single instructions. */
519 { "gqr.0", 0 },
520 { "gqr.1", 1 },
521 { "gqr.2", 2 },
522 { "gqr.3", 3 },
523 { "gqr.4", 4 },
524 { "gqr.5", 5 },
525 { "gqr.6", 6 },
526 { "gqr.7", 7 },
527 { "gqr0", 0 },
528 { "gqr1", 1 },
529 { "gqr2", 2 },
530 { "gqr3", 3 },
531 { "gqr4", 4 },
532 { "gqr5", 5 },
533 { "gqr6", 6 },
534 { "gqr7", 7 },
535
252b5132
RH		 536 { "lr", 8 }, /* Link Register */
537
538 { "pmr", 0 },
539
540 { "r.0", 0 }, /* General Purpose Registers */
541 { "r.1", 1 },
542 { "r.10", 10 },
543 { "r.11", 11 },
544 { "r.12", 12 },
545 { "r.13", 13 },
546 { "r.14", 14 },
547 { "r.15", 15 },
548 { "r.16", 16 },
549 { "r.17", 17 },
550 { "r.18", 18 },
551 { "r.19", 19 },
552 { "r.2", 2 },
553 { "r.20", 20 },
554 { "r.21", 21 },
555 { "r.22", 22 },
556 { "r.23", 23 },
557 { "r.24", 24 },
558 { "r.25", 25 },
559 { "r.26", 26 },
560 { "r.27", 27 },
561 { "r.28", 28 },
562 { "r.29", 29 },
563 { "r.3", 3 },
564 { "r.30", 30 },
565 { "r.31", 31 },
566 { "r.4", 4 },
567 { "r.5", 5 },
568 { "r.6", 6 },
569 { "r.7", 7 },
570 { "r.8", 8 },
571 { "r.9", 9 },
572
573 { "r.sp", 1 }, /* Stack Pointer */
574
575 { "r.toc", 2 }, /* Pointer to the table of contents */
576
577 { "r0", 0 }, /* More general purpose registers */
578 { "r1", 1 },
579 { "r10", 10 },
580 { "r11", 11 },
581 { "r12", 12 },
582 { "r13", 13 },
583 { "r14", 14 },
584 { "r15", 15 },
585 { "r16", 16 },
586 { "r17", 17 },
587 { "r18", 18 },
588 { "r19", 19 },
589 { "r2", 2 },
590 { "r20", 20 },
591 { "r21", 21 },
592 { "r22", 22 },
593 { "r23", 23 },
594 { "r24", 24 },
595 { "r25", 25 },
596 { "r26", 26 },
597 { "r27", 27 },
598 { "r28", 28 },
599 { "r29", 29 },
600 { "r3", 3 },
601 { "r30", 30 },
602 { "r31", 31 },
603 { "r4", 4 },
604 { "r5", 5 },
605 { "r6", 6 },
606 { "r7", 7 },
607 { "r8", 8 },
608 { "r9", 9 },
609
610 { "rtoc", 2 }, /* Table of contents */
611
612 { "sdr1", 25 }, /* Storage Description Register 1 */
613
614 { "sp", 1 },
615
616 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
617 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 618
066be9f7 619 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 620 { "v.1", 1 },
621 { "v.10", 10 },
622 { "v.11", 11 },
623 { "v.12", 12 },
624 { "v.13", 13 },
625 { "v.14", 14 },
626 { "v.15", 15 },
627 { "v.16", 16 },
628 { "v.17", 17 },
629 { "v.18", 18 },
630 { "v.19", 19 },
631 { "v.2", 2 },
632 { "v.20", 20 },
633 { "v.21", 21 },
634 { "v.22", 22 },
635 { "v.23", 23 },
636 { "v.24", 24 },
637 { "v.25", 25 },
638 { "v.26", 26 },
639 { "v.27", 27 },
640 { "v.28", 28 },
641 { "v.29", 29 },
642 { "v.3", 3 },
7a899fff
C		 643 { "v.30", 30 },
644 { "v.31", 31 },
81d4177b
KH		 645 { "v.4", 4 },
646 { "v.5", 5 },
647 { "v.6", 6 },
648 { "v.7", 7 },
649 { "v.8", 8 },
650 { "v.9", 9 },
7a899fff
C		 651
652 { "v0", 0 },
81d4177b
KH		 653 { "v1", 1 },
654 { "v10", 10 },
655 { "v11", 11 },
656 { "v12", 12 },
657 { "v13", 13 },
658 { "v14", 14 },
659 { "v15", 15 },
660 { "v16", 16 },
661 { "v17", 17 },
662 { "v18", 18 },
663 { "v19", 19 },
664 { "v2", 2 },
665 { "v20", 20 },
666 { "v21", 21 },
667 { "v22", 22 },
668 { "v23", 23 },
669 { "v24", 24 },
670 { "v25", 25 },
671 { "v26", 26 },
672 { "v27", 27 },
673 { "v28", 28 },
674 { "v29", 29 },
675 { "v3", 3 },
7a899fff
C		 676 { "v30", 30 },
677 { "v31", 31 },
81d4177b
KH		 678 { "v4", 4 },
679 { "v5", 5 },
680 { "v6", 6 },
681 { "v7", 7 },
682 { "v8", 8 },
7a899fff 683 { "v9", 9 },
252b5132 684
066be9f7
PB		 685 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
686 { "vs.1", 1 },
687 { "vs.10", 10 },
688 { "vs.11", 11 },
689 { "vs.12", 12 },
690 { "vs.13", 13 },
691 { "vs.14", 14 },
692 { "vs.15", 15 },
693 { "vs.16", 16 },
694 { "vs.17", 17 },
695 { "vs.18", 18 },
696 { "vs.19", 19 },
697 { "vs.2", 2 },
698 { "vs.20", 20 },
699 { "vs.21", 21 },
700 { "vs.22", 22 },
701 { "vs.23", 23 },
702 { "vs.24", 24 },
703 { "vs.25", 25 },
704 { "vs.26", 26 },
705 { "vs.27", 27 },
706 { "vs.28", 28 },
707 { "vs.29", 29 },
708 { "vs.3", 3 },
709 { "vs.30", 30 },
710 { "vs.31", 31 },
711 { "vs.32", 32 },
712 { "vs.33", 33 },
713 { "vs.34", 34 },
714 { "vs.35", 35 },
715 { "vs.36", 36 },
716 { "vs.37", 37 },
717 { "vs.38", 38 },
718 { "vs.39", 39 },
719 { "vs.4", 4 },
720 { "vs.40", 40 },
721 { "vs.41", 41 },
722 { "vs.42", 42 },
723 { "vs.43", 43 },
724 { "vs.44", 44 },
725 { "vs.45", 45 },
726 { "vs.46", 46 },
727 { "vs.47", 47 },
728 { "vs.48", 48 },
729 { "vs.49", 49 },
730 { "vs.5", 5 },
731 { "vs.50", 50 },
732 { "vs.51", 51 },
733 { "vs.52", 52 },
734 { "vs.53", 53 },
735 { "vs.54", 54 },
736 { "vs.55", 55 },
737 { "vs.56", 56 },
738 { "vs.57", 57 },
739 { "vs.58", 58 },
740 { "vs.59", 59 },
741 { "vs.6", 6 },
742 { "vs.60", 60 },
743 { "vs.61", 61 },
744 { "vs.62", 62 },
745 { "vs.63", 63 },
746 { "vs.7", 7 },
747 { "vs.8", 8 },
748 { "vs.9", 9 },
749
750 { "vs0", 0 },
751 { "vs1", 1 },
752 { "vs10", 10 },
753 { "vs11", 11 },
754 { "vs12", 12 },
755 { "vs13", 13 },
756 { "vs14", 14 },
757 { "vs15", 15 },
758 { "vs16", 16 },
759 { "vs17", 17 },
760 { "vs18", 18 },
761 { "vs19", 19 },
762 { "vs2", 2 },
763 { "vs20", 20 },
764 { "vs21", 21 },
765 { "vs22", 22 },
766 { "vs23", 23 },
767 { "vs24", 24 },
768 { "vs25", 25 },
769 { "vs26", 26 },
770 { "vs27", 27 },
771 { "vs28", 28 },
772 { "vs29", 29 },
773 { "vs3", 3 },
774 { "vs30", 30 },
775 { "vs31", 31 },
776 { "vs32", 32 },
777 { "vs33", 33 },
778 { "vs34", 34 },
779 { "vs35", 35 },
780 { "vs36", 36 },
781 { "vs37", 37 },
782 { "vs38", 38 },
783 { "vs39", 39 },
784 { "vs4", 4 },
785 { "vs40", 40 },
786 { "vs41", 41 },
787 { "vs42", 42 },
788 { "vs43", 43 },
789 { "vs44", 44 },
790 { "vs45", 45 },
791 { "vs46", 46 },
792 { "vs47", 47 },
793 { "vs48", 48 },
794 { "vs49", 49 },
795 { "vs5", 5 },
796 { "vs50", 50 },
797 { "vs51", 51 },
798 { "vs52", 52 },
799 { "vs53", 53 },
800 { "vs54", 54 },
801 { "vs55", 55 },
802 { "vs56", 56 },
803 { "vs57", 57 },
804 { "vs58", 58 },
805 { "vs59", 59 },
806 { "vs6", 6 },
807 { "vs60", 60 },
808 { "vs61", 61 },
809 { "vs62", 62 },
810 { "vs63", 63 },
811 { "vs7", 7 },
812 { "vs8", 8 },
813 { "vs9", 9 },
814
252b5132
RH		 815 { "xer", 1 },
816
817};
818
bc805888 819#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 820
821/* Given NAME, find the register number associated with that name, return
822 the integer value associated with the given name or -1 on failure. */
823
252b5132 824static int
98027b10 825reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 826{
827 int middle, low, high;
828 int cmp;
829
830 low = 0;
831 high = regcount - 1;
832
833 do
834 {
835 middle = (low + high) / 2;
836 cmp = strcasecmp (name, regs[middle].name);
837 if (cmp < 0)
838 high = middle - 1;
839 else if (cmp > 0)
840 low = middle + 1;
841 else
842 return regs[middle].value;
843 }
844 while (low <= high);
845
846 return -1;
847}
848
849/*
99a814a1 850 * Summary of register_name.
252b5132
RH		 851 *
852 * in: Input_line_pointer points to 1st char of operand.
853 *
854 * out: A expressionS.
855 * The operand may have been a register: in this case, X_op == O_register,
856 * X_add_number is set to the register number, and truth is returned.
857 * Input_line_pointer->(next non-blank) char after operand, or is in its
858 * original state.
859 */
860
b34976b6 861static bfd_boolean
98027b10 862register_name (expressionS *expressionP)
252b5132
RH		 863{
864 int reg_number;
865 char *name;
866 char *start;
867 char c;
868
99a814a1 869 /* Find the spelling of the operand. */
252b5132 870 start = name = input_line_pointer;
3882b010 871 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 872 name = ++input_line_pointer;
873
3882b010 874 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 875 return FALSE;
252b5132
RH		 876
877 c = get_symbol_end ();
878 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
879
468cced8
AM		 880 /* Put back the delimiting char. */
881 *input_line_pointer = c;
882
99a814a1 883 /* Look to see if it's in the register table. */
81d4177b 884 if (reg_number >= 0)
252b5132
RH		 885 {
886 expressionP->X_op = O_register;
887 expressionP->X_add_number = reg_number;
81d4177b 888
99a814a1 889 /* Make the rest nice. */
252b5132
RH		 890 expressionP->X_add_symbol = NULL;
891 expressionP->X_op_symbol = NULL;
b34976b6 892 return TRUE;
252b5132 893 }
468cced8
AM		 894
895 /* Reset the line as if we had not done anything. */
896 input_line_pointer = start;
b34976b6 897 return FALSE;
252b5132
RH		 898}
899\f
900/* This function is called for each symbol seen in an expression. It
901 handles the special parsing which PowerPC assemblers are supposed
902 to use for condition codes. */
903
904/* Whether to do the special parsing. */
b34976b6 905static bfd_boolean cr_operand;
252b5132
RH		 906
907/* Names to recognize in a condition code. This table is sorted. */
908static const struct pd_reg cr_names[] =
909{
910 { "cr0", 0 },
911 { "cr1", 1 },
912 { "cr2", 2 },
913 { "cr3", 3 },
914 { "cr4", 4 },
915 { "cr5", 5 },
916 { "cr6", 6 },
917 { "cr7", 7 },
918 { "eq", 2 },
919 { "gt", 1 },
920 { "lt", 0 },
921 { "so", 3 },
922 { "un", 3 }
923};
924
925/* Parsing function. This returns non-zero if it recognized an
926 expression. */
927
928int
91d6fa6a 929ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 930{
931 int val;
932
933 if (! cr_operand)
934 return 0;
935
13abbae3
AM		 936 if (*name == '%')
937 ++name;
252b5132
RH		 938 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
939 name);
940 if (val < 0)
941 return 0;
942
91d6fa6a
NC		 943 exp->X_op = O_constant;
944 exp->X_add_number = val;
252b5132
RH		 945
946 return 1;
947}
948\f
949/* Local variables. */
950
2b3c4602
AM		 951/* Whether to target xcoff64/elf64. */
952static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 953
252b5132
RH		 954/* Opcode hash table. */
955static struct hash_control *ppc_hash;
956
957/* Macro hash table. */
958static struct hash_control *ppc_macro_hash;
959
960#ifdef OBJ_ELF
99a814a1 961/* What type of shared library support to use. */
5d6f4f16 962static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 963
99a814a1 964/* Flags to set in the elf header. */
252b5132
RH		 965static flagword ppc_flags = 0;
966
967/* Whether this is Solaris or not. */
968#ifdef TARGET_SOLARIS_COMMENT
b34976b6 969#define SOLARIS_P TRUE
252b5132 970#else
b34976b6 971#define SOLARIS_P FALSE
252b5132
RH		 972#endif
973
b34976b6 974static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 975#endif
976
977#ifdef OBJ_XCOFF
978
979/* The RS/6000 assembler uses the .csect pseudo-op to generate code
980 using a bunch of different sections. These assembler sections,
981 however, are all encompassed within the .text or .data sections of
982 the final output file. We handle this by using different
983 subsegments within these main segments. */
984
985/* Next subsegment to allocate within the .text segment. */
986static subsegT ppc_text_subsegment = 2;
987
988/* Linked list of csects in the text section. */
989static symbolS *ppc_text_csects;
990
991/* Next subsegment to allocate within the .data segment. */
992static subsegT ppc_data_subsegment = 2;
993
994/* Linked list of csects in the data section. */
995static symbolS *ppc_data_csects;
996
997/* The current csect. */
998static symbolS *ppc_current_csect;
999
1000/* The RS/6000 assembler uses a TOC which holds addresses of functions
1001 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1002 A special relocation is used when accessing TOC entries. We handle
1003 the TOC as a subsegment within the .data segment. We set it up if
1004 we see a .toc pseudo-op, and save the csect symbol here. */
1005static symbolS *ppc_toc_csect;
1006
1007/* The first frag in the TOC subsegment. */
1008static fragS *ppc_toc_frag;
1009
1010/* The first frag in the first subsegment after the TOC in the .data
1011 segment. NULL if there are no subsegments after the TOC. */
1012static fragS *ppc_after_toc_frag;
1013
1014/* The current static block. */
1015static symbolS *ppc_current_block;
1016
1017/* The COFF debugging section; set by md_begin. This is not the
1018 .debug section, but is instead the secret BFD section which will
1019 cause BFD to set the section number of a symbol to N_DEBUG. */
1020static asection *ppc_coff_debug_section;
1021
85645aed
TG		 1022/* Structure to set the length field of the dwarf sections. */
1023struct dw_subsection {
1024 /* Subsections are simply linked. */
1025 struct dw_subsection *link;
1026
1027 /* The subsection number. */
1028 subsegT subseg;
1029
1030 /* Expression to compute the length of the section. */
1031 expressionS end_exp;
1032};
1033
1034static struct dw_section {
1035 /* Corresponding section. */
1036 segT sect;
1037
1038 /* Simply linked list of subsections with a label. */
1039 struct dw_subsection *list_subseg;
1040
1041 /* The anonymous subsection. */
1042 struct dw_subsection *anon_subseg;
1043} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1044#endif /* OBJ_XCOFF */
1045
1046#ifdef TE_PE
1047
1048/* Various sections that we need for PE coff support. */
1049static segT ydata_section;
1050static segT pdata_section;
1051static segT reldata_section;
1052static segT rdata_section;
1053static segT tocdata_section;
1054
81d4177b 1055/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1056static segT ppc_previous_section;
1057static segT ppc_current_section;
1058
1059#endif /* TE_PE */
1060
1061#ifdef OBJ_ELF
1062symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1063#define PPC_APUINFO_ISEL 0x40
1064#define PPC_APUINFO_PMR 0x41
1065#define PPC_APUINFO_RFMCI 0x42
1066#define PPC_APUINFO_CACHELCK 0x43
1067#define PPC_APUINFO_SPE 0x100
1068#define PPC_APUINFO_EFS 0x101
1069#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1070#define PPC_APUINFO_VLE 0x104
6a0c61b7 1071
b34976b6
AM		 1072/*
1073 * We keep a list of APUinfo
6a0c61b7
EZ		 1074 */
1075unsigned long *ppc_apuinfo_list;
1076unsigned int ppc_apuinfo_num;
1077unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1078#endif /* OBJ_ELF */
1079\f
1080#ifdef OBJ_ELF
15c1449b 1081const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1082#else
15c1449b 1083const char *const md_shortopts = "um:";
252b5132 1084#endif
cef4f754 1085#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1086const struct option md_longopts[] = {
cef4f754 1087 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1088 {NULL, no_argument, NULL, 0}
1089};
15c1449b 1090const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1091
1092int
98027b10 1093md_parse_option (int c, char *arg)
252b5132 1094{
69fe9ce5
AM		 1095 ppc_cpu_t new_cpu;
1096
252b5132
RH		 1097 switch (c)
1098 {
1099 case 'u':
1100 /* -u means that any undefined symbols should be treated as
1101 external, which is the default for gas anyhow. */
1102 break;
1103
1104#ifdef OBJ_ELF
1105 case 'l':
1106 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1107 sake, recognize -be also. */
252b5132
RH		 1108 if (strcmp (arg, "e") == 0)
1109 {
1110 target_big_endian = 0;
1111 set_target_endian = 1;
b9c361e0 1112 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1113 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1114 }
1115 else
1116 return 0;
1117
1118 break;
1119
1120 case 'b':
1121 if (strcmp (arg, "e") == 0)
1122 {
1123 target_big_endian = 1;
1124 set_target_endian = 1;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130
1131 case 'K':
99a814a1 1132 /* Recognize -K PIC. */
252b5132
RH		 1133 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1134 {
1135 shlib = SHLIB_PIC;
1136 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1137 }
1138 else
1139 return 0;
1140
1141 break;
1142#endif
1143
7f6d05e8
CP		 1144 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1145 case 'a':
1146 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1147 {
1148#ifdef BFD64
1149 ppc_obj64 = 1;
d6ed37ed
AM		 1150 if (ppc_cpu & PPC_OPCODE_VLE)
1151 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1152#else
1153 as_fatal (_("%s unsupported"), "-a64");
1154#endif
1155 }
7f6d05e8 1156 else if (strcmp (arg, "32") == 0)
2b3c4602 1157 ppc_obj64 = 0;
7f6d05e8
CP		 1158 else
1159 return 0;
1160 break;
81d4177b 1161
252b5132 1162 case 'm':
b9c361e0
JL		 1163 new_cpu = ppc_parse_cpu (ppc_cpu, arg);
1164 if (new_cpu != 0)
1165 {
1166 ppc_cpu = new_cpu;
d6ed37ed
AM		 1167 if (strcmp (arg, "vle") == 0)
1168 {
1169 if (set_target_endian && target_big_endian == 0)
1170 as_bad (_("the use of -mvle requires big endian."));
1171 if (ppc_obj64)
1172 as_bad (_("the use of -mvle requires -a32."));
1173 }
b9c361e0 1174 }
252b5132
RH		 1175
1176 else if (strcmp (arg, "regnames") == 0)
b34976b6 1177 reg_names_p = TRUE;
252b5132
RH		 1178
1179 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1180 reg_names_p = FALSE;
252b5132
RH		 1181
1182#ifdef OBJ_ELF
99a814a1
AM		 1183 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1184 that require relocation. */
252b5132
RH		 1185 else if (strcmp (arg, "relocatable") == 0)
1186 {
5d6f4f16 1187 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1188 ppc_flags |= EF_PPC_RELOCATABLE;
1189 }
1190
1191 else if (strcmp (arg, "relocatable-lib") == 0)
1192 {
5d6f4f16 1193 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1194 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1195 }
1196
99a814a1 1197 /* -memb, set embedded bit. */
252b5132
RH		 1198 else if (strcmp (arg, "emb") == 0)
1199 ppc_flags |= EF_PPC_EMB;
1200
cc643b88 1201 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1202 else if (strcmp (arg, "little") == 0
1203 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1204 {
1205 target_big_endian = 0;
1206 set_target_endian = 1;
b9c361e0 1207 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1208 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1209 }
1210
1211 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1212 {
1213 target_big_endian = 1;
1214 set_target_endian = 1;
1215 }
1216
1217 else if (strcmp (arg, "solaris") == 0)
1218 {
b34976b6 1219 msolaris = TRUE;
252b5132
RH		 1220 ppc_comment_chars = ppc_solaris_comment_chars;
1221 }
1222
1223 else if (strcmp (arg, "no-solaris") == 0)
1224 {
b34976b6 1225 msolaris = FALSE;
252b5132
RH		 1226 ppc_comment_chars = ppc_eabi_comment_chars;
1227 }
1228#endif
1229 else
1230 {
1231 as_bad (_("invalid switch -m%s"), arg);
1232 return 0;
1233 }
1234 break;
1235
1236#ifdef OBJ_ELF
1237 /* -V: SVR4 argument to print version ID. */
1238 case 'V':
1239 print_version_id ();
1240 break;
1241
1242 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1243 should be emitted or not. FIXME: Not implemented. */
1244 case 'Q':
1245 break;
1246
1247 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1248 rather than .stabs.excl, which is ignored by the linker.
1249 FIXME: Not implemented. */
1250 case 's':
1251 if (arg)
1252 return 0;
1253
1254 break;
1255#endif
1256
cef4f754
AM		 1257 case OPTION_NOPS:
1258 {
1259 char *end;
1260 nop_limit = strtoul (optarg, &end, 0);
1261 if (*end)
1262 as_bad (_("--nops needs a numeric argument"));
1263 }
1264 break;
85645aed 1265
252b5132
RH		 1266 default:
1267 return 0;
1268 }
1269
1270 return 1;
1271}
1272
1273void
98027b10 1274md_show_usage (FILE *stream)
252b5132 1275{
bc805888 1276 fprintf (stream, _("\
252b5132 1277PowerPC options:\n\
ce3d2015
AM		 1278-a32 generate ELF32/XCOFF32\n\
1279-a64 generate ELF64/XCOFF64\n\
1280-u ignored\n\
1281-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1282-mpwr generate code for POWER (RIOS1)\n\
1283-m601 generate code for PowerPC 601\n\
418c1742 1284-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1285 generate code for PowerPC 603/604\n\
1286-m403 generate code for PowerPC 403\n\
1287-m405 generate code for PowerPC 405\n\
1288-m440 generate code for PowerPC 440\n\
1289-m464 generate code for PowerPC 464\n\
1290-m476 generate code for PowerPC 476\n\
f5c120c5 1291-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1292 generate code for PowerPC 7400/7410/7450/7455\n\
1293-m750cl generate code for PowerPC 750cl\n"));
df12615d 1294 fprintf (stream, _("\
ce3d2015
AM		 1295-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1296-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1297-mbooke generate code for 32-bit PowerPC BookE\n\
1298-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1299-mpower4, -mpwr4 generate code for Power4 architecture\n\
1300-mpower5, -mpwr5, -mpwr5x\n\
1301 generate code for Power5 architecture\n\
1302-mpower6, -mpwr6 generate code for Power6 architecture\n\
1303-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1304-mcell generate code for Cell Broadband Engine architecture\n\
1305-mcom generate code Power/PowerPC common instructions\n\
1306-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1307 fprintf (stream, _("\
ce3d2015
AM		 1308-maltivec generate code for AltiVec\n\
1309-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1310-me300 generate code for PowerPC e300 family\n\
1311-me500, -me500x2 generate code for Motorola e500 core complex\n\
1312-me500mc, generate code for Freescale e500mc core complex\n\
1313-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1314-me5500, generate code for Freescale e5500 core complex\n\
1315-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1316-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1317-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1318-mtitan generate code for AppliedMicro Titan core complex\n\
1319-mregnames Allow symbolic names for registers\n\
1320-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1321#ifdef OBJ_ELF
bc805888 1322 fprintf (stream, _("\
ce3d2015
AM		 1323-mrelocatable support for GCC's -mrelocatble option\n\
1324-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1325-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1326-mlittle, -mlittle-endian, -le\n\
ce3d2015 1327 generate code for a little endian machine\n\
b8b738ac 1328-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1329 generate code for a big endian machine\n\
1330-msolaris generate code for Solaris\n\
1331-mno-solaris do not generate code for Solaris\n\
b8b738ac 1332-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1333-V print assembler version number\n\
1334-Qy, -Qn ignored\n"));
252b5132 1335#endif
cef4f754
AM		 1336 fprintf (stream, _("\
1337-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1338}
1339\f
1340/* Set ppc_cpu if it is not already set. */
1341
1342static void
98027b10 1343ppc_set_cpu (void)
252b5132
RH		 1344{
1345 const char *default_os = TARGET_OS;
1346 const char *default_cpu = TARGET_CPU;
1347
7102e95e 1348 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1349 {
2a98c3a6 1350 if (ppc_obj64)
bdc70b4a 1351 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1352 else if (strncmp (default_os, "aix", 3) == 0
1353 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1354 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1355 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1356 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1357 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1358 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1359 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1360 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1361 else
d6ed37ed 1362 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1363 default_cpu, default_os);
252b5132
RH		 1364 }
1365}
1366
9232bbb0
AM		 1367/* Figure out the BFD architecture to use. This function and ppc_mach
1368 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1369
1370enum bfd_architecture
98027b10 1371ppc_arch (void)
252b5132
RH		 1372{
1373 const char *default_cpu = TARGET_CPU;
1374 ppc_set_cpu ();
1375
1376 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1377 return bfd_arch_powerpc;
b9c361e0
JL		 1378 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1379 return bfd_arch_powerpc;
1380 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1381 return bfd_arch_rs6000;
b9c361e0 1382 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1383 {
1384 if (strcmp (default_cpu, "rs6000") == 0)
1385 return bfd_arch_rs6000;
0baf16f2 1386 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1387 return bfd_arch_powerpc;
1388 }
1389
d6ed37ed 1390 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1391 return bfd_arch_unknown;
1392}
1393
7f6d05e8 1394unsigned long
98027b10 1395ppc_mach (void)
7f6d05e8 1396{
2a98c3a6
AM		 1397 if (ppc_obj64)
1398 return bfd_mach_ppc64;
1399 else if (ppc_arch () == bfd_arch_rs6000)
1400 return bfd_mach_rs6k;
ce3d2015
AM		 1401 else if (ppc_cpu & PPC_OPCODE_TITAN)
1402 return bfd_mach_ppc_titan;
b9c361e0
JL		 1403 else if (ppc_cpu & PPC_OPCODE_VLE)
1404 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1405 else
1406 return bfd_mach_ppc;
7f6d05e8
CP		 1407}
1408
81d4177b 1409extern char*
98027b10 1410ppc_target_format (void)
7f6d05e8
CP		 1411{
1412#ifdef OBJ_COFF
1413#ifdef TE_PE
99a814a1 1414 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1415#elif TE_POWERMAC
0baf16f2 1416 return "xcoff-powermac";
7f6d05e8 1417#else
eb1e0e80 1418# ifdef TE_AIX5
edc1d652 1419 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1420# else
edc1d652 1421 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1422# endif
7f6d05e8 1423#endif
7f6d05e8
CP		 1424#endif
1425#ifdef OBJ_ELF
edc1d652
AM		 1426# ifdef TE_FreeBSD
1427 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1428# elif defined (TE_VXWORKS)
9d8504b1
PB		 1429 return "elf32-powerpc-vxworks";
1430# else
0baf16f2 1431 return (target_big_endian
2b3c4602
AM		 1432 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1433 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1434# endif
7f6d05e8
CP		 1435#endif
1436}
1437
b9c361e0
JL		 1438/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1439 Return TRUE if there's a problem, otherwise FALSE. */
1440
1441static bfd_boolean
1442insn_validate (const struct powerpc_opcode *op)
1443{
1444 const unsigned char *o;
1445 unsigned long omask = op->mask;
1446
1447 /* The mask had better not trim off opcode bits. */
1448 if ((op->opcode & omask) != op->opcode)
1449 {
1450 as_bad (_("mask trims opcode bits for %s"), op->name);
1451 return TRUE;
1452 }
1453
1454 /* The operands must not overlap the opcode or each other. */
1455 for (o = op->operands; *o; ++o)
1456 {
1457 if (*o >= num_powerpc_operands)
1458 {
1459 as_bad (_("operand index error for %s"), op->name);
1460 return TRUE;
1461 }
1462 else
1463 {
1464 const struct powerpc_operand *operand = &powerpc_operands[*o];
1465 if (operand->shift != PPC_OPSHIFT_INV)
1466 {
1467 unsigned long mask;
1468
1469 if (operand->shift >= 0)
1470 mask = operand->bitm << operand->shift;
1471 else
1472 mask = operand->bitm >> -operand->shift;
1473 if (omask & mask)
1474 {
1475 as_bad (_("operand %d overlap in %s"),
1476 (int) (o - op->operands), op->name);
1477 return TRUE;
1478 }
1479 omask |= mask;
1480 }
1481 }
1482 }
1483 return FALSE;
1484}
1485
69c040df 1486/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1487 for .machine pseudo. */
252b5132 1488
69c040df
AM		 1489static void
1490ppc_setup_opcodes (void)
252b5132 1491{
98027b10 1492 const struct powerpc_opcode *op;
252b5132
RH		 1493 const struct powerpc_opcode *op_end;
1494 const struct powerpc_macro *macro;
1495 const struct powerpc_macro *macro_end;
b84bf58a 1496 bfd_boolean bad_insn = FALSE;
252b5132 1497
69c040df
AM		 1498 if (ppc_hash != NULL)
1499 hash_die (ppc_hash);
1500 if (ppc_macro_hash != NULL)
1501 hash_die (ppc_macro_hash);
252b5132
RH		 1502
1503 /* Insert the opcodes into a hash table. */
1504 ppc_hash = hash_new ();
1505
c43a438d 1506 if (ENABLE_CHECKING)
b84bf58a 1507 {
c43a438d 1508 unsigned int i;
b84bf58a 1509
3b8b57a9
AM		 1510 /* An index into powerpc_operands is stored in struct fix
1511 fx_pcrel_adjust which is 8 bits wide. */
1512 gas_assert (num_powerpc_operands < 256);
1513
c43a438d
AM		 1514 /* Check operand masks. Code here and in the disassembler assumes
1515 all the 1's in the mask are contiguous. */
1516 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1517 {
c43a438d
AM		 1518 unsigned long mask = powerpc_operands[i].bitm;
1519 unsigned long right_bit;
1520 unsigned int j;
1521
1522 right_bit = mask & -mask;
1523 mask += right_bit;
1524 right_bit = mask & -mask;
1525 if (mask != right_bit)
1526 {
1527 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1528 bad_insn = TRUE;
1529 }
1530 for (j = i + 1; j < num_powerpc_operands; ++j)
1531 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1532 sizeof (powerpc_operands[0])) == 0)
1533 {
1534 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1535 j, i);
1536 bad_insn = TRUE;
1537 }
b84bf58a
AM		 1538 }
1539 }
1540
252b5132
RH		 1541 op_end = powerpc_opcodes + powerpc_num_opcodes;
1542 for (op = powerpc_opcodes; op < op_end; op++)
1543 {
c43a438d 1544 if (ENABLE_CHECKING)
b84bf58a 1545 {
d815f1a9 1546 if (op != powerpc_opcodes)
8dbcd839 1547 {
b9c361e0
JL		 1548 int old_opcode = PPC_OP (op[-1].opcode);
1549 int new_opcode = PPC_OP (op[0].opcode);
1550
1551#ifdef PRINT_OPCODE_TABLE
1552 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1553 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1554 (unsigned int) op->opcode, (unsigned int) op->mask,
1555 (unsigned long long) op->flags);
1556#endif
1557
d815f1a9
AM		 1558 /* The major opcodes had better be sorted. Code in the
1559 disassembler assumes the insns are sorted according to
1560 major opcode. */
b9c361e0 1561 if (new_opcode < old_opcode)
d815f1a9
AM		 1562 {
1563 as_bad (_("major opcode is not sorted for %s"),
1564 op->name);
1565 bad_insn = TRUE;
1566 }
8dbcd839 1567 }
b9c361e0
JL		 1568 bad_insn |= insn_validate (op);
1569 }
c43a438d 1570
b9c361e0
JL		 1571 if ((ppc_cpu & op->flags) != 0
1572 && !(ppc_cpu & op->deprecated))
1573 {
1574 const char *retval;
1575
1576 retval = hash_insert (ppc_hash, op->name, (void *) op);
1577 if (retval != NULL)
c43a438d 1578 {
b9c361e0 1579 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1580 op->name);
1581 bad_insn = TRUE;
1582 }
b9c361e0
JL		 1583 }
1584 }
c43a438d 1585
b9c361e0
JL		 1586 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1587 for (op = powerpc_opcodes; op < op_end; op++)
1588 hash_insert (ppc_hash, op->name, (void *) op);
1589
1590 op_end = vle_opcodes + vle_num_opcodes;
1591 for (op = vle_opcodes; op < op_end; op++)
1592 {
1593 if (ENABLE_CHECKING)
1594 {
1595 if (op != vle_opcodes)
1596 {
1597 unsigned old_seg, new_seg;
1598
1599 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1600 old_seg = VLE_OP_TO_SEG (old_seg);
1601 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1602 new_seg = VLE_OP_TO_SEG (new_seg);
1603
1604#ifdef PRINT_OPCODE_TABLE
1605 printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1606 op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
1607 (unsigned int) op->opcode, (unsigned int) op->mask,
1608 (unsigned long long) op->flags);
1609#endif
1610 /* The major opcodes had better be sorted. Code in the
1611 disassembler assumes the insns are sorted according to
1612 major opcode. */
1613 if (new_seg < old_seg)
1614 {
1615 as_bad (_("major opcode is not sorted for %s"),
1616 op->name);
1617 bad_insn = TRUE;
1618 }
1619 }
1620
1621 bad_insn |= insn_validate (op);
c43a438d 1622 }
252b5132 1623
bdc70b4a 1624 if ((ppc_cpu & op->flags) != 0
1cb0a767 1625 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1626 {
1627 const char *retval;
1628
98027b10 1629 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1630 if (retval != NULL)
252b5132 1631 {
b84bf58a 1632 as_bad (_("duplicate instruction %s"),
99a814a1 1633 op->name);
b84bf58a 1634 bad_insn = TRUE;
252b5132
RH		 1635 }
1636 }
1637 }
1638
b9c361e0
JL		 1639 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1640 for (op = vle_opcodes; op < op_end; op++)
98027b10 1641 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1642
252b5132
RH		 1643 /* Insert the macros into a hash table. */
1644 ppc_macro_hash = hash_new ();
1645
1646 macro_end = powerpc_macros + powerpc_num_macros;
1647 for (macro = powerpc_macros; macro < macro_end; macro++)
1648 {
33740db9 1649 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1650 {
1651 const char *retval;
1652
98027b10 1653 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1654 if (retval != (const char *) NULL)
1655 {
b84bf58a
AM		 1656 as_bad (_("duplicate macro %s"), macro->name);
1657 bad_insn = TRUE;
252b5132
RH		 1658 }
1659 }
1660 }
1661
b84bf58a 1662 if (bad_insn)
252b5132 1663 abort ();
69c040df
AM		 1664}
1665
1666/* This function is called when the assembler starts up. It is called
1667 after the options have been parsed and the output file has been
1668 opened. */
1669
1670void
98027b10 1671md_begin (void)
69c040df
AM		 1672{
1673 ppc_set_cpu ();
1674
1675 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1676 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1677
1678#ifdef OBJ_ELF
1679 /* Set the ELF flags if desired. */
1680 if (ppc_flags && !msolaris)
1681 bfd_set_private_flags (stdoutput, ppc_flags);
1682#endif
1683
1684 ppc_setup_opcodes ();
252b5132 1685
67c1ffbe 1686 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1687 by the user. */
252b5132
RH		 1688 if (!set_target_endian)
1689 {
1690 set_target_endian = 1;
1691 target_big_endian = PPC_BIG_ENDIAN;
1692 }
1693
1694#ifdef OBJ_XCOFF
1695 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1696
1697 /* Create dummy symbols to serve as initial csects. This forces the
1698 text csects to precede the data csects. These symbols will not
1699 be output. */
1700 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1701 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1702 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1703 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1704#endif
1705
1706#ifdef TE_PE
1707
1708 ppc_current_section = text_section;
81d4177b 1709 ppc_previous_section = 0;
252b5132
RH		 1710
1711#endif
1712}
1713
6a0c61b7 1714void
98027b10 1715ppc_cleanup (void)
6a0c61b7 1716{
dc1d03fc 1717#ifdef OBJ_ELF
6a0c61b7
EZ		 1718 if (ppc_apuinfo_list == NULL)
1719 return;
1720
1721 /* Ok, so write the section info out. We have this layout:
1722
1723 byte data what
1724 ---- ---- ----
1725 0 8 length of "APUinfo\0"
1726 4 (n*4) number of APU's (4 bytes each)
1727 8 2 note type 2
1728 12 "APUinfo\0" name
1729 20 APU#1 first APU's info
1730 24 APU#2 second APU's info
1731 ... ...
1732 */
1733 {
1734 char *p;
1735 asection *seg = now_seg;
1736 subsegT subseg = now_subseg;
1737 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1738 unsigned int i;
6a0c61b7
EZ		 1739
1740 /* Create the .PPC.EMB.apuinfo section. */
1741 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1742 bfd_set_section_flags (stdoutput,
1743 apuinfo_secp,
e1a9cb8e 1744 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1745
1746 p = frag_more (4);
1747 md_number_to_chars (p, (valueT) 8, 4);
1748
1749 p = frag_more (4);
e98d298c 1750 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1751
1752 p = frag_more (4);
1753 md_number_to_chars (p, (valueT) 2, 4);
1754
1755 p = frag_more (8);
1756 strcpy (p, "APUinfo");
1757
1758 for (i = 0; i < ppc_apuinfo_num; i++)
1759 {
b34976b6
AM		 1760 p = frag_more (4);
1761 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1762 }
1763
1764 frag_align (2, 0, 0);
1765
1766 /* We probably can't restore the current segment, for there likely
1767 isn't one yet... */
1768 if (seg && subseg)
1769 subseg_set (seg, subseg);
1770 }
dc1d03fc 1771#endif
6a0c61b7
EZ		 1772}
1773
252b5132
RH		 1774/* Insert an operand value into an instruction. */
1775
1776static unsigned long
a1867a27
AM		 1777ppc_insert_operand (unsigned long insn,
1778 const struct powerpc_operand *operand,
1779 offsetT val,
91d6fa6a 1780 ppc_cpu_t cpu,
a1867a27
AM		 1781 char *file,
1782 unsigned int line)
252b5132 1783{
b84bf58a 1784 long min, max, right;
eb42fac1 1785
b84bf58a
AM		 1786 max = operand->bitm;
1787 right = max & -max;
1788 min = 0;
1789
1790 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1791 {
b84bf58a 1792 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1793 max = (max >> 1) & -right;
1794 min = ~max & -right;
b84bf58a 1795 }
252b5132 1796
b84bf58a 1797 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1798 max++;
252b5132 1799
b84bf58a 1800 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1801 {
1802 long tmp = min;
1803 min = -max;
1804 max = -tmp;
1805 }
b84bf58a 1806
a1867a27
AM		 1807 if (min <= max)
1808 {
1809 /* Some people write constants with the sign extension done by
1810 hand but only up to 32 bits. This shouldn't really be valid,
1811 but, to permit this code to assemble on a 64-bit host, we
1812 sign extend the 32-bit value to 64 bits if so doing makes the
1813 value valid. */
1814 if (val > max
1815 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1816 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1817 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1818 val = val - 0x80000000 - 0x80000000;
1819
1820 /* Similarly, people write expressions like ~(1<<15), and expect
1821 this to be OK for a 32-bit unsigned value. */
1822 else if (val < min
1823 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1824 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1825 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1826 val = val + 0x80000000 + 0x80000000;
1827
1828 else if (val < min
1829 || val > max
1830 || (val & (right - 1)) != 0)
1831 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1832 }
b84bf58a 1833
252b5132
RH		 1834 if (operand->insert)
1835 {
1836 const char *errmsg;
1837
1838 errmsg = NULL;
91d6fa6a 1839 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1840 if (errmsg != (const char *) NULL)
ee2c9aa9 1841 as_bad_where (file, line, "%s", errmsg);
252b5132 1842 }
b9c361e0 1843 else if (operand->shift >= 0)
b84bf58a 1844 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1845 else
1846 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1847
1848 return insn;
1849}
1850
1851\f
1852#ifdef OBJ_ELF
1853/* Parse @got, etc. and return the desired relocation. */
1854static bfd_reloc_code_real_type
98027b10 1855ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1856{
1857 struct map_bfd {
1858 char *string;
b7d7dc63
AM		 1859 unsigned int length : 8;
1860 unsigned int valid32 : 1;
1861 unsigned int valid64 : 1;
1862 unsigned int reloc;
252b5132
RH		 1863 };
1864
1865 char ident[20];
1866 char *str = *str_p;
1867 char *str2;
1868 int ch;
1869 int len;
15c1449b 1870 const struct map_bfd *ptr;
252b5132 1871
b7d7dc63
AM		 1872#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1873#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1874#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1875
15c1449b 1876 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1877 MAP ("l", BFD_RELOC_LO16),
1878 MAP ("h", BFD_RELOC_HI16),
1879 MAP ("ha", BFD_RELOC_HI16_S),
1880 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1881 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1882 MAP ("got", BFD_RELOC_16_GOTOFF),
1883 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1884 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1885 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1886 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1887 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1888 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1889 MAP ("copy", BFD_RELOC_PPC_COPY),
1890 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1891 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1892 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1893 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1894 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1895 MAP ("tls", BFD_RELOC_PPC_TLS),
1896 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1897 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1898 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1899 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1900 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1901 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1902 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1903 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1904 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1905 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1906 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1907 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1908 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1909 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1910 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1911 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1912 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1913 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1914 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1915 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1916 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1917 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1918 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1919 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1920 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1921 MAP32 ("fixup", BFD_RELOC_CTOR),
1922 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1923 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1924 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1925 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1926 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1927 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1928 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1929 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1930 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1931 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1932 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1933 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1934 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1935 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1936 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1937 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1938 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1939 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1940 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1941 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1942 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1943 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1944 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1945 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1946 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1947 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1948 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1949 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1950 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1951 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1952 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1953 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1954 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1955 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1956 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1957 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1958 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1959 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1960 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1961 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1962 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1963 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1964 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1965 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1966 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1967 };
1968
1969 if (*str++ != '@')
1970 return BFD_RELOC_UNUSED;
1971
1972 for (ch = *str, str2 = ident;
1973 (str2 < ident + sizeof (ident) - 1
3882b010 1974 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1975 ch = *++str)
1976 {
3882b010 1977 *str2++ = TOLOWER (ch);
252b5132
RH		 1978 }
1979
1980 *str2 = '\0';
1981 len = str2 - ident;
1982
1983 ch = ident[0];
1984 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1985 if (ch == ptr->string[0]
1986 && len == ptr->length
b7d7dc63
AM		 1987 && memcmp (ident, ptr->string, ptr->length) == 0
1988 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1989 {
15c1449b
AM		 1990 int reloc = ptr->reloc;
1991
727fc41e
AM		 1992 if (!ppc_obj64 && exp_p->X_add_number != 0)
1993 {
1994 switch (reloc)
1995 {
1996 case BFD_RELOC_16_GOTOFF:
1997 case BFD_RELOC_LO16_GOTOFF:
1998 case BFD_RELOC_HI16_GOTOFF:
1999 case BFD_RELOC_HI16_S_GOTOFF:
2000 as_warn (_("identifier+constant@got means "
2001 "identifier@got+constant"));
2002 break;
2003
2004 case BFD_RELOC_PPC_GOT_TLSGD16:
2005 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2006 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2007 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2008 case BFD_RELOC_PPC_GOT_TLSLD16:
2009 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2010 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2011 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2012 case BFD_RELOC_PPC_GOT_DTPREL16:
2013 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2014 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2015 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2016 case BFD_RELOC_PPC_GOT_TPREL16:
2017 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2018 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2019 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2020 as_bad (_("symbol+offset not supported for got tls"));
2021 break;
2022 }
2023 }
5f6db75a
AM		 2024
2025 /* Now check for identifier@suffix+constant. */
2026 if (*str == '-' || *str == '+')
252b5132 2027 {
5f6db75a
AM		 2028 char *orig_line = input_line_pointer;
2029 expressionS new_exp;
2030
2031 input_line_pointer = str;
2032 expression (&new_exp);
2033 if (new_exp.X_op == O_constant)
252b5132 2034 {
5f6db75a
AM		 2035 exp_p->X_add_number += new_exp.X_add_number;
2036 str = input_line_pointer;
252b5132 2037 }
5f6db75a
AM		 2038
2039 if (&input_line_pointer != str_p)
2040 input_line_pointer = orig_line;
252b5132 2041 }
252b5132 2042 *str_p = str;
0baf16f2 2043
2b3c4602 2044 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2045 && exp_p->X_op == O_symbol
2046 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2047 {
9f2b53d7
AM		 2048 /* Change the symbol so that the dummy .TOC. symbol can be
2049 omitted from the object file. */
0baf16f2
AM		 2050 exp_p->X_add_symbol = &abs_symbol;
2051 }
2052
15c1449b 2053 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2054 }
2055
2056 return BFD_RELOC_UNUSED;
2057}
2058
99a814a1
AM		 2059/* Like normal .long/.short/.word, except support @got, etc.
2060 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2061static void
98027b10 2062ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2063{
2064 expressionS exp;
2065 bfd_reloc_code_real_type reloc;
2066
2067 if (is_it_end_of_statement ())
2068 {
2069 demand_empty_rest_of_line ();
2070 return;
2071 }
2072
2073 do
2074 {
2075 expression (&exp);
2076 if (exp.X_op == O_symbol
2077 && *input_line_pointer == '@'
99a814a1
AM		 2078 && (reloc = ppc_elf_suffix (&input_line_pointer,
2079 &exp)) != BFD_RELOC_UNUSED)
252b5132 2080 {
99a814a1
AM		 2081 reloc_howto_type *reloc_howto;
2082 int size;
2083
2084 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2085 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2086
2087 if (size > nbytes)
0baf16f2
AM		 2088 {
2089 as_bad (_("%s relocations do not fit in %d bytes\n"),
2090 reloc_howto->name, nbytes);
2091 }
252b5132
RH		 2092 else
2093 {
0baf16f2
AM		 2094 char *p;
2095 int offset;
252b5132 2096
0baf16f2 2097 p = frag_more (nbytes);
aa0c8c1a 2098 memset (p, 0, nbytes);
0baf16f2
AM		 2099 offset = 0;
2100 if (target_big_endian)
2101 offset = nbytes - size;
99a814a1
AM		 2102 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2103 &exp, 0, reloc);
252b5132
RH		 2104 }
2105 }
2106 else
2107 emit_expr (&exp, (unsigned int) nbytes);
2108 }
2109 while (*input_line_pointer++ == ',');
2110
99a814a1
AM		 2111 /* Put terminator back into stream. */
2112 input_line_pointer--;
252b5132
RH		 2113 demand_empty_rest_of_line ();
2114}
2115
2116/* Solaris pseduo op to change to the .rodata section. */
2117static void
98027b10 2118ppc_elf_rdata (int xxx)
252b5132
RH		 2119{
2120 char *save_line = input_line_pointer;
2121 static char section[] = ".rodata\n";
2122
99a814a1 2123 /* Just pretend this is .section .rodata */
252b5132
RH		 2124 input_line_pointer = section;
2125 obj_elf_section (xxx);
2126
2127 input_line_pointer = save_line;
2128}
2129
99a814a1 2130/* Pseudo op to make file scope bss items. */
252b5132 2131static void
98027b10 2132ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2133{
98027b10
AM		 2134 char *name;
2135 char c;
2136 char *p;
252b5132 2137 offsetT size;
98027b10 2138 symbolS *symbolP;
252b5132
RH		 2139 offsetT align;
2140 segT old_sec;
2141 int old_subsec;
2142 char *pfrag;
2143 int align2;
2144
2145 name = input_line_pointer;
2146 c = get_symbol_end ();
2147
99a814a1 2148 /* just after name is now '\0'. */
252b5132
RH		 2149 p = input_line_pointer;
2150 *p = c;
2151 SKIP_WHITESPACE ();
2152 if (*input_line_pointer != ',')
2153 {
d6ed37ed 2154 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2155 ignore_rest_of_line ();
2156 return;
2157 }
2158
2159 input_line_pointer++; /* skip ',' */
2160 if ((size = get_absolute_expression ()) < 0)
2161 {
2162 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2163 ignore_rest_of_line ();
2164 return;
2165 }
2166
2167 /* The third argument to .lcomm is the alignment. */
2168 if (*input_line_pointer != ',')
2169 align = 8;
2170 else
2171 {
2172 ++input_line_pointer;
2173 align = get_absolute_expression ();
2174 if (align <= 0)
2175 {
2176 as_warn (_("ignoring bad alignment"));
2177 align = 8;
2178 }
2179 }
2180
2181 *p = 0;
2182 symbolP = symbol_find_or_make (name);
2183 *p = c;
2184
2185 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2186 {
d6ed37ed 2187 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2188 S_GET_NAME (symbolP));
2189 ignore_rest_of_line ();
2190 return;
2191 }
2192
2193 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2194 {
d6ed37ed 2195 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2196 S_GET_NAME (symbolP),
2197 (long) S_GET_VALUE (symbolP),
2198 (long) size);
2199
2200 ignore_rest_of_line ();
2201 return;
2202 }
2203
99a814a1 2204 /* Allocate_bss. */
252b5132
RH		 2205 old_sec = now_seg;
2206 old_subsec = now_subseg;
2207 if (align)
2208 {
99a814a1 2209 /* Convert to a power of 2 alignment. */
252b5132
RH		 2210 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2211 if (align != 1)
2212 {
d6ed37ed 2213 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2214 ignore_rest_of_line ();
2215 return;
2216 }
2217 }
2218 else
2219 align2 = 0;
2220
2221 record_alignment (bss_section, align2);
2222 subseg_set (bss_section, 0);
2223 if (align2)
2224 frag_align (align2, 0, 0);
2225 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2226 symbol_get_frag (symbolP)->fr_symbol = 0;
2227 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2228 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2229 (char *) 0);
2230 *pfrag = 0;
2231 S_SET_SIZE (symbolP, size);
2232 S_SET_SEGMENT (symbolP, bss_section);
2233 subseg_set (old_sec, old_subsec);
2234 demand_empty_rest_of_line ();
2235}
2236
2237/* Validate any relocations emitted for -mrelocatable, possibly adding
2238 fixups for word relocations in writable segments, so we can adjust
2239 them at runtime. */
2240static void
98027b10 2241ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2242{
2243 if (fixp->fx_done || fixp->fx_pcrel)
2244 return;
2245
2246 switch (shlib)
2247 {
2248 case SHLIB_NONE:
2249 case SHLIB_PIC:
2250 return;
2251
5d6f4f16 2252 case SHLIB_MRELOCATABLE:
252b5132
RH		 2253 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2254 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2255 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2256 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2257 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2258 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2259 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2260 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2261 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2262 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2263 && strcmp (segment_name (seg), ".got2") != 0
2264 && strcmp (segment_name (seg), ".dtors") != 0
2265 && strcmp (segment_name (seg), ".ctors") != 0
2266 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2267 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2268 && strcmp (segment_name (seg), ".eh_frame") != 0
2269 && strcmp (segment_name (seg), ".ex_shared") != 0)
2270 {
2271 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2272 || fixp->fx_r_type != BFD_RELOC_CTOR)
2273 {
2274 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2275 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2276 }
2277 }
2278 return;
2279 }
2280}
0baf16f2 2281
7e8d4ab4
AM		 2282/* Prevent elf_frob_file_before_adjust removing a weak undefined
2283 function descriptor sym if the corresponding code sym is used. */
2284
2285void
98027b10 2286ppc_frob_file_before_adjust (void)
0baf16f2 2287{
7e8d4ab4 2288 symbolS *symp;
9232bbb0 2289 asection *toc;
0baf16f2 2290
7e8d4ab4
AM		 2291 if (!ppc_obj64)
2292 return;
2293
2294 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2295 {
7e8d4ab4
AM		 2296 const char *name;
2297 char *dotname;
2298 symbolS *dotsym;
2299 size_t len;
2300
2301 name = S_GET_NAME (symp);
2302 if (name[0] == '.')
2303 continue;
2304
2305 if (! S_IS_WEAK (symp)
2306 || S_IS_DEFINED (symp))
2307 continue;
2308
2309 len = strlen (name) + 1;
2310 dotname = xmalloc (len + 1);
2311 dotname[0] = '.';
2312 memcpy (dotname + 1, name, len);
461b725f 2313 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2314 free (dotname);
2315 if (dotsym != NULL && (symbol_used_p (dotsym)
2316 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2317 symbol_mark_used (symp);
2318
0baf16f2
AM		 2319 }
2320
9232bbb0
AM		 2321 toc = bfd_get_section_by_name (stdoutput, ".toc");
2322 if (toc != NULL
01efc3af 2323 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2324 && bfd_section_size (stdoutput, toc) > 0x10000)
2325 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2326}
2327
2328/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2329 emitted. Other uses of .TOC. will cause the symbol to be marked
2330 with BSF_KEEP in md_apply_fix. */
9232bbb0 2331
a38a07e0
AM		 2332void
2333ppc_elf_adjust_symtab (void)
2334{
2335 if (ppc_obj64)
2336 {
2337 symbolS *symp;
2338 symp = symbol_find (".TOC.");
2339 if (symp != NULL)
2340 {
2341 asymbol *bsym = symbol_get_bfdsym (symp);
2342 if ((bsym->flags & BSF_KEEP) == 0)
2343 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2344 else
2345 S_SET_WEAK (symp);
2346 }
2347 }
0baf16f2 2348}
252b5132
RH		 2349#endif /* OBJ_ELF */
2350\f
2351#ifdef TE_PE
2352
2353/*
99a814a1 2354 * Summary of parse_toc_entry.
252b5132
RH		 2355 *
2356 * in: Input_line_pointer points to the '[' in one of:
2357 *
2358 * [toc] [tocv] [toc32] [toc64]
2359 *
2360 * Anything else is an error of one kind or another.
2361 *
81d4177b 2362 * out:
252b5132
RH		 2363 * return value: success or failure
2364 * toc_kind: kind of toc reference
2365 * input_line_pointer:
2366 * success: first char after the ']'
2367 * failure: unchanged
2368 *
2369 * settings:
2370 *
2371 * [toc] - rv == success, toc_kind = default_toc
2372 * [tocv] - rv == success, toc_kind = data_in_toc
2373 * [toc32] - rv == success, toc_kind = must_be_32
2374 * [toc64] - rv == success, toc_kind = must_be_64
2375 *
2376 */
2377
81d4177b
KH		 2378enum toc_size_qualifier
2379{
252b5132
RH		 2380 default_toc, /* The toc cell constructed should be the system default size */
2381 data_in_toc, /* This is a direct reference to a toc cell */
2382 must_be_32, /* The toc cell constructed must be 32 bits wide */
2383 must_be_64 /* The toc cell constructed must be 64 bits wide */
2384};
2385
2386static int
98027b10 2387parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2388{
2389 char *start;
2390 char *toc_spec;
2391 char c;
2392 enum toc_size_qualifier t;
2393
99a814a1 2394 /* Save the input_line_pointer. */
252b5132
RH		 2395 start = input_line_pointer;
2396
99a814a1 2397 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2398 ++input_line_pointer;
2399 SKIP_WHITESPACE ();
81d4177b 2400
99a814a1 2401 /* Find the spelling of the operand. */
252b5132
RH		 2402 toc_spec = input_line_pointer;
2403 c = get_symbol_end ();
2404
99a814a1 2405 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2406 {
2407 t = default_toc;
2408 }
99a814a1 2409 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2410 {
2411 t = data_in_toc;
2412 }
99a814a1 2413 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2414 {
2415 t = must_be_32;
2416 }
99a814a1 2417 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2418 {
2419 t = must_be_64;
2420 }
2421 else
2422 {
2423 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2424 *input_line_pointer = c;
2425 input_line_pointer = start;
252b5132
RH		 2426 return 0;
2427 }
2428
99a814a1
AM		 2429 /* Now find the ']'. */
2430 *input_line_pointer = c;
252b5132 2431
81d4177b
KH		 2432 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2433 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2434
2435 if (c != ']')
2436 {
2437 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2438 input_line_pointer = start;
252b5132
RH		 2439 return 0;
2440 }
2441
99a814a1 2442 *toc_kind = t;
252b5132
RH		 2443 return 1;
2444}
2445#endif
3b8b57a9
AM		 2446
2447#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2448/* See whether a symbol is in the TOC section. */
2449
2450static int
2451ppc_is_toc_sym (symbolS *sym)
2452{
2453#ifdef OBJ_XCOFF
2454 return symbol_get_tc (sym)->symbol_class == XMC_TC;
2455#endif
2456#ifdef OBJ_ELF
2457 const char *sname = segment_name (S_GET_SEGMENT (sym));
2458 if (ppc_obj64)
2459 return strcmp (sname, ".toc") == 0;
2460 else
2461 return strcmp (sname, ".got") == 0;
2462#endif
2463}
2464#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2465\f
2466
dc1d03fc 2467#ifdef OBJ_ELF
6a0c61b7
EZ		 2468#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2469static void
98027b10 2470ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2471{
2472 unsigned int i;
2473
2474 /* Check we don't already exist. */
2475 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2476 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2477 return;
b34976b6 2478
6a0c61b7
EZ		 2479 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2480 {
2481 if (ppc_apuinfo_num_alloc == 0)
2482 {
2483 ppc_apuinfo_num_alloc = 4;
2484 ppc_apuinfo_list = (unsigned long *)
2485 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2486 }
2487 else
2488 {
2489 ppc_apuinfo_num_alloc += 4;
2490 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2491 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2492 }
2493 }
dc1d03fc 2494 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2495}
2496#undef APUID
dc1d03fc 2497#endif
6a0c61b7
EZ		 2498\f
2499
252b5132
RH		 2500/* We need to keep a list of fixups. We can't simply generate them as
2501 we go, because that would require us to first create the frag, and
2502 that would screw up references to ``.''. */
2503
2504struct ppc_fixup
2505{
2506 expressionS exp;
2507 int opindex;
2508 bfd_reloc_code_real_type reloc;
2509};
2510
2511#define MAX_INSN_FIXUPS (5)
2512
b9c361e0
JL		 2513/* Form I16L. */
2514#define E_OR2I_INSN 0x7000C000
2515#define E_AND2I_DOT_INSN 0x7000C800
2516#define E_OR2IS_INSN 0x7000D000
2517#define E_LIS_INSN 0x7000E000
2518#define E_AND2IS_DOT_INSN 0x7000E800
2519
2520/* Form I16A. */
2521#define E_ADD2I_DOT_INSN 0x70008800
2522#define E_ADD2IS_INSN 0x70009000
2523#define E_CMP16I_INSN 0x70009800
2524#define E_MULL2I_INSN 0x7000A000
2525#define E_CMPL16I_INSN 0x7000A800
2526#define E_CMPH16I_INSN 0x7000B000
2527#define E_CMPHL16I_INSN 0x7000B800
2528
252b5132
RH		 2529/* This routine is called for each instruction to be assembled. */
2530
2531void
98027b10 2532md_assemble (char *str)
252b5132
RH		 2533{
2534 char *s;
2535 const struct powerpc_opcode *opcode;
2536 unsigned long insn;
2537 const unsigned char *opindex_ptr;
2538 int skip_optional;
2539 int need_paren;
2540 int next_opindex;
2541 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2542 int fc;
2543 char *f;
09b935ac 2544 int addr_mod;
252b5132 2545 int i;
b9c361e0 2546 unsigned int insn_length;
252b5132
RH		 2547
2548 /* Get the opcode. */
3882b010 2549 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2550 ;
2551 if (*s != '\0')
2552 *s++ = '\0';
2553
2554 /* Look up the opcode in the hash table. */
2555 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2556 if (opcode == (const struct powerpc_opcode *) NULL)
2557 {
2558 const struct powerpc_macro *macro;
2559
2560 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2561 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2562 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2563 else
2564 ppc_macro (s, macro);
2565
2566 return;
2567 }
2568
2569 insn = opcode->opcode;
2570
2571 str = s;
3882b010 2572 while (ISSPACE (*str))
252b5132
RH		 2573 ++str;
2574
2575 /* PowerPC operands are just expressions. The only real issue is
2576 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2577 an optional operand separate the operands only with commas (in some
2578 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2579 have optional operands). Most instructions with optional operands
2580 have only one. Those that have more than one optional operand can
2581 take either all their operands or none. So, before we start seriously
2582 parsing the operands, we check to see if we have optional operands,
2583 and if we do, we count the number of commas to see which operands
2584 have been omitted. */
252b5132
RH		 2585 skip_optional = 0;
2586 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2587 {
2588 const struct powerpc_operand *operand;
2589
2590 operand = &powerpc_operands[*opindex_ptr];
2591 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2592 {
2593 unsigned int opcount;
7fe9cf6b 2594 unsigned int num_operands_expected;
252b5132
RH		 2595
2596 /* There is an optional operand. Count the number of
2597 commas in the input line. */
2598 if (*str == '\0')
2599 opcount = 0;
2600 else
2601 {
2602 opcount = 1;
2603 s = str;
2604 while ((s = strchr (s, ',')) != (char *) NULL)
2605 {
2606 ++opcount;
2607 ++s;
2608 }
2609 }
2610
7fe9cf6b
NC		 2611 /* Compute the number of expected operands.
2612 Do not count fake operands. */
2613 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2614 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2615 ++ num_operands_expected;
2616
252b5132
RH		 2617 /* If there are fewer operands in the line then are called
2618 for by the instruction, we want to skip the optional
1f6c9eb0 2619 operands. */
7fe9cf6b 2620 if (opcount < num_operands_expected)
252b5132
RH		 2621 skip_optional = 1;
2622
2623 break;
2624 }
2625 }
2626
2627 /* Gather the operands. */
2628 need_paren = 0;
2629 next_opindex = 0;
2630 fc = 0;
2631 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2632 {
2633 const struct powerpc_operand *operand;
2634 const char *errmsg;
2635 char *hold;
2636 expressionS ex;
2637 char endc;
2638
2639 if (next_opindex == 0)
2640 operand = &powerpc_operands[*opindex_ptr];
2641 else
2642 {
2643 operand = &powerpc_operands[next_opindex];
2644 next_opindex = 0;
2645 }
252b5132
RH		 2646 errmsg = NULL;
2647
2648 /* If this is a fake operand, then we do not expect anything
2649 from the input. */
2650 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2651 {
2b3c4602 2652 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2653 if (errmsg != (const char *) NULL)
ee2c9aa9 2654 as_bad ("%s", errmsg);
252b5132
RH		 2655 continue;
2656 }
2657
2658 /* If this is an optional operand, and we are skipping it, just
2659 insert a zero. */
2660 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2661 && skip_optional)
2662 {
2663 if (operand->insert)
2664 {
2b3c4602 2665 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2666 if (errmsg != (const char *) NULL)
ee2c9aa9 2667 as_bad ("%s", errmsg);
252b5132
RH		 2668 }
2669 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2670 next_opindex = *opindex_ptr + 1;
2671 continue;
2672 }
2673
2674 /* Gather the operand. */
2675 hold = input_line_pointer;
2676 input_line_pointer = str;
2677
2678#ifdef TE_PE
81d4177b 2679 if (*input_line_pointer == '[')
252b5132
RH		 2680 {
2681 /* We are expecting something like the second argument here:
99a814a1
AM		 2682 *
2683 * lwz r4,[toc].GS.0.static_int(rtoc)
2684 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2685 * The argument following the `]' must be a symbol name, and the
2686 * register must be the toc register: 'rtoc' or '2'
2687 *
2688 * The effect is to 0 as the displacement field
2689 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2690 * the appropriate variation) reloc against it based on the symbol.
2691 * The linker will build the toc, and insert the resolved toc offset.
2692 *
2693 * Note:
2694 * o The size of the toc entry is currently assumed to be
2695 * 32 bits. This should not be assumed to be a hard coded
2696 * number.
2697 * o In an effort to cope with a change from 32 to 64 bits,
2698 * there are also toc entries that are specified to be
2699 * either 32 or 64 bits:
2700 * lwz r4,[toc32].GS.0.static_int(rtoc)
2701 * lwz r4,[toc64].GS.0.static_int(rtoc)
2702 * These demand toc entries of the specified size, and the
2703 * instruction probably requires it.
2704 */
252b5132
RH		 2705
2706 int valid_toc;
2707 enum toc_size_qualifier toc_kind;
2708 bfd_reloc_code_real_type toc_reloc;
2709
99a814a1
AM		 2710 /* Go parse off the [tocXX] part. */
2711 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2712
81d4177b 2713 if (!valid_toc)
252b5132 2714 {
99a814a1
AM		 2715 /* Note: message has already been issued.
2716 FIXME: what sort of recovery should we do?
2717 demand_rest_of_line (); return; ? */
252b5132
RH		 2718 }
2719
99a814a1
AM		 2720 /* Now get the symbol following the ']'. */
2721 expression (&ex);
252b5132
RH		 2722
2723 switch (toc_kind)
2724 {
2725 case default_toc:
99a814a1
AM		 2726 /* In this case, we may not have seen the symbol yet,
2727 since it is allowed to appear on a .extern or .globl
2728 or just be a label in the .data section. */
252b5132
RH		 2729 toc_reloc = BFD_RELOC_PPC_TOC16;
2730 break;
2731 case data_in_toc:
99a814a1
AM		 2732 /* 1. The symbol must be defined and either in the toc
2733 section, or a global.
2734 2. The reloc generated must have the TOCDEFN flag set
2735 in upper bit mess of the reloc type.
2736 FIXME: It's a little confusing what the tocv
2737 qualifier can be used for. At the very least, I've
2738 seen three uses, only one of which I'm sure I can
2739 explain. */
81d4177b
KH		 2740 if (ex.X_op == O_symbol)
2741 {
9c2799c2 2742 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2743 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2744 != tocdata_section)
252b5132 2745 {
99a814a1 2746 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2747 }
2748 }
2749
2750 toc_reloc = BFD_RELOC_PPC_TOC16;
2751 break;
2752 case must_be_32:
99a814a1
AM		 2753 /* FIXME: these next two specifically specify 32/64 bit
2754 toc entries. We don't support them today. Is this
2755 the right way to say that? */
252b5132 2756 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2757 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2758 break;
2759 case must_be_64:
99a814a1 2760 /* FIXME: see above. */
252b5132 2761 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2762 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2763 break;
2764 default:
bc805888 2765 fprintf (stderr,
99a814a1
AM		 2766 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2767 toc_kind);
bc805888 2768 abort ();
252b5132
RH		 2769 break;
2770 }
2771
2772 /* We need to generate a fixup for this expression. */
2773 if (fc >= MAX_INSN_FIXUPS)
2774 as_fatal (_("too many fixups"));
2775
2776 fixups[fc].reloc = toc_reloc;
2777 fixups[fc].exp = ex;
2778 fixups[fc].opindex = *opindex_ptr;
2779 ++fc;
2780
99a814a1
AM		 2781 /* Ok. We've set up the fixup for the instruction. Now make it
2782 look like the constant 0 was found here. */
252b5132
RH		 2783 ex.X_unsigned = 1;
2784 ex.X_op = O_constant;
2785 ex.X_add_number = 0;
2786 ex.X_add_symbol = NULL;
2787 ex.X_op_symbol = NULL;
2788 }
2789
2790 else
2791#endif /* TE_PE */
2792 {
b9c361e0
JL		 2793 if ((reg_names_p
2794 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2795 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2796 || !register_name (&ex))
252b5132 2797 {
13abbae3
AM		 2798 char save_lex = lex_type['%'];
2799
b9c361e0
JL		 2800 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2801 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2802 {
2803 cr_operand = TRUE;
2804 lex_type['%'] |= LEX_BEGIN_NAME;
2805 }
252b5132 2806 expression (&ex);
b34976b6 2807 cr_operand = FALSE;
13abbae3 2808 lex_type['%'] = save_lex;
252b5132
RH		 2809 }
2810 }
2811
2812 str = input_line_pointer;
2813 input_line_pointer = hold;
2814
2815 if (ex.X_op == O_illegal)
2816 as_bad (_("illegal operand"));
2817 else if (ex.X_op == O_absent)
2818 as_bad (_("missing operand"));
2819 else if (ex.X_op == O_register)
2820 {
2821 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2822 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2823 }
2824 else if (ex.X_op == O_constant)
2825 {
2826#ifdef OBJ_ELF
81d4177b 2827 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2828 bfd_reloc_code_real_type reloc;
252b5132
RH		 2829 char *orig_str = str;
2830
2831 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2832 switch (reloc)
2833 {
2834 default:
2835 str = orig_str;
2836 break;
2837
2838 case BFD_RELOC_LO16:
2839 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2840 something which cleared it, we always produce a
2841 signed value. */
2842 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2843 ex.X_add_number &= 0xffff;
2844 else
0baf16f2 2845 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2846 break;
2847
2848 case BFD_RELOC_HI16:
0baf16f2
AM		 2849 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2850 ex.X_add_number = PPC_HI (ex.X_add_number);
2851 else
2852 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2853 break;
2854
2855 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2856 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2857 ex.X_add_number = PPC_HA (ex.X_add_number);
2858 else
2859 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2860 break;
2861
0baf16f2
AM		 2862 case BFD_RELOC_PPC64_HIGHER:
2863 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2864 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2865 else
2866 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2867 break;
2868
2869 case BFD_RELOC_PPC64_HIGHER_S:
2870 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2871 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2872 else
2873 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2874 break;
0baf16f2
AM		 2875
2876 case BFD_RELOC_PPC64_HIGHEST:
2877 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2878 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2879 else
2880 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2881 break;
2882
2883 case BFD_RELOC_PPC64_HIGHEST_S:
2884 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2885 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2886 else
2887 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2888 break;
252b5132 2889 }
0baf16f2 2890#endif /* OBJ_ELF */
252b5132 2891 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2892 ppc_cpu, (char *) NULL, 0);
252b5132 2893 }
727fc41e 2894 else
252b5132 2895 {
3b8b57a9
AM		 2896 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2897#ifdef OBJ_ELF
727fc41e 2898 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2899 {
727fc41e
AM		 2900 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2901 if (sym_name[0] == '.')
2902 ++sym_name;
cdba85ec 2903
727fc41e 2904 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2905 {
727fc41e
AM		 2906 expressionS tls_exp;
2907
2908 hold = input_line_pointer;
2909 input_line_pointer = str + 1;
2910 expression (&tls_exp);
2911 if (tls_exp.X_op == O_symbol)
2912 {
2913 reloc = BFD_RELOC_UNUSED;
2914 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2915 {
2916 reloc = BFD_RELOC_PPC_TLSGD;
2917 input_line_pointer += 7;
2918 }
2919 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2920 {
2921 reloc = BFD_RELOC_PPC_TLSLD;
2922 input_line_pointer += 7;
2923 }
2924 if (reloc != BFD_RELOC_UNUSED)
2925 {
2926 SKIP_WHITESPACE ();
2927 str = input_line_pointer;
2928
2929 if (fc >= MAX_INSN_FIXUPS)
2930 as_fatal (_("too many fixups"));
2931 fixups[fc].exp = tls_exp;
2932 fixups[fc].opindex = *opindex_ptr;
2933 fixups[fc].reloc = reloc;
2934 ++fc;
2935 }
2936 }
2937 input_line_pointer = hold;
252b5132
RH		 2938 }
2939 }
2940
727fc41e 2941 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2942 {
727fc41e 2943 /* Some TLS tweaks. */
0baf16f2
AM		 2944 switch (reloc)
2945 {
727fc41e 2946 default:
cdba85ec 2947 break;
727fc41e
AM		 2948
2949 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2950 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2951 as_bad (_("@tls may not be used with \"%s\" operands"),
2952 opcode->name);
2953 else if (operand->shift != 11)
2954 as_bad (_("@tls may only be used in last operand"));
2955 else
2956 insn = ppc_insert_operand (insn, operand,
2957 ppc_obj64 ? 13 : 2,
2958 ppc_cpu, (char *) NULL, 0);
cdba85ec 2959 break;
727fc41e
AM		 2960
2961 /* We'll only use the 32 (or 64) bit form of these relocations
2962 in constants. Instructions get the 16 bit form. */
2963 case BFD_RELOC_PPC_DTPREL:
2964 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2965 break;
727fc41e
AM		 2966 case BFD_RELOC_PPC_TPREL:
2967 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2968 break;
2969 }
727fc41e 2970
b9c361e0
JL		 2971 /* If VLE-mode convert LO/HI/HA relocations. */
2972 if (opcode->flags & PPC_OPCODE_VLE)
2973 {
2974 int tmp_insn = insn & opcode->mask;
2975
2976 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2977 || tmp_insn == E_AND2I_DOT_INSN
2978 || tmp_insn == E_OR2IS_INSN
2979 || tmp_insn == E_LIS_INSN
2980 || tmp_insn == E_AND2IS_DOT_INSN);
2981
2982
2983 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2984 || tmp_insn == E_ADD2IS_INSN
2985 || tmp_insn == E_CMP16I_INSN
2986 || tmp_insn == E_MULL2I_INSN
2987 || tmp_insn == E_CMPL16I_INSN
2988 || tmp_insn == E_CMPH16I_INSN
2989 || tmp_insn == E_CMPHL16I_INSN);
2990
2991 switch (reloc)
2992 {
2993 default:
2994 break;
2995
2996 case BFD_RELOC_PPC_EMB_SDA21:
2997 reloc = BFD_RELOC_PPC_VLE_SDA21;
2998 break;
2999
3000 case BFD_RELOC_LO16:
3001 if (use_d_reloc)
3002 reloc = BFD_RELOC_PPC_VLE_LO16D;
3003 else if (use_a_reloc)
3004 reloc = BFD_RELOC_PPC_VLE_LO16A;
3005 break;
3006
3007 case BFD_RELOC_HI16:
3008 if (use_d_reloc)
3009 reloc = BFD_RELOC_PPC_VLE_HI16D;
3010 else if (use_a_reloc)
3011 reloc = BFD_RELOC_PPC_VLE_HI16A;
3012 break;
3013
3014 case BFD_RELOC_HI16_S:
3015 if (use_d_reloc)
3016 reloc = BFD_RELOC_PPC_VLE_HA16D;
3017 else if (use_a_reloc)
3018 reloc = BFD_RELOC_PPC_VLE_HA16A;
3019 break;
3020
3021 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3022 if (use_d_reloc)
3023 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3024 break;
3025
3026 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3027 if (use_d_reloc)
3028 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3029 break;
3030
3031 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3032 if (use_d_reloc)
3033 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3034 break;
3035 }
3036 }
3037
727fc41e
AM		 3038 /* For the absolute forms of branches, convert the PC
3039 relative form back into the absolute. */
3040 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3041 {
3042 switch (reloc)
3043 {
3044 case BFD_RELOC_PPC_B26:
3045 reloc = BFD_RELOC_PPC_BA26;
3046 break;
3047 case BFD_RELOC_PPC_B16:
3048 reloc = BFD_RELOC_PPC_BA16;
3049 break;
3050 case BFD_RELOC_PPC_B16_BRTAKEN:
3051 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3052 break;
3053 case BFD_RELOC_PPC_B16_BRNTAKEN:
3054 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3055 break;
3056 default:
3057 break;
3058 }
3059 }
3060
01efc3af
AM		 3061 switch (reloc)
3062 {
3063 case BFD_RELOC_PPC_TOC16:
3064 toc_reloc_types |= has_small_toc_reloc;
3065 break;
3066 case BFD_RELOC_PPC64_TOC16_LO:
3067 case BFD_RELOC_PPC64_TOC16_HI:
3068 case BFD_RELOC_PPC64_TOC16_HA:
3069 toc_reloc_types |= has_large_toc_reloc;
3070 break;
3071 default:
3072 break;
3073 }
3074
1fe532cf 3075 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
727fc41e
AM		 3076 {
3077 switch (reloc)
3078 {
3079 case BFD_RELOC_16:
3080 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3081 break;
3082 case BFD_RELOC_LO16:
3083 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3084 break;
3085 case BFD_RELOC_16_GOTOFF:
3086 reloc = BFD_RELOC_PPC64_GOT16_DS;
3087 break;
3088 case BFD_RELOC_LO16_GOTOFF:
3089 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3090 break;
3091 case BFD_RELOC_LO16_PLTOFF:
3092 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3093 break;
3094 case BFD_RELOC_16_BASEREL:
3095 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3096 break;
3097 case BFD_RELOC_LO16_BASEREL:
3098 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3099 break;
3100 case BFD_RELOC_PPC_TOC16:
3101 reloc = BFD_RELOC_PPC64_TOC16_DS;
3102 break;
3103 case BFD_RELOC_PPC64_TOC16_LO:
3104 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3105 break;
3106 case BFD_RELOC_PPC64_PLTGOT16:
3107 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3108 break;
3109 case BFD_RELOC_PPC64_PLTGOT16_LO:
3110 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3111 break;
3112 case BFD_RELOC_PPC_DTPREL16:
3113 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3114 break;
3115 case BFD_RELOC_PPC_DTPREL16_LO:
3116 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3117 break;
3118 case BFD_RELOC_PPC_TPREL16:
3119 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3120 break;
3121 case BFD_RELOC_PPC_TPREL16_LO:
3122 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3123 break;
3124 case BFD_RELOC_PPC_GOT_DTPREL16:
3125 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3126 case BFD_RELOC_PPC_GOT_TPREL16:
3127 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3128 break;
3129 default:
3130 as_bad (_("unsupported relocation for DS offset field"));
3131 break;
3132 }
3133 }
0baf16f2 3134 }
3b8b57a9
AM		 3135#endif /* OBJ_ELF */
3136
3137 if (reloc != BFD_RELOC_UNUSED)
3138 ;
3139 /* Determine a BFD reloc value based on the operand information.
3140 We are only prepared to turn a few of the operands into
3141 relocs. */
3142 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3143 && operand->bitm == 0x3fffffc
3144 && operand->shift == 0)
3145 reloc = BFD_RELOC_PPC_B26;
3146 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3147 && operand->bitm == 0xfffc
3148 && operand->shift == 0)
3149 reloc = BFD_RELOC_PPC_B16;
3150 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3151 && operand->bitm == 0x1fe
3152 && operand->shift == -1)
3153 reloc = BFD_RELOC_PPC_VLE_REL8;
3154 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3155 && operand->bitm == 0xfffe
3156 && operand->shift == 0)
3157 reloc = BFD_RELOC_PPC_VLE_REL15;
3158 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3159 && operand->bitm == 0x1fffffe
3160 && operand->shift == 0)
3161 reloc = BFD_RELOC_PPC_VLE_REL24;
3162 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3163 && operand->bitm == 0x3fffffc
3164 && operand->shift == 0)
3165 reloc = BFD_RELOC_PPC_BA26;
3166 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3167 && operand->bitm == 0xfffc
3168 && operand->shift == 0)
3169 reloc = BFD_RELOC_PPC_BA16;
3170#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3171 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3172 && (operand->bitm & 0xfff0) == 0xfff0
3173 && operand->shift == 0)
3174 {
3175 if (ppc_is_toc_sym (ex.X_add_symbol))
3176 {
3177 reloc = BFD_RELOC_PPC_TOC16;
3178#ifdef OBJ_ELF
3179 if (ppc_obj64
3180 && (operand->flags & PPC_OPERAND_DS) != 0)
3181 reloc = BFD_RELOC_PPC64_TOC16_DS;
3182#endif
3183 }
3184 else
3185 {
3186 reloc = BFD_RELOC_16;
3187#ifdef OBJ_ELF
3188 if (ppc_obj64
3189 && (operand->flags & PPC_OPERAND_DS) != 0)
3190 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3191#endif
3192 }
3193 }
3194#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
0baf16f2 3195
252b5132
RH		 3196 /* We need to generate a fixup for this expression. */
3197 if (fc >= MAX_INSN_FIXUPS)
3198 as_fatal (_("too many fixups"));
3199 fixups[fc].exp = ex;
727fc41e 3200 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3201 fixups[fc].reloc = reloc;
3202 ++fc;
3203 }
252b5132
RH		 3204
3205 if (need_paren)
3206 {
3207 endc = ')';
3208 need_paren = 0;
c3d65c1c
BE		 3209 /* If expecting more operands, then we want to see "),". */
3210 if (*str == endc && opindex_ptr[1] != 0)
3211 {
3212 do
3213 ++str;
3214 while (ISSPACE (*str));
3215 endc = ',';
3216 }
252b5132
RH		 3217 }
3218 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3219 {
3220 endc = '(';
3221 need_paren = 1;
3222 }
3223 else
3224 endc = ',';
3225
3226 /* The call to expression should have advanced str past any
3227 whitespace. */
3228 if (*str != endc
3229 && (endc != ',' || *str != '\0'))
3230 {
5a938047
AM		 3231 if (*str == '\0')
3232 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3233 else
3234 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3235 break;
3236 }
3237
3238 if (*str != '\0')
3239 ++str;
3240 }
3241
3882b010 3242 while (ISSPACE (*str))
252b5132
RH		 3243 ++str;
3244
3245 if (*str != '\0')
3246 as_bad (_("junk at end of line: `%s'"), str);
3247
dc1d03fc 3248#ifdef OBJ_ELF
b9c361e0
JL		 3249 /* Do we need/want an APUinfo section? */
3250 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0)
6a0c61b7
EZ		 3251 {
3252 /* These are all version "1". */
3253 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3254 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3255 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3256 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3257 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3258 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3259 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3260 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3261 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3262 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3263 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3264 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3265 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3266 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3267 if (opcode->flags & PPC_OPCODE_VLE)
3268 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3269 }
dc1d03fc 3270#endif
6a0c61b7 3271
252b5132 3272 /* Write out the instruction. */
b9c361e0
JL		 3273 /* Differentiate between two and four byte insns. */
3274 if (ppc_mach () == bfd_mach_ppc_vle)
3275 {
3276 if (PPC_OP_SE_VLE (insn))
3277 insn_length = 2;
3278 else
3279 insn_length = 4;
3280 addr_mod = frag_now_fix () & 1;
3281 }
3282 else
3283 {
3284 insn_length = 4;
3285 addr_mod = frag_now_fix () & 3;
3286 }
3287 /* All instructions can start on a 2 byte boundary for VLE. */
3288 f = frag_more (insn_length);
09b935ac 3289 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3290 {
3291 if (ppc_mach() == bfd_mach_ppc_vle)
3292 as_bad (_("instruction address is not a multiple of 2"));
3293 else
3294 as_bad (_("instruction address is not a multiple of 4"));
3295 }
09b935ac
AM		 3296 frag_now->insn_addr = addr_mod;
3297 frag_now->has_code = 1;
b9c361e0 3298 md_number_to_chars (f, insn, insn_length);
252b5132 3299
5d6f4f16 3300#ifdef OBJ_ELF
b9c361e0 3301 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3302#endif
3303
3b8b57a9 3304 /* Create any fixups. */
252b5132
RH		 3305 for (i = 0; i < fc; i++)
3306 {
3b8b57a9 3307 fixS *fixP;
252b5132
RH		 3308 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3309 {
99a814a1 3310 reloc_howto_type *reloc_howto;
252b5132
RH		 3311 int size;
3312 int offset;
252b5132 3313
99a814a1 3314 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3315 if (!reloc_howto)
3316 abort ();
3317
3318 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3319 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3320
3321 if (size < 1 || size > 4)
bc805888 3322 abort ();
252b5132 3323
99a814a1
AM		 3324 fixP = fix_new_exp (frag_now,
3325 f - frag_now->fr_literal + offset,
3326 size,
3327 &fixups[i].exp,
3328 reloc_howto->pc_relative,
252b5132 3329 fixups[i].reloc);
252b5132
RH		 3330 }
3331 else
727fc41e
AM		 3332 {
3333 const struct powerpc_operand *operand;
3334
3335 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3336 fixP = fix_new_exp (frag_now,
3337 f - frag_now->fr_literal,
3338 insn_length,
3339 &fixups[i].exp,
3340 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3341 BFD_RELOC_UNUSED);
727fc41e 3342 }
3b8b57a9 3343 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3344 }
3345}
3346
3347/* Handle a macro. Gather all the operands, transform them as
3348 described by the macro, and call md_assemble recursively. All the
3349 operands are separated by commas; we don't accept parentheses
3350 around operands here. */
3351
3352static void
98027b10 3353ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3354{
3355 char *operands[10];
3356 unsigned int count;
3357 char *s;
3358 unsigned int len;
3359 const char *format;
db557034 3360 unsigned int arg;
252b5132
RH		 3361 char *send;
3362 char *complete;
3363
3364 /* Gather the users operands into the operands array. */
3365 count = 0;
3366 s = str;
3367 while (1)
3368 {
3369 if (count >= sizeof operands / sizeof operands[0])
3370 break;
3371 operands[count++] = s;
3372 s = strchr (s, ',');
3373 if (s == (char *) NULL)
3374 break;
3375 *s++ = '\0';
81d4177b 3376 }
252b5132
RH		 3377
3378 if (count != macro->operands)
3379 {
3380 as_bad (_("wrong number of operands"));
3381 return;
3382 }
3383
3384 /* Work out how large the string must be (the size is unbounded
3385 because it includes user input). */
3386 len = 0;
3387 format = macro->format;
3388 while (*format != '\0')
3389 {
3390 if (*format != '%')
3391 {
3392 ++len;
3393 ++format;
3394 }
3395 else
3396 {
3397 arg = strtol (format + 1, &send, 10);
db557034 3398 know (send != format && arg < count);
252b5132
RH		 3399 len += strlen (operands[arg]);
3400 format = send;
3401 }
3402 }
3403
3404 /* Put the string together. */
3405 complete = s = (char *) alloca (len + 1);
3406 format = macro->format;
3407 while (*format != '\0')
3408 {
3409 if (*format != '%')
3410 *s++ = *format++;
3411 else
3412 {
3413 arg = strtol (format + 1, &send, 10);
3414 strcpy (s, operands[arg]);
3415 s += strlen (s);
3416 format = send;
3417 }
3418 }
3419 *s = '\0';
3420
3421 /* Assemble the constructed instruction. */
3422 md_assemble (complete);
81d4177b 3423}
252b5132
RH		 3424\f
3425#ifdef OBJ_ELF
18ae9cc1 3426/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3427
3428int
98027b10 3429ppc_section_type (char *str, size_t len)
252b5132 3430{
9de8d8f1
RH		 3431 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3432 return SHT_ORDERED;
252b5132 3433
9de8d8f1 3434 return -1;
252b5132
RH		 3435}
3436
3437int
1239de13 3438ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3439{
3440 if (type == SHT_ORDERED)
3441 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3442
252b5132
RH		 3443 return flags;
3444}
3445#endif /* OBJ_ELF */
3446
3447\f
3448/* Pseudo-op handling. */
3449
3450/* The .byte pseudo-op. This is similar to the normal .byte
3451 pseudo-op, but it can also take a single ASCII string. */
3452
3453static void
98027b10 3454ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3455{
3456 if (*input_line_pointer != '\"')
3457 {
3458 cons (1);
3459 return;
3460 }
3461
3462 /* Gather characters. A real double quote is doubled. Unusual
3463 characters are not permitted. */
3464 ++input_line_pointer;
3465 while (1)
3466 {
3467 char c;
3468
3469 c = *input_line_pointer++;
3470
3471 if (c == '\"')
3472 {
3473 if (*input_line_pointer != '\"')
3474 break;
3475 ++input_line_pointer;
3476 }
3477
3478 FRAG_APPEND_1_CHAR (c);
3479 }
3480
3481 demand_empty_rest_of_line ();
3482}
3483\f
3484#ifdef OBJ_XCOFF
3485
3486/* XCOFF specific pseudo-op handling. */
3487
3488/* This is set if we are creating a .stabx symbol, since we don't want
3489 to handle symbol suffixes for such symbols. */
b34976b6 3490static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3491
3492/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3493 symbols in the .bss segment as though they were local common
67c1ffbe 3494 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3495 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3496
3497static void
98027b10 3498ppc_comm (int lcomm)
252b5132
RH		 3499{
3500 asection *current_seg = now_seg;
3501 subsegT current_subseg = now_subseg;
3502 char *name;
3503 char endc;
3504 char *end_name;
3505 offsetT size;
3506 offsetT align;
3507 symbolS *lcomm_sym = NULL;
3508 symbolS *sym;
3509 char *pfrag;
3510
3511 name = input_line_pointer;
3512 endc = get_symbol_end ();
3513 end_name = input_line_pointer;
3514 *end_name = endc;
3515
3516 if (*input_line_pointer != ',')
3517 {
3518 as_bad (_("missing size"));
3519 ignore_rest_of_line ();
3520 return;
3521 }
3522 ++input_line_pointer;
3523
3524 size = get_absolute_expression ();
3525 if (size < 0)
3526 {
3527 as_bad (_("negative size"));
3528 ignore_rest_of_line ();
3529 return;
3530 }
3531
3532 if (! lcomm)
3533 {
3534 /* The third argument to .comm is the alignment. */
3535 if (*input_line_pointer != ',')
1ad63b2f 3536 align = 2;
252b5132
RH		 3537 else
3538 {
3539 ++input_line_pointer;
3540 align = get_absolute_expression ();
3541 if (align <= 0)
3542 {
3543 as_warn (_("ignoring bad alignment"));
1ad63b2f 3544 align = 2;
252b5132
RH		 3545 }
3546 }
3547 }
3548 else
3549 {
3550 char *lcomm_name;
3551 char lcomm_endc;
3552
1ad63b2f 3553 if (size <= 4)
252b5132
RH		 3554 align = 2;
3555 else
3556 align = 3;
3557
3558 /* The third argument to .lcomm appears to be the real local
3559 common symbol to create. References to the symbol named in
3560 the first argument are turned into references to the third
3561 argument. */
3562 if (*input_line_pointer != ',')
3563 {
3564 as_bad (_("missing real symbol name"));
3565 ignore_rest_of_line ();
3566 return;
3567 }
3568 ++input_line_pointer;
3569
3570 lcomm_name = input_line_pointer;
3571 lcomm_endc = get_symbol_end ();
81d4177b 3572
252b5132
RH		 3573 lcomm_sym = symbol_find_or_make (lcomm_name);
3574
3575 *input_line_pointer = lcomm_endc;
3576 }
3577
3578 *end_name = '\0';
3579 sym = symbol_find_or_make (name);
3580 *end_name = endc;
3581
3582 if (S_IS_DEFINED (sym)
3583 || S_GET_VALUE (sym) != 0)
3584 {
3585 as_bad (_("attempt to redefine symbol"));
3586 ignore_rest_of_line ();
3587 return;
3588 }
81d4177b 3589
252b5132 3590 record_alignment (bss_section, align);
81d4177b 3591
252b5132
RH		 3592 if (! lcomm
3593 || ! S_IS_DEFINED (lcomm_sym))
3594 {
3595 symbolS *def_sym;
3596 offsetT def_size;
3597
3598 if (! lcomm)
3599 {
3600 def_sym = sym;
3601 def_size = size;
3602 S_SET_EXTERNAL (sym);
3603 }
3604 else
3605 {
809ffe0d 3606 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3607 def_sym = lcomm_sym;
3608 def_size = 0;
3609 }
3610
3611 subseg_set (bss_section, 1);
3612 frag_align (align, 0, 0);
81d4177b 3613
809ffe0d 3614 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3615 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3616 def_size, (char *) NULL);
3617 *pfrag = 0;
3618 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3619 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3620 }
3621 else if (lcomm)
3622 {
3623 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3624 symbol_get_frag (lcomm_sym)->fr_offset =
3625 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3626 &~ ((1 << align) - 1));
809ffe0d
ILT		 3627 if (align > symbol_get_tc (lcomm_sym)->align)
3628 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3629 }
3630
3631 if (lcomm)
3632 {
3633 /* Make sym an offset from lcomm_sym. */
3634 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3635 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3636 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3637 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3638 }
3639
3640 subseg_set (current_seg, current_subseg);
3641
3642 demand_empty_rest_of_line ();
3643}
3644
3645/* The .csect pseudo-op. This switches us into a different
3646 subsegment. The first argument is a symbol whose value is the
3647 start of the .csect. In COFF, csect symbols get special aux
3648 entries defined by the x_csect field of union internal_auxent. The
3649 optional second argument is the alignment (the default is 2). */
3650
3651static void
98027b10 3652ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3653{
3654 char *name;
3655 char endc;
3656 symbolS *sym;
931e13a6 3657 offsetT align;
252b5132
RH		 3658
3659 name = input_line_pointer;
3660 endc = get_symbol_end ();
81d4177b 3661
252b5132
RH		 3662 sym = symbol_find_or_make (name);
3663
3664 *input_line_pointer = endc;
3665
3666 if (S_GET_NAME (sym)[0] == '\0')
3667 {
3668 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3669 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3670 }
3671
931e13a6 3672 align = 2;
252b5132
RH		 3673 if (*input_line_pointer == ',')
3674 {
3675 ++input_line_pointer;
931e13a6 3676 align = get_absolute_expression ();
252b5132
RH		 3677 }
3678
931e13a6
AM		 3679 ppc_change_csect (sym, align);
3680
252b5132
RH		 3681 demand_empty_rest_of_line ();
3682}
3683
3684/* Change to a different csect. */
3685
3686static void
98027b10 3687ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3688{
3689 if (S_IS_DEFINED (sym))
809ffe0d 3690 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3691 else
3692 {
3693 symbolS **list_ptr;
3694 int after_toc;
3695 int hold_chunksize;
3696 symbolS *list;
931e13a6
AM		 3697 int is_code;
3698 segT sec;
252b5132
RH		 3699
3700 /* This is a new csect. We need to look at the symbol class to
3701 figure out whether it should go in the text section or the
3702 data section. */
3703 after_toc = 0;
931e13a6 3704 is_code = 0;
96d56e9f 3705 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3706 {
3707 case XMC_PR:
3708 case XMC_RO:
3709 case XMC_DB:
3710 case XMC_GL:
3711 case XMC_XO:
3712 case XMC_SV:
3713 case XMC_TI:
3714 case XMC_TB:
3715 S_SET_SEGMENT (sym, text_section);
809ffe0d 3716 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3717 ++ppc_text_subsegment;
3718 list_ptr = &ppc_text_csects;
931e13a6 3719 is_code = 1;
252b5132
RH		 3720 break;
3721 case XMC_RW:
3722 case XMC_TC0:
3723 case XMC_TC:
3724 case XMC_DS:
3725 case XMC_UA:
3726 case XMC_BS:
3727 case XMC_UC:
3728 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3729 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3730 == ppc_data_subsegment))
252b5132
RH		 3731 after_toc = 1;
3732 S_SET_SEGMENT (sym, data_section);
809ffe0d 3733 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3734 ++ppc_data_subsegment;
3735 list_ptr = &ppc_data_csects;
3736 break;
3737 default:
3738 abort ();
3739 }
3740
3741 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3742 changing subsegments, so that we don't use a lot of memory
3743 space for what may be a small section. */
252b5132
RH		 3744 hold_chunksize = chunksize;
3745 chunksize = 64;
3746
931e13a6
AM		 3747 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3748 symbol_get_tc (sym)->subseg);
252b5132
RH		 3749
3750 chunksize = hold_chunksize;
3751
3752 if (after_toc)
3753 ppc_after_toc_frag = frag_now;
3754
931e13a6
AM		 3755 record_alignment (sec, align);
3756 if (is_code)
3757 frag_align_code (align, 0);
3758 else
3759 frag_align (align, 0, 0);
3760
809ffe0d 3761 symbol_set_frag (sym, frag_now);
252b5132
RH		 3762 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3763
931e13a6 3764 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3765 symbol_get_tc (sym)->output = 1;
3766 symbol_get_tc (sym)->within = sym;
81d4177b 3767
252b5132 3768 for (list = *list_ptr;
809ffe0d
ILT		 3769 symbol_get_tc (list)->next != (symbolS *) NULL;
3770 list = symbol_get_tc (list)->next)
252b5132 3771 ;
809ffe0d 3772 symbol_get_tc (list)->next = sym;
81d4177b 3773
252b5132 3774 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3775 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3776 &symbol_lastP);
252b5132
RH		 3777 }
3778
3779 ppc_current_csect = sym;
3780}
3781
85645aed
TG		 3782static void
3783ppc_change_debug_section (unsigned int idx, subsegT subseg)
3784{
3785 segT sec;
3786 flagword oldflags;
3787 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3788
3789 sec = subseg_new (dw->name, subseg);
3790 oldflags = bfd_get_section_flags (stdoutput, sec);
3791 if (oldflags == SEC_NO_FLAGS)
3792 {
3793 /* Just created section. */
3794 gas_assert (dw_sections[idx].sect == NULL);
3795
3796 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3797 bfd_set_section_alignment (stdoutput, sec, 0);
3798 dw_sections[idx].sect = sec;
3799 }
3800
3801 /* Not anymore in a csect. */
3802 ppc_current_csect = NULL;
3803}
3804
3805/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3806 .dwsect flag [, opt-label ]
3807*/
3808
3809static void
3810ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3811{
3812 offsetT flag;
3813 symbolS *opt_label;
3814 const struct xcoff_dwsect_name *dw;
3815 struct dw_subsection *subseg;
3816 struct dw_section *dws;
3817 int i;
3818
3819 /* Find section. */
3820 flag = get_absolute_expression ();
3821 dw = NULL;
3822 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3823 if (xcoff_dwsect_names[i].flag == flag)
3824 {
3825 dw = &xcoff_dwsect_names[i];
3826 break;
3827 }
3828
3829 /* Parse opt-label. */
3830 if (*input_line_pointer == ',')
3831 {
3832 const char *label;
3833 char c;
3834
3835 ++input_line_pointer;
3836
3837 label = input_line_pointer;
3838 c = get_symbol_end ();
3839 opt_label = symbol_find_or_make (label);
3840 *input_line_pointer = c;
3841 }
3842 else
3843 opt_label = NULL;
3844
3845 demand_empty_rest_of_line ();
3846
3847 /* Return now in case of unknown subsection. */
3848 if (dw == NULL)
3849 {
d6ed37ed 3850 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3851 (unsigned)flag);
3852 return;
3853 }
3854
3855 /* Find the subsection. */
3856 dws = &dw_sections[i];
3857 subseg = NULL;
3858 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3859 {
3860 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3861 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3862 {
3863 as_bad (_("label %s was not defined in this dwarf section"),
3864 S_GET_NAME (opt_label));
3865 subseg = dws->anon_subseg;
3866 opt_label = NULL;
3867 }
3868 else
3869 subseg = symbol_get_tc (opt_label)->u.dw;
3870 }
3871
3872 if (subseg != NULL)
3873 {
3874 /* Switch to the subsection. */
3875 ppc_change_debug_section (i, subseg->subseg);
3876 }
3877 else
3878 {
3879 /* Create a new dw subsection. */
3880 subseg = (struct dw_subsection *)
3881 xmalloc (sizeof (struct dw_subsection));
3882
3883 if (opt_label == NULL)
3884 {
3885 /* The anonymous one. */
3886 subseg->subseg = 0;
3887 subseg->link = NULL;
3888 dws->anon_subseg = subseg;
3889 }
3890 else
3891 {
3892 /* A named one. */
3893 if (dws->list_subseg != NULL)
3894 subseg->subseg = dws->list_subseg->subseg + 1;
3895 else
3896 subseg->subseg = 1;
3897
3898 subseg->link = dws->list_subseg;
3899 dws->list_subseg = subseg;
3900 symbol_get_tc (opt_label)->u.dw = subseg;
3901 }
3902
3903 ppc_change_debug_section (i, subseg->subseg);
3904
3905 if (dw->def_size)
3906 {
3907 /* Add the length field. */
3908 expressionS *exp = &subseg->end_exp;
3909 int sz;
3910
3911 if (opt_label != NULL)
3912 symbol_set_value_now (opt_label);
3913
3914 /* Add the length field. Note that according to the AIX assembler
3915 manual, the size of the length field is 4 for powerpc32 but
3916 12 for powerpc64. */
3917 if (ppc_obj64)
3918 {
3919 /* Write the 64bit marker. */
3920 md_number_to_chars (frag_more (4), -1, 4);
3921 }
3922
3923 exp->X_op = O_subtract;
3924 exp->X_op_symbol = symbol_temp_new_now ();
3925 exp->X_add_symbol = symbol_temp_make ();
3926
3927 sz = ppc_obj64 ? 8 : 4;
3928 exp->X_add_number = -sz;
3929 emit_expr (exp, sz);
3930 }
3931 }
3932}
3933
252b5132
RH		 3934/* This function handles the .text and .data pseudo-ops. These
3935 pseudo-ops aren't really used by XCOFF; we implement them for the
3936 convenience of people who aren't used to XCOFF. */
3937
3938static void
98027b10 3939ppc_section (int type)
252b5132
RH		 3940{
3941 const char *name;
3942 symbolS *sym;
3943
3944 if (type == 't')
3945 name = ".text[PR]";
3946 else if (type == 'd')
3947 name = ".data[RW]";
3948 else
3949 abort ();
3950
3951 sym = symbol_find_or_make (name);
3952
931e13a6 3953 ppc_change_csect (sym, 2);
252b5132
RH		 3954
3955 demand_empty_rest_of_line ();
3956}
3957
3958/* This function handles the .section pseudo-op. This is mostly to
3959 give an error, since XCOFF only supports .text, .data and .bss, but
3960 we do permit the user to name the text or data section. */
3961
3962static void
98027b10 3963ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3964{
3965 char *user_name;
3966 const char *real_name;
3967 char c;
3968 symbolS *sym;
3969
3970 user_name = input_line_pointer;
3971 c = get_symbol_end ();
3972
3973 if (strcmp (user_name, ".text") == 0)
3974 real_name = ".text[PR]";
3975 else if (strcmp (user_name, ".data") == 0)
3976 real_name = ".data[RW]";
3977 else
3978 {
d6ed37ed 3979 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 3980 *input_line_pointer = c;
3981 ignore_rest_of_line ();
3982 return;
3983 }
3984
3985 *input_line_pointer = c;
3986
3987 sym = symbol_find_or_make (real_name);
3988
931e13a6 3989 ppc_change_csect (sym, 2);
252b5132
RH		 3990
3991 demand_empty_rest_of_line ();
3992}
3993
3994/* The .extern pseudo-op. We create an undefined symbol. */
3995
3996static void
98027b10 3997ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3998{
3999 char *name;
4000 char endc;
4001
4002 name = input_line_pointer;
4003 endc = get_symbol_end ();
4004
4005 (void) symbol_find_or_make (name);
4006
4007 *input_line_pointer = endc;
4008
4009 demand_empty_rest_of_line ();
4010}
4011
4012/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4013
4014static void
98027b10 4015ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4016{
4017 char *name;
4018 char endc;
4019 symbolS *sym;
4020
4021 name = input_line_pointer;
4022 endc = get_symbol_end ();
4023
4024 sym = symbol_find_or_make (name);
4025
4026 *input_line_pointer = endc;
4027
809ffe0d 4028 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4029
4030 demand_empty_rest_of_line ();
4031}
4032
c865e45b
RS		 4033/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4034 relocations at the beginning of the current csect.
4035
4036 (In principle, there's no reason why the relocations _have_ to be at
4037 the beginning. Anywhere in the csect would do. However, inserting
4038 at the beginning is what the native assmebler does, and it helps to
4039 deal with cases where the .ref statements follow the section contents.)
4040
4041 ??? .refs don't work for empty .csects. However, the native assembler
4042 doesn't report an error in this case, and neither yet do we. */
4043
4044static void
4045ppc_ref (int ignore ATTRIBUTE_UNUSED)
4046{
4047 char *name;
4048 char c;
4049
4050 if (ppc_current_csect == NULL)
4051 {
4052 as_bad (_(".ref outside .csect"));
4053 ignore_rest_of_line ();
4054 return;
4055 }
4056
4057 do
4058 {
4059 name = input_line_pointer;
4060 c = get_symbol_end ();
4061
4062 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4063 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4064
4065 *input_line_pointer = c;
4066 SKIP_WHITESPACE ();
4067 c = *input_line_pointer;
4068 if (c == ',')
4069 {
4070 input_line_pointer++;
4071 SKIP_WHITESPACE ();
4072 if (is_end_of_line[(unsigned char) *input_line_pointer])
4073 {
4074 as_bad (_("missing symbol name"));
4075 ignore_rest_of_line ();
4076 return;
4077 }
4078 }
4079 }
4080 while (c == ',');
4081
4082 demand_empty_rest_of_line ();
4083}
4084
252b5132
RH		 4085/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4086 although I don't know why it bothers. */
4087
4088static void
98027b10 4089ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4090{
4091 char *name;
4092 char endc;
4093 symbolS *sym;
4094 int len;
4095
4096 name = input_line_pointer;
4097 endc = get_symbol_end ();
4098
4099 sym = symbol_find_or_make (name);
4100
4101 *input_line_pointer = endc;
4102
4103 if (*input_line_pointer != ',')
4104 {
4105 as_bad (_("missing rename string"));
4106 ignore_rest_of_line ();
4107 return;
4108 }
4109 ++input_line_pointer;
4110
809ffe0d 4111 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4112
4113 demand_empty_rest_of_line ();
4114}
4115
4116/* The .stabx pseudo-op. This is similar to a normal .stabs
4117 pseudo-op, but slightly different. A sample is
4118 .stabx "main:F-1",.main,142,0
4119 The first argument is the symbol name to create. The second is the
4120 value, and the third is the storage class. The fourth seems to be
4121 always zero, and I am assuming it is the type. */
4122
4123static void
98027b10 4124ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4125{
4126 char *name;
4127 int len;
4128 symbolS *sym;
4129 expressionS exp;
4130
4131 name = demand_copy_C_string (&len);
4132
4133 if (*input_line_pointer != ',')
4134 {
4135 as_bad (_("missing value"));
4136 return;
4137 }
4138 ++input_line_pointer;
4139
b34976b6 4140 ppc_stab_symbol = TRUE;
252b5132 4141 sym = symbol_make (name);
b34976b6 4142 ppc_stab_symbol = FALSE;
252b5132 4143
809ffe0d 4144 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4145
4146 (void) expression (&exp);
4147
4148 switch (exp.X_op)
4149 {
4150 case O_illegal:
4151 case O_absent:
4152 case O_big:
4153 as_bad (_("illegal .stabx expression; zero assumed"));
4154 exp.X_add_number = 0;
4155 /* Fall through. */
4156 case O_constant:
4157 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4158 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4159 break;
4160
4161 case O_symbol:
4162 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4163 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4164 else
4165 {
4166 S_SET_VALUE (sym,
4167 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4168 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4169 }
4170 break;
4171
4172 default:
4173 /* The value is some complex expression. This will probably
99a814a1
AM		 4174 fail at some later point, but this is probably the right
4175 thing to do here. */
809ffe0d 4176 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4177 break;
4178 }
4179
4180 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4181 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4182
4183 if (*input_line_pointer != ',')
4184 {
4185 as_bad (_("missing class"));
4186 return;
4187 }
4188 ++input_line_pointer;
4189
4190 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4191
4192 if (*input_line_pointer != ',')
4193 {
4194 as_bad (_("missing type"));
4195 return;
4196 }
4197 ++input_line_pointer;
4198
4199 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4200
809ffe0d 4201 symbol_get_tc (sym)->output = 1;
252b5132 4202
c734e7e3
TG		 4203 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4204 {
4205 /* In this case :
252b5132 4206
c734e7e3
TG		 4207 .bs name
4208 .stabx "z",arrays_,133,0
4209 .es
99a814a1 4210
c734e7e3 4211 .comm arrays_,13768,3
99a814a1 4212
c734e7e3
TG		 4213 resolve_symbol_value will copy the exp's "within" into sym's when the
4214 offset is 0. Since this seems to be corner case problem,
4215 only do the correction for storage class C_STSYM. A better solution
4216 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4217
c734e7e3
TG		 4218 if (exp.X_op == O_symbol)
4219 {
4220 if (ppc_current_block == NULL)
4221 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4222
c734e7e3
TG		 4223 symbol_get_tc (sym)->within = ppc_current_block;
4224 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4225 }
4226 }
99a814a1 4227
252b5132
RH		 4228 if (exp.X_op != O_symbol
4229 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4230 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4231 ppc_frob_label (sym);
4232 else
4233 {
4234 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4235 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4236 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4237 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4238 }
4239
4240 demand_empty_rest_of_line ();
4241}
4242
4243/* The .function pseudo-op. This takes several arguments. The first
4244 argument seems to be the external name of the symbol. The second
67c1ffbe 4245 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4246 uses the same name for both. I have no idea what the third and
4247 fourth arguments are meant to be. The optional fifth argument is
4248 an expression for the size of the function. In COFF this symbol
4249 gets an aux entry like that used for a csect. */
4250
4251static void
98027b10 4252ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4253{
4254 char *name;
4255 char endc;
4256 char *s;
4257 symbolS *ext_sym;
4258 symbolS *lab_sym;
4259
4260 name = input_line_pointer;
4261 endc = get_symbol_end ();
4262
4263 /* Ignore any [PR] suffix. */
4264 name = ppc_canonicalize_symbol_name (name);
4265 s = strchr (name, '[');
4266 if (s != (char *) NULL
4267 && strcmp (s + 1, "PR]") == 0)
4268 *s = '\0';
4269
4270 ext_sym = symbol_find_or_make (name);
4271
4272 *input_line_pointer = endc;
4273
4274 if (*input_line_pointer != ',')
4275 {
4276 as_bad (_("missing symbol name"));
4277 ignore_rest_of_line ();
4278 return;
4279 }
4280 ++input_line_pointer;
4281
4282 name = input_line_pointer;
4283 endc = get_symbol_end ();
4284
4285 lab_sym = symbol_find_or_make (name);
4286
4287 *input_line_pointer = endc;
4288
4289 if (ext_sym != lab_sym)
4290 {
809ffe0d
ILT		 4291 expressionS exp;
4292
4293 exp.X_op = O_symbol;
4294 exp.X_add_symbol = lab_sym;
4295 exp.X_op_symbol = NULL;
4296 exp.X_add_number = 0;
4297 exp.X_unsigned = 0;
4298 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4299 }
4300
96d56e9f
NC		 4301 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4302 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4303 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4304
4305 if (*input_line_pointer == ',')
4306 {
91d6fa6a 4307 expressionS exp;
252b5132
RH		 4308
4309 /* Ignore the third argument. */
4310 ++input_line_pointer;
91d6fa6a 4311 expression (& exp);
252b5132
RH		 4312 if (*input_line_pointer == ',')
4313 {
4314 /* Ignore the fourth argument. */
4315 ++input_line_pointer;
91d6fa6a 4316 expression (& exp);
252b5132
RH		 4317 if (*input_line_pointer == ',')
4318 {
4319 /* The fifth argument is the function size. */
4320 ++input_line_pointer;
85645aed
TG		 4321 symbol_get_tc (ext_sym)->u.size = symbol_new
4322 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4323 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4324 }
4325 }
4326 }
4327
4328 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4329 SF_SET_FUNCTION (ext_sym);
4330 SF_SET_PROCESS (ext_sym);
4331 coff_add_linesym (ext_sym);
4332
4333 demand_empty_rest_of_line ();
4334}
4335
4336/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4337 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4338 with the correct line number */
5d6255fe 4339
8642cce8 4340static symbolS *saved_bi_sym = 0;
252b5132
RH		 4341
4342static void
98027b10 4343ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4344{
4345 symbolS *sym;
4346
4347 sym = symbol_make (".bf");
4348 S_SET_SEGMENT (sym, text_section);
809ffe0d 4349 symbol_set_frag (sym, frag_now);
252b5132
RH		 4350 S_SET_VALUE (sym, frag_now_fix ());
4351 S_SET_STORAGE_CLASS (sym, C_FCN);
4352
4353 coff_line_base = get_absolute_expression ();
4354
4355 S_SET_NUMBER_AUXILIARY (sym, 1);
4356 SA_SET_SYM_LNNO (sym, coff_line_base);
4357
8642cce8 4358 /* Line number for bi. */
5d6255fe 4359 if (saved_bi_sym)
8642cce8
TR		 4360 {
4361 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4362 saved_bi_sym = 0;
4363 }
5d6255fe 4364
8642cce8 4365
809ffe0d 4366 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4367
4368 ppc_frob_label (sym);
4369
4370 demand_empty_rest_of_line ();
4371}
4372
4373/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4374 ".ef", except that the line number is absolute, not relative to the
4375 most recent ".bf" symbol. */
4376
4377static void
98027b10 4378ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4379{
4380 symbolS *sym;
4381
4382 sym = symbol_make (".ef");
4383 S_SET_SEGMENT (sym, text_section);
809ffe0d 4384 symbol_set_frag (sym, frag_now);
252b5132
RH		 4385 S_SET_VALUE (sym, frag_now_fix ());
4386 S_SET_STORAGE_CLASS (sym, C_FCN);
4387 S_SET_NUMBER_AUXILIARY (sym, 1);
4388 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4389 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4390
4391 ppc_frob_label (sym);
4392
4393 demand_empty_rest_of_line ();
4394}
4395
4396/* The .bi and .ei pseudo-ops. These take a string argument and
4397 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4398 the symbol list. The value of .bi will be know when the next .bf
4399 is encountered. */
252b5132
RH		 4400
4401static void
98027b10 4402ppc_biei (int ei)
252b5132
RH		 4403{
4404 static symbolS *last_biei;
4405
4406 char *name;
4407 int len;
4408 symbolS *sym;
4409 symbolS *look;
4410
4411 name = demand_copy_C_string (&len);
4412
4413 /* The value of these symbols is actually file offset. Here we set
4414 the value to the index into the line number entries. In
4415 ppc_frob_symbols we set the fix_line field, which will cause BFD
4416 to do the right thing. */
4417
4418 sym = symbol_make (name);
4419 /* obj-coff.c currently only handles line numbers correctly in the
4420 .text section. */
4421 S_SET_SEGMENT (sym, text_section);
4422 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4423 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4424
4425 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4426 symbol_get_tc (sym)->output = 1;
81d4177b 4427
8642cce8 4428 /* Save bi. */
5d6255fe 4429 if (ei)
8642cce8
TR		 4430 saved_bi_sym = 0;
4431 else
4432 saved_bi_sym = sym;
4433
252b5132
RH		 4434 for (look = last_biei ? last_biei : symbol_rootP;
4435 (look != (symbolS *) NULL
4436 && (S_GET_STORAGE_CLASS (look) == C_FILE
4437 || S_GET_STORAGE_CLASS (look) == C_BINCL
4438 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4439 look = symbol_next (look))
4440 ;
4441 if (look != (symbolS *) NULL)
4442 {
4443 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4444 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4445 last_biei = sym;
4446 }
4447
4448 demand_empty_rest_of_line ();
4449}
4450
4451/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4452 There is one argument, which is a csect symbol. The value of the
4453 .bs symbol is the index of this csect symbol. */
4454
4455static void
98027b10 4456ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4457{
4458 char *name;
4459 char endc;
4460 symbolS *csect;
4461 symbolS *sym;
4462
4463 if (ppc_current_block != NULL)
4464 as_bad (_("nested .bs blocks"));
4465
4466 name = input_line_pointer;
4467 endc = get_symbol_end ();
4468
4469 csect = symbol_find_or_make (name);
4470
4471 *input_line_pointer = endc;
4472
4473 sym = symbol_make (".bs");
4474 S_SET_SEGMENT (sym, now_seg);
4475 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4476 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4477 symbol_get_tc (sym)->output = 1;
252b5132 4478
809ffe0d 4479 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4480
4481 ppc_frob_label (sym);
4482
4483 ppc_current_block = sym;
4484
4485 demand_empty_rest_of_line ();
4486}
4487
4488/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4489
4490static void
98027b10 4491ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4492{
4493 symbolS *sym;
4494
4495 if (ppc_current_block == NULL)
4496 as_bad (_(".es without preceding .bs"));
4497
4498 sym = symbol_make (".es");
4499 S_SET_SEGMENT (sym, now_seg);
4500 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4501 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4502 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4503
4504 ppc_frob_label (sym);
4505
4506 ppc_current_block = NULL;
4507
4508 demand_empty_rest_of_line ();
4509}
4510
4511/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4512 line number. */
4513
4514static void
98027b10 4515ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4516{
4517 symbolS *sym;
4518
4519 sym = symbol_make (".bb");
4520 S_SET_SEGMENT (sym, text_section);
809ffe0d 4521 symbol_set_frag (sym, frag_now);
252b5132
RH		 4522 S_SET_VALUE (sym, frag_now_fix ());
4523 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4524
4525 S_SET_NUMBER_AUXILIARY (sym, 1);
4526 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4527
809ffe0d 4528 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4529
4530 SF_SET_PROCESS (sym);
4531
4532 ppc_frob_label (sym);
4533
4534 demand_empty_rest_of_line ();
4535}
4536
4537/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4538 line number. */
4539
4540static void
98027b10 4541ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4542{
4543 symbolS *sym;
4544
4545 sym = symbol_make (".eb");
4546 S_SET_SEGMENT (sym, text_section);
809ffe0d 4547 symbol_set_frag (sym, frag_now);
252b5132
RH		 4548 S_SET_VALUE (sym, frag_now_fix ());
4549 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4550 S_SET_NUMBER_AUXILIARY (sym, 1);
4551 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4552 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4553
4554 SF_SET_PROCESS (sym);
4555
4556 ppc_frob_label (sym);
4557
4558 demand_empty_rest_of_line ();
4559}
4560
4561/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4562 specified name. */
4563
4564static void
98027b10 4565ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4566{
4567 char *name;
4568 int len;
4569 symbolS *sym;
4570
4571 name = demand_copy_C_string (&len);
4572 sym = symbol_make (name);
4573 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4574 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4575 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4576 S_SET_VALUE (sym, 0);
809ffe0d 4577 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4578
4579 ppc_frob_label (sym);
4580
4581 demand_empty_rest_of_line ();
4582}
4583
4584/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4585
4586static void
98027b10 4587ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4588{
4589 symbolS *sym;
4590
4591 sym = symbol_make (".ec");
4592 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4593 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4594 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4595 S_SET_VALUE (sym, 0);
809ffe0d 4596 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4597
4598 ppc_frob_label (sym);
4599
4600 demand_empty_rest_of_line ();
4601}
4602
4603/* The .toc pseudo-op. Switch to the .toc subsegment. */
4604
4605static void
98027b10 4606ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4607{
4608 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4609 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4610 else
4611 {
4612 subsegT subseg;
4613 symbolS *sym;
4614 symbolS *list;
81d4177b 4615
252b5132
RH		 4616 subseg = ppc_data_subsegment;
4617 ++ppc_data_subsegment;
4618
4619 subseg_new (segment_name (data_section), subseg);
4620 ppc_toc_frag = frag_now;
4621
4622 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4623 symbol_set_frag (sym, frag_now);
252b5132
RH		 4624 S_SET_SEGMENT (sym, data_section);
4625 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4626 symbol_get_tc (sym)->subseg = subseg;
4627 symbol_get_tc (sym)->output = 1;
4628 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4629
4630 ppc_toc_csect = sym;
81d4177b 4631
252b5132 4632 for (list = ppc_data_csects;
809ffe0d
ILT		 4633 symbol_get_tc (list)->next != (symbolS *) NULL;
4634 list = symbol_get_tc (list)->next)
252b5132 4635 ;
809ffe0d 4636 symbol_get_tc (list)->next = sym;
252b5132
RH		 4637
4638 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4639 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4640 &symbol_lastP);
252b5132
RH		 4641 }
4642
4643 ppc_current_csect = ppc_toc_csect;
4644
4645 demand_empty_rest_of_line ();
4646}
4647
4648/* The AIX assembler automatically aligns the operands of a .long or
4649 .short pseudo-op, and we want to be compatible. */
4650
4651static void
98027b10 4652ppc_xcoff_cons (int log_size)
252b5132
RH		 4653{
4654 frag_align (log_size, 0, 0);
4655 record_alignment (now_seg, log_size);
4656 cons (1 << log_size);
4657}
4658
4659static void
98027b10 4660ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4661{
4662 expressionS exp;
4663 int byte_count;
4664
4665 (void) expression (&exp);
4666
4667 if (exp.X_op != O_constant)
4668 {
4669 as_bad (_("non-constant byte count"));
4670 return;
4671 }
4672
4673 byte_count = exp.X_add_number;
4674
4675 if (*input_line_pointer != ',')
4676 {
4677 as_bad (_("missing value"));
4678 return;
4679 }
4680
4681 ++input_line_pointer;
4682 cons (byte_count);
4683}
4684
85645aed
TG		 4685void
4686ppc_xcoff_end (void)
4687{
4688 int i;
4689
4690 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4691 {
4692 struct dw_section *dws = &dw_sections[i];
4693 struct dw_subsection *dwss;
4694
4695 if (dws->anon_subseg)
4696 {
4697 dwss = dws->anon_subseg;
4698 dwss->link = dws->list_subseg;
4699 }
4700 else
4701 dwss = dws->list_subseg;
4702
4703 for (; dwss != NULL; dwss = dwss->link)
4704 if (dwss->end_exp.X_add_symbol != NULL)
4705 {
4706 subseg_set (dws->sect, dwss->subseg);
4707 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4708 }
4709 }
4710}
4711
252b5132 4712#endif /* OBJ_XCOFF */
0baf16f2 4713#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4714\f
4715/* The .tc pseudo-op. This is used when generating either XCOFF or
4716 ELF. This takes two or more arguments.
4717
4718 When generating XCOFF output, the first argument is the name to
4719 give to this location in the toc; this will be a symbol with class
0baf16f2 4720 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4721 this location in the TOC; often there is just one more argument, a
1049f94e 4722 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4723 depends on target word size. A 32-bit target uses 4-byte values, a
4724 64-bit target uses 8-byte values.
252b5132
RH		 4725
4726 When not generating XCOFF output, the arguments are the same, but
4727 the first argument is simply ignored. */
4728
4729static void
98027b10 4730ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4731{
4732#ifdef OBJ_XCOFF
4733
4734 /* Define the TOC symbol name. */
4735 {
4736 char *name;
4737 char endc;
4738 symbolS *sym;
4739
4740 if (ppc_toc_csect == (symbolS *) NULL
4741 || ppc_toc_csect != ppc_current_csect)
4742 {
4743 as_bad (_(".tc not in .toc section"));
4744 ignore_rest_of_line ();
4745 return;
4746 }
4747
4748 name = input_line_pointer;
4749 endc = get_symbol_end ();
4750
4751 sym = symbol_find_or_make (name);
4752
4753 *input_line_pointer = endc;
4754
4755 if (S_IS_DEFINED (sym))
4756 {
4757 symbolS *label;
4758
809ffe0d 4759 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4760 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4761 {
4762 as_bad (_(".tc with no label"));
4763 ignore_rest_of_line ();
4764 return;
4765 }
4766
4767 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4768 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4769 S_SET_VALUE (label, S_GET_VALUE (sym));
4770
4771 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4772 ++input_line_pointer;
4773
4774 return;
4775 }
4776
4777 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4778 symbol_set_frag (sym, frag_now);
252b5132 4779 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4780 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4781 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4782
4783 ppc_frob_label (sym);
4784 }
4785
0baf16f2
AM		 4786#endif /* OBJ_XCOFF */
4787#ifdef OBJ_ELF
9c7977b3 4788 int align;
252b5132
RH		 4789
4790 /* Skip the TOC symbol name. */
4791 while (is_part_of_name (*input_line_pointer)
d13d4015 4792 || *input_line_pointer == ' '
252b5132
RH		 4793 || *input_line_pointer == '['
4794 || *input_line_pointer == ']'
4795 || *input_line_pointer == '{'
4796 || *input_line_pointer == '}')
4797 ++input_line_pointer;
4798
0baf16f2 4799 /* Align to a four/eight byte boundary. */
2b3c4602 4800 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4801 frag_align (align, 0, 0);
4802 record_alignment (now_seg, align);
0baf16f2 4803#endif /* OBJ_ELF */
252b5132
RH		 4804
4805 if (*input_line_pointer != ',')
4806 demand_empty_rest_of_line ();
4807 else
4808 {
4809 ++input_line_pointer;
2b3c4602 4810 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4811 }
4812}
0baf16f2
AM		 4813
4814/* Pseudo-op .machine. */
0baf16f2
AM		 4815
4816static void
98027b10 4817ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4818{
69c040df
AM		 4819 char *cpu_string;
4820#define MAX_HISTORY 100
fa452fa6 4821 static ppc_cpu_t *cpu_history;
69c040df
AM		 4822 static int curr_hist;
4823
4824 SKIP_WHITESPACE ();
4825
4826 if (*input_line_pointer == '"')
4827 {
4828 int len;
4829 cpu_string = demand_copy_C_string (&len);
4830 }
4831 else
4832 {
4833 char c;
4834 cpu_string = input_line_pointer;
4835 c = get_symbol_end ();
4836 cpu_string = xstrdup (cpu_string);
4837 *input_line_pointer = c;
4838 }
4839
4840 if (cpu_string != NULL)
4841 {
fa452fa6 4842 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4843 ppc_cpu_t new_cpu;
69c040df
AM		 4844 char *p;
4845
4846 for (p = cpu_string; *p != 0; p++)
4847 *p = TOLOWER (*p);
4848
4849 if (strcmp (cpu_string, "push") == 0)
4850 {
4851 if (cpu_history == NULL)
4852 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4853
4854 if (curr_hist >= MAX_HISTORY)
4855 as_bad (_(".machine stack overflow"));
4856 else
4857 cpu_history[curr_hist++] = ppc_cpu;
4858 }
4859 else if (strcmp (cpu_string, "pop") == 0)
4860 {
4861 if (curr_hist <= 0)
4862 as_bad (_(".machine stack underflow"));
4863 else
4864 ppc_cpu = cpu_history[--curr_hist];
4865 }
69fe9ce5
AM		 4866 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4867 ppc_cpu = new_cpu;
69c040df
AM		 4868 else
4869 as_bad (_("invalid machine `%s'"), cpu_string);
4870
4871 if (ppc_cpu != old_cpu)
4872 ppc_setup_opcodes ();
4873 }
4874
4875 demand_empty_rest_of_line ();
0baf16f2 4876}
0baf16f2 4877#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4878\f
4879#ifdef TE_PE
4880
99a814a1 4881/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4882
4883/* Set the current section. */
4884static void
98027b10 4885ppc_set_current_section (segT new)
252b5132
RH		 4886{
4887 ppc_previous_section = ppc_current_section;
4888 ppc_current_section = new;
4889}
4890
4891/* pseudo-op: .previous
4892 behaviour: toggles the current section with the previous section.
4893 errors: None
99a814a1
AM		 4894 warnings: "No previous section" */
4895
252b5132 4896static void
98027b10 4897ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 4898{
81d4177b 4899 if (ppc_previous_section == NULL)
252b5132 4900 {
d6ed37ed 4901 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 4902 return;
4903 }
4904
99a814a1 4905 subseg_set (ppc_previous_section, 0);
252b5132 4906
99a814a1 4907 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4908}
4909
4910/* pseudo-op: .pdata
4911 behaviour: predefined read only data section
b34976b6 4912 double word aligned
252b5132
RH		 4913 errors: None
4914 warnings: None
4915 initial: .section .pdata "adr3"
b34976b6 4916 a - don't know -- maybe a misprint
252b5132
RH		 4917 d - initialized data
4918 r - readable
4919 3 - double word aligned (that would be 4 byte boundary)
4920
4921 commentary:
4922 Tag index tables (also known as the function table) for exception
99a814a1 4923 handling, debugging, etc. */
252b5132 4924
252b5132 4925static void
98027b10 4926ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4927{
81d4177b 4928 if (pdata_section == 0)
252b5132
RH		 4929 {
4930 pdata_section = subseg_new (".pdata", 0);
81d4177b 4931
252b5132
RH		 4932 bfd_set_section_flags (stdoutput, pdata_section,
4933 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4934 | SEC_READONLY | SEC_DATA ));
81d4177b 4935
252b5132
RH		 4936 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4937 }
4938 else
4939 {
99a814a1 4940 pdata_section = subseg_new (".pdata", 0);
252b5132 4941 }
99a814a1 4942 ppc_set_current_section (pdata_section);
252b5132
RH		 4943}
4944
4945/* pseudo-op: .ydata
4946 behaviour: predefined read only data section
b34976b6 4947 double word aligned
252b5132
RH		 4948 errors: None
4949 warnings: None
4950 initial: .section .ydata "drw3"
b34976b6 4951 a - don't know -- maybe a misprint
252b5132
RH		 4952 d - initialized data
4953 r - readable
4954 3 - double word aligned (that would be 4 byte boundary)
4955 commentary:
4956 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4957 debugging, etc. */
4958
252b5132 4959static void
98027b10 4960ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4961{
81d4177b 4962 if (ydata_section == 0)
252b5132
RH		 4963 {
4964 ydata_section = subseg_new (".ydata", 0);
4965 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4966 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4967 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4968
4969 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4970 }
4971 else
4972 {
4973 ydata_section = subseg_new (".ydata", 0);
4974 }
99a814a1 4975 ppc_set_current_section (ydata_section);
252b5132
RH		 4976}
4977
4978/* pseudo-op: .reldata
4979 behaviour: predefined read write data section
b34976b6 4980 double word aligned (4-byte)
252b5132
RH		 4981 FIXME: relocation is applied to it
4982 FIXME: what's the difference between this and .data?
4983 errors: None
4984 warnings: None
4985 initial: .section .reldata "drw3"
4986 d - initialized data
4987 r - readable
4988 w - writeable
4989 3 - double word aligned (that would be 8 byte boundary)
4990
4991 commentary:
4992 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4993 function descriptors, etc. */
4994
252b5132 4995static void
98027b10 4996ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4997{
4998 if (reldata_section == 0)
4999 {
5000 reldata_section = subseg_new (".reldata", 0);
5001
5002 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5003 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5004 | SEC_DATA));
252b5132
RH		 5005
5006 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5007 }
5008 else
5009 {
5010 reldata_section = subseg_new (".reldata", 0);
5011 }
99a814a1 5012 ppc_set_current_section (reldata_section);
252b5132
RH		 5013}
5014
5015/* pseudo-op: .rdata
5016 behaviour: predefined read only data section
b34976b6 5017 double word aligned
252b5132
RH		 5018 errors: None
5019 warnings: None
5020 initial: .section .rdata "dr3"
5021 d - initialized data
5022 r - readable
99a814a1
AM		 5023 3 - double word aligned (that would be 4 byte boundary) */
5024
252b5132 5025static void
98027b10 5026ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5027{
5028 if (rdata_section == 0)
5029 {
5030 rdata_section = subseg_new (".rdata", 0);
5031 bfd_set_section_flags (stdoutput, rdata_section,
5032 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5033 | SEC_READONLY | SEC_DATA ));
5034
5035 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5036 }
5037 else
5038 {
5039 rdata_section = subseg_new (".rdata", 0);
5040 }
99a814a1 5041 ppc_set_current_section (rdata_section);
252b5132
RH		 5042}
5043
5044/* pseudo-op: .ualong
81d4177b 5045 behaviour: much like .int, with the exception that no alignment is
b34976b6 5046 performed.
252b5132
RH		 5047 FIXME: test the alignment statement
5048 errors: None
99a814a1
AM		 5049 warnings: None */
5050
252b5132 5051static void
98027b10 5052ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5053{
99a814a1
AM		 5054 /* Try for long. */
5055 cons (4);
252b5132
RH		 5056}
5057
5058/* pseudo-op: .znop <symbol name>
5059 behaviour: Issue a nop instruction
b34976b6 5060 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5061 the supplied symbol name.
5062 errors: None
99a814a1
AM		 5063 warnings: Missing symbol name */
5064
252b5132 5065static void
98027b10 5066ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5067{
5068 unsigned long insn;
5069 const struct powerpc_opcode *opcode;
252b5132 5070 char *f;
252b5132 5071 symbolS *sym;
252b5132
RH		 5072 char *symbol_name;
5073 char c;
5074 char *name;
252b5132 5075
99a814a1 5076 /* Strip out the symbol name. */
252b5132
RH		 5077 symbol_name = input_line_pointer;
5078 c = get_symbol_end ();
5079
5080 name = xmalloc (input_line_pointer - symbol_name + 1);
5081 strcpy (name, symbol_name);
5082
5083 sym = symbol_find_or_make (name);
5084
5085 *input_line_pointer = c;
5086
5087 SKIP_WHITESPACE ();
5088
5089 /* Look up the opcode in the hash table. */
5090 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5091
99a814a1 5092 /* Stick in the nop. */
252b5132
RH		 5093 insn = opcode->opcode;
5094
5095 /* Write out the instruction. */
5096 f = frag_more (4);
5097 md_number_to_chars (f, insn, 4);
5098 fix_new (frag_now,
5099 f - frag_now->fr_literal,
5100 4,
5101 sym,
5102 0,
5103 0,
5104 BFD_RELOC_16_GOT_PCREL);
5105
5106}
5107
81d4177b
KH		 5108/* pseudo-op:
5109 behaviour:
5110 errors:
99a814a1
AM		 5111 warnings: */
5112
252b5132 5113static void
98027b10 5114ppc_pe_comm (int lcomm)
252b5132 5115{
98027b10
AM		 5116 char *name;
5117 char c;
5118 char *p;
252b5132 5119 offsetT temp;
98027b10 5120 symbolS *symbolP;
252b5132
RH		 5121 offsetT align;
5122
5123 name = input_line_pointer;
5124 c = get_symbol_end ();
5125
99a814a1 5126 /* just after name is now '\0'. */
252b5132
RH		 5127 p = input_line_pointer;
5128 *p = c;
5129 SKIP_WHITESPACE ();
5130 if (*input_line_pointer != ',')
5131 {
d6ed37ed 5132 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5133 ignore_rest_of_line ();
5134 return;
5135 }
5136
5137 input_line_pointer++; /* skip ',' */
5138 if ((temp = get_absolute_expression ()) < 0)
5139 {
5140 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5141 ignore_rest_of_line ();
5142 return;
5143 }
5144
5145 if (! lcomm)
5146 {
5147 /* The third argument to .comm is the alignment. */
5148 if (*input_line_pointer != ',')
5149 align = 3;
5150 else
5151 {
5152 ++input_line_pointer;
5153 align = get_absolute_expression ();
5154 if (align <= 0)
5155 {
5156 as_warn (_("ignoring bad alignment"));
5157 align = 3;
5158 }
5159 }
5160 }
5161
5162 *p = 0;
5163 symbolP = symbol_find_or_make (name);
5164
5165 *p = c;
5166 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5167 {
d6ed37ed 5168 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5169 S_GET_NAME (symbolP));
5170 ignore_rest_of_line ();
5171 return;
5172 }
5173
5174 if (S_GET_VALUE (symbolP))
5175 {
5176 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5177 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5178 S_GET_NAME (symbolP),
5179 (long) S_GET_VALUE (symbolP),
5180 (long) temp);
5181 }
5182 else
5183 {
5184 S_SET_VALUE (symbolP, (valueT) temp);
5185 S_SET_EXTERNAL (symbolP);
86ebace2 5186 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5187 }
5188
5189 demand_empty_rest_of_line ();
5190}
5191
5192/*
5193 * implement the .section pseudo op:
5194 * .section name {, "flags"}
5195 * ^ ^
5196 * | +--- optional flags: 'b' for bss
5197 * | 'i' for info
5198 * +-- section name 'l' for lib
5199 * 'n' for noload
5200 * 'o' for over
5201 * 'w' for data
5202 * 'd' (apparently m88k for data)
5203 * 'x' for text
5204 * But if the argument is not a quoted string, treat it as a
5205 * subsegment number.
5206 *
5207 * FIXME: this is a copy of the section processing from obj-coff.c, with
5208 * additions/changes for the moto-pas assembler support. There are three
5209 * categories:
5210 *
81d4177b 5211 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5212 * setting bits that bfd probably neither understands or uses. The
5213 * correct approach (?) will have to incorporate extra fields attached
5214 * to the section to hold the system specific stuff. (krk)
5215 *
5216 * Section Contents:
5217 * 'a' - unknown - referred to in documentation, but no definition supplied
5218 * 'c' - section has code
5219 * 'd' - section has initialized data
5220 * 'u' - section has uninitialized data
5221 * 'i' - section contains directives (info)
5222 * 'n' - section can be discarded
5223 * 'R' - remove section at link time
5224 *
5225 * Section Protection:
5226 * 'r' - section is readable
5227 * 'w' - section is writeable
5228 * 'x' - section is executable
5229 * 's' - section is sharable
5230 *
5231 * Section Alignment:
5232 * '0' - align to byte boundary
5233 * '1' - align to halfword undary
5234 * '2' - align to word boundary
5235 * '3' - align to doubleword boundary
5236 * '4' - align to quadword boundary
5237 * '5' - align to 32 byte boundary
5238 * '6' - align to 64 byte boundary
5239 *
5240 */
5241
5242void
98027b10 5243ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5244{
99a814a1 5245 /* Strip out the section name. */
252b5132
RH		 5246 char *section_name;
5247 char c;
5248 char *name;
5249 unsigned int exp;
5250 flagword flags;
5251 segT sec;
5252 int align;
5253
5254 section_name = input_line_pointer;
5255 c = get_symbol_end ();
5256
5257 name = xmalloc (input_line_pointer - section_name + 1);
5258 strcpy (name, section_name);
5259
5260 *input_line_pointer = c;
5261
5262 SKIP_WHITESPACE ();
5263
5264 exp = 0;
5265 flags = SEC_NO_FLAGS;
5266
5267 if (strcmp (name, ".idata$2") == 0)
5268 {
5269 align = 0;
5270 }
5271 else if (strcmp (name, ".idata$3") == 0)
5272 {
5273 align = 0;
5274 }
5275 else if (strcmp (name, ".idata$4") == 0)
5276 {
5277 align = 2;
5278 }
5279 else if (strcmp (name, ".idata$5") == 0)
5280 {
5281 align = 2;
5282 }
5283 else if (strcmp (name, ".idata$6") == 0)
5284 {
5285 align = 1;
5286 }
5287 else
99a814a1
AM		 5288 /* Default alignment to 16 byte boundary. */
5289 align = 4;
252b5132
RH		 5290
5291 if (*input_line_pointer == ',')
5292 {
5293 ++input_line_pointer;
5294 SKIP_WHITESPACE ();
5295 if (*input_line_pointer != '"')
5296 exp = get_absolute_expression ();
5297 else
5298 {
5299 ++input_line_pointer;
5300 while (*input_line_pointer != '"'
5301 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5302 {
5303 switch (*input_line_pointer)
5304 {
5305 /* Section Contents */
5306 case 'a': /* unknown */
d6ed37ed 5307 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5308 break;
5309 case 'c': /* code section */
81d4177b 5310 flags |= SEC_CODE;
252b5132
RH		 5311 break;
5312 case 'd': /* section has initialized data */
5313 flags |= SEC_DATA;
5314 break;
5315 case 'u': /* section has uninitialized data */
5316 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5317 in winnt.h */
5318 flags |= SEC_ROM;
5319 break;
5320 case 'i': /* section contains directives (info) */
5321 /* FIXME: This is IMAGE_SCN_LNK_INFO
5322 in winnt.h */
5323 flags |= SEC_HAS_CONTENTS;
5324 break;
5325 case 'n': /* section can be discarded */
81d4177b 5326 flags &=~ SEC_LOAD;
252b5132
RH		 5327 break;
5328 case 'R': /* Remove section at link time */
5329 flags |= SEC_NEVER_LOAD;
5330 break;
8d452c78 5331#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5332 /* Section Protection */
5333 case 'r': /* section is readable */
5334 flags |= IMAGE_SCN_MEM_READ;
5335 break;
5336 case 'w': /* section is writeable */
5337 flags |= IMAGE_SCN_MEM_WRITE;
5338 break;
5339 case 'x': /* section is executable */
5340 flags |= IMAGE_SCN_MEM_EXECUTE;
5341 break;
5342 case 's': /* section is sharable */
5343 flags |= IMAGE_SCN_MEM_SHARED;
5344 break;
5345
5346 /* Section Alignment */
5347 case '0': /* align to byte boundary */
5348 flags |= IMAGE_SCN_ALIGN_1BYTES;
5349 align = 0;
5350 break;
5351 case '1': /* align to halfword boundary */
5352 flags |= IMAGE_SCN_ALIGN_2BYTES;
5353 align = 1;
5354 break;
5355 case '2': /* align to word boundary */
5356 flags |= IMAGE_SCN_ALIGN_4BYTES;
5357 align = 2;
5358 break;
5359 case '3': /* align to doubleword boundary */
5360 flags |= IMAGE_SCN_ALIGN_8BYTES;
5361 align = 3;
5362 break;
5363 case '4': /* align to quadword boundary */
5364 flags |= IMAGE_SCN_ALIGN_16BYTES;
5365 align = 4;
5366 break;
5367 case '5': /* align to 32 byte boundary */
5368 flags |= IMAGE_SCN_ALIGN_32BYTES;
5369 align = 5;
5370 break;
5371 case '6': /* align to 64 byte boundary */
5372 flags |= IMAGE_SCN_ALIGN_64BYTES;
5373 align = 6;
5374 break;
8d452c78 5375#endif
252b5132 5376 default:
99a814a1
AM		 5377 as_bad (_("unknown section attribute '%c'"),
5378 *input_line_pointer);
252b5132
RH		 5379 break;
5380 }
5381 ++input_line_pointer;
5382 }
5383 if (*input_line_pointer == '"')
5384 ++input_line_pointer;
5385 }
5386 }
5387
5388 sec = subseg_new (name, (subsegT) exp);
5389
99a814a1 5390 ppc_set_current_section (sec);
252b5132
RH		 5391
5392 if (flags != SEC_NO_FLAGS)
5393 {
5394 if (! bfd_set_section_flags (stdoutput, sec, flags))
5395 as_bad (_("error setting flags for \"%s\": %s"),
5396 bfd_section_name (stdoutput, sec),
5397 bfd_errmsg (bfd_get_error ()));
5398 }
5399
99a814a1 5400 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5401}
5402
5403static void
98027b10 5404ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5405{
5406 char *name;
5407 char endc;
5408 symbolS *ext_sym;
5409
5410 name = input_line_pointer;
5411 endc = get_symbol_end ();
5412
5413 ext_sym = symbol_find_or_make (name);
5414
5415 *input_line_pointer = endc;
5416
5417 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5418 SF_SET_FUNCTION (ext_sym);
5419 SF_SET_PROCESS (ext_sym);
5420 coff_add_linesym (ext_sym);
5421
5422 demand_empty_rest_of_line ();
5423}
5424
5425static void
98027b10 5426ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5427{
5428 if (tocdata_section == 0)
5429 {
5430 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5431 /* FIXME: section flags won't work. */
252b5132
RH		 5432 bfd_set_section_flags (stdoutput, tocdata_section,
5433 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5434 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5435
5436 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5437 }
5438 else
5439 {
5440 rdata_section = subseg_new (".tocd", 0);
5441 }
5442
99a814a1 5443 ppc_set_current_section (tocdata_section);
252b5132
RH		 5444
5445 demand_empty_rest_of_line ();
5446}
5447
5448/* Don't adjust TOC relocs to use the section symbol. */
5449
5450int
98027b10 5451ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5452{
5453 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5454}
5455
5456#endif
5457\f
5458#ifdef OBJ_XCOFF
5459
5460/* XCOFF specific symbol and file handling. */
5461
5462/* Canonicalize the symbol name. We use the to force the suffix, if
5463 any, to use square brackets, and to be in upper case. */
5464
5465char *
98027b10 5466ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5467{
5468 char *s;
5469
5470 if (ppc_stab_symbol)
5471 return name;
5472
5473 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5474 ;
5475 if (*s != '\0')
5476 {
5477 char brac;
5478
5479 if (*s == '[')
5480 brac = ']';
5481 else
5482 {
5483 *s = '[';
5484 brac = '}';
5485 }
5486
5487 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5488 *s = TOUPPER (*s);
252b5132
RH		 5489
5490 if (*s == '\0' || s[1] != '\0')
5491 as_bad (_("bad symbol suffix"));
5492
5493 *s = ']';
5494 }
5495
5496 return name;
5497}
5498
5499/* Set the class of a symbol based on the suffix, if any. This is
5500 called whenever a new symbol is created. */
5501
5502void
98027b10 5503ppc_symbol_new_hook (symbolS *sym)
252b5132 5504{
809ffe0d 5505 struct ppc_tc_sy *tc;
252b5132
RH		 5506 const char *s;
5507
809ffe0d
ILT		 5508 tc = symbol_get_tc (sym);
5509 tc->next = NULL;
5510 tc->output = 0;
96d56e9f 5511 tc->symbol_class = -1;
809ffe0d
ILT		 5512 tc->real_name = NULL;
5513 tc->subseg = 0;
5514 tc->align = 0;
85645aed
TG		 5515 tc->u.size = NULL;
5516 tc->u.dw = NULL;
809ffe0d 5517 tc->within = NULL;
252b5132
RH		 5518
5519 if (ppc_stab_symbol)
5520 return;
5521
5522 s = strchr (S_GET_NAME (sym), '[');
5523 if (s == (const char *) NULL)
5524 {
5525 /* There is no suffix. */
5526 return;
5527 }
5528
5529 ++s;
5530
5531 switch (s[0])
5532 {
5533 case 'B':
5534 if (strcmp (s, "BS]") == 0)
96d56e9f 5535 tc->symbol_class = XMC_BS;
252b5132
RH		 5536 break;
5537 case 'D':
5538 if (strcmp (s, "DB]") == 0)
96d56e9f 5539 tc->symbol_class = XMC_DB;
252b5132 5540 else if (strcmp (s, "DS]") == 0)
96d56e9f 5541 tc->symbol_class = XMC_DS;
252b5132
RH		 5542 break;
5543 case 'G':
5544 if (strcmp (s, "GL]") == 0)
96d56e9f 5545 tc->symbol_class = XMC_GL;
252b5132
RH		 5546 break;
5547 case 'P':
5548 if (strcmp (s, "PR]") == 0)
96d56e9f 5549 tc->symbol_class = XMC_PR;
252b5132
RH		 5550 break;
5551 case 'R':
5552 if (strcmp (s, "RO]") == 0)
96d56e9f 5553 tc->symbol_class = XMC_RO;
252b5132 5554 else if (strcmp (s, "RW]") == 0)
96d56e9f 5555 tc->symbol_class = XMC_RW;
252b5132
RH		 5556 break;
5557 case 'S':
5558 if (strcmp (s, "SV]") == 0)
96d56e9f 5559 tc->symbol_class = XMC_SV;
252b5132
RH		 5560 break;
5561 case 'T':
5562 if (strcmp (s, "TC]") == 0)
96d56e9f 5563 tc->symbol_class = XMC_TC;
252b5132 5564 else if (strcmp (s, "TI]") == 0)
96d56e9f 5565 tc->symbol_class = XMC_TI;
252b5132 5566 else if (strcmp (s, "TB]") == 0)
96d56e9f 5567 tc->symbol_class = XMC_TB;
252b5132 5568 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5569 tc->symbol_class = XMC_TC0;
252b5132
RH		 5570 break;
5571 case 'U':
5572 if (strcmp (s, "UA]") == 0)
96d56e9f 5573 tc->symbol_class = XMC_UA;
252b5132 5574 else if (strcmp (s, "UC]") == 0)
96d56e9f 5575 tc->symbol_class = XMC_UC;
252b5132
RH		 5576 break;
5577 case 'X':
5578 if (strcmp (s, "XO]") == 0)
96d56e9f 5579 tc->symbol_class = XMC_XO;
252b5132
RH		 5580 break;
5581 }
5582
96d56e9f 5583 if (tc->symbol_class == -1)
d6ed37ed 5584 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5585}
5586
5587/* Set the class of a label based on where it is defined. This
5588 handles symbols without suffixes. Also, move the symbol so that it
5589 follows the csect symbol. */
5590
5591void
98027b10 5592ppc_frob_label (symbolS *sym)
252b5132
RH		 5593{
5594 if (ppc_current_csect != (symbolS *) NULL)
5595 {
96d56e9f
NC		 5596 if (symbol_get_tc (sym)->symbol_class == -1)
5597 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5598
5599 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5600 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5601 &symbol_rootP, &symbol_lastP);
5602 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5603 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5604 }
07a53e5c
RH		 5605
5606#ifdef OBJ_ELF
5607 dwarf2_emit_label (sym);
5608#endif
252b5132
RH		 5609}
5610
5611/* This variable is set by ppc_frob_symbol if any absolute symbols are
5612 seen. It tells ppc_adjust_symtab whether it needs to look through
5613 the symbols. */
5614
b34976b6 5615static bfd_boolean ppc_saw_abs;
252b5132
RH		 5616
5617/* Change the name of a symbol just before writing it out. Set the
5618 real name if the .rename pseudo-op was used. Otherwise, remove any
5619 class suffix. Return 1 if the symbol should not be included in the
5620 symbol table. */
5621
5622int
98027b10 5623ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5624{
5625 static symbolS *ppc_last_function;
5626 static symbolS *set_end;
5627
5628 /* Discard symbols that should not be included in the output symbol
5629 table. */
809ffe0d
ILT		 5630 if (! symbol_used_in_reloc_p (sym)
5631 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5632 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5633 && ! symbol_get_tc (sym)->output
252b5132
RH		 5634 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5635 return 1;
5636
a161fe53
AM		 5637 /* This one will disappear anyway. Don't make a csect sym for it. */
5638 if (sym == abs_section_sym)
5639 return 1;
5640
809ffe0d
ILT		 5641 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5642 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5643 else
5644 {
5645 const char *name;
5646 const char *s;
5647
5648 name = S_GET_NAME (sym);
5649 s = strchr (name, '[');
5650 if (s != (char *) NULL)
5651 {
5652 unsigned int len;
5653 char *snew;
5654
5655 len = s - name;
5656 snew = xmalloc (len + 1);
5657 memcpy (snew, name, len);
5658 snew[len] = '\0';
5659
5660 S_SET_NAME (sym, snew);
5661 }
5662 }
5663
5664 if (set_end != (symbolS *) NULL)
5665 {
5666 SA_SET_SYM_ENDNDX (set_end, sym);
5667 set_end = NULL;
5668 }
5669
5670 if (SF_GET_FUNCTION (sym))
5671 {
5672 if (ppc_last_function != (symbolS *) NULL)
5673 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5674 ppc_last_function = sym;
85645aed 5675 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5676 {
85645aed 5677 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5678 SA_SET_SYM_FSIZE (sym,
85645aed 5679 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5680 }
5681 }
5682 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5683 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5684 {
5685 if (ppc_last_function == (symbolS *) NULL)
5686 as_bad (_(".ef with no preceding .function"));
5687 else
5688 {
5689 set_end = ppc_last_function;
5690 ppc_last_function = NULL;
5691
5692 /* We don't have a C_EFCN symbol, but we need to force the
5693 COFF backend to believe that it has seen one. */
5694 coff_last_function = NULL;
5695 }
5696 }
5697
670ec21d 5698 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5699 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5700 && S_GET_STORAGE_CLASS (sym) != C_FILE
5701 && S_GET_STORAGE_CLASS (sym) != C_FCN
5702 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5703 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5704 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5705 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5706 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5707 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5708 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5709
5710 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5711 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5712 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5713 {
5714 int i;
5715 union internal_auxent *a;
5716
5717 /* Create a csect aux. */
5718 i = S_GET_NUMBER_AUXILIARY (sym);
5719 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5720 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5721 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5722 {
5723 /* This is the TOC table. */
5724 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5725 a->x_csect.x_scnlen.l = 0;
5726 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5727 }
809ffe0d 5728 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5729 {
5730 /* This is a csect symbol. x_scnlen is the size of the
5731 csect. */
809ffe0d 5732 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5733 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5734 S_GET_SEGMENT (sym))
5735 - S_GET_VALUE (sym));
5736 else
5737 {
6386f3a7 5738 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5739 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5740 - S_GET_VALUE (sym));
5741 }
809ffe0d 5742 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5743 }
5744 else if (S_GET_SEGMENT (sym) == bss_section)
5745 {
5746 /* This is a common symbol. */
809ffe0d
ILT		 5747 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5748 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5749 if (S_IS_EXTERNAL (sym))
96d56e9f 5750 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5751 else
96d56e9f 5752 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5753 }
5754 else if (S_GET_SEGMENT (sym) == absolute_section)
5755 {
5756 /* This is an absolute symbol. The csect will be created by
99a814a1 5757 ppc_adjust_symtab. */
b34976b6 5758 ppc_saw_abs = TRUE;
252b5132 5759 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5760 if (symbol_get_tc (sym)->symbol_class == -1)
5761 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5762 }
5763 else if (! S_IS_DEFINED (sym))
5764 {
5765 /* This is an external symbol. */
5766 a->x_csect.x_scnlen.l = 0;
5767 a->x_csect.x_smtyp = XTY_ER;
5768 }
96d56e9f 5769 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5770 {
5771 symbolS *next;
5772
5773 /* This is a TOC definition. x_scnlen is the size of the
5774 TOC entry. */
5775 next = symbol_next (sym);
96d56e9f 5776 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5777 next = symbol_next (next);
5778 if (next == (symbolS *) NULL
96d56e9f 5779 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5780 {
5781 if (ppc_after_toc_frag == (fragS *) NULL)
5782 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5783 data_section)
5784 - S_GET_VALUE (sym));
5785 else
5786 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5787 - S_GET_VALUE (sym));
5788 }
5789 else
5790 {
6386f3a7 5791 resolve_symbol_value (next);
252b5132
RH		 5792 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5793 - S_GET_VALUE (sym));
5794 }
5795 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5796 }
5797 else
5798 {
5799 symbolS *csect;
5800
5801 /* This is a normal symbol definition. x_scnlen is the
5802 symbol index of the containing csect. */
5803 if (S_GET_SEGMENT (sym) == text_section)
5804 csect = ppc_text_csects;
5805 else if (S_GET_SEGMENT (sym) == data_section)
5806 csect = ppc_data_csects;
5807 else
5808 abort ();
5809
5810 /* Skip the initial dummy symbol. */
809ffe0d 5811 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5812
5813 if (csect == (symbolS *) NULL)
5814 {
5815 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5816 a->x_csect.x_scnlen.l = 0;
5817 }
5818 else
5819 {
809ffe0d 5820 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5821 {
6386f3a7 5822 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5823 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5824 > S_GET_VALUE (sym))
252b5132 5825 break;
809ffe0d 5826 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5827 }
5828
809ffe0d
ILT		 5829 a->x_csect.x_scnlen.p =
5830 coffsymbol (symbol_get_bfdsym (csect))->native;
5831 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5832 1;
252b5132
RH		 5833 }
5834 a->x_csect.x_smtyp = XTY_LD;
5835 }
81d4177b 5836
252b5132
RH		 5837 a->x_csect.x_parmhash = 0;
5838 a->x_csect.x_snhash = 0;
96d56e9f 5839 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5840 a->x_csect.x_smclas = XMC_PR;
5841 else
96d56e9f 5842 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5843 a->x_csect.x_stab = 0;
5844 a->x_csect.x_snstab = 0;
5845
5846 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5847 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5848 }
5849 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5850 {
5851 /* We want the value to be the symbol index of the referenced
5852 csect symbol. BFD will do that for us if we set the right
5853 flags. */
b782de16
AM		 5854 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5855 combined_entry_type *c = coffsymbol (bsym)->native;
5856
5857 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5858 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5859 }
5860 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5861 {
5862 symbolS *block;
c734e7e3 5863 valueT base;
252b5132 5864
809ffe0d 5865 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5866 if (block)
5867 {
5868 /* The value is the offset from the enclosing csect. */
5869 symbolS *csect;
5870
5871 csect = symbol_get_tc (block)->within;
5872 resolve_symbol_value (csect);
5873 base = S_GET_VALUE (csect);
5874 }
5875 else
5876 base = 0;
5877
5878 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5879 }
5880 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5881 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5882 {
5883 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5884 BFD will do that for us if we set the right flags. We have
5885 already set the value correctly. */
809ffe0d 5886 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5887 }
5888
5889 return 0;
5890}
5891
5892/* Adjust the symbol table. This creates csect symbols for all
5893 absolute symbols. */
5894
5895void
98027b10 5896ppc_adjust_symtab (void)
252b5132
RH		 5897{
5898 symbolS *sym;
5899
5900 if (! ppc_saw_abs)
5901 return;
5902
5903 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5904 {
5905 symbolS *csect;
5906 int i;
5907 union internal_auxent *a;
5908
5909 if (S_GET_SEGMENT (sym) != absolute_section)
5910 continue;
5911
5912 csect = symbol_create (".abs[XO]", absolute_section,
5913 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5914 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5915 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5916 i = S_GET_NUMBER_AUXILIARY (csect);
5917 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5918 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5919 a->x_csect.x_scnlen.l = 0;
5920 a->x_csect.x_smtyp = XTY_SD;
5921 a->x_csect.x_parmhash = 0;
5922 a->x_csect.x_snhash = 0;
5923 a->x_csect.x_smclas = XMC_XO;
5924 a->x_csect.x_stab = 0;
5925 a->x_csect.x_snstab = 0;
5926
5927 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5928
5929 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5930 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5931 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5932 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5933 }
5934
b34976b6 5935 ppc_saw_abs = FALSE;
252b5132
RH		 5936}
5937
5938/* Set the VMA for a section. This is called on all the sections in
5939 turn. */
5940
5941void
98027b10 5942ppc_frob_section (asection *sec)
252b5132 5943{
931e13a6 5944 static bfd_vma vma = 0;
252b5132 5945
85645aed
TG		 5946 /* Dwarf sections start at 0. */
5947 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5948 return;
5949
931e13a6 5950 vma = md_section_align (sec, vma);
252b5132
RH		 5951 bfd_set_section_vma (stdoutput, sec, vma);
5952 vma += bfd_section_size (stdoutput, sec);
5953}
5954
5955#endif /* OBJ_XCOFF */
5956\f
252b5132 5957char *
98027b10 5958md_atof (int type, char *litp, int *sizep)
252b5132 5959{
499ac353 5960 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5961}
5962
5963/* Write a value out to the object file, using the appropriate
5964 endianness. */
5965
5966void
98027b10 5967md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5968{
5969 if (target_big_endian)
5970 number_to_chars_bigendian (buf, val, n);
5971 else
5972 number_to_chars_littleendian (buf, val, n);
5973}
5974
5975/* Align a section (I don't know why this is machine dependent). */
5976
5977valueT
3aeeedbb 5978md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5979{
3aeeedbb
AM		 5980#ifdef OBJ_ELF
5981 return addr;
5982#else
252b5132
RH		 5983 int align = bfd_get_section_alignment (stdoutput, seg);
5984
5985 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5986#endif
252b5132
RH		 5987}
5988
5989/* We don't have any form of relaxing. */
5990
5991int
98027b10
AM		 5992md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5993 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5994{
5995 abort ();
5996 return 0;
5997}
5998
5999/* Convert a machine dependent frag. We never generate these. */
6000
6001void
98027b10
AM		 6002md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6003 asection *sec ATTRIBUTE_UNUSED,
6004 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6005{
6006 abort ();
6007}
6008
6009/* We have no need to default values of symbols. */
6010
252b5132 6011symbolS *
98027b10 6012md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6013{
6014 return 0;
6015}
6016\f
6017/* Functions concerning relocs. */
6018
6019/* The location from which a PC relative jump should be calculated,
6020 given a PC relative reloc. */
6021
6022long
98027b10 6023md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6024{
6025 return fixp->fx_frag->fr_address + fixp->fx_where;
6026}
6027
6028#ifdef OBJ_XCOFF
6029
6030/* This is called to see whether a fixup should be adjusted to use a
6031 section symbol. We take the opportunity to change a fixup against
6032 a symbol in the TOC subsegment into a reloc against the
6033 corresponding .tc symbol. */
6034
6035int
98027b10 6036ppc_fix_adjustable (fixS *fix)
252b5132 6037{
b782de16
AM		 6038 valueT val = resolve_symbol_value (fix->fx_addsy);
6039 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6040 TC_SYMFIELD_TYPE *tc;
6041
6042 if (symseg == absolute_section)
6043 return 0;
252b5132 6044
85645aed
TG		 6045 /* Always adjust symbols in debugging sections. */
6046 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6047 return 1;
6048
252b5132 6049 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6050 && fix->fx_addsy != ppc_toc_csect
b782de16 6051 && symseg == data_section
252b5132
RH		 6052 && val >= ppc_toc_frag->fr_address
6053 && (ppc_after_toc_frag == (fragS *) NULL
6054 || val < ppc_after_toc_frag->fr_address))
6055 {
6056 symbolS *sy;
6057
6058 for (sy = symbol_next (ppc_toc_csect);
6059 sy != (symbolS *) NULL;
6060 sy = symbol_next (sy))
6061 {
b782de16
AM		 6062 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6063
96d56e9f 6064 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6065 continue;
96d56e9f 6066 if (sy_tc->symbol_class != XMC_TC)
252b5132 6067 break;
b782de16 6068 if (val == resolve_symbol_value (sy))
252b5132
RH		 6069 {
6070 fix->fx_addsy = sy;
6071 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6072 return 0;
6073 }
6074 }
6075
6076 as_bad_where (fix->fx_file, fix->fx_line,
6077 _("symbol in .toc does not match any .tc"));
6078 }
6079
6080 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6081 tc = symbol_get_tc (fix->fx_addsy);
6082 if (tc->subseg == 0
96d56e9f
NC		 6083 && tc->symbol_class != XMC_TC0
6084 && tc->symbol_class != XMC_TC
b782de16 6085 && symseg != bss_section
252b5132 6086 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6087 && (symseg != data_section
252b5132
RH		 6088 || ppc_toc_csect == NULL
6089 || val < ppc_toc_frag->fr_address
6090 || (ppc_after_toc_frag != NULL
6091 && val >= ppc_after_toc_frag->fr_address)))
6092 {
2fb4b302 6093 symbolS *csect = tc->within;
252b5132 6094
2fb4b302
TG		 6095 /* If the symbol was not declared by a label (eg: a section symbol),
6096 use the section instead of the csect. This doesn't happen in
6097 normal AIX assembly code. */
6098 if (csect == NULL)
6099 csect = seg_info (symseg)->sym;
252b5132 6100
2fb4b302
TG		 6101 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6102 fix->fx_addsy = csect;
252b5132 6103
b782de16 6104 return 0;
252b5132
RH		 6105 }
6106
6107 /* Adjust a reloc against a .lcomm symbol to be against the base
6108 .lcomm. */
b782de16 6109 if (symseg == bss_section
252b5132
RH		 6110 && ! S_IS_EXTERNAL (fix->fx_addsy))
6111 {
b782de16
AM		 6112 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6113
6114 fix->fx_offset += val - resolve_symbol_value (sy);
6115 fix->fx_addsy = sy;
252b5132
RH		 6116 }
6117
6118 return 0;
6119}
6120
6121/* A reloc from one csect to another must be kept. The assembler
6122 will, of course, keep relocs between sections, and it will keep
6123 absolute relocs, but we need to force it to keep PC relative relocs
6124 between two csects in the same section. */
6125
6126int
98027b10 6127ppc_force_relocation (fixS *fix)
252b5132
RH		 6128{
6129 /* At this point fix->fx_addsy should already have been converted to
6130 a csect symbol. If the csect does not include the fragment, then
6131 we need to force the relocation. */
6132 if (fix->fx_pcrel
6133 && fix->fx_addsy != NULL
809ffe0d
ILT		 6134 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6135 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6136 > fix->fx_frag->fr_address)
6137 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6138 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6139 <= fix->fx_frag->fr_address))))
6140 return 1;
6141
ae6063d4 6142 return generic_force_reloc (fix);
252b5132
RH		 6143}
6144
2fb4b302
TG		 6145void
6146ppc_new_dot_label (symbolS *sym)
6147{
6148 /* Anchor this label to the current csect for relocations. */
6149 symbol_get_tc (sym)->within = ppc_current_csect;
6150}
6151
252b5132
RH		 6152#endif /* OBJ_XCOFF */
6153
0baf16f2 6154#ifdef OBJ_ELF
a161fe53
AM		 6155/* If this function returns non-zero, it guarantees that a relocation
6156 will be emitted for a fixup. */
6157
6158int
98027b10 6159ppc_force_relocation (fixS *fix)
a161fe53
AM		 6160{
6161 /* Branch prediction relocations must force a relocation, as must
6162 the vtable description relocs. */
6163 switch (fix->fx_r_type)
6164 {
6165 case BFD_RELOC_PPC_B16_BRTAKEN:
6166 case BFD_RELOC_PPC_B16_BRNTAKEN:
6167 case BFD_RELOC_PPC_BA16_BRTAKEN:
6168 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6169 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6170 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 6171 return 1;
6172 default:
6173 break;
6174 }
6175
cdba85ec
AM		 6176 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6177 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6178 return 1;
6179
ae6063d4 6180 return generic_force_reloc (fix);
a161fe53
AM		 6181}
6182
0baf16f2 6183int
98027b10 6184ppc_fix_adjustable (fixS *fix)
252b5132 6185{
0baf16f2
AM		 6186 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6187 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6188 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6189 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6190 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6191 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6192 && fix->fx_r_type != BFD_RELOC_GPREL16
6193 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6194 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6195 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6196 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6197}
0baf16f2 6198#endif
252b5132 6199
b9c361e0
JL		 6200void
6201ppc_frag_check (struct frag *fragP)
6202{
6203 if (!fragP->has_code)
6204 return;
6205
6206 if (ppc_mach() == bfd_mach_ppc_vle)
6207 {
6208 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6209 as_bad (_("instruction address is not a multiple of 2"));
6210 }
6211 else
6212 {
6213 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6214 as_bad (_("instruction address is not a multiple of 4"));
6215 }
6216}
6217
3aeeedbb
AM		 6218/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6219 rs_align_code frag. */
6220
6221void
6222ppc_handle_align (struct frag *fragP)
6223{
6224 valueT count = (fragP->fr_next->fr_address
6225 - (fragP->fr_address + fragP->fr_fix));
6226
b9c361e0
JL		 6227 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6228 {
6229 char *dest = fragP->fr_literal + fragP->fr_fix;
6230
6231 fragP->fr_var = 2;
6232 md_number_to_chars (dest, 0x4400, 2);
6233 }
6234 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6235 {
6236 char *dest = fragP->fr_literal + fragP->fr_fix;
6237
6238 fragP->fr_var = 4;
cef4f754
AM		 6239
6240 if (count > 4 * nop_limit && count < 0x2000000)
6241 {
6242 struct frag *rest;
6243
6244 /* Make a branch, then follow with nops. Insert another
6245 frag to handle the nops. */
6246 md_number_to_chars (dest, 0x48000000 + count, 4);
6247 count -= 4;
6248 if (count == 0)
6249 return;
6250
6251 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6252 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6253 fragP->fr_next = rest;
6254 fragP = rest;
6255 rest->fr_address += rest->fr_fix + 4;
6256 rest->fr_fix = 0;
6257 /* If we leave the next frag as rs_align_code we'll come here
6258 again, resulting in a bunch of branches rather than a
6259 branch followed by nops. */
6260 rest->fr_type = rs_align;
6261 dest = rest->fr_literal;
6262 }
6263
3aeeedbb
AM		 6264 md_number_to_chars (dest, 0x60000000, 4);
6265
42240548
PB		 6266 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6267 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 6268 {
42240548
PB		 6269 /* For power6 and power7, we want the last nop to be a group
6270 terminating one. Do this by inserting an rs_fill frag immediately
6271 after this one, with its address set to the last nop location.
6272 This will automatically reduce the number of nops in the current
6273 frag by one. */
3aeeedbb
AM		 6274 if (count > 4)
6275 {
6276 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6277
6278 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6279 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6280 group_nop->fr_fix = 0;
6281 group_nop->fr_offset = 1;
6282 group_nop->fr_type = rs_fill;
6283 fragP->fr_next = group_nop;
6284 dest = group_nop->fr_literal;
6285 }
6286
42240548 6287 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
aea77599
AM		 6288 {
6289 if (ppc_cpu & PPC_OPCODE_E500MC)
6290 /* e500mc group terminating nop: "ori 0,0,0". */
6291 md_number_to_chars (dest, 0x60000000, 4);
6292 else
6293 /* power7 group terminating nop: "ori 2,2,0". */
6294 md_number_to_chars (dest, 0x60420000, 4);
6295 }
42240548
PB		 6296 else
6297 /* power6 group terminating nop: "ori 1,1,0". */
6298 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6299 }
6300 }
6301}
6302
252b5132 6303/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6304 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6305
94f592af 6306void
98027b10 6307md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6308{
94f592af 6309 valueT value = * valP;
252b5132
RH		 6310
6311#ifdef OBJ_ELF
94f592af 6312 if (fixP->fx_addsy != NULL)
252b5132 6313 {
a161fe53 6314 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6315 if (fixP->fx_pcrel)
6316 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6317 }
6318 else
94f592af 6319 fixP->fx_done = 1;
252b5132 6320#else
a161fe53 6321 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6322 the symbol values. If we are doing this relocation the code in
6323 write.c is going to call bfd_install_relocation, which is also
6324 going to use the symbol value. That means that if the reloc is
6325 fully resolved we want to use *valP since bfd_install_relocation is
6326 not being used.
9f0eb232
RS		 6327 However, if the reloc is not fully resolved we do not want to
6328 use *valP, and must use fx_offset instead. If the relocation
6329 is PC-relative, we then need to re-apply md_pcrel_from_section
6330 to this new relocation value. */
94f592af
NC		 6331 if (fixP->fx_addsy == (symbolS *) NULL)
6332 fixP->fx_done = 1;
6333
252b5132 6334 else
9f0eb232
RS		 6335 {
6336 value = fixP->fx_offset;
6337 if (fixP->fx_pcrel)
6338 value -= md_pcrel_from_section (fixP, seg);
6339 }
a161fe53
AM		 6340#endif
6341
6342 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6343 {
a161fe53
AM		 6344 /* We can't actually support subtracting a symbol. */
6345 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6346 }
252b5132 6347
3b8b57a9 6348 if (fixP->fx_pcrel_adjust != 0)
252b5132 6349 {
3b8b57a9
AM		 6350 /* Handle relocs in an insn. */
6351
6352 int opindex = fixP->fx_pcrel_adjust & 0xff;
6353 const struct powerpc_operand *operand = &powerpc_operands[opindex];
252b5132
RH		 6354 char *where;
6355 unsigned long insn;
3b8b57a9 6356 offsetT fieldval;
252b5132
RH		 6357
6358#ifdef OBJ_XCOFF
0baf16f2
AM		 6359 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6360 does not generate a reloc. It uses the offset of `sym' within its
6361 csect. Other usages, such as `.long sym', generate relocs. This
6362 is the documented behaviour of non-TOC symbols. */
252b5132 6363 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6364 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6365 && operand->shift == 0
2b3c4602 6366 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6367 && fixP->fx_addsy != NULL
6368 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6369 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6370 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6371 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6372 {
94f592af
NC		 6373 value = fixP->fx_offset;
6374 fixP->fx_done = 1;
252b5132
RH		 6375 }
6376#endif
3b8b57a9 6377 fieldval = value;
94f592af 6378 switch (fixP->fx_r_type)
252b5132 6379 {
1ec2d25e 6380#ifdef OBJ_ELF
3b8b57a9 6381 case BFD_RELOC_PPC64_ADDR16_LO_DS:
3c9d25f4 6382 if (fixP->fx_pcrel)
3b8b57a9 6383 goto bad_pcrel;
3c9d25f4 6384 /* fall through */
1ec2d25e 6385#endif
3c9d25f4
AM		 6386 case BFD_RELOC_LO16:
6387 if (fixP->fx_pcrel)
6388 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6389 /* fall through */
3c9d25f4 6390 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6391 fieldval = SEX16 (value);
3c9d25f4
AM		 6392 break;
6393
252b5132 6394 case BFD_RELOC_HI16:
94f592af 6395 if (fixP->fx_pcrel)
3c9d25f4
AM		 6396 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6397 /* fall through */
3c9d25f4 6398 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6399 fieldval = SEX16 (PPC_HI (value));
252b5132 6400 break;
0baf16f2 6401
252b5132 6402 case BFD_RELOC_HI16_S:
94f592af 6403 if (fixP->fx_pcrel)
3c9d25f4
AM		 6404 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6405 /* fall through */
3c9d25f4 6406 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6407 fieldval = SEX16 (PPC_HA (value));
0baf16f2
AM		 6408 break;
6409
3b8b57a9
AM		 6410#ifdef OBJ_ELF
6411 case BFD_RELOC_PPC64_HIGHER:
6412 if (fixP->fx_pcrel)
6413 goto bad_pcrel;
6414 fieldval = SEX16 (PPC_HIGHER (value));
252b5132
RH		 6415 break;
6416
0baf16f2 6417 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6418 if (fixP->fx_pcrel)
3b8b57a9
AM		 6419 goto bad_pcrel;
6420 fieldval = SEX16 (PPC_HIGHERA (value));
0baf16f2
AM		 6421 break;
6422
6423 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6424 if (fixP->fx_pcrel)
3b8b57a9
AM		 6425 goto bad_pcrel;
6426 fieldval = SEX16 (PPC_HIGHEST (value));
0baf16f2
AM		 6427 break;
6428
6429 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6430 if (fixP->fx_pcrel)
3b8b57a9
AM		 6431 goto bad_pcrel;
6432 fieldval = SEX16 (PPC_HIGHESTA (value));
0baf16f2
AM		 6433 break;
6434
3b8b57a9
AM		 6435 /* The following relocs can't be calculated by the assembler.
6436 Leave the field zero. */
cdba85ec
AM		 6437 case BFD_RELOC_PPC_TPREL16:
6438 case BFD_RELOC_PPC_TPREL16_LO:
6439 case BFD_RELOC_PPC_TPREL16_HI:
6440 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6441 case BFD_RELOC_PPC_DTPREL16:
6442 case BFD_RELOC_PPC_DTPREL16_LO:
6443 case BFD_RELOC_PPC_DTPREL16_HI:
6444 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6445 case BFD_RELOC_PPC_GOT_TLSGD16:
6446 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6447 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6448 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6449 case BFD_RELOC_PPC_GOT_TLSLD16:
6450 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6451 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6452 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6453 case BFD_RELOC_PPC_GOT_TPREL16:
6454 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6455 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6456 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6457 case BFD_RELOC_PPC_GOT_DTPREL16:
6458 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6459 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6460 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6461 case BFD_RELOC_PPC64_TPREL16_DS:
6462 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6463 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6464 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6465 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6466 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6467 case BFD_RELOC_PPC64_DTPREL16_DS:
6468 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6469 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6470 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6471 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6472 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6473 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6474 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9
AM		 6475 fieldval = 0;
6476 if (fixP->fx_pcrel)
6477 goto bad_pcrel;
cdba85ec 6478 break;
3b8b57a9
AM		 6479
6480 /* These also should leave the field zero for the same
6481 reason. Note that older versions of gas wrote values
6482 here. If we want to go back to the old behaviour, then
6483 all _LO and _LO_DS cases will need to be treated like
6484 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6485 case BFD_RELOC_16_GOTOFF:
6486 case BFD_RELOC_LO16_GOTOFF:
6487 case BFD_RELOC_HI16_GOTOFF:
6488 case BFD_RELOC_HI16_S_GOTOFF:
6489 case BFD_RELOC_LO16_PLTOFF:
6490 case BFD_RELOC_HI16_PLTOFF:
6491 case BFD_RELOC_HI16_S_PLTOFF:
6492 case BFD_RELOC_GPREL16:
6493 case BFD_RELOC_16_BASEREL:
6494 case BFD_RELOC_LO16_BASEREL:
6495 case BFD_RELOC_HI16_BASEREL:
6496 case BFD_RELOC_HI16_S_BASEREL:
6497 case BFD_RELOC_PPC_TOC16:
6498 case BFD_RELOC_PPC64_TOC16_LO:
6499 case BFD_RELOC_PPC64_TOC16_HI:
6500 case BFD_RELOC_PPC64_TOC16_HA:
6501 case BFD_RELOC_PPC64_PLTGOT16:
6502 case BFD_RELOC_PPC64_PLTGOT16_LO:
6503 case BFD_RELOC_PPC64_PLTGOT16_HI:
6504 case BFD_RELOC_PPC64_PLTGOT16_HA:
6505 case BFD_RELOC_PPC64_GOT16_DS:
6506 case BFD_RELOC_PPC64_GOT16_LO_DS:
6507 case BFD_RELOC_PPC64_PLT16_LO_DS:
6508 case BFD_RELOC_PPC64_SECTOFF_DS:
6509 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6510 case BFD_RELOC_PPC64_TOC16_DS:
6511 case BFD_RELOC_PPC64_TOC16_LO_DS:
6512 case BFD_RELOC_PPC64_PLTGOT16_DS:
6513 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6514 case BFD_RELOC_PPC_EMB_NADDR16:
6515 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6516 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6517 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6518 case BFD_RELOC_PPC_EMB_SDAI16:
6519 case BFD_RELOC_PPC_EMB_SDA2I16:
6520 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6521 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6522 case BFD_RELOC_PPC_EMB_MRKREF:
6523 case BFD_RELOC_PPC_EMB_RELSEC16:
6524 case BFD_RELOC_PPC_EMB_RELST_LO:
6525 case BFD_RELOC_PPC_EMB_RELST_HI:
6526 case BFD_RELOC_PPC_EMB_RELST_HA:
6527 case BFD_RELOC_PPC_EMB_BIT_FLD:
6528 case BFD_RELOC_PPC_EMB_RELSDA:
6529 case BFD_RELOC_PPC_VLE_SDA21:
6530 case BFD_RELOC_PPC_VLE_SDA21_LO:
6531 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6532 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6533 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6534 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6535 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6536 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6537 gas_assert (fixP->fx_addsy != NULL);
6538 /* Fall thru */
6539
6540 case BFD_RELOC_PPC_TLS:
6541 case BFD_RELOC_PPC_TLSGD:
6542 case BFD_RELOC_PPC_TLSLD:
6543 fieldval = 0;
94f592af 6544 if (fixP->fx_pcrel)
3b8b57a9
AM		 6545 goto bad_pcrel;
6546 break;
6547#endif
252b5132 6548
3b8b57a9 6549 default:
252b5132 6550 break;
3b8b57a9 6551 }
252b5132 6552
3b8b57a9
AM		 6553#ifdef OBJ_ELF
6554/* powerpc uses RELA style relocs, so if emitting a reloc the field
6555 contents can stay at zero. */
6556#define APPLY_RELOC fixP->fx_done
6557#else
6558#define APPLY_RELOC 1
6559#endif
6560 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6561 {
6562 /* Fetch the instruction, insert the fully resolved operand
6563 value, and stuff the instruction back again. */
6564 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6565 if (target_big_endian)
31a91399 6566 {
3b8b57a9
AM		 6567 if (fixP->fx_size == 4)
6568 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6569 else
3b8b57a9 6570 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6571 }
6572 else
3b8b57a9
AM		 6573 {
6574 if (fixP->fx_size == 4)
6575 insn = bfd_getl32 ((unsigned char *) where);
6576 else
6577 insn = bfd_getl16 ((unsigned char *) where);
6578 }
6579 insn = ppc_insert_operand (insn, operand, fieldval,
6580 fixP->tc_fix_data.ppc_cpu,
6581 fixP->fx_file, fixP->fx_line);
6582 if (target_big_endian)
6583 {
6584 if (fixP->fx_size == 4)
6585 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6586 else
6587 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6588 }
6589 else
6590 {
6591 if (fixP->fx_size == 4)
6592 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6593 else
6594 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6595 }
6596 }
6597
6598 if (fixP->fx_done)
6599 /* Nothing else to do here. */
6600 return;
6601
6602 gas_assert (fixP->fx_addsy != NULL);
6603 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6604 {
6605 char *sfile;
6606 unsigned int sline;
6607
6608 /* Use expr_symbol_where to see if this is an expression
6609 symbol. */
6610 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6611 as_bad_where (fixP->fx_file, fixP->fx_line,
6612 _("unresolved expression that must be resolved"));
6613 else
6614 as_bad_where (fixP->fx_file, fixP->fx_line,
6615 _("unsupported relocation against %s"),
6616 S_GET_NAME (fixP->fx_addsy));
6617 fixP->fx_done = 1;
6618 return;
6619 }
6620 }
6621 else
6622 {
6623 /* Handle relocs in data. */
6624 switch (fixP->fx_r_type)
6625 {
6626 case BFD_RELOC_CTOR:
6627 if (ppc_obj64)
6628 goto ctor64;
6629 /* fall through */
6630
6631 case BFD_RELOC_32:
6632 if (fixP->fx_pcrel)
6633 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6634 /* fall through */
6635
6636 case BFD_RELOC_32_PCREL:
6637 case BFD_RELOC_RVA:
6638 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6639 value, 4);
252b5132
RH		 6640 break;
6641
3b8b57a9
AM		 6642 case BFD_RELOC_64:
6643 ctor64:
6644 if (fixP->fx_pcrel)
6645 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6646 /* fall through */
252b5132 6647
3b8b57a9
AM		 6648 case BFD_RELOC_64_PCREL:
6649 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6650 value, 8);
6651 break;
99a814a1 6652
3b8b57a9
AM		 6653 case BFD_RELOC_16:
6654 if (fixP->fx_pcrel)
6655 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6656 /* fall through */
6657
6658 case BFD_RELOC_16_PCREL:
6659 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6660 value, 2);
6661 break;
6662
6663 case BFD_RELOC_8:
6664 if (fixP->fx_pcrel)
6665 {
6666#ifdef OBJ_ELF
6667 bad_pcrel:
6668#endif
6669 if (fixP->fx_addsy)
8fbf7334 6670 {
3b8b57a9
AM		 6671 char *sfile;
6672 unsigned int sline;
6673
6674 /* Use expr_symbol_where to see if this is an
6675 expression symbol. */
6676 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
8fbf7334 6677 as_bad_where (fixP->fx_file, fixP->fx_line,
3b8b57a9
AM		 6678 _("unresolved expression that must"
6679 " be resolved"));
6680 else
8fbf7334 6681 as_bad_where (fixP->fx_file, fixP->fx_line,
3b8b57a9
AM		 6682 _("cannot emit PC relative %s relocation"
6683 " against %s"),
6684 bfd_get_reloc_code_name (fixP->fx_r_type),
6685 S_GET_NAME (fixP->fx_addsy));
8fbf7334 6686 }
99a814a1 6687 else
3b8b57a9
AM		 6688 as_bad_where (fixP->fx_file, fixP->fx_line,
6689 _("unable to resolve expression"));
6690 fixP->fx_done = 1;
99a814a1 6691 }
3b8b57a9
AM		 6692 else
6693 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6694 value, 1);
252b5132
RH		 6695 break;
6696
6697 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6698 if (fixP->fx_addsy
6699 && !S_IS_DEFINED (fixP->fx_addsy)
6700 && !S_IS_WEAK (fixP->fx_addsy))
6701 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6702 /* Fall thru */
252b5132
RH		 6703
6704 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6705 fixP->fx_done = 0;
252b5132
RH		 6706 break;
6707
0baf16f2 6708#ifdef OBJ_ELF
3b8b57a9
AM		 6709 /* These can appear with @l etc. in data. */
6710 case BFD_RELOC_LO16:
6711 if (fixP->fx_pcrel)
6712 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6713 case BFD_RELOC_LO16_PCREL:
6714 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6715 value, 2);
6716 break;
6717
6718 case BFD_RELOC_HI16:
6719 if (fixP->fx_pcrel)
6720 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6721 case BFD_RELOC_HI16_PCREL:
6722 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6723 PPC_HI (value), 2);
6724 break;
6725
6726 case BFD_RELOC_HI16_S:
6727 if (fixP->fx_pcrel)
6728 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6729 case BFD_RELOC_HI16_S_PCREL:
6730 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6731 PPC_HA (value), 2);
6732 break;
6733
6734 case BFD_RELOC_PPC64_HIGHER:
6735 if (fixP->fx_pcrel)
6736 goto bad_pcrel;
6737 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6738 PPC_HIGHER (value), 2);
6739 break;
6740
6741 case BFD_RELOC_PPC64_HIGHER_S:
6742 if (fixP->fx_pcrel)
6743 goto bad_pcrel;
6744 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6745 PPC_HIGHERA (value), 2);
6746 break;
6747
6748 case BFD_RELOC_PPC64_HIGHEST:
6749 if (fixP->fx_pcrel)
6750 goto bad_pcrel;
6751 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6752 PPC_HIGHEST (value), 2);
6753 break;
6754
6755 case BFD_RELOC_PPC64_HIGHEST_S:
6756 if (fixP->fx_pcrel)
6757 goto bad_pcrel;
6758 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6759 PPC_HIGHESTA (value), 2);
6760 break;
6761
6762 case BFD_RELOC_PPC_DTPMOD:
6763 case BFD_RELOC_PPC_TPREL:
6764 case BFD_RELOC_PPC_DTPREL:
6765 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6766 break;
6767
6768 /* Just punt all of these to the linker. */
6769 case BFD_RELOC_PPC_B16_BRTAKEN:
6770 case BFD_RELOC_PPC_B16_BRNTAKEN:
6771 case BFD_RELOC_16_GOTOFF:
6772 case BFD_RELOC_LO16_GOTOFF:
6773 case BFD_RELOC_HI16_GOTOFF:
6774 case BFD_RELOC_HI16_S_GOTOFF:
6775 case BFD_RELOC_LO16_PLTOFF:
6776 case BFD_RELOC_HI16_PLTOFF:
6777 case BFD_RELOC_HI16_S_PLTOFF:
6778 case BFD_RELOC_PPC_COPY:
6779 case BFD_RELOC_PPC_GLOB_DAT:
6780 case BFD_RELOC_16_BASEREL:
6781 case BFD_RELOC_LO16_BASEREL:
6782 case BFD_RELOC_HI16_BASEREL:
6783 case BFD_RELOC_HI16_S_BASEREL:
6784 case BFD_RELOC_PPC_TLS:
6785 case BFD_RELOC_PPC_DTPREL16_LO:
6786 case BFD_RELOC_PPC_DTPREL16_HI:
6787 case BFD_RELOC_PPC_DTPREL16_HA:
6788 case BFD_RELOC_PPC_TPREL16_LO:
6789 case BFD_RELOC_PPC_TPREL16_HI:
6790 case BFD_RELOC_PPC_TPREL16_HA:
6791 case BFD_RELOC_PPC_GOT_TLSGD16:
6792 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6793 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6794 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6795 case BFD_RELOC_PPC_GOT_TLSLD16:
6796 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6797 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6798 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6799 case BFD_RELOC_PPC_GOT_DTPREL16:
6800 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6801 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6802 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6803 case BFD_RELOC_PPC_GOT_TPREL16:
6804 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6805 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6806 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6807 case BFD_RELOC_24_PLT_PCREL:
6808 case BFD_RELOC_PPC_LOCAL24PC:
6809 case BFD_RELOC_32_PLT_PCREL:
6810 case BFD_RELOC_GPREL16:
6811 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6812 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6813 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6814 case BFD_RELOC_PPC_EMB_NADDR32:
6815 case BFD_RELOC_PPC_EMB_NADDR16:
6816 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6817 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6818 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6819 case BFD_RELOC_PPC_EMB_SDAI16:
6820 case BFD_RELOC_PPC_EMB_SDA2REL:
6821 case BFD_RELOC_PPC_EMB_SDA2I16:
6822 case BFD_RELOC_PPC_EMB_SDA21:
6823 case BFD_RELOC_PPC_VLE_SDA21_LO:
6824 case BFD_RELOC_PPC_EMB_MRKREF:
6825 case BFD_RELOC_PPC_EMB_RELSEC16:
6826 case BFD_RELOC_PPC_EMB_RELST_LO:
6827 case BFD_RELOC_PPC_EMB_RELST_HI:
6828 case BFD_RELOC_PPC_EMB_RELST_HA:
6829 case BFD_RELOC_PPC_EMB_BIT_FLD:
6830 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6831 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6832 case BFD_RELOC_PPC_TOC16:
6833 case BFD_RELOC_PPC64_TOC16_LO:
6834 case BFD_RELOC_PPC64_TOC16_HI:
6835 case BFD_RELOC_PPC64_TOC16_HA:
6836 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6837 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6838 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6839 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6840 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6841 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6842 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6843 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6844 fixP->fx_done = 0;
0baf16f2 6845 break;
0baf16f2 6846#endif
3b8b57a9
AM		 6847
6848#ifdef OBJ_XCOFF
6849 case BFD_RELOC_NONE:
6850 break;
6851#endif
6852
252b5132 6853 default:
bc805888 6854 fprintf (stderr,
94f592af 6855 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6856 fflush (stderr);
252b5132
RH		 6857 abort ();
6858 }
6859 }
6860
6861#ifdef OBJ_ELF
3b8b57a9 6862 ppc_elf_validate_fix (fixP, seg);
94f592af 6863 fixP->fx_addnumber = value;
4e6935a6
AM		 6864
6865 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6866 from the section contents. If we are going to be emitting a reloc
6867 then the section contents are immaterial, so don't warn if they
6868 happen to overflow. Leave such warnings to ld. */
6869 if (!fixP->fx_done)
a38a07e0
AM		 6870 {
6871 fixP->fx_no_overflow = 1;
6872
6873 /* Arrange to emit .TOC. as a normal symbol if used in anything
6874 but .TOC.@tocbase. */
6875 if (ppc_obj64
6876 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6877 && fixP->fx_addsy != NULL
6878 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6879 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6880 }
252b5132 6881#else
94f592af
NC		 6882 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6883 fixP->fx_addnumber = 0;
252b5132
RH		 6884 else
6885 {
6886#ifdef TE_PE
94f592af 6887 fixP->fx_addnumber = 0;
252b5132 6888#else
8edcbfcd
TG		 6889 /* We want to use the offset within the toc, not the actual VMA
6890 of the symbol. */
94f592af 6891 fixP->fx_addnumber =
8edcbfcd
TG		 6892 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6893 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6894#endif
6895 }
6896#endif
252b5132
RH		 6897}
6898
6899/* Generate a reloc for a fixup. */
6900
6901arelent *
98027b10 6902tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6903{
6904 arelent *reloc;
6905
6906 reloc = (arelent *) xmalloc (sizeof (arelent));
6907
49309057
ILT		 6908 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6909 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6910 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6911 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6912 if (reloc->howto == (reloc_howto_type *) NULL)
6913 {
6914 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6915 _("reloc %d not supported by object file format"),
6916 (int) fixp->fx_r_type);
252b5132
RH		 6917 return NULL;
6918 }
6919 reloc->addend = fixp->fx_addnumber;
6920
6921 return reloc;
6922}
75e21f08
JJ		 6923
6924void
98027b10 6925ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6926{
6927 cfi_add_CFA_def_cfa (1, 0);
6928}
6929
6930int
1df69f4f 6931tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6932{
6933 unsigned int regnum = -1;
6934 unsigned int i;
6935 const char *p;
6936 char *q;
6937 static struct { char *name; int dw2regnum; } regnames[] =
6938 {
6939 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6940 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6941 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6942 { "spe_acc", 111 }, { "spefscr", 112 }
6943 };
6944
6945 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6946 if (strcmp (regnames[i].name, regname) == 0)
6947 return regnames[i].dw2regnum;
6948
6949 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6950 {
6951 p = regname + 1 + (regname[1] == '.');
6952 regnum = strtoul (p, &q, 10);
6953 if (p == q || *q || regnum >= 32)
6954 return -1;
6955 if (regname[0] == 'f')
b7d7dc63 6956 regnum += 32;
75e21f08 6957 else if (regname[0] == 'v')
b7d7dc63 6958 regnum += 77;
75e21f08
JJ		 6959 }
6960 else if (regname[0] == 'c' && regname[1] == 'r')
6961 {
6962 p = regname + 2 + (regname[2] == '.');
6963 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6964 return -1;
75e21f08
JJ		 6965 regnum = p[0] - '0' + 68;
6966 }
6967 return regnum;
6968}
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