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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b90efa5b 2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132
RH		 862
863 c = get_symbol_end ();
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
98027b10 1081md_parse_option (int c, char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015 1283 generate code for PowerPC 7400/7410/7450/7455\n\
ef5a96d5
AM		 1284-m750cl generate code for PowerPC 750cl\n\
1285-m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
df12615d 1286 fprintf (stream, _("\
ce3d2015
AM		 1287-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1288-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1289-mbooke generate code for 32-bit PowerPC BookE\n\
1290-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1291-mpower4, -mpwr4 generate code for Power4 architecture\n\
1292-mpower5, -mpwr5, -mpwr5x\n\
1293 generate code for Power5 architecture\n\
1294-mpower6, -mpwr6 generate code for Power6 architecture\n\
1295-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1296-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1297-mcell generate code for Cell Broadband Engine architecture\n\
1298-mcom generate code Power/PowerPC common instructions\n\
1299-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1300 fprintf (stream, _("\
ce3d2015
AM		 1301-maltivec generate code for AltiVec\n\
1302-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1303-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1304-me300 generate code for PowerPC e300 family\n\
1305-me500, -me500x2 generate code for Motorola e500 core complex\n\
1306-me500mc, generate code for Freescale e500mc core complex\n\
1307-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1308-me5500, generate code for Freescale e5500 core complex\n\
1309-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1310-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1311-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1312-mtitan generate code for AppliedMicro Titan core complex\n\
1313-mregnames Allow symbolic names for registers\n\
1314-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1315#ifdef OBJ_ELF
bc805888 1316 fprintf (stream, _("\
ce3d2015
AM		 1317-mrelocatable support for GCC's -mrelocatble option\n\
1318-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1319-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1320-mlittle, -mlittle-endian, -le\n\
ce3d2015 1321 generate code for a little endian machine\n\
b8b738ac 1322-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1323 generate code for a big endian machine\n\
1324-msolaris generate code for Solaris\n\
1325-mno-solaris do not generate code for Solaris\n\
b8b738ac 1326-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1327-V print assembler version number\n\
1328-Qy, -Qn ignored\n"));
252b5132 1329#endif
cef4f754 1330 fprintf (stream, _("\
bf7279d5
AM		 1331-nops=count when aligning, more than COUNT nops uses a branch\n\
1332-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1333}
1334\f
1335/* Set ppc_cpu if it is not already set. */
1336
1337static void
98027b10 1338ppc_set_cpu (void)
252b5132
RH		 1339{
1340 const char *default_os = TARGET_OS;
1341 const char *default_cpu = TARGET_CPU;
1342
7102e95e 1343 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1344 {
2a98c3a6 1345 if (ppc_obj64)
bdc70b4a 1346 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1347 else if (strncmp (default_os, "aix", 3) == 0
1348 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1349 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1350 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1351 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1352 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1353 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1354 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1355 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1356 else
d6ed37ed 1357 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1358 default_cpu, default_os);
252b5132
RH		 1359 }
1360}
1361
9232bbb0
AM		 1362/* Figure out the BFD architecture to use. This function and ppc_mach
1363 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1364
1365enum bfd_architecture
98027b10 1366ppc_arch (void)
252b5132
RH		 1367{
1368 const char *default_cpu = TARGET_CPU;
1369 ppc_set_cpu ();
1370
1371 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1372 return bfd_arch_powerpc;
b9c361e0
JL		 1373 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1374 return bfd_arch_powerpc;
1375 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1376 return bfd_arch_rs6000;
b9c361e0 1377 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1378 {
1379 if (strcmp (default_cpu, "rs6000") == 0)
1380 return bfd_arch_rs6000;
0baf16f2 1381 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1382 return bfd_arch_powerpc;
1383 }
1384
d6ed37ed 1385 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1386 return bfd_arch_unknown;
1387}
1388
7f6d05e8 1389unsigned long
98027b10 1390ppc_mach (void)
7f6d05e8 1391{
2a98c3a6
AM		 1392 if (ppc_obj64)
1393 return bfd_mach_ppc64;
1394 else if (ppc_arch () == bfd_arch_rs6000)
1395 return bfd_mach_rs6k;
ce3d2015
AM		 1396 else if (ppc_cpu & PPC_OPCODE_TITAN)
1397 return bfd_mach_ppc_titan;
b9c361e0
JL		 1398 else if (ppc_cpu & PPC_OPCODE_VLE)
1399 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1400 else
1401 return bfd_mach_ppc;
7f6d05e8
CP		 1402}
1403
81d4177b 1404extern char*
98027b10 1405ppc_target_format (void)
7f6d05e8
CP		 1406{
1407#ifdef OBJ_COFF
1408#ifdef TE_PE
99a814a1 1409 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1410#elif TE_POWERMAC
0baf16f2 1411 return "xcoff-powermac";
7f6d05e8 1412#else
eb1e0e80 1413# ifdef TE_AIX5
edc1d652 1414 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1415# else
edc1d652 1416 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1417# endif
7f6d05e8 1418#endif
7f6d05e8
CP		 1419#endif
1420#ifdef OBJ_ELF
edc1d652
AM		 1421# ifdef TE_FreeBSD
1422 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1423# elif defined (TE_VXWORKS)
9d8504b1
PB		 1424 return "elf32-powerpc-vxworks";
1425# else
0baf16f2 1426 return (target_big_endian
2b3c4602
AM		 1427 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1428 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1429# endif
7f6d05e8
CP		 1430#endif
1431}
1432
b9c361e0
JL		 1433/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1434 Return TRUE if there's a problem, otherwise FALSE. */
1435
1436static bfd_boolean
1437insn_validate (const struct powerpc_opcode *op)
1438{
1439 const unsigned char *o;
1440 unsigned long omask = op->mask;
1441
1442 /* The mask had better not trim off opcode bits. */
1443 if ((op->opcode & omask) != op->opcode)
1444 {
1445 as_bad (_("mask trims opcode bits for %s"), op->name);
1446 return TRUE;
1447 }
1448
1449 /* The operands must not overlap the opcode or each other. */
1450 for (o = op->operands; *o; ++o)
1451 {
1452 if (*o >= num_powerpc_operands)
1453 {
1454 as_bad (_("operand index error for %s"), op->name);
1455 return TRUE;
1456 }
1457 else
1458 {
1459 const struct powerpc_operand *operand = &powerpc_operands[*o];
1460 if (operand->shift != PPC_OPSHIFT_INV)
1461 {
1462 unsigned long mask;
1463
1464 if (operand->shift >= 0)
1465 mask = operand->bitm << operand->shift;
1466 else
1467 mask = operand->bitm >> -operand->shift;
1468 if (omask & mask)
1469 {
1470 as_bad (_("operand %d overlap in %s"),
1471 (int) (o - op->operands), op->name);
1472 return TRUE;
1473 }
1474 omask |= mask;
1475 }
1476 }
1477 }
1478 return FALSE;
1479}
1480
69c040df 1481/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1482 for .machine pseudo. */
252b5132 1483
69c040df
AM		 1484static void
1485ppc_setup_opcodes (void)
252b5132 1486{
98027b10 1487 const struct powerpc_opcode *op;
252b5132
RH		 1488 const struct powerpc_opcode *op_end;
1489 const struct powerpc_macro *macro;
1490 const struct powerpc_macro *macro_end;
b84bf58a 1491 bfd_boolean bad_insn = FALSE;
252b5132 1492
69c040df
AM		 1493 if (ppc_hash != NULL)
1494 hash_die (ppc_hash);
1495 if (ppc_macro_hash != NULL)
1496 hash_die (ppc_macro_hash);
252b5132
RH		 1497
1498 /* Insert the opcodes into a hash table. */
1499 ppc_hash = hash_new ();
1500
c43a438d 1501 if (ENABLE_CHECKING)
b84bf58a 1502 {
c43a438d 1503 unsigned int i;
b84bf58a 1504
3b8b57a9
AM		 1505 /* An index into powerpc_operands is stored in struct fix
1506 fx_pcrel_adjust which is 8 bits wide. */
1507 gas_assert (num_powerpc_operands < 256);
1508
c43a438d
AM		 1509 /* Check operand masks. Code here and in the disassembler assumes
1510 all the 1's in the mask are contiguous. */
1511 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1512 {
c43a438d
AM		 1513 unsigned long mask = powerpc_operands[i].bitm;
1514 unsigned long right_bit;
1515 unsigned int j;
1516
1517 right_bit = mask & -mask;
1518 mask += right_bit;
1519 right_bit = mask & -mask;
1520 if (mask != right_bit)
1521 {
1522 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1523 bad_insn = TRUE;
1524 }
1525 for (j = i + 1; j < num_powerpc_operands; ++j)
1526 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1527 sizeof (powerpc_operands[0])) == 0)
1528 {
1529 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1530 j, i);
1531 bad_insn = TRUE;
1532 }
b84bf58a
AM		 1533 }
1534 }
1535
252b5132
RH		 1536 op_end = powerpc_opcodes + powerpc_num_opcodes;
1537 for (op = powerpc_opcodes; op < op_end; op++)
1538 {
c43a438d 1539 if (ENABLE_CHECKING)
b84bf58a 1540 {
d815f1a9 1541 if (op != powerpc_opcodes)
8dbcd839 1542 {
b9c361e0
JL		 1543 int old_opcode = PPC_OP (op[-1].opcode);
1544 int new_opcode = PPC_OP (op[0].opcode);
1545
1546#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1547 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1548 op->name, (unsigned int) (op - powerpc_opcodes),
1549 (unsigned int) new_opcode, (unsigned int) op->opcode,
1550 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1551#endif
1552
d815f1a9
AM		 1553 /* The major opcodes had better be sorted. Code in the
1554 disassembler assumes the insns are sorted according to
1555 major opcode. */
b9c361e0 1556 if (new_opcode < old_opcode)
d815f1a9
AM		 1557 {
1558 as_bad (_("major opcode is not sorted for %s"),
1559 op->name);
1560 bad_insn = TRUE;
1561 }
8dbcd839 1562 }
b9c361e0
JL		 1563 bad_insn |= insn_validate (op);
1564 }
c43a438d 1565
b9c361e0
JL		 1566 if ((ppc_cpu & op->flags) != 0
1567 && !(ppc_cpu & op->deprecated))
1568 {
1569 const char *retval;
1570
1571 retval = hash_insert (ppc_hash, op->name, (void *) op);
1572 if (retval != NULL)
c43a438d 1573 {
b9c361e0 1574 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1575 op->name);
1576 bad_insn = TRUE;
1577 }
b9c361e0
JL		 1578 }
1579 }
c43a438d 1580
b9c361e0
JL		 1581 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1582 for (op = powerpc_opcodes; op < op_end; op++)
1583 hash_insert (ppc_hash, op->name, (void *) op);
1584
1585 op_end = vle_opcodes + vle_num_opcodes;
1586 for (op = vle_opcodes; op < op_end; op++)
1587 {
1588 if (ENABLE_CHECKING)
1589 {
1590 if (op != vle_opcodes)
1591 {
1592 unsigned old_seg, new_seg;
1593
1594 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1595 old_seg = VLE_OP_TO_SEG (old_seg);
1596 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1597 new_seg = VLE_OP_TO_SEG (new_seg);
1598
1599#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1600 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1601 op->name, (unsigned int) (op - powerpc_opcodes),
1602 (unsigned int) new_seg, (unsigned int) op->opcode,
1603 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1604#endif
1605 /* The major opcodes had better be sorted. Code in the
1606 disassembler assumes the insns are sorted according to
1607 major opcode. */
1608 if (new_seg < old_seg)
1609 {
1610 as_bad (_("major opcode is not sorted for %s"),
1611 op->name);
1612 bad_insn = TRUE;
1613 }
1614 }
1615
1616 bad_insn |= insn_validate (op);
c43a438d 1617 }
252b5132 1618
bdc70b4a 1619 if ((ppc_cpu & op->flags) != 0
1cb0a767 1620 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1621 {
1622 const char *retval;
1623
98027b10 1624 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1625 if (retval != NULL)
252b5132 1626 {
b84bf58a 1627 as_bad (_("duplicate instruction %s"),
99a814a1 1628 op->name);
b84bf58a 1629 bad_insn = TRUE;
252b5132
RH		 1630 }
1631 }
1632 }
1633
b9c361e0
JL		 1634 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1635 for (op = vle_opcodes; op < op_end; op++)
98027b10 1636 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1637
252b5132
RH		 1638 /* Insert the macros into a hash table. */
1639 ppc_macro_hash = hash_new ();
1640
1641 macro_end = powerpc_macros + powerpc_num_macros;
1642 for (macro = powerpc_macros; macro < macro_end; macro++)
1643 {
33740db9 1644 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1645 {
1646 const char *retval;
1647
98027b10 1648 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1649 if (retval != (const char *) NULL)
1650 {
b84bf58a
AM		 1651 as_bad (_("duplicate macro %s"), macro->name);
1652 bad_insn = TRUE;
252b5132
RH		 1653 }
1654 }
1655 }
1656
b84bf58a 1657 if (bad_insn)
252b5132 1658 abort ();
69c040df
AM		 1659}
1660
1661/* This function is called when the assembler starts up. It is called
1662 after the options have been parsed and the output file has been
1663 opened. */
1664
1665void
98027b10 1666md_begin (void)
69c040df
AM		 1667{
1668 ppc_set_cpu ();
1669
1670 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1671 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1672
1673#ifdef OBJ_ELF
1674 /* Set the ELF flags if desired. */
1675 if (ppc_flags && !msolaris)
1676 bfd_set_private_flags (stdoutput, ppc_flags);
1677#endif
1678
1679 ppc_setup_opcodes ();
252b5132 1680
67c1ffbe 1681 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1682 by the user. */
252b5132
RH		 1683 if (!set_target_endian)
1684 {
1685 set_target_endian = 1;
1686 target_big_endian = PPC_BIG_ENDIAN;
1687 }
1688
1689#ifdef OBJ_XCOFF
1690 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1691
1692 /* Create dummy symbols to serve as initial csects. This forces the
1693 text csects to precede the data csects. These symbols will not
1694 be output. */
1695 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1696 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1697 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1698 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1699#endif
1700
1701#ifdef TE_PE
1702
1703 ppc_current_section = text_section;
81d4177b 1704 ppc_previous_section = 0;
252b5132
RH		 1705
1706#endif
1707}
1708
6a0c61b7 1709void
98027b10 1710ppc_cleanup (void)
6a0c61b7 1711{
dc1d03fc 1712#ifdef OBJ_ELF
6a0c61b7
EZ		 1713 if (ppc_apuinfo_list == NULL)
1714 return;
1715
1716 /* Ok, so write the section info out. We have this layout:
1717
1718 byte data what
1719 ---- ---- ----
1720 0 8 length of "APUinfo\0"
1721 4 (n*4) number of APU's (4 bytes each)
1722 8 2 note type 2
1723 12 "APUinfo\0" name
1724 20 APU#1 first APU's info
1725 24 APU#2 second APU's info
1726 ... ...
1727 */
1728 {
1729 char *p;
1730 asection *seg = now_seg;
1731 subsegT subseg = now_subseg;
1732 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1733 unsigned int i;
6a0c61b7
EZ		 1734
1735 /* Create the .PPC.EMB.apuinfo section. */
1736 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1737 bfd_set_section_flags (stdoutput,
1738 apuinfo_secp,
e1a9cb8e 1739 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1740
1741 p = frag_more (4);
1742 md_number_to_chars (p, (valueT) 8, 4);
1743
1744 p = frag_more (4);
e98d298c 1745 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1746
1747 p = frag_more (4);
1748 md_number_to_chars (p, (valueT) 2, 4);
1749
1750 p = frag_more (8);
1751 strcpy (p, "APUinfo");
1752
1753 for (i = 0; i < ppc_apuinfo_num; i++)
1754 {
b34976b6
AM		 1755 p = frag_more (4);
1756 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1757 }
1758
1759 frag_align (2, 0, 0);
1760
1761 /* We probably can't restore the current segment, for there likely
1762 isn't one yet... */
1763 if (seg && subseg)
1764 subseg_set (seg, subseg);
1765 }
dc1d03fc 1766#endif
6a0c61b7
EZ		 1767}
1768
252b5132
RH		 1769/* Insert an operand value into an instruction. */
1770
1771static unsigned long
a1867a27
AM		 1772ppc_insert_operand (unsigned long insn,
1773 const struct powerpc_operand *operand,
1774 offsetT val,
91d6fa6a 1775 ppc_cpu_t cpu,
a1867a27
AM		 1776 char *file,
1777 unsigned int line)
252b5132 1778{
b84bf58a 1779 long min, max, right;
eb42fac1 1780
b84bf58a
AM		 1781 max = operand->bitm;
1782 right = max & -max;
1783 min = 0;
1784
a47622ac 1785 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1786 {
a47622ac
AM		 1787 /* Extend the allowed range for addis to [-65536, 65535].
1788 Similarly for some VLE high part insns. For 64-bit it
1789 would be good to disable this for signed fields since the
1790 value is sign extended into the high 32 bits of the register.
1791 If the value is, say, an address, then we might care about
1792 the high bits. However, gcc as of 2014-06 uses unsigned
1793 values when loading the high part of 64-bit constants using
1794 lis.
1795 Use the same extended range for cmpli, to allow at least
1796 [-32768, 65535]. */
1797 min = ~max & -right;
1798 }
1799 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1800 {
1801 max = (max >> 1) & -right;
931774a9 1802 min = ~max & -right;
b84bf58a 1803 }
252b5132 1804
b84bf58a 1805 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1806 max++;
252b5132 1807
b84bf58a 1808 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1809 {
1810 long tmp = min;
1811 min = -max;
1812 max = -tmp;
1813 }
b84bf58a 1814
a1867a27
AM		 1815 if (min <= max)
1816 {
1817 /* Some people write constants with the sign extension done by
1818 hand but only up to 32 bits. This shouldn't really be valid,
1819 but, to permit this code to assemble on a 64-bit host, we
1820 sign extend the 32-bit value to 64 bits if so doing makes the
1821 value valid. */
1822 if (val > max
1823 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1824 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1825 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1826 val = val - 0x80000000 - 0x80000000;
1827
1828 /* Similarly, people write expressions like ~(1<<15), and expect
1829 this to be OK for a 32-bit unsigned value. */
1830 else if (val < min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1832 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1833 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1834 val = val + 0x80000000 + 0x80000000;
1835
1836 else if (val < min
1837 || val > max
1838 || (val & (right - 1)) != 0)
1839 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1840 }
b84bf58a 1841
252b5132
RH		 1842 if (operand->insert)
1843 {
1844 const char *errmsg;
1845
1846 errmsg = NULL;
91d6fa6a 1847 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1848 if (errmsg != (const char *) NULL)
ee2c9aa9 1849 as_bad_where (file, line, "%s", errmsg);
252b5132 1850 }
b9c361e0 1851 else if (operand->shift >= 0)
b84bf58a 1852 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1853 else
1854 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1855
1856 return insn;
1857}
1858
1859\f
1860#ifdef OBJ_ELF
1861/* Parse @got, etc. and return the desired relocation. */
1862static bfd_reloc_code_real_type
98027b10 1863ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1864{
1865 struct map_bfd {
1866 char *string;
b7d7dc63
AM		 1867 unsigned int length : 8;
1868 unsigned int valid32 : 1;
1869 unsigned int valid64 : 1;
1870 unsigned int reloc;
252b5132
RH		 1871 };
1872
1873 char ident[20];
1874 char *str = *str_p;
1875 char *str2;
1876 int ch;
1877 int len;
15c1449b 1878 const struct map_bfd *ptr;
252b5132 1879
b7d7dc63
AM		 1880#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1881#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1882#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1883
15c1449b 1884 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1885 MAP ("l", BFD_RELOC_LO16),
1886 MAP ("h", BFD_RELOC_HI16),
1887 MAP ("ha", BFD_RELOC_HI16_S),
1888 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1889 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1890 MAP ("got", BFD_RELOC_16_GOTOFF),
1891 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1892 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1893 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1894 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1895 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1896 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1897 MAP ("copy", BFD_RELOC_PPC_COPY),
1898 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1899 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1900 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1901 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1902 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1903 MAP ("tls", BFD_RELOC_PPC_TLS),
1904 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1905 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1906 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1907 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1908 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1909 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1910 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1911 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1912 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1913 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1914 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1915 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1916 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1917 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1918 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1919 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1920 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1921 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1922 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1923 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1924 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1925 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1926 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1927 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1928 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1929 MAP32 ("fixup", BFD_RELOC_CTOR),
1930 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1932 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1934 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1935 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1936 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1937 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1938 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1939 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1940 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1941 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1942 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1943 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1944 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1945 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1946 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1947 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1948 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1949 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1950 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1951 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1952 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1953 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1954 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1955 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1956 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1957 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1958 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1959 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1960 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1961 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1962 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1963 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1964 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1965 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1966 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1967 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1968 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1969 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1970 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1971 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1972 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1973 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1974 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1975 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1976 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1977 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1978 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1979 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1980 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1981 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1982 };
1983
1984 if (*str++ != '@')
62ebcb5c 1985 return BFD_RELOC_NONE;
252b5132
RH		 1986
1987 for (ch = *str, str2 = ident;
1988 (str2 < ident + sizeof (ident) - 1
3882b010 1989 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1990 ch = *++str)
1991 {
3882b010 1992 *str2++ = TOLOWER (ch);
252b5132
RH		 1993 }
1994
1995 *str2 = '\0';
1996 len = str2 - ident;
1997
1998 ch = ident[0];
1999 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2000 if (ch == ptr->string[0]
2001 && len == ptr->length
b7d7dc63
AM		 2002 && memcmp (ident, ptr->string, ptr->length) == 0
2003 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2004 {
15c1449b
AM		 2005 int reloc = ptr->reloc;
2006
727fc41e
AM		 2007 if (!ppc_obj64 && exp_p->X_add_number != 0)
2008 {
2009 switch (reloc)
2010 {
2011 case BFD_RELOC_16_GOTOFF:
2012 case BFD_RELOC_LO16_GOTOFF:
2013 case BFD_RELOC_HI16_GOTOFF:
2014 case BFD_RELOC_HI16_S_GOTOFF:
2015 as_warn (_("identifier+constant@got means "
2016 "identifier@got+constant"));
2017 break;
2018
2019 case BFD_RELOC_PPC_GOT_TLSGD16:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2022 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2023 case BFD_RELOC_PPC_GOT_TLSLD16:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2026 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2027 case BFD_RELOC_PPC_GOT_DTPREL16:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2030 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2031 case BFD_RELOC_PPC_GOT_TPREL16:
2032 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2034 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2035 as_bad (_("symbol+offset not supported for got tls"));
2036 break;
2037 }
2038 }
5f6db75a
AM		 2039
2040 /* Now check for identifier@suffix+constant. */
2041 if (*str == '-' || *str == '+')
252b5132 2042 {
5f6db75a
AM		 2043 char *orig_line = input_line_pointer;
2044 expressionS new_exp;
2045
2046 input_line_pointer = str;
2047 expression (&new_exp);
2048 if (new_exp.X_op == O_constant)
252b5132 2049 {
5f6db75a
AM		 2050 exp_p->X_add_number += new_exp.X_add_number;
2051 str = input_line_pointer;
252b5132 2052 }
5f6db75a
AM		 2053
2054 if (&input_line_pointer != str_p)
2055 input_line_pointer = orig_line;
252b5132 2056 }
252b5132 2057 *str_p = str;
0baf16f2 2058
2b3c4602 2059 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2060 && exp_p->X_op == O_symbol
2061 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2062 {
9f2b53d7
AM		 2063 /* Change the symbol so that the dummy .TOC. symbol can be
2064 omitted from the object file. */
0baf16f2
AM		 2065 exp_p->X_add_symbol = &abs_symbol;
2066 }
2067
15c1449b 2068 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2069 }
2070
62ebcb5c 2071 return BFD_RELOC_NONE;
252b5132
RH		 2072}
2073
62ebcb5c 2074/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2075
62ebcb5c
AM		 2076bfd_reloc_code_real_type
2077ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2078{
2079 expression (exp);
2080 if (nbytes >= 2 && *input_line_pointer == '@')
2081 return ppc_elf_suffix (&input_line_pointer, exp);
2082 return BFD_RELOC_NONE;
252b5132
RH		 2083}
2084
bf7279d5
AM		 2085/* Warn when emitting data to code sections, unless we are emitting
2086 a relocation that ld --ppc476-workaround uses to recognise data
2087 *and* there was an unconditional branch prior to the data. */
2088
2089void
2090ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2091 unsigned int nbytes, fixS *fix)
2092{
2093 if (warn_476
2094 && (now_seg->flags & SEC_CODE) != 0
2095 && (nbytes != 4
2096 || fix == NULL
2097 || !(fix->fx_r_type == BFD_RELOC_32
2098 || fix->fx_r_type == BFD_RELOC_CTOR
2099 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2100 || !(last_seg == now_seg && last_subseg == now_subseg)
2101 || !((last_insn & (0x3f << 26)) == (18u << 26)
2102 || ((last_insn & (0x3f << 26)) == (16u << 26)
2103 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2104 || ((last_insn & (0x3f << 26)) == (19u << 26)
2105 && (last_insn & (0x3ff << 1)) == (16u << 1)
2106 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2107 {
2108 /* Flag that we've warned. */
2109 if (fix != NULL)
2110 fix->fx_tcbit = 1;
2111
2112 as_warn (_("data in executable section"));
2113 }
2114}
2115
252b5132
RH		 2116/* Solaris pseduo op to change to the .rodata section. */
2117static void
98027b10 2118ppc_elf_rdata (int xxx)
252b5132
RH		 2119{
2120 char *save_line = input_line_pointer;
2121 static char section[] = ".rodata\n";
2122
99a814a1 2123 /* Just pretend this is .section .rodata */
252b5132
RH		 2124 input_line_pointer = section;
2125 obj_elf_section (xxx);
2126
2127 input_line_pointer = save_line;
2128}
2129
99a814a1 2130/* Pseudo op to make file scope bss items. */
252b5132 2131static void
98027b10 2132ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2133{
98027b10
AM		 2134 char *name;
2135 char c;
2136 char *p;
252b5132 2137 offsetT size;
98027b10 2138 symbolS *symbolP;
252b5132
RH		 2139 offsetT align;
2140 segT old_sec;
2141 int old_subsec;
2142 char *pfrag;
2143 int align2;
2144
2145 name = input_line_pointer;
2146 c = get_symbol_end ();
2147
99a814a1 2148 /* just after name is now '\0'. */
252b5132
RH		 2149 p = input_line_pointer;
2150 *p = c;
2151 SKIP_WHITESPACE ();
2152 if (*input_line_pointer != ',')
2153 {
d6ed37ed 2154 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2155 ignore_rest_of_line ();
2156 return;
2157 }
2158
2159 input_line_pointer++; /* skip ',' */
2160 if ((size = get_absolute_expression ()) < 0)
2161 {
2162 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2163 ignore_rest_of_line ();
2164 return;
2165 }
2166
2167 /* The third argument to .lcomm is the alignment. */
2168 if (*input_line_pointer != ',')
2169 align = 8;
2170 else
2171 {
2172 ++input_line_pointer;
2173 align = get_absolute_expression ();
2174 if (align <= 0)
2175 {
2176 as_warn (_("ignoring bad alignment"));
2177 align = 8;
2178 }
2179 }
2180
2181 *p = 0;
2182 symbolP = symbol_find_or_make (name);
2183 *p = c;
2184
2185 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2186 {
d6ed37ed 2187 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2188 S_GET_NAME (symbolP));
2189 ignore_rest_of_line ();
2190 return;
2191 }
2192
2193 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2194 {
d6ed37ed 2195 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2196 S_GET_NAME (symbolP),
2197 (long) S_GET_VALUE (symbolP),
2198 (long) size);
2199
2200 ignore_rest_of_line ();
2201 return;
2202 }
2203
99a814a1 2204 /* Allocate_bss. */
252b5132
RH		 2205 old_sec = now_seg;
2206 old_subsec = now_subseg;
2207 if (align)
2208 {
99a814a1 2209 /* Convert to a power of 2 alignment. */
252b5132
RH		 2210 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2211 if (align != 1)
2212 {
d6ed37ed 2213 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2214 ignore_rest_of_line ();
2215 return;
2216 }
2217 }
2218 else
2219 align2 = 0;
2220
2221 record_alignment (bss_section, align2);
cbe02d4f 2222 subseg_set (bss_section, 1);
252b5132
RH		 2223 if (align2)
2224 frag_align (align2, 0, 0);
2225 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2226 symbol_get_frag (symbolP)->fr_symbol = 0;
2227 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2228 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2229 (char *) 0);
2230 *pfrag = 0;
2231 S_SET_SIZE (symbolP, size);
2232 S_SET_SEGMENT (symbolP, bss_section);
2233 subseg_set (old_sec, old_subsec);
2234 demand_empty_rest_of_line ();
2235}
2236
6911b7dc
AM		 2237/* Pseudo op to set symbol local entry point. */
2238static void
2239ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2240{
2241 char *name = input_line_pointer;
2242 char c = get_symbol_end ();
2243 char *p;
2244 expressionS exp;
2245 symbolS *sym;
2246 asymbol *bfdsym;
2247 elf_symbol_type *elfsym;
2248
2249 p = input_line_pointer;
2250 *p = c;
2251 SKIP_WHITESPACE ();
2252 if (*input_line_pointer != ',')
2253 {
2254 *p = 0;
2255 as_bad (_("expected comma after name `%s' in .localentry directive"),
2256 name);
2257 *p = c;
2258 ignore_rest_of_line ();
2259 return;
2260 }
2261 input_line_pointer++;
2262 expression (&exp);
2263 if (exp.X_op == O_absent)
2264 {
2265 as_bad (_("missing expression in .localentry directive"));
2266 exp.X_op = O_constant;
2267 exp.X_add_number = 0;
2268 }
2269 *p = 0;
2270 sym = symbol_find_or_make (name);
2271 *p = c;
2272
2273 if (resolve_expression (&exp)
2274 && exp.X_op == O_constant)
2275 {
2276 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2277
e2b5892e 2278 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2279 as_bad (_(".localentry expression for `%s' "
2280 "is not a valid power of 2"), S_GET_NAME (sym));
2281 else
2282 {
2283 bfdsym = symbol_get_bfdsym (sym);
2284 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2285 gas_assert (elfsym);
2286 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2287 elfsym->internal_elf_sym.st_other |= encoded;
2288 if (ppc_abiversion == 0)
2289 ppc_abiversion = 2;
2290 }
2291 }
2292 else
2293 as_bad (_(".localentry expression for `%s' "
2294 "does not evaluate to a constant"), S_GET_NAME (sym));
2295
2296 demand_empty_rest_of_line ();
2297}
2298
ee67d69a
AM		 2299/* Pseudo op to set ABI version. */
2300static void
2301ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2302{
2303 expressionS exp;
2304
2305 expression (&exp);
2306 if (exp.X_op == O_absent)
2307 {
2308 as_bad (_("missing expression in .abiversion directive"));
2309 exp.X_op = O_constant;
2310 exp.X_add_number = 0;
2311 }
2312
2313 if (resolve_expression (&exp)
2314 && exp.X_op == O_constant)
2315 ppc_abiversion = exp.X_add_number;
2316 else
2317 as_bad (_(".abiversion expression does not evaluate to a constant"));
2318 demand_empty_rest_of_line ();
2319}
2320
2321/* Set ABI version in output file. */
2322void
2323ppc_elf_end (void)
2324{
2325 if (ppc_obj64 && ppc_abiversion != 0)
2326 {
2327 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2328 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2329 }
2330}
2331
252b5132
RH		 2332/* Validate any relocations emitted for -mrelocatable, possibly adding
2333 fixups for word relocations in writable segments, so we can adjust
2334 them at runtime. */
2335static void
98027b10 2336ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2337{
2338 if (fixp->fx_done || fixp->fx_pcrel)
2339 return;
2340
2341 switch (shlib)
2342 {
2343 case SHLIB_NONE:
2344 case SHLIB_PIC:
2345 return;
2346
5d6f4f16 2347 case SHLIB_MRELOCATABLE:
62ebcb5c 2348 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2349 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2351 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2352 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2353 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2355 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2356 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2357 && strcmp (segment_name (seg), ".got2") != 0
2358 && strcmp (segment_name (seg), ".dtors") != 0
2359 && strcmp (segment_name (seg), ".ctors") != 0
2360 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2361 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2362 && strcmp (segment_name (seg), ".eh_frame") != 0
2363 && strcmp (segment_name (seg), ".ex_shared") != 0)
2364 {
2365 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2366 || fixp->fx_r_type != BFD_RELOC_CTOR)
2367 {
2368 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2369 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2370 }
2371 }
2372 return;
2373 }
2374}
0baf16f2 2375
7e8d4ab4
AM		 2376/* Prevent elf_frob_file_before_adjust removing a weak undefined
2377 function descriptor sym if the corresponding code sym is used. */
2378
2379void
98027b10 2380ppc_frob_file_before_adjust (void)
0baf16f2 2381{
7e8d4ab4 2382 symbolS *symp;
9232bbb0 2383 asection *toc;
0baf16f2 2384
7e8d4ab4
AM		 2385 if (!ppc_obj64)
2386 return;
2387
2388 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2389 {
7e8d4ab4
AM		 2390 const char *name;
2391 char *dotname;
2392 symbolS *dotsym;
2393 size_t len;
2394
2395 name = S_GET_NAME (symp);
2396 if (name[0] == '.')
2397 continue;
2398
2399 if (! S_IS_WEAK (symp)
2400 || S_IS_DEFINED (symp))
2401 continue;
2402
2403 len = strlen (name) + 1;
2404 dotname = xmalloc (len + 1);
2405 dotname[0] = '.';
2406 memcpy (dotname + 1, name, len);
461b725f 2407 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2408 free (dotname);
2409 if (dotsym != NULL && (symbol_used_p (dotsym)
2410 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2411 symbol_mark_used (symp);
2412
0baf16f2
AM		 2413 }
2414
9232bbb0
AM		 2415 toc = bfd_get_section_by_name (stdoutput, ".toc");
2416 if (toc != NULL
01efc3af 2417 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2418 && bfd_section_size (stdoutput, toc) > 0x10000)
2419 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2420}
2421
2422/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2423 emitted. Other uses of .TOC. will cause the symbol to be marked
2424 with BSF_KEEP in md_apply_fix. */
9232bbb0 2425
a38a07e0
AM		 2426void
2427ppc_elf_adjust_symtab (void)
2428{
2429 if (ppc_obj64)
2430 {
2431 symbolS *symp;
2432 symp = symbol_find (".TOC.");
2433 if (symp != NULL)
2434 {
2435 asymbol *bsym = symbol_get_bfdsym (symp);
2436 if ((bsym->flags & BSF_KEEP) == 0)
2437 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2438 }
2439 }
0baf16f2 2440}
252b5132
RH		 2441#endif /* OBJ_ELF */
2442\f
2443#ifdef TE_PE
2444
2445/*
99a814a1 2446 * Summary of parse_toc_entry.
252b5132
RH		 2447 *
2448 * in: Input_line_pointer points to the '[' in one of:
2449 *
2450 * [toc] [tocv] [toc32] [toc64]
2451 *
2452 * Anything else is an error of one kind or another.
2453 *
81d4177b 2454 * out:
252b5132
RH		 2455 * return value: success or failure
2456 * toc_kind: kind of toc reference
2457 * input_line_pointer:
2458 * success: first char after the ']'
2459 * failure: unchanged
2460 *
2461 * settings:
2462 *
2463 * [toc] - rv == success, toc_kind = default_toc
2464 * [tocv] - rv == success, toc_kind = data_in_toc
2465 * [toc32] - rv == success, toc_kind = must_be_32
2466 * [toc64] - rv == success, toc_kind = must_be_64
2467 *
2468 */
2469
81d4177b
KH		 2470enum toc_size_qualifier
2471{
252b5132
RH		 2472 default_toc, /* The toc cell constructed should be the system default size */
2473 data_in_toc, /* This is a direct reference to a toc cell */
2474 must_be_32, /* The toc cell constructed must be 32 bits wide */
2475 must_be_64 /* The toc cell constructed must be 64 bits wide */
2476};
2477
2478static int
98027b10 2479parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2480{
2481 char *start;
2482 char *toc_spec;
2483 char c;
2484 enum toc_size_qualifier t;
2485
99a814a1 2486 /* Save the input_line_pointer. */
252b5132
RH		 2487 start = input_line_pointer;
2488
99a814a1 2489 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2490 ++input_line_pointer;
2491 SKIP_WHITESPACE ();
81d4177b 2492
99a814a1 2493 /* Find the spelling of the operand. */
252b5132
RH		 2494 toc_spec = input_line_pointer;
2495 c = get_symbol_end ();
2496
99a814a1 2497 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2498 {
2499 t = default_toc;
2500 }
99a814a1 2501 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2502 {
2503 t = data_in_toc;
2504 }
99a814a1 2505 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2506 {
2507 t = must_be_32;
2508 }
99a814a1 2509 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2510 {
2511 t = must_be_64;
2512 }
2513 else
2514 {
2515 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2516 *input_line_pointer = c;
2517 input_line_pointer = start;
252b5132
RH		 2518 return 0;
2519 }
2520
99a814a1
AM		 2521 /* Now find the ']'. */
2522 *input_line_pointer = c;
252b5132 2523
81d4177b
KH		 2524 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2525 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2526
2527 if (c != ']')
2528 {
2529 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2530 input_line_pointer = start;
252b5132
RH		 2531 return 0;
2532 }
2533
99a814a1 2534 *toc_kind = t;
252b5132
RH		 2535 return 1;
2536}
2537#endif
3b8b57a9 2538
3e60bf4d 2539#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2540/* See whether a symbol is in the TOC section. */
2541
2542static int
2543ppc_is_toc_sym (symbolS *sym)
2544{
3e60bf4d 2545#ifdef OBJ_XCOFF
9f6e76f4
TG		 2546 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2547 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2548#endif
3e60bf4d
AM		 2549#ifdef OBJ_ELF
2550 const char *sname = segment_name (S_GET_SEGMENT (sym));
2551 if (ppc_obj64)
2552 return strcmp (sname, ".toc") == 0;
2553 else
2554 return strcmp (sname, ".got") == 0;
2555#endif
2556}
2557#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2558\f
2559
dc1d03fc 2560#ifdef OBJ_ELF
6a0c61b7
EZ		 2561#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2562static void
98027b10 2563ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2564{
2565 unsigned int i;
2566
2567 /* Check we don't already exist. */
2568 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2569 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2570 return;
b34976b6 2571
6a0c61b7
EZ		 2572 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2573 {
2574 if (ppc_apuinfo_num_alloc == 0)
2575 {
2576 ppc_apuinfo_num_alloc = 4;
2577 ppc_apuinfo_list = (unsigned long *)
2578 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2579 }
2580 else
2581 {
2582 ppc_apuinfo_num_alloc += 4;
2583 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2584 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2585 }
2586 }
dc1d03fc 2587 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2588}
2589#undef APUID
dc1d03fc 2590#endif
6a0c61b7
EZ		 2591\f
2592
252b5132
RH		 2593/* We need to keep a list of fixups. We can't simply generate them as
2594 we go, because that would require us to first create the frag, and
2595 that would screw up references to ``.''. */
2596
2597struct ppc_fixup
2598{
2599 expressionS exp;
2600 int opindex;
2601 bfd_reloc_code_real_type reloc;
2602};
2603
2604#define MAX_INSN_FIXUPS (5)
2605
b9c361e0
JL		 2606/* Form I16L. */
2607#define E_OR2I_INSN 0x7000C000
2608#define E_AND2I_DOT_INSN 0x7000C800
2609#define E_OR2IS_INSN 0x7000D000
2610#define E_LIS_INSN 0x7000E000
2611#define E_AND2IS_DOT_INSN 0x7000E800
2612
2613/* Form I16A. */
2614#define E_ADD2I_DOT_INSN 0x70008800
2615#define E_ADD2IS_INSN 0x70009000
2616#define E_CMP16I_INSN 0x70009800
2617#define E_MULL2I_INSN 0x7000A000
2618#define E_CMPL16I_INSN 0x7000A800
2619#define E_CMPH16I_INSN 0x7000B000
2620#define E_CMPHL16I_INSN 0x7000B800
2621
252b5132
RH		 2622/* This routine is called for each instruction to be assembled. */
2623
2624void
98027b10 2625md_assemble (char *str)
252b5132
RH		 2626{
2627 char *s;
2628 const struct powerpc_opcode *opcode;
2629 unsigned long insn;
2630 const unsigned char *opindex_ptr;
2631 int skip_optional;
2632 int need_paren;
2633 int next_opindex;
2634 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2635 int fc;
2636 char *f;
09b935ac 2637 int addr_mod;
252b5132 2638 int i;
b9c361e0 2639 unsigned int insn_length;
252b5132
RH		 2640
2641 /* Get the opcode. */
3882b010 2642 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2643 ;
2644 if (*s != '\0')
2645 *s++ = '\0';
2646
2647 /* Look up the opcode in the hash table. */
2648 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2649 if (opcode == (const struct powerpc_opcode *) NULL)
2650 {
2651 const struct powerpc_macro *macro;
2652
2653 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2654 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2655 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2656 else
2657 ppc_macro (s, macro);
2658
2659 return;
2660 }
2661
2662 insn = opcode->opcode;
2663
2664 str = s;
3882b010 2665 while (ISSPACE (*str))
252b5132
RH		 2666 ++str;
2667
2668 /* PowerPC operands are just expressions. The only real issue is
2669 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2670 an optional operand separate the operands only with commas (in some
2671 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2672 have optional operands). Most instructions with optional operands
2673 have only one. Those that have more than one optional operand can
2674 take either all their operands or none. So, before we start seriously
2675 parsing the operands, we check to see if we have optional operands,
2676 and if we do, we count the number of commas to see which operands
2677 have been omitted. */
252b5132
RH		 2678 skip_optional = 0;
2679 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2680 {
2681 const struct powerpc_operand *operand;
2682
2683 operand = &powerpc_operands[*opindex_ptr];
2684 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2685 {
2686 unsigned int opcount;
7fe9cf6b 2687 unsigned int num_operands_expected;
252b5132
RH		 2688
2689 /* There is an optional operand. Count the number of
2690 commas in the input line. */
2691 if (*str == '\0')
2692 opcount = 0;
2693 else
2694 {
2695 opcount = 1;
2696 s = str;
2697 while ((s = strchr (s, ',')) != (char *) NULL)
2698 {
2699 ++opcount;
2700 ++s;
2701 }
2702 }
2703
7fe9cf6b
NC		 2704 /* Compute the number of expected operands.
2705 Do not count fake operands. */
2706 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2707 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2708 ++ num_operands_expected;
2709
252b5132
RH		 2710 /* If there are fewer operands in the line then are called
2711 for by the instruction, we want to skip the optional
1f6c9eb0 2712 operands. */
7fe9cf6b 2713 if (opcount < num_operands_expected)
252b5132
RH		 2714 skip_optional = 1;
2715
2716 break;
2717 }
2718 }
2719
2720 /* Gather the operands. */
2721 need_paren = 0;
2722 next_opindex = 0;
2723 fc = 0;
2724 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2725 {
2726 const struct powerpc_operand *operand;
2727 const char *errmsg;
2728 char *hold;
2729 expressionS ex;
2730 char endc;
2731
2732 if (next_opindex == 0)
2733 operand = &powerpc_operands[*opindex_ptr];
2734 else
2735 {
2736 operand = &powerpc_operands[next_opindex];
2737 next_opindex = 0;
2738 }
252b5132
RH		 2739 errmsg = NULL;
2740
2741 /* If this is a fake operand, then we do not expect anything
2742 from the input. */
2743 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2744 {
2b3c4602 2745 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2746 if (errmsg != (const char *) NULL)
ee2c9aa9 2747 as_bad ("%s", errmsg);
252b5132
RH		 2748 continue;
2749 }
2750
2751 /* If this is an optional operand, and we are skipping it, just
2752 insert a zero. */
2753 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2754 && skip_optional)
2755 {
11a0cf2e 2756 long val = ppc_optional_operand_value (operand);
252b5132
RH		 2757 if (operand->insert)
2758 {
11a0cf2e 2759 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
252b5132 2760 if (errmsg != (const char *) NULL)
ee2c9aa9 2761 as_bad ("%s", errmsg);
252b5132 2762 }
11a0cf2e
PB		 2763 else if (operand->shift >= 0)
2764 insn |= ((long) val & operand->bitm) << operand->shift;
2765 else
2766 insn |= ((long) val & operand->bitm) >> -operand->shift;
2767
252b5132
RH		 2768 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2769 next_opindex = *opindex_ptr + 1;
2770 continue;
2771 }
2772
2773 /* Gather the operand. */
2774 hold = input_line_pointer;
2775 input_line_pointer = str;
2776
2777#ifdef TE_PE
81d4177b 2778 if (*input_line_pointer == '[')
252b5132
RH		 2779 {
2780 /* We are expecting something like the second argument here:
99a814a1
AM		 2781 *
2782 * lwz r4,[toc].GS.0.static_int(rtoc)
2783 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2784 * The argument following the `]' must be a symbol name, and the
2785 * register must be the toc register: 'rtoc' or '2'
2786 *
2787 * The effect is to 0 as the displacement field
2788 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2789 * the appropriate variation) reloc against it based on the symbol.
2790 * The linker will build the toc, and insert the resolved toc offset.
2791 *
2792 * Note:
2793 * o The size of the toc entry is currently assumed to be
2794 * 32 bits. This should not be assumed to be a hard coded
2795 * number.
2796 * o In an effort to cope with a change from 32 to 64 bits,
2797 * there are also toc entries that are specified to be
2798 * either 32 or 64 bits:
2799 * lwz r4,[toc32].GS.0.static_int(rtoc)
2800 * lwz r4,[toc64].GS.0.static_int(rtoc)
2801 * These demand toc entries of the specified size, and the
2802 * instruction probably requires it.
2803 */
252b5132
RH		 2804
2805 int valid_toc;
2806 enum toc_size_qualifier toc_kind;
2807 bfd_reloc_code_real_type toc_reloc;
2808
99a814a1
AM		 2809 /* Go parse off the [tocXX] part. */
2810 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2811
81d4177b 2812 if (!valid_toc)
252b5132 2813 {
a5840dce
AM		 2814 ignore_rest_of_line ();
2815 break;
252b5132
RH		 2816 }
2817
99a814a1
AM		 2818 /* Now get the symbol following the ']'. */
2819 expression (&ex);
252b5132
RH		 2820
2821 switch (toc_kind)
2822 {
2823 case default_toc:
99a814a1
AM		 2824 /* In this case, we may not have seen the symbol yet,
2825 since it is allowed to appear on a .extern or .globl
2826 or just be a label in the .data section. */
252b5132
RH		 2827 toc_reloc = BFD_RELOC_PPC_TOC16;
2828 break;
2829 case data_in_toc:
99a814a1
AM		 2830 /* 1. The symbol must be defined and either in the toc
2831 section, or a global.
2832 2. The reloc generated must have the TOCDEFN flag set
2833 in upper bit mess of the reloc type.
2834 FIXME: It's a little confusing what the tocv
2835 qualifier can be used for. At the very least, I've
2836 seen three uses, only one of which I'm sure I can
2837 explain. */
81d4177b
KH		 2838 if (ex.X_op == O_symbol)
2839 {
9c2799c2 2840 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2841 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2842 != tocdata_section)
252b5132 2843 {
99a814a1 2844 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2845 }
2846 }
2847
2848 toc_reloc = BFD_RELOC_PPC_TOC16;
2849 break;
2850 case must_be_32:
99a814a1
AM		 2851 /* FIXME: these next two specifically specify 32/64 bit
2852 toc entries. We don't support them today. Is this
2853 the right way to say that? */
62ebcb5c 2854 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2855 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2856 break;
2857 case must_be_64:
99a814a1 2858 /* FIXME: see above. */
62ebcb5c 2859 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2860 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2861 break;
2862 default:
bc805888 2863 fprintf (stderr,
99a814a1
AM		 2864 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2865 toc_kind);
bc805888 2866 abort ();
252b5132
RH		 2867 break;
2868 }
2869
2870 /* We need to generate a fixup for this expression. */
2871 if (fc >= MAX_INSN_FIXUPS)
2872 as_fatal (_("too many fixups"));
2873
2874 fixups[fc].reloc = toc_reloc;
2875 fixups[fc].exp = ex;
2876 fixups[fc].opindex = *opindex_ptr;
2877 ++fc;
2878
99a814a1
AM		 2879 /* Ok. We've set up the fixup for the instruction. Now make it
2880 look like the constant 0 was found here. */
252b5132
RH		 2881 ex.X_unsigned = 1;
2882 ex.X_op = O_constant;
2883 ex.X_add_number = 0;
2884 ex.X_add_symbol = NULL;
2885 ex.X_op_symbol = NULL;
2886 }
2887
2888 else
2889#endif /* TE_PE */
2890 {
b9c361e0
JL		 2891 if ((reg_names_p
2892 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2893 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2894 || !register_name (&ex))
252b5132 2895 {
13abbae3
AM		 2896 char save_lex = lex_type['%'];
2897
b9c361e0
JL		 2898 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2899 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2900 {
2901 cr_operand = TRUE;
2902 lex_type['%'] |= LEX_BEGIN_NAME;
2903 }
252b5132 2904 expression (&ex);
b34976b6 2905 cr_operand = FALSE;
13abbae3 2906 lex_type['%'] = save_lex;
252b5132
RH		 2907 }
2908 }
2909
2910 str = input_line_pointer;
2911 input_line_pointer = hold;
2912
2913 if (ex.X_op == O_illegal)
2914 as_bad (_("illegal operand"));
2915 else if (ex.X_op == O_absent)
2916 as_bad (_("missing operand"));
2917 else if (ex.X_op == O_register)
2918 {
2919 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2920 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2921 }
2922 else if (ex.X_op == O_constant)
2923 {
2924#ifdef OBJ_ELF
81d4177b 2925 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2926 bfd_reloc_code_real_type reloc;
252b5132
RH		 2927 char *orig_str = str;
2928
62ebcb5c 2929 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2930 switch (reloc)
2931 {
2932 default:
2933 str = orig_str;
2934 break;
2935
2936 case BFD_RELOC_LO16:
f9c6b907
AM		 2937 ex.X_add_number &= 0xffff;
2938 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2939 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2940 break;
2941
2942 case BFD_RELOC_HI16:
f9c6b907
AM		 2943 if (REPORT_OVERFLOW_HI && ppc_obj64)
2944 {
2945 /* PowerPC64 @h is tested for overflow. */
2946 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2947 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2948 {
2949 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2950 ex.X_add_number
2951 = ((addressT) ex.X_add_number ^ sign) - sign;
2952 }
2953 break;
2954 }
2955 /* Fall thru */
2956
2957 case BFD_RELOC_PPC64_ADDR16_HIGH:
2958 ex.X_add_number = PPC_HI (ex.X_add_number);
2959 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2960 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2961 break;
2962
2963 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2964 if (REPORT_OVERFLOW_HI && ppc_obj64)
2965 {
2966 /* PowerPC64 @ha is tested for overflow. */
2967 ex.X_add_number
2968 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2969 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2970 {
2971 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2972 ex.X_add_number
2973 = ((addressT) ex.X_add_number ^ sign) - sign;
2974 }
2975 break;
2976 }
2977 /* Fall thru */
2978
2979 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2980 ex.X_add_number = PPC_HA (ex.X_add_number);
2981 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2982 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2983 break;
2984
0baf16f2 2985 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2986 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2987 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2988 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2989 break;
2990
2991 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2992 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2993 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2994 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2995 break;
0baf16f2
AM		 2996
2997 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2998 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2999 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3000 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 3001 break;
3002
3003 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 3004 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3005 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3006 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3007 break;
252b5132 3008 }
0baf16f2 3009#endif /* OBJ_ELF */
252b5132 3010 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3011 ppc_cpu, (char *) NULL, 0);
252b5132 3012 }
727fc41e 3013 else
252b5132 3014 {
62ebcb5c 3015 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3016#ifdef OBJ_ELF
727fc41e 3017 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3018 {
727fc41e
AM		 3019 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3020 if (sym_name[0] == '.')
3021 ++sym_name;
cdba85ec 3022
727fc41e 3023 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3024 {
727fc41e
AM		 3025 expressionS tls_exp;
3026
3027 hold = input_line_pointer;
3028 input_line_pointer = str + 1;
3029 expression (&tls_exp);
3030 if (tls_exp.X_op == O_symbol)
3031 {
62ebcb5c 3032 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3033 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3034 {
3035 reloc = BFD_RELOC_PPC_TLSGD;
3036 input_line_pointer += 7;
3037 }
3038 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3039 {
3040 reloc = BFD_RELOC_PPC_TLSLD;
3041 input_line_pointer += 7;
3042 }
62ebcb5c 3043 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3044 {
3045 SKIP_WHITESPACE ();
3046 str = input_line_pointer;
3047
3048 if (fc >= MAX_INSN_FIXUPS)
3049 as_fatal (_("too many fixups"));
3050 fixups[fc].exp = tls_exp;
3051 fixups[fc].opindex = *opindex_ptr;
3052 fixups[fc].reloc = reloc;
3053 ++fc;
3054 }
3055 }
3056 input_line_pointer = hold;
252b5132
RH		 3057 }
3058 }
3059
62ebcb5c 3060 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3061 {
727fc41e 3062 /* Some TLS tweaks. */
0baf16f2
AM		 3063 switch (reloc)
3064 {
727fc41e 3065 default:
cdba85ec 3066 break;
727fc41e
AM		 3067
3068 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3069 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3070 as_bad (_("@tls may not be used with \"%s\" operands"),
3071 opcode->name);
3072 else if (operand->shift != 11)
3073 as_bad (_("@tls may only be used in last operand"));
3074 else
3075 insn = ppc_insert_operand (insn, operand,
3076 ppc_obj64 ? 13 : 2,
3077 ppc_cpu, (char *) NULL, 0);
cdba85ec 3078 break;
727fc41e
AM		 3079
3080 /* We'll only use the 32 (or 64) bit form of these relocations
3081 in constants. Instructions get the 16 bit form. */
3082 case BFD_RELOC_PPC_DTPREL:
3083 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3084 break;
727fc41e
AM		 3085 case BFD_RELOC_PPC_TPREL:
3086 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3087 break;
3088 }
727fc41e 3089
b9c361e0
JL		 3090 /* If VLE-mode convert LO/HI/HA relocations. */
3091 if (opcode->flags & PPC_OPCODE_VLE)
3092 {
3093 int tmp_insn = insn & opcode->mask;
3094
3095 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3096 || tmp_insn == E_AND2I_DOT_INSN
3097 || tmp_insn == E_OR2IS_INSN
3098 || tmp_insn == E_LIS_INSN
3099 || tmp_insn == E_AND2IS_DOT_INSN);
3100
3101
3102 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3103 || tmp_insn == E_ADD2IS_INSN
3104 || tmp_insn == E_CMP16I_INSN
3105 || tmp_insn == E_MULL2I_INSN
3106 || tmp_insn == E_CMPL16I_INSN
3107 || tmp_insn == E_CMPH16I_INSN
3108 || tmp_insn == E_CMPHL16I_INSN);
3109
3110 switch (reloc)
3111 {
3112 default:
3113 break;
3114
3115 case BFD_RELOC_PPC_EMB_SDA21:
3116 reloc = BFD_RELOC_PPC_VLE_SDA21;
3117 break;
3118
3119 case BFD_RELOC_LO16:
3120 if (use_d_reloc)
3121 reloc = BFD_RELOC_PPC_VLE_LO16D;
3122 else if (use_a_reloc)
3123 reloc = BFD_RELOC_PPC_VLE_LO16A;
3124 break;
3125
3126 case BFD_RELOC_HI16:
3127 if (use_d_reloc)
3128 reloc = BFD_RELOC_PPC_VLE_HI16D;
3129 else if (use_a_reloc)
3130 reloc = BFD_RELOC_PPC_VLE_HI16A;
3131 break;
3132
3133 case BFD_RELOC_HI16_S:
3134 if (use_d_reloc)
3135 reloc = BFD_RELOC_PPC_VLE_HA16D;
3136 else if (use_a_reloc)
3137 reloc = BFD_RELOC_PPC_VLE_HA16A;
3138 break;
3139
3140 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3141 if (use_d_reloc)
3142 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3143 break;
3144
3145 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3146 if (use_d_reloc)
3147 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3148 break;
3149
3150 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3151 if (use_d_reloc)
3152 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3153 break;
3154 }
3155 }
0baf16f2 3156 }
3b8b57a9
AM		 3157#endif /* OBJ_ELF */
3158
62ebcb5c 3159 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3160 ;
3161 /* Determine a BFD reloc value based on the operand information.
3162 We are only prepared to turn a few of the operands into
3163 relocs. */
a0593ad9
AM		 3164 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3165 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3166 && operand->bitm == 0x3fffffc
3167 && operand->shift == 0)
3168 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3169 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3170 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3171 && operand->bitm == 0xfffc
3172 && operand->shift == 0)
3173 reloc = BFD_RELOC_PPC_B16;
3174 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3175 && operand->bitm == 0x1fe
3176 && operand->shift == -1)
3177 reloc = BFD_RELOC_PPC_VLE_REL8;
3178 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3179 && operand->bitm == 0xfffe
3180 && operand->shift == 0)
3181 reloc = BFD_RELOC_PPC_VLE_REL15;
3182 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3183 && operand->bitm == 0x1fffffe
3184 && operand->shift == 0)
3185 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3186 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3187 && (operand->bitm & 0xfff0) == 0xfff0
3188 && operand->shift == 0)
3189 {
f50c47f1 3190 reloc = BFD_RELOC_16;
3e60bf4d 3191#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3192 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3193 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3194 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3195 {
3196 reloc = BFD_RELOC_PPC_TOC16;
3197#ifdef OBJ_ELF
3198 as_warn (_("assuming %s on symbol"),
3199 ppc_obj64 ? "@toc" : "@xgot");
3200#endif
3201 }
3b8b57a9 3202#endif
3b8b57a9 3203 }
a0593ad9
AM		 3204
3205 /* For the absolute forms of branches, convert the PC
3206 relative form back into the absolute. */
3207 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3208 {
3209 switch (reloc)
3210 {
3211 case BFD_RELOC_PPC_B26:
3212 reloc = BFD_RELOC_PPC_BA26;
3213 break;
3214 case BFD_RELOC_PPC_B16:
3215 reloc = BFD_RELOC_PPC_BA16;
3216 break;
3217#ifdef OBJ_ELF
3218 case BFD_RELOC_PPC_B16_BRTAKEN:
3219 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3220 break;
3221 case BFD_RELOC_PPC_B16_BRNTAKEN:
3222 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3223 break;
3224#endif
3225 default:
3226 break;
3227 }
3228 }
3229
3230#ifdef OBJ_ELF
3231 switch (reloc)
3232 {
3233 case BFD_RELOC_PPC_TOC16:
3234 toc_reloc_types |= has_small_toc_reloc;
3235 break;
3236 case BFD_RELOC_PPC64_TOC16_LO:
3237 case BFD_RELOC_PPC64_TOC16_HI:
3238 case BFD_RELOC_PPC64_TOC16_HA:
3239 toc_reloc_types |= has_large_toc_reloc;
3240 break;
3241 default:
3242 break;
3243 }
3244
3245 if (ppc_obj64
3246 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3247 {
3248 switch (reloc)
3249 {
3250 case BFD_RELOC_16:
3251 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3252 break;
3253 case BFD_RELOC_LO16:
3254 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3255 break;
3256 case BFD_RELOC_16_GOTOFF:
3257 reloc = BFD_RELOC_PPC64_GOT16_DS;
3258 break;
3259 case BFD_RELOC_LO16_GOTOFF:
3260 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3261 break;
3262 case BFD_RELOC_LO16_PLTOFF:
3263 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3264 break;
3265 case BFD_RELOC_16_BASEREL:
3266 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3267 break;
3268 case BFD_RELOC_LO16_BASEREL:
3269 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3270 break;
3271 case BFD_RELOC_PPC_TOC16:
3272 reloc = BFD_RELOC_PPC64_TOC16_DS;
3273 break;
3274 case BFD_RELOC_PPC64_TOC16_LO:
3275 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3276 break;
3277 case BFD_RELOC_PPC64_PLTGOT16:
3278 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3279 break;
3280 case BFD_RELOC_PPC64_PLTGOT16_LO:
3281 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3282 break;
3283 case BFD_RELOC_PPC_DTPREL16:
3284 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3285 break;
3286 case BFD_RELOC_PPC_DTPREL16_LO:
3287 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3288 break;
3289 case BFD_RELOC_PPC_TPREL16:
3290 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3291 break;
3292 case BFD_RELOC_PPC_TPREL16_LO:
3293 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3294 break;
3295 case BFD_RELOC_PPC_GOT_DTPREL16:
3296 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3297 case BFD_RELOC_PPC_GOT_TPREL16:
3298 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3299 break;
3300 default:
3301 as_bad (_("unsupported relocation for DS offset field"));
3302 break;
3303 }
3304 }
3305#endif
0baf16f2 3306
252b5132
RH		 3307 /* We need to generate a fixup for this expression. */
3308 if (fc >= MAX_INSN_FIXUPS)
3309 as_fatal (_("too many fixups"));
3310 fixups[fc].exp = ex;
727fc41e 3311 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3312 fixups[fc].reloc = reloc;
3313 ++fc;
3314 }
252b5132
RH		 3315
3316 if (need_paren)
3317 {
3318 endc = ')';
3319 need_paren = 0;
c3d65c1c
BE		 3320 /* If expecting more operands, then we want to see "),". */
3321 if (*str == endc && opindex_ptr[1] != 0)
3322 {
3323 do
3324 ++str;
3325 while (ISSPACE (*str));
3326 endc = ',';
3327 }
252b5132
RH		 3328 }
3329 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3330 {
3331 endc = '(';
3332 need_paren = 1;
3333 }
3334 else
3335 endc = ',';
3336
3337 /* The call to expression should have advanced str past any
3338 whitespace. */
3339 if (*str != endc
3340 && (endc != ',' || *str != '\0'))
3341 {
5a938047
AM		 3342 if (*str == '\0')
3343 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3344 else
3345 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3346 break;
3347 }
3348
3349 if (*str != '\0')
3350 ++str;
3351 }
3352
3882b010 3353 while (ISSPACE (*str))
252b5132
RH		 3354 ++str;
3355
3356 if (*str != '\0')
3357 as_bad (_("junk at end of line: `%s'"), str);
3358
dc1d03fc 3359#ifdef OBJ_ELF
b9c361e0 3360 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3361 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3362 && !ppc_obj64)
6a0c61b7
EZ		 3363 {
3364 /* These are all version "1". */
3365 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3366 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3367 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3368 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3369 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3370 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3371 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3372 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3373 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3374 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3375 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3376 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3377 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3378 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
fbd94057
MR		 3379 /* Only set the VLE flag if the instruction has been pulled via
3380 the VLE instruction set. This way the flag is guaranteed to
3381 be set for VLE-only instructions or for VLE-only processors,
3382 however it'll remain clear for dual-mode instructions on
3383 dual-mode and, more importantly, standard-mode processors. */
3384 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
b9c361e0 3385 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3386 }
dc1d03fc 3387#endif
6a0c61b7 3388
252b5132 3389 /* Write out the instruction. */
b9c361e0
JL		 3390 /* Differentiate between two and four byte insns. */
3391 if (ppc_mach () == bfd_mach_ppc_vle)
3392 {
3393 if (PPC_OP_SE_VLE (insn))
3394 insn_length = 2;
3395 else
3396 insn_length = 4;
3397 addr_mod = frag_now_fix () & 1;
3398 }
3399 else
3400 {
3401 insn_length = 4;
3402 addr_mod = frag_now_fix () & 3;
3403 }
3404 /* All instructions can start on a 2 byte boundary for VLE. */
3405 f = frag_more (insn_length);
09b935ac 3406 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3407 {
3408 if (ppc_mach() == bfd_mach_ppc_vle)
3409 as_bad (_("instruction address is not a multiple of 2"));
3410 else
3411 as_bad (_("instruction address is not a multiple of 4"));
3412 }
09b935ac
AM		 3413 frag_now->insn_addr = addr_mod;
3414 frag_now->has_code = 1;
b9c361e0 3415 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3416 last_insn = insn;
3417 last_seg = now_seg;
3418 last_subseg = now_subseg;
252b5132 3419
5d6f4f16 3420#ifdef OBJ_ELF
b9c361e0 3421 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3422#endif
3423
3b8b57a9 3424 /* Create any fixups. */
252b5132
RH		 3425 for (i = 0; i < fc; i++)
3426 {
3b8b57a9 3427 fixS *fixP;
62ebcb5c 3428 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3429 {
99a814a1 3430 reloc_howto_type *reloc_howto;
252b5132
RH		 3431 int size;
3432 int offset;
252b5132 3433
99a814a1 3434 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3435 if (!reloc_howto)
3436 abort ();
3437
3438 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3439 offset = target_big_endian ? (insn_length - size) : 0;
252b5132 3440
99a814a1
AM		 3441 fixP = fix_new_exp (frag_now,
3442 f - frag_now->fr_literal + offset,
3443 size,
3444 &fixups[i].exp,
3445 reloc_howto->pc_relative,
252b5132 3446 fixups[i].reloc);
252b5132
RH		 3447 }
3448 else
727fc41e
AM		 3449 {
3450 const struct powerpc_operand *operand;
3451
3452 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3453 fixP = fix_new_exp (frag_now,
3454 f - frag_now->fr_literal,
3455 insn_length,
3456 &fixups[i].exp,
3457 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3458 BFD_RELOC_NONE);
727fc41e 3459 }
3b8b57a9 3460 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3461 }
3462}
3463
3464/* Handle a macro. Gather all the operands, transform them as
3465 described by the macro, and call md_assemble recursively. All the
3466 operands are separated by commas; we don't accept parentheses
3467 around operands here. */
3468
3469static void
98027b10 3470ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3471{
3472 char *operands[10];
3473 unsigned int count;
3474 char *s;
3475 unsigned int len;
3476 const char *format;
db557034 3477 unsigned int arg;
252b5132
RH		 3478 char *send;
3479 char *complete;
3480
3481 /* Gather the users operands into the operands array. */
3482 count = 0;
3483 s = str;
3484 while (1)
3485 {
3486 if (count >= sizeof operands / sizeof operands[0])
3487 break;
3488 operands[count++] = s;
3489 s = strchr (s, ',');
3490 if (s == (char *) NULL)
3491 break;
3492 *s++ = '\0';
81d4177b 3493 }
252b5132
RH		 3494
3495 if (count != macro->operands)
3496 {
3497 as_bad (_("wrong number of operands"));
3498 return;
3499 }
3500
3501 /* Work out how large the string must be (the size is unbounded
3502 because it includes user input). */
3503 len = 0;
3504 format = macro->format;
3505 while (*format != '\0')
3506 {
3507 if (*format != '%')
3508 {
3509 ++len;
3510 ++format;
3511 }
3512 else
3513 {
3514 arg = strtol (format + 1, &send, 10);
db557034 3515 know (send != format && arg < count);
252b5132
RH		 3516 len += strlen (operands[arg]);
3517 format = send;
3518 }
3519 }
3520
3521 /* Put the string together. */
3522 complete = s = (char *) alloca (len + 1);
3523 format = macro->format;
3524 while (*format != '\0')
3525 {
3526 if (*format != '%')
3527 *s++ = *format++;
3528 else
3529 {
3530 arg = strtol (format + 1, &send, 10);
3531 strcpy (s, operands[arg]);
3532 s += strlen (s);
3533 format = send;
3534 }
3535 }
3536 *s = '\0';
3537
3538 /* Assemble the constructed instruction. */
3539 md_assemble (complete);
81d4177b 3540}
252b5132
RH		 3541\f
3542#ifdef OBJ_ELF
18ae9cc1 3543/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3544
3545int
98027b10 3546ppc_section_type (char *str, size_t len)
252b5132 3547{
9de8d8f1
RH		 3548 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3549 return SHT_ORDERED;
252b5132 3550
9de8d8f1 3551 return -1;
252b5132
RH		 3552}
3553
3554int
1239de13 3555ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3556{
3557 if (type == SHT_ORDERED)
3558 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3559
252b5132
RH		 3560 return flags;
3561}
3562#endif /* OBJ_ELF */
3563
3564\f
3565/* Pseudo-op handling. */
3566
3567/* The .byte pseudo-op. This is similar to the normal .byte
3568 pseudo-op, but it can also take a single ASCII string. */
3569
3570static void
98027b10 3571ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3572{
bf7279d5
AM		 3573 int count = 0;
3574
252b5132
RH		 3575 if (*input_line_pointer != '\"')
3576 {
3577 cons (1);
3578 return;
3579 }
3580
3581 /* Gather characters. A real double quote is doubled. Unusual
3582 characters are not permitted. */
3583 ++input_line_pointer;
3584 while (1)
3585 {
3586 char c;
3587
3588 c = *input_line_pointer++;
3589
3590 if (c == '\"')
3591 {
3592 if (*input_line_pointer != '\"')
3593 break;
3594 ++input_line_pointer;
3595 }
3596
3597 FRAG_APPEND_1_CHAR (c);
bf7279d5 3598 ++count;
252b5132
RH		 3599 }
3600
bf7279d5
AM		 3601 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3602 as_warn (_("data in executable section"));
252b5132
RH		 3603 demand_empty_rest_of_line ();
3604}
3605\f
3606#ifdef OBJ_XCOFF
3607
3608/* XCOFF specific pseudo-op handling. */
3609
3610/* This is set if we are creating a .stabx symbol, since we don't want
3611 to handle symbol suffixes for such symbols. */
b34976b6 3612static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3613
3614/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3615 symbols in the .bss segment as though they were local common
67c1ffbe 3616 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3617 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3618
3619static void
98027b10 3620ppc_comm (int lcomm)
252b5132
RH		 3621{
3622 asection *current_seg = now_seg;
3623 subsegT current_subseg = now_subseg;
3624 char *name;
3625 char endc;
3626 char *end_name;
3627 offsetT size;
3628 offsetT align;
3629 symbolS *lcomm_sym = NULL;
3630 symbolS *sym;
3631 char *pfrag;
3632
3633 name = input_line_pointer;
3634 endc = get_symbol_end ();
3635 end_name = input_line_pointer;
3636 *end_name = endc;
3637
3638 if (*input_line_pointer != ',')
3639 {
3640 as_bad (_("missing size"));
3641 ignore_rest_of_line ();
3642 return;
3643 }
3644 ++input_line_pointer;
3645
3646 size = get_absolute_expression ();
3647 if (size < 0)
3648 {
3649 as_bad (_("negative size"));
3650 ignore_rest_of_line ();
3651 return;
3652 }
3653
3654 if (! lcomm)
3655 {
3656 /* The third argument to .comm is the alignment. */
3657 if (*input_line_pointer != ',')
1ad63b2f 3658 align = 2;
252b5132
RH		 3659 else
3660 {
3661 ++input_line_pointer;
3662 align = get_absolute_expression ();
3663 if (align <= 0)
3664 {
3665 as_warn (_("ignoring bad alignment"));
1ad63b2f 3666 align = 2;
252b5132
RH		 3667 }
3668 }
3669 }
3670 else
3671 {
3672 char *lcomm_name;
3673 char lcomm_endc;
3674
252b5132
RH		 3675 /* The third argument to .lcomm appears to be the real local
3676 common symbol to create. References to the symbol named in
3677 the first argument are turned into references to the third
3678 argument. */
3679 if (*input_line_pointer != ',')
3680 {
3681 as_bad (_("missing real symbol name"));
3682 ignore_rest_of_line ();
3683 return;
3684 }
3685 ++input_line_pointer;
3686
3687 lcomm_name = input_line_pointer;
3688 lcomm_endc = get_symbol_end ();
81d4177b 3689
252b5132
RH		 3690 lcomm_sym = symbol_find_or_make (lcomm_name);
3691
3692 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3693
3694 /* The fourth argument to .lcomm is the alignment. */
3695 if (*input_line_pointer != ',')
3696 {
3697 if (size <= 4)
3698 align = 2;
3699 else
3700 align = 3;
3701 }
3702 else
3703 {
3704 ++input_line_pointer;
3705 align = get_absolute_expression ();
3706 if (align <= 0)
3707 {
3708 as_warn (_("ignoring bad alignment"));
3709 align = 2;
3710 }
3711 }
252b5132
RH		 3712 }
3713
3714 *end_name = '\0';
3715 sym = symbol_find_or_make (name);
3716 *end_name = endc;
3717
3718 if (S_IS_DEFINED (sym)
3719 || S_GET_VALUE (sym) != 0)
3720 {
3721 as_bad (_("attempt to redefine symbol"));
3722 ignore_rest_of_line ();
3723 return;
3724 }
81d4177b 3725
252b5132 3726 record_alignment (bss_section, align);
81d4177b 3727
252b5132
RH		 3728 if (! lcomm
3729 || ! S_IS_DEFINED (lcomm_sym))
3730 {
3731 symbolS *def_sym;
3732 offsetT def_size;
3733
3734 if (! lcomm)
3735 {
3736 def_sym = sym;
3737 def_size = size;
3738 S_SET_EXTERNAL (sym);
3739 }
3740 else
3741 {
809ffe0d 3742 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3743 def_sym = lcomm_sym;
3744 def_size = 0;
3745 }
3746
3747 subseg_set (bss_section, 1);
3748 frag_align (align, 0, 0);
81d4177b 3749
809ffe0d 3750 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3751 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3752 def_size, (char *) NULL);
3753 *pfrag = 0;
3754 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3755 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3756 }
3757 else if (lcomm)
3758 {
3759 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3760 symbol_get_frag (lcomm_sym)->fr_offset =
3761 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3762 &~ ((1 << align) - 1));
809ffe0d
ILT		 3763 if (align > symbol_get_tc (lcomm_sym)->align)
3764 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3765 }
3766
3767 if (lcomm)
3768 {
3769 /* Make sym an offset from lcomm_sym. */
3770 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3771 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3772 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3773 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3774 }
3775
3776 subseg_set (current_seg, current_subseg);
3777
3778 demand_empty_rest_of_line ();
3779}
3780
3781/* The .csect pseudo-op. This switches us into a different
3782 subsegment. The first argument is a symbol whose value is the
3783 start of the .csect. In COFF, csect symbols get special aux
3784 entries defined by the x_csect field of union internal_auxent. The
3785 optional second argument is the alignment (the default is 2). */
3786
3787static void
98027b10 3788ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3789{
3790 char *name;
3791 char endc;
3792 symbolS *sym;
931e13a6 3793 offsetT align;
252b5132
RH		 3794
3795 name = input_line_pointer;
3796 endc = get_symbol_end ();
81d4177b 3797
252b5132
RH		 3798 sym = symbol_find_or_make (name);
3799
3800 *input_line_pointer = endc;
3801
3802 if (S_GET_NAME (sym)[0] == '\0')
3803 {
3804 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3805 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3806 }
3807
931e13a6 3808 align = 2;
252b5132
RH		 3809 if (*input_line_pointer == ',')
3810 {
3811 ++input_line_pointer;
931e13a6 3812 align = get_absolute_expression ();
252b5132
RH		 3813 }
3814
931e13a6
AM		 3815 ppc_change_csect (sym, align);
3816
252b5132
RH		 3817 demand_empty_rest_of_line ();
3818}
3819
3820/* Change to a different csect. */
3821
3822static void
98027b10 3823ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3824{
3825 if (S_IS_DEFINED (sym))
809ffe0d 3826 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3827 else
3828 {
3829 symbolS **list_ptr;
3830 int after_toc;
3831 int hold_chunksize;
3832 symbolS *list;
931e13a6
AM		 3833 int is_code;
3834 segT sec;
252b5132
RH		 3835
3836 /* This is a new csect. We need to look at the symbol class to
3837 figure out whether it should go in the text section or the
3838 data section. */
3839 after_toc = 0;
931e13a6 3840 is_code = 0;
96d56e9f 3841 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3842 {
3843 case XMC_PR:
3844 case XMC_RO:
3845 case XMC_DB:
3846 case XMC_GL:
3847 case XMC_XO:
3848 case XMC_SV:
3849 case XMC_TI:
3850 case XMC_TB:
3851 S_SET_SEGMENT (sym, text_section);
809ffe0d 3852 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3853 ++ppc_text_subsegment;
3854 list_ptr = &ppc_text_csects;
931e13a6 3855 is_code = 1;
252b5132
RH		 3856 break;
3857 case XMC_RW:
3858 case XMC_TC0:
3859 case XMC_TC:
3860 case XMC_DS:
3861 case XMC_UA:
3862 case XMC_BS:
3863 case XMC_UC:
3864 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3865 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3866 == ppc_data_subsegment))
252b5132
RH		 3867 after_toc = 1;
3868 S_SET_SEGMENT (sym, data_section);
809ffe0d 3869 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3870 ++ppc_data_subsegment;
3871 list_ptr = &ppc_data_csects;
3872 break;
3873 default:
3874 abort ();
3875 }
3876
3877 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3878 changing subsegments, so that we don't use a lot of memory
3879 space for what may be a small section. */
252b5132
RH		 3880 hold_chunksize = chunksize;
3881 chunksize = 64;
3882
931e13a6
AM		 3883 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3884 symbol_get_tc (sym)->subseg);
252b5132
RH		 3885
3886 chunksize = hold_chunksize;
3887
3888 if (after_toc)
3889 ppc_after_toc_frag = frag_now;
3890
931e13a6
AM		 3891 record_alignment (sec, align);
3892 if (is_code)
3893 frag_align_code (align, 0);
3894 else
3895 frag_align (align, 0, 0);
3896
809ffe0d 3897 symbol_set_frag (sym, frag_now);
252b5132
RH		 3898 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3899
931e13a6 3900 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3901 symbol_get_tc (sym)->output = 1;
3902 symbol_get_tc (sym)->within = sym;
81d4177b 3903
252b5132 3904 for (list = *list_ptr;
809ffe0d
ILT		 3905 symbol_get_tc (list)->next != (symbolS *) NULL;
3906 list = symbol_get_tc (list)->next)
252b5132 3907 ;
809ffe0d 3908 symbol_get_tc (list)->next = sym;
81d4177b 3909
252b5132 3910 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3911 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3912 &symbol_lastP);
252b5132
RH		 3913 }
3914
3915 ppc_current_csect = sym;
3916}
3917
85645aed
TG		 3918static void
3919ppc_change_debug_section (unsigned int idx, subsegT subseg)
3920{
3921 segT sec;
3922 flagword oldflags;
3923 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3924
3925 sec = subseg_new (dw->name, subseg);
3926 oldflags = bfd_get_section_flags (stdoutput, sec);
3927 if (oldflags == SEC_NO_FLAGS)
3928 {
3929 /* Just created section. */
3930 gas_assert (dw_sections[idx].sect == NULL);
3931
3932 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3933 bfd_set_section_alignment (stdoutput, sec, 0);
3934 dw_sections[idx].sect = sec;
3935 }
3936
3937 /* Not anymore in a csect. */
3938 ppc_current_csect = NULL;
3939}
3940
3941/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3942 .dwsect flag [, opt-label ]
3943*/
3944
3945static void
3946ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3947{
3948 offsetT flag;
3949 symbolS *opt_label;
3950 const struct xcoff_dwsect_name *dw;
3951 struct dw_subsection *subseg;
3952 struct dw_section *dws;
3953 int i;
3954
3955 /* Find section. */
3956 flag = get_absolute_expression ();
3957 dw = NULL;
3958 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3959 if (xcoff_dwsect_names[i].flag == flag)
3960 {
3961 dw = &xcoff_dwsect_names[i];
3962 break;
3963 }
3964
3965 /* Parse opt-label. */
3966 if (*input_line_pointer == ',')
3967 {
3968 const char *label;
3969 char c;
3970
3971 ++input_line_pointer;
3972
3973 label = input_line_pointer;
3974 c = get_symbol_end ();
3975 opt_label = symbol_find_or_make (label);
3976 *input_line_pointer = c;
3977 }
3978 else
3979 opt_label = NULL;
3980
3981 demand_empty_rest_of_line ();
3982
3983 /* Return now in case of unknown subsection. */
3984 if (dw == NULL)
3985 {
d6ed37ed 3986 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3987 (unsigned)flag);
3988 return;
3989 }
3990
3991 /* Find the subsection. */
3992 dws = &dw_sections[i];
3993 subseg = NULL;
3994 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3995 {
3996 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3997 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3998 {
3999 as_bad (_("label %s was not defined in this dwarf section"),
4000 S_GET_NAME (opt_label));
4001 subseg = dws->anon_subseg;
4002 opt_label = NULL;
4003 }
4004 else
4005 subseg = symbol_get_tc (opt_label)->u.dw;
4006 }
4007
4008 if (subseg != NULL)
4009 {
4010 /* Switch to the subsection. */
4011 ppc_change_debug_section (i, subseg->subseg);
4012 }
4013 else
4014 {
4015 /* Create a new dw subsection. */
4016 subseg = (struct dw_subsection *)
4017 xmalloc (sizeof (struct dw_subsection));
4018
4019 if (opt_label == NULL)
4020 {
4021 /* The anonymous one. */
4022 subseg->subseg = 0;
4023 subseg->link = NULL;
4024 dws->anon_subseg = subseg;
4025 }
4026 else
4027 {
4028 /* A named one. */
4029 if (dws->list_subseg != NULL)
4030 subseg->subseg = dws->list_subseg->subseg + 1;
4031 else
4032 subseg->subseg = 1;
4033
4034 subseg->link = dws->list_subseg;
4035 dws->list_subseg = subseg;
4036 symbol_get_tc (opt_label)->u.dw = subseg;
4037 }
4038
4039 ppc_change_debug_section (i, subseg->subseg);
4040
4041 if (dw->def_size)
4042 {
4043 /* Add the length field. */
4044 expressionS *exp = &subseg->end_exp;
4045 int sz;
4046
4047 if (opt_label != NULL)
4048 symbol_set_value_now (opt_label);
4049
4050 /* Add the length field. Note that according to the AIX assembler
4051 manual, the size of the length field is 4 for powerpc32 but
4052 12 for powerpc64. */
4053 if (ppc_obj64)
4054 {
4055 /* Write the 64bit marker. */
4056 md_number_to_chars (frag_more (4), -1, 4);
4057 }
4058
4059 exp->X_op = O_subtract;
4060 exp->X_op_symbol = symbol_temp_new_now ();
4061 exp->X_add_symbol = symbol_temp_make ();
4062
4063 sz = ppc_obj64 ? 8 : 4;
4064 exp->X_add_number = -sz;
4065 emit_expr (exp, sz);
4066 }
4067 }
4068}
4069
252b5132
RH		 4070/* This function handles the .text and .data pseudo-ops. These
4071 pseudo-ops aren't really used by XCOFF; we implement them for the
4072 convenience of people who aren't used to XCOFF. */
4073
4074static void
98027b10 4075ppc_section (int type)
252b5132
RH		 4076{
4077 const char *name;
4078 symbolS *sym;
4079
4080 if (type == 't')
4081 name = ".text[PR]";
4082 else if (type == 'd')
4083 name = ".data[RW]";
4084 else
4085 abort ();
4086
4087 sym = symbol_find_or_make (name);
4088
931e13a6 4089 ppc_change_csect (sym, 2);
252b5132
RH		 4090
4091 demand_empty_rest_of_line ();
4092}
4093
4094/* This function handles the .section pseudo-op. This is mostly to
4095 give an error, since XCOFF only supports .text, .data and .bss, but
4096 we do permit the user to name the text or data section. */
4097
4098static void
98027b10 4099ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4100{
4101 char *user_name;
4102 const char *real_name;
4103 char c;
4104 symbolS *sym;
4105
4106 user_name = input_line_pointer;
4107 c = get_symbol_end ();
4108
4109 if (strcmp (user_name, ".text") == 0)
4110 real_name = ".text[PR]";
4111 else if (strcmp (user_name, ".data") == 0)
4112 real_name = ".data[RW]";
4113 else
4114 {
d6ed37ed 4115 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4116 *input_line_pointer = c;
4117 ignore_rest_of_line ();
4118 return;
4119 }
4120
4121 *input_line_pointer = c;
4122
4123 sym = symbol_find_or_make (real_name);
4124
931e13a6 4125 ppc_change_csect (sym, 2);
252b5132
RH		 4126
4127 demand_empty_rest_of_line ();
4128}
4129
4130/* The .extern pseudo-op. We create an undefined symbol. */
4131
4132static void
98027b10 4133ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4134{
4135 char *name;
4136 char endc;
4137
4138 name = input_line_pointer;
4139 endc = get_symbol_end ();
4140
4141 (void) symbol_find_or_make (name);
4142
4143 *input_line_pointer = endc;
4144
4145 demand_empty_rest_of_line ();
4146}
4147
4148/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4149
4150static void
98027b10 4151ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4152{
4153 char *name;
4154 char endc;
4155 symbolS *sym;
4156
4157 name = input_line_pointer;
4158 endc = get_symbol_end ();
4159
4160 sym = symbol_find_or_make (name);
4161
4162 *input_line_pointer = endc;
4163
809ffe0d 4164 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4165
4166 demand_empty_rest_of_line ();
4167}
4168
c865e45b
RS		 4169/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4170 relocations at the beginning of the current csect.
4171
4172 (In principle, there's no reason why the relocations _have_ to be at
4173 the beginning. Anywhere in the csect would do. However, inserting
4174 at the beginning is what the native assmebler does, and it helps to
4175 deal with cases where the .ref statements follow the section contents.)
4176
4177 ??? .refs don't work for empty .csects. However, the native assembler
4178 doesn't report an error in this case, and neither yet do we. */
4179
4180static void
4181ppc_ref (int ignore ATTRIBUTE_UNUSED)
4182{
4183 char *name;
4184 char c;
4185
4186 if (ppc_current_csect == NULL)
4187 {
4188 as_bad (_(".ref outside .csect"));
4189 ignore_rest_of_line ();
4190 return;
4191 }
4192
4193 do
4194 {
4195 name = input_line_pointer;
4196 c = get_symbol_end ();
4197
4198 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4199 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4200
4201 *input_line_pointer = c;
4202 SKIP_WHITESPACE ();
4203 c = *input_line_pointer;
4204 if (c == ',')
4205 {
4206 input_line_pointer++;
4207 SKIP_WHITESPACE ();
4208 if (is_end_of_line[(unsigned char) *input_line_pointer])
4209 {
4210 as_bad (_("missing symbol name"));
4211 ignore_rest_of_line ();
4212 return;
4213 }
4214 }
4215 }
4216 while (c == ',');
4217
4218 demand_empty_rest_of_line ();
4219}
4220
252b5132
RH		 4221/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4222 although I don't know why it bothers. */
4223
4224static void
98027b10 4225ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4226{
4227 char *name;
4228 char endc;
4229 symbolS *sym;
4230 int len;
4231
4232 name = input_line_pointer;
4233 endc = get_symbol_end ();
4234
4235 sym = symbol_find_or_make (name);
4236
4237 *input_line_pointer = endc;
4238
4239 if (*input_line_pointer != ',')
4240 {
4241 as_bad (_("missing rename string"));
4242 ignore_rest_of_line ();
4243 return;
4244 }
4245 ++input_line_pointer;
4246
809ffe0d 4247 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4248
4249 demand_empty_rest_of_line ();
4250}
4251
4252/* The .stabx pseudo-op. This is similar to a normal .stabs
4253 pseudo-op, but slightly different. A sample is
4254 .stabx "main:F-1",.main,142,0
4255 The first argument is the symbol name to create. The second is the
4256 value, and the third is the storage class. The fourth seems to be
4257 always zero, and I am assuming it is the type. */
4258
4259static void
98027b10 4260ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4261{
4262 char *name;
4263 int len;
4264 symbolS *sym;
4265 expressionS exp;
4266
4267 name = demand_copy_C_string (&len);
4268
4269 if (*input_line_pointer != ',')
4270 {
4271 as_bad (_("missing value"));
4272 return;
4273 }
4274 ++input_line_pointer;
4275
b34976b6 4276 ppc_stab_symbol = TRUE;
252b5132 4277 sym = symbol_make (name);
b34976b6 4278 ppc_stab_symbol = FALSE;
252b5132 4279
809ffe0d 4280 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4281
4282 (void) expression (&exp);
4283
4284 switch (exp.X_op)
4285 {
4286 case O_illegal:
4287 case O_absent:
4288 case O_big:
4289 as_bad (_("illegal .stabx expression; zero assumed"));
4290 exp.X_add_number = 0;
4291 /* Fall through. */
4292 case O_constant:
4293 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4294 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4295 break;
4296
4297 case O_symbol:
4298 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4299 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4300 else
4301 {
4302 S_SET_VALUE (sym,
4303 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4304 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4305 }
4306 break;
4307
4308 default:
4309 /* The value is some complex expression. This will probably
99a814a1
AM		 4310 fail at some later point, but this is probably the right
4311 thing to do here. */
809ffe0d 4312 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4313 break;
4314 }
4315
4316 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4317 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4318
4319 if (*input_line_pointer != ',')
4320 {
4321 as_bad (_("missing class"));
4322 return;
4323 }
4324 ++input_line_pointer;
4325
4326 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4327
4328 if (*input_line_pointer != ',')
4329 {
4330 as_bad (_("missing type"));
4331 return;
4332 }
4333 ++input_line_pointer;
4334
4335 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4336
809ffe0d 4337 symbol_get_tc (sym)->output = 1;
252b5132 4338
c734e7e3
TG		 4339 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4340 {
4341 /* In this case :
252b5132 4342
c734e7e3
TG		 4343 .bs name
4344 .stabx "z",arrays_,133,0
4345 .es
99a814a1 4346
c734e7e3 4347 .comm arrays_,13768,3
99a814a1 4348
c734e7e3
TG		 4349 resolve_symbol_value will copy the exp's "within" into sym's when the
4350 offset is 0. Since this seems to be corner case problem,
4351 only do the correction for storage class C_STSYM. A better solution
4352 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4353
c734e7e3
TG		 4354 if (exp.X_op == O_symbol)
4355 {
4356 if (ppc_current_block == NULL)
4357 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4358
c734e7e3
TG		 4359 symbol_get_tc (sym)->within = ppc_current_block;
4360 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4361 }
4362 }
99a814a1 4363
252b5132
RH		 4364 if (exp.X_op != O_symbol
4365 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4366 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4367 ppc_frob_label (sym);
4368 else
4369 {
4370 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4371 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4372 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4373 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4374 }
4375
4376 demand_empty_rest_of_line ();
4377}
4378
4379/* The .function pseudo-op. This takes several arguments. The first
4380 argument seems to be the external name of the symbol. The second
67c1ffbe 4381 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4382 uses the same name for both. I have no idea what the third and
4383 fourth arguments are meant to be. The optional fifth argument is
4384 an expression for the size of the function. In COFF this symbol
4385 gets an aux entry like that used for a csect. */
4386
4387static void
98027b10 4388ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4389{
4390 char *name;
4391 char endc;
4392 char *s;
4393 symbolS *ext_sym;
4394 symbolS *lab_sym;
4395
4396 name = input_line_pointer;
4397 endc = get_symbol_end ();
4398
4399 /* Ignore any [PR] suffix. */
4400 name = ppc_canonicalize_symbol_name (name);
4401 s = strchr (name, '[');
4402 if (s != (char *) NULL
4403 && strcmp (s + 1, "PR]") == 0)
4404 *s = '\0';
4405
4406 ext_sym = symbol_find_or_make (name);
4407
4408 *input_line_pointer = endc;
4409
4410 if (*input_line_pointer != ',')
4411 {
4412 as_bad (_("missing symbol name"));
4413 ignore_rest_of_line ();
4414 return;
4415 }
4416 ++input_line_pointer;
4417
4418 name = input_line_pointer;
4419 endc = get_symbol_end ();
4420
4421 lab_sym = symbol_find_or_make (name);
4422
4423 *input_line_pointer = endc;
4424
4425 if (ext_sym != lab_sym)
4426 {
809ffe0d
ILT		 4427 expressionS exp;
4428
4429 exp.X_op = O_symbol;
4430 exp.X_add_symbol = lab_sym;
4431 exp.X_op_symbol = NULL;
4432 exp.X_add_number = 0;
4433 exp.X_unsigned = 0;
4434 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4435 }
4436
96d56e9f
NC		 4437 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4438 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4439 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4440
4441 if (*input_line_pointer == ',')
4442 {
91d6fa6a 4443 expressionS exp;
252b5132
RH		 4444
4445 /* Ignore the third argument. */
4446 ++input_line_pointer;
91d6fa6a 4447 expression (& exp);
252b5132
RH		 4448 if (*input_line_pointer == ',')
4449 {
4450 /* Ignore the fourth argument. */
4451 ++input_line_pointer;
91d6fa6a 4452 expression (& exp);
252b5132
RH		 4453 if (*input_line_pointer == ',')
4454 {
4455 /* The fifth argument is the function size. */
4456 ++input_line_pointer;
85645aed
TG		 4457 symbol_get_tc (ext_sym)->u.size = symbol_new
4458 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4459 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4460 }
4461 }
4462 }
4463
4464 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4465 SF_SET_FUNCTION (ext_sym);
4466 SF_SET_PROCESS (ext_sym);
4467 coff_add_linesym (ext_sym);
4468
4469 demand_empty_rest_of_line ();
4470}
4471
4472/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4473 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4474 with the correct line number */
5d6255fe 4475
8642cce8 4476static symbolS *saved_bi_sym = 0;
252b5132
RH		 4477
4478static void
98027b10 4479ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4480{
4481 symbolS *sym;
4482
4483 sym = symbol_make (".bf");
4484 S_SET_SEGMENT (sym, text_section);
809ffe0d 4485 symbol_set_frag (sym, frag_now);
252b5132
RH		 4486 S_SET_VALUE (sym, frag_now_fix ());
4487 S_SET_STORAGE_CLASS (sym, C_FCN);
4488
4489 coff_line_base = get_absolute_expression ();
4490
4491 S_SET_NUMBER_AUXILIARY (sym, 1);
4492 SA_SET_SYM_LNNO (sym, coff_line_base);
4493
8642cce8 4494 /* Line number for bi. */
5d6255fe 4495 if (saved_bi_sym)
8642cce8
TR		 4496 {
4497 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4498 saved_bi_sym = 0;
4499 }
5d6255fe 4500
8642cce8 4501
809ffe0d 4502 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4503
4504 ppc_frob_label (sym);
4505
4506 demand_empty_rest_of_line ();
4507}
4508
4509/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4510 ".ef", except that the line number is absolute, not relative to the
4511 most recent ".bf" symbol. */
4512
4513static void
98027b10 4514ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4515{
4516 symbolS *sym;
4517
4518 sym = symbol_make (".ef");
4519 S_SET_SEGMENT (sym, text_section);
809ffe0d 4520 symbol_set_frag (sym, frag_now);
252b5132
RH		 4521 S_SET_VALUE (sym, frag_now_fix ());
4522 S_SET_STORAGE_CLASS (sym, C_FCN);
4523 S_SET_NUMBER_AUXILIARY (sym, 1);
4524 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4525 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4526
4527 ppc_frob_label (sym);
4528
4529 demand_empty_rest_of_line ();
4530}
4531
4532/* The .bi and .ei pseudo-ops. These take a string argument and
4533 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4534 the symbol list. The value of .bi will be know when the next .bf
4535 is encountered. */
252b5132
RH		 4536
4537static void
98027b10 4538ppc_biei (int ei)
252b5132
RH		 4539{
4540 static symbolS *last_biei;
4541
4542 char *name;
4543 int len;
4544 symbolS *sym;
4545 symbolS *look;
4546
4547 name = demand_copy_C_string (&len);
4548
4549 /* The value of these symbols is actually file offset. Here we set
4550 the value to the index into the line number entries. In
4551 ppc_frob_symbols we set the fix_line field, which will cause BFD
4552 to do the right thing. */
4553
4554 sym = symbol_make (name);
4555 /* obj-coff.c currently only handles line numbers correctly in the
4556 .text section. */
4557 S_SET_SEGMENT (sym, text_section);
4558 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4559 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4560
4561 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4562 symbol_get_tc (sym)->output = 1;
81d4177b 4563
8642cce8 4564 /* Save bi. */
5d6255fe 4565 if (ei)
8642cce8
TR		 4566 saved_bi_sym = 0;
4567 else
4568 saved_bi_sym = sym;
4569
252b5132
RH		 4570 for (look = last_biei ? last_biei : symbol_rootP;
4571 (look != (symbolS *) NULL
4572 && (S_GET_STORAGE_CLASS (look) == C_FILE
4573 || S_GET_STORAGE_CLASS (look) == C_BINCL
4574 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4575 look = symbol_next (look))
4576 ;
4577 if (look != (symbolS *) NULL)
4578 {
4579 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4580 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4581 last_biei = sym;
4582 }
4583
4584 demand_empty_rest_of_line ();
4585}
4586
4587/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4588 There is one argument, which is a csect symbol. The value of the
4589 .bs symbol is the index of this csect symbol. */
4590
4591static void
98027b10 4592ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4593{
4594 char *name;
4595 char endc;
4596 symbolS *csect;
4597 symbolS *sym;
4598
4599 if (ppc_current_block != NULL)
4600 as_bad (_("nested .bs blocks"));
4601
4602 name = input_line_pointer;
4603 endc = get_symbol_end ();
4604
4605 csect = symbol_find_or_make (name);
4606
4607 *input_line_pointer = endc;
4608
4609 sym = symbol_make (".bs");
4610 S_SET_SEGMENT (sym, now_seg);
4611 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4612 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4613 symbol_get_tc (sym)->output = 1;
252b5132 4614
809ffe0d 4615 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4616
4617 ppc_frob_label (sym);
4618
4619 ppc_current_block = sym;
4620
4621 demand_empty_rest_of_line ();
4622}
4623
4624/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4625
4626static void
98027b10 4627ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4628{
4629 symbolS *sym;
4630
4631 if (ppc_current_block == NULL)
4632 as_bad (_(".es without preceding .bs"));
4633
4634 sym = symbol_make (".es");
4635 S_SET_SEGMENT (sym, now_seg);
4636 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4637 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4638 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4639
4640 ppc_frob_label (sym);
4641
4642 ppc_current_block = NULL;
4643
4644 demand_empty_rest_of_line ();
4645}
4646
4647/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4648 line number. */
4649
4650static void
98027b10 4651ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4652{
4653 symbolS *sym;
4654
4655 sym = symbol_make (".bb");
4656 S_SET_SEGMENT (sym, text_section);
809ffe0d 4657 symbol_set_frag (sym, frag_now);
252b5132
RH		 4658 S_SET_VALUE (sym, frag_now_fix ());
4659 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4660
4661 S_SET_NUMBER_AUXILIARY (sym, 1);
4662 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4663
809ffe0d 4664 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4665
4666 SF_SET_PROCESS (sym);
4667
4668 ppc_frob_label (sym);
4669
4670 demand_empty_rest_of_line ();
4671}
4672
4673/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4674 line number. */
4675
4676static void
98027b10 4677ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4678{
4679 symbolS *sym;
4680
4681 sym = symbol_make (".eb");
4682 S_SET_SEGMENT (sym, text_section);
809ffe0d 4683 symbol_set_frag (sym, frag_now);
252b5132
RH		 4684 S_SET_VALUE (sym, frag_now_fix ());
4685 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4686 S_SET_NUMBER_AUXILIARY (sym, 1);
4687 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4688 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4689
4690 SF_SET_PROCESS (sym);
4691
4692 ppc_frob_label (sym);
4693
4694 demand_empty_rest_of_line ();
4695}
4696
4697/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4698 specified name. */
4699
4700static void
98027b10 4701ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4702{
4703 char *name;
4704 int len;
4705 symbolS *sym;
4706
4707 name = demand_copy_C_string (&len);
4708 sym = symbol_make (name);
4709 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4710 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4711 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4712 S_SET_VALUE (sym, 0);
809ffe0d 4713 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4714
4715 ppc_frob_label (sym);
4716
4717 demand_empty_rest_of_line ();
4718}
4719
4720/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4721
4722static void
98027b10 4723ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4724{
4725 symbolS *sym;
4726
4727 sym = symbol_make (".ec");
4728 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4729 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4730 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4731 S_SET_VALUE (sym, 0);
809ffe0d 4732 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4733
4734 ppc_frob_label (sym);
4735
4736 demand_empty_rest_of_line ();
4737}
4738
4739/* The .toc pseudo-op. Switch to the .toc subsegment. */
4740
4741static void
98027b10 4742ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4743{
4744 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4745 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4746 else
4747 {
4748 subsegT subseg;
4749 symbolS *sym;
4750 symbolS *list;
81d4177b 4751
252b5132
RH		 4752 subseg = ppc_data_subsegment;
4753 ++ppc_data_subsegment;
4754
4755 subseg_new (segment_name (data_section), subseg);
4756 ppc_toc_frag = frag_now;
4757
4758 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4759 symbol_set_frag (sym, frag_now);
252b5132
RH		 4760 S_SET_SEGMENT (sym, data_section);
4761 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4762 symbol_get_tc (sym)->subseg = subseg;
4763 symbol_get_tc (sym)->output = 1;
4764 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4765
4766 ppc_toc_csect = sym;
81d4177b 4767
252b5132 4768 for (list = ppc_data_csects;
809ffe0d
ILT		 4769 symbol_get_tc (list)->next != (symbolS *) NULL;
4770 list = symbol_get_tc (list)->next)
252b5132 4771 ;
809ffe0d 4772 symbol_get_tc (list)->next = sym;
252b5132
RH		 4773
4774 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4775 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4776 &symbol_lastP);
252b5132
RH		 4777 }
4778
4779 ppc_current_csect = ppc_toc_csect;
4780
4781 demand_empty_rest_of_line ();
4782}
4783
4784/* The AIX assembler automatically aligns the operands of a .long or
4785 .short pseudo-op, and we want to be compatible. */
4786
4787static void
98027b10 4788ppc_xcoff_cons (int log_size)
252b5132
RH		 4789{
4790 frag_align (log_size, 0, 0);
4791 record_alignment (now_seg, log_size);
4792 cons (1 << log_size);
4793}
4794
4795static void
98027b10 4796ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4797{
4798 expressionS exp;
4799 int byte_count;
4800
4801 (void) expression (&exp);
4802
4803 if (exp.X_op != O_constant)
4804 {
4805 as_bad (_("non-constant byte count"));
4806 return;
4807 }
4808
4809 byte_count = exp.X_add_number;
4810
4811 if (*input_line_pointer != ',')
4812 {
4813 as_bad (_("missing value"));
4814 return;
4815 }
4816
4817 ++input_line_pointer;
4818 cons (byte_count);
4819}
4820
85645aed
TG		 4821void
4822ppc_xcoff_end (void)
4823{
4824 int i;
4825
4826 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4827 {
4828 struct dw_section *dws = &dw_sections[i];
4829 struct dw_subsection *dwss;
4830
4831 if (dws->anon_subseg)
4832 {
4833 dwss = dws->anon_subseg;
4834 dwss->link = dws->list_subseg;
4835 }
4836 else
4837 dwss = dws->list_subseg;
4838
4839 for (; dwss != NULL; dwss = dwss->link)
4840 if (dwss->end_exp.X_add_symbol != NULL)
4841 {
4842 subseg_set (dws->sect, dwss->subseg);
4843 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4844 }
4845 }
4846}
4847
252b5132 4848#endif /* OBJ_XCOFF */
0baf16f2 4849#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4850\f
4851/* The .tc pseudo-op. This is used when generating either XCOFF or
4852 ELF. This takes two or more arguments.
4853
4854 When generating XCOFF output, the first argument is the name to
4855 give to this location in the toc; this will be a symbol with class
0baf16f2 4856 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4857 this location in the TOC; often there is just one more argument, a
1049f94e 4858 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4859 depends on target word size. A 32-bit target uses 4-byte values, a
4860 64-bit target uses 8-byte values.
252b5132
RH		 4861
4862 When not generating XCOFF output, the arguments are the same, but
4863 the first argument is simply ignored. */
4864
4865static void
98027b10 4866ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4867{
4868#ifdef OBJ_XCOFF
4869
4870 /* Define the TOC symbol name. */
4871 {
4872 char *name;
4873 char endc;
4874 symbolS *sym;
4875
4876 if (ppc_toc_csect == (symbolS *) NULL
4877 || ppc_toc_csect != ppc_current_csect)
4878 {
4879 as_bad (_(".tc not in .toc section"));
4880 ignore_rest_of_line ();
4881 return;
4882 }
4883
4884 name = input_line_pointer;
4885 endc = get_symbol_end ();
4886
4887 sym = symbol_find_or_make (name);
4888
4889 *input_line_pointer = endc;
4890
4891 if (S_IS_DEFINED (sym))
4892 {
4893 symbolS *label;
4894
809ffe0d 4895 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4896 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4897 {
4898 as_bad (_(".tc with no label"));
4899 ignore_rest_of_line ();
4900 return;
4901 }
4902
4903 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4904 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4905 S_SET_VALUE (label, S_GET_VALUE (sym));
4906
4907 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4908 ++input_line_pointer;
4909
4910 return;
4911 }
4912
4913 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4914 symbol_set_frag (sym, frag_now);
252b5132 4915 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4916 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4917 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4918
4919 ppc_frob_label (sym);
4920 }
4921
0baf16f2
AM		 4922#endif /* OBJ_XCOFF */
4923#ifdef OBJ_ELF
9c7977b3 4924 int align;
252b5132
RH		 4925
4926 /* Skip the TOC symbol name. */
4927 while (is_part_of_name (*input_line_pointer)
d13d4015 4928 || *input_line_pointer == ' '
252b5132
RH		 4929 || *input_line_pointer == '['
4930 || *input_line_pointer == ']'
4931 || *input_line_pointer == '{'
4932 || *input_line_pointer == '}')
4933 ++input_line_pointer;
4934
0baf16f2 4935 /* Align to a four/eight byte boundary. */
2b3c4602 4936 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4937 frag_align (align, 0, 0);
4938 record_alignment (now_seg, align);
0baf16f2 4939#endif /* OBJ_ELF */
252b5132
RH		 4940
4941 if (*input_line_pointer != ',')
4942 demand_empty_rest_of_line ();
4943 else
4944 {
4945 ++input_line_pointer;
2b3c4602 4946 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4947 }
4948}
0baf16f2
AM		 4949
4950/* Pseudo-op .machine. */
0baf16f2
AM		 4951
4952static void
98027b10 4953ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4954{
69c040df
AM		 4955 char *cpu_string;
4956#define MAX_HISTORY 100
fa452fa6 4957 static ppc_cpu_t *cpu_history;
69c040df
AM		 4958 static int curr_hist;
4959
4960 SKIP_WHITESPACE ();
4961
4962 if (*input_line_pointer == '"')
4963 {
4964 int len;
4965 cpu_string = demand_copy_C_string (&len);
4966 }
4967 else
4968 {
4969 char c;
4970 cpu_string = input_line_pointer;
4971 c = get_symbol_end ();
4972 cpu_string = xstrdup (cpu_string);
4973 *input_line_pointer = c;
4974 }
4975
4976 if (cpu_string != NULL)
4977 {
fa452fa6 4978 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4979 ppc_cpu_t new_cpu;
69c040df
AM		 4980 char *p;
4981
4982 for (p = cpu_string; *p != 0; p++)
4983 *p = TOLOWER (*p);
4984
4985 if (strcmp (cpu_string, "push") == 0)
4986 {
4987 if (cpu_history == NULL)
4988 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4989
4990 if (curr_hist >= MAX_HISTORY)
4991 as_bad (_(".machine stack overflow"));
4992 else
4993 cpu_history[curr_hist++] = ppc_cpu;
4994 }
4995 else if (strcmp (cpu_string, "pop") == 0)
4996 {
4997 if (curr_hist <= 0)
4998 as_bad (_(".machine stack underflow"));
4999 else
5000 ppc_cpu = cpu_history[--curr_hist];
5001 }
776fc418 5002 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 5003 ppc_cpu = new_cpu;
69c040df
AM		 5004 else
5005 as_bad (_("invalid machine `%s'"), cpu_string);
5006
5007 if (ppc_cpu != old_cpu)
5008 ppc_setup_opcodes ();
5009 }
5010
5011 demand_empty_rest_of_line ();
0baf16f2 5012}
0baf16f2 5013#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 5014\f
5015#ifdef TE_PE
5016
99a814a1 5017/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 5018
5019/* Set the current section. */
5020static void
98027b10 5021ppc_set_current_section (segT new)
252b5132
RH		 5022{
5023 ppc_previous_section = ppc_current_section;
5024 ppc_current_section = new;
5025}
5026
5027/* pseudo-op: .previous
5028 behaviour: toggles the current section with the previous section.
5029 errors: None
99a814a1
AM		 5030 warnings: "No previous section" */
5031
252b5132 5032static void
98027b10 5033ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5034{
81d4177b 5035 if (ppc_previous_section == NULL)
252b5132 5036 {
d6ed37ed 5037 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5038 return;
5039 }
5040
99a814a1 5041 subseg_set (ppc_previous_section, 0);
252b5132 5042
99a814a1 5043 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5044}
5045
5046/* pseudo-op: .pdata
5047 behaviour: predefined read only data section
b34976b6 5048 double word aligned
252b5132
RH		 5049 errors: None
5050 warnings: None
5051 initial: .section .pdata "adr3"
b34976b6 5052 a - don't know -- maybe a misprint
252b5132
RH		 5053 d - initialized data
5054 r - readable
5055 3 - double word aligned (that would be 4 byte boundary)
5056
5057 commentary:
5058 Tag index tables (also known as the function table) for exception
99a814a1 5059 handling, debugging, etc. */
252b5132 5060
252b5132 5061static void
98027b10 5062ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5063{
81d4177b 5064 if (pdata_section == 0)
252b5132
RH		 5065 {
5066 pdata_section = subseg_new (".pdata", 0);
81d4177b 5067
252b5132
RH		 5068 bfd_set_section_flags (stdoutput, pdata_section,
5069 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5070 | SEC_READONLY | SEC_DATA ));
81d4177b 5071
252b5132
RH		 5072 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5073 }
5074 else
5075 {
99a814a1 5076 pdata_section = subseg_new (".pdata", 0);
252b5132 5077 }
99a814a1 5078 ppc_set_current_section (pdata_section);
252b5132
RH		 5079}
5080
5081/* pseudo-op: .ydata
5082 behaviour: predefined read only data section
b34976b6 5083 double word aligned
252b5132
RH		 5084 errors: None
5085 warnings: None
5086 initial: .section .ydata "drw3"
b34976b6 5087 a - don't know -- maybe a misprint
252b5132
RH		 5088 d - initialized data
5089 r - readable
5090 3 - double word aligned (that would be 4 byte boundary)
5091 commentary:
5092 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5093 debugging, etc. */
5094
252b5132 5095static void
98027b10 5096ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5097{
81d4177b 5098 if (ydata_section == 0)
252b5132
RH		 5099 {
5100 ydata_section = subseg_new (".ydata", 0);
5101 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5102 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5103 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5104
5105 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5106 }
5107 else
5108 {
5109 ydata_section = subseg_new (".ydata", 0);
5110 }
99a814a1 5111 ppc_set_current_section (ydata_section);
252b5132
RH		 5112}
5113
5114/* pseudo-op: .reldata
5115 behaviour: predefined read write data section
b34976b6 5116 double word aligned (4-byte)
252b5132
RH		 5117 FIXME: relocation is applied to it
5118 FIXME: what's the difference between this and .data?
5119 errors: None
5120 warnings: None
5121 initial: .section .reldata "drw3"
5122 d - initialized data
5123 r - readable
5124 w - writeable
5125 3 - double word aligned (that would be 8 byte boundary)
5126
5127 commentary:
5128 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5129 function descriptors, etc. */
5130
252b5132 5131static void
98027b10 5132ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5133{
5134 if (reldata_section == 0)
5135 {
5136 reldata_section = subseg_new (".reldata", 0);
5137
5138 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5139 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5140 | SEC_DATA));
252b5132
RH		 5141
5142 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5143 }
5144 else
5145 {
5146 reldata_section = subseg_new (".reldata", 0);
5147 }
99a814a1 5148 ppc_set_current_section (reldata_section);
252b5132
RH		 5149}
5150
5151/* pseudo-op: .rdata
5152 behaviour: predefined read only data section
b34976b6 5153 double word aligned
252b5132
RH		 5154 errors: None
5155 warnings: None
5156 initial: .section .rdata "dr3"
5157 d - initialized data
5158 r - readable
99a814a1
AM		 5159 3 - double word aligned (that would be 4 byte boundary) */
5160
252b5132 5161static void
98027b10 5162ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5163{
5164 if (rdata_section == 0)
5165 {
5166 rdata_section = subseg_new (".rdata", 0);
5167 bfd_set_section_flags (stdoutput, rdata_section,
5168 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5169 | SEC_READONLY | SEC_DATA ));
5170
5171 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5172 }
5173 else
5174 {
5175 rdata_section = subseg_new (".rdata", 0);
5176 }
99a814a1 5177 ppc_set_current_section (rdata_section);
252b5132
RH		 5178}
5179
5180/* pseudo-op: .ualong
81d4177b 5181 behaviour: much like .int, with the exception that no alignment is
b34976b6 5182 performed.
252b5132
RH		 5183 FIXME: test the alignment statement
5184 errors: None
99a814a1
AM		 5185 warnings: None */
5186
252b5132 5187static void
98027b10 5188ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5189{
99a814a1
AM		 5190 /* Try for long. */
5191 cons (4);
252b5132
RH		 5192}
5193
5194/* pseudo-op: .znop <symbol name>
5195 behaviour: Issue a nop instruction
b34976b6 5196 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5197 the supplied symbol name.
5198 errors: None
99a814a1
AM		 5199 warnings: Missing symbol name */
5200
252b5132 5201static void
98027b10 5202ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5203{
5204 unsigned long insn;
5205 const struct powerpc_opcode *opcode;
252b5132 5206 char *f;
252b5132 5207 symbolS *sym;
252b5132
RH		 5208 char *symbol_name;
5209 char c;
5210 char *name;
252b5132 5211
99a814a1 5212 /* Strip out the symbol name. */
252b5132
RH		 5213 symbol_name = input_line_pointer;
5214 c = get_symbol_end ();
5215
5216 name = xmalloc (input_line_pointer - symbol_name + 1);
5217 strcpy (name, symbol_name);
5218
5219 sym = symbol_find_or_make (name);
5220
5221 *input_line_pointer = c;
5222
5223 SKIP_WHITESPACE ();
5224
5225 /* Look up the opcode in the hash table. */
5226 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5227
99a814a1 5228 /* Stick in the nop. */
252b5132
RH		 5229 insn = opcode->opcode;
5230
5231 /* Write out the instruction. */
5232 f = frag_more (4);
5233 md_number_to_chars (f, insn, 4);
5234 fix_new (frag_now,
5235 f - frag_now->fr_literal,
5236 4,
5237 sym,
5238 0,
5239 0,
5240 BFD_RELOC_16_GOT_PCREL);
5241
5242}
5243
81d4177b
KH		 5244/* pseudo-op:
5245 behaviour:
5246 errors:
99a814a1
AM		 5247 warnings: */
5248
252b5132 5249static void
98027b10 5250ppc_pe_comm (int lcomm)
252b5132 5251{
98027b10
AM		 5252 char *name;
5253 char c;
5254 char *p;
252b5132 5255 offsetT temp;
98027b10 5256 symbolS *symbolP;
252b5132
RH		 5257 offsetT align;
5258
5259 name = input_line_pointer;
5260 c = get_symbol_end ();
5261
99a814a1 5262 /* just after name is now '\0'. */
252b5132
RH		 5263 p = input_line_pointer;
5264 *p = c;
5265 SKIP_WHITESPACE ();
5266 if (*input_line_pointer != ',')
5267 {
d6ed37ed 5268 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5269 ignore_rest_of_line ();
5270 return;
5271 }
5272
5273 input_line_pointer++; /* skip ',' */
5274 if ((temp = get_absolute_expression ()) < 0)
5275 {
5276 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5277 ignore_rest_of_line ();
5278 return;
5279 }
5280
5281 if (! lcomm)
5282 {
5283 /* The third argument to .comm is the alignment. */
5284 if (*input_line_pointer != ',')
5285 align = 3;
5286 else
5287 {
5288 ++input_line_pointer;
5289 align = get_absolute_expression ();
5290 if (align <= 0)
5291 {
5292 as_warn (_("ignoring bad alignment"));
5293 align = 3;
5294 }
5295 }
5296 }
5297
5298 *p = 0;
5299 symbolP = symbol_find_or_make (name);
5300
5301 *p = c;
5302 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5303 {
d6ed37ed 5304 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5305 S_GET_NAME (symbolP));
5306 ignore_rest_of_line ();
5307 return;
5308 }
5309
5310 if (S_GET_VALUE (symbolP))
5311 {
5312 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5313 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5314 S_GET_NAME (symbolP),
5315 (long) S_GET_VALUE (symbolP),
5316 (long) temp);
5317 }
5318 else
5319 {
5320 S_SET_VALUE (symbolP, (valueT) temp);
5321 S_SET_EXTERNAL (symbolP);
86ebace2 5322 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5323 }
5324
5325 demand_empty_rest_of_line ();
5326}
5327
5328/*
5329 * implement the .section pseudo op:
5330 * .section name {, "flags"}
5331 * ^ ^
5332 * | +--- optional flags: 'b' for bss
5333 * | 'i' for info
5334 * +-- section name 'l' for lib
5335 * 'n' for noload
5336 * 'o' for over
5337 * 'w' for data
5338 * 'd' (apparently m88k for data)
5339 * 'x' for text
5340 * But if the argument is not a quoted string, treat it as a
5341 * subsegment number.
5342 *
5343 * FIXME: this is a copy of the section processing from obj-coff.c, with
5344 * additions/changes for the moto-pas assembler support. There are three
5345 * categories:
5346 *
81d4177b 5347 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5348 * setting bits that bfd probably neither understands or uses. The
5349 * correct approach (?) will have to incorporate extra fields attached
5350 * to the section to hold the system specific stuff. (krk)
5351 *
5352 * Section Contents:
5353 * 'a' - unknown - referred to in documentation, but no definition supplied
5354 * 'c' - section has code
5355 * 'd' - section has initialized data
5356 * 'u' - section has uninitialized data
5357 * 'i' - section contains directives (info)
5358 * 'n' - section can be discarded
5359 * 'R' - remove section at link time
5360 *
5361 * Section Protection:
5362 * 'r' - section is readable
5363 * 'w' - section is writeable
5364 * 'x' - section is executable
5365 * 's' - section is sharable
5366 *
5367 * Section Alignment:
5368 * '0' - align to byte boundary
5369 * '1' - align to halfword undary
5370 * '2' - align to word boundary
5371 * '3' - align to doubleword boundary
5372 * '4' - align to quadword boundary
5373 * '5' - align to 32 byte boundary
5374 * '6' - align to 64 byte boundary
5375 *
5376 */
5377
5378void
98027b10 5379ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5380{
99a814a1 5381 /* Strip out the section name. */
252b5132
RH		 5382 char *section_name;
5383 char c;
5384 char *name;
5385 unsigned int exp;
5386 flagword flags;
5387 segT sec;
5388 int align;
5389
5390 section_name = input_line_pointer;
5391 c = get_symbol_end ();
5392
5393 name = xmalloc (input_line_pointer - section_name + 1);
5394 strcpy (name, section_name);
5395
5396 *input_line_pointer = c;
5397
5398 SKIP_WHITESPACE ();
5399
5400 exp = 0;
5401 flags = SEC_NO_FLAGS;
5402
5403 if (strcmp (name, ".idata$2") == 0)
5404 {
5405 align = 0;
5406 }
5407 else if (strcmp (name, ".idata$3") == 0)
5408 {
5409 align = 0;
5410 }
5411 else if (strcmp (name, ".idata$4") == 0)
5412 {
5413 align = 2;
5414 }
5415 else if (strcmp (name, ".idata$5") == 0)
5416 {
5417 align = 2;
5418 }
5419 else if (strcmp (name, ".idata$6") == 0)
5420 {
5421 align = 1;
5422 }
5423 else
99a814a1
AM		 5424 /* Default alignment to 16 byte boundary. */
5425 align = 4;
252b5132
RH		 5426
5427 if (*input_line_pointer == ',')
5428 {
5429 ++input_line_pointer;
5430 SKIP_WHITESPACE ();
5431 if (*input_line_pointer != '"')
5432 exp = get_absolute_expression ();
5433 else
5434 {
5435 ++input_line_pointer;
5436 while (*input_line_pointer != '"'
5437 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5438 {
5439 switch (*input_line_pointer)
5440 {
5441 /* Section Contents */
5442 case 'a': /* unknown */
d6ed37ed 5443 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5444 break;
5445 case 'c': /* code section */
81d4177b 5446 flags |= SEC_CODE;
252b5132
RH		 5447 break;
5448 case 'd': /* section has initialized data */
5449 flags |= SEC_DATA;
5450 break;
5451 case 'u': /* section has uninitialized data */
5452 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5453 in winnt.h */
5454 flags |= SEC_ROM;
5455 break;
5456 case 'i': /* section contains directives (info) */
5457 /* FIXME: This is IMAGE_SCN_LNK_INFO
5458 in winnt.h */
5459 flags |= SEC_HAS_CONTENTS;
5460 break;
5461 case 'n': /* section can be discarded */
81d4177b 5462 flags &=~ SEC_LOAD;
252b5132
RH		 5463 break;
5464 case 'R': /* Remove section at link time */
5465 flags |= SEC_NEVER_LOAD;
5466 break;
8d452c78 5467#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5468 /* Section Protection */
5469 case 'r': /* section is readable */
5470 flags |= IMAGE_SCN_MEM_READ;
5471 break;
5472 case 'w': /* section is writeable */
5473 flags |= IMAGE_SCN_MEM_WRITE;
5474 break;
5475 case 'x': /* section is executable */
5476 flags |= IMAGE_SCN_MEM_EXECUTE;
5477 break;
5478 case 's': /* section is sharable */
5479 flags |= IMAGE_SCN_MEM_SHARED;
5480 break;
5481
5482 /* Section Alignment */
5483 case '0': /* align to byte boundary */
5484 flags |= IMAGE_SCN_ALIGN_1BYTES;
5485 align = 0;
5486 break;
5487 case '1': /* align to halfword boundary */
5488 flags |= IMAGE_SCN_ALIGN_2BYTES;
5489 align = 1;
5490 break;
5491 case '2': /* align to word boundary */
5492 flags |= IMAGE_SCN_ALIGN_4BYTES;
5493 align = 2;
5494 break;
5495 case '3': /* align to doubleword boundary */
5496 flags |= IMAGE_SCN_ALIGN_8BYTES;
5497 align = 3;
5498 break;
5499 case '4': /* align to quadword boundary */
5500 flags |= IMAGE_SCN_ALIGN_16BYTES;
5501 align = 4;
5502 break;
5503 case '5': /* align to 32 byte boundary */
5504 flags |= IMAGE_SCN_ALIGN_32BYTES;
5505 align = 5;
5506 break;
5507 case '6': /* align to 64 byte boundary */
5508 flags |= IMAGE_SCN_ALIGN_64BYTES;
5509 align = 6;
5510 break;
8d452c78 5511#endif
252b5132 5512 default:
99a814a1
AM		 5513 as_bad (_("unknown section attribute '%c'"),
5514 *input_line_pointer);
252b5132
RH		 5515 break;
5516 }
5517 ++input_line_pointer;
5518 }
5519 if (*input_line_pointer == '"')
5520 ++input_line_pointer;
5521 }
5522 }
5523
5524 sec = subseg_new (name, (subsegT) exp);
5525
99a814a1 5526 ppc_set_current_section (sec);
252b5132
RH		 5527
5528 if (flags != SEC_NO_FLAGS)
5529 {
5530 if (! bfd_set_section_flags (stdoutput, sec, flags))
5531 as_bad (_("error setting flags for \"%s\": %s"),
5532 bfd_section_name (stdoutput, sec),
5533 bfd_errmsg (bfd_get_error ()));
5534 }
5535
99a814a1 5536 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5537}
5538
5539static void
98027b10 5540ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5541{
5542 char *name;
5543 char endc;
5544 symbolS *ext_sym;
5545
5546 name = input_line_pointer;
5547 endc = get_symbol_end ();
5548
5549 ext_sym = symbol_find_or_make (name);
5550
5551 *input_line_pointer = endc;
5552
5553 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5554 SF_SET_FUNCTION (ext_sym);
5555 SF_SET_PROCESS (ext_sym);
5556 coff_add_linesym (ext_sym);
5557
5558 demand_empty_rest_of_line ();
5559}
5560
5561static void
98027b10 5562ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5563{
5564 if (tocdata_section == 0)
5565 {
5566 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5567 /* FIXME: section flags won't work. */
252b5132
RH		 5568 bfd_set_section_flags (stdoutput, tocdata_section,
5569 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5570 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5571
5572 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5573 }
5574 else
5575 {
5576 rdata_section = subseg_new (".tocd", 0);
5577 }
5578
99a814a1 5579 ppc_set_current_section (tocdata_section);
252b5132
RH		 5580
5581 demand_empty_rest_of_line ();
5582}
5583
5584/* Don't adjust TOC relocs to use the section symbol. */
5585
5586int
98027b10 5587ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5588{
5589 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5590}
5591
5592#endif
5593\f
5594#ifdef OBJ_XCOFF
5595
5596/* XCOFF specific symbol and file handling. */
5597
5598/* Canonicalize the symbol name. We use the to force the suffix, if
5599 any, to use square brackets, and to be in upper case. */
5600
5601char *
98027b10 5602ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5603{
5604 char *s;
5605
5606 if (ppc_stab_symbol)
5607 return name;
5608
5609 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5610 ;
5611 if (*s != '\0')
5612 {
5613 char brac;
5614
5615 if (*s == '[')
5616 brac = ']';
5617 else
5618 {
5619 *s = '[';
5620 brac = '}';
5621 }
5622
5623 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5624 *s = TOUPPER (*s);
252b5132
RH		 5625
5626 if (*s == '\0' || s[1] != '\0')
5627 as_bad (_("bad symbol suffix"));
5628
5629 *s = ']';
5630 }
5631
5632 return name;
5633}
5634
5635/* Set the class of a symbol based on the suffix, if any. This is
5636 called whenever a new symbol is created. */
5637
5638void
98027b10 5639ppc_symbol_new_hook (symbolS *sym)
252b5132 5640{
809ffe0d 5641 struct ppc_tc_sy *tc;
252b5132
RH		 5642 const char *s;
5643
809ffe0d
ILT		 5644 tc = symbol_get_tc (sym);
5645 tc->next = NULL;
5646 tc->output = 0;
96d56e9f 5647 tc->symbol_class = -1;
809ffe0d
ILT		 5648 tc->real_name = NULL;
5649 tc->subseg = 0;
5650 tc->align = 0;
85645aed
TG		 5651 tc->u.size = NULL;
5652 tc->u.dw = NULL;
809ffe0d 5653 tc->within = NULL;
252b5132
RH		 5654
5655 if (ppc_stab_symbol)
5656 return;
5657
5658 s = strchr (S_GET_NAME (sym), '[');
5659 if (s == (const char *) NULL)
5660 {
5661 /* There is no suffix. */
5662 return;
5663 }
5664
5665 ++s;
5666
5667 switch (s[0])
5668 {
5669 case 'B':
5670 if (strcmp (s, "BS]") == 0)
96d56e9f 5671 tc->symbol_class = XMC_BS;
252b5132
RH		 5672 break;
5673 case 'D':
5674 if (strcmp (s, "DB]") == 0)
96d56e9f 5675 tc->symbol_class = XMC_DB;
252b5132 5676 else if (strcmp (s, "DS]") == 0)
96d56e9f 5677 tc->symbol_class = XMC_DS;
252b5132
RH		 5678 break;
5679 case 'G':
5680 if (strcmp (s, "GL]") == 0)
96d56e9f 5681 tc->symbol_class = XMC_GL;
252b5132
RH		 5682 break;
5683 case 'P':
5684 if (strcmp (s, "PR]") == 0)
96d56e9f 5685 tc->symbol_class = XMC_PR;
252b5132
RH		 5686 break;
5687 case 'R':
5688 if (strcmp (s, "RO]") == 0)
96d56e9f 5689 tc->symbol_class = XMC_RO;
252b5132 5690 else if (strcmp (s, "RW]") == 0)
96d56e9f 5691 tc->symbol_class = XMC_RW;
252b5132
RH		 5692 break;
5693 case 'S':
5694 if (strcmp (s, "SV]") == 0)
96d56e9f 5695 tc->symbol_class = XMC_SV;
252b5132
RH		 5696 break;
5697 case 'T':
5698 if (strcmp (s, "TC]") == 0)
96d56e9f 5699 tc->symbol_class = XMC_TC;
252b5132 5700 else if (strcmp (s, "TI]") == 0)
96d56e9f 5701 tc->symbol_class = XMC_TI;
252b5132 5702 else if (strcmp (s, "TB]") == 0)
96d56e9f 5703 tc->symbol_class = XMC_TB;
252b5132 5704 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5705 tc->symbol_class = XMC_TC0;
252b5132
RH		 5706 break;
5707 case 'U':
5708 if (strcmp (s, "UA]") == 0)
96d56e9f 5709 tc->symbol_class = XMC_UA;
252b5132 5710 else if (strcmp (s, "UC]") == 0)
96d56e9f 5711 tc->symbol_class = XMC_UC;
252b5132
RH		 5712 break;
5713 case 'X':
5714 if (strcmp (s, "XO]") == 0)
96d56e9f 5715 tc->symbol_class = XMC_XO;
252b5132
RH		 5716 break;
5717 }
5718
96d56e9f 5719 if (tc->symbol_class == -1)
d6ed37ed 5720 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5721}
5722
5723/* Set the class of a label based on where it is defined. This
5724 handles symbols without suffixes. Also, move the symbol so that it
5725 follows the csect symbol. */
5726
5727void
98027b10 5728ppc_frob_label (symbolS *sym)
252b5132
RH		 5729{
5730 if (ppc_current_csect != (symbolS *) NULL)
5731 {
96d56e9f
NC		 5732 if (symbol_get_tc (sym)->symbol_class == -1)
5733 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5734
5735 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5736 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5737 &symbol_rootP, &symbol_lastP);
5738 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5739 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5740 }
07a53e5c
RH		 5741
5742#ifdef OBJ_ELF
5743 dwarf2_emit_label (sym);
5744#endif
252b5132
RH		 5745}
5746
5747/* This variable is set by ppc_frob_symbol if any absolute symbols are
5748 seen. It tells ppc_adjust_symtab whether it needs to look through
5749 the symbols. */
5750
b34976b6 5751static bfd_boolean ppc_saw_abs;
252b5132
RH		 5752
5753/* Change the name of a symbol just before writing it out. Set the
5754 real name if the .rename pseudo-op was used. Otherwise, remove any
5755 class suffix. Return 1 if the symbol should not be included in the
5756 symbol table. */
5757
5758int
98027b10 5759ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5760{
5761 static symbolS *ppc_last_function;
5762 static symbolS *set_end;
5763
5764 /* Discard symbols that should not be included in the output symbol
5765 table. */
809ffe0d
ILT		 5766 if (! symbol_used_in_reloc_p (sym)
5767 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5768 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5769 && ! symbol_get_tc (sym)->output
252b5132
RH		 5770 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5771 return 1;
5772
a161fe53
AM		 5773 /* This one will disappear anyway. Don't make a csect sym for it. */
5774 if (sym == abs_section_sym)
5775 return 1;
5776
809ffe0d
ILT		 5777 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5778 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5779 else
5780 {
5781 const char *name;
5782 const char *s;
5783
5784 name = S_GET_NAME (sym);
5785 s = strchr (name, '[');
5786 if (s != (char *) NULL)
5787 {
5788 unsigned int len;
5789 char *snew;
5790
5791 len = s - name;
5792 snew = xmalloc (len + 1);
5793 memcpy (snew, name, len);
5794 snew[len] = '\0';
5795
5796 S_SET_NAME (sym, snew);
5797 }
5798 }
5799
5800 if (set_end != (symbolS *) NULL)
5801 {
5802 SA_SET_SYM_ENDNDX (set_end, sym);
5803 set_end = NULL;
5804 }
5805
5806 if (SF_GET_FUNCTION (sym))
5807 {
5808 if (ppc_last_function != (symbolS *) NULL)
5809 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5810 ppc_last_function = sym;
85645aed 5811 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5812 {
85645aed 5813 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5814 SA_SET_SYM_FSIZE (sym,
85645aed 5815 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5816 }
5817 }
5818 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5819 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5820 {
5821 if (ppc_last_function == (symbolS *) NULL)
5822 as_bad (_(".ef with no preceding .function"));
5823 else
5824 {
5825 set_end = ppc_last_function;
5826 ppc_last_function = NULL;
5827
5828 /* We don't have a C_EFCN symbol, but we need to force the
5829 COFF backend to believe that it has seen one. */
5830 coff_last_function = NULL;
5831 }
5832 }
5833
670ec21d 5834 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5835 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5836 && S_GET_STORAGE_CLASS (sym) != C_FILE
5837 && S_GET_STORAGE_CLASS (sym) != C_FCN
5838 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5839 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5840 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5841 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5842 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5843 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5844 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5845
5846 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5847 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5848 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5849 {
5850 int i;
5851 union internal_auxent *a;
5852
5853 /* Create a csect aux. */
5854 i = S_GET_NUMBER_AUXILIARY (sym);
5855 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5856 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5857 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5858 {
5859 /* This is the TOC table. */
5860 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5861 a->x_csect.x_scnlen.l = 0;
5862 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5863 }
809ffe0d 5864 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5865 {
5866 /* This is a csect symbol. x_scnlen is the size of the
5867 csect. */
809ffe0d 5868 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5869 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5870 S_GET_SEGMENT (sym))
5871 - S_GET_VALUE (sym));
5872 else
5873 {
6386f3a7 5874 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5875 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5876 - S_GET_VALUE (sym));
5877 }
809ffe0d 5878 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5879 }
5880 else if (S_GET_SEGMENT (sym) == bss_section)
5881 {
5882 /* This is a common symbol. */
809ffe0d
ILT		 5883 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5884 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5885 if (S_IS_EXTERNAL (sym))
96d56e9f 5886 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5887 else
96d56e9f 5888 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5889 }
5890 else if (S_GET_SEGMENT (sym) == absolute_section)
5891 {
5892 /* This is an absolute symbol. The csect will be created by
99a814a1 5893 ppc_adjust_symtab. */
b34976b6 5894 ppc_saw_abs = TRUE;
252b5132 5895 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5896 if (symbol_get_tc (sym)->symbol_class == -1)
5897 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5898 }
5899 else if (! S_IS_DEFINED (sym))
5900 {
5901 /* This is an external symbol. */
5902 a->x_csect.x_scnlen.l = 0;
5903 a->x_csect.x_smtyp = XTY_ER;
5904 }
96d56e9f 5905 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5906 {
5907 symbolS *next;
5908
5909 /* This is a TOC definition. x_scnlen is the size of the
5910 TOC entry. */
5911 next = symbol_next (sym);
96d56e9f 5912 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5913 next = symbol_next (next);
5914 if (next == (symbolS *) NULL
96d56e9f 5915 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5916 {
5917 if (ppc_after_toc_frag == (fragS *) NULL)
5918 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5919 data_section)
5920 - S_GET_VALUE (sym));
5921 else
5922 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5923 - S_GET_VALUE (sym));
5924 }
5925 else
5926 {
6386f3a7 5927 resolve_symbol_value (next);
252b5132
RH		 5928 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5929 - S_GET_VALUE (sym));
5930 }
5931 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5932 }
5933 else
5934 {
5935 symbolS *csect;
5936
5937 /* This is a normal symbol definition. x_scnlen is the
5938 symbol index of the containing csect. */
5939 if (S_GET_SEGMENT (sym) == text_section)
5940 csect = ppc_text_csects;
5941 else if (S_GET_SEGMENT (sym) == data_section)
5942 csect = ppc_data_csects;
5943 else
5944 abort ();
5945
5946 /* Skip the initial dummy symbol. */
809ffe0d 5947 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5948
5949 if (csect == (symbolS *) NULL)
5950 {
5951 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5952 a->x_csect.x_scnlen.l = 0;
5953 }
5954 else
5955 {
809ffe0d 5956 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5957 {
6386f3a7 5958 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5959 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5960 > S_GET_VALUE (sym))
252b5132 5961 break;
809ffe0d 5962 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5963 }
5964
809ffe0d
ILT		 5965 a->x_csect.x_scnlen.p =
5966 coffsymbol (symbol_get_bfdsym (csect))->native;
5967 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5968 1;
252b5132
RH		 5969 }
5970 a->x_csect.x_smtyp = XTY_LD;
5971 }
81d4177b 5972
252b5132
RH		 5973 a->x_csect.x_parmhash = 0;
5974 a->x_csect.x_snhash = 0;
96d56e9f 5975 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5976 a->x_csect.x_smclas = XMC_PR;
5977 else
96d56e9f 5978 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5979 a->x_csect.x_stab = 0;
5980 a->x_csect.x_snstab = 0;
5981
5982 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5983 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5984 }
5985 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5986 {
5987 /* We want the value to be the symbol index of the referenced
5988 csect symbol. BFD will do that for us if we set the right
5989 flags. */
b782de16
AM		 5990 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5991 combined_entry_type *c = coffsymbol (bsym)->native;
5992
5993 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5994 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5995 }
5996 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5997 {
5998 symbolS *block;
c734e7e3 5999 valueT base;
252b5132 6000
809ffe0d 6001 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 6002 if (block)
6003 {
6004 /* The value is the offset from the enclosing csect. */
6005 symbolS *csect;
6006
6007 csect = symbol_get_tc (block)->within;
6008 resolve_symbol_value (csect);
6009 base = S_GET_VALUE (csect);
6010 }
6011 else
6012 base = 0;
6013
6014 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 6015 }
6016 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6017 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6018 {
6019 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 6020 BFD will do that for us if we set the right flags. We have
6021 already set the value correctly. */
809ffe0d 6022 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6023 }
6024
6025 return 0;
6026}
6027
6028/* Adjust the symbol table. This creates csect symbols for all
6029 absolute symbols. */
6030
6031void
98027b10 6032ppc_adjust_symtab (void)
252b5132
RH		 6033{
6034 symbolS *sym;
6035
6036 if (! ppc_saw_abs)
6037 return;
6038
6039 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6040 {
6041 symbolS *csect;
6042 int i;
6043 union internal_auxent *a;
6044
6045 if (S_GET_SEGMENT (sym) != absolute_section)
6046 continue;
6047
6048 csect = symbol_create (".abs[XO]", absolute_section,
6049 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6050 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6051 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6052 i = S_GET_NUMBER_AUXILIARY (csect);
6053 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6054 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6055 a->x_csect.x_scnlen.l = 0;
6056 a->x_csect.x_smtyp = XTY_SD;
6057 a->x_csect.x_parmhash = 0;
6058 a->x_csect.x_snhash = 0;
6059 a->x_csect.x_smclas = XMC_XO;
6060 a->x_csect.x_stab = 0;
6061 a->x_csect.x_snstab = 0;
6062
6063 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6064
6065 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6066 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6067 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6068 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6069 }
6070
b34976b6 6071 ppc_saw_abs = FALSE;
252b5132
RH		 6072}
6073
6074/* Set the VMA for a section. This is called on all the sections in
6075 turn. */
6076
6077void
98027b10 6078ppc_frob_section (asection *sec)
252b5132 6079{
931e13a6 6080 static bfd_vma vma = 0;
252b5132 6081
85645aed
TG		 6082 /* Dwarf sections start at 0. */
6083 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6084 return;
6085
931e13a6 6086 vma = md_section_align (sec, vma);
252b5132
RH		 6087 bfd_set_section_vma (stdoutput, sec, vma);
6088 vma += bfd_section_size (stdoutput, sec);
6089}
6090
6091#endif /* OBJ_XCOFF */
6092\f
252b5132 6093char *
98027b10 6094md_atof (int type, char *litp, int *sizep)
252b5132 6095{
499ac353 6096 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6097}
6098
6099/* Write a value out to the object file, using the appropriate
6100 endianness. */
6101
6102void
98027b10 6103md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6104{
6105 if (target_big_endian)
6106 number_to_chars_bigendian (buf, val, n);
6107 else
6108 number_to_chars_littleendian (buf, val, n);
6109}
6110
6111/* Align a section (I don't know why this is machine dependent). */
6112
6113valueT
3aeeedbb 6114md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6115{
3aeeedbb
AM		 6116#ifdef OBJ_ELF
6117 return addr;
6118#else
252b5132
RH		 6119 int align = bfd_get_section_alignment (stdoutput, seg);
6120
6121 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6122#endif
252b5132
RH		 6123}
6124
6125/* We don't have any form of relaxing. */
6126
6127int
98027b10
AM		 6128md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6129 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6130{
6131 abort ();
6132 return 0;
6133}
6134
6135/* Convert a machine dependent frag. We never generate these. */
6136
6137void
98027b10
AM		 6138md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6139 asection *sec ATTRIBUTE_UNUSED,
6140 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6141{
6142 abort ();
6143}
6144
6145/* We have no need to default values of symbols. */
6146
252b5132 6147symbolS *
98027b10 6148md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6149{
6150 return 0;
6151}
6152\f
6153/* Functions concerning relocs. */
6154
6155/* The location from which a PC relative jump should be calculated,
6156 given a PC relative reloc. */
6157
6158long
98027b10 6159md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6160{
6161 return fixp->fx_frag->fr_address + fixp->fx_where;
6162}
6163
6164#ifdef OBJ_XCOFF
6165
6166/* This is called to see whether a fixup should be adjusted to use a
6167 section symbol. We take the opportunity to change a fixup against
6168 a symbol in the TOC subsegment into a reloc against the
6169 corresponding .tc symbol. */
6170
6171int
98027b10 6172ppc_fix_adjustable (fixS *fix)
252b5132 6173{
b782de16
AM		 6174 valueT val = resolve_symbol_value (fix->fx_addsy);
6175 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6176 TC_SYMFIELD_TYPE *tc;
6177
6178 if (symseg == absolute_section)
6179 return 0;
252b5132 6180
85645aed
TG		 6181 /* Always adjust symbols in debugging sections. */
6182 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6183 return 1;
6184
252b5132 6185 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6186 && fix->fx_addsy != ppc_toc_csect
b782de16 6187 && symseg == data_section
252b5132
RH		 6188 && val >= ppc_toc_frag->fr_address
6189 && (ppc_after_toc_frag == (fragS *) NULL
6190 || val < ppc_after_toc_frag->fr_address))
6191 {
6192 symbolS *sy;
6193
6194 for (sy = symbol_next (ppc_toc_csect);
6195 sy != (symbolS *) NULL;
6196 sy = symbol_next (sy))
6197 {
b782de16
AM		 6198 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6199
96d56e9f 6200 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6201 continue;
96d56e9f 6202 if (sy_tc->symbol_class != XMC_TC)
252b5132 6203 break;
b782de16 6204 if (val == resolve_symbol_value (sy))
252b5132
RH		 6205 {
6206 fix->fx_addsy = sy;
6207 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6208 return 0;
6209 }
6210 }
6211
6212 as_bad_where (fix->fx_file, fix->fx_line,
6213 _("symbol in .toc does not match any .tc"));
6214 }
6215
6216 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6217 tc = symbol_get_tc (fix->fx_addsy);
6218 if (tc->subseg == 0
96d56e9f
NC		 6219 && tc->symbol_class != XMC_TC0
6220 && tc->symbol_class != XMC_TC
b782de16 6221 && symseg != bss_section
252b5132 6222 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6223 && (symseg != data_section
252b5132
RH		 6224 || ppc_toc_csect == NULL
6225 || val < ppc_toc_frag->fr_address
6226 || (ppc_after_toc_frag != NULL
6227 && val >= ppc_after_toc_frag->fr_address)))
6228 {
2fb4b302 6229 symbolS *csect = tc->within;
252b5132 6230
2fb4b302
TG		 6231 /* If the symbol was not declared by a label (eg: a section symbol),
6232 use the section instead of the csect. This doesn't happen in
6233 normal AIX assembly code. */
6234 if (csect == NULL)
6235 csect = seg_info (symseg)->sym;
252b5132 6236
2fb4b302
TG		 6237 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6238 fix->fx_addsy = csect;
252b5132 6239
b782de16 6240 return 0;
252b5132
RH		 6241 }
6242
6243 /* Adjust a reloc against a .lcomm symbol to be against the base
6244 .lcomm. */
b782de16 6245 if (symseg == bss_section
252b5132
RH		 6246 && ! S_IS_EXTERNAL (fix->fx_addsy))
6247 {
b782de16
AM		 6248 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6249
6250 fix->fx_offset += val - resolve_symbol_value (sy);
6251 fix->fx_addsy = sy;
252b5132
RH		 6252 }
6253
6254 return 0;
6255}
6256
6257/* A reloc from one csect to another must be kept. The assembler
6258 will, of course, keep relocs between sections, and it will keep
6259 absolute relocs, but we need to force it to keep PC relative relocs
6260 between two csects in the same section. */
6261
6262int
98027b10 6263ppc_force_relocation (fixS *fix)
252b5132
RH		 6264{
6265 /* At this point fix->fx_addsy should already have been converted to
6266 a csect symbol. If the csect does not include the fragment, then
6267 we need to force the relocation. */
6268 if (fix->fx_pcrel
6269 && fix->fx_addsy != NULL
809ffe0d
ILT		 6270 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6271 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6272 > fix->fx_frag->fr_address)
6273 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6274 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6275 <= fix->fx_frag->fr_address))))
6276 return 1;
6277
ae6063d4 6278 return generic_force_reloc (fix);
252b5132
RH		 6279}
6280
2fb4b302
TG		 6281void
6282ppc_new_dot_label (symbolS *sym)
6283{
6284 /* Anchor this label to the current csect for relocations. */
6285 symbol_get_tc (sym)->within = ppc_current_csect;
6286}
6287
252b5132
RH		 6288#endif /* OBJ_XCOFF */
6289
0baf16f2 6290#ifdef OBJ_ELF
a161fe53
AM		 6291/* If this function returns non-zero, it guarantees that a relocation
6292 will be emitted for a fixup. */
6293
6294int
98027b10 6295ppc_force_relocation (fixS *fix)
a161fe53
AM		 6296{
6297 /* Branch prediction relocations must force a relocation, as must
6298 the vtable description relocs. */
6299 switch (fix->fx_r_type)
6300 {
6301 case BFD_RELOC_PPC_B16_BRTAKEN:
6302 case BFD_RELOC_PPC_B16_BRNTAKEN:
6303 case BFD_RELOC_PPC_BA16_BRTAKEN:
6304 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6305 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6306 case BFD_RELOC_PPC64_TOC:
a161fe53 6307 return 1;
6911b7dc
AM		 6308 case BFD_RELOC_PPC_B26:
6309 case BFD_RELOC_PPC_BA26:
6310 case BFD_RELOC_PPC_B16:
6311 case BFD_RELOC_PPC_BA16:
6312 /* All branch fixups targeting a localentry symbol must
6313 force a relocation. */
6314 if (fix->fx_addsy)
6315 {
6316 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6317 elf_symbol_type *elfsym
6318 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6319 gas_assert (elfsym);
6320 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6321 return 1;
6322 }
6323 break;
a161fe53
AM		 6324 default:
6325 break;
6326 }
6327
cdba85ec
AM		 6328 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6329 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6330 return 1;
6331
ae6063d4 6332 return generic_force_reloc (fix);
a161fe53
AM		 6333}
6334
0baf16f2 6335int
98027b10 6336ppc_fix_adjustable (fixS *fix)
252b5132 6337{
6911b7dc
AM		 6338 switch (fix->fx_r_type)
6339 {
6340 /* All branch fixups targeting a localentry symbol must
6341 continue using the symbol. */
6342 case BFD_RELOC_PPC_B26:
6343 case BFD_RELOC_PPC_BA26:
6344 case BFD_RELOC_PPC_B16:
6345 case BFD_RELOC_PPC_BA16:
6346 case BFD_RELOC_PPC_B16_BRTAKEN:
6347 case BFD_RELOC_PPC_B16_BRNTAKEN:
6348 case BFD_RELOC_PPC_BA16_BRTAKEN:
6349 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6350 if (fix->fx_addsy)
6351 {
6352 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6353 elf_symbol_type *elfsym
6354 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6355 gas_assert (elfsym);
6356 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6357 return 0;
6358 }
6359 break;
6360 default:
6361 break;
6362 }
6363
0baf16f2
AM		 6364 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6365 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6366 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6367 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6368 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6369 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6370 && fix->fx_r_type != BFD_RELOC_GPREL16
6371 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6372 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6373 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6374 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6375}
0baf16f2 6376#endif
252b5132 6377
b9c361e0
JL		 6378void
6379ppc_frag_check (struct frag *fragP)
6380{
6381 if (!fragP->has_code)
6382 return;
6383
6384 if (ppc_mach() == bfd_mach_ppc_vle)
6385 {
6386 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6387 as_bad (_("instruction address is not a multiple of 2"));
6388 }
6389 else
6390 {
6391 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6392 as_bad (_("instruction address is not a multiple of 4"));
6393 }
6394}
6395
3aeeedbb
AM		 6396/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6397 rs_align_code frag. */
6398
6399void
6400ppc_handle_align (struct frag *fragP)
6401{
6402 valueT count = (fragP->fr_next->fr_address
6403 - (fragP->fr_address + fragP->fr_fix));
6404
b9c361e0
JL		 6405 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6406 {
6407 char *dest = fragP->fr_literal + fragP->fr_fix;
6408
6409 fragP->fr_var = 2;
6410 md_number_to_chars (dest, 0x4400, 2);
6411 }
6412 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6413 {
6414 char *dest = fragP->fr_literal + fragP->fr_fix;
6415
6416 fragP->fr_var = 4;
cef4f754
AM		 6417
6418 if (count > 4 * nop_limit && count < 0x2000000)
6419 {
6420 struct frag *rest;
6421
6422 /* Make a branch, then follow with nops. Insert another
6423 frag to handle the nops. */
6424 md_number_to_chars (dest, 0x48000000 + count, 4);
6425 count -= 4;
6426 if (count == 0)
6427 return;
6428
6429 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6430 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6431 fragP->fr_next = rest;
6432 fragP = rest;
6433 rest->fr_address += rest->fr_fix + 4;
6434 rest->fr_fix = 0;
6435 /* If we leave the next frag as rs_align_code we'll come here
6436 again, resulting in a bunch of branches rather than a
6437 branch followed by nops. */
6438 rest->fr_type = rs_align;
6439 dest = rest->fr_literal;
6440 }
6441
3aeeedbb
AM		 6442 md_number_to_chars (dest, 0x60000000, 4);
6443
42240548 6444 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6445 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6446 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6447 {
5817ffd1 6448 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6449 terminating one. Do this by inserting an rs_fill frag immediately
6450 after this one, with its address set to the last nop location.
6451 This will automatically reduce the number of nops in the current
6452 frag by one. */
3aeeedbb
AM		 6453 if (count > 4)
6454 {
6455 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6456
6457 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6458 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6459 group_nop->fr_fix = 0;
6460 group_nop->fr_offset = 1;
6461 group_nop->fr_type = rs_fill;
6462 fragP->fr_next = group_nop;
6463 dest = group_nop->fr_literal;
6464 }
6465
5817ffd1
PB		 6466 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6467 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6468 {
6469 if (ppc_cpu & PPC_OPCODE_E500MC)
6470 /* e500mc group terminating nop: "ori 0,0,0". */
6471 md_number_to_chars (dest, 0x60000000, 4);
6472 else
5817ffd1 6473 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6474 md_number_to_chars (dest, 0x60420000, 4);
6475 }
42240548
PB		 6476 else
6477 /* power6 group terminating nop: "ori 1,1,0". */
6478 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6479 }
6480 }
6481}
6482
252b5132 6483/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6484 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6485
94f592af 6486void
62ebcb5c 6487md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6488{
94f592af 6489 valueT value = * valP;
5656a981
AM		 6490 offsetT fieldval;
6491 const struct powerpc_operand *operand;
252b5132
RH		 6492
6493#ifdef OBJ_ELF
94f592af 6494 if (fixP->fx_addsy != NULL)
252b5132 6495 {
a161fe53 6496 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6497 if (fixP->fx_pcrel)
6498 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6499 }
6500 else
94f592af 6501 fixP->fx_done = 1;
252b5132 6502#else
a161fe53 6503 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6504 the symbol values. If we are doing this relocation the code in
6505 write.c is going to call bfd_install_relocation, which is also
6506 going to use the symbol value. That means that if the reloc is
6507 fully resolved we want to use *valP since bfd_install_relocation is
6508 not being used.
9f0eb232
RS		 6509 However, if the reloc is not fully resolved we do not want to
6510 use *valP, and must use fx_offset instead. If the relocation
6511 is PC-relative, we then need to re-apply md_pcrel_from_section
6512 to this new relocation value. */
94f592af
NC		 6513 if (fixP->fx_addsy == (symbolS *) NULL)
6514 fixP->fx_done = 1;
6515
252b5132 6516 else
9f0eb232
RS		 6517 {
6518 value = fixP->fx_offset;
6519 if (fixP->fx_pcrel)
6520 value -= md_pcrel_from_section (fixP, seg);
6521 }
a161fe53
AM		 6522#endif
6523
6524 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6525 {
a161fe53
AM		 6526 /* We can't actually support subtracting a symbol. */
6527 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6528 }
252b5132 6529
5656a981 6530 operand = NULL;
3b8b57a9 6531 if (fixP->fx_pcrel_adjust != 0)
252b5132 6532 {
5656a981 6533 /* This is a fixup on an instruction. */
3b8b57a9 6534 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6535
5656a981 6536 operand = &powerpc_operands[opindex];
252b5132 6537#ifdef OBJ_XCOFF
0baf16f2
AM		 6538 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6539 does not generate a reloc. It uses the offset of `sym' within its
6540 csect. Other usages, such as `.long sym', generate relocs. This
6541 is the documented behaviour of non-TOC symbols. */
252b5132 6542 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6543 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6544 && operand->shift == 0
2b3c4602 6545 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6546 && fixP->fx_addsy != NULL
6547 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6548 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6549 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6550 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6551 {
94f592af
NC		 6552 value = fixP->fx_offset;
6553 fixP->fx_done = 1;
252b5132 6554 }
ac21e7da
TG		 6555
6556 /* During parsing of instructions, a TOC16 reloc is generated for
6557 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6558 in the toc. But at parse time, SYM may be not yet defined, so
6559 check again here. */
6560 if (fixP->fx_r_type == BFD_RELOC_16
6561 && fixP->fx_addsy != NULL
6562 && ppc_is_toc_sym (fixP->fx_addsy))
6563 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6564#endif
5656a981
AM		 6565 }
6566
6567 /* Calculate value to be stored in field. */
6568 fieldval = value;
6569 switch (fixP->fx_r_type)
6570 {
1ec2d25e 6571#ifdef OBJ_ELF
5656a981
AM		 6572 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6573 case BFD_RELOC_PPC_VLE_LO16A:
6574 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6575#endif
5656a981
AM		 6576 case BFD_RELOC_LO16:
6577 case BFD_RELOC_LO16_PCREL:
6578 fieldval = value & 0xffff;
6579 sign_extend_16:
6580 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6581 fieldval = SEX16 (fieldval);
5656a981
AM		 6582 fixP->fx_no_overflow = 1;
6583 break;
3c9d25f4 6584
f9c6b907
AM		 6585 case BFD_RELOC_HI16:
6586 case BFD_RELOC_HI16_PCREL:
5656a981 6587#ifdef OBJ_ELF
f9c6b907
AM		 6588 if (REPORT_OVERFLOW_HI && ppc_obj64)
6589 {
6590 fieldval = value >> 16;
6591 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6592 {
6593 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6594 fieldval = ((valueT) fieldval ^ sign) - sign;
6595 }
6596 break;
6597 }
6598 /* Fall thru */
6599
5656a981
AM		 6600 case BFD_RELOC_PPC_VLE_HI16A:
6601 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6602 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6603#endif
5656a981
AM		 6604 fieldval = PPC_HI (value);
6605 goto sign_extend_16;
0baf16f2 6606
f9c6b907
AM		 6607 case BFD_RELOC_HI16_S:
6608 case BFD_RELOC_HI16_S_PCREL:
5656a981 6609#ifdef OBJ_ELF
f9c6b907
AM		 6610 if (REPORT_OVERFLOW_HI && ppc_obj64)
6611 {
6612 fieldval = (value + 0x8000) >> 16;
6613 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6614 {
6615 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6616 fieldval = ((valueT) fieldval ^ sign) - sign;
6617 }
6618 break;
6619 }
6620 /* Fall thru */
6621
5656a981
AM		 6622 case BFD_RELOC_PPC_VLE_HA16A:
6623 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6624 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6625#endif
5656a981
AM		 6626 fieldval = PPC_HA (value);
6627 goto sign_extend_16;
0baf16f2 6628
3b8b57a9 6629#ifdef OBJ_ELF
5656a981
AM		 6630 case BFD_RELOC_PPC64_HIGHER:
6631 fieldval = PPC_HIGHER (value);
6632 goto sign_extend_16;
252b5132 6633
5656a981
AM		 6634 case BFD_RELOC_PPC64_HIGHER_S:
6635 fieldval = PPC_HIGHERA (value);
6636 goto sign_extend_16;
0baf16f2 6637
5656a981
AM		 6638 case BFD_RELOC_PPC64_HIGHEST:
6639 fieldval = PPC_HIGHEST (value);
6640 goto sign_extend_16;
0baf16f2 6641
5656a981
AM		 6642 case BFD_RELOC_PPC64_HIGHEST_S:
6643 fieldval = PPC_HIGHESTA (value);
6644 goto sign_extend_16;
6645#endif
6646
6647 default:
6648 break;
6649 }
6650
6651 if (operand != NULL)
6652 {
6653 /* Handle relocs in an insn. */
6654 char *where;
6655 unsigned long insn;
0baf16f2 6656
5656a981
AM		 6657 switch (fixP->fx_r_type)
6658 {
7fa9fcb6 6659#ifdef OBJ_ELF
3b8b57a9
AM		 6660 /* The following relocs can't be calculated by the assembler.
6661 Leave the field zero. */
cdba85ec
AM		 6662 case BFD_RELOC_PPC_TPREL16:
6663 case BFD_RELOC_PPC_TPREL16_LO:
6664 case BFD_RELOC_PPC_TPREL16_HI:
6665 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6666 case BFD_RELOC_PPC_DTPREL16:
6667 case BFD_RELOC_PPC_DTPREL16_LO:
6668 case BFD_RELOC_PPC_DTPREL16_HI:
6669 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6670 case BFD_RELOC_PPC_GOT_TLSGD16:
6671 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6672 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6673 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6674 case BFD_RELOC_PPC_GOT_TLSLD16:
6675 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6676 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6677 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6678 case BFD_RELOC_PPC_GOT_TPREL16:
6679 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6680 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6681 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6682 case BFD_RELOC_PPC_GOT_DTPREL16:
6683 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6684 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6685 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6686 case BFD_RELOC_PPC64_TPREL16_DS:
6687 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6688 case BFD_RELOC_PPC64_TPREL16_HIGH:
6689 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6690 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6691 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6692 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6693 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6694 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6695 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6696 case BFD_RELOC_PPC64_DTPREL16_DS:
6697 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6698 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6699 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6700 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6701 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6702 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6703 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6704 fieldval = 0;
cdba85ec 6705 break;
3b8b57a9
AM		 6706
6707 /* These also should leave the field zero for the same
6708 reason. Note that older versions of gas wrote values
6709 here. If we want to go back to the old behaviour, then
6710 all _LO and _LO_DS cases will need to be treated like
6711 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6712 case BFD_RELOC_16_GOTOFF:
6713 case BFD_RELOC_LO16_GOTOFF:
6714 case BFD_RELOC_HI16_GOTOFF:
6715 case BFD_RELOC_HI16_S_GOTOFF:
6716 case BFD_RELOC_LO16_PLTOFF:
6717 case BFD_RELOC_HI16_PLTOFF:
6718 case BFD_RELOC_HI16_S_PLTOFF:
6719 case BFD_RELOC_GPREL16:
6720 case BFD_RELOC_16_BASEREL:
6721 case BFD_RELOC_LO16_BASEREL:
6722 case BFD_RELOC_HI16_BASEREL:
6723 case BFD_RELOC_HI16_S_BASEREL:
6724 case BFD_RELOC_PPC_TOC16:
6725 case BFD_RELOC_PPC64_TOC16_LO:
6726 case BFD_RELOC_PPC64_TOC16_HI:
6727 case BFD_RELOC_PPC64_TOC16_HA:
6728 case BFD_RELOC_PPC64_PLTGOT16:
6729 case BFD_RELOC_PPC64_PLTGOT16_LO:
6730 case BFD_RELOC_PPC64_PLTGOT16_HI:
6731 case BFD_RELOC_PPC64_PLTGOT16_HA:
6732 case BFD_RELOC_PPC64_GOT16_DS:
6733 case BFD_RELOC_PPC64_GOT16_LO_DS:
6734 case BFD_RELOC_PPC64_PLT16_LO_DS:
6735 case BFD_RELOC_PPC64_SECTOFF_DS:
6736 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6737 case BFD_RELOC_PPC64_TOC16_DS:
6738 case BFD_RELOC_PPC64_TOC16_LO_DS:
6739 case BFD_RELOC_PPC64_PLTGOT16_DS:
6740 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6741 case BFD_RELOC_PPC_EMB_NADDR16:
6742 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6743 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6744 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6745 case BFD_RELOC_PPC_EMB_SDAI16:
6746 case BFD_RELOC_PPC_EMB_SDA2I16:
6747 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6748 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6749 case BFD_RELOC_PPC_EMB_MRKREF:
6750 case BFD_RELOC_PPC_EMB_RELSEC16:
6751 case BFD_RELOC_PPC_EMB_RELST_LO:
6752 case BFD_RELOC_PPC_EMB_RELST_HI:
6753 case BFD_RELOC_PPC_EMB_RELST_HA:
6754 case BFD_RELOC_PPC_EMB_BIT_FLD:
6755 case BFD_RELOC_PPC_EMB_RELSDA:
6756 case BFD_RELOC_PPC_VLE_SDA21:
6757 case BFD_RELOC_PPC_VLE_SDA21_LO:
6758 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6759 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6760 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6761 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6762 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6763 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6764 gas_assert (fixP->fx_addsy != NULL);
6765 /* Fall thru */
6766
6767 case BFD_RELOC_PPC_TLS:
6768 case BFD_RELOC_PPC_TLSGD:
6769 case BFD_RELOC_PPC_TLSLD:
6770 fieldval = 0;
3b8b57a9 6771 break;
7fa9fcb6
TG		 6772#endif
6773
6774#ifdef OBJ_XCOFF
6775 case BFD_RELOC_PPC_B16:
6776 /* Adjust the offset to the instruction boundary. */
6777 fieldval += 2;
6778 break;
6779#endif
252b5132 6780
f728387b
AM		 6781 case BFD_RELOC_VTABLE_INHERIT:
6782 case BFD_RELOC_VTABLE_ENTRY:
6783 case BFD_RELOC_PPC_DTPMOD:
6784 case BFD_RELOC_PPC_TPREL:
6785 case BFD_RELOC_PPC_DTPREL:
6786 case BFD_RELOC_PPC_COPY:
6787 case BFD_RELOC_PPC_GLOB_DAT:
6788 case BFD_RELOC_32_PLT_PCREL:
6789 case BFD_RELOC_PPC_EMB_NADDR32:
6790 case BFD_RELOC_PPC64_TOC:
6791 case BFD_RELOC_CTOR:
6792 case BFD_RELOC_32:
6793 case BFD_RELOC_32_PCREL:
6794 case BFD_RELOC_RVA:
6795 case BFD_RELOC_64:
6796 case BFD_RELOC_64_PCREL:
6797 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6798 as_bad_where (fixP->fx_file, fixP->fx_line,
6799 _("%s unsupported as instruction fixup"),
6800 bfd_get_reloc_code_name (fixP->fx_r_type));
6801 fixP->fx_done = 1;
6802 return;
6803
3b8b57a9 6804 default:
252b5132 6805 break;
3b8b57a9 6806 }
252b5132 6807
3b8b57a9
AM		 6808#ifdef OBJ_ELF
6809/* powerpc uses RELA style relocs, so if emitting a reloc the field
6810 contents can stay at zero. */
6811#define APPLY_RELOC fixP->fx_done
6812#else
6813#define APPLY_RELOC 1
6814#endif
6815 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6816 {
6817 /* Fetch the instruction, insert the fully resolved operand
6818 value, and stuff the instruction back again. */
6819 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6820 if (target_big_endian)
31a91399 6821 {
3b8b57a9
AM		 6822 if (fixP->fx_size == 4)
6823 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6824 else
3b8b57a9 6825 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6826 }
6827 else
3b8b57a9
AM		 6828 {
6829 if (fixP->fx_size == 4)
6830 insn = bfd_getl32 ((unsigned char *) where);
6831 else
6832 insn = bfd_getl16 ((unsigned char *) where);
6833 }
6834 insn = ppc_insert_operand (insn, operand, fieldval,
6835 fixP->tc_fix_data.ppc_cpu,
6836 fixP->fx_file, fixP->fx_line);
6837 if (target_big_endian)
6838 {
6839 if (fixP->fx_size == 4)
6840 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6841 else
6842 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6843 }
6844 else
6845 {
6846 if (fixP->fx_size == 4)
6847 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6848 else
6849 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6850 }
6851 }
6852
6853 if (fixP->fx_done)
6854 /* Nothing else to do here. */
6855 return;
6856
6857 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6858 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9
AM		 6859 {
6860 char *sfile;
6861 unsigned int sline;
6862
6863 /* Use expr_symbol_where to see if this is an expression
6864 symbol. */
6865 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6866 as_bad_where (fixP->fx_file, fixP->fx_line,
6867 _("unresolved expression that must be resolved"));
6868 else
6869 as_bad_where (fixP->fx_file, fixP->fx_line,
6870 _("unsupported relocation against %s"),
6871 S_GET_NAME (fixP->fx_addsy));
6872 fixP->fx_done = 1;
6873 return;
6874 }
6875 }
6876 else
6877 {
6878 /* Handle relocs in data. */
6879 switch (fixP->fx_r_type)
6880 {
252b5132 6881 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6882 if (fixP->fx_addsy
6883 && !S_IS_DEFINED (fixP->fx_addsy)
6884 && !S_IS_WEAK (fixP->fx_addsy))
6885 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6886 /* Fall thru */
252b5132
RH		 6887
6888 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6889 fixP->fx_done = 0;
252b5132
RH		 6890 break;
6891
0baf16f2 6892#ifdef OBJ_ELF
3b8b57a9
AM		 6893 /* These can appear with @l etc. in data. */
6894 case BFD_RELOC_LO16:
3b8b57a9 6895 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6896 case BFD_RELOC_HI16:
3b8b57a9 6897 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6898 case BFD_RELOC_HI16_S:
3b8b57a9 6899 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6900 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6901 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6902 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6903 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6904 case BFD_RELOC_PPC64_ADDR16_HIGH:
6905 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6906 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6907 break;
6908
6909 case BFD_RELOC_PPC_DTPMOD:
6910 case BFD_RELOC_PPC_TPREL:
6911 case BFD_RELOC_PPC_DTPREL:
6912 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6913 break;
6914
6915 /* Just punt all of these to the linker. */
6916 case BFD_RELOC_PPC_B16_BRTAKEN:
6917 case BFD_RELOC_PPC_B16_BRNTAKEN:
6918 case BFD_RELOC_16_GOTOFF:
6919 case BFD_RELOC_LO16_GOTOFF:
6920 case BFD_RELOC_HI16_GOTOFF:
6921 case BFD_RELOC_HI16_S_GOTOFF:
6922 case BFD_RELOC_LO16_PLTOFF:
6923 case BFD_RELOC_HI16_PLTOFF:
6924 case BFD_RELOC_HI16_S_PLTOFF:
6925 case BFD_RELOC_PPC_COPY:
6926 case BFD_RELOC_PPC_GLOB_DAT:
6927 case BFD_RELOC_16_BASEREL:
6928 case BFD_RELOC_LO16_BASEREL:
6929 case BFD_RELOC_HI16_BASEREL:
6930 case BFD_RELOC_HI16_S_BASEREL:
6931 case BFD_RELOC_PPC_TLS:
6932 case BFD_RELOC_PPC_DTPREL16_LO:
6933 case BFD_RELOC_PPC_DTPREL16_HI:
6934 case BFD_RELOC_PPC_DTPREL16_HA:
6935 case BFD_RELOC_PPC_TPREL16_LO:
6936 case BFD_RELOC_PPC_TPREL16_HI:
6937 case BFD_RELOC_PPC_TPREL16_HA:
6938 case BFD_RELOC_PPC_GOT_TLSGD16:
6939 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6940 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6941 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6942 case BFD_RELOC_PPC_GOT_TLSLD16:
6943 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6944 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6945 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6946 case BFD_RELOC_PPC_GOT_DTPREL16:
6947 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6948 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6949 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6950 case BFD_RELOC_PPC_GOT_TPREL16:
6951 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6952 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6953 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6954 case BFD_RELOC_24_PLT_PCREL:
6955 case BFD_RELOC_PPC_LOCAL24PC:
6956 case BFD_RELOC_32_PLT_PCREL:
6957 case BFD_RELOC_GPREL16:
6958 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6959 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6960 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6961 case BFD_RELOC_PPC_EMB_NADDR32:
6962 case BFD_RELOC_PPC_EMB_NADDR16:
6963 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6964 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6965 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6966 case BFD_RELOC_PPC_EMB_SDAI16:
6967 case BFD_RELOC_PPC_EMB_SDA2REL:
6968 case BFD_RELOC_PPC_EMB_SDA2I16:
6969 case BFD_RELOC_PPC_EMB_SDA21:
6970 case BFD_RELOC_PPC_VLE_SDA21_LO:
6971 case BFD_RELOC_PPC_EMB_MRKREF:
6972 case BFD_RELOC_PPC_EMB_RELSEC16:
6973 case BFD_RELOC_PPC_EMB_RELST_LO:
6974 case BFD_RELOC_PPC_EMB_RELST_HI:
6975 case BFD_RELOC_PPC_EMB_RELST_HA:
6976 case BFD_RELOC_PPC_EMB_BIT_FLD:
6977 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6978 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6979 case BFD_RELOC_PPC_TOC16:
6980 case BFD_RELOC_PPC64_TOC16_LO:
6981 case BFD_RELOC_PPC64_TOC16_HI:
6982 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6983 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6984 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6985 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6986 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6987 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6988 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6989 case BFD_RELOC_PPC64_TPREL16_HIGH:
6990 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6991 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6992 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6993 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6994 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6995 fixP->fx_done = 0;
0baf16f2 6996 break;
0baf16f2 6997#endif
3b8b57a9
AM		 6998
6999#ifdef OBJ_XCOFF
7000 case BFD_RELOC_NONE:
3b8b57a9 7001#endif
5656a981
AM		 7002 case BFD_RELOC_CTOR:
7003 case BFD_RELOC_32:
7004 case BFD_RELOC_32_PCREL:
7005 case BFD_RELOC_RVA:
7006 case BFD_RELOC_64:
7007 case BFD_RELOC_64_PCREL:
7008 case BFD_RELOC_16:
7009 case BFD_RELOC_16_PCREL:
7010 case BFD_RELOC_8:
7011 break;
3b8b57a9 7012
252b5132 7013 default:
bc805888 7014 fprintf (stderr,
94f592af 7015 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 7016 fflush (stderr);
252b5132
RH		 7017 abort ();
7018 }
46b596ff 7019
5656a981 7020 if (fixP->fx_size && APPLY_RELOC)
46b596ff 7021 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 7022 fieldval, fixP->fx_size);
bf7279d5
AM		 7023 if (warn_476
7024 && (seg->flags & SEC_CODE) != 0
7025 && fixP->fx_size == 4
7026 && fixP->fx_done
7027 && !fixP->fx_tcbit
7028 && (fixP->fx_r_type == BFD_RELOC_32
7029 || fixP->fx_r_type == BFD_RELOC_CTOR
7030 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7031 as_warn_where (fixP->fx_file, fixP->fx_line,
7032 _("data in executable section"));
5656a981
AM		 7033 }
7034
7035 /* We are only able to convert some relocs to pc-relative. */
7036 if (!fixP->fx_done && fixP->fx_pcrel)
7037 {
7038 switch (fixP->fx_r_type)
7039 {
7040 case BFD_RELOC_LO16:
7041 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7042 break;
7043
7044 case BFD_RELOC_HI16:
7045 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7046 break;
7047
7048 case BFD_RELOC_HI16_S:
7049 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7050 break;
7051
7052 case BFD_RELOC_64:
7053 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7054 break;
7055
7056 case BFD_RELOC_32:
7057 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7058 break;
7059
7060 case BFD_RELOC_16:
7061 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7062 break;
7063
7064 /* Some of course are already pc-relative. */
7065 case BFD_RELOC_LO16_PCREL:
7066 case BFD_RELOC_HI16_PCREL:
7067 case BFD_RELOC_HI16_S_PCREL:
7068 case BFD_RELOC_64_PCREL:
7069 case BFD_RELOC_32_PCREL:
7070 case BFD_RELOC_16_PCREL:
7071 case BFD_RELOC_PPC_B16:
7072 case BFD_RELOC_PPC_B16_BRTAKEN:
7073 case BFD_RELOC_PPC_B16_BRNTAKEN:
7074 case BFD_RELOC_PPC_B26:
7075 case BFD_RELOC_PPC_LOCAL24PC:
7076 case BFD_RELOC_24_PLT_PCREL:
7077 case BFD_RELOC_32_PLT_PCREL:
7078 case BFD_RELOC_64_PLT_PCREL:
7079 case BFD_RELOC_PPC_VLE_REL8:
7080 case BFD_RELOC_PPC_VLE_REL15:
7081 case BFD_RELOC_PPC_VLE_REL24:
7082 break;
7083
7084 default:
7085 if (fixP->fx_addsy)
7086 {
7087 char *sfile;
7088 unsigned int sline;
7089
7090 /* Use expr_symbol_where to see if this is an
7091 expression symbol. */
7092 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7093 as_bad_where (fixP->fx_file, fixP->fx_line,
7094 _("unresolved expression that must"
7095 " be resolved"));
7096 else
7097 as_bad_where (fixP->fx_file, fixP->fx_line,
7098 _("cannot emit PC relative %s relocation"
7099 " against %s"),
7100 bfd_get_reloc_code_name (fixP->fx_r_type),
7101 S_GET_NAME (fixP->fx_addsy));
7102 }
7103 else
7104 as_bad_where (fixP->fx_file, fixP->fx_line,
7105 _("unable to resolve expression"));
7106 fixP->fx_done = 1;
7107 break;
7108 }
252b5132
RH		 7109 }
7110
7111#ifdef OBJ_ELF
3b8b57a9 7112 ppc_elf_validate_fix (fixP, seg);
94f592af 7113 fixP->fx_addnumber = value;
4e6935a6
AM		 7114
7115 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7116 from the section contents. If we are going to be emitting a reloc
7117 then the section contents are immaterial, so don't warn if they
7118 happen to overflow. Leave such warnings to ld. */
7119 if (!fixP->fx_done)
a38a07e0
AM		 7120 {
7121 fixP->fx_no_overflow = 1;
7122
7123 /* Arrange to emit .TOC. as a normal symbol if used in anything
7124 but .TOC.@tocbase. */
7125 if (ppc_obj64
7126 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7127 && fixP->fx_addsy != NULL
7128 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7129 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7130 }
252b5132 7131#else
94f592af
NC		 7132 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7133 fixP->fx_addnumber = 0;
252b5132
RH		 7134 else
7135 {
7136#ifdef TE_PE
94f592af 7137 fixP->fx_addnumber = 0;
252b5132 7138#else
8edcbfcd
TG		 7139 /* We want to use the offset within the toc, not the actual VMA
7140 of the symbol. */
94f592af 7141 fixP->fx_addnumber =
8edcbfcd
TG		 7142 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7143 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7144 /* Set *valP to avoid errors. */
7145 *valP = value;
252b5132
RH		 7146#endif
7147 }
7148#endif
252b5132
RH		 7149}
7150
7151/* Generate a reloc for a fixup. */
7152
7153arelent *
98027b10 7154tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7155{
7156 arelent *reloc;
7157
7158 reloc = (arelent *) xmalloc (sizeof (arelent));
7159
49309057
ILT		 7160 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7161 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7162 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7163 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7164 if (reloc->howto == (reloc_howto_type *) NULL)
7165 {
7166 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7167 _("reloc %d not supported by object file format"),
7168 (int) fixp->fx_r_type);
252b5132
RH		 7169 return NULL;
7170 }
7171 reloc->addend = fixp->fx_addnumber;
7172
7173 return reloc;
7174}
75e21f08
JJ		 7175
7176void
98027b10 7177ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7178{
7179 cfi_add_CFA_def_cfa (1, 0);
7180}
7181
7182int
1df69f4f 7183tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7184{
7185 unsigned int regnum = -1;
7186 unsigned int i;
7187 const char *p;
7188 char *q;
7189 static struct { char *name; int dw2regnum; } regnames[] =
7190 {
7191 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7192 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7193 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7194 { "spe_acc", 111 }, { "spefscr", 112 }
7195 };
7196
7197 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7198 if (strcmp (regnames[i].name, regname) == 0)
7199 return regnames[i].dw2regnum;
7200
7201 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7202 {
7203 p = regname + 1 + (regname[1] == '.');
7204 regnum = strtoul (p, &q, 10);
7205 if (p == q || *q || regnum >= 32)
7206 return -1;
7207 if (regname[0] == 'f')
b7d7dc63 7208 regnum += 32;
75e21f08 7209 else if (regname[0] == 'v')
b7d7dc63 7210 regnum += 77;
75e21f08
JJ		 7211 }
7212 else if (regname[0] == 'c' && regname[1] == 'r')
7213 {
7214 p = regname + 2 + (regname[2] == '.');
7215 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7216 return -1;
75e21f08
JJ		 7217 regnum = p[0] - '0' + 68;
7218 }
7219 return regnum;
7220}
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