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* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163
AM		 182
183/* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 185ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 186
187/* Flags set on encountering toc relocs. */
188enum {
189 has_large_toc_reloc = 1,
190 has_small_toc_reloc = 2
191} toc_reloc_types;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
c865e45b 222 { "ref", ppc_ref, 0 },
252b5132
RH		 223 { "rename", ppc_rename, 0 },
224 { "section", ppc_named_section, 0 },
225 { "stabx", ppc_stabx, 0 },
226 { "text", ppc_section, 't' },
227 { "toc", ppc_toc, 0 },
228 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 229 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 230 { "word", ppc_xcoff_cons, 1 },
231 { "short", ppc_xcoff_cons, 1 },
232 { "vbyte", ppc_vbyte, 0 },
233#endif
234
235#ifdef OBJ_ELF
0baf16f2
AM		 236 { "llong", ppc_elf_cons, 8 },
237 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 238 { "long", ppc_elf_cons, 4 },
239 { "word", ppc_elf_cons, 2 },
240 { "short", ppc_elf_cons, 2 },
241 { "rdata", ppc_elf_rdata, 0 },
242 { "rodata", ppc_elf_rdata, 0 },
243 { "lcomm", ppc_elf_lcomm, 0 },
244#endif
245
246#ifdef TE_PE
99a814a1 247 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 248 { "previous", ppc_previous, 0 },
249 { "pdata", ppc_pdata, 0 },
250 { "ydata", ppc_ydata, 0 },
251 { "reldata", ppc_reldata, 0 },
252 { "rdata", ppc_rdata, 0 },
253 { "ualong", ppc_ualong, 0 },
254 { "znop", ppc_znop, 0 },
255 { "comm", ppc_pe_comm, 0 },
256 { "lcomm", ppc_pe_comm, 1 },
257 { "section", ppc_pe_section, 0 },
258 { "function", ppc_pe_function,0 },
259 { "tocd", ppc_pe_tocd, 0 },
260#endif
261
0baf16f2 262#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 263 { "tc", ppc_tc, 0 },
0baf16f2
AM		 264 { "machine", ppc_machine, 0 },
265#endif
252b5132
RH		 266
267 { NULL, NULL, 0 }
268};
269
270\f
99a814a1
AM		 271/* Predefined register names if -mregnames (or default for Windows NT).
272 In general, there are lots of them, in an attempt to be compatible
273 with a number of other Windows NT assemblers. */
252b5132
RH		 274
275/* Structure to hold information about predefined registers. */
276struct pd_reg
277 {
278 char *name;
279 int value;
280 };
281
282/* List of registers that are pre-defined:
283
284 Each general register has predefined names of the form:
285 1. r<reg_num> which has the value <reg_num>.
286 2. r.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each floating point register has predefined names of the form:
289 1. f<reg_num> which has the value <reg_num>.
290 2. f.<reg_num> which has the value <reg_num>.
291
7a899fff
C		 292 Each vector unit register has predefined names of the form:
293 1. v<reg_num> which has the value <reg_num>.
294 2. v.<reg_num> which has the value <reg_num>.
295
252b5132
RH		 296 Each condition register has predefined names of the form:
297 1. cr<reg_num> which has the value <reg_num>.
298 2. cr.<reg_num> which has the value <reg_num>.
299
300 There are individual registers as well:
301 sp or r.sp has the value 1
302 rtoc or r.toc has the value 2
303 fpscr has the value 0
304 xer has the value 1
305 lr has the value 8
306 ctr has the value 9
307 pmr has the value 0
308 dar has the value 19
309 dsisr has the value 18
310 dec has the value 22
311 sdr1 has the value 25
312 srr0 has the value 26
313 srr1 has the value 27
314
81d4177b 315 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 316
317static const struct pd_reg pre_defined_registers[] =
318{
319 { "cr.0", 0 }, /* Condition Registers */
320 { "cr.1", 1 },
321 { "cr.2", 2 },
322 { "cr.3", 3 },
323 { "cr.4", 4 },
324 { "cr.5", 5 },
325 { "cr.6", 6 },
326 { "cr.7", 7 },
327
328 { "cr0", 0 },
329 { "cr1", 1 },
330 { "cr2", 2 },
331 { "cr3", 3 },
332 { "cr4", 4 },
333 { "cr5", 5 },
334 { "cr6", 6 },
335 { "cr7", 7 },
336
337 { "ctr", 9 },
338
339 { "dar", 19 }, /* Data Access Register */
340 { "dec", 22 }, /* Decrementer */
341 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
342
343 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 344 { "f.1", 1 },
345 { "f.10", 10 },
346 { "f.11", 11 },
347 { "f.12", 12 },
348 { "f.13", 13 },
349 { "f.14", 14 },
350 { "f.15", 15 },
351 { "f.16", 16 },
352 { "f.17", 17 },
353 { "f.18", 18 },
354 { "f.19", 19 },
355 { "f.2", 2 },
356 { "f.20", 20 },
357 { "f.21", 21 },
358 { "f.22", 22 },
359 { "f.23", 23 },
360 { "f.24", 24 },
361 { "f.25", 25 },
362 { "f.26", 26 },
363 { "f.27", 27 },
364 { "f.28", 28 },
365 { "f.29", 29 },
366 { "f.3", 3 },
252b5132
RH		 367 { "f.30", 30 },
368 { "f.31", 31 },
066be9f7
PB		 369
370 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
371 { "f.33", 33 },
372 { "f.34", 34 },
373 { "f.35", 35 },
374 { "f.36", 36 },
375 { "f.37", 37 },
376 { "f.38", 38 },
377 { "f.39", 39 },
81d4177b 378 { "f.4", 4 },
066be9f7
PB		 379 { "f.40", 40 },
380 { "f.41", 41 },
381 { "f.42", 42 },
382 { "f.43", 43 },
383 { "f.44", 44 },
384 { "f.45", 45 },
385 { "f.46", 46 },
386 { "f.47", 47 },
387 { "f.48", 48 },
388 { "f.49", 49 },
81d4177b 389 { "f.5", 5 },
066be9f7
PB		 390 { "f.50", 50 },
391 { "f.51", 51 },
392 { "f.52", 52 },
393 { "f.53", 53 },
394 { "f.54", 54 },
395 { "f.55", 55 },
396 { "f.56", 56 },
397 { "f.57", 57 },
398 { "f.58", 58 },
399 { "f.59", 59 },
81d4177b 400 { "f.6", 6 },
066be9f7
PB		 401 { "f.60", 60 },
402 { "f.61", 61 },
403 { "f.62", 62 },
404 { "f.63", 63 },
81d4177b
KH		 405 { "f.7", 7 },
406 { "f.8", 8 },
407 { "f.9", 9 },
408
409 { "f0", 0 },
410 { "f1", 1 },
411 { "f10", 10 },
412 { "f11", 11 },
413 { "f12", 12 },
414 { "f13", 13 },
415 { "f14", 14 },
416 { "f15", 15 },
417 { "f16", 16 },
418 { "f17", 17 },
419 { "f18", 18 },
420 { "f19", 19 },
421 { "f2", 2 },
422 { "f20", 20 },
423 { "f21", 21 },
424 { "f22", 22 },
425 { "f23", 23 },
426 { "f24", 24 },
427 { "f25", 25 },
428 { "f26", 26 },
429 { "f27", 27 },
430 { "f28", 28 },
431 { "f29", 29 },
432 { "f3", 3 },
252b5132
RH		 433 { "f30", 30 },
434 { "f31", 31 },
066be9f7
PB		 435
436 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
437 { "f33", 33 },
438 { "f34", 34 },
439 { "f35", 35 },
440 { "f36", 36 },
441 { "f37", 37 },
442 { "f38", 38 },
443 { "f39", 39 },
81d4177b 444 { "f4", 4 },
066be9f7
PB		 445 { "f40", 40 },
446 { "f41", 41 },
447 { "f42", 42 },
448 { "f43", 43 },
449 { "f44", 44 },
450 { "f45", 45 },
451 { "f46", 46 },
452 { "f47", 47 },
453 { "f48", 48 },
454 { "f49", 49 },
81d4177b 455 { "f5", 5 },
066be9f7
PB		 456 { "f50", 50 },
457 { "f51", 51 },
458 { "f52", 52 },
459 { "f53", 53 },
460 { "f54", 54 },
461 { "f55", 55 },
462 { "f56", 56 },
463 { "f57", 57 },
464 { "f58", 58 },
465 { "f59", 59 },
81d4177b 466 { "f6", 6 },
066be9f7
PB		 467 { "f60", 60 },
468 { "f61", 61 },
469 { "f62", 62 },
470 { "f63", 63 },
81d4177b
KH		 471 { "f7", 7 },
472 { "f8", 8 },
473 { "f9", 9 },
252b5132
RH		 474
475 { "fpscr", 0 },
476
c3d65c1c
BE		 477 /* Quantization registers used with pair single instructions. */
478 { "gqr.0", 0 },
479 { "gqr.1", 1 },
480 { "gqr.2", 2 },
481 { "gqr.3", 3 },
482 { "gqr.4", 4 },
483 { "gqr.5", 5 },
484 { "gqr.6", 6 },
485 { "gqr.7", 7 },
486 { "gqr0", 0 },
487 { "gqr1", 1 },
488 { "gqr2", 2 },
489 { "gqr3", 3 },
490 { "gqr4", 4 },
491 { "gqr5", 5 },
492 { "gqr6", 6 },
493 { "gqr7", 7 },
494
252b5132
RH		 495 { "lr", 8 }, /* Link Register */
496
497 { "pmr", 0 },
498
499 { "r.0", 0 }, /* General Purpose Registers */
500 { "r.1", 1 },
501 { "r.10", 10 },
502 { "r.11", 11 },
503 { "r.12", 12 },
504 { "r.13", 13 },
505 { "r.14", 14 },
506 { "r.15", 15 },
507 { "r.16", 16 },
508 { "r.17", 17 },
509 { "r.18", 18 },
510 { "r.19", 19 },
511 { "r.2", 2 },
512 { "r.20", 20 },
513 { "r.21", 21 },
514 { "r.22", 22 },
515 { "r.23", 23 },
516 { "r.24", 24 },
517 { "r.25", 25 },
518 { "r.26", 26 },
519 { "r.27", 27 },
520 { "r.28", 28 },
521 { "r.29", 29 },
522 { "r.3", 3 },
523 { "r.30", 30 },
524 { "r.31", 31 },
525 { "r.4", 4 },
526 { "r.5", 5 },
527 { "r.6", 6 },
528 { "r.7", 7 },
529 { "r.8", 8 },
530 { "r.9", 9 },
531
532 { "r.sp", 1 }, /* Stack Pointer */
533
534 { "r.toc", 2 }, /* Pointer to the table of contents */
535
536 { "r0", 0 }, /* More general purpose registers */
537 { "r1", 1 },
538 { "r10", 10 },
539 { "r11", 11 },
540 { "r12", 12 },
541 { "r13", 13 },
542 { "r14", 14 },
543 { "r15", 15 },
544 { "r16", 16 },
545 { "r17", 17 },
546 { "r18", 18 },
547 { "r19", 19 },
548 { "r2", 2 },
549 { "r20", 20 },
550 { "r21", 21 },
551 { "r22", 22 },
552 { "r23", 23 },
553 { "r24", 24 },
554 { "r25", 25 },
555 { "r26", 26 },
556 { "r27", 27 },
557 { "r28", 28 },
558 { "r29", 29 },
559 { "r3", 3 },
560 { "r30", 30 },
561 { "r31", 31 },
562 { "r4", 4 },
563 { "r5", 5 },
564 { "r6", 6 },
565 { "r7", 7 },
566 { "r8", 8 },
567 { "r9", 9 },
568
569 { "rtoc", 2 }, /* Table of contents */
570
571 { "sdr1", 25 }, /* Storage Description Register 1 */
572
573 { "sp", 1 },
574
575 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
576 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 577
066be9f7 578 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 579 { "v.1", 1 },
580 { "v.10", 10 },
581 { "v.11", 11 },
582 { "v.12", 12 },
583 { "v.13", 13 },
584 { "v.14", 14 },
585 { "v.15", 15 },
586 { "v.16", 16 },
587 { "v.17", 17 },
588 { "v.18", 18 },
589 { "v.19", 19 },
590 { "v.2", 2 },
591 { "v.20", 20 },
592 { "v.21", 21 },
593 { "v.22", 22 },
594 { "v.23", 23 },
595 { "v.24", 24 },
596 { "v.25", 25 },
597 { "v.26", 26 },
598 { "v.27", 27 },
599 { "v.28", 28 },
600 { "v.29", 29 },
601 { "v.3", 3 },
7a899fff
C		 602 { "v.30", 30 },
603 { "v.31", 31 },
81d4177b
KH		 604 { "v.4", 4 },
605 { "v.5", 5 },
606 { "v.6", 6 },
607 { "v.7", 7 },
608 { "v.8", 8 },
609 { "v.9", 9 },
7a899fff
C		 610
611 { "v0", 0 },
81d4177b
KH		 612 { "v1", 1 },
613 { "v10", 10 },
614 { "v11", 11 },
615 { "v12", 12 },
616 { "v13", 13 },
617 { "v14", 14 },
618 { "v15", 15 },
619 { "v16", 16 },
620 { "v17", 17 },
621 { "v18", 18 },
622 { "v19", 19 },
623 { "v2", 2 },
624 { "v20", 20 },
625 { "v21", 21 },
626 { "v22", 22 },
627 { "v23", 23 },
628 { "v24", 24 },
629 { "v25", 25 },
630 { "v26", 26 },
631 { "v27", 27 },
632 { "v28", 28 },
633 { "v29", 29 },
634 { "v3", 3 },
7a899fff
C		 635 { "v30", 30 },
636 { "v31", 31 },
81d4177b
KH		 637 { "v4", 4 },
638 { "v5", 5 },
639 { "v6", 6 },
640 { "v7", 7 },
641 { "v8", 8 },
7a899fff 642 { "v9", 9 },
252b5132 643
066be9f7
PB		 644 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
645 { "vs.1", 1 },
646 { "vs.10", 10 },
647 { "vs.11", 11 },
648 { "vs.12", 12 },
649 { "vs.13", 13 },
650 { "vs.14", 14 },
651 { "vs.15", 15 },
652 { "vs.16", 16 },
653 { "vs.17", 17 },
654 { "vs.18", 18 },
655 { "vs.19", 19 },
656 { "vs.2", 2 },
657 { "vs.20", 20 },
658 { "vs.21", 21 },
659 { "vs.22", 22 },
660 { "vs.23", 23 },
661 { "vs.24", 24 },
662 { "vs.25", 25 },
663 { "vs.26", 26 },
664 { "vs.27", 27 },
665 { "vs.28", 28 },
666 { "vs.29", 29 },
667 { "vs.3", 3 },
668 { "vs.30", 30 },
669 { "vs.31", 31 },
670 { "vs.32", 32 },
671 { "vs.33", 33 },
672 { "vs.34", 34 },
673 { "vs.35", 35 },
674 { "vs.36", 36 },
675 { "vs.37", 37 },
676 { "vs.38", 38 },
677 { "vs.39", 39 },
678 { "vs.4", 4 },
679 { "vs.40", 40 },
680 { "vs.41", 41 },
681 { "vs.42", 42 },
682 { "vs.43", 43 },
683 { "vs.44", 44 },
684 { "vs.45", 45 },
685 { "vs.46", 46 },
686 { "vs.47", 47 },
687 { "vs.48", 48 },
688 { "vs.49", 49 },
689 { "vs.5", 5 },
690 { "vs.50", 50 },
691 { "vs.51", 51 },
692 { "vs.52", 52 },
693 { "vs.53", 53 },
694 { "vs.54", 54 },
695 { "vs.55", 55 },
696 { "vs.56", 56 },
697 { "vs.57", 57 },
698 { "vs.58", 58 },
699 { "vs.59", 59 },
700 { "vs.6", 6 },
701 { "vs.60", 60 },
702 { "vs.61", 61 },
703 { "vs.62", 62 },
704 { "vs.63", 63 },
705 { "vs.7", 7 },
706 { "vs.8", 8 },
707 { "vs.9", 9 },
708
709 { "vs0", 0 },
710 { "vs1", 1 },
711 { "vs10", 10 },
712 { "vs11", 11 },
713 { "vs12", 12 },
714 { "vs13", 13 },
715 { "vs14", 14 },
716 { "vs15", 15 },
717 { "vs16", 16 },
718 { "vs17", 17 },
719 { "vs18", 18 },
720 { "vs19", 19 },
721 { "vs2", 2 },
722 { "vs20", 20 },
723 { "vs21", 21 },
724 { "vs22", 22 },
725 { "vs23", 23 },
726 { "vs24", 24 },
727 { "vs25", 25 },
728 { "vs26", 26 },
729 { "vs27", 27 },
730 { "vs28", 28 },
731 { "vs29", 29 },
732 { "vs3", 3 },
733 { "vs30", 30 },
734 { "vs31", 31 },
735 { "vs32", 32 },
736 { "vs33", 33 },
737 { "vs34", 34 },
738 { "vs35", 35 },
739 { "vs36", 36 },
740 { "vs37", 37 },
741 { "vs38", 38 },
742 { "vs39", 39 },
743 { "vs4", 4 },
744 { "vs40", 40 },
745 { "vs41", 41 },
746 { "vs42", 42 },
747 { "vs43", 43 },
748 { "vs44", 44 },
749 { "vs45", 45 },
750 { "vs46", 46 },
751 { "vs47", 47 },
752 { "vs48", 48 },
753 { "vs49", 49 },
754 { "vs5", 5 },
755 { "vs50", 50 },
756 { "vs51", 51 },
757 { "vs52", 52 },
758 { "vs53", 53 },
759 { "vs54", 54 },
760 { "vs55", 55 },
761 { "vs56", 56 },
762 { "vs57", 57 },
763 { "vs58", 58 },
764 { "vs59", 59 },
765 { "vs6", 6 },
766 { "vs60", 60 },
767 { "vs61", 61 },
768 { "vs62", 62 },
769 { "vs63", 63 },
770 { "vs7", 7 },
771 { "vs8", 8 },
772 { "vs9", 9 },
773
252b5132
RH		 774 { "xer", 1 },
775
776};
777
bc805888 778#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 779
780/* Given NAME, find the register number associated with that name, return
781 the integer value associated with the given name or -1 on failure. */
782
252b5132 783static int
98027b10 784reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 785{
786 int middle, low, high;
787 int cmp;
788
789 low = 0;
790 high = regcount - 1;
791
792 do
793 {
794 middle = (low + high) / 2;
795 cmp = strcasecmp (name, regs[middle].name);
796 if (cmp < 0)
797 high = middle - 1;
798 else if (cmp > 0)
799 low = middle + 1;
800 else
801 return regs[middle].value;
802 }
803 while (low <= high);
804
805 return -1;
806}
807
808/*
99a814a1 809 * Summary of register_name.
252b5132
RH		 810 *
811 * in: Input_line_pointer points to 1st char of operand.
812 *
813 * out: A expressionS.
814 * The operand may have been a register: in this case, X_op == O_register,
815 * X_add_number is set to the register number, and truth is returned.
816 * Input_line_pointer->(next non-blank) char after operand, or is in its
817 * original state.
818 */
819
b34976b6 820static bfd_boolean
98027b10 821register_name (expressionS *expressionP)
252b5132
RH		 822{
823 int reg_number;
824 char *name;
825 char *start;
826 char c;
827
99a814a1 828 /* Find the spelling of the operand. */
252b5132 829 start = name = input_line_pointer;
3882b010 830 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 831 name = ++input_line_pointer;
832
3882b010 833 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 834 return FALSE;
252b5132
RH		 835
836 c = get_symbol_end ();
837 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
838
468cced8
AM		 839 /* Put back the delimiting char. */
840 *input_line_pointer = c;
841
99a814a1 842 /* Look to see if it's in the register table. */
81d4177b 843 if (reg_number >= 0)
252b5132
RH		 844 {
845 expressionP->X_op = O_register;
846 expressionP->X_add_number = reg_number;
81d4177b 847
99a814a1 848 /* Make the rest nice. */
252b5132
RH		 849 expressionP->X_add_symbol = NULL;
850 expressionP->X_op_symbol = NULL;
b34976b6 851 return TRUE;
252b5132 852 }
468cced8
AM		 853
854 /* Reset the line as if we had not done anything. */
855 input_line_pointer = start;
b34976b6 856 return FALSE;
252b5132
RH		 857}
858\f
859/* This function is called for each symbol seen in an expression. It
860 handles the special parsing which PowerPC assemblers are supposed
861 to use for condition codes. */
862
863/* Whether to do the special parsing. */
b34976b6 864static bfd_boolean cr_operand;
252b5132
RH		 865
866/* Names to recognize in a condition code. This table is sorted. */
867static const struct pd_reg cr_names[] =
868{
869 { "cr0", 0 },
870 { "cr1", 1 },
871 { "cr2", 2 },
872 { "cr3", 3 },
873 { "cr4", 4 },
874 { "cr5", 5 },
875 { "cr6", 6 },
876 { "cr7", 7 },
877 { "eq", 2 },
878 { "gt", 1 },
879 { "lt", 0 },
880 { "so", 3 },
881 { "un", 3 }
882};
883
884/* Parsing function. This returns non-zero if it recognized an
885 expression. */
886
887int
91d6fa6a 888ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 889{
890 int val;
891
892 if (! cr_operand)
893 return 0;
894
13abbae3
AM		 895 if (*name == '%')
896 ++name;
252b5132
RH		 897 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
898 name);
899 if (val < 0)
900 return 0;
901
91d6fa6a
NC		 902 exp->X_op = O_constant;
903 exp->X_add_number = val;
252b5132
RH		 904
905 return 1;
906}
907\f
908/* Local variables. */
909
2b3c4602
AM		 910/* Whether to target xcoff64/elf64. */
911static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 912
252b5132
RH		 913/* Opcode hash table. */
914static struct hash_control *ppc_hash;
915
916/* Macro hash table. */
917static struct hash_control *ppc_macro_hash;
918
919#ifdef OBJ_ELF
99a814a1 920/* What type of shared library support to use. */
5d6f4f16 921static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 922
99a814a1 923/* Flags to set in the elf header. */
252b5132
RH		 924static flagword ppc_flags = 0;
925
926/* Whether this is Solaris or not. */
927#ifdef TARGET_SOLARIS_COMMENT
b34976b6 928#define SOLARIS_P TRUE
252b5132 929#else
b34976b6 930#define SOLARIS_P FALSE
252b5132
RH		 931#endif
932
b34976b6 933static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 934#endif
935
936#ifdef OBJ_XCOFF
937
938/* The RS/6000 assembler uses the .csect pseudo-op to generate code
939 using a bunch of different sections. These assembler sections,
940 however, are all encompassed within the .text or .data sections of
941 the final output file. We handle this by using different
942 subsegments within these main segments. */
943
944/* Next subsegment to allocate within the .text segment. */
945static subsegT ppc_text_subsegment = 2;
946
947/* Linked list of csects in the text section. */
948static symbolS *ppc_text_csects;
949
950/* Next subsegment to allocate within the .data segment. */
951static subsegT ppc_data_subsegment = 2;
952
953/* Linked list of csects in the data section. */
954static symbolS *ppc_data_csects;
955
956/* The current csect. */
957static symbolS *ppc_current_csect;
958
959/* The RS/6000 assembler uses a TOC which holds addresses of functions
960 and variables. Symbols are put in the TOC with the .tc pseudo-op.
961 A special relocation is used when accessing TOC entries. We handle
962 the TOC as a subsegment within the .data segment. We set it up if
963 we see a .toc pseudo-op, and save the csect symbol here. */
964static symbolS *ppc_toc_csect;
965
966/* The first frag in the TOC subsegment. */
967static fragS *ppc_toc_frag;
968
969/* The first frag in the first subsegment after the TOC in the .data
970 segment. NULL if there are no subsegments after the TOC. */
971static fragS *ppc_after_toc_frag;
972
973/* The current static block. */
974static symbolS *ppc_current_block;
975
976/* The COFF debugging section; set by md_begin. This is not the
977 .debug section, but is instead the secret BFD section which will
978 cause BFD to set the section number of a symbol to N_DEBUG. */
979static asection *ppc_coff_debug_section;
980
981#endif /* OBJ_XCOFF */
982
983#ifdef TE_PE
984
985/* Various sections that we need for PE coff support. */
986static segT ydata_section;
987static segT pdata_section;
988static segT reldata_section;
989static segT rdata_section;
990static segT tocdata_section;
991
81d4177b 992/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 993static segT ppc_previous_section;
994static segT ppc_current_section;
995
996#endif /* TE_PE */
997
998#ifdef OBJ_ELF
999symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1000#define PPC_APUINFO_ISEL 0x40
1001#define PPC_APUINFO_PMR 0x41
1002#define PPC_APUINFO_RFMCI 0x42
1003#define PPC_APUINFO_CACHELCK 0x43
1004#define PPC_APUINFO_SPE 0x100
1005#define PPC_APUINFO_EFS 0x101
1006#define PPC_APUINFO_BRLOCK 0x102
1007
b34976b6
AM		 1008/*
1009 * We keep a list of APUinfo
6a0c61b7
EZ		 1010 */
1011unsigned long *ppc_apuinfo_list;
1012unsigned int ppc_apuinfo_num;
1013unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1014#endif /* OBJ_ELF */
1015\f
1016#ifdef OBJ_ELF
15c1449b 1017const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1018#else
15c1449b 1019const char *const md_shortopts = "um:";
252b5132 1020#endif
15c1449b 1021const struct option md_longopts[] = {
252b5132
RH		 1022 {NULL, no_argument, NULL, 0}
1023};
15c1449b 1024const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1025
1026int
98027b10 1027md_parse_option (int c, char *arg)
252b5132 1028{
69fe9ce5
AM		 1029 ppc_cpu_t new_cpu;
1030
252b5132
RH		 1031 switch (c)
1032 {
1033 case 'u':
1034 /* -u means that any undefined symbols should be treated as
1035 external, which is the default for gas anyhow. */
1036 break;
1037
1038#ifdef OBJ_ELF
1039 case 'l':
1040 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1041 sake, recognize -be also. */
252b5132
RH		 1042 if (strcmp (arg, "e") == 0)
1043 {
1044 target_big_endian = 0;
1045 set_target_endian = 1;
1046 }
1047 else
1048 return 0;
1049
1050 break;
1051
1052 case 'b':
1053 if (strcmp (arg, "e") == 0)
1054 {
1055 target_big_endian = 1;
1056 set_target_endian = 1;
1057 }
1058 else
1059 return 0;
1060
1061 break;
1062
1063 case 'K':
99a814a1 1064 /* Recognize -K PIC. */
252b5132
RH		 1065 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1066 {
1067 shlib = SHLIB_PIC;
1068 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1069 }
1070 else
1071 return 0;
1072
1073 break;
1074#endif
1075
7f6d05e8
CP		 1076 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1077 case 'a':
1078 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1079 {
1080#ifdef BFD64
1081 ppc_obj64 = 1;
1082#else
1083 as_fatal (_("%s unsupported"), "-a64");
1084#endif
1085 }
7f6d05e8 1086 else if (strcmp (arg, "32") == 0)
2b3c4602 1087 ppc_obj64 = 0;
7f6d05e8
CP		 1088 else
1089 return 0;
1090 break;
81d4177b 1091
252b5132 1092 case 'm':
69fe9ce5
AM		 1093 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1094 ppc_cpu = new_cpu;
252b5132
RH		 1095
1096 else if (strcmp (arg, "regnames") == 0)
b34976b6 1097 reg_names_p = TRUE;
252b5132
RH		 1098
1099 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1100 reg_names_p = FALSE;
252b5132
RH		 1101
1102#ifdef OBJ_ELF
99a814a1
AM		 1103 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1104 that require relocation. */
252b5132
RH		 1105 else if (strcmp (arg, "relocatable") == 0)
1106 {
5d6f4f16 1107 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1108 ppc_flags |= EF_PPC_RELOCATABLE;
1109 }
1110
1111 else if (strcmp (arg, "relocatable-lib") == 0)
1112 {
5d6f4f16 1113 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1114 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1115 }
1116
99a814a1 1117 /* -memb, set embedded bit. */
252b5132
RH		 1118 else if (strcmp (arg, "emb") == 0)
1119 ppc_flags |= EF_PPC_EMB;
1120
99a814a1
AM		 1121 /* -mlittle/-mbig set the endianess. */
1122 else if (strcmp (arg, "little") == 0
1123 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1124 {
1125 target_big_endian = 0;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1130 {
1131 target_big_endian = 1;
1132 set_target_endian = 1;
1133 }
1134
1135 else if (strcmp (arg, "solaris") == 0)
1136 {
b34976b6 1137 msolaris = TRUE;
252b5132
RH		 1138 ppc_comment_chars = ppc_solaris_comment_chars;
1139 }
1140
1141 else if (strcmp (arg, "no-solaris") == 0)
1142 {
b34976b6 1143 msolaris = FALSE;
252b5132
RH		 1144 ppc_comment_chars = ppc_eabi_comment_chars;
1145 }
1146#endif
1147 else
1148 {
1149 as_bad (_("invalid switch -m%s"), arg);
1150 return 0;
1151 }
1152 break;
1153
1154#ifdef OBJ_ELF
1155 /* -V: SVR4 argument to print version ID. */
1156 case 'V':
1157 print_version_id ();
1158 break;
1159
1160 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1161 should be emitted or not. FIXME: Not implemented. */
1162 case 'Q':
1163 break;
1164
1165 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1166 rather than .stabs.excl, which is ignored by the linker.
1167 FIXME: Not implemented. */
1168 case 's':
1169 if (arg)
1170 return 0;
1171
1172 break;
1173#endif
1174
1175 default:
1176 return 0;
1177 }
1178
1179 return 1;
1180}
1181
1182void
98027b10 1183md_show_usage (FILE *stream)
252b5132 1184{
bc805888 1185 fprintf (stream, _("\
252b5132 1186PowerPC options:\n\
ce3d2015
AM		 1187-a32 generate ELF32/XCOFF32\n\
1188-a64 generate ELF64/XCOFF64\n\
1189-u ignored\n\
1190-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1191-mpwr generate code for POWER (RIOS1)\n\
1192-m601 generate code for PowerPC 601\n\
418c1742 1193-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1194 generate code for PowerPC 603/604\n\
1195-m403 generate code for PowerPC 403\n\
1196-m405 generate code for PowerPC 405\n\
1197-m440 generate code for PowerPC 440\n\
1198-m464 generate code for PowerPC 464\n\
1199-m476 generate code for PowerPC 476\n\
f5c120c5 1200-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1201 generate code for PowerPC 7400/7410/7450/7455\n\
1202-m750cl generate code for PowerPC 750cl\n"));
df12615d 1203 fprintf (stream, _("\
ce3d2015
AM		 1204-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1205-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1206-mbooke generate code for 32-bit PowerPC BookE\n\
1207-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1208-mpower4, -mpwr4 generate code for Power4 architecture\n\
1209-mpower5, -mpwr5, -mpwr5x\n\
1210 generate code for Power5 architecture\n\
1211-mpower6, -mpwr6 generate code for Power6 architecture\n\
1212-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1213-mcell generate code for Cell Broadband Engine architecture\n\
1214-mcom generate code Power/PowerPC common instructions\n\
1215-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1216 fprintf (stream, _("\
ce3d2015
AM		 1217-maltivec generate code for AltiVec\n\
1218-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1219-me300 generate code for PowerPC e300 family\n\
1220-me500, -me500x2 generate code for Motorola e500 core complex\n\
1221-me500mc, generate code for Freescale e500mc core complex\n\
1222-me500mc64, generate code for Freescale e500mc64 core complex\n\
1223-mspe generate code for Motorola SPE instructions\n\
1224-mtitan generate code for AppliedMicro Titan core complex\n\
1225-mregnames Allow symbolic names for registers\n\
1226-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1227#ifdef OBJ_ELF
bc805888 1228 fprintf (stream, _("\
ce3d2015
AM		 1229-mrelocatable support for GCC's -mrelocatble option\n\
1230-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1231-memb set PPC_EMB bit in ELF flags\n\
df12615d 1232-mlittle, -mlittle-endian, -l, -le\n\
ce3d2015 1233 generate code for a little endian machine\n\
df12615d 1234-mbig, -mbig-endian, -b, -be\n\
ce3d2015
AM		 1235 generate code for a big endian machine\n\
1236-msolaris generate code for Solaris\n\
1237-mno-solaris do not generate code for Solaris\n\
1238-V print assembler version number\n\
1239-Qy, -Qn ignored\n"));
252b5132
RH		 1240#endif
1241}
1242\f
1243/* Set ppc_cpu if it is not already set. */
1244
1245static void
98027b10 1246ppc_set_cpu (void)
252b5132
RH		 1247{
1248 const char *default_os = TARGET_OS;
1249 const char *default_cpu = TARGET_CPU;
1250
3c9030c1 1251 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1252 {
2a98c3a6 1253 if (ppc_obj64)
3c9030c1 1254 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1255 else if (strncmp (default_os, "aix", 3) == 0
1256 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1257 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1258 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1259 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1260 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1261 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1262 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1263 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1264 else
99a814a1
AM		 1265 as_fatal (_("Unknown default cpu = %s, os = %s"),
1266 default_cpu, default_os);
252b5132
RH		 1267 }
1268}
1269
9232bbb0
AM		 1270/* Figure out the BFD architecture to use. This function and ppc_mach
1271 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1272
1273enum bfd_architecture
98027b10 1274ppc_arch (void)
252b5132
RH		 1275{
1276 const char *default_cpu = TARGET_CPU;
1277 ppc_set_cpu ();
1278
1279 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1280 return bfd_arch_powerpc;
1281 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1282 return bfd_arch_rs6000;
1283 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1284 {
1285 if (strcmp (default_cpu, "rs6000") == 0)
1286 return bfd_arch_rs6000;
0baf16f2 1287 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1288 return bfd_arch_powerpc;
1289 }
1290
1291 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1292 return bfd_arch_unknown;
1293}
1294
7f6d05e8 1295unsigned long
98027b10 1296ppc_mach (void)
7f6d05e8 1297{
2a98c3a6
AM		 1298 if (ppc_obj64)
1299 return bfd_mach_ppc64;
1300 else if (ppc_arch () == bfd_arch_rs6000)
1301 return bfd_mach_rs6k;
ce3d2015
AM		 1302 else if (ppc_cpu & PPC_OPCODE_TITAN)
1303 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1304 else
1305 return bfd_mach_ppc;
7f6d05e8
CP		 1306}
1307
81d4177b 1308extern char*
98027b10 1309ppc_target_format (void)
7f6d05e8
CP		 1310{
1311#ifdef OBJ_COFF
1312#ifdef TE_PE
99a814a1 1313 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1314#elif TE_POWERMAC
0baf16f2 1315 return "xcoff-powermac";
7f6d05e8 1316#else
eb1e0e80 1317# ifdef TE_AIX5
2b3c4602 1318 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1319# else
2b3c4602 1320 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1321# endif
7f6d05e8 1322#endif
7f6d05e8
CP		 1323#endif
1324#ifdef OBJ_ELF
9d8504b1
PB		 1325# ifdef TE_VXWORKS
1326 return "elf32-powerpc-vxworks";
1327# else
0baf16f2 1328 return (target_big_endian
2b3c4602
AM		 1329 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1330 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1331# endif
7f6d05e8
CP		 1332#endif
1333}
1334
69c040df
AM		 1335/* Insert opcodes and macros into hash tables. Called at startup and
1336 for .cpu pseudo. */
252b5132 1337
69c040df
AM		 1338static void
1339ppc_setup_opcodes (void)
252b5132 1340{
98027b10 1341 const struct powerpc_opcode *op;
252b5132
RH		 1342 const struct powerpc_opcode *op_end;
1343 const struct powerpc_macro *macro;
1344 const struct powerpc_macro *macro_end;
b84bf58a 1345 bfd_boolean bad_insn = FALSE;
252b5132 1346
69c040df
AM		 1347 if (ppc_hash != NULL)
1348 hash_die (ppc_hash);
1349 if (ppc_macro_hash != NULL)
1350 hash_die (ppc_macro_hash);
252b5132
RH		 1351
1352 /* Insert the opcodes into a hash table. */
1353 ppc_hash = hash_new ();
1354
c43a438d 1355 if (ENABLE_CHECKING)
b84bf58a 1356 {
c43a438d 1357 unsigned int i;
b84bf58a 1358
c43a438d
AM		 1359 /* Check operand masks. Code here and in the disassembler assumes
1360 all the 1's in the mask are contiguous. */
1361 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1362 {
c43a438d
AM		 1363 unsigned long mask = powerpc_operands[i].bitm;
1364 unsigned long right_bit;
1365 unsigned int j;
1366
1367 right_bit = mask & -mask;
1368 mask += right_bit;
1369 right_bit = mask & -mask;
1370 if (mask != right_bit)
1371 {
1372 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1373 bad_insn = TRUE;
1374 }
1375 for (j = i + 1; j < num_powerpc_operands; ++j)
1376 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1377 sizeof (powerpc_operands[0])) == 0)
1378 {
1379 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1380 j, i);
1381 bad_insn = TRUE;
1382 }
b84bf58a
AM		 1383 }
1384 }
1385
252b5132
RH		 1386 op_end = powerpc_opcodes + powerpc_num_opcodes;
1387 for (op = powerpc_opcodes; op < op_end; op++)
1388 {
c43a438d 1389 if (ENABLE_CHECKING)
b84bf58a 1390 {
c43a438d
AM		 1391 const unsigned char *o;
1392 unsigned long omask = op->mask;
8dbcd839 1393
d815f1a9 1394 if (op != powerpc_opcodes)
8dbcd839 1395 {
d815f1a9
AM		 1396 /* The major opcodes had better be sorted. Code in the
1397 disassembler assumes the insns are sorted according to
1398 major opcode. */
1399 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1400 {
1401 as_bad (_("major opcode is not sorted for %s"),
1402 op->name);
1403 bad_insn = TRUE;
1404 }
1405
1406 /* Warn if the table isn't more strictly ordered.
1407 Unfortunately it doesn't seem possible to order the
1408 table on much more than the major opcode, which makes
1409 it difficult to implement a binary search in the
1410 disassembler. The problem is that we have multiple
1411 ways to disassemble instructions, and we usually want
1412 to choose a more specific form (with more bits set in
1413 the opcode) than a more general form. eg. all of the
1414 following are equivalent:
1415 bne label # opcode = 0x40820000, mask = 0xff830003
1416 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1417 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1418
1419 There are also cases where the table needs to be out
1420 of order to disassemble the correct instruction for
2f3bb96a 1421 processor variants. */
d815f1a9
AM		 1422 else if (0)
1423 {
1424 unsigned long t1 = op[0].opcode;
1425 unsigned long t2 = op[-1].opcode;
1426
1427 if (((t1 ^ t2) & 0xfc0007ff) == 0
1428 && (t1 & 0xfc0006df) == 0x7c000286)
1429 {
1430 /* spr field is split. */
1431 t1 = ((t1 & ~0x1ff800)
1432 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1433 t2 = ((t2 & ~0x1ff800)
1434 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1435 }
1436 if (t1 < t2)
1437 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1438 op[0].name, op[0].opcode, op[0].mask,
1439 op[-1].name, op[-1].opcode, op[-1].mask);
1440 }
8dbcd839 1441 }
c43a438d
AM		 1442
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1445 {
1446 as_bad (_("mask trims opcode bits for %s"),
1447 op->name);
1448 bad_insn = TRUE;
1449 }
1450
1451 /* The operands must not overlap the opcode or each other. */
1452 for (o = op->operands; *o; ++o)
1453 if (*o >= num_powerpc_operands)
1454 {
1455 as_bad (_("operand index error for %s"),
1456 op->name);
1457 bad_insn = TRUE;
1458 }
1459 else
b84bf58a 1460 {
c43a438d
AM		 1461 const struct powerpc_operand *operand = &powerpc_operands[*o];
1462 if (operand->shift >= 0)
b84bf58a 1463 {
c43a438d
AM		 1464 unsigned long mask = operand->bitm << operand->shift;
1465 if (omask & mask)
1466 {
1467 as_bad (_("operand %d overlap in %s"),
1468 (int) (o - op->operands), op->name);
1469 bad_insn = TRUE;
1470 }
1471 omask |= mask;
b84bf58a 1472 }
b84bf58a 1473 }
c43a438d 1474 }
252b5132 1475
2b3c4602 1476 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1477 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1478 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1479 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1480 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1481 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1482 {
1483 const char *retval;
1484
98027b10 1485 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1486 if (retval != NULL)
252b5132 1487 {
99a814a1 1488 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1489 if ((ppc_cpu & PPC_OPCODE_601) != 0
1490 && (op->flags & PPC_OPCODE_POWER) != 0)
1491 continue;
1492
b84bf58a 1493 as_bad (_("duplicate instruction %s"),
99a814a1 1494 op->name);
b84bf58a 1495 bad_insn = TRUE;
252b5132
RH		 1496 }
1497 }
1498 }
1499
3c9030c1
AM		 1500 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1501 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1502 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1503
252b5132
RH		 1504 /* Insert the macros into a hash table. */
1505 ppc_macro_hash = hash_new ();
1506
1507 macro_end = powerpc_macros + powerpc_num_macros;
1508 for (macro = powerpc_macros; macro < macro_end; macro++)
1509 {
1510 if ((macro->flags & ppc_cpu) != 0)
1511 {
1512 const char *retval;
1513
98027b10 1514 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1515 if (retval != (const char *) NULL)
1516 {
b84bf58a
AM		 1517 as_bad (_("duplicate macro %s"), macro->name);
1518 bad_insn = TRUE;
252b5132
RH		 1519 }
1520 }
1521 }
1522
b84bf58a 1523 if (bad_insn)
252b5132 1524 abort ();
69c040df
AM		 1525}
1526
1527/* This function is called when the assembler starts up. It is called
1528 after the options have been parsed and the output file has been
1529 opened. */
1530
1531void
98027b10 1532md_begin (void)
69c040df
AM		 1533{
1534 ppc_set_cpu ();
1535
1536 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1537
1538#ifdef OBJ_ELF
1539 /* Set the ELF flags if desired. */
1540 if (ppc_flags && !msolaris)
1541 bfd_set_private_flags (stdoutput, ppc_flags);
1542#endif
1543
1544 ppc_setup_opcodes ();
252b5132 1545
67c1ffbe 1546 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1547 by the user. */
252b5132
RH		 1548 if (!set_target_endian)
1549 {
1550 set_target_endian = 1;
1551 target_big_endian = PPC_BIG_ENDIAN;
1552 }
1553
1554#ifdef OBJ_XCOFF
1555 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1556
1557 /* Create dummy symbols to serve as initial csects. This forces the
1558 text csects to precede the data csects. These symbols will not
1559 be output. */
1560 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1561 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1562 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1563 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1564#endif
1565
1566#ifdef TE_PE
1567
1568 ppc_current_section = text_section;
81d4177b 1569 ppc_previous_section = 0;
252b5132
RH		 1570
1571#endif
1572}
1573
6a0c61b7 1574void
98027b10 1575ppc_cleanup (void)
6a0c61b7 1576{
dc1d03fc 1577#ifdef OBJ_ELF
6a0c61b7
EZ		 1578 if (ppc_apuinfo_list == NULL)
1579 return;
1580
1581 /* Ok, so write the section info out. We have this layout:
1582
1583 byte data what
1584 ---- ---- ----
1585 0 8 length of "APUinfo\0"
1586 4 (n*4) number of APU's (4 bytes each)
1587 8 2 note type 2
1588 12 "APUinfo\0" name
1589 20 APU#1 first APU's info
1590 24 APU#2 second APU's info
1591 ... ...
1592 */
1593 {
1594 char *p;
1595 asection *seg = now_seg;
1596 subsegT subseg = now_subseg;
1597 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1598 unsigned int i;
6a0c61b7
EZ		 1599
1600 /* Create the .PPC.EMB.apuinfo section. */
1601 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1602 bfd_set_section_flags (stdoutput,
1603 apuinfo_secp,
e1a9cb8e 1604 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1605
1606 p = frag_more (4);
1607 md_number_to_chars (p, (valueT) 8, 4);
1608
1609 p = frag_more (4);
e98d298c 1610 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1611
1612 p = frag_more (4);
1613 md_number_to_chars (p, (valueT) 2, 4);
1614
1615 p = frag_more (8);
1616 strcpy (p, "APUinfo");
1617
1618 for (i = 0; i < ppc_apuinfo_num; i++)
1619 {
b34976b6
AM		 1620 p = frag_more (4);
1621 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1622 }
1623
1624 frag_align (2, 0, 0);
1625
1626 /* We probably can't restore the current segment, for there likely
1627 isn't one yet... */
1628 if (seg && subseg)
1629 subseg_set (seg, subseg);
1630 }
dc1d03fc 1631#endif
6a0c61b7
EZ		 1632}
1633
252b5132
RH		 1634/* Insert an operand value into an instruction. */
1635
1636static unsigned long
a1867a27
AM		 1637ppc_insert_operand (unsigned long insn,
1638 const struct powerpc_operand *operand,
1639 offsetT val,
91d6fa6a 1640 ppc_cpu_t cpu,
a1867a27
AM		 1641 char *file,
1642 unsigned int line)
252b5132 1643{
b84bf58a 1644 long min, max, right;
eb42fac1 1645
b84bf58a
AM		 1646 max = operand->bitm;
1647 right = max & -max;
1648 min = 0;
1649
1650 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1651 {
b84bf58a 1652 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1653 max = (max >> 1) & -right;
1654 min = ~max & -right;
b84bf58a 1655 }
252b5132 1656
b84bf58a 1657 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1658 max++;
252b5132 1659
b84bf58a 1660 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1661 {
1662 long tmp = min;
1663 min = -max;
1664 max = -tmp;
1665 }
b84bf58a 1666
a1867a27
AM		 1667 if (min <= max)
1668 {
1669 /* Some people write constants with the sign extension done by
1670 hand but only up to 32 bits. This shouldn't really be valid,
1671 but, to permit this code to assemble on a 64-bit host, we
1672 sign extend the 32-bit value to 64 bits if so doing makes the
1673 value valid. */
1674 if (val > max
1675 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1676 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1677 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1678 val = val - 0x80000000 - 0x80000000;
1679
1680 /* Similarly, people write expressions like ~(1<<15), and expect
1681 this to be OK for a 32-bit unsigned value. */
1682 else if (val < min
1683 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1684 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1685 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1686 val = val + 0x80000000 + 0x80000000;
1687
1688 else if (val < min
1689 || val > max
1690 || (val & (right - 1)) != 0)
1691 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1692 }
b84bf58a 1693
252b5132
RH		 1694 if (operand->insert)
1695 {
1696 const char *errmsg;
1697
1698 errmsg = NULL;
91d6fa6a 1699 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1700 if (errmsg != (const char *) NULL)
ee2c9aa9 1701 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1702 }
1703 else
b84bf58a 1704 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1705
1706 return insn;
1707}
1708
1709\f
1710#ifdef OBJ_ELF
1711/* Parse @got, etc. and return the desired relocation. */
1712static bfd_reloc_code_real_type
98027b10 1713ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1714{
1715 struct map_bfd {
1716 char *string;
b7d7dc63
AM		 1717 unsigned int length : 8;
1718 unsigned int valid32 : 1;
1719 unsigned int valid64 : 1;
1720 unsigned int reloc;
252b5132
RH		 1721 };
1722
1723 char ident[20];
1724 char *str = *str_p;
1725 char *str2;
1726 int ch;
1727 int len;
15c1449b 1728 const struct map_bfd *ptr;
252b5132 1729
b7d7dc63
AM		 1730#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1731#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1732#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1733
15c1449b 1734 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1735 MAP ("l", BFD_RELOC_LO16),
1736 MAP ("h", BFD_RELOC_HI16),
1737 MAP ("ha", BFD_RELOC_HI16_S),
1738 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1739 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1740 MAP ("got", BFD_RELOC_16_GOTOFF),
1741 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1742 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1743 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1744 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1745 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1746 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1747 MAP ("copy", BFD_RELOC_PPC_COPY),
1748 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1749 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1750 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1751 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1752 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1753 MAP ("tls", BFD_RELOC_PPC_TLS),
1754 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1755 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1756 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1757 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1758 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1759 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1760 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1761 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1762 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1763 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1764 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1765 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1766 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1767 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1768 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1769 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1770 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1771 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1772 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1773 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1774 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1775 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1776 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1777 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1778 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1779 MAP32 ("fixup", BFD_RELOC_CTOR),
1780 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1781 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1782 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1783 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1784 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1785 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1786 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1787 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1788 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1789 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1790 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1791 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1792 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1793 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1794 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1795 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1796 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1797 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1798 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1799 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1800 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1801 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1802 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1803 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1804 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1805 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1806 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1807 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1808 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1809 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1810 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1811 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1812 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1813 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1814 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1815 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1816 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1817 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1818 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1819 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1820 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1821 };
1822
1823 if (*str++ != '@')
1824 return BFD_RELOC_UNUSED;
1825
1826 for (ch = *str, str2 = ident;
1827 (str2 < ident + sizeof (ident) - 1
3882b010 1828 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1829 ch = *++str)
1830 {
3882b010 1831 *str2++ = TOLOWER (ch);
252b5132
RH		 1832 }
1833
1834 *str2 = '\0';
1835 len = str2 - ident;
1836
1837 ch = ident[0];
1838 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1839 if (ch == ptr->string[0]
1840 && len == ptr->length
b7d7dc63
AM		 1841 && memcmp (ident, ptr->string, ptr->length) == 0
1842 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1843 {
15c1449b
AM		 1844 int reloc = ptr->reloc;
1845
727fc41e
AM		 1846 if (!ppc_obj64 && exp_p->X_add_number != 0)
1847 {
1848 switch (reloc)
1849 {
1850 case BFD_RELOC_16_GOTOFF:
1851 case BFD_RELOC_LO16_GOTOFF:
1852 case BFD_RELOC_HI16_GOTOFF:
1853 case BFD_RELOC_HI16_S_GOTOFF:
1854 as_warn (_("identifier+constant@got means "
1855 "identifier@got+constant"));
1856 break;
1857
1858 case BFD_RELOC_PPC_GOT_TLSGD16:
1859 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1860 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1861 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1862 case BFD_RELOC_PPC_GOT_TLSLD16:
1863 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1864 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1865 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1866 case BFD_RELOC_PPC_GOT_DTPREL16:
1867 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1868 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1869 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1870 case BFD_RELOC_PPC_GOT_TPREL16:
1871 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1872 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1873 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1874 as_bad (_("symbol+offset not supported for got tls"));
1875 break;
1876 }
1877 }
5f6db75a
AM		 1878
1879 /* Now check for identifier@suffix+constant. */
1880 if (*str == '-' || *str == '+')
252b5132 1881 {
5f6db75a
AM		 1882 char *orig_line = input_line_pointer;
1883 expressionS new_exp;
1884
1885 input_line_pointer = str;
1886 expression (&new_exp);
1887 if (new_exp.X_op == O_constant)
252b5132 1888 {
5f6db75a
AM		 1889 exp_p->X_add_number += new_exp.X_add_number;
1890 str = input_line_pointer;
252b5132 1891 }
5f6db75a
AM		 1892
1893 if (&input_line_pointer != str_p)
1894 input_line_pointer = orig_line;
252b5132 1895 }
252b5132 1896 *str_p = str;
0baf16f2 1897
2b3c4602 1898 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1899 && exp_p->X_op == O_symbol
1900 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1901 {
9f2b53d7
AM		 1902 /* Change the symbol so that the dummy .TOC. symbol can be
1903 omitted from the object file. */
0baf16f2
AM		 1904 exp_p->X_add_symbol = &abs_symbol;
1905 }
1906
15c1449b 1907 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1908 }
1909
1910 return BFD_RELOC_UNUSED;
1911}
1912
99a814a1
AM		 1913/* Like normal .long/.short/.word, except support @got, etc.
1914 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1915static void
98027b10 1916ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1917{
1918 expressionS exp;
1919 bfd_reloc_code_real_type reloc;
1920
1921 if (is_it_end_of_statement ())
1922 {
1923 demand_empty_rest_of_line ();
1924 return;
1925 }
1926
1927 do
1928 {
1929 expression (&exp);
1930 if (exp.X_op == O_symbol
1931 && *input_line_pointer == '@'
99a814a1
AM		 1932 && (reloc = ppc_elf_suffix (&input_line_pointer,
1933 &exp)) != BFD_RELOC_UNUSED)
252b5132 1934 {
99a814a1
AM		 1935 reloc_howto_type *reloc_howto;
1936 int size;
1937
1938 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1939 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1940
1941 if (size > nbytes)
0baf16f2
AM		 1942 {
1943 as_bad (_("%s relocations do not fit in %d bytes\n"),
1944 reloc_howto->name, nbytes);
1945 }
252b5132
RH		 1946 else
1947 {
0baf16f2
AM		 1948 char *p;
1949 int offset;
252b5132 1950
0baf16f2 1951 p = frag_more (nbytes);
aa0c8c1a 1952 memset (p, 0, nbytes);
0baf16f2
AM		 1953 offset = 0;
1954 if (target_big_endian)
1955 offset = nbytes - size;
99a814a1
AM		 1956 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1957 &exp, 0, reloc);
252b5132
RH		 1958 }
1959 }
1960 else
1961 emit_expr (&exp, (unsigned int) nbytes);
1962 }
1963 while (*input_line_pointer++ == ',');
1964
99a814a1
AM		 1965 /* Put terminator back into stream. */
1966 input_line_pointer--;
252b5132
RH		 1967 demand_empty_rest_of_line ();
1968}
1969
1970/* Solaris pseduo op to change to the .rodata section. */
1971static void
98027b10 1972ppc_elf_rdata (int xxx)
252b5132
RH		 1973{
1974 char *save_line = input_line_pointer;
1975 static char section[] = ".rodata\n";
1976
99a814a1 1977 /* Just pretend this is .section .rodata */
252b5132
RH		 1978 input_line_pointer = section;
1979 obj_elf_section (xxx);
1980
1981 input_line_pointer = save_line;
1982}
1983
99a814a1 1984/* Pseudo op to make file scope bss items. */
252b5132 1985static void
98027b10 1986ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1987{
98027b10
AM		 1988 char *name;
1989 char c;
1990 char *p;
252b5132 1991 offsetT size;
98027b10 1992 symbolS *symbolP;
252b5132
RH		 1993 offsetT align;
1994 segT old_sec;
1995 int old_subsec;
1996 char *pfrag;
1997 int align2;
1998
1999 name = input_line_pointer;
2000 c = get_symbol_end ();
2001
99a814a1 2002 /* just after name is now '\0'. */
252b5132
RH		 2003 p = input_line_pointer;
2004 *p = c;
2005 SKIP_WHITESPACE ();
2006 if (*input_line_pointer != ',')
2007 {
2008 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2009 ignore_rest_of_line ();
2010 return;
2011 }
2012
2013 input_line_pointer++; /* skip ',' */
2014 if ((size = get_absolute_expression ()) < 0)
2015 {
2016 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2017 ignore_rest_of_line ();
2018 return;
2019 }
2020
2021 /* The third argument to .lcomm is the alignment. */
2022 if (*input_line_pointer != ',')
2023 align = 8;
2024 else
2025 {
2026 ++input_line_pointer;
2027 align = get_absolute_expression ();
2028 if (align <= 0)
2029 {
2030 as_warn (_("ignoring bad alignment"));
2031 align = 8;
2032 }
2033 }
2034
2035 *p = 0;
2036 symbolP = symbol_find_or_make (name);
2037 *p = c;
2038
2039 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2040 {
2041 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2042 S_GET_NAME (symbolP));
2043 ignore_rest_of_line ();
2044 return;
2045 }
2046
2047 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2048 {
2049 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2050 S_GET_NAME (symbolP),
2051 (long) S_GET_VALUE (symbolP),
2052 (long) size);
2053
2054 ignore_rest_of_line ();
2055 return;
2056 }
2057
99a814a1 2058 /* Allocate_bss. */
252b5132
RH		 2059 old_sec = now_seg;
2060 old_subsec = now_subseg;
2061 if (align)
2062 {
99a814a1 2063 /* Convert to a power of 2 alignment. */
252b5132
RH		 2064 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2065 if (align != 1)
2066 {
2067 as_bad (_("Common alignment not a power of 2"));
2068 ignore_rest_of_line ();
2069 return;
2070 }
2071 }
2072 else
2073 align2 = 0;
2074
2075 record_alignment (bss_section, align2);
2076 subseg_set (bss_section, 0);
2077 if (align2)
2078 frag_align (align2, 0, 0);
2079 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2080 symbol_get_frag (symbolP)->fr_symbol = 0;
2081 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2082 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2083 (char *) 0);
2084 *pfrag = 0;
2085 S_SET_SIZE (symbolP, size);
2086 S_SET_SEGMENT (symbolP, bss_section);
2087 subseg_set (old_sec, old_subsec);
2088 demand_empty_rest_of_line ();
2089}
2090
2091/* Validate any relocations emitted for -mrelocatable, possibly adding
2092 fixups for word relocations in writable segments, so we can adjust
2093 them at runtime. */
2094static void
98027b10 2095ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2096{
2097 if (fixp->fx_done || fixp->fx_pcrel)
2098 return;
2099
2100 switch (shlib)
2101 {
2102 case SHLIB_NONE:
2103 case SHLIB_PIC:
2104 return;
2105
5d6f4f16 2106 case SHLIB_MRELOCATABLE:
252b5132
RH		 2107 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2108 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2109 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2110 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2111 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2112 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2113 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2114 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2115 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2116 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2117 && strcmp (segment_name (seg), ".got2") != 0
2118 && strcmp (segment_name (seg), ".dtors") != 0
2119 && strcmp (segment_name (seg), ".ctors") != 0
2120 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2121 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2122 && strcmp (segment_name (seg), ".eh_frame") != 0
2123 && strcmp (segment_name (seg), ".ex_shared") != 0)
2124 {
2125 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2126 || fixp->fx_r_type != BFD_RELOC_CTOR)
2127 {
2128 as_bad_where (fixp->fx_file, fixp->fx_line,
2129 _("Relocation cannot be done when using -mrelocatable"));
2130 }
2131 }
2132 return;
2133 }
2134}
0baf16f2 2135
7e8d4ab4
AM		 2136/* Prevent elf_frob_file_before_adjust removing a weak undefined
2137 function descriptor sym if the corresponding code sym is used. */
2138
2139void
98027b10 2140ppc_frob_file_before_adjust (void)
0baf16f2 2141{
7e8d4ab4 2142 symbolS *symp;
9232bbb0 2143 asection *toc;
0baf16f2 2144
7e8d4ab4
AM		 2145 if (!ppc_obj64)
2146 return;
2147
2148 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2149 {
7e8d4ab4
AM		 2150 const char *name;
2151 char *dotname;
2152 symbolS *dotsym;
2153 size_t len;
2154
2155 name = S_GET_NAME (symp);
2156 if (name[0] == '.')
2157 continue;
2158
2159 if (! S_IS_WEAK (symp)
2160 || S_IS_DEFINED (symp))
2161 continue;
2162
2163 len = strlen (name) + 1;
2164 dotname = xmalloc (len + 1);
2165 dotname[0] = '.';
2166 memcpy (dotname + 1, name, len);
461b725f 2167 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2168 free (dotname);
2169 if (dotsym != NULL && (symbol_used_p (dotsym)
2170 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2171 symbol_mark_used (symp);
2172
0baf16f2
AM		 2173 }
2174
9232bbb0
AM		 2175 toc = bfd_get_section_by_name (stdoutput, ".toc");
2176 if (toc != NULL
01efc3af 2177 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2178 && bfd_section_size (stdoutput, toc) > 0x10000)
2179 as_warn (_("TOC section size exceeds 64k"));
2180
7e8d4ab4
AM		 2181 /* Don't emit .TOC. symbol. */
2182 symp = symbol_find (".TOC.");
2183 if (symp != NULL)
2184 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2185}
252b5132
RH		 2186#endif /* OBJ_ELF */
2187\f
2188#ifdef TE_PE
2189
2190/*
99a814a1 2191 * Summary of parse_toc_entry.
252b5132
RH		 2192 *
2193 * in: Input_line_pointer points to the '[' in one of:
2194 *
2195 * [toc] [tocv] [toc32] [toc64]
2196 *
2197 * Anything else is an error of one kind or another.
2198 *
81d4177b 2199 * out:
252b5132
RH		 2200 * return value: success or failure
2201 * toc_kind: kind of toc reference
2202 * input_line_pointer:
2203 * success: first char after the ']'
2204 * failure: unchanged
2205 *
2206 * settings:
2207 *
2208 * [toc] - rv == success, toc_kind = default_toc
2209 * [tocv] - rv == success, toc_kind = data_in_toc
2210 * [toc32] - rv == success, toc_kind = must_be_32
2211 * [toc64] - rv == success, toc_kind = must_be_64
2212 *
2213 */
2214
81d4177b
KH		 2215enum toc_size_qualifier
2216{
252b5132
RH		 2217 default_toc, /* The toc cell constructed should be the system default size */
2218 data_in_toc, /* This is a direct reference to a toc cell */
2219 must_be_32, /* The toc cell constructed must be 32 bits wide */
2220 must_be_64 /* The toc cell constructed must be 64 bits wide */
2221};
2222
2223static int
98027b10 2224parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2225{
2226 char *start;
2227 char *toc_spec;
2228 char c;
2229 enum toc_size_qualifier t;
2230
99a814a1 2231 /* Save the input_line_pointer. */
252b5132
RH		 2232 start = input_line_pointer;
2233
99a814a1 2234 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2235 ++input_line_pointer;
2236 SKIP_WHITESPACE ();
81d4177b 2237
99a814a1 2238 /* Find the spelling of the operand. */
252b5132
RH		 2239 toc_spec = input_line_pointer;
2240 c = get_symbol_end ();
2241
99a814a1 2242 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2243 {
2244 t = default_toc;
2245 }
99a814a1 2246 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2247 {
2248 t = data_in_toc;
2249 }
99a814a1 2250 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2251 {
2252 t = must_be_32;
2253 }
99a814a1 2254 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2255 {
2256 t = must_be_64;
2257 }
2258 else
2259 {
2260 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2261 *input_line_pointer = c;
2262 input_line_pointer = start;
252b5132
RH		 2263 return 0;
2264 }
2265
99a814a1
AM		 2266 /* Now find the ']'. */
2267 *input_line_pointer = c;
252b5132 2268
81d4177b
KH		 2269 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2270 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2271
2272 if (c != ']')
2273 {
2274 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2275 input_line_pointer = start;
252b5132
RH		 2276 return 0;
2277 }
2278
99a814a1 2279 *toc_kind = t;
252b5132
RH		 2280 return 1;
2281}
2282#endif
2283\f
2284
dc1d03fc 2285#ifdef OBJ_ELF
6a0c61b7
EZ		 2286#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2287static void
98027b10 2288ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2289{
2290 unsigned int i;
2291
2292 /* Check we don't already exist. */
2293 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2294 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2295 return;
b34976b6 2296
6a0c61b7
EZ		 2297 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2298 {
2299 if (ppc_apuinfo_num_alloc == 0)
2300 {
2301 ppc_apuinfo_num_alloc = 4;
2302 ppc_apuinfo_list = (unsigned long *)
2303 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2304 }
2305 else
2306 {
2307 ppc_apuinfo_num_alloc += 4;
2308 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2309 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2310 }
2311 }
dc1d03fc 2312 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2313}
2314#undef APUID
dc1d03fc 2315#endif
6a0c61b7
EZ		 2316\f
2317
252b5132
RH		 2318/* We need to keep a list of fixups. We can't simply generate them as
2319 we go, because that would require us to first create the frag, and
2320 that would screw up references to ``.''. */
2321
2322struct ppc_fixup
2323{
2324 expressionS exp;
2325 int opindex;
2326 bfd_reloc_code_real_type reloc;
2327};
2328
2329#define MAX_INSN_FIXUPS (5)
2330
2331/* This routine is called for each instruction to be assembled. */
2332
2333void
98027b10 2334md_assemble (char *str)
252b5132
RH		 2335{
2336 char *s;
2337 const struct powerpc_opcode *opcode;
2338 unsigned long insn;
2339 const unsigned char *opindex_ptr;
2340 int skip_optional;
2341 int need_paren;
2342 int next_opindex;
2343 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2344 int fc;
2345 char *f;
09b935ac 2346 int addr_mod;
252b5132
RH		 2347 int i;
2348#ifdef OBJ_ELF
2349 bfd_reloc_code_real_type reloc;
2350#endif
2351
2352 /* Get the opcode. */
3882b010 2353 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2354 ;
2355 if (*s != '\0')
2356 *s++ = '\0';
2357
2358 /* Look up the opcode in the hash table. */
2359 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2360 if (opcode == (const struct powerpc_opcode *) NULL)
2361 {
2362 const struct powerpc_macro *macro;
2363
2364 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2365 if (macro == (const struct powerpc_macro *) NULL)
2366 as_bad (_("Unrecognized opcode: `%s'"), str);
2367 else
2368 ppc_macro (s, macro);
2369
2370 return;
2371 }
2372
2373 insn = opcode->opcode;
2374
2375 str = s;
3882b010 2376 while (ISSPACE (*str))
252b5132
RH		 2377 ++str;
2378
2379 /* PowerPC operands are just expressions. The only real issue is
2380 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2381 an optional operand separate the operands only with commas (in some
2382 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2383 have optional operands). Most instructions with optional operands
2384 have only one. Those that have more than one optional operand can
2385 take either all their operands or none. So, before we start seriously
2386 parsing the operands, we check to see if we have optional operands,
2387 and if we do, we count the number of commas to see which operands
2388 have been omitted. */
252b5132
RH		 2389 skip_optional = 0;
2390 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2391 {
2392 const struct powerpc_operand *operand;
2393
2394 operand = &powerpc_operands[*opindex_ptr];
2395 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2396 {
2397 unsigned int opcount;
7fe9cf6b 2398 unsigned int num_operands_expected;
252b5132
RH		 2399
2400 /* There is an optional operand. Count the number of
2401 commas in the input line. */
2402 if (*str == '\0')
2403 opcount = 0;
2404 else
2405 {
2406 opcount = 1;
2407 s = str;
2408 while ((s = strchr (s, ',')) != (char *) NULL)
2409 {
2410 ++opcount;
2411 ++s;
2412 }
2413 }
2414
7fe9cf6b
NC		 2415 /* Compute the number of expected operands.
2416 Do not count fake operands. */
2417 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2418 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2419 ++ num_operands_expected;
2420
252b5132
RH		 2421 /* If there are fewer operands in the line then are called
2422 for by the instruction, we want to skip the optional
1f6c9eb0 2423 operands. */
7fe9cf6b 2424 if (opcount < num_operands_expected)
252b5132
RH		 2425 skip_optional = 1;
2426
2427 break;
2428 }
2429 }
2430
2431 /* Gather the operands. */
2432 need_paren = 0;
2433 next_opindex = 0;
2434 fc = 0;
2435 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2436 {
2437 const struct powerpc_operand *operand;
2438 const char *errmsg;
2439 char *hold;
2440 expressionS ex;
2441 char endc;
2442
2443 if (next_opindex == 0)
2444 operand = &powerpc_operands[*opindex_ptr];
2445 else
2446 {
2447 operand = &powerpc_operands[next_opindex];
2448 next_opindex = 0;
2449 }
252b5132
RH		 2450 errmsg = NULL;
2451
2452 /* If this is a fake operand, then we do not expect anything
2453 from the input. */
2454 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2455 {
2b3c4602 2456 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2457 if (errmsg != (const char *) NULL)
ee2c9aa9 2458 as_bad ("%s", errmsg);
252b5132
RH		 2459 continue;
2460 }
2461
2462 /* If this is an optional operand, and we are skipping it, just
2463 insert a zero. */
2464 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2465 && skip_optional)
2466 {
2467 if (operand->insert)
2468 {
2b3c4602 2469 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2470 if (errmsg != (const char *) NULL)
ee2c9aa9 2471 as_bad ("%s", errmsg);
252b5132
RH		 2472 }
2473 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2474 next_opindex = *opindex_ptr + 1;
2475 continue;
2476 }
2477
2478 /* Gather the operand. */
2479 hold = input_line_pointer;
2480 input_line_pointer = str;
2481
2482#ifdef TE_PE
81d4177b 2483 if (*input_line_pointer == '[')
252b5132
RH		 2484 {
2485 /* We are expecting something like the second argument here:
99a814a1
AM		 2486 *
2487 * lwz r4,[toc].GS.0.static_int(rtoc)
2488 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2489 * The argument following the `]' must be a symbol name, and the
2490 * register must be the toc register: 'rtoc' or '2'
2491 *
2492 * The effect is to 0 as the displacement field
2493 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2494 * the appropriate variation) reloc against it based on the symbol.
2495 * The linker will build the toc, and insert the resolved toc offset.
2496 *
2497 * Note:
2498 * o The size of the toc entry is currently assumed to be
2499 * 32 bits. This should not be assumed to be a hard coded
2500 * number.
2501 * o In an effort to cope with a change from 32 to 64 bits,
2502 * there are also toc entries that are specified to be
2503 * either 32 or 64 bits:
2504 * lwz r4,[toc32].GS.0.static_int(rtoc)
2505 * lwz r4,[toc64].GS.0.static_int(rtoc)
2506 * These demand toc entries of the specified size, and the
2507 * instruction probably requires it.
2508 */
252b5132
RH		 2509
2510 int valid_toc;
2511 enum toc_size_qualifier toc_kind;
2512 bfd_reloc_code_real_type toc_reloc;
2513
99a814a1
AM		 2514 /* Go parse off the [tocXX] part. */
2515 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2516
81d4177b 2517 if (!valid_toc)
252b5132 2518 {
99a814a1
AM		 2519 /* Note: message has already been issued.
2520 FIXME: what sort of recovery should we do?
2521 demand_rest_of_line (); return; ? */
252b5132
RH		 2522 }
2523
99a814a1
AM		 2524 /* Now get the symbol following the ']'. */
2525 expression (&ex);
252b5132
RH		 2526
2527 switch (toc_kind)
2528 {
2529 case default_toc:
99a814a1
AM		 2530 /* In this case, we may not have seen the symbol yet,
2531 since it is allowed to appear on a .extern or .globl
2532 or just be a label in the .data section. */
252b5132
RH		 2533 toc_reloc = BFD_RELOC_PPC_TOC16;
2534 break;
2535 case data_in_toc:
99a814a1
AM		 2536 /* 1. The symbol must be defined and either in the toc
2537 section, or a global.
2538 2. The reloc generated must have the TOCDEFN flag set
2539 in upper bit mess of the reloc type.
2540 FIXME: It's a little confusing what the tocv
2541 qualifier can be used for. At the very least, I've
2542 seen three uses, only one of which I'm sure I can
2543 explain. */
81d4177b
KH		 2544 if (ex.X_op == O_symbol)
2545 {
9c2799c2 2546 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2547 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2548 != tocdata_section)
252b5132 2549 {
99a814a1 2550 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2551 }
2552 }
2553
2554 toc_reloc = BFD_RELOC_PPC_TOC16;
2555 break;
2556 case must_be_32:
99a814a1
AM		 2557 /* FIXME: these next two specifically specify 32/64 bit
2558 toc entries. We don't support them today. Is this
2559 the right way to say that? */
252b5132
RH		 2560 toc_reloc = BFD_RELOC_UNUSED;
2561 as_bad (_("Unimplemented toc32 expression modifier"));
2562 break;
2563 case must_be_64:
99a814a1 2564 /* FIXME: see above. */
252b5132
RH		 2565 toc_reloc = BFD_RELOC_UNUSED;
2566 as_bad (_("Unimplemented toc64 expression modifier"));
2567 break;
2568 default:
bc805888 2569 fprintf (stderr,
99a814a1
AM		 2570 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2571 toc_kind);
bc805888 2572 abort ();
252b5132
RH		 2573 break;
2574 }
2575
2576 /* We need to generate a fixup for this expression. */
2577 if (fc >= MAX_INSN_FIXUPS)
2578 as_fatal (_("too many fixups"));
2579
2580 fixups[fc].reloc = toc_reloc;
2581 fixups[fc].exp = ex;
2582 fixups[fc].opindex = *opindex_ptr;
2583 ++fc;
2584
99a814a1
AM		 2585 /* Ok. We've set up the fixup for the instruction. Now make it
2586 look like the constant 0 was found here. */
252b5132
RH		 2587 ex.X_unsigned = 1;
2588 ex.X_op = O_constant;
2589 ex.X_add_number = 0;
2590 ex.X_add_symbol = NULL;
2591 ex.X_op_symbol = NULL;
2592 }
2593
2594 else
2595#endif /* TE_PE */
2596 {
2ad068be
AM		 2597 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2598 || !register_name (&ex))
252b5132 2599 {
13abbae3
AM		 2600 char save_lex = lex_type['%'];
2601
252b5132 2602 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2603 {
2604 cr_operand = TRUE;
2605 lex_type['%'] |= LEX_BEGIN_NAME;
2606 }
252b5132 2607 expression (&ex);
b34976b6 2608 cr_operand = FALSE;
13abbae3 2609 lex_type['%'] = save_lex;
252b5132
RH		 2610 }
2611 }
2612
2613 str = input_line_pointer;
2614 input_line_pointer = hold;
2615
2616 if (ex.X_op == O_illegal)
2617 as_bad (_("illegal operand"));
2618 else if (ex.X_op == O_absent)
2619 as_bad (_("missing operand"));
2620 else if (ex.X_op == O_register)
2621 {
2622 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2623 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2624 }
2625 else if (ex.X_op == O_constant)
2626 {
2627#ifdef OBJ_ELF
81d4177b 2628 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2629 char *orig_str = str;
2630
2631 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2632 switch (reloc)
2633 {
2634 default:
2635 str = orig_str;
2636 break;
2637
2638 case BFD_RELOC_LO16:
2639 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2640 something which cleared it, we always produce a
2641 signed value. */
2642 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2643 ex.X_add_number &= 0xffff;
2644 else
0baf16f2 2645 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2646 break;
2647
2648 case BFD_RELOC_HI16:
0baf16f2
AM		 2649 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2650 ex.X_add_number = PPC_HI (ex.X_add_number);
2651 else
2652 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2653 break;
2654
2655 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2656 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2657 ex.X_add_number = PPC_HA (ex.X_add_number);
2658 else
2659 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2660 break;
2661
0baf16f2
AM		 2662 case BFD_RELOC_PPC64_HIGHER:
2663 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2664 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2665 else
2666 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2667 break;
2668
2669 case BFD_RELOC_PPC64_HIGHER_S:
2670 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2671 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2672 else
2673 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2674 break;
0baf16f2
AM		 2675
2676 case BFD_RELOC_PPC64_HIGHEST:
2677 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2678 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2679 else
2680 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2681 break;
2682
2683 case BFD_RELOC_PPC64_HIGHEST_S:
2684 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2685 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2686 else
2687 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2688 break;
252b5132 2689 }
0baf16f2 2690#endif /* OBJ_ELF */
252b5132 2691 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2692 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2693 }
2694#ifdef OBJ_ELF
727fc41e 2695 else
252b5132 2696 {
727fc41e 2697 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2698 {
727fc41e
AM		 2699 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2700 if (sym_name[0] == '.')
2701 ++sym_name;
cdba85ec 2702
727fc41e 2703 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2704 {
727fc41e
AM		 2705 expressionS tls_exp;
2706
2707 hold = input_line_pointer;
2708 input_line_pointer = str + 1;
2709 expression (&tls_exp);
2710 if (tls_exp.X_op == O_symbol)
2711 {
2712 reloc = BFD_RELOC_UNUSED;
2713 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2714 {
2715 reloc = BFD_RELOC_PPC_TLSGD;
2716 input_line_pointer += 7;
2717 }
2718 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2719 {
2720 reloc = BFD_RELOC_PPC_TLSLD;
2721 input_line_pointer += 7;
2722 }
2723 if (reloc != BFD_RELOC_UNUSED)
2724 {
2725 SKIP_WHITESPACE ();
2726 str = input_line_pointer;
2727
2728 if (fc >= MAX_INSN_FIXUPS)
2729 as_fatal (_("too many fixups"));
2730 fixups[fc].exp = tls_exp;
2731 fixups[fc].opindex = *opindex_ptr;
2732 fixups[fc].reloc = reloc;
2733 ++fc;
2734 }
2735 }
2736 input_line_pointer = hold;
252b5132
RH		 2737 }
2738 }
2739
727fc41e 2740 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2741 {
727fc41e 2742 /* Some TLS tweaks. */
0baf16f2
AM		 2743 switch (reloc)
2744 {
727fc41e 2745 default:
cdba85ec 2746 break;
727fc41e
AM		 2747
2748 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2749 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2750 as_bad (_("@tls may not be used with \"%s\" operands"),
2751 opcode->name);
2752 else if (operand->shift != 11)
2753 as_bad (_("@tls may only be used in last operand"));
2754 else
2755 insn = ppc_insert_operand (insn, operand,
2756 ppc_obj64 ? 13 : 2,
2757 ppc_cpu, (char *) NULL, 0);
cdba85ec 2758 break;
727fc41e
AM		 2759
2760 /* We'll only use the 32 (or 64) bit form of these relocations
2761 in constants. Instructions get the 16 bit form. */
2762 case BFD_RELOC_PPC_DTPREL:
2763 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2764 break;
727fc41e
AM		 2765 case BFD_RELOC_PPC_TPREL:
2766 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2767 break;
2768 }
727fc41e
AM		 2769
2770 /* For the absolute forms of branches, convert the PC
2771 relative form back into the absolute. */
2772 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2773 {
2774 switch (reloc)
2775 {
2776 case BFD_RELOC_PPC_B26:
2777 reloc = BFD_RELOC_PPC_BA26;
2778 break;
2779 case BFD_RELOC_PPC_B16:
2780 reloc = BFD_RELOC_PPC_BA16;
2781 break;
2782 case BFD_RELOC_PPC_B16_BRTAKEN:
2783 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2784 break;
2785 case BFD_RELOC_PPC_B16_BRNTAKEN:
2786 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2787 break;
2788 default:
2789 break;
2790 }
2791 }
2792
01efc3af
AM		 2793 switch (reloc)
2794 {
2795 case BFD_RELOC_PPC_TOC16:
2796 toc_reloc_types |= has_small_toc_reloc;
2797 break;
2798 case BFD_RELOC_PPC64_TOC16_LO:
2799 case BFD_RELOC_PPC64_TOC16_HI:
2800 case BFD_RELOC_PPC64_TOC16_HA:
2801 toc_reloc_types |= has_large_toc_reloc;
2802 break;
2803 default:
2804 break;
2805 }
2806
727fc41e
AM		 2807 if (ppc_obj64
2808 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2809 {
2810 switch (reloc)
2811 {
2812 case BFD_RELOC_16:
2813 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2814 break;
2815 case BFD_RELOC_LO16:
2816 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2817 break;
2818 case BFD_RELOC_16_GOTOFF:
2819 reloc = BFD_RELOC_PPC64_GOT16_DS;
2820 break;
2821 case BFD_RELOC_LO16_GOTOFF:
2822 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2823 break;
2824 case BFD_RELOC_LO16_PLTOFF:
2825 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2826 break;
2827 case BFD_RELOC_16_BASEREL:
2828 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2829 break;
2830 case BFD_RELOC_LO16_BASEREL:
2831 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2832 break;
2833 case BFD_RELOC_PPC_TOC16:
2834 reloc = BFD_RELOC_PPC64_TOC16_DS;
2835 break;
2836 case BFD_RELOC_PPC64_TOC16_LO:
2837 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2838 break;
2839 case BFD_RELOC_PPC64_PLTGOT16:
2840 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2841 break;
2842 case BFD_RELOC_PPC64_PLTGOT16_LO:
2843 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2844 break;
2845 case BFD_RELOC_PPC_DTPREL16:
2846 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2847 break;
2848 case BFD_RELOC_PPC_DTPREL16_LO:
2849 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2850 break;
2851 case BFD_RELOC_PPC_TPREL16:
2852 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2853 break;
2854 case BFD_RELOC_PPC_TPREL16_LO:
2855 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2856 break;
2857 case BFD_RELOC_PPC_GOT_DTPREL16:
2858 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2859 case BFD_RELOC_PPC_GOT_TPREL16:
2860 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2861 break;
2862 default:
2863 as_bad (_("unsupported relocation for DS offset field"));
2864 break;
2865 }
2866 }
0baf16f2
AM		 2867 }
2868
252b5132
RH		 2869 /* We need to generate a fixup for this expression. */
2870 if (fc >= MAX_INSN_FIXUPS)
2871 as_fatal (_("too many fixups"));
2872 fixups[fc].exp = ex;
727fc41e 2873 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2874 fixups[fc].reloc = reloc;
2875 ++fc;
2876 }
727fc41e 2877#else /* OBJ_ELF */
252b5132
RH		 2878 else
2879 {
2880 /* We need to generate a fixup for this expression. */
2881 if (fc >= MAX_INSN_FIXUPS)
2882 as_fatal (_("too many fixups"));
2883 fixups[fc].exp = ex;
2884 fixups[fc].opindex = *opindex_ptr;
2885 fixups[fc].reloc = BFD_RELOC_UNUSED;
2886 ++fc;
2887 }
727fc41e 2888#endif /* OBJ_ELF */
252b5132
RH		 2889
2890 if (need_paren)
2891 {
2892 endc = ')';
2893 need_paren = 0;
c3d65c1c
BE		 2894 /* If expecting more operands, then we want to see "),". */
2895 if (*str == endc && opindex_ptr[1] != 0)
2896 {
2897 do
2898 ++str;
2899 while (ISSPACE (*str));
2900 endc = ',';
2901 }
252b5132
RH		 2902 }
2903 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2904 {
2905 endc = '(';
2906 need_paren = 1;
2907 }
2908 else
2909 endc = ',';
2910
2911 /* The call to expression should have advanced str past any
2912 whitespace. */
2913 if (*str != endc
2914 && (endc != ',' || *str != '\0'))
2915 {
2916 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2917 break;
2918 }
2919
2920 if (*str != '\0')
2921 ++str;
2922 }
2923
3882b010 2924 while (ISSPACE (*str))
252b5132
RH		 2925 ++str;
2926
2927 if (*str != '\0')
2928 as_bad (_("junk at end of line: `%s'"), str);
2929
dc1d03fc 2930#ifdef OBJ_ELF
6a0c61b7 2931 /* Do we need/want a APUinfo section? */
e01d869a 2932 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2933 {
2934 /* These are all version "1". */
2935 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2936 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2937 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2938 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2939 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2940 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2941 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2942 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2943 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2944 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2945 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2946 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2947 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2948 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2949 }
dc1d03fc 2950#endif
6a0c61b7 2951
252b5132
RH		 2952 /* Write out the instruction. */
2953 f = frag_more (4);
09b935ac
AM		 2954 addr_mod = frag_now_fix () & 3;
2955 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2956 as_bad (_("instruction address is not a multiple of 4"));
2957 frag_now->insn_addr = addr_mod;
2958 frag_now->has_code = 1;
252b5132
RH		 2959 md_number_to_chars (f, insn, 4);
2960
5d6f4f16
GK		 2961#ifdef OBJ_ELF
2962 dwarf2_emit_insn (4);
2963#endif
2964
252b5132
RH		 2965 /* Create any fixups. At this point we do not use a
2966 bfd_reloc_code_real_type, but instead just use the
2967 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2968 handle fixups for any operand type, although that is admittedly
2969 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2970 md_apply_fix. */
252b5132
RH		 2971 for (i = 0; i < fc; i++)
2972 {
252b5132
RH		 2973 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2974 {
99a814a1 2975 reloc_howto_type *reloc_howto;
252b5132
RH		 2976 int size;
2977 int offset;
2978 fixS *fixP;
2979
99a814a1 2980 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2981 if (!reloc_howto)
2982 abort ();
2983
2984 size = bfd_get_reloc_size (reloc_howto);
2985 offset = target_big_endian ? (4 - size) : 0;
2986
2987 if (size < 1 || size > 4)
bc805888 2988 abort ();
252b5132 2989
99a814a1
AM		 2990 fixP = fix_new_exp (frag_now,
2991 f - frag_now->fr_literal + offset,
2992 size,
2993 &fixups[i].exp,
2994 reloc_howto->pc_relative,
252b5132
RH		 2995 fixups[i].reloc);
2996
2997 /* Turn off complaints that the addend is too large for things like
2998 foo+100000@ha. */
2999 switch (fixups[i].reloc)
3000 {
3001 case BFD_RELOC_16_GOTOFF:
3002 case BFD_RELOC_PPC_TOC16:
3003 case BFD_RELOC_LO16:
3004 case BFD_RELOC_HI16:
3005 case BFD_RELOC_HI16_S:
0baf16f2 3006#ifdef OBJ_ELF
0baf16f2
AM		 3007 case BFD_RELOC_PPC64_HIGHER:
3008 case BFD_RELOC_PPC64_HIGHER_S:
3009 case BFD_RELOC_PPC64_HIGHEST:
3010 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3011#endif
252b5132
RH		 3012 fixP->fx_no_overflow = 1;
3013 break;
3014 default:
3015 break;
3016 }
3017 }
3018 else
727fc41e
AM		 3019 {
3020 const struct powerpc_operand *operand;
3021
3022 operand = &powerpc_operands[fixups[i].opindex];
3023 fix_new_exp (frag_now,
3024 f - frag_now->fr_literal,
3025 4,
3026 &fixups[i].exp,
3027 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3028 ((bfd_reloc_code_real_type)
3029 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3030 }
252b5132
RH		 3031 }
3032}
3033
3034/* Handle a macro. Gather all the operands, transform them as
3035 described by the macro, and call md_assemble recursively. All the
3036 operands are separated by commas; we don't accept parentheses
3037 around operands here. */
3038
3039static void
98027b10 3040ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3041{
3042 char *operands[10];
3043 unsigned int count;
3044 char *s;
3045 unsigned int len;
3046 const char *format;
db557034 3047 unsigned int arg;
252b5132
RH		 3048 char *send;
3049 char *complete;
3050
3051 /* Gather the users operands into the operands array. */
3052 count = 0;
3053 s = str;
3054 while (1)
3055 {
3056 if (count >= sizeof operands / sizeof operands[0])
3057 break;
3058 operands[count++] = s;
3059 s = strchr (s, ',');
3060 if (s == (char *) NULL)
3061 break;
3062 *s++ = '\0';
81d4177b 3063 }
252b5132
RH		 3064
3065 if (count != macro->operands)
3066 {
3067 as_bad (_("wrong number of operands"));
3068 return;
3069 }
3070
3071 /* Work out how large the string must be (the size is unbounded
3072 because it includes user input). */
3073 len = 0;
3074 format = macro->format;
3075 while (*format != '\0')
3076 {
3077 if (*format != '%')
3078 {
3079 ++len;
3080 ++format;
3081 }
3082 else
3083 {
3084 arg = strtol (format + 1, &send, 10);
db557034 3085 know (send != format && arg < count);
252b5132
RH		 3086 len += strlen (operands[arg]);
3087 format = send;
3088 }
3089 }
3090
3091 /* Put the string together. */
3092 complete = s = (char *) alloca (len + 1);
3093 format = macro->format;
3094 while (*format != '\0')
3095 {
3096 if (*format != '%')
3097 *s++ = *format++;
3098 else
3099 {
3100 arg = strtol (format + 1, &send, 10);
3101 strcpy (s, operands[arg]);
3102 s += strlen (s);
3103 format = send;
3104 }
3105 }
3106 *s = '\0';
3107
3108 /* Assemble the constructed instruction. */
3109 md_assemble (complete);
81d4177b 3110}
252b5132
RH		 3111\f
3112#ifdef OBJ_ELF
18ae9cc1 3113/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3114
3115int
98027b10 3116ppc_section_type (char *str, size_t len)
252b5132 3117{
9de8d8f1
RH		 3118 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3119 return SHT_ORDERED;
252b5132 3120
9de8d8f1 3121 return -1;
252b5132
RH		 3122}
3123
3124int
1239de13 3125ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3126{
3127 if (type == SHT_ORDERED)
3128 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3129
252b5132
RH		 3130 return flags;
3131}
3132#endif /* OBJ_ELF */
3133
3134\f
3135/* Pseudo-op handling. */
3136
3137/* The .byte pseudo-op. This is similar to the normal .byte
3138 pseudo-op, but it can also take a single ASCII string. */
3139
3140static void
98027b10 3141ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3142{
3143 if (*input_line_pointer != '\"')
3144 {
3145 cons (1);
3146 return;
3147 }
3148
3149 /* Gather characters. A real double quote is doubled. Unusual
3150 characters are not permitted. */
3151 ++input_line_pointer;
3152 while (1)
3153 {
3154 char c;
3155
3156 c = *input_line_pointer++;
3157
3158 if (c == '\"')
3159 {
3160 if (*input_line_pointer != '\"')
3161 break;
3162 ++input_line_pointer;
3163 }
3164
3165 FRAG_APPEND_1_CHAR (c);
3166 }
3167
3168 demand_empty_rest_of_line ();
3169}
3170\f
3171#ifdef OBJ_XCOFF
3172
3173/* XCOFF specific pseudo-op handling. */
3174
3175/* This is set if we are creating a .stabx symbol, since we don't want
3176 to handle symbol suffixes for such symbols. */
b34976b6 3177static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3178
3179/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3180 symbols in the .bss segment as though they were local common
67c1ffbe 3181 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3182 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3183
3184static void
98027b10 3185ppc_comm (int lcomm)
252b5132
RH		 3186{
3187 asection *current_seg = now_seg;
3188 subsegT current_subseg = now_subseg;
3189 char *name;
3190 char endc;
3191 char *end_name;
3192 offsetT size;
3193 offsetT align;
3194 symbolS *lcomm_sym = NULL;
3195 symbolS *sym;
3196 char *pfrag;
3197
3198 name = input_line_pointer;
3199 endc = get_symbol_end ();
3200 end_name = input_line_pointer;
3201 *end_name = endc;
3202
3203 if (*input_line_pointer != ',')
3204 {
3205 as_bad (_("missing size"));
3206 ignore_rest_of_line ();
3207 return;
3208 }
3209 ++input_line_pointer;
3210
3211 size = get_absolute_expression ();
3212 if (size < 0)
3213 {
3214 as_bad (_("negative size"));
3215 ignore_rest_of_line ();
3216 return;
3217 }
3218
3219 if (! lcomm)
3220 {
3221 /* The third argument to .comm is the alignment. */
3222 if (*input_line_pointer != ',')
1ad63b2f 3223 align = 2;
252b5132
RH		 3224 else
3225 {
3226 ++input_line_pointer;
3227 align = get_absolute_expression ();
3228 if (align <= 0)
3229 {
3230 as_warn (_("ignoring bad alignment"));
1ad63b2f 3231 align = 2;
252b5132
RH		 3232 }
3233 }
3234 }
3235 else
3236 {
3237 char *lcomm_name;
3238 char lcomm_endc;
3239
1ad63b2f 3240 if (size <= 4)
252b5132
RH		 3241 align = 2;
3242 else
3243 align = 3;
3244
3245 /* The third argument to .lcomm appears to be the real local
3246 common symbol to create. References to the symbol named in
3247 the first argument are turned into references to the third
3248 argument. */
3249 if (*input_line_pointer != ',')
3250 {
3251 as_bad (_("missing real symbol name"));
3252 ignore_rest_of_line ();
3253 return;
3254 }
3255 ++input_line_pointer;
3256
3257 lcomm_name = input_line_pointer;
3258 lcomm_endc = get_symbol_end ();
81d4177b 3259
252b5132
RH		 3260 lcomm_sym = symbol_find_or_make (lcomm_name);
3261
3262 *input_line_pointer = lcomm_endc;
3263 }
3264
3265 *end_name = '\0';
3266 sym = symbol_find_or_make (name);
3267 *end_name = endc;
3268
3269 if (S_IS_DEFINED (sym)
3270 || S_GET_VALUE (sym) != 0)
3271 {
3272 as_bad (_("attempt to redefine symbol"));
3273 ignore_rest_of_line ();
3274 return;
3275 }
81d4177b 3276
252b5132 3277 record_alignment (bss_section, align);
81d4177b 3278
252b5132
RH		 3279 if (! lcomm
3280 || ! S_IS_DEFINED (lcomm_sym))
3281 {
3282 symbolS *def_sym;
3283 offsetT def_size;
3284
3285 if (! lcomm)
3286 {
3287 def_sym = sym;
3288 def_size = size;
3289 S_SET_EXTERNAL (sym);
3290 }
3291 else
3292 {
809ffe0d 3293 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3294 def_sym = lcomm_sym;
3295 def_size = 0;
3296 }
3297
3298 subseg_set (bss_section, 1);
3299 frag_align (align, 0, 0);
81d4177b 3300
809ffe0d 3301 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3302 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3303 def_size, (char *) NULL);
3304 *pfrag = 0;
3305 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3306 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3307 }
3308 else if (lcomm)
3309 {
3310 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3311 symbol_get_frag (lcomm_sym)->fr_offset =
3312 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3313 &~ ((1 << align) - 1));
809ffe0d
ILT		 3314 if (align > symbol_get_tc (lcomm_sym)->align)
3315 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3316 }
3317
3318 if (lcomm)
3319 {
3320 /* Make sym an offset from lcomm_sym. */
3321 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3322 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3323 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3324 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3325 }
3326
3327 subseg_set (current_seg, current_subseg);
3328
3329 demand_empty_rest_of_line ();
3330}
3331
3332/* The .csect pseudo-op. This switches us into a different
3333 subsegment. The first argument is a symbol whose value is the
3334 start of the .csect. In COFF, csect symbols get special aux
3335 entries defined by the x_csect field of union internal_auxent. The
3336 optional second argument is the alignment (the default is 2). */
3337
3338static void
98027b10 3339ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3340{
3341 char *name;
3342 char endc;
3343 symbolS *sym;
931e13a6 3344 offsetT align;
252b5132
RH		 3345
3346 name = input_line_pointer;
3347 endc = get_symbol_end ();
81d4177b 3348
252b5132
RH		 3349 sym = symbol_find_or_make (name);
3350
3351 *input_line_pointer = endc;
3352
3353 if (S_GET_NAME (sym)[0] == '\0')
3354 {
3355 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3356 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3357 }
3358
931e13a6 3359 align = 2;
252b5132
RH		 3360 if (*input_line_pointer == ',')
3361 {
3362 ++input_line_pointer;
931e13a6 3363 align = get_absolute_expression ();
252b5132
RH		 3364 }
3365
931e13a6
AM		 3366 ppc_change_csect (sym, align);
3367
252b5132
RH		 3368 demand_empty_rest_of_line ();
3369}
3370
3371/* Change to a different csect. */
3372
3373static void
98027b10 3374ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3375{
3376 if (S_IS_DEFINED (sym))
809ffe0d 3377 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3378 else
3379 {
3380 symbolS **list_ptr;
3381 int after_toc;
3382 int hold_chunksize;
3383 symbolS *list;
931e13a6
AM		 3384 int is_code;
3385 segT sec;
252b5132
RH		 3386
3387 /* This is a new csect. We need to look at the symbol class to
3388 figure out whether it should go in the text section or the
3389 data section. */
3390 after_toc = 0;
931e13a6 3391 is_code = 0;
96d56e9f 3392 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3393 {
3394 case XMC_PR:
3395 case XMC_RO:
3396 case XMC_DB:
3397 case XMC_GL:
3398 case XMC_XO:
3399 case XMC_SV:
3400 case XMC_TI:
3401 case XMC_TB:
3402 S_SET_SEGMENT (sym, text_section);
809ffe0d 3403 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3404 ++ppc_text_subsegment;
3405 list_ptr = &ppc_text_csects;
931e13a6 3406 is_code = 1;
252b5132
RH		 3407 break;
3408 case XMC_RW:
3409 case XMC_TC0:
3410 case XMC_TC:
3411 case XMC_DS:
3412 case XMC_UA:
3413 case XMC_BS:
3414 case XMC_UC:
3415 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3416 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3417 == ppc_data_subsegment))
252b5132
RH		 3418 after_toc = 1;
3419 S_SET_SEGMENT (sym, data_section);
809ffe0d 3420 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3421 ++ppc_data_subsegment;
3422 list_ptr = &ppc_data_csects;
3423 break;
3424 default:
3425 abort ();
3426 }
3427
3428 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3429 changing subsegments, so that we don't use a lot of memory
3430 space for what may be a small section. */
252b5132
RH		 3431 hold_chunksize = chunksize;
3432 chunksize = 64;
3433
931e13a6
AM		 3434 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3435 symbol_get_tc (sym)->subseg);
252b5132
RH		 3436
3437 chunksize = hold_chunksize;
3438
3439 if (after_toc)
3440 ppc_after_toc_frag = frag_now;
3441
931e13a6
AM		 3442 record_alignment (sec, align);
3443 if (is_code)
3444 frag_align_code (align, 0);
3445 else
3446 frag_align (align, 0, 0);
3447
809ffe0d 3448 symbol_set_frag (sym, frag_now);
252b5132
RH		 3449 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3450
931e13a6 3451 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3452 symbol_get_tc (sym)->output = 1;
3453 symbol_get_tc (sym)->within = sym;
81d4177b 3454
252b5132 3455 for (list = *list_ptr;
809ffe0d
ILT		 3456 symbol_get_tc (list)->next != (symbolS *) NULL;
3457 list = symbol_get_tc (list)->next)
252b5132 3458 ;
809ffe0d 3459 symbol_get_tc (list)->next = sym;
81d4177b 3460
252b5132 3461 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3462 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3463 &symbol_lastP);
252b5132
RH		 3464 }
3465
3466 ppc_current_csect = sym;
3467}
3468
3469/* This function handles the .text and .data pseudo-ops. These
3470 pseudo-ops aren't really used by XCOFF; we implement them for the
3471 convenience of people who aren't used to XCOFF. */
3472
3473static void
98027b10 3474ppc_section (int type)
252b5132
RH		 3475{
3476 const char *name;
3477 symbolS *sym;
3478
3479 if (type == 't')
3480 name = ".text[PR]";
3481 else if (type == 'd')
3482 name = ".data[RW]";
3483 else
3484 abort ();
3485
3486 sym = symbol_find_or_make (name);
3487
931e13a6 3488 ppc_change_csect (sym, 2);
252b5132
RH		 3489
3490 demand_empty_rest_of_line ();
3491}
3492
3493/* This function handles the .section pseudo-op. This is mostly to
3494 give an error, since XCOFF only supports .text, .data and .bss, but
3495 we do permit the user to name the text or data section. */
3496
3497static void
98027b10 3498ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3499{
3500 char *user_name;
3501 const char *real_name;
3502 char c;
3503 symbolS *sym;
3504
3505 user_name = input_line_pointer;
3506 c = get_symbol_end ();
3507
3508 if (strcmp (user_name, ".text") == 0)
3509 real_name = ".text[PR]";
3510 else if (strcmp (user_name, ".data") == 0)
3511 real_name = ".data[RW]";
3512 else
3513 {
3514 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3515 *input_line_pointer = c;
3516 ignore_rest_of_line ();
3517 return;
3518 }
3519
3520 *input_line_pointer = c;
3521
3522 sym = symbol_find_or_make (real_name);
3523
931e13a6 3524 ppc_change_csect (sym, 2);
252b5132
RH		 3525
3526 demand_empty_rest_of_line ();
3527}
3528
3529/* The .extern pseudo-op. We create an undefined symbol. */
3530
3531static void
98027b10 3532ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3533{
3534 char *name;
3535 char endc;
3536
3537 name = input_line_pointer;
3538 endc = get_symbol_end ();
3539
3540 (void) symbol_find_or_make (name);
3541
3542 *input_line_pointer = endc;
3543
3544 demand_empty_rest_of_line ();
3545}
3546
3547/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3548
3549static void
98027b10 3550ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3551{
3552 char *name;
3553 char endc;
3554 symbolS *sym;
3555
3556 name = input_line_pointer;
3557 endc = get_symbol_end ();
3558
3559 sym = symbol_find_or_make (name);
3560
3561 *input_line_pointer = endc;
3562
809ffe0d 3563 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3564
3565 demand_empty_rest_of_line ();
3566}
3567
c865e45b
RS		 3568/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3569 relocations at the beginning of the current csect.
3570
3571 (In principle, there's no reason why the relocations _have_ to be at
3572 the beginning. Anywhere in the csect would do. However, inserting
3573 at the beginning is what the native assmebler does, and it helps to
3574 deal with cases where the .ref statements follow the section contents.)
3575
3576 ??? .refs don't work for empty .csects. However, the native assembler
3577 doesn't report an error in this case, and neither yet do we. */
3578
3579static void
3580ppc_ref (int ignore ATTRIBUTE_UNUSED)
3581{
3582 char *name;
3583 char c;
3584
3585 if (ppc_current_csect == NULL)
3586 {
3587 as_bad (_(".ref outside .csect"));
3588 ignore_rest_of_line ();
3589 return;
3590 }
3591
3592 do
3593 {
3594 name = input_line_pointer;
3595 c = get_symbol_end ();
3596
3597 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3598 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3599
3600 *input_line_pointer = c;
3601 SKIP_WHITESPACE ();
3602 c = *input_line_pointer;
3603 if (c == ',')
3604 {
3605 input_line_pointer++;
3606 SKIP_WHITESPACE ();
3607 if (is_end_of_line[(unsigned char) *input_line_pointer])
3608 {
3609 as_bad (_("missing symbol name"));
3610 ignore_rest_of_line ();
3611 return;
3612 }
3613 }
3614 }
3615 while (c == ',');
3616
3617 demand_empty_rest_of_line ();
3618}
3619
252b5132
RH		 3620/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3621 although I don't know why it bothers. */
3622
3623static void
98027b10 3624ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3625{
3626 char *name;
3627 char endc;
3628 symbolS *sym;
3629 int len;
3630
3631 name = input_line_pointer;
3632 endc = get_symbol_end ();
3633
3634 sym = symbol_find_or_make (name);
3635
3636 *input_line_pointer = endc;
3637
3638 if (*input_line_pointer != ',')
3639 {
3640 as_bad (_("missing rename string"));
3641 ignore_rest_of_line ();
3642 return;
3643 }
3644 ++input_line_pointer;
3645
809ffe0d 3646 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3647
3648 demand_empty_rest_of_line ();
3649}
3650
3651/* The .stabx pseudo-op. This is similar to a normal .stabs
3652 pseudo-op, but slightly different. A sample is
3653 .stabx "main:F-1",.main,142,0
3654 The first argument is the symbol name to create. The second is the
3655 value, and the third is the storage class. The fourth seems to be
3656 always zero, and I am assuming it is the type. */
3657
3658static void
98027b10 3659ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3660{
3661 char *name;
3662 int len;
3663 symbolS *sym;
3664 expressionS exp;
3665
3666 name = demand_copy_C_string (&len);
3667
3668 if (*input_line_pointer != ',')
3669 {
3670 as_bad (_("missing value"));
3671 return;
3672 }
3673 ++input_line_pointer;
3674
b34976b6 3675 ppc_stab_symbol = TRUE;
252b5132 3676 sym = symbol_make (name);
b34976b6 3677 ppc_stab_symbol = FALSE;
252b5132 3678
809ffe0d 3679 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3680
3681 (void) expression (&exp);
3682
3683 switch (exp.X_op)
3684 {
3685 case O_illegal:
3686 case O_absent:
3687 case O_big:
3688 as_bad (_("illegal .stabx expression; zero assumed"));
3689 exp.X_add_number = 0;
3690 /* Fall through. */
3691 case O_constant:
3692 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3693 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3694 break;
3695
3696 case O_symbol:
3697 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3698 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3699 else
3700 {
3701 S_SET_VALUE (sym,
3702 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3703 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3704 }
3705 break;
3706
3707 default:
3708 /* The value is some complex expression. This will probably
99a814a1
AM		 3709 fail at some later point, but this is probably the right
3710 thing to do here. */
809ffe0d 3711 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3712 break;
3713 }
3714
3715 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3716 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3717
3718 if (*input_line_pointer != ',')
3719 {
3720 as_bad (_("missing class"));
3721 return;
3722 }
3723 ++input_line_pointer;
3724
3725 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3726
3727 if (*input_line_pointer != ',')
3728 {
3729 as_bad (_("missing type"));
3730 return;
3731 }
3732 ++input_line_pointer;
3733
3734 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3735
809ffe0d 3736 symbol_get_tc (sym)->output = 1;
252b5132 3737
6877bb43 3738 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3739
809ffe0d 3740 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3741
41ea10b1 3742 /* In this case :
99a814a1 3743
41ea10b1
TR		 3744 .bs name
3745 .stabx "z",arrays_,133,0
3746 .es
99a814a1 3747
41ea10b1 3748 .comm arrays_,13768,3
99a814a1 3749
41ea10b1
TR		 3750 resolve_symbol_value will copy the exp's "within" into sym's when the
3751 offset is 0. Since this seems to be corner case problem,
3752 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3753 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3754
3755 if (exp.X_op == O_symbol)
41ea10b1
TR		 3756 {
3757 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3758 }
6877bb43 3759 }
99a814a1 3760
252b5132
RH		 3761 if (exp.X_op != O_symbol
3762 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3763 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3764 ppc_frob_label (sym);
3765 else
3766 {
3767 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3768 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3769 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3770 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3771 }
3772
3773 demand_empty_rest_of_line ();
3774}
3775
3776/* The .function pseudo-op. This takes several arguments. The first
3777 argument seems to be the external name of the symbol. The second
67c1ffbe 3778 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3779 uses the same name for both. I have no idea what the third and
3780 fourth arguments are meant to be. The optional fifth argument is
3781 an expression for the size of the function. In COFF this symbol
3782 gets an aux entry like that used for a csect. */
3783
3784static void
98027b10 3785ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3786{
3787 char *name;
3788 char endc;
3789 char *s;
3790 symbolS *ext_sym;
3791 symbolS *lab_sym;
3792
3793 name = input_line_pointer;
3794 endc = get_symbol_end ();
3795
3796 /* Ignore any [PR] suffix. */
3797 name = ppc_canonicalize_symbol_name (name);
3798 s = strchr (name, '[');
3799 if (s != (char *) NULL
3800 && strcmp (s + 1, "PR]") == 0)
3801 *s = '\0';
3802
3803 ext_sym = symbol_find_or_make (name);
3804
3805 *input_line_pointer = endc;
3806
3807 if (*input_line_pointer != ',')
3808 {
3809 as_bad (_("missing symbol name"));
3810 ignore_rest_of_line ();
3811 return;
3812 }
3813 ++input_line_pointer;
3814
3815 name = input_line_pointer;
3816 endc = get_symbol_end ();
3817
3818 lab_sym = symbol_find_or_make (name);
3819
3820 *input_line_pointer = endc;
3821
3822 if (ext_sym != lab_sym)
3823 {
809ffe0d
ILT		 3824 expressionS exp;
3825
3826 exp.X_op = O_symbol;
3827 exp.X_add_symbol = lab_sym;
3828 exp.X_op_symbol = NULL;
3829 exp.X_add_number = 0;
3830 exp.X_unsigned = 0;
3831 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3832 }
3833
96d56e9f
NC		 3834 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3835 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3836 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3837
3838 if (*input_line_pointer == ',')
3839 {
91d6fa6a 3840 expressionS exp;
252b5132
RH		 3841
3842 /* Ignore the third argument. */
3843 ++input_line_pointer;
91d6fa6a 3844 expression (& exp);
252b5132
RH		 3845 if (*input_line_pointer == ',')
3846 {
3847 /* Ignore the fourth argument. */
3848 ++input_line_pointer;
91d6fa6a 3849 expression (& exp);
252b5132
RH		 3850 if (*input_line_pointer == ',')
3851 {
3852 /* The fifth argument is the function size. */
3853 ++input_line_pointer;
809ffe0d
ILT		 3854 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3855 absolute_section,
3856 (valueT) 0,
3857 &zero_address_frag);
3858 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3859 }
3860 }
3861 }
3862
3863 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3864 SF_SET_FUNCTION (ext_sym);
3865 SF_SET_PROCESS (ext_sym);
3866 coff_add_linesym (ext_sym);
3867
3868 demand_empty_rest_of_line ();
3869}
3870
3871/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3872 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3873 with the correct line number */
5d6255fe 3874
8642cce8 3875static symbolS *saved_bi_sym = 0;
252b5132
RH		 3876
3877static void
98027b10 3878ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3879{
3880 symbolS *sym;
3881
3882 sym = symbol_make (".bf");
3883 S_SET_SEGMENT (sym, text_section);
809ffe0d 3884 symbol_set_frag (sym, frag_now);
252b5132
RH		 3885 S_SET_VALUE (sym, frag_now_fix ());
3886 S_SET_STORAGE_CLASS (sym, C_FCN);
3887
3888 coff_line_base = get_absolute_expression ();
3889
3890 S_SET_NUMBER_AUXILIARY (sym, 1);
3891 SA_SET_SYM_LNNO (sym, coff_line_base);
3892
8642cce8 3893 /* Line number for bi. */
5d6255fe 3894 if (saved_bi_sym)
8642cce8
TR		 3895 {
3896 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3897 saved_bi_sym = 0;
3898 }
5d6255fe 3899
8642cce8 3900
809ffe0d 3901 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3902
3903 ppc_frob_label (sym);
3904
3905 demand_empty_rest_of_line ();
3906}
3907
3908/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3909 ".ef", except that the line number is absolute, not relative to the
3910 most recent ".bf" symbol. */
3911
3912static void
98027b10 3913ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3914{
3915 symbolS *sym;
3916
3917 sym = symbol_make (".ef");
3918 S_SET_SEGMENT (sym, text_section);
809ffe0d 3919 symbol_set_frag (sym, frag_now);
252b5132
RH		 3920 S_SET_VALUE (sym, frag_now_fix ());
3921 S_SET_STORAGE_CLASS (sym, C_FCN);
3922 S_SET_NUMBER_AUXILIARY (sym, 1);
3923 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3924 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3925
3926 ppc_frob_label (sym);
3927
3928 demand_empty_rest_of_line ();
3929}
3930
3931/* The .bi and .ei pseudo-ops. These take a string argument and
3932 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3933 the symbol list. The value of .bi will be know when the next .bf
3934 is encountered. */
252b5132
RH		 3935
3936static void
98027b10 3937ppc_biei (int ei)
252b5132
RH		 3938{
3939 static symbolS *last_biei;
3940
3941 char *name;
3942 int len;
3943 symbolS *sym;
3944 symbolS *look;
3945
3946 name = demand_copy_C_string (&len);
3947
3948 /* The value of these symbols is actually file offset. Here we set
3949 the value to the index into the line number entries. In
3950 ppc_frob_symbols we set the fix_line field, which will cause BFD
3951 to do the right thing. */
3952
3953 sym = symbol_make (name);
3954 /* obj-coff.c currently only handles line numbers correctly in the
3955 .text section. */
3956 S_SET_SEGMENT (sym, text_section);
3957 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3958 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3959
3960 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3961 symbol_get_tc (sym)->output = 1;
81d4177b 3962
8642cce8 3963 /* Save bi. */
5d6255fe 3964 if (ei)
8642cce8
TR		 3965 saved_bi_sym = 0;
3966 else
3967 saved_bi_sym = sym;
3968
252b5132
RH		 3969 for (look = last_biei ? last_biei : symbol_rootP;
3970 (look != (symbolS *) NULL
3971 && (S_GET_STORAGE_CLASS (look) == C_FILE
3972 || S_GET_STORAGE_CLASS (look) == C_BINCL
3973 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3974 look = symbol_next (look))
3975 ;
3976 if (look != (symbolS *) NULL)
3977 {
3978 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3979 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3980 last_biei = sym;
3981 }
3982
3983 demand_empty_rest_of_line ();
3984}
3985
3986/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3987 There is one argument, which is a csect symbol. The value of the
3988 .bs symbol is the index of this csect symbol. */
3989
3990static void
98027b10 3991ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3992{
3993 char *name;
3994 char endc;
3995 symbolS *csect;
3996 symbolS *sym;
3997
3998 if (ppc_current_block != NULL)
3999 as_bad (_("nested .bs blocks"));
4000
4001 name = input_line_pointer;
4002 endc = get_symbol_end ();
4003
4004 csect = symbol_find_or_make (name);
4005
4006 *input_line_pointer = endc;
4007
4008 sym = symbol_make (".bs");
4009 S_SET_SEGMENT (sym, now_seg);
4010 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4011 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4012 symbol_get_tc (sym)->output = 1;
252b5132 4013
809ffe0d 4014 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4015
4016 ppc_frob_label (sym);
4017
4018 ppc_current_block = sym;
4019
4020 demand_empty_rest_of_line ();
4021}
4022
4023/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4024
4025static void
98027b10 4026ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4027{
4028 symbolS *sym;
4029
4030 if (ppc_current_block == NULL)
4031 as_bad (_(".es without preceding .bs"));
4032
4033 sym = symbol_make (".es");
4034 S_SET_SEGMENT (sym, now_seg);
4035 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4036 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4037 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4038
4039 ppc_frob_label (sym);
4040
4041 ppc_current_block = NULL;
4042
4043 demand_empty_rest_of_line ();
4044}
4045
4046/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4047 line number. */
4048
4049static void
98027b10 4050ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4051{
4052 symbolS *sym;
4053
4054 sym = symbol_make (".bb");
4055 S_SET_SEGMENT (sym, text_section);
809ffe0d 4056 symbol_set_frag (sym, frag_now);
252b5132
RH		 4057 S_SET_VALUE (sym, frag_now_fix ());
4058 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4059
4060 S_SET_NUMBER_AUXILIARY (sym, 1);
4061 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4062
809ffe0d 4063 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4064
4065 SF_SET_PROCESS (sym);
4066
4067 ppc_frob_label (sym);
4068
4069 demand_empty_rest_of_line ();
4070}
4071
4072/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4073 line number. */
4074
4075static void
98027b10 4076ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4077{
4078 symbolS *sym;
4079
4080 sym = symbol_make (".eb");
4081 S_SET_SEGMENT (sym, text_section);
809ffe0d 4082 symbol_set_frag (sym, frag_now);
252b5132
RH		 4083 S_SET_VALUE (sym, frag_now_fix ());
4084 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4085 S_SET_NUMBER_AUXILIARY (sym, 1);
4086 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4087 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4088
4089 SF_SET_PROCESS (sym);
4090
4091 ppc_frob_label (sym);
4092
4093 demand_empty_rest_of_line ();
4094}
4095
4096/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4097 specified name. */
4098
4099static void
98027b10 4100ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4101{
4102 char *name;
4103 int len;
4104 symbolS *sym;
4105
4106 name = demand_copy_C_string (&len);
4107 sym = symbol_make (name);
4108 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4109 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4110 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4111 S_SET_VALUE (sym, 0);
809ffe0d 4112 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4113
4114 ppc_frob_label (sym);
4115
4116 demand_empty_rest_of_line ();
4117}
4118
4119/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4120
4121static void
98027b10 4122ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4123{
4124 symbolS *sym;
4125
4126 sym = symbol_make (".ec");
4127 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4128 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4129 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4130 S_SET_VALUE (sym, 0);
809ffe0d 4131 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4132
4133 ppc_frob_label (sym);
4134
4135 demand_empty_rest_of_line ();
4136}
4137
4138/* The .toc pseudo-op. Switch to the .toc subsegment. */
4139
4140static void
98027b10 4141ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4142{
4143 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4144 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4145 else
4146 {
4147 subsegT subseg;
4148 symbolS *sym;
4149 symbolS *list;
81d4177b 4150
252b5132
RH		 4151 subseg = ppc_data_subsegment;
4152 ++ppc_data_subsegment;
4153
4154 subseg_new (segment_name (data_section), subseg);
4155 ppc_toc_frag = frag_now;
4156
4157 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4158 symbol_set_frag (sym, frag_now);
252b5132
RH		 4159 S_SET_SEGMENT (sym, data_section);
4160 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4161 symbol_get_tc (sym)->subseg = subseg;
4162 symbol_get_tc (sym)->output = 1;
4163 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4164
4165 ppc_toc_csect = sym;
81d4177b 4166
252b5132 4167 for (list = ppc_data_csects;
809ffe0d
ILT		 4168 symbol_get_tc (list)->next != (symbolS *) NULL;
4169 list = symbol_get_tc (list)->next)
252b5132 4170 ;
809ffe0d 4171 symbol_get_tc (list)->next = sym;
252b5132
RH		 4172
4173 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4174 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4175 &symbol_lastP);
252b5132
RH		 4176 }
4177
4178 ppc_current_csect = ppc_toc_csect;
4179
4180 demand_empty_rest_of_line ();
4181}
4182
4183/* The AIX assembler automatically aligns the operands of a .long or
4184 .short pseudo-op, and we want to be compatible. */
4185
4186static void
98027b10 4187ppc_xcoff_cons (int log_size)
252b5132
RH		 4188{
4189 frag_align (log_size, 0, 0);
4190 record_alignment (now_seg, log_size);
4191 cons (1 << log_size);
4192}
4193
4194static void
98027b10 4195ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4196{
4197 expressionS exp;
4198 int byte_count;
4199
4200 (void) expression (&exp);
4201
4202 if (exp.X_op != O_constant)
4203 {
4204 as_bad (_("non-constant byte count"));
4205 return;
4206 }
4207
4208 byte_count = exp.X_add_number;
4209
4210 if (*input_line_pointer != ',')
4211 {
4212 as_bad (_("missing value"));
4213 return;
4214 }
4215
4216 ++input_line_pointer;
4217 cons (byte_count);
4218}
4219
4220#endif /* OBJ_XCOFF */
0baf16f2 4221#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4222\f
4223/* The .tc pseudo-op. This is used when generating either XCOFF or
4224 ELF. This takes two or more arguments.
4225
4226 When generating XCOFF output, the first argument is the name to
4227 give to this location in the toc; this will be a symbol with class
0baf16f2 4228 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4229 this location in the TOC; often there is just one more argument, a
1049f94e 4230 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4231 depends on target word size. A 32-bit target uses 4-byte values, a
4232 64-bit target uses 8-byte values.
252b5132
RH		 4233
4234 When not generating XCOFF output, the arguments are the same, but
4235 the first argument is simply ignored. */
4236
4237static void
98027b10 4238ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4239{
4240#ifdef OBJ_XCOFF
4241
4242 /* Define the TOC symbol name. */
4243 {
4244 char *name;
4245 char endc;
4246 symbolS *sym;
4247
4248 if (ppc_toc_csect == (symbolS *) NULL
4249 || ppc_toc_csect != ppc_current_csect)
4250 {
4251 as_bad (_(".tc not in .toc section"));
4252 ignore_rest_of_line ();
4253 return;
4254 }
4255
4256 name = input_line_pointer;
4257 endc = get_symbol_end ();
4258
4259 sym = symbol_find_or_make (name);
4260
4261 *input_line_pointer = endc;
4262
4263 if (S_IS_DEFINED (sym))
4264 {
4265 symbolS *label;
4266
809ffe0d 4267 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4268 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4269 {
4270 as_bad (_(".tc with no label"));
4271 ignore_rest_of_line ();
4272 return;
4273 }
4274
4275 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4276 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4277 S_SET_VALUE (label, S_GET_VALUE (sym));
4278
4279 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4280 ++input_line_pointer;
4281
4282 return;
4283 }
4284
4285 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4286 symbol_set_frag (sym, frag_now);
252b5132 4287 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4288 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4289 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4290
4291 ppc_frob_label (sym);
4292 }
4293
0baf16f2
AM		 4294#endif /* OBJ_XCOFF */
4295#ifdef OBJ_ELF
9c7977b3 4296 int align;
252b5132
RH		 4297
4298 /* Skip the TOC symbol name. */
4299 while (is_part_of_name (*input_line_pointer)
d13d4015 4300 || *input_line_pointer == ' '
252b5132
RH		 4301 || *input_line_pointer == '['
4302 || *input_line_pointer == ']'
4303 || *input_line_pointer == '{'
4304 || *input_line_pointer == '}')
4305 ++input_line_pointer;
4306
0baf16f2 4307 /* Align to a four/eight byte boundary. */
2b3c4602 4308 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4309 frag_align (align, 0, 0);
4310 record_alignment (now_seg, align);
0baf16f2 4311#endif /* OBJ_ELF */
252b5132
RH		 4312
4313 if (*input_line_pointer != ',')
4314 demand_empty_rest_of_line ();
4315 else
4316 {
4317 ++input_line_pointer;
2b3c4602 4318 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4319 }
4320}
0baf16f2
AM		 4321
4322/* Pseudo-op .machine. */
0baf16f2
AM		 4323
4324static void
98027b10 4325ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4326{
69c040df
AM		 4327 char *cpu_string;
4328#define MAX_HISTORY 100
fa452fa6 4329 static ppc_cpu_t *cpu_history;
69c040df
AM		 4330 static int curr_hist;
4331
4332 SKIP_WHITESPACE ();
4333
4334 if (*input_line_pointer == '"')
4335 {
4336 int len;
4337 cpu_string = demand_copy_C_string (&len);
4338 }
4339 else
4340 {
4341 char c;
4342 cpu_string = input_line_pointer;
4343 c = get_symbol_end ();
4344 cpu_string = xstrdup (cpu_string);
4345 *input_line_pointer = c;
4346 }
4347
4348 if (cpu_string != NULL)
4349 {
fa452fa6 4350 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4351 ppc_cpu_t new_cpu;
69c040df
AM		 4352 char *p;
4353
4354 for (p = cpu_string; *p != 0; p++)
4355 *p = TOLOWER (*p);
4356
4357 if (strcmp (cpu_string, "push") == 0)
4358 {
4359 if (cpu_history == NULL)
4360 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4361
4362 if (curr_hist >= MAX_HISTORY)
4363 as_bad (_(".machine stack overflow"));
4364 else
4365 cpu_history[curr_hist++] = ppc_cpu;
4366 }
4367 else if (strcmp (cpu_string, "pop") == 0)
4368 {
4369 if (curr_hist <= 0)
4370 as_bad (_(".machine stack underflow"));
4371 else
4372 ppc_cpu = cpu_history[--curr_hist];
4373 }
69fe9ce5
AM		 4374 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4375 ppc_cpu = new_cpu;
69c040df
AM		 4376 else
4377 as_bad (_("invalid machine `%s'"), cpu_string);
4378
4379 if (ppc_cpu != old_cpu)
4380 ppc_setup_opcodes ();
4381 }
4382
4383 demand_empty_rest_of_line ();
0baf16f2
AM		 4384}
4385
4386/* See whether a symbol is in the TOC section. */
4387
4388static int
98027b10 4389ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4390{
4391#ifdef OBJ_XCOFF
96d56e9f 4392 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4393#endif
4394#ifdef OBJ_ELF
4395 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4396 if (ppc_obj64)
0baf16f2
AM		 4397 return strcmp (sname, ".toc") == 0;
4398 else
4399 return strcmp (sname, ".got") == 0;
4400#endif
4401}
4402#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4403\f
4404#ifdef TE_PE
4405
99a814a1 4406/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4407
4408/* Set the current section. */
4409static void
98027b10 4410ppc_set_current_section (segT new)
252b5132
RH		 4411{
4412 ppc_previous_section = ppc_current_section;
4413 ppc_current_section = new;
4414}
4415
4416/* pseudo-op: .previous
4417 behaviour: toggles the current section with the previous section.
4418 errors: None
99a814a1
AM		 4419 warnings: "No previous section" */
4420
252b5132 4421static void
98027b10 4422ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4423{
4424 symbolS *tmp;
4425
81d4177b 4426 if (ppc_previous_section == NULL)
252b5132 4427 {
99a814a1 4428 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4429 return;
4430 }
4431
99a814a1 4432 subseg_set (ppc_previous_section, 0);
252b5132 4433
99a814a1 4434 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4435}
4436
4437/* pseudo-op: .pdata
4438 behaviour: predefined read only data section
b34976b6 4439 double word aligned
252b5132
RH		 4440 errors: None
4441 warnings: None
4442 initial: .section .pdata "adr3"
b34976b6 4443 a - don't know -- maybe a misprint
252b5132
RH		 4444 d - initialized data
4445 r - readable
4446 3 - double word aligned (that would be 4 byte boundary)
4447
4448 commentary:
4449 Tag index tables (also known as the function table) for exception
99a814a1 4450 handling, debugging, etc. */
252b5132 4451
252b5132 4452static void
98027b10 4453ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4454{
81d4177b 4455 if (pdata_section == 0)
252b5132
RH		 4456 {
4457 pdata_section = subseg_new (".pdata", 0);
81d4177b 4458
252b5132
RH		 4459 bfd_set_section_flags (stdoutput, pdata_section,
4460 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4461 | SEC_READONLY | SEC_DATA ));
81d4177b 4462
252b5132
RH		 4463 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4464 }
4465 else
4466 {
99a814a1 4467 pdata_section = subseg_new (".pdata", 0);
252b5132 4468 }
99a814a1 4469 ppc_set_current_section (pdata_section);
252b5132
RH		 4470}
4471
4472/* pseudo-op: .ydata
4473 behaviour: predefined read only data section
b34976b6 4474 double word aligned
252b5132
RH		 4475 errors: None
4476 warnings: None
4477 initial: .section .ydata "drw3"
b34976b6 4478 a - don't know -- maybe a misprint
252b5132
RH		 4479 d - initialized data
4480 r - readable
4481 3 - double word aligned (that would be 4 byte boundary)
4482 commentary:
4483 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4484 debugging, etc. */
4485
252b5132 4486static void
98027b10 4487ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4488{
81d4177b 4489 if (ydata_section == 0)
252b5132
RH		 4490 {
4491 ydata_section = subseg_new (".ydata", 0);
4492 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4493 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4494 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4495
4496 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4497 }
4498 else
4499 {
4500 ydata_section = subseg_new (".ydata", 0);
4501 }
99a814a1 4502 ppc_set_current_section (ydata_section);
252b5132
RH		 4503}
4504
4505/* pseudo-op: .reldata
4506 behaviour: predefined read write data section
b34976b6 4507 double word aligned (4-byte)
252b5132
RH		 4508 FIXME: relocation is applied to it
4509 FIXME: what's the difference between this and .data?
4510 errors: None
4511 warnings: None
4512 initial: .section .reldata "drw3"
4513 d - initialized data
4514 r - readable
4515 w - writeable
4516 3 - double word aligned (that would be 8 byte boundary)
4517
4518 commentary:
4519 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4520 function descriptors, etc. */
4521
252b5132 4522static void
98027b10 4523ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4524{
4525 if (reldata_section == 0)
4526 {
4527 reldata_section = subseg_new (".reldata", 0);
4528
4529 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4530 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4531 | SEC_DATA));
252b5132
RH		 4532
4533 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4534 }
4535 else
4536 {
4537 reldata_section = subseg_new (".reldata", 0);
4538 }
99a814a1 4539 ppc_set_current_section (reldata_section);
252b5132
RH		 4540}
4541
4542/* pseudo-op: .rdata
4543 behaviour: predefined read only data section
b34976b6 4544 double word aligned
252b5132
RH		 4545 errors: None
4546 warnings: None
4547 initial: .section .rdata "dr3"
4548 d - initialized data
4549 r - readable
99a814a1
AM		 4550 3 - double word aligned (that would be 4 byte boundary) */
4551
252b5132 4552static void
98027b10 4553ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4554{
4555 if (rdata_section == 0)
4556 {
4557 rdata_section = subseg_new (".rdata", 0);
4558 bfd_set_section_flags (stdoutput, rdata_section,
4559 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4560 | SEC_READONLY | SEC_DATA ));
4561
4562 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4563 }
4564 else
4565 {
4566 rdata_section = subseg_new (".rdata", 0);
4567 }
99a814a1 4568 ppc_set_current_section (rdata_section);
252b5132
RH		 4569}
4570
4571/* pseudo-op: .ualong
81d4177b 4572 behaviour: much like .int, with the exception that no alignment is
b34976b6 4573 performed.
252b5132
RH		 4574 FIXME: test the alignment statement
4575 errors: None
99a814a1
AM		 4576 warnings: None */
4577
252b5132 4578static void
98027b10 4579ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4580{
99a814a1
AM		 4581 /* Try for long. */
4582 cons (4);
252b5132
RH		 4583}
4584
4585/* pseudo-op: .znop <symbol name>
4586 behaviour: Issue a nop instruction
b34976b6 4587 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4588 the supplied symbol name.
4589 errors: None
99a814a1
AM		 4590 warnings: Missing symbol name */
4591
252b5132 4592static void
98027b10 4593ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4594{
4595 unsigned long insn;
4596 const struct powerpc_opcode *opcode;
4597 expressionS ex;
4598 char *f;
252b5132 4599 symbolS *sym;
252b5132
RH		 4600 char *symbol_name;
4601 char c;
4602 char *name;
4603 unsigned int exp;
4604 flagword flags;
4605 asection *sec;
4606
99a814a1 4607 /* Strip out the symbol name. */
252b5132
RH		 4608 symbol_name = input_line_pointer;
4609 c = get_symbol_end ();
4610
4611 name = xmalloc (input_line_pointer - symbol_name + 1);
4612 strcpy (name, symbol_name);
4613
4614 sym = symbol_find_or_make (name);
4615
4616 *input_line_pointer = c;
4617
4618 SKIP_WHITESPACE ();
4619
4620 /* Look up the opcode in the hash table. */
4621 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4622
99a814a1 4623 /* Stick in the nop. */
252b5132
RH		 4624 insn = opcode->opcode;
4625
4626 /* Write out the instruction. */
4627 f = frag_more (4);
4628 md_number_to_chars (f, insn, 4);
4629 fix_new (frag_now,
4630 f - frag_now->fr_literal,
4631 4,
4632 sym,
4633 0,
4634 0,
4635 BFD_RELOC_16_GOT_PCREL);
4636
4637}
4638
81d4177b
KH		 4639/* pseudo-op:
4640 behaviour:
4641 errors:
99a814a1
AM		 4642 warnings: */
4643
252b5132 4644static void
98027b10 4645ppc_pe_comm (int lcomm)
252b5132 4646{
98027b10
AM		 4647 char *name;
4648 char c;
4649 char *p;
252b5132 4650 offsetT temp;
98027b10 4651 symbolS *symbolP;
252b5132
RH		 4652 offsetT align;
4653
4654 name = input_line_pointer;
4655 c = get_symbol_end ();
4656
99a814a1 4657 /* just after name is now '\0'. */
252b5132
RH		 4658 p = input_line_pointer;
4659 *p = c;
4660 SKIP_WHITESPACE ();
4661 if (*input_line_pointer != ',')
4662 {
4663 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4664 ignore_rest_of_line ();
4665 return;
4666 }
4667
4668 input_line_pointer++; /* skip ',' */
4669 if ((temp = get_absolute_expression ()) < 0)
4670 {
4671 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4672 ignore_rest_of_line ();
4673 return;
4674 }
4675
4676 if (! lcomm)
4677 {
4678 /* The third argument to .comm is the alignment. */
4679 if (*input_line_pointer != ',')
4680 align = 3;
4681 else
4682 {
4683 ++input_line_pointer;
4684 align = get_absolute_expression ();
4685 if (align <= 0)
4686 {
4687 as_warn (_("ignoring bad alignment"));
4688 align = 3;
4689 }
4690 }
4691 }
4692
4693 *p = 0;
4694 symbolP = symbol_find_or_make (name);
4695
4696 *p = c;
4697 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4698 {
4699 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4700 S_GET_NAME (symbolP));
4701 ignore_rest_of_line ();
4702 return;
4703 }
4704
4705 if (S_GET_VALUE (symbolP))
4706 {
4707 if (S_GET_VALUE (symbolP) != (valueT) temp)
4708 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4709 S_GET_NAME (symbolP),
4710 (long) S_GET_VALUE (symbolP),
4711 (long) temp);
4712 }
4713 else
4714 {
4715 S_SET_VALUE (symbolP, (valueT) temp);
4716 S_SET_EXTERNAL (symbolP);
86ebace2 4717 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4718 }
4719
4720 demand_empty_rest_of_line ();
4721}
4722
4723/*
4724 * implement the .section pseudo op:
4725 * .section name {, "flags"}
4726 * ^ ^
4727 * | +--- optional flags: 'b' for bss
4728 * | 'i' for info
4729 * +-- section name 'l' for lib
4730 * 'n' for noload
4731 * 'o' for over
4732 * 'w' for data
4733 * 'd' (apparently m88k for data)
4734 * 'x' for text
4735 * But if the argument is not a quoted string, treat it as a
4736 * subsegment number.
4737 *
4738 * FIXME: this is a copy of the section processing from obj-coff.c, with
4739 * additions/changes for the moto-pas assembler support. There are three
4740 * categories:
4741 *
81d4177b 4742 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4743 * setting bits that bfd probably neither understands or uses. The
4744 * correct approach (?) will have to incorporate extra fields attached
4745 * to the section to hold the system specific stuff. (krk)
4746 *
4747 * Section Contents:
4748 * 'a' - unknown - referred to in documentation, but no definition supplied
4749 * 'c' - section has code
4750 * 'd' - section has initialized data
4751 * 'u' - section has uninitialized data
4752 * 'i' - section contains directives (info)
4753 * 'n' - section can be discarded
4754 * 'R' - remove section at link time
4755 *
4756 * Section Protection:
4757 * 'r' - section is readable
4758 * 'w' - section is writeable
4759 * 'x' - section is executable
4760 * 's' - section is sharable
4761 *
4762 * Section Alignment:
4763 * '0' - align to byte boundary
4764 * '1' - align to halfword undary
4765 * '2' - align to word boundary
4766 * '3' - align to doubleword boundary
4767 * '4' - align to quadword boundary
4768 * '5' - align to 32 byte boundary
4769 * '6' - align to 64 byte boundary
4770 *
4771 */
4772
4773void
98027b10 4774ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4775{
99a814a1 4776 /* Strip out the section name. */
252b5132
RH		 4777 char *section_name;
4778 char c;
4779 char *name;
4780 unsigned int exp;
4781 flagword flags;
4782 segT sec;
4783 int align;
4784
4785 section_name = input_line_pointer;
4786 c = get_symbol_end ();
4787
4788 name = xmalloc (input_line_pointer - section_name + 1);
4789 strcpy (name, section_name);
4790
4791 *input_line_pointer = c;
4792
4793 SKIP_WHITESPACE ();
4794
4795 exp = 0;
4796 flags = SEC_NO_FLAGS;
4797
4798 if (strcmp (name, ".idata$2") == 0)
4799 {
4800 align = 0;
4801 }
4802 else if (strcmp (name, ".idata$3") == 0)
4803 {
4804 align = 0;
4805 }
4806 else if (strcmp (name, ".idata$4") == 0)
4807 {
4808 align = 2;
4809 }
4810 else if (strcmp (name, ".idata$5") == 0)
4811 {
4812 align = 2;
4813 }
4814 else if (strcmp (name, ".idata$6") == 0)
4815 {
4816 align = 1;
4817 }
4818 else
99a814a1
AM		 4819 /* Default alignment to 16 byte boundary. */
4820 align = 4;
252b5132
RH		 4821
4822 if (*input_line_pointer == ',')
4823 {
4824 ++input_line_pointer;
4825 SKIP_WHITESPACE ();
4826 if (*input_line_pointer != '"')
4827 exp = get_absolute_expression ();
4828 else
4829 {
4830 ++input_line_pointer;
4831 while (*input_line_pointer != '"'
4832 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4833 {
4834 switch (*input_line_pointer)
4835 {
4836 /* Section Contents */
4837 case 'a': /* unknown */
4838 as_bad (_("Unsupported section attribute -- 'a'"));
4839 break;
4840 case 'c': /* code section */
81d4177b 4841 flags |= SEC_CODE;
252b5132
RH		 4842 break;
4843 case 'd': /* section has initialized data */
4844 flags |= SEC_DATA;
4845 break;
4846 case 'u': /* section has uninitialized data */
4847 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4848 in winnt.h */
4849 flags |= SEC_ROM;
4850 break;
4851 case 'i': /* section contains directives (info) */
4852 /* FIXME: This is IMAGE_SCN_LNK_INFO
4853 in winnt.h */
4854 flags |= SEC_HAS_CONTENTS;
4855 break;
4856 case 'n': /* section can be discarded */
81d4177b 4857 flags &=~ SEC_LOAD;
252b5132
RH		 4858 break;
4859 case 'R': /* Remove section at link time */
4860 flags |= SEC_NEVER_LOAD;
4861 break;
8d452c78 4862#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4863 /* Section Protection */
4864 case 'r': /* section is readable */
4865 flags |= IMAGE_SCN_MEM_READ;
4866 break;
4867 case 'w': /* section is writeable */
4868 flags |= IMAGE_SCN_MEM_WRITE;
4869 break;
4870 case 'x': /* section is executable */
4871 flags |= IMAGE_SCN_MEM_EXECUTE;
4872 break;
4873 case 's': /* section is sharable */
4874 flags |= IMAGE_SCN_MEM_SHARED;
4875 break;
4876
4877 /* Section Alignment */
4878 case '0': /* align to byte boundary */
4879 flags |= IMAGE_SCN_ALIGN_1BYTES;
4880 align = 0;
4881 break;
4882 case '1': /* align to halfword boundary */
4883 flags |= IMAGE_SCN_ALIGN_2BYTES;
4884 align = 1;
4885 break;
4886 case '2': /* align to word boundary */
4887 flags |= IMAGE_SCN_ALIGN_4BYTES;
4888 align = 2;
4889 break;
4890 case '3': /* align to doubleword boundary */
4891 flags |= IMAGE_SCN_ALIGN_8BYTES;
4892 align = 3;
4893 break;
4894 case '4': /* align to quadword boundary */
4895 flags |= IMAGE_SCN_ALIGN_16BYTES;
4896 align = 4;
4897 break;
4898 case '5': /* align to 32 byte boundary */
4899 flags |= IMAGE_SCN_ALIGN_32BYTES;
4900 align = 5;
4901 break;
4902 case '6': /* align to 64 byte boundary */
4903 flags |= IMAGE_SCN_ALIGN_64BYTES;
4904 align = 6;
4905 break;
8d452c78 4906#endif
252b5132 4907 default:
99a814a1
AM		 4908 as_bad (_("unknown section attribute '%c'"),
4909 *input_line_pointer);
252b5132
RH		 4910 break;
4911 }
4912 ++input_line_pointer;
4913 }
4914 if (*input_line_pointer == '"')
4915 ++input_line_pointer;
4916 }
4917 }
4918
4919 sec = subseg_new (name, (subsegT) exp);
4920
99a814a1 4921 ppc_set_current_section (sec);
252b5132
RH		 4922
4923 if (flags != SEC_NO_FLAGS)
4924 {
4925 if (! bfd_set_section_flags (stdoutput, sec, flags))
4926 as_bad (_("error setting flags for \"%s\": %s"),
4927 bfd_section_name (stdoutput, sec),
4928 bfd_errmsg (bfd_get_error ()));
4929 }
4930
99a814a1 4931 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4932}
4933
4934static void
98027b10 4935ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4936{
4937 char *name;
4938 char endc;
4939 symbolS *ext_sym;
4940
4941 name = input_line_pointer;
4942 endc = get_symbol_end ();
4943
4944 ext_sym = symbol_find_or_make (name);
4945
4946 *input_line_pointer = endc;
4947
4948 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4949 SF_SET_FUNCTION (ext_sym);
4950 SF_SET_PROCESS (ext_sym);
4951 coff_add_linesym (ext_sym);
4952
4953 demand_empty_rest_of_line ();
4954}
4955
4956static void
98027b10 4957ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4958{
4959 if (tocdata_section == 0)
4960 {
4961 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4962 /* FIXME: section flags won't work. */
252b5132
RH		 4963 bfd_set_section_flags (stdoutput, tocdata_section,
4964 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4965 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4966
4967 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4968 }
4969 else
4970 {
4971 rdata_section = subseg_new (".tocd", 0);
4972 }
4973
99a814a1 4974 ppc_set_current_section (tocdata_section);
252b5132
RH		 4975
4976 demand_empty_rest_of_line ();
4977}
4978
4979/* Don't adjust TOC relocs to use the section symbol. */
4980
4981int
98027b10 4982ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4983{
4984 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4985}
4986
4987#endif
4988\f
4989#ifdef OBJ_XCOFF
4990
4991/* XCOFF specific symbol and file handling. */
4992
4993/* Canonicalize the symbol name. We use the to force the suffix, if
4994 any, to use square brackets, and to be in upper case. */
4995
4996char *
98027b10 4997ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4998{
4999 char *s;
5000
5001 if (ppc_stab_symbol)
5002 return name;
5003
5004 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5005 ;
5006 if (*s != '\0')
5007 {
5008 char brac;
5009
5010 if (*s == '[')
5011 brac = ']';
5012 else
5013 {
5014 *s = '[';
5015 brac = '}';
5016 }
5017
5018 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5019 *s = TOUPPER (*s);
252b5132
RH		 5020
5021 if (*s == '\0' || s[1] != '\0')
5022 as_bad (_("bad symbol suffix"));
5023
5024 *s = ']';
5025 }
5026
5027 return name;
5028}
5029
5030/* Set the class of a symbol based on the suffix, if any. This is
5031 called whenever a new symbol is created. */
5032
5033void
98027b10 5034ppc_symbol_new_hook (symbolS *sym)
252b5132 5035{
809ffe0d 5036 struct ppc_tc_sy *tc;
252b5132
RH		 5037 const char *s;
5038
809ffe0d
ILT		 5039 tc = symbol_get_tc (sym);
5040 tc->next = NULL;
5041 tc->output = 0;
96d56e9f 5042 tc->symbol_class = -1;
809ffe0d
ILT		 5043 tc->real_name = NULL;
5044 tc->subseg = 0;
5045 tc->align = 0;
5046 tc->size = NULL;
5047 tc->within = NULL;
252b5132
RH		 5048
5049 if (ppc_stab_symbol)
5050 return;
5051
5052 s = strchr (S_GET_NAME (sym), '[');
5053 if (s == (const char *) NULL)
5054 {
5055 /* There is no suffix. */
5056 return;
5057 }
5058
5059 ++s;
5060
5061 switch (s[0])
5062 {
5063 case 'B':
5064 if (strcmp (s, "BS]") == 0)
96d56e9f 5065 tc->symbol_class = XMC_BS;
252b5132
RH		 5066 break;
5067 case 'D':
5068 if (strcmp (s, "DB]") == 0)
96d56e9f 5069 tc->symbol_class = XMC_DB;
252b5132 5070 else if (strcmp (s, "DS]") == 0)
96d56e9f 5071 tc->symbol_class = XMC_DS;
252b5132
RH		 5072 break;
5073 case 'G':
5074 if (strcmp (s, "GL]") == 0)
96d56e9f 5075 tc->symbol_class = XMC_GL;
252b5132
RH		 5076 break;
5077 case 'P':
5078 if (strcmp (s, "PR]") == 0)
96d56e9f 5079 tc->symbol_class = XMC_PR;
252b5132
RH		 5080 break;
5081 case 'R':
5082 if (strcmp (s, "RO]") == 0)
96d56e9f 5083 tc->symbol_class = XMC_RO;
252b5132 5084 else if (strcmp (s, "RW]") == 0)
96d56e9f 5085 tc->symbol_class = XMC_RW;
252b5132
RH		 5086 break;
5087 case 'S':
5088 if (strcmp (s, "SV]") == 0)
96d56e9f 5089 tc->symbol_class = XMC_SV;
252b5132
RH		 5090 break;
5091 case 'T':
5092 if (strcmp (s, "TC]") == 0)
96d56e9f 5093 tc->symbol_class = XMC_TC;
252b5132 5094 else if (strcmp (s, "TI]") == 0)
96d56e9f 5095 tc->symbol_class = XMC_TI;
252b5132 5096 else if (strcmp (s, "TB]") == 0)
96d56e9f 5097 tc->symbol_class = XMC_TB;
252b5132 5098 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5099 tc->symbol_class = XMC_TC0;
252b5132
RH		 5100 break;
5101 case 'U':
5102 if (strcmp (s, "UA]") == 0)
96d56e9f 5103 tc->symbol_class = XMC_UA;
252b5132 5104 else if (strcmp (s, "UC]") == 0)
96d56e9f 5105 tc->symbol_class = XMC_UC;
252b5132
RH		 5106 break;
5107 case 'X':
5108 if (strcmp (s, "XO]") == 0)
96d56e9f 5109 tc->symbol_class = XMC_XO;
252b5132
RH		 5110 break;
5111 }
5112
96d56e9f 5113 if (tc->symbol_class == -1)
252b5132
RH		 5114 as_bad (_("Unrecognized symbol suffix"));
5115}
5116
5117/* Set the class of a label based on where it is defined. This
5118 handles symbols without suffixes. Also, move the symbol so that it
5119 follows the csect symbol. */
5120
5121void
98027b10 5122ppc_frob_label (symbolS *sym)
252b5132
RH		 5123{
5124 if (ppc_current_csect != (symbolS *) NULL)
5125 {
96d56e9f
NC		 5126 if (symbol_get_tc (sym)->symbol_class == -1)
5127 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5128
5129 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5130 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5131 &symbol_rootP, &symbol_lastP);
5132 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5133 }
07a53e5c
RH		 5134
5135#ifdef OBJ_ELF
5136 dwarf2_emit_label (sym);
5137#endif
252b5132
RH		 5138}
5139
5140/* This variable is set by ppc_frob_symbol if any absolute symbols are
5141 seen. It tells ppc_adjust_symtab whether it needs to look through
5142 the symbols. */
5143
b34976b6 5144static bfd_boolean ppc_saw_abs;
252b5132
RH		 5145
5146/* Change the name of a symbol just before writing it out. Set the
5147 real name if the .rename pseudo-op was used. Otherwise, remove any
5148 class suffix. Return 1 if the symbol should not be included in the
5149 symbol table. */
5150
5151int
98027b10 5152ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5153{
5154 static symbolS *ppc_last_function;
5155 static symbolS *set_end;
5156
5157 /* Discard symbols that should not be included in the output symbol
5158 table. */
809ffe0d
ILT		 5159 if (! symbol_used_in_reloc_p (sym)
5160 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5161 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5162 && ! symbol_get_tc (sym)->output
252b5132
RH		 5163 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5164 return 1;
5165
a161fe53
AM		 5166 /* This one will disappear anyway. Don't make a csect sym for it. */
5167 if (sym == abs_section_sym)
5168 return 1;
5169
809ffe0d
ILT		 5170 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5171 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5172 else
5173 {
5174 const char *name;
5175 const char *s;
5176
5177 name = S_GET_NAME (sym);
5178 s = strchr (name, '[');
5179 if (s != (char *) NULL)
5180 {
5181 unsigned int len;
5182 char *snew;
5183
5184 len = s - name;
5185 snew = xmalloc (len + 1);
5186 memcpy (snew, name, len);
5187 snew[len] = '\0';
5188
5189 S_SET_NAME (sym, snew);
5190 }
5191 }
5192
5193 if (set_end != (symbolS *) NULL)
5194 {
5195 SA_SET_SYM_ENDNDX (set_end, sym);
5196 set_end = NULL;
5197 }
5198
5199 if (SF_GET_FUNCTION (sym))
5200 {
5201 if (ppc_last_function != (symbolS *) NULL)
5202 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5203 ppc_last_function = sym;
809ffe0d 5204 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5205 {
6386f3a7 5206 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5207 SA_SET_SYM_FSIZE (sym,
5208 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5209 }
5210 }
5211 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5212 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5213 {
5214 if (ppc_last_function == (symbolS *) NULL)
5215 as_bad (_(".ef with no preceding .function"));
5216 else
5217 {
5218 set_end = ppc_last_function;
5219 ppc_last_function = NULL;
5220
5221 /* We don't have a C_EFCN symbol, but we need to force the
5222 COFF backend to believe that it has seen one. */
5223 coff_last_function = NULL;
5224 }
5225 }
5226
670ec21d 5227 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5228 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5229 && S_GET_STORAGE_CLASS (sym) != C_FILE
5230 && S_GET_STORAGE_CLASS (sym) != C_FCN
5231 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5232 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5233 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5234 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5235 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5236 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5237 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5238
5239 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5240 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5241 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5242 {
5243 int i;
5244 union internal_auxent *a;
5245
5246 /* Create a csect aux. */
5247 i = S_GET_NUMBER_AUXILIARY (sym);
5248 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5249 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5250 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5251 {
5252 /* This is the TOC table. */
5253 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5254 a->x_csect.x_scnlen.l = 0;
5255 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5256 }
809ffe0d 5257 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5258 {
5259 /* This is a csect symbol. x_scnlen is the size of the
5260 csect. */
809ffe0d 5261 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5262 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5263 S_GET_SEGMENT (sym))
5264 - S_GET_VALUE (sym));
5265 else
5266 {
6386f3a7 5267 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5268 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5269 - S_GET_VALUE (sym));
5270 }
809ffe0d 5271 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5272 }
5273 else if (S_GET_SEGMENT (sym) == bss_section)
5274 {
5275 /* This is a common symbol. */
809ffe0d
ILT		 5276 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5277 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5278 if (S_IS_EXTERNAL (sym))
96d56e9f 5279 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5280 else
96d56e9f 5281 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5282 }
5283 else if (S_GET_SEGMENT (sym) == absolute_section)
5284 {
5285 /* This is an absolute symbol. The csect will be created by
99a814a1 5286 ppc_adjust_symtab. */
b34976b6 5287 ppc_saw_abs = TRUE;
252b5132 5288 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5289 if (symbol_get_tc (sym)->symbol_class == -1)
5290 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5291 }
5292 else if (! S_IS_DEFINED (sym))
5293 {
5294 /* This is an external symbol. */
5295 a->x_csect.x_scnlen.l = 0;
5296 a->x_csect.x_smtyp = XTY_ER;
5297 }
96d56e9f 5298 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5299 {
5300 symbolS *next;
5301
5302 /* This is a TOC definition. x_scnlen is the size of the
5303 TOC entry. */
5304 next = symbol_next (sym);
96d56e9f 5305 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5306 next = symbol_next (next);
5307 if (next == (symbolS *) NULL
96d56e9f 5308 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5309 {
5310 if (ppc_after_toc_frag == (fragS *) NULL)
5311 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5312 data_section)
5313 - S_GET_VALUE (sym));
5314 else
5315 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5316 - S_GET_VALUE (sym));
5317 }
5318 else
5319 {
6386f3a7 5320 resolve_symbol_value (next);
252b5132
RH		 5321 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5322 - S_GET_VALUE (sym));
5323 }
5324 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5325 }
5326 else
5327 {
5328 symbolS *csect;
5329
5330 /* This is a normal symbol definition. x_scnlen is the
5331 symbol index of the containing csect. */
5332 if (S_GET_SEGMENT (sym) == text_section)
5333 csect = ppc_text_csects;
5334 else if (S_GET_SEGMENT (sym) == data_section)
5335 csect = ppc_data_csects;
5336 else
5337 abort ();
5338
5339 /* Skip the initial dummy symbol. */
809ffe0d 5340 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5341
5342 if (csect == (symbolS *) NULL)
5343 {
5344 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5345 a->x_csect.x_scnlen.l = 0;
5346 }
5347 else
5348 {
809ffe0d 5349 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5350 {
6386f3a7 5351 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5352 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5353 > S_GET_VALUE (sym))
252b5132 5354 break;
809ffe0d 5355 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5356 }
5357
809ffe0d
ILT		 5358 a->x_csect.x_scnlen.p =
5359 coffsymbol (symbol_get_bfdsym (csect))->native;
5360 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5361 1;
252b5132
RH		 5362 }
5363 a->x_csect.x_smtyp = XTY_LD;
5364 }
81d4177b 5365
252b5132
RH		 5366 a->x_csect.x_parmhash = 0;
5367 a->x_csect.x_snhash = 0;
96d56e9f 5368 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5369 a->x_csect.x_smclas = XMC_PR;
5370 else
96d56e9f 5371 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5372 a->x_csect.x_stab = 0;
5373 a->x_csect.x_snstab = 0;
5374
5375 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5376 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5377 }
5378 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5379 {
5380 /* We want the value to be the symbol index of the referenced
5381 csect symbol. BFD will do that for us if we set the right
5382 flags. */
b782de16
AM		 5383 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5384 combined_entry_type *c = coffsymbol (bsym)->native;
5385
5386 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5387 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5388 }
5389 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5390 {
5391 symbolS *block;
5392 symbolS *csect;
5393
5394 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5395 block = symbol_get_tc (sym)->within;
5396 csect = symbol_get_tc (block)->within;
6386f3a7 5397 resolve_symbol_value (csect);
252b5132
RH		 5398 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5399 }
5400 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5401 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5402 {
5403 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5404 BFD will do that for us if we set the right flags. We have
5405 already set the value correctly. */
809ffe0d 5406 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5407 }
5408
5409 return 0;
5410}
5411
5412/* Adjust the symbol table. This creates csect symbols for all
5413 absolute symbols. */
5414
5415void
98027b10 5416ppc_adjust_symtab (void)
252b5132
RH		 5417{
5418 symbolS *sym;
5419
5420 if (! ppc_saw_abs)
5421 return;
5422
5423 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5424 {
5425 symbolS *csect;
5426 int i;
5427 union internal_auxent *a;
5428
5429 if (S_GET_SEGMENT (sym) != absolute_section)
5430 continue;
5431
5432 csect = symbol_create (".abs[XO]", absolute_section,
5433 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5434 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5435 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5436 i = S_GET_NUMBER_AUXILIARY (csect);
5437 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5438 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5439 a->x_csect.x_scnlen.l = 0;
5440 a->x_csect.x_smtyp = XTY_SD;
5441 a->x_csect.x_parmhash = 0;
5442 a->x_csect.x_snhash = 0;
5443 a->x_csect.x_smclas = XMC_XO;
5444 a->x_csect.x_stab = 0;
5445 a->x_csect.x_snstab = 0;
5446
5447 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5448
5449 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5450 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5451 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5452 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5453 }
5454
b34976b6 5455 ppc_saw_abs = FALSE;
252b5132
RH		 5456}
5457
5458/* Set the VMA for a section. This is called on all the sections in
5459 turn. */
5460
5461void
98027b10 5462ppc_frob_section (asection *sec)
252b5132 5463{
931e13a6 5464 static bfd_vma vma = 0;
252b5132 5465
931e13a6 5466 vma = md_section_align (sec, vma);
252b5132
RH		 5467 bfd_set_section_vma (stdoutput, sec, vma);
5468 vma += bfd_section_size (stdoutput, sec);
5469}
5470
5471#endif /* OBJ_XCOFF */
5472\f
252b5132 5473char *
98027b10 5474md_atof (int type, char *litp, int *sizep)
252b5132 5475{
499ac353 5476 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5477}
5478
5479/* Write a value out to the object file, using the appropriate
5480 endianness. */
5481
5482void
98027b10 5483md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5484{
5485 if (target_big_endian)
5486 number_to_chars_bigendian (buf, val, n);
5487 else
5488 number_to_chars_littleendian (buf, val, n);
5489}
5490
5491/* Align a section (I don't know why this is machine dependent). */
5492
5493valueT
3aeeedbb 5494md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5495{
3aeeedbb
AM		 5496#ifdef OBJ_ELF
5497 return addr;
5498#else
252b5132
RH		 5499 int align = bfd_get_section_alignment (stdoutput, seg);
5500
5501 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5502#endif
252b5132
RH		 5503}
5504
5505/* We don't have any form of relaxing. */
5506
5507int
98027b10
AM		 5508md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5509 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5510{
5511 abort ();
5512 return 0;
5513}
5514
5515/* Convert a machine dependent frag. We never generate these. */
5516
5517void
98027b10
AM		 5518md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5519 asection *sec ATTRIBUTE_UNUSED,
5520 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5521{
5522 abort ();
5523}
5524
5525/* We have no need to default values of symbols. */
5526
252b5132 5527symbolS *
98027b10 5528md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5529{
5530 return 0;
5531}
5532\f
5533/* Functions concerning relocs. */
5534
5535/* The location from which a PC relative jump should be calculated,
5536 given a PC relative reloc. */
5537
5538long
98027b10 5539md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5540{
5541 return fixp->fx_frag->fr_address + fixp->fx_where;
5542}
5543
5544#ifdef OBJ_XCOFF
5545
5546/* This is called to see whether a fixup should be adjusted to use a
5547 section symbol. We take the opportunity to change a fixup against
5548 a symbol in the TOC subsegment into a reloc against the
5549 corresponding .tc symbol. */
5550
5551int
98027b10 5552ppc_fix_adjustable (fixS *fix)
252b5132 5553{
b782de16
AM		 5554 valueT val = resolve_symbol_value (fix->fx_addsy);
5555 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5556 TC_SYMFIELD_TYPE *tc;
5557
5558 if (symseg == absolute_section)
5559 return 0;
252b5132 5560
252b5132 5561 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5562 && fix->fx_addsy != ppc_toc_csect
b782de16 5563 && symseg == data_section
252b5132
RH		 5564 && val >= ppc_toc_frag->fr_address
5565 && (ppc_after_toc_frag == (fragS *) NULL
5566 || val < ppc_after_toc_frag->fr_address))
5567 {
5568 symbolS *sy;
5569
5570 for (sy = symbol_next (ppc_toc_csect);
5571 sy != (symbolS *) NULL;
5572 sy = symbol_next (sy))
5573 {
b782de16
AM		 5574 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5575
96d56e9f 5576 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5577 continue;
96d56e9f 5578 if (sy_tc->symbol_class != XMC_TC)
252b5132 5579 break;
b782de16 5580 if (val == resolve_symbol_value (sy))
252b5132
RH		 5581 {
5582 fix->fx_addsy = sy;
5583 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5584 return 0;
5585 }
5586 }
5587
5588 as_bad_where (fix->fx_file, fix->fx_line,
5589 _("symbol in .toc does not match any .tc"));
5590 }
5591
5592 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5593 tc = symbol_get_tc (fix->fx_addsy);
5594 if (tc->subseg == 0
96d56e9f
NC		 5595 && tc->symbol_class != XMC_TC0
5596 && tc->symbol_class != XMC_TC
b782de16 5597 && symseg != bss_section
252b5132 5598 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5599 && (symseg != data_section
252b5132
RH		 5600 || ppc_toc_csect == NULL
5601 || val < ppc_toc_frag->fr_address
5602 || (ppc_after_toc_frag != NULL
5603 && val >= ppc_after_toc_frag->fr_address)))
5604 {
5605 symbolS *csect;
b782de16 5606 symbolS *next_csect;
252b5132 5607
b782de16 5608 if (symseg == text_section)
252b5132 5609 csect = ppc_text_csects;
b782de16 5610 else if (symseg == data_section)
252b5132
RH		 5611 csect = ppc_data_csects;
5612 else
5613 abort ();
5614
5615 /* Skip the initial dummy symbol. */
809ffe0d 5616 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5617
5618 if (csect != (symbolS *) NULL)
5619 {
b782de16
AM		 5620 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5621 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5622 {
5623 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5624 have to look through the full symbol table to see
5625 whether this is the csect we want. Note that we will
5626 only get here if the csect has zero length. */
b782de16
AM		 5627 if (symbol_get_frag (csect)->fr_address == val
5628 && S_GET_VALUE (csect) == val)
252b5132
RH		 5629 {
5630 symbolS *scan;
5631
809ffe0d 5632 for (scan = symbol_next (csect);
252b5132 5633 scan != NULL;
809ffe0d 5634 scan = symbol_next (scan))
252b5132 5635 {
809ffe0d 5636 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5637 break;
5638 if (scan == fix->fx_addsy)
5639 break;
5640 }
5641
5642 /* If we found the symbol before the next csect
99a814a1 5643 symbol, then this is the csect we want. */
252b5132
RH		 5644 if (scan == fix->fx_addsy)
5645 break;
5646 }
5647
b782de16 5648 csect = next_csect;
252b5132
RH		 5649 }
5650
b782de16 5651 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5652 fix->fx_addsy = csect;
5653 }
b782de16 5654 return 0;
252b5132
RH		 5655 }
5656
5657 /* Adjust a reloc against a .lcomm symbol to be against the base
5658 .lcomm. */
b782de16 5659 if (symseg == bss_section
252b5132
RH		 5660 && ! S_IS_EXTERNAL (fix->fx_addsy))
5661 {
b782de16
AM		 5662 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5663
5664 fix->fx_offset += val - resolve_symbol_value (sy);
5665 fix->fx_addsy = sy;
252b5132
RH		 5666 }
5667
5668 return 0;
5669}
5670
5671/* A reloc from one csect to another must be kept. The assembler
5672 will, of course, keep relocs between sections, and it will keep
5673 absolute relocs, but we need to force it to keep PC relative relocs
5674 between two csects in the same section. */
5675
5676int
98027b10 5677ppc_force_relocation (fixS *fix)
252b5132
RH		 5678{
5679 /* At this point fix->fx_addsy should already have been converted to
5680 a csect symbol. If the csect does not include the fragment, then
5681 we need to force the relocation. */
5682 if (fix->fx_pcrel
5683 && fix->fx_addsy != NULL
809ffe0d
ILT		 5684 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5685 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5686 > fix->fx_frag->fr_address)
5687 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5688 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5689 <= fix->fx_frag->fr_address))))
5690 return 1;
5691
ae6063d4 5692 return generic_force_reloc (fix);
252b5132
RH		 5693}
5694
5695#endif /* OBJ_XCOFF */
5696
0baf16f2 5697#ifdef OBJ_ELF
a161fe53
AM		 5698/* If this function returns non-zero, it guarantees that a relocation
5699 will be emitted for a fixup. */
5700
5701int
98027b10 5702ppc_force_relocation (fixS *fix)
a161fe53
AM		 5703{
5704 /* Branch prediction relocations must force a relocation, as must
5705 the vtable description relocs. */
5706 switch (fix->fx_r_type)
5707 {
5708 case BFD_RELOC_PPC_B16_BRTAKEN:
5709 case BFD_RELOC_PPC_B16_BRNTAKEN:
5710 case BFD_RELOC_PPC_BA16_BRTAKEN:
5711 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5712 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5713 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5714 return 1;
5715 default:
5716 break;
5717 }
5718
cdba85ec
AM		 5719 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5720 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5721 return 1;
5722
ae6063d4 5723 return generic_force_reloc (fix);
a161fe53
AM		 5724}
5725
0baf16f2 5726int
98027b10 5727ppc_fix_adjustable (fixS *fix)
252b5132 5728{
0baf16f2
AM		 5729 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5730 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5731 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5732 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5733 && fix->fx_r_type != BFD_RELOC_GPREL16
5734 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5735 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5736 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5737 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5738}
0baf16f2 5739#endif
252b5132 5740
3aeeedbb
AM		 5741/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5742 rs_align_code frag. */
5743
5744void
5745ppc_handle_align (struct frag *fragP)
5746{
5747 valueT count = (fragP->fr_next->fr_address
5748 - (fragP->fr_address + fragP->fr_fix));
5749
5750 if (count != 0 && (count & 3) == 0)
5751 {
5752 char *dest = fragP->fr_literal + fragP->fr_fix;
5753
5754 fragP->fr_var = 4;
5755 md_number_to_chars (dest, 0x60000000, 4);
5756
42240548
PB		 5757 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5758 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5759 {
42240548
PB		 5760 /* For power6 and power7, we want the last nop to be a group
5761 terminating one. Do this by inserting an rs_fill frag immediately
5762 after this one, with its address set to the last nop location.
5763 This will automatically reduce the number of nops in the current
5764 frag by one. */
3aeeedbb
AM		 5765 if (count > 4)
5766 {
5767 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5768
5769 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5770 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5771 group_nop->fr_fix = 0;
5772 group_nop->fr_offset = 1;
5773 group_nop->fr_type = rs_fill;
5774 fragP->fr_next = group_nop;
5775 dest = group_nop->fr_literal;
5776 }
5777
42240548
PB		 5778 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5779 /* power7 group terminating nop: "ori 2,2,0". */
5780 md_number_to_chars (dest, 0x60420000, 4);
5781 else
5782 /* power6 group terminating nop: "ori 1,1,0". */
5783 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5784 }
5785 }
5786}
5787
252b5132
RH		 5788/* Apply a fixup to the object code. This is called for all the
5789 fixups we generated by the call to fix_new_exp, above. In the call
5790 above we used a reloc code which was the largest legal reloc code
5791 plus the operand index. Here we undo that to recover the operand
5792 index. At this point all symbol values should be fully resolved,
5793 and we attempt to completely resolve the reloc. If we can not do
5794 that, we determine the correct reloc code and put it back in the
5795 fixup. */
5796
94f592af 5797void
98027b10 5798md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5799{
94f592af 5800 valueT value = * valP;
252b5132
RH		 5801
5802#ifdef OBJ_ELF
94f592af 5803 if (fixP->fx_addsy != NULL)
252b5132 5804 {
a161fe53 5805 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5806 if (fixP->fx_pcrel)
5807 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5808 }
5809 else
94f592af 5810 fixP->fx_done = 1;
252b5132 5811#else
a161fe53 5812 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5813 the symbol values. If we are doing this relocation the code in
5814 write.c is going to call bfd_install_relocation, which is also
5815 going to use the symbol value. That means that if the reloc is
5816 fully resolved we want to use *valP since bfd_install_relocation is
5817 not being used.
9f0eb232
RS		 5818 However, if the reloc is not fully resolved we do not want to
5819 use *valP, and must use fx_offset instead. If the relocation
5820 is PC-relative, we then need to re-apply md_pcrel_from_section
5821 to this new relocation value. */
94f592af
NC		 5822 if (fixP->fx_addsy == (symbolS *) NULL)
5823 fixP->fx_done = 1;
5824
252b5132 5825 else
9f0eb232
RS		 5826 {
5827 value = fixP->fx_offset;
5828 if (fixP->fx_pcrel)
5829 value -= md_pcrel_from_section (fixP, seg);
5830 }
a161fe53
AM		 5831#endif
5832
5833 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5834 {
a161fe53
AM		 5835 /* We can't actually support subtracting a symbol. */
5836 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5837 }
252b5132 5838
94f592af 5839 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5840 {
5841 int opindex;
5842 const struct powerpc_operand *operand;
5843 char *where;
5844 unsigned long insn;
5845
94f592af 5846 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5847
5848 operand = &powerpc_operands[opindex];
5849
5850#ifdef OBJ_XCOFF
0baf16f2
AM		 5851 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5852 does not generate a reloc. It uses the offset of `sym' within its
5853 csect. Other usages, such as `.long sym', generate relocs. This
5854 is the documented behaviour of non-TOC symbols. */
252b5132 5855 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5856 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5857 && operand->shift == 0
2b3c4602 5858 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5859 && fixP->fx_addsy != NULL
5860 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5861 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5862 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5863 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5864 {
94f592af
NC		 5865 value = fixP->fx_offset;
5866 fixP->fx_done = 1;
252b5132
RH		 5867 }
5868#endif
5869
5870 /* Fetch the instruction, insert the fully resolved operand
5871 value, and stuff the instruction back again. */
94f592af 5872 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5873 if (target_big_endian)
5874 insn = bfd_getb32 ((unsigned char *) where);
5875 else
5876 insn = bfd_getl32 ((unsigned char *) where);
5877 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5878 fixP->tc_fix_data.ppc_cpu,
94f592af 5879 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5880 if (target_big_endian)
5881 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5882 else
5883 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5884
94f592af
NC		 5885 if (fixP->fx_done)
5886 /* Nothing else to do here. */
5887 return;
252b5132 5888
9c2799c2 5889 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5890
252b5132
RH		 5891 /* Determine a BFD reloc value based on the operand information.
5892 We are only prepared to turn a few of the operands into
0baf16f2 5893 relocs. */
11b37b7b 5894 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5895 && operand->bitm == 0x3fffffc
11b37b7b 5896 && operand->shift == 0)
94f592af 5897 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5898 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5899 && operand->bitm == 0xfffc
11b37b7b 5900 && operand->shift == 0)
95210096
AM		 5901 {
5902 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5903#ifdef OBJ_XCOFF
5904 fixP->fx_size = 2;
5905 if (target_big_endian)
5906 fixP->fx_where += 2;
5907#endif
5908 }
11b37b7b 5909 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5910 && operand->bitm == 0x3fffffc
11b37b7b 5911 && operand->shift == 0)
94f592af 5912 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5913 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5914 && operand->bitm == 0xfffc
11b37b7b 5915 && operand->shift == 0)
95210096
AM		 5916 {
5917 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5918#ifdef OBJ_XCOFF
5919 fixP->fx_size = 2;
5920 if (target_big_endian)
5921 fixP->fx_where += 2;
5922#endif
5923 }
0baf16f2 5924#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5925 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5926 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5927 && operand->shift == 0)
11b37b7b 5928 {
a7fc733f
AM		 5929 if (ppc_is_toc_sym (fixP->fx_addsy))
5930 {
5931 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5932#ifdef OBJ_ELF
a7fc733f
AM		 5933 if (ppc_obj64
5934 && (operand->flags & PPC_OPERAND_DS) != 0)
5935 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5936#endif
5937 }
5938 else
5939 {
5940 fixP->fx_r_type = BFD_RELOC_16;
5941#ifdef OBJ_ELF
5942 if (ppc_obj64
5943 && (operand->flags & PPC_OPERAND_DS) != 0)
5944 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5945#endif
a7fc733f 5946 }
94f592af 5947 fixP->fx_size = 2;
11b37b7b 5948 if (target_big_endian)
94f592af 5949 fixP->fx_where += 2;
11b37b7b 5950 }
0baf16f2 5951#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5952 else
252b5132
RH		 5953 {
5954 char *sfile;
5955 unsigned int sline;
5956
5957 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5958 symbol. */
94f592af
NC		 5959 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5960 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5961 _("unresolved expression that must be resolved"));
5962 else
94f592af 5963 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5964 _("unsupported relocation against %s"),
94f592af
NC		 5965 S_GET_NAME (fixP->fx_addsy));
5966 fixP->fx_done = 1;
5967 return;
252b5132
RH		 5968 }
5969 }
5970 else
5971 {
5972#ifdef OBJ_ELF
94f592af 5973 ppc_elf_validate_fix (fixP, seg);
252b5132 5974#endif
94f592af 5975 switch (fixP->fx_r_type)
252b5132 5976 {
252b5132 5977 case BFD_RELOC_CTOR:
2b3c4602 5978 if (ppc_obj64)
9c7977b3
AM		 5979 goto ctor64;
5980 /* fall through */
5981
0baf16f2 5982 case BFD_RELOC_32:
94f592af
NC		 5983 if (fixP->fx_pcrel)
5984 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5985 /* fall through */
252b5132
RH		 5986
5987 case BFD_RELOC_RVA:
5988 case BFD_RELOC_32_PCREL:
252b5132 5989 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5990 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5991 value, 4);
5992 break;
5993
7f6d05e8 5994 case BFD_RELOC_64:
9c7977b3 5995 ctor64:
94f592af
NC		 5996 if (fixP->fx_pcrel)
5997 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5998 /* fall through */
0baf16f2 5999
7f6d05e8 6000 case BFD_RELOC_64_PCREL:
94f592af 6001 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6002 value, 8);
81d4177b 6003 break;
0baf16f2 6004
252b5132
RH		 6005 case BFD_RELOC_GPREL16:
6006 case BFD_RELOC_16_GOT_PCREL:
6007 case BFD_RELOC_16_GOTOFF:
6008 case BFD_RELOC_LO16_GOTOFF:
6009 case BFD_RELOC_HI16_GOTOFF:
6010 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6011 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6012 case BFD_RELOC_LO16_BASEREL:
6013 case BFD_RELOC_HI16_BASEREL:
6014 case BFD_RELOC_HI16_S_BASEREL:
6015 case BFD_RELOC_PPC_EMB_NADDR16:
6016 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6017 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6018 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6019 case BFD_RELOC_PPC_EMB_SDAI16:
6020 case BFD_RELOC_PPC_EMB_SDA2REL:
6021 case BFD_RELOC_PPC_EMB_SDA2I16:
6022 case BFD_RELOC_PPC_EMB_RELSEC16:
6023 case BFD_RELOC_PPC_EMB_RELST_LO:
6024 case BFD_RELOC_PPC_EMB_RELST_HI:
6025 case BFD_RELOC_PPC_EMB_RELST_HA:
6026 case BFD_RELOC_PPC_EMB_RELSDA:
6027 case BFD_RELOC_PPC_TOC16:
0baf16f2 6028#ifdef OBJ_ELF
0baf16f2
AM		 6029 case BFD_RELOC_PPC64_TOC16_LO:
6030 case BFD_RELOC_PPC64_TOC16_HI:
6031 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6032#endif
94f592af 6033 if (fixP->fx_pcrel)
252b5132 6034 {
94f592af
NC		 6035 if (fixP->fx_addsy != NULL)
6036 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6037 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6038 bfd_get_reloc_code_name (fixP->fx_r_type),
6039 S_GET_NAME (fixP->fx_addsy));
252b5132 6040 else
94f592af 6041 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6042 _("cannot emit PC relative %s relocation"),
94f592af 6043 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6044 }
6045
94f592af 6046 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6047 value, 2);
6048 break;
6049
3c9d25f4
AM		 6050 case BFD_RELOC_16:
6051 if (fixP->fx_pcrel)
6052 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6053 /* fall through */
6054
6055 case BFD_RELOC_16_PCREL:
6056 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6057 value, 2);
6058 break;
6059
6060 case BFD_RELOC_LO16:
6061 if (fixP->fx_pcrel)
6062 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6063 /* fall through */
6064
6065 case BFD_RELOC_LO16_PCREL:
6066 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6067 value, 2);
6068 break;
6069
252b5132
RH		 6070 /* This case happens when you write, for example,
6071 lis %r3,(L1-L2)@ha
6072 where L1 and L2 are defined later. */
6073 case BFD_RELOC_HI16:
94f592af 6074 if (fixP->fx_pcrel)
3c9d25f4
AM		 6075 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6076 /* fall through */
6077
6078 case BFD_RELOC_HI16_PCREL:
94f592af 6079 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6080 PPC_HI (value), 2);
252b5132 6081 break;
0baf16f2 6082
252b5132 6083 case BFD_RELOC_HI16_S:
94f592af 6084 if (fixP->fx_pcrel)
3c9d25f4
AM		 6085 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6086 /* fall through */
6087
6088 case BFD_RELOC_HI16_S_PCREL:
94f592af 6089 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6090 PPC_HA (value), 2);
6091 break;
6092
c865e45b
RS		 6093#ifdef OBJ_XCOFF
6094 case BFD_RELOC_NONE:
6095 break;
6096#endif
6097
0baf16f2 6098#ifdef OBJ_ELF
0baf16f2 6099 case BFD_RELOC_PPC64_HIGHER:
94f592af 6100 if (fixP->fx_pcrel)
0baf16f2 6101 abort ();
94f592af 6102 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6103 PPC_HIGHER (value), 2);
252b5132
RH		 6104 break;
6105
0baf16f2 6106 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6107 if (fixP->fx_pcrel)
0baf16f2 6108 abort ();
94f592af 6109 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6110 PPC_HIGHERA (value), 2);
6111 break;
6112
6113 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6114 if (fixP->fx_pcrel)
0baf16f2 6115 abort ();
94f592af 6116 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6117 PPC_HIGHEST (value), 2);
6118 break;
6119
6120 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6121 if (fixP->fx_pcrel)
0baf16f2 6122 abort ();
94f592af 6123 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6124 PPC_HIGHESTA (value), 2);
6125 break;
6126
6127 case BFD_RELOC_PPC64_ADDR16_DS:
6128 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6129 case BFD_RELOC_PPC64_GOT16_DS:
6130 case BFD_RELOC_PPC64_GOT16_LO_DS:
6131 case BFD_RELOC_PPC64_PLT16_LO_DS:
6132 case BFD_RELOC_PPC64_SECTOFF_DS:
6133 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6134 case BFD_RELOC_PPC64_TOC16_DS:
6135 case BFD_RELOC_PPC64_TOC16_LO_DS:
6136 case BFD_RELOC_PPC64_PLTGOT16_DS:
6137 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6138 if (fixP->fx_pcrel)
0baf16f2
AM		 6139 abort ();
6140 {
2132e3a3 6141 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6142 unsigned long val, mask;
0baf16f2
AM		 6143
6144 if (target_big_endian)
adadcc0c 6145 val = bfd_getb32 (where - 2);
0baf16f2 6146 else
adadcc0c
AM		 6147 val = bfd_getl32 (where);
6148 mask = 0xfffc;
6149 /* lq insns reserve the four lsbs. */
6150 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6151 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6152 mask = 0xfff0;
6153 val |= value & mask;
0baf16f2
AM		 6154 if (target_big_endian)
6155 bfd_putb16 ((bfd_vma) val, where);
6156 else
6157 bfd_putl16 ((bfd_vma) val, where);
6158 }
6159 break;
cdba85ec 6160
ba0b2174
AM		 6161 case BFD_RELOC_PPC_B16_BRTAKEN:
6162 case BFD_RELOC_PPC_B16_BRNTAKEN:
6163 case BFD_RELOC_PPC_BA16_BRTAKEN:
6164 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6165 break;
6166
cdba85ec 6167 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6168 case BFD_RELOC_PPC_TLSGD:
6169 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6170 break;
6171
cdba85ec
AM		 6172 case BFD_RELOC_PPC_DTPMOD:
6173 case BFD_RELOC_PPC_TPREL16:
6174 case BFD_RELOC_PPC_TPREL16_LO:
6175 case BFD_RELOC_PPC_TPREL16_HI:
6176 case BFD_RELOC_PPC_TPREL16_HA:
6177 case BFD_RELOC_PPC_TPREL:
6178 case BFD_RELOC_PPC_DTPREL16:
6179 case BFD_RELOC_PPC_DTPREL16_LO:
6180 case BFD_RELOC_PPC_DTPREL16_HI:
6181 case BFD_RELOC_PPC_DTPREL16_HA:
6182 case BFD_RELOC_PPC_DTPREL:
6183 case BFD_RELOC_PPC_GOT_TLSGD16:
6184 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6185 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6186 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6187 case BFD_RELOC_PPC_GOT_TLSLD16:
6188 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6189 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6190 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6191 case BFD_RELOC_PPC_GOT_TPREL16:
6192 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6193 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6194 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6195 case BFD_RELOC_PPC_GOT_DTPREL16:
6196 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6197 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6198 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6199 case BFD_RELOC_PPC64_TPREL16_DS:
6200 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6201 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6202 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6203 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6204 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6205 case BFD_RELOC_PPC64_DTPREL16_DS:
6206 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6207 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6208 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6209 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6210 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6211 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6212 break;
0baf16f2 6213#endif
252b5132 6214 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6215 bytes, rather than 2, so offset it here appropriately. */
252b5132 6216 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6217 if (fixP->fx_pcrel)
252b5132
RH		 6218 abort ();
6219
94f592af 6220 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6221 + ((target_big_endian) ? 2 : 0),
6222 value, 2);
6223 break;
6224
6225 case BFD_RELOC_8:
94f592af 6226 if (fixP->fx_pcrel)
31a91399
NC		 6227 {
6228 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6229 ".byte <undefined_symbol> - ." */
31a91399
NC		 6230 if (fixP->fx_addsy)
6231 as_bad (_("Unable to handle reference to symbol %s"),
6232 S_GET_NAME (fixP->fx_addsy));
6233 else
6234 as_bad (_("Unable to resolve expression"));
6235 fixP->fx_done = 1;
6236 }
6237 else
6238 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6239 value, 1);
252b5132
RH		 6240 break;
6241
6242 case BFD_RELOC_24_PLT_PCREL:
6243 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6244 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6245 abort ();
6246
94f592af 6247 if (fixP->fx_done)
99a814a1
AM		 6248 {
6249 char *where;
6250 unsigned long insn;
6251
6252 /* Fetch the instruction, insert the fully resolved operand
6253 value, and stuff the instruction back again. */
94f592af 6254 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6255 if (target_big_endian)
6256 insn = bfd_getb32 ((unsigned char *) where);
6257 else
6258 insn = bfd_getl32 ((unsigned char *) where);
6259 if ((value & 3) != 0)
94f592af 6260 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6261 _("must branch to an address a multiple of 4"));
6262 if ((offsetT) value < -0x40000000
6263 || (offsetT) value >= 0x40000000)
94f592af 6264 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6265 _("@local or @plt branch destination is too far away, %ld bytes"),
6266 (long) value);
6267 insn = insn | (value & 0x03fffffc);
6268 if (target_big_endian)
6269 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6270 else
6271 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6272 }
252b5132
RH		 6273 break;
6274
6275 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6276 fixP->fx_done = 0;
6277 if (fixP->fx_addsy
6278 && !S_IS_DEFINED (fixP->fx_addsy)
6279 && !S_IS_WEAK (fixP->fx_addsy))
6280 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6281 break;
6282
6283 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6284 fixP->fx_done = 0;
252b5132
RH		 6285 break;
6286
0baf16f2 6287#ifdef OBJ_ELF
0baf16f2
AM		 6288 /* Generated by reference to `sym@tocbase'. The sym is
6289 ignored by the linker. */
6290 case BFD_RELOC_PPC64_TOC:
94f592af 6291 fixP->fx_done = 0;
0baf16f2 6292 break;
0baf16f2 6293#endif
252b5132 6294 default:
bc805888 6295 fprintf (stderr,
94f592af 6296 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6297 fflush (stderr);
252b5132
RH		 6298 abort ();
6299 }
6300 }
6301
6302#ifdef OBJ_ELF
94f592af 6303 fixP->fx_addnumber = value;
4e6935a6
AM		 6304
6305 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6306 from the section contents. If we are going to be emitting a reloc
6307 then the section contents are immaterial, so don't warn if they
6308 happen to overflow. Leave such warnings to ld. */
6309 if (!fixP->fx_done)
6310 fixP->fx_no_overflow = 1;
252b5132 6311#else
94f592af
NC		 6312 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6313 fixP->fx_addnumber = 0;
252b5132
RH		 6314 else
6315 {
6316#ifdef TE_PE
94f592af 6317 fixP->fx_addnumber = 0;
252b5132 6318#else
8edcbfcd
TG		 6319 /* We want to use the offset within the toc, not the actual VMA
6320 of the symbol. */
94f592af 6321 fixP->fx_addnumber =
8edcbfcd
TG		 6322 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6323 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6324#endif
6325 }
6326#endif
252b5132
RH		 6327}
6328
6329/* Generate a reloc for a fixup. */
6330
6331arelent *
98027b10 6332tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6333{
6334 arelent *reloc;
6335
6336 reloc = (arelent *) xmalloc (sizeof (arelent));
6337
49309057
ILT		 6338 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6339 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6340 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6341 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6342 if (reloc->howto == (reloc_howto_type *) NULL)
6343 {
6344 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6345 _("reloc %d not supported by object file format"),
6346 (int) fixp->fx_r_type);
252b5132
RH		 6347 return NULL;
6348 }
6349 reloc->addend = fixp->fx_addnumber;
6350
6351 return reloc;
6352}
75e21f08
JJ		 6353
6354void
98027b10 6355ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6356{
6357 cfi_add_CFA_def_cfa (1, 0);
6358}
6359
6360int
1df69f4f 6361tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6362{
6363 unsigned int regnum = -1;
6364 unsigned int i;
6365 const char *p;
6366 char *q;
6367 static struct { char *name; int dw2regnum; } regnames[] =
6368 {
6369 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6370 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6371 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6372 { "spe_acc", 111 }, { "spefscr", 112 }
6373 };
6374
6375 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6376 if (strcmp (regnames[i].name, regname) == 0)
6377 return regnames[i].dw2regnum;
6378
6379 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6380 {
6381 p = regname + 1 + (regname[1] == '.');
6382 regnum = strtoul (p, &q, 10);
6383 if (p == q || *q || regnum >= 32)
6384 return -1;
6385 if (regname[0] == 'f')
b7d7dc63 6386 regnum += 32;
75e21f08 6387 else if (regname[0] == 'v')
b7d7dc63 6388 regnum += 77;
75e21f08
JJ		 6389 }
6390 else if (regname[0] == 'c' && regname[1] == 'r')
6391 {
6392 p = regname + 2 + (regname[2] == '.');
6393 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6394 return -1;
75e21f08
JJ		 6395 regnum = p[0] - '0' + 68;
6396 }
6397 return regnum;
6398}
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