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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
b7d7dc63 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
ed84b57b | 3 | 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. |
252b5132 RH |
4 | Written by Ian Lance Taylor, Cygnus Support. |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
20 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
21 | 02110-1301, USA. */ | |
252b5132 | 22 | |
252b5132 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
252b5132 | 25 | #include "subsegs.h" |
75e21f08 | 26 | #include "dw2gencfi.h" |
252b5132 RH |
27 | #include "opcode/ppc.h" |
28 | ||
29 | #ifdef OBJ_ELF | |
30 | #include "elf/ppc.h" | |
5d6f4f16 | 31 | #include "dwarf2dbg.h" |
252b5132 RH |
32 | #endif |
33 | ||
34 | #ifdef TE_PE | |
35 | #include "coff/pe.h" | |
36 | #endif | |
37 | ||
38 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ | |
39 | ||
40 | /* Tell the main code what the endianness is. */ | |
41 | extern int target_big_endian; | |
42 | ||
43 | /* Whether or not, we've set target_big_endian. */ | |
44 | static int set_target_endian = 0; | |
45 | ||
46 | /* Whether to use user friendly register names. */ | |
47 | #ifndef TARGET_REG_NAMES_P | |
48 | #ifdef TE_PE | |
b34976b6 | 49 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 50 | #else |
b34976b6 | 51 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
52 | #endif |
53 | #endif | |
54 | ||
0baf16f2 AM |
55 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
56 | HIGHESTA. */ | |
57 | ||
58 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
59 | #define PPC_LO(v) ((v) & 0xffff) | |
60 | ||
61 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ | |
62 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
63 | ||
64 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of | |
65 | the indicated value, compensating for #lo() being treated as a | |
66 | signed number. */ | |
15c1449b | 67 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 AM |
68 | |
69 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ | |
2a98c3a6 | 70 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
71 | |
72 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
73 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 74 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
75 | |
76 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 77 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
78 | |
79 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
80 | compensating for #lo being treated as a signed number. */ |
81 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 AM |
82 | |
83 | #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) | |
84 | ||
b34976b6 | 85 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 86 | |
98027b10 AM |
87 | static void ppc_macro (char *, const struct powerpc_macro *); |
88 | static void ppc_byte (int); | |
0baf16f2 AM |
89 | |
90 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
91 | static void ppc_tc (int); |
92 | static void ppc_machine (int); | |
0baf16f2 | 93 | #endif |
252b5132 RH |
94 | |
95 | #ifdef OBJ_XCOFF | |
98027b10 AM |
96 | static void ppc_comm (int); |
97 | static void ppc_bb (int); | |
98 | static void ppc_bc (int); | |
99 | static void ppc_bf (int); | |
100 | static void ppc_biei (int); | |
101 | static void ppc_bs (int); | |
102 | static void ppc_eb (int); | |
103 | static void ppc_ec (int); | |
104 | static void ppc_ef (int); | |
105 | static void ppc_es (int); | |
106 | static void ppc_csect (int); | |
107 | static void ppc_change_csect (symbolS *, offsetT); | |
108 | static void ppc_function (int); | |
109 | static void ppc_extern (int); | |
110 | static void ppc_lglobl (int); | |
111 | static void ppc_section (int); | |
112 | static void ppc_named_section (int); | |
113 | static void ppc_stabx (int); | |
114 | static void ppc_rename (int); | |
115 | static void ppc_toc (int); | |
116 | static void ppc_xcoff_cons (int); | |
117 | static void ppc_vbyte (int); | |
252b5132 RH |
118 | #endif |
119 | ||
120 | #ifdef OBJ_ELF | |
98027b10 AM |
121 | static void ppc_elf_cons (int); |
122 | static void ppc_elf_rdata (int); | |
123 | static void ppc_elf_lcomm (int); | |
252b5132 RH |
124 | #endif |
125 | ||
126 | #ifdef TE_PE | |
98027b10 AM |
127 | static void ppc_previous (int); |
128 | static void ppc_pdata (int); | |
129 | static void ppc_ydata (int); | |
130 | static void ppc_reldata (int); | |
131 | static void ppc_rdata (int); | |
132 | static void ppc_ualong (int); | |
133 | static void ppc_znop (int); | |
134 | static void ppc_pe_comm (int); | |
135 | static void ppc_pe_section (int); | |
136 | static void ppc_pe_function (int); | |
137 | static void ppc_pe_tocd (int); | |
252b5132 RH |
138 | #endif |
139 | \f | |
140 | /* Generic assembler global variables which must be defined by all | |
141 | targets. */ | |
142 | ||
143 | #ifdef OBJ_ELF | |
144 | /* This string holds the chars that always start a comment. If the | |
145 | pre-processor is disabled, these aren't very useful. The macro | |
146 | tc_comment_chars points to this. We use this, rather than the | |
147 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
148 | static const char ppc_solaris_comment_chars[] = "#!"; | |
149 | static const char ppc_eabi_comment_chars[] = "#"; | |
150 | ||
151 | #ifdef TARGET_SOLARIS_COMMENT | |
152 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
153 | #else | |
154 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
155 | #endif | |
156 | #else | |
157 | const char comment_chars[] = "#"; | |
158 | #endif | |
159 | ||
160 | /* Characters which start a comment at the beginning of a line. */ | |
161 | const char line_comment_chars[] = "#"; | |
162 | ||
163 | /* Characters which may be used to separate multiple commands on a | |
164 | single line. */ | |
165 | const char line_separator_chars[] = ";"; | |
166 | ||
167 | /* Characters which are used to indicate an exponent in a floating | |
168 | point number. */ | |
169 | const char EXP_CHARS[] = "eE"; | |
170 | ||
171 | /* Characters which mean that a number is a floating point constant, | |
172 | as in 0d1.0. */ | |
173 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 174 | |
5e02f92e | 175 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 176 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 177 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
178 | |
179 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
180 | int ppc_cie_data_alignment; | |
783de163 AM |
181 | |
182 | /* The type of processor we are assembling for. This is one or more | |
183 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 184 | ppc_cpu_t ppc_cpu = 0; |
252b5132 RH |
185 | \f |
186 | /* The target specific pseudo-ops which we support. */ | |
187 | ||
188 | const pseudo_typeS md_pseudo_table[] = | |
189 | { | |
190 | /* Pseudo-ops which must be overridden. */ | |
191 | { "byte", ppc_byte, 0 }, | |
192 | ||
193 | #ifdef OBJ_XCOFF | |
194 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
195 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
196 | on COFF, and is only implemented for the RS/6000. We just use | |
197 | obj-coff.c, and add what we need here. */ | |
198 | { "comm", ppc_comm, 0 }, | |
199 | { "lcomm", ppc_comm, 1 }, | |
200 | { "bb", ppc_bb, 0 }, | |
201 | { "bc", ppc_bc, 0 }, | |
202 | { "bf", ppc_bf, 0 }, | |
203 | { "bi", ppc_biei, 0 }, | |
204 | { "bs", ppc_bs, 0 }, | |
205 | { "csect", ppc_csect, 0 }, | |
206 | { "data", ppc_section, 'd' }, | |
207 | { "eb", ppc_eb, 0 }, | |
208 | { "ec", ppc_ec, 0 }, | |
209 | { "ef", ppc_ef, 0 }, | |
210 | { "ei", ppc_biei, 1 }, | |
211 | { "es", ppc_es, 0 }, | |
212 | { "extern", ppc_extern, 0 }, | |
213 | { "function", ppc_function, 0 }, | |
214 | { "lglobl", ppc_lglobl, 0 }, | |
215 | { "rename", ppc_rename, 0 }, | |
216 | { "section", ppc_named_section, 0 }, | |
217 | { "stabx", ppc_stabx, 0 }, | |
218 | { "text", ppc_section, 't' }, | |
219 | { "toc", ppc_toc, 0 }, | |
220 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 221 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
222 | { "word", ppc_xcoff_cons, 1 }, |
223 | { "short", ppc_xcoff_cons, 1 }, | |
224 | { "vbyte", ppc_vbyte, 0 }, | |
225 | #endif | |
226 | ||
227 | #ifdef OBJ_ELF | |
0baf16f2 AM |
228 | { "llong", ppc_elf_cons, 8 }, |
229 | { "quad", ppc_elf_cons, 8 }, | |
252b5132 RH |
230 | { "long", ppc_elf_cons, 4 }, |
231 | { "word", ppc_elf_cons, 2 }, | |
232 | { "short", ppc_elf_cons, 2 }, | |
233 | { "rdata", ppc_elf_rdata, 0 }, | |
234 | { "rodata", ppc_elf_rdata, 0 }, | |
235 | { "lcomm", ppc_elf_lcomm, 0 }, | |
236 | #endif | |
237 | ||
238 | #ifdef TE_PE | |
99a814a1 | 239 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
240 | { "previous", ppc_previous, 0 }, |
241 | { "pdata", ppc_pdata, 0 }, | |
242 | { "ydata", ppc_ydata, 0 }, | |
243 | { "reldata", ppc_reldata, 0 }, | |
244 | { "rdata", ppc_rdata, 0 }, | |
245 | { "ualong", ppc_ualong, 0 }, | |
246 | { "znop", ppc_znop, 0 }, | |
247 | { "comm", ppc_pe_comm, 0 }, | |
248 | { "lcomm", ppc_pe_comm, 1 }, | |
249 | { "section", ppc_pe_section, 0 }, | |
250 | { "function", ppc_pe_function,0 }, | |
251 | { "tocd", ppc_pe_tocd, 0 }, | |
252 | #endif | |
253 | ||
0baf16f2 | 254 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 255 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
256 | { "machine", ppc_machine, 0 }, |
257 | #endif | |
252b5132 RH |
258 | |
259 | { NULL, NULL, 0 } | |
260 | }; | |
261 | ||
262 | \f | |
99a814a1 AM |
263 | /* Predefined register names if -mregnames (or default for Windows NT). |
264 | In general, there are lots of them, in an attempt to be compatible | |
265 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
266 | |
267 | /* Structure to hold information about predefined registers. */ | |
268 | struct pd_reg | |
269 | { | |
270 | char *name; | |
271 | int value; | |
272 | }; | |
273 | ||
274 | /* List of registers that are pre-defined: | |
275 | ||
276 | Each general register has predefined names of the form: | |
277 | 1. r<reg_num> which has the value <reg_num>. | |
278 | 2. r.<reg_num> which has the value <reg_num>. | |
279 | ||
252b5132 RH |
280 | Each floating point register has predefined names of the form: |
281 | 1. f<reg_num> which has the value <reg_num>. | |
282 | 2. f.<reg_num> which has the value <reg_num>. | |
283 | ||
7a899fff C |
284 | Each vector unit register has predefined names of the form: |
285 | 1. v<reg_num> which has the value <reg_num>. | |
286 | 2. v.<reg_num> which has the value <reg_num>. | |
287 | ||
252b5132 RH |
288 | Each condition register has predefined names of the form: |
289 | 1. cr<reg_num> which has the value <reg_num>. | |
290 | 2. cr.<reg_num> which has the value <reg_num>. | |
291 | ||
292 | There are individual registers as well: | |
293 | sp or r.sp has the value 1 | |
294 | rtoc or r.toc has the value 2 | |
295 | fpscr has the value 0 | |
296 | xer has the value 1 | |
297 | lr has the value 8 | |
298 | ctr has the value 9 | |
299 | pmr has the value 0 | |
300 | dar has the value 19 | |
301 | dsisr has the value 18 | |
302 | dec has the value 22 | |
303 | sdr1 has the value 25 | |
304 | srr0 has the value 26 | |
305 | srr1 has the value 27 | |
306 | ||
81d4177b | 307 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
308 | |
309 | static const struct pd_reg pre_defined_registers[] = | |
310 | { | |
311 | { "cr.0", 0 }, /* Condition Registers */ | |
312 | { "cr.1", 1 }, | |
313 | { "cr.2", 2 }, | |
314 | { "cr.3", 3 }, | |
315 | { "cr.4", 4 }, | |
316 | { "cr.5", 5 }, | |
317 | { "cr.6", 6 }, | |
318 | { "cr.7", 7 }, | |
319 | ||
320 | { "cr0", 0 }, | |
321 | { "cr1", 1 }, | |
322 | { "cr2", 2 }, | |
323 | { "cr3", 3 }, | |
324 | { "cr4", 4 }, | |
325 | { "cr5", 5 }, | |
326 | { "cr6", 6 }, | |
327 | { "cr7", 7 }, | |
328 | ||
329 | { "ctr", 9 }, | |
330 | ||
331 | { "dar", 19 }, /* Data Access Register */ | |
332 | { "dec", 22 }, /* Decrementer */ | |
333 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
334 | ||
335 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
336 | { "f.1", 1 }, |
337 | { "f.10", 10 }, | |
338 | { "f.11", 11 }, | |
339 | { "f.12", 12 }, | |
340 | { "f.13", 13 }, | |
341 | { "f.14", 14 }, | |
342 | { "f.15", 15 }, | |
343 | { "f.16", 16 }, | |
344 | { "f.17", 17 }, | |
345 | { "f.18", 18 }, | |
346 | { "f.19", 19 }, | |
347 | { "f.2", 2 }, | |
348 | { "f.20", 20 }, | |
349 | { "f.21", 21 }, | |
350 | { "f.22", 22 }, | |
351 | { "f.23", 23 }, | |
352 | { "f.24", 24 }, | |
353 | { "f.25", 25 }, | |
354 | { "f.26", 26 }, | |
355 | { "f.27", 27 }, | |
356 | { "f.28", 28 }, | |
357 | { "f.29", 29 }, | |
358 | { "f.3", 3 }, | |
252b5132 RH |
359 | { "f.30", 30 }, |
360 | { "f.31", 31 }, | |
066be9f7 PB |
361 | |
362 | { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
363 | { "f.33", 33 }, | |
364 | { "f.34", 34 }, | |
365 | { "f.35", 35 }, | |
366 | { "f.36", 36 }, | |
367 | { "f.37", 37 }, | |
368 | { "f.38", 38 }, | |
369 | { "f.39", 39 }, | |
81d4177b | 370 | { "f.4", 4 }, |
066be9f7 PB |
371 | { "f.40", 40 }, |
372 | { "f.41", 41 }, | |
373 | { "f.42", 42 }, | |
374 | { "f.43", 43 }, | |
375 | { "f.44", 44 }, | |
376 | { "f.45", 45 }, | |
377 | { "f.46", 46 }, | |
378 | { "f.47", 47 }, | |
379 | { "f.48", 48 }, | |
380 | { "f.49", 49 }, | |
81d4177b | 381 | { "f.5", 5 }, |
066be9f7 PB |
382 | { "f.50", 50 }, |
383 | { "f.51", 51 }, | |
384 | { "f.52", 52 }, | |
385 | { "f.53", 53 }, | |
386 | { "f.54", 54 }, | |
387 | { "f.55", 55 }, | |
388 | { "f.56", 56 }, | |
389 | { "f.57", 57 }, | |
390 | { "f.58", 58 }, | |
391 | { "f.59", 59 }, | |
81d4177b | 392 | { "f.6", 6 }, |
066be9f7 PB |
393 | { "f.60", 60 }, |
394 | { "f.61", 61 }, | |
395 | { "f.62", 62 }, | |
396 | { "f.63", 63 }, | |
81d4177b KH |
397 | { "f.7", 7 }, |
398 | { "f.8", 8 }, | |
399 | { "f.9", 9 }, | |
400 | ||
401 | { "f0", 0 }, | |
402 | { "f1", 1 }, | |
403 | { "f10", 10 }, | |
404 | { "f11", 11 }, | |
405 | { "f12", 12 }, | |
406 | { "f13", 13 }, | |
407 | { "f14", 14 }, | |
408 | { "f15", 15 }, | |
409 | { "f16", 16 }, | |
410 | { "f17", 17 }, | |
411 | { "f18", 18 }, | |
412 | { "f19", 19 }, | |
413 | { "f2", 2 }, | |
414 | { "f20", 20 }, | |
415 | { "f21", 21 }, | |
416 | { "f22", 22 }, | |
417 | { "f23", 23 }, | |
418 | { "f24", 24 }, | |
419 | { "f25", 25 }, | |
420 | { "f26", 26 }, | |
421 | { "f27", 27 }, | |
422 | { "f28", 28 }, | |
423 | { "f29", 29 }, | |
424 | { "f3", 3 }, | |
252b5132 RH |
425 | { "f30", 30 }, |
426 | { "f31", 31 }, | |
066be9f7 PB |
427 | |
428 | { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
429 | { "f33", 33 }, | |
430 | { "f34", 34 }, | |
431 | { "f35", 35 }, | |
432 | { "f36", 36 }, | |
433 | { "f37", 37 }, | |
434 | { "f38", 38 }, | |
435 | { "f39", 39 }, | |
81d4177b | 436 | { "f4", 4 }, |
066be9f7 PB |
437 | { "f40", 40 }, |
438 | { "f41", 41 }, | |
439 | { "f42", 42 }, | |
440 | { "f43", 43 }, | |
441 | { "f44", 44 }, | |
442 | { "f45", 45 }, | |
443 | { "f46", 46 }, | |
444 | { "f47", 47 }, | |
445 | { "f48", 48 }, | |
446 | { "f49", 49 }, | |
81d4177b | 447 | { "f5", 5 }, |
066be9f7 PB |
448 | { "f50", 50 }, |
449 | { "f51", 51 }, | |
450 | { "f52", 52 }, | |
451 | { "f53", 53 }, | |
452 | { "f54", 54 }, | |
453 | { "f55", 55 }, | |
454 | { "f56", 56 }, | |
455 | { "f57", 57 }, | |
456 | { "f58", 58 }, | |
457 | { "f59", 59 }, | |
81d4177b | 458 | { "f6", 6 }, |
066be9f7 PB |
459 | { "f60", 60 }, |
460 | { "f61", 61 }, | |
461 | { "f62", 62 }, | |
462 | { "f63", 63 }, | |
81d4177b KH |
463 | { "f7", 7 }, |
464 | { "f8", 8 }, | |
465 | { "f9", 9 }, | |
252b5132 RH |
466 | |
467 | { "fpscr", 0 }, | |
468 | ||
c3d65c1c BE |
469 | /* Quantization registers used with pair single instructions. */ |
470 | { "gqr.0", 0 }, | |
471 | { "gqr.1", 1 }, | |
472 | { "gqr.2", 2 }, | |
473 | { "gqr.3", 3 }, | |
474 | { "gqr.4", 4 }, | |
475 | { "gqr.5", 5 }, | |
476 | { "gqr.6", 6 }, | |
477 | { "gqr.7", 7 }, | |
478 | { "gqr0", 0 }, | |
479 | { "gqr1", 1 }, | |
480 | { "gqr2", 2 }, | |
481 | { "gqr3", 3 }, | |
482 | { "gqr4", 4 }, | |
483 | { "gqr5", 5 }, | |
484 | { "gqr6", 6 }, | |
485 | { "gqr7", 7 }, | |
486 | ||
252b5132 RH |
487 | { "lr", 8 }, /* Link Register */ |
488 | ||
489 | { "pmr", 0 }, | |
490 | ||
491 | { "r.0", 0 }, /* General Purpose Registers */ | |
492 | { "r.1", 1 }, | |
493 | { "r.10", 10 }, | |
494 | { "r.11", 11 }, | |
495 | { "r.12", 12 }, | |
496 | { "r.13", 13 }, | |
497 | { "r.14", 14 }, | |
498 | { "r.15", 15 }, | |
499 | { "r.16", 16 }, | |
500 | { "r.17", 17 }, | |
501 | { "r.18", 18 }, | |
502 | { "r.19", 19 }, | |
503 | { "r.2", 2 }, | |
504 | { "r.20", 20 }, | |
505 | { "r.21", 21 }, | |
506 | { "r.22", 22 }, | |
507 | { "r.23", 23 }, | |
508 | { "r.24", 24 }, | |
509 | { "r.25", 25 }, | |
510 | { "r.26", 26 }, | |
511 | { "r.27", 27 }, | |
512 | { "r.28", 28 }, | |
513 | { "r.29", 29 }, | |
514 | { "r.3", 3 }, | |
515 | { "r.30", 30 }, | |
516 | { "r.31", 31 }, | |
517 | { "r.4", 4 }, | |
518 | { "r.5", 5 }, | |
519 | { "r.6", 6 }, | |
520 | { "r.7", 7 }, | |
521 | { "r.8", 8 }, | |
522 | { "r.9", 9 }, | |
523 | ||
524 | { "r.sp", 1 }, /* Stack Pointer */ | |
525 | ||
526 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
527 | ||
528 | { "r0", 0 }, /* More general purpose registers */ | |
529 | { "r1", 1 }, | |
530 | { "r10", 10 }, | |
531 | { "r11", 11 }, | |
532 | { "r12", 12 }, | |
533 | { "r13", 13 }, | |
534 | { "r14", 14 }, | |
535 | { "r15", 15 }, | |
536 | { "r16", 16 }, | |
537 | { "r17", 17 }, | |
538 | { "r18", 18 }, | |
539 | { "r19", 19 }, | |
540 | { "r2", 2 }, | |
541 | { "r20", 20 }, | |
542 | { "r21", 21 }, | |
543 | { "r22", 22 }, | |
544 | { "r23", 23 }, | |
545 | { "r24", 24 }, | |
546 | { "r25", 25 }, | |
547 | { "r26", 26 }, | |
548 | { "r27", 27 }, | |
549 | { "r28", 28 }, | |
550 | { "r29", 29 }, | |
551 | { "r3", 3 }, | |
552 | { "r30", 30 }, | |
553 | { "r31", 31 }, | |
554 | { "r4", 4 }, | |
555 | { "r5", 5 }, | |
556 | { "r6", 6 }, | |
557 | { "r7", 7 }, | |
558 | { "r8", 8 }, | |
559 | { "r9", 9 }, | |
560 | ||
561 | { "rtoc", 2 }, /* Table of contents */ | |
562 | ||
563 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
564 | ||
565 | { "sp", 1 }, | |
566 | ||
567 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
568 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 569 | |
066be9f7 | 570 | { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ |
81d4177b KH |
571 | { "v.1", 1 }, |
572 | { "v.10", 10 }, | |
573 | { "v.11", 11 }, | |
574 | { "v.12", 12 }, | |
575 | { "v.13", 13 }, | |
576 | { "v.14", 14 }, | |
577 | { "v.15", 15 }, | |
578 | { "v.16", 16 }, | |
579 | { "v.17", 17 }, | |
580 | { "v.18", 18 }, | |
581 | { "v.19", 19 }, | |
582 | { "v.2", 2 }, | |
583 | { "v.20", 20 }, | |
584 | { "v.21", 21 }, | |
585 | { "v.22", 22 }, | |
586 | { "v.23", 23 }, | |
587 | { "v.24", 24 }, | |
588 | { "v.25", 25 }, | |
589 | { "v.26", 26 }, | |
590 | { "v.27", 27 }, | |
591 | { "v.28", 28 }, | |
592 | { "v.29", 29 }, | |
593 | { "v.3", 3 }, | |
7a899fff C |
594 | { "v.30", 30 }, |
595 | { "v.31", 31 }, | |
81d4177b KH |
596 | { "v.4", 4 }, |
597 | { "v.5", 5 }, | |
598 | { "v.6", 6 }, | |
599 | { "v.7", 7 }, | |
600 | { "v.8", 8 }, | |
601 | { "v.9", 9 }, | |
7a899fff C |
602 | |
603 | { "v0", 0 }, | |
81d4177b KH |
604 | { "v1", 1 }, |
605 | { "v10", 10 }, | |
606 | { "v11", 11 }, | |
607 | { "v12", 12 }, | |
608 | { "v13", 13 }, | |
609 | { "v14", 14 }, | |
610 | { "v15", 15 }, | |
611 | { "v16", 16 }, | |
612 | { "v17", 17 }, | |
613 | { "v18", 18 }, | |
614 | { "v19", 19 }, | |
615 | { "v2", 2 }, | |
616 | { "v20", 20 }, | |
617 | { "v21", 21 }, | |
618 | { "v22", 22 }, | |
619 | { "v23", 23 }, | |
620 | { "v24", 24 }, | |
621 | { "v25", 25 }, | |
622 | { "v26", 26 }, | |
623 | { "v27", 27 }, | |
624 | { "v28", 28 }, | |
625 | { "v29", 29 }, | |
626 | { "v3", 3 }, | |
7a899fff C |
627 | { "v30", 30 }, |
628 | { "v31", 31 }, | |
81d4177b KH |
629 | { "v4", 4 }, |
630 | { "v5", 5 }, | |
631 | { "v6", 6 }, | |
632 | { "v7", 7 }, | |
633 | { "v8", 8 }, | |
7a899fff | 634 | { "v9", 9 }, |
252b5132 | 635 | |
066be9f7 PB |
636 | { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ |
637 | { "vs.1", 1 }, | |
638 | { "vs.10", 10 }, | |
639 | { "vs.11", 11 }, | |
640 | { "vs.12", 12 }, | |
641 | { "vs.13", 13 }, | |
642 | { "vs.14", 14 }, | |
643 | { "vs.15", 15 }, | |
644 | { "vs.16", 16 }, | |
645 | { "vs.17", 17 }, | |
646 | { "vs.18", 18 }, | |
647 | { "vs.19", 19 }, | |
648 | { "vs.2", 2 }, | |
649 | { "vs.20", 20 }, | |
650 | { "vs.21", 21 }, | |
651 | { "vs.22", 22 }, | |
652 | { "vs.23", 23 }, | |
653 | { "vs.24", 24 }, | |
654 | { "vs.25", 25 }, | |
655 | { "vs.26", 26 }, | |
656 | { "vs.27", 27 }, | |
657 | { "vs.28", 28 }, | |
658 | { "vs.29", 29 }, | |
659 | { "vs.3", 3 }, | |
660 | { "vs.30", 30 }, | |
661 | { "vs.31", 31 }, | |
662 | { "vs.32", 32 }, | |
663 | { "vs.33", 33 }, | |
664 | { "vs.34", 34 }, | |
665 | { "vs.35", 35 }, | |
666 | { "vs.36", 36 }, | |
667 | { "vs.37", 37 }, | |
668 | { "vs.38", 38 }, | |
669 | { "vs.39", 39 }, | |
670 | { "vs.4", 4 }, | |
671 | { "vs.40", 40 }, | |
672 | { "vs.41", 41 }, | |
673 | { "vs.42", 42 }, | |
674 | { "vs.43", 43 }, | |
675 | { "vs.44", 44 }, | |
676 | { "vs.45", 45 }, | |
677 | { "vs.46", 46 }, | |
678 | { "vs.47", 47 }, | |
679 | { "vs.48", 48 }, | |
680 | { "vs.49", 49 }, | |
681 | { "vs.5", 5 }, | |
682 | { "vs.50", 50 }, | |
683 | { "vs.51", 51 }, | |
684 | { "vs.52", 52 }, | |
685 | { "vs.53", 53 }, | |
686 | { "vs.54", 54 }, | |
687 | { "vs.55", 55 }, | |
688 | { "vs.56", 56 }, | |
689 | { "vs.57", 57 }, | |
690 | { "vs.58", 58 }, | |
691 | { "vs.59", 59 }, | |
692 | { "vs.6", 6 }, | |
693 | { "vs.60", 60 }, | |
694 | { "vs.61", 61 }, | |
695 | { "vs.62", 62 }, | |
696 | { "vs.63", 63 }, | |
697 | { "vs.7", 7 }, | |
698 | { "vs.8", 8 }, | |
699 | { "vs.9", 9 }, | |
700 | ||
701 | { "vs0", 0 }, | |
702 | { "vs1", 1 }, | |
703 | { "vs10", 10 }, | |
704 | { "vs11", 11 }, | |
705 | { "vs12", 12 }, | |
706 | { "vs13", 13 }, | |
707 | { "vs14", 14 }, | |
708 | { "vs15", 15 }, | |
709 | { "vs16", 16 }, | |
710 | { "vs17", 17 }, | |
711 | { "vs18", 18 }, | |
712 | { "vs19", 19 }, | |
713 | { "vs2", 2 }, | |
714 | { "vs20", 20 }, | |
715 | { "vs21", 21 }, | |
716 | { "vs22", 22 }, | |
717 | { "vs23", 23 }, | |
718 | { "vs24", 24 }, | |
719 | { "vs25", 25 }, | |
720 | { "vs26", 26 }, | |
721 | { "vs27", 27 }, | |
722 | { "vs28", 28 }, | |
723 | { "vs29", 29 }, | |
724 | { "vs3", 3 }, | |
725 | { "vs30", 30 }, | |
726 | { "vs31", 31 }, | |
727 | { "vs32", 32 }, | |
728 | { "vs33", 33 }, | |
729 | { "vs34", 34 }, | |
730 | { "vs35", 35 }, | |
731 | { "vs36", 36 }, | |
732 | { "vs37", 37 }, | |
733 | { "vs38", 38 }, | |
734 | { "vs39", 39 }, | |
735 | { "vs4", 4 }, | |
736 | { "vs40", 40 }, | |
737 | { "vs41", 41 }, | |
738 | { "vs42", 42 }, | |
739 | { "vs43", 43 }, | |
740 | { "vs44", 44 }, | |
741 | { "vs45", 45 }, | |
742 | { "vs46", 46 }, | |
743 | { "vs47", 47 }, | |
744 | { "vs48", 48 }, | |
745 | { "vs49", 49 }, | |
746 | { "vs5", 5 }, | |
747 | { "vs50", 50 }, | |
748 | { "vs51", 51 }, | |
749 | { "vs52", 52 }, | |
750 | { "vs53", 53 }, | |
751 | { "vs54", 54 }, | |
752 | { "vs55", 55 }, | |
753 | { "vs56", 56 }, | |
754 | { "vs57", 57 }, | |
755 | { "vs58", 58 }, | |
756 | { "vs59", 59 }, | |
757 | { "vs6", 6 }, | |
758 | { "vs60", 60 }, | |
759 | { "vs61", 61 }, | |
760 | { "vs62", 62 }, | |
761 | { "vs63", 63 }, | |
762 | { "vs7", 7 }, | |
763 | { "vs8", 8 }, | |
764 | { "vs9", 9 }, | |
765 | ||
252b5132 RH |
766 | { "xer", 1 }, |
767 | ||
768 | }; | |
769 | ||
bc805888 | 770 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
771 | |
772 | /* Given NAME, find the register number associated with that name, return | |
773 | the integer value associated with the given name or -1 on failure. */ | |
774 | ||
252b5132 | 775 | static int |
98027b10 | 776 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
777 | { |
778 | int middle, low, high; | |
779 | int cmp; | |
780 | ||
781 | low = 0; | |
782 | high = regcount - 1; | |
783 | ||
784 | do | |
785 | { | |
786 | middle = (low + high) / 2; | |
787 | cmp = strcasecmp (name, regs[middle].name); | |
788 | if (cmp < 0) | |
789 | high = middle - 1; | |
790 | else if (cmp > 0) | |
791 | low = middle + 1; | |
792 | else | |
793 | return regs[middle].value; | |
794 | } | |
795 | while (low <= high); | |
796 | ||
797 | return -1; | |
798 | } | |
799 | ||
800 | /* | |
99a814a1 | 801 | * Summary of register_name. |
252b5132 RH |
802 | * |
803 | * in: Input_line_pointer points to 1st char of operand. | |
804 | * | |
805 | * out: A expressionS. | |
806 | * The operand may have been a register: in this case, X_op == O_register, | |
807 | * X_add_number is set to the register number, and truth is returned. | |
808 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
809 | * original state. | |
810 | */ | |
811 | ||
b34976b6 | 812 | static bfd_boolean |
98027b10 | 813 | register_name (expressionS *expressionP) |
252b5132 RH |
814 | { |
815 | int reg_number; | |
816 | char *name; | |
817 | char *start; | |
818 | char c; | |
819 | ||
99a814a1 | 820 | /* Find the spelling of the operand. */ |
252b5132 | 821 | start = name = input_line_pointer; |
3882b010 | 822 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
823 | name = ++input_line_pointer; |
824 | ||
3882b010 | 825 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 826 | return FALSE; |
252b5132 RH |
827 | |
828 | c = get_symbol_end (); | |
829 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
830 | ||
468cced8 AM |
831 | /* Put back the delimiting char. */ |
832 | *input_line_pointer = c; | |
833 | ||
99a814a1 | 834 | /* Look to see if it's in the register table. */ |
81d4177b | 835 | if (reg_number >= 0) |
252b5132 RH |
836 | { |
837 | expressionP->X_op = O_register; | |
838 | expressionP->X_add_number = reg_number; | |
81d4177b | 839 | |
99a814a1 | 840 | /* Make the rest nice. */ |
252b5132 RH |
841 | expressionP->X_add_symbol = NULL; |
842 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 843 | return TRUE; |
252b5132 | 844 | } |
468cced8 AM |
845 | |
846 | /* Reset the line as if we had not done anything. */ | |
847 | input_line_pointer = start; | |
b34976b6 | 848 | return FALSE; |
252b5132 RH |
849 | } |
850 | \f | |
851 | /* This function is called for each symbol seen in an expression. It | |
852 | handles the special parsing which PowerPC assemblers are supposed | |
853 | to use for condition codes. */ | |
854 | ||
855 | /* Whether to do the special parsing. */ | |
b34976b6 | 856 | static bfd_boolean cr_operand; |
252b5132 RH |
857 | |
858 | /* Names to recognize in a condition code. This table is sorted. */ | |
859 | static const struct pd_reg cr_names[] = | |
860 | { | |
861 | { "cr0", 0 }, | |
862 | { "cr1", 1 }, | |
863 | { "cr2", 2 }, | |
864 | { "cr3", 3 }, | |
865 | { "cr4", 4 }, | |
866 | { "cr5", 5 }, | |
867 | { "cr6", 6 }, | |
868 | { "cr7", 7 }, | |
869 | { "eq", 2 }, | |
870 | { "gt", 1 }, | |
871 | { "lt", 0 }, | |
872 | { "so", 3 }, | |
873 | { "un", 3 } | |
874 | }; | |
875 | ||
876 | /* Parsing function. This returns non-zero if it recognized an | |
877 | expression. */ | |
878 | ||
879 | int | |
98027b10 | 880 | ppc_parse_name (const char *name, expressionS *expr) |
252b5132 RH |
881 | { |
882 | int val; | |
883 | ||
884 | if (! cr_operand) | |
885 | return 0; | |
886 | ||
13abbae3 AM |
887 | if (*name == '%') |
888 | ++name; | |
252b5132 RH |
889 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], |
890 | name); | |
891 | if (val < 0) | |
892 | return 0; | |
893 | ||
894 | expr->X_op = O_constant; | |
895 | expr->X_add_number = val; | |
896 | ||
897 | return 1; | |
898 | } | |
899 | \f | |
900 | /* Local variables. */ | |
901 | ||
2b3c4602 AM |
902 | /* Whether to target xcoff64/elf64. */ |
903 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 904 | |
252b5132 RH |
905 | /* Opcode hash table. */ |
906 | static struct hash_control *ppc_hash; | |
907 | ||
908 | /* Macro hash table. */ | |
909 | static struct hash_control *ppc_macro_hash; | |
910 | ||
911 | #ifdef OBJ_ELF | |
99a814a1 | 912 | /* What type of shared library support to use. */ |
5d6f4f16 | 913 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 914 | |
99a814a1 | 915 | /* Flags to set in the elf header. */ |
252b5132 RH |
916 | static flagword ppc_flags = 0; |
917 | ||
918 | /* Whether this is Solaris or not. */ | |
919 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 920 | #define SOLARIS_P TRUE |
252b5132 | 921 | #else |
b34976b6 | 922 | #define SOLARIS_P FALSE |
252b5132 RH |
923 | #endif |
924 | ||
b34976b6 | 925 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
926 | #endif |
927 | ||
928 | #ifdef OBJ_XCOFF | |
929 | ||
930 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
931 | using a bunch of different sections. These assembler sections, | |
932 | however, are all encompassed within the .text or .data sections of | |
933 | the final output file. We handle this by using different | |
934 | subsegments within these main segments. */ | |
935 | ||
936 | /* Next subsegment to allocate within the .text segment. */ | |
937 | static subsegT ppc_text_subsegment = 2; | |
938 | ||
939 | /* Linked list of csects in the text section. */ | |
940 | static symbolS *ppc_text_csects; | |
941 | ||
942 | /* Next subsegment to allocate within the .data segment. */ | |
943 | static subsegT ppc_data_subsegment = 2; | |
944 | ||
945 | /* Linked list of csects in the data section. */ | |
946 | static symbolS *ppc_data_csects; | |
947 | ||
948 | /* The current csect. */ | |
949 | static symbolS *ppc_current_csect; | |
950 | ||
951 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
952 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
953 | A special relocation is used when accessing TOC entries. We handle | |
954 | the TOC as a subsegment within the .data segment. We set it up if | |
955 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
956 | static symbolS *ppc_toc_csect; | |
957 | ||
958 | /* The first frag in the TOC subsegment. */ | |
959 | static fragS *ppc_toc_frag; | |
960 | ||
961 | /* The first frag in the first subsegment after the TOC in the .data | |
962 | segment. NULL if there are no subsegments after the TOC. */ | |
963 | static fragS *ppc_after_toc_frag; | |
964 | ||
965 | /* The current static block. */ | |
966 | static symbolS *ppc_current_block; | |
967 | ||
968 | /* The COFF debugging section; set by md_begin. This is not the | |
969 | .debug section, but is instead the secret BFD section which will | |
970 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
971 | static asection *ppc_coff_debug_section; | |
972 | ||
973 | #endif /* OBJ_XCOFF */ | |
974 | ||
975 | #ifdef TE_PE | |
976 | ||
977 | /* Various sections that we need for PE coff support. */ | |
978 | static segT ydata_section; | |
979 | static segT pdata_section; | |
980 | static segT reldata_section; | |
981 | static segT rdata_section; | |
982 | static segT tocdata_section; | |
983 | ||
81d4177b | 984 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
985 | static segT ppc_previous_section; |
986 | static segT ppc_current_section; | |
987 | ||
988 | #endif /* TE_PE */ | |
989 | ||
990 | #ifdef OBJ_ELF | |
991 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
992 | #define PPC_APUINFO_ISEL 0x40 |
993 | #define PPC_APUINFO_PMR 0x41 | |
994 | #define PPC_APUINFO_RFMCI 0x42 | |
995 | #define PPC_APUINFO_CACHELCK 0x43 | |
996 | #define PPC_APUINFO_SPE 0x100 | |
997 | #define PPC_APUINFO_EFS 0x101 | |
998 | #define PPC_APUINFO_BRLOCK 0x102 | |
999 | ||
b34976b6 AM |
1000 | /* |
1001 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
1002 | */ |
1003 | unsigned long *ppc_apuinfo_list; | |
1004 | unsigned int ppc_apuinfo_num; | |
1005 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1006 | #endif /* OBJ_ELF */ |
1007 | \f | |
1008 | #ifdef OBJ_ELF | |
15c1449b | 1009 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1010 | #else |
15c1449b | 1011 | const char *const md_shortopts = "um:"; |
252b5132 | 1012 | #endif |
15c1449b | 1013 | const struct option md_longopts[] = { |
252b5132 RH |
1014 | {NULL, no_argument, NULL, 0} |
1015 | }; | |
15c1449b | 1016 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 | 1017 | |
69c040df AM |
1018 | |
1019 | /* Handle -m options that set cpu type, and .machine arg. */ | |
1020 | ||
1021 | static int | |
1022 | parse_cpu (const char *arg) | |
1023 | { | |
9b4e5766 PB |
1024 | ppc_cpu_t retain_flags = |
1025 | ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SPE); | |
b0e34bfe | 1026 | |
69c040df AM |
1027 | /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2 |
1028 | (RIOS2). */ | |
1029 | if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0) | |
1030 | ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32; | |
1031 | /* -mpwr means to assemble for the IBM POWER (RIOS1). */ | |
1032 | else if (strcmp (arg, "pwr") == 0) | |
1033 | ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32; | |
1034 | /* -m601 means to assemble for the PowerPC 601, which includes | |
1035 | instructions that are holdovers from the Power. */ | |
1036 | else if (strcmp (arg, "601") == 0) | |
1037 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1038 | | PPC_OPCODE_601 | PPC_OPCODE_32); | |
1039 | /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the | |
1040 | PowerPC 603/604. */ | |
1041 | else if (strcmp (arg, "ppc") == 0 | |
1042 | || strcmp (arg, "ppc32") == 0 | |
1043 | || strcmp (arg, "603") == 0 | |
1044 | || strcmp (arg, "604") == 0) | |
1045 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; | |
c3d65c1c BE |
1046 | /* Do all PPC750s have paired single ops? */ |
1047 | else if (strcmp (arg, "750cl") == 0) | |
1048 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS; | |
081ba1b3 | 1049 | else if (strcmp (arg, "403") == 0) |
69c040df AM |
1050 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC |
1051 | | PPC_OPCODE_403 | PPC_OPCODE_32); | |
081ba1b3 AM |
1052 | else if (strcmp (arg, "405") == 0) |
1053 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1054 | | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32); | |
c8187e15 PB |
1055 | else if (strcmp (arg, "440") == 0 |
1056 | || strcmp (arg, "464") == 0) | |
69c040df AM |
1057 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32 |
1058 | | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI); | |
1059 | else if (strcmp (arg, "7400") == 0 | |
1060 | || strcmp (arg, "7410") == 0 | |
1061 | || strcmp (arg, "7450") == 0 | |
1062 | || strcmp (arg, "7455") == 0) | |
1063 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1064 | | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32); | |
36ae0db3 DJ |
1065 | else if (strcmp (arg, "e300") == 0) |
1066 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32 | |
1067 | | PPC_OPCODE_E300); | |
69c040df AM |
1068 | else if (strcmp (arg, "altivec") == 0) |
1069 | { | |
1070 | if (ppc_cpu == 0) | |
b0e34bfe NC |
1071 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC; |
1072 | ||
9b4e5766 PB |
1073 | retain_flags |= PPC_OPCODE_ALTIVEC; |
1074 | } | |
1075 | else if (strcmp (arg, "vsx") == 0) | |
1076 | { | |
1077 | if (ppc_cpu == 0) | |
1078 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC; | |
1079 | ||
1080 | retain_flags |= PPC_OPCODE_VSX; | |
69c040df AM |
1081 | } |
1082 | else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0) | |
1083 | { | |
1084 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE | |
1085 | | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK | |
1086 | | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | |
19a6653c AM |
1087 | | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC); |
1088 | } | |
1089 | else if (strcmp (arg, "e500mc") == 0) | |
1090 | { | |
1091 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL | |
1092 | | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | |
1093 | | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC); | |
69c040df AM |
1094 | } |
1095 | else if (strcmp (arg, "spe") == 0) | |
1096 | { | |
1097 | if (ppc_cpu == 0) | |
b0e34bfe NC |
1098 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS; |
1099 | ||
9b4e5766 | 1100 | retain_flags |= PPC_OPCODE_SPE; |
69c040df AM |
1101 | } |
1102 | /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC | |
1103 | 620. */ | |
1104 | else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0) | |
1105 | { | |
1106 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64; | |
1107 | } | |
1108 | else if (strcmp (arg, "ppc64bridge") == 0) | |
1109 | { | |
1110 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1111 | | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64); | |
1112 | } | |
1113 | /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */ | |
1114 | else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0) | |
1115 | { | |
1116 | ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32; | |
1117 | } | |
69c040df AM |
1118 | else if (strcmp (arg, "power4") == 0) |
1119 | { | |
1120 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1121 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4); | |
1122 | } | |
b0648eec AM |
1123 | else if (strcmp (arg, "power5") == 0) |
1124 | { | |
1125 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1126 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | |
1127 | | PPC_OPCODE_POWER5); | |
1128 | } | |
9622b051 AM |
1129 | else if (strcmp (arg, "power6") == 0) |
1130 | { | |
1131 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1132 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | |
38233209 PB |
1133 | | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 |
1134 | | PPC_OPCODE_ALTIVEC); | |
9622b051 | 1135 | } |
9b4e5766 PB |
1136 | else if (strcmp (arg, "power7") == 0) |
1137 | { | |
1138 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
066be9f7 PB |
1139 | | PPC_OPCODE_ISEL | PPC_OPCODE_64 |
1140 | | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | |
1141 | | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | |
9b4e5766 PB |
1142 | | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX); |
1143 | } | |
ede602d7 AM |
1144 | else if (strcmp (arg, "cell") == 0) |
1145 | { | |
1146 | ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | |
1147 | | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | |
38233209 | 1148 | | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC); |
ede602d7 | 1149 | } |
69c040df AM |
1150 | /* -mcom means assemble for the common intersection between Power |
1151 | and PowerPC. At present, we just allow the union, rather | |
1152 | than the intersection. */ | |
1153 | else if (strcmp (arg, "com") == 0) | |
1154 | ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32; | |
1155 | /* -many means to assemble for any architecture (PWR/PWRX/PPC). */ | |
1156 | else if (strcmp (arg, "any") == 0) | |
1157 | ppc_cpu |= PPC_OPCODE_ANY; | |
1158 | else | |
1159 | return 0; | |
1160 | ||
9b4e5766 PB |
1161 | /* Make sure the the Altivec, VSX and SPE bits are not lost. */ |
1162 | ppc_cpu |= retain_flags; | |
69c040df AM |
1163 | return 1; |
1164 | } | |
1165 | ||
252b5132 | 1166 | int |
98027b10 | 1167 | md_parse_option (int c, char *arg) |
252b5132 RH |
1168 | { |
1169 | switch (c) | |
1170 | { | |
1171 | case 'u': | |
1172 | /* -u means that any undefined symbols should be treated as | |
1173 | external, which is the default for gas anyhow. */ | |
1174 | break; | |
1175 | ||
1176 | #ifdef OBJ_ELF | |
1177 | case 'l': | |
1178 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1179 | sake, recognize -be also. */ |
252b5132 RH |
1180 | if (strcmp (arg, "e") == 0) |
1181 | { | |
1182 | target_big_endian = 0; | |
1183 | set_target_endian = 1; | |
1184 | } | |
1185 | else | |
1186 | return 0; | |
1187 | ||
1188 | break; | |
1189 | ||
1190 | case 'b': | |
1191 | if (strcmp (arg, "e") == 0) | |
1192 | { | |
1193 | target_big_endian = 1; | |
1194 | set_target_endian = 1; | |
1195 | } | |
1196 | else | |
1197 | return 0; | |
1198 | ||
1199 | break; | |
1200 | ||
1201 | case 'K': | |
99a814a1 | 1202 | /* Recognize -K PIC. */ |
252b5132 RH |
1203 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1204 | { | |
1205 | shlib = SHLIB_PIC; | |
1206 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1207 | } | |
1208 | else | |
1209 | return 0; | |
1210 | ||
1211 | break; | |
1212 | #endif | |
1213 | ||
7f6d05e8 CP |
1214 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1215 | case 'a': | |
1216 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1217 | { |
1218 | #ifdef BFD64 | |
1219 | ppc_obj64 = 1; | |
1220 | #else | |
1221 | as_fatal (_("%s unsupported"), "-a64"); | |
1222 | #endif | |
1223 | } | |
7f6d05e8 | 1224 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1225 | ppc_obj64 = 0; |
7f6d05e8 CP |
1226 | else |
1227 | return 0; | |
1228 | break; | |
81d4177b | 1229 | |
252b5132 | 1230 | case 'm': |
69c040df AM |
1231 | if (parse_cpu (arg)) |
1232 | ; | |
252b5132 RH |
1233 | |
1234 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1235 | reg_names_p = TRUE; |
252b5132 RH |
1236 | |
1237 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1238 | reg_names_p = FALSE; |
252b5132 RH |
1239 | |
1240 | #ifdef OBJ_ELF | |
99a814a1 AM |
1241 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1242 | that require relocation. */ | |
252b5132 RH |
1243 | else if (strcmp (arg, "relocatable") == 0) |
1244 | { | |
5d6f4f16 | 1245 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1246 | ppc_flags |= EF_PPC_RELOCATABLE; |
1247 | } | |
1248 | ||
1249 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1250 | { | |
5d6f4f16 | 1251 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1252 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1253 | } | |
1254 | ||
99a814a1 | 1255 | /* -memb, set embedded bit. */ |
252b5132 RH |
1256 | else if (strcmp (arg, "emb") == 0) |
1257 | ppc_flags |= EF_PPC_EMB; | |
1258 | ||
99a814a1 AM |
1259 | /* -mlittle/-mbig set the endianess. */ |
1260 | else if (strcmp (arg, "little") == 0 | |
1261 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1262 | { |
1263 | target_big_endian = 0; | |
1264 | set_target_endian = 1; | |
1265 | } | |
1266 | ||
1267 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1268 | { | |
1269 | target_big_endian = 1; | |
1270 | set_target_endian = 1; | |
1271 | } | |
1272 | ||
1273 | else if (strcmp (arg, "solaris") == 0) | |
1274 | { | |
b34976b6 | 1275 | msolaris = TRUE; |
252b5132 RH |
1276 | ppc_comment_chars = ppc_solaris_comment_chars; |
1277 | } | |
1278 | ||
1279 | else if (strcmp (arg, "no-solaris") == 0) | |
1280 | { | |
b34976b6 | 1281 | msolaris = FALSE; |
252b5132 RH |
1282 | ppc_comment_chars = ppc_eabi_comment_chars; |
1283 | } | |
1284 | #endif | |
1285 | else | |
1286 | { | |
1287 | as_bad (_("invalid switch -m%s"), arg); | |
1288 | return 0; | |
1289 | } | |
1290 | break; | |
1291 | ||
1292 | #ifdef OBJ_ELF | |
1293 | /* -V: SVR4 argument to print version ID. */ | |
1294 | case 'V': | |
1295 | print_version_id (); | |
1296 | break; | |
1297 | ||
1298 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1299 | should be emitted or not. FIXME: Not implemented. */ | |
1300 | case 'Q': | |
1301 | break; | |
1302 | ||
1303 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1304 | rather than .stabs.excl, which is ignored by the linker. | |
1305 | FIXME: Not implemented. */ | |
1306 | case 's': | |
1307 | if (arg) | |
1308 | return 0; | |
1309 | ||
1310 | break; | |
1311 | #endif | |
1312 | ||
1313 | default: | |
1314 | return 0; | |
1315 | } | |
1316 | ||
1317 | return 1; | |
1318 | } | |
1319 | ||
1320 | void | |
98027b10 | 1321 | md_show_usage (FILE *stream) |
252b5132 | 1322 | { |
bc805888 | 1323 | fprintf (stream, _("\ |
252b5132 | 1324 | PowerPC options:\n\ |
df12615d AM |
1325 | -a32 generate ELF32/XCOFF32\n\ |
1326 | -a64 generate ELF64/XCOFF64\n\ | |
252b5132 | 1327 | -u ignored\n\ |
23e1d84c AM |
1328 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ |
1329 | -mpwr generate code for POWER (RIOS1)\n\ | |
1330 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1331 | -mppc, -mppc32, -m603, -m604\n\ |
23e1d84c | 1332 | generate code for PowerPC 603/604\n\ |
081ba1b3 AM |
1333 | -m403 generate code for PowerPC 403\n\ |
1334 | -m405 generate code for PowerPC 405\n\ | |
3d8aea2f | 1335 | -m440 generate code for PowerPC 440\n\ |
c8187e15 | 1336 | -m464 generate code for PowerPC 464\n\ |
f5c120c5 | 1337 | -m7400, -m7410, -m7450, -m7455\n\ |
c3d65c1c BE |
1338 | generate code for PowerPC 7400/7410/7450/7455\n\ |
1339 | -m750cl generate code for PowerPC 750cl\n")); | |
df12615d | 1340 | fprintf (stream, _("\ |
23e1d84c | 1341 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
d0e9a01c | 1342 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ |
2f3bb96a | 1343 | -mbooke generate code for 32-bit PowerPC BookE\n\ |
23e1d84c | 1344 | -mpower4 generate code for Power4 architecture\n\ |
b0648eec | 1345 | -mpower5 generate code for Power5 architecture\n\ |
9622b051 | 1346 | -mpower6 generate code for Power6 architecture\n\ |
9b4e5766 | 1347 | -mpower7 generate code for Power7 architecture\n\ |
ede602d7 | 1348 | -mcell generate code for Cell Broadband Engine architecture\n\ |
252b5132 | 1349 | -mcom generate code Power/PowerPC common instructions\n\ |
df12615d | 1350 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); |
6a0c61b7 | 1351 | fprintf (stream, _("\ |
df12615d | 1352 | -maltivec generate code for AltiVec\n\ |
9b4e5766 | 1353 | -mvsx generate code for Vector-Scalar (VSX) instructions\n\ |
36ae0db3 | 1354 | -me300 generate code for PowerPC e300 family\n\ |
6a0c61b7 | 1355 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ |
19a6653c | 1356 | -me500mc, generate code for Freescale e500mc core complex\n\ |
df12615d AM |
1357 | -mspe generate code for Motorola SPE instructions\n\ |
1358 | -mregnames Allow symbolic names for registers\n\ | |
1359 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1360 | #ifdef OBJ_ELF |
bc805888 | 1361 | fprintf (stream, _("\ |
252b5132 RH |
1362 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1363 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1364 | -memb set PPC_EMB bit in ELF flags\n\ | |
df12615d | 1365 | -mlittle, -mlittle-endian, -l, -le\n\ |
252b5132 | 1366 | generate code for a little endian machine\n\ |
df12615d AM |
1367 | -mbig, -mbig-endian, -b, -be\n\ |
1368 | generate code for a big endian machine\n\ | |
252b5132 RH |
1369 | -msolaris generate code for Solaris\n\ |
1370 | -mno-solaris do not generate code for Solaris\n\ | |
1371 | -V print assembler version number\n\ | |
1372 | -Qy, -Qn ignored\n")); | |
1373 | #endif | |
1374 | } | |
1375 | \f | |
1376 | /* Set ppc_cpu if it is not already set. */ | |
1377 | ||
1378 | static void | |
98027b10 | 1379 | ppc_set_cpu (void) |
252b5132 RH |
1380 | { |
1381 | const char *default_os = TARGET_OS; | |
1382 | const char *default_cpu = TARGET_CPU; | |
1383 | ||
3c9030c1 | 1384 | if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0) |
252b5132 | 1385 | { |
2a98c3a6 | 1386 | if (ppc_obj64) |
3c9030c1 | 1387 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64; |
2a98c3a6 AM |
1388 | else if (strncmp (default_os, "aix", 3) == 0 |
1389 | && default_os[3] >= '4' && default_os[3] <= '9') | |
3c9030c1 | 1390 | ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32; |
252b5132 | 1391 | else if (strncmp (default_os, "aix3", 4) == 0) |
3c9030c1 | 1392 | ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32; |
252b5132 | 1393 | else if (strcmp (default_cpu, "rs6000") == 0) |
3c9030c1 | 1394 | ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32; |
0baf16f2 | 1395 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
23d36e92 | 1396 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; |
252b5132 | 1397 | else |
99a814a1 AM |
1398 | as_fatal (_("Unknown default cpu = %s, os = %s"), |
1399 | default_cpu, default_os); | |
252b5132 RH |
1400 | } |
1401 | } | |
1402 | ||
9232bbb0 AM |
1403 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1404 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1405 | |
1406 | enum bfd_architecture | |
98027b10 | 1407 | ppc_arch (void) |
252b5132 RH |
1408 | { |
1409 | const char *default_cpu = TARGET_CPU; | |
1410 | ppc_set_cpu (); | |
1411 | ||
1412 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1413 | return bfd_arch_powerpc; | |
1414 | else if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
1415 | return bfd_arch_rs6000; | |
1416 | else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) | |
1417 | { | |
1418 | if (strcmp (default_cpu, "rs6000") == 0) | |
1419 | return bfd_arch_rs6000; | |
0baf16f2 | 1420 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1421 | return bfd_arch_powerpc; |
1422 | } | |
1423 | ||
1424 | as_fatal (_("Neither Power nor PowerPC opcodes were selected.")); | |
1425 | return bfd_arch_unknown; | |
1426 | } | |
1427 | ||
7f6d05e8 | 1428 | unsigned long |
98027b10 | 1429 | ppc_mach (void) |
7f6d05e8 | 1430 | { |
2a98c3a6 AM |
1431 | if (ppc_obj64) |
1432 | return bfd_mach_ppc64; | |
1433 | else if (ppc_arch () == bfd_arch_rs6000) | |
1434 | return bfd_mach_rs6k; | |
1435 | else | |
1436 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1437 | } |
1438 | ||
81d4177b | 1439 | extern char* |
98027b10 | 1440 | ppc_target_format (void) |
7f6d05e8 CP |
1441 | { |
1442 | #ifdef OBJ_COFF | |
1443 | #ifdef TE_PE | |
99a814a1 | 1444 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1445 | #elif TE_POWERMAC |
0baf16f2 | 1446 | return "xcoff-powermac"; |
7f6d05e8 | 1447 | #else |
eb1e0e80 | 1448 | # ifdef TE_AIX5 |
2b3c4602 | 1449 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1450 | # else |
2b3c4602 | 1451 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1452 | # endif |
7f6d05e8 | 1453 | #endif |
7f6d05e8 CP |
1454 | #endif |
1455 | #ifdef OBJ_ELF | |
9d8504b1 PB |
1456 | # ifdef TE_VXWORKS |
1457 | return "elf32-powerpc-vxworks"; | |
1458 | # else | |
0baf16f2 | 1459 | return (target_big_endian |
2b3c4602 AM |
1460 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1461 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1462 | # endif |
7f6d05e8 CP |
1463 | #endif |
1464 | } | |
1465 | ||
69c040df AM |
1466 | /* Insert opcodes and macros into hash tables. Called at startup and |
1467 | for .cpu pseudo. */ | |
252b5132 | 1468 | |
69c040df AM |
1469 | static void |
1470 | ppc_setup_opcodes (void) | |
252b5132 | 1471 | { |
98027b10 | 1472 | const struct powerpc_opcode *op; |
252b5132 RH |
1473 | const struct powerpc_opcode *op_end; |
1474 | const struct powerpc_macro *macro; | |
1475 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1476 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1477 | |
69c040df AM |
1478 | if (ppc_hash != NULL) |
1479 | hash_die (ppc_hash); | |
1480 | if (ppc_macro_hash != NULL) | |
1481 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1482 | |
1483 | /* Insert the opcodes into a hash table. */ | |
1484 | ppc_hash = hash_new (); | |
1485 | ||
c43a438d | 1486 | if (ENABLE_CHECKING) |
b84bf58a | 1487 | { |
c43a438d | 1488 | unsigned int i; |
b84bf58a | 1489 | |
c43a438d AM |
1490 | /* Check operand masks. Code here and in the disassembler assumes |
1491 | all the 1's in the mask are contiguous. */ | |
1492 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1493 | { |
c43a438d AM |
1494 | unsigned long mask = powerpc_operands[i].bitm; |
1495 | unsigned long right_bit; | |
1496 | unsigned int j; | |
1497 | ||
1498 | right_bit = mask & -mask; | |
1499 | mask += right_bit; | |
1500 | right_bit = mask & -mask; | |
1501 | if (mask != right_bit) | |
1502 | { | |
1503 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1504 | bad_insn = TRUE; | |
1505 | } | |
1506 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1507 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1508 | sizeof (powerpc_operands[0])) == 0) | |
1509 | { | |
1510 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1511 | j, i); | |
1512 | bad_insn = TRUE; | |
1513 | } | |
b84bf58a AM |
1514 | } |
1515 | } | |
1516 | ||
252b5132 RH |
1517 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1518 | for (op = powerpc_opcodes; op < op_end; op++) | |
1519 | { | |
c43a438d | 1520 | if (ENABLE_CHECKING) |
b84bf58a | 1521 | { |
c43a438d AM |
1522 | const unsigned char *o; |
1523 | unsigned long omask = op->mask; | |
8dbcd839 | 1524 | |
d815f1a9 | 1525 | if (op != powerpc_opcodes) |
8dbcd839 | 1526 | { |
d815f1a9 AM |
1527 | /* The major opcodes had better be sorted. Code in the |
1528 | disassembler assumes the insns are sorted according to | |
1529 | major opcode. */ | |
1530 | if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode)) | |
1531 | { | |
1532 | as_bad (_("major opcode is not sorted for %s"), | |
1533 | op->name); | |
1534 | bad_insn = TRUE; | |
1535 | } | |
1536 | ||
1537 | /* Warn if the table isn't more strictly ordered. | |
1538 | Unfortunately it doesn't seem possible to order the | |
1539 | table on much more than the major opcode, which makes | |
1540 | it difficult to implement a binary search in the | |
1541 | disassembler. The problem is that we have multiple | |
1542 | ways to disassemble instructions, and we usually want | |
1543 | to choose a more specific form (with more bits set in | |
1544 | the opcode) than a more general form. eg. all of the | |
1545 | following are equivalent: | |
1546 | bne label # opcode = 0x40820000, mask = 0xff830003 | |
1547 | bf 2,label # opcode = 0x40800000, mask = 0xff800003 | |
1548 | bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003 | |
1549 | ||
1550 | There are also cases where the table needs to be out | |
1551 | of order to disassemble the correct instruction for | |
2f3bb96a | 1552 | processor variants. */ |
d815f1a9 AM |
1553 | else if (0) |
1554 | { | |
1555 | unsigned long t1 = op[0].opcode; | |
1556 | unsigned long t2 = op[-1].opcode; | |
1557 | ||
1558 | if (((t1 ^ t2) & 0xfc0007ff) == 0 | |
1559 | && (t1 & 0xfc0006df) == 0x7c000286) | |
1560 | { | |
1561 | /* spr field is split. */ | |
1562 | t1 = ((t1 & ~0x1ff800) | |
1563 | | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5)); | |
1564 | t2 = ((t2 & ~0x1ff800) | |
1565 | | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5)); | |
1566 | } | |
1567 | if (t1 < t2) | |
1568 | as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"), | |
1569 | op[0].name, op[0].opcode, op[0].mask, | |
1570 | op[-1].name, op[-1].opcode, op[-1].mask); | |
1571 | } | |
8dbcd839 | 1572 | } |
c43a438d AM |
1573 | |
1574 | /* The mask had better not trim off opcode bits. */ | |
1575 | if ((op->opcode & omask) != op->opcode) | |
1576 | { | |
1577 | as_bad (_("mask trims opcode bits for %s"), | |
1578 | op->name); | |
1579 | bad_insn = TRUE; | |
1580 | } | |
1581 | ||
1582 | /* The operands must not overlap the opcode or each other. */ | |
1583 | for (o = op->operands; *o; ++o) | |
1584 | if (*o >= num_powerpc_operands) | |
1585 | { | |
1586 | as_bad (_("operand index error for %s"), | |
1587 | op->name); | |
1588 | bad_insn = TRUE; | |
1589 | } | |
1590 | else | |
b84bf58a | 1591 | { |
c43a438d AM |
1592 | const struct powerpc_operand *operand = &powerpc_operands[*o]; |
1593 | if (operand->shift >= 0) | |
b84bf58a | 1594 | { |
c43a438d AM |
1595 | unsigned long mask = operand->bitm << operand->shift; |
1596 | if (omask & mask) | |
1597 | { | |
1598 | as_bad (_("operand %d overlap in %s"), | |
1599 | (int) (o - op->operands), op->name); | |
1600 | bad_insn = TRUE; | |
1601 | } | |
1602 | omask |= mask; | |
b84bf58a | 1603 | } |
b84bf58a | 1604 | } |
c43a438d | 1605 | } |
252b5132 | 1606 | |
2b3c4602 | 1607 | if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0 |
252b5132 | 1608 | && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0 |
2b3c4602 AM |
1609 | || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) |
1610 | == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64))) | |
23e1d84c | 1611 | || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0) |
1cb0a767 | 1612 | && !(ppc_cpu & op->deprecated)) |
252b5132 RH |
1613 | { |
1614 | const char *retval; | |
1615 | ||
98027b10 | 1616 | retval = hash_insert (ppc_hash, op->name, (void *) op); |
69c040df | 1617 | if (retval != NULL) |
252b5132 | 1618 | { |
99a814a1 | 1619 | /* Ignore Power duplicates for -m601. */ |
252b5132 RH |
1620 | if ((ppc_cpu & PPC_OPCODE_601) != 0 |
1621 | && (op->flags & PPC_OPCODE_POWER) != 0) | |
1622 | continue; | |
1623 | ||
b84bf58a | 1624 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1625 | op->name); |
b84bf58a | 1626 | bad_insn = TRUE; |
252b5132 RH |
1627 | } |
1628 | } | |
1629 | } | |
1630 | ||
3c9030c1 AM |
1631 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1632 | for (op = powerpc_opcodes; op < op_end; op++) | |
98027b10 | 1633 | hash_insert (ppc_hash, op->name, (void *) op); |
3c9030c1 | 1634 | |
252b5132 RH |
1635 | /* Insert the macros into a hash table. */ |
1636 | ppc_macro_hash = hash_new (); | |
1637 | ||
1638 | macro_end = powerpc_macros + powerpc_num_macros; | |
1639 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1640 | { | |
1641 | if ((macro->flags & ppc_cpu) != 0) | |
1642 | { | |
1643 | const char *retval; | |
1644 | ||
98027b10 | 1645 | retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); |
252b5132 RH |
1646 | if (retval != (const char *) NULL) |
1647 | { | |
b84bf58a AM |
1648 | as_bad (_("duplicate macro %s"), macro->name); |
1649 | bad_insn = TRUE; | |
252b5132 RH |
1650 | } |
1651 | } | |
1652 | } | |
1653 | ||
b84bf58a | 1654 | if (bad_insn) |
252b5132 | 1655 | abort (); |
69c040df AM |
1656 | } |
1657 | ||
1658 | /* This function is called when the assembler starts up. It is called | |
1659 | after the options have been parsed and the output file has been | |
1660 | opened. */ | |
1661 | ||
1662 | void | |
98027b10 | 1663 | md_begin (void) |
69c040df AM |
1664 | { |
1665 | ppc_set_cpu (); | |
1666 | ||
1667 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
1668 | ||
1669 | #ifdef OBJ_ELF | |
1670 | /* Set the ELF flags if desired. */ | |
1671 | if (ppc_flags && !msolaris) | |
1672 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1673 | #endif | |
1674 | ||
1675 | ppc_setup_opcodes (); | |
252b5132 | 1676 | |
67c1ffbe | 1677 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1678 | by the user. */ |
252b5132 RH |
1679 | if (!set_target_endian) |
1680 | { | |
1681 | set_target_endian = 1; | |
1682 | target_big_endian = PPC_BIG_ENDIAN; | |
1683 | } | |
1684 | ||
1685 | #ifdef OBJ_XCOFF | |
1686 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1687 | ||
1688 | /* Create dummy symbols to serve as initial csects. This forces the | |
1689 | text csects to precede the data csects. These symbols will not | |
1690 | be output. */ | |
1691 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1692 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1693 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1694 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1695 | #endif |
1696 | ||
1697 | #ifdef TE_PE | |
1698 | ||
1699 | ppc_current_section = text_section; | |
81d4177b | 1700 | ppc_previous_section = 0; |
252b5132 RH |
1701 | |
1702 | #endif | |
1703 | } | |
1704 | ||
6a0c61b7 | 1705 | void |
98027b10 | 1706 | ppc_cleanup (void) |
6a0c61b7 | 1707 | { |
dc1d03fc | 1708 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1709 | if (ppc_apuinfo_list == NULL) |
1710 | return; | |
1711 | ||
1712 | /* Ok, so write the section info out. We have this layout: | |
1713 | ||
1714 | byte data what | |
1715 | ---- ---- ---- | |
1716 | 0 8 length of "APUinfo\0" | |
1717 | 4 (n*4) number of APU's (4 bytes each) | |
1718 | 8 2 note type 2 | |
1719 | 12 "APUinfo\0" name | |
1720 | 20 APU#1 first APU's info | |
1721 | 24 APU#2 second APU's info | |
1722 | ... ... | |
1723 | */ | |
1724 | { | |
1725 | char *p; | |
1726 | asection *seg = now_seg; | |
1727 | subsegT subseg = now_subseg; | |
1728 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1729 | unsigned int i; |
6a0c61b7 EZ |
1730 | |
1731 | /* Create the .PPC.EMB.apuinfo section. */ | |
1732 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1733 | bfd_set_section_flags (stdoutput, | |
1734 | apuinfo_secp, | |
e1a9cb8e | 1735 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1736 | |
1737 | p = frag_more (4); | |
1738 | md_number_to_chars (p, (valueT) 8, 4); | |
1739 | ||
1740 | p = frag_more (4); | |
e98d298c | 1741 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1742 | |
1743 | p = frag_more (4); | |
1744 | md_number_to_chars (p, (valueT) 2, 4); | |
1745 | ||
1746 | p = frag_more (8); | |
1747 | strcpy (p, "APUinfo"); | |
1748 | ||
1749 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1750 | { | |
b34976b6 AM |
1751 | p = frag_more (4); |
1752 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1753 | } |
1754 | ||
1755 | frag_align (2, 0, 0); | |
1756 | ||
1757 | /* We probably can't restore the current segment, for there likely | |
1758 | isn't one yet... */ | |
1759 | if (seg && subseg) | |
1760 | subseg_set (seg, subseg); | |
1761 | } | |
dc1d03fc | 1762 | #endif |
6a0c61b7 EZ |
1763 | } |
1764 | ||
252b5132 RH |
1765 | /* Insert an operand value into an instruction. */ |
1766 | ||
1767 | static unsigned long | |
a1867a27 AM |
1768 | ppc_insert_operand (unsigned long insn, |
1769 | const struct powerpc_operand *operand, | |
1770 | offsetT val, | |
fa452fa6 | 1771 | ppc_cpu_t ppc_cpu, |
a1867a27 AM |
1772 | char *file, |
1773 | unsigned int line) | |
252b5132 | 1774 | { |
b84bf58a | 1775 | long min, max, right; |
eb42fac1 | 1776 | |
b84bf58a AM |
1777 | max = operand->bitm; |
1778 | right = max & -max; | |
1779 | min = 0; | |
1780 | ||
1781 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1782 | { |
b84bf58a | 1783 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1784 | max = (max >> 1) & -right; |
1785 | min = ~max & -right; | |
b84bf58a | 1786 | } |
252b5132 | 1787 | |
b84bf58a | 1788 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1789 | max++; |
252b5132 | 1790 | |
b84bf58a | 1791 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 AM |
1792 | { |
1793 | long tmp = min; | |
1794 | min = -max; | |
1795 | max = -tmp; | |
1796 | } | |
b84bf58a | 1797 | |
a1867a27 AM |
1798 | if (min <= max) |
1799 | { | |
1800 | /* Some people write constants with the sign extension done by | |
1801 | hand but only up to 32 bits. This shouldn't really be valid, | |
1802 | but, to permit this code to assemble on a 64-bit host, we | |
1803 | sign extend the 32-bit value to 64 bits if so doing makes the | |
1804 | value valid. */ | |
1805 | if (val > max | |
1806 | && (offsetT) (val - 0x80000000 - 0x80000000) >= min | |
1807 | && (offsetT) (val - 0x80000000 - 0x80000000) <= max | |
1808 | && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) | |
1809 | val = val - 0x80000000 - 0x80000000; | |
1810 | ||
1811 | /* Similarly, people write expressions like ~(1<<15), and expect | |
1812 | this to be OK for a 32-bit unsigned value. */ | |
1813 | else if (val < min | |
1814 | && (offsetT) (val + 0x80000000 + 0x80000000) >= min | |
1815 | && (offsetT) (val + 0x80000000 + 0x80000000) <= max | |
1816 | && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) | |
1817 | val = val + 0x80000000 + 0x80000000; | |
1818 | ||
1819 | else if (val < min | |
1820 | || val > max | |
1821 | || (val & (right - 1)) != 0) | |
1822 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
1823 | } | |
b84bf58a | 1824 | |
252b5132 RH |
1825 | if (operand->insert) |
1826 | { | |
1827 | const char *errmsg; | |
1828 | ||
1829 | errmsg = NULL; | |
2b3c4602 | 1830 | insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg); |
252b5132 | 1831 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 1832 | as_bad_where (file, line, "%s", errmsg); |
252b5132 RH |
1833 | } |
1834 | else | |
b84bf58a | 1835 | insn |= ((long) val & operand->bitm) << operand->shift; |
252b5132 RH |
1836 | |
1837 | return insn; | |
1838 | } | |
1839 | ||
1840 | \f | |
1841 | #ifdef OBJ_ELF | |
1842 | /* Parse @got, etc. and return the desired relocation. */ | |
1843 | static bfd_reloc_code_real_type | |
98027b10 | 1844 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
1845 | { |
1846 | struct map_bfd { | |
1847 | char *string; | |
b7d7dc63 AM |
1848 | unsigned int length : 8; |
1849 | unsigned int valid32 : 1; | |
1850 | unsigned int valid64 : 1; | |
1851 | unsigned int reloc; | |
252b5132 RH |
1852 | }; |
1853 | ||
1854 | char ident[20]; | |
1855 | char *str = *str_p; | |
1856 | char *str2; | |
1857 | int ch; | |
1858 | int len; | |
15c1449b | 1859 | const struct map_bfd *ptr; |
252b5132 | 1860 | |
b7d7dc63 AM |
1861 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1862 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1863 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1864 | |
15c1449b | 1865 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1866 | MAP ("l", BFD_RELOC_LO16), |
1867 | MAP ("h", BFD_RELOC_HI16), | |
1868 | MAP ("ha", BFD_RELOC_HI16_S), | |
1869 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1870 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1871 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1872 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1873 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1874 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1875 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1876 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1877 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1878 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1879 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1880 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1881 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1882 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1883 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1884 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1885 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1886 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1887 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1888 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1889 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1890 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1891 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1892 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1893 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1894 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1895 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1896 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1897 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1898 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1899 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1900 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1901 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1902 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1903 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1904 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1905 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1906 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1907 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1908 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1909 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1910 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1911 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1912 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1913 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1914 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1915 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1916 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
1917 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), | |
1918 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1919 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1920 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1921 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1922 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1923 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1924 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1925 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
1926 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), | |
1927 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1928 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1929 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1930 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1931 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1932 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1933 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
1934 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), | |
1935 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1936 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1937 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1938 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1939 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1940 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1941 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1942 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
1943 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), | |
1944 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1945 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1946 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
1947 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), | |
1948 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1949 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1950 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
1951 | { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } | |
252b5132 RH |
1952 | }; |
1953 | ||
1954 | if (*str++ != '@') | |
1955 | return BFD_RELOC_UNUSED; | |
1956 | ||
1957 | for (ch = *str, str2 = ident; | |
1958 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1959 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
1960 | ch = *++str) |
1961 | { | |
3882b010 | 1962 | *str2++ = TOLOWER (ch); |
252b5132 RH |
1963 | } |
1964 | ||
1965 | *str2 = '\0'; | |
1966 | len = str2 - ident; | |
1967 | ||
1968 | ch = ident[0]; | |
1969 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
1970 | if (ch == ptr->string[0] | |
1971 | && len == ptr->length | |
b7d7dc63 AM |
1972 | && memcmp (ident, ptr->string, ptr->length) == 0 |
1973 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 1974 | { |
15c1449b AM |
1975 | int reloc = ptr->reloc; |
1976 | ||
cdba85ec | 1977 | if (!ppc_obj64) |
5f6db75a AM |
1978 | if (exp_p->X_add_number != 0 |
1979 | && (reloc == (int) BFD_RELOC_16_GOTOFF | |
1980 | || reloc == (int) BFD_RELOC_LO16_GOTOFF | |
1981 | || reloc == (int) BFD_RELOC_HI16_GOTOFF | |
1982 | || reloc == (int) BFD_RELOC_HI16_S_GOTOFF)) | |
1983 | as_warn (_("identifier+constant@got means identifier@got+constant")); | |
1984 | ||
1985 | /* Now check for identifier@suffix+constant. */ | |
1986 | if (*str == '-' || *str == '+') | |
252b5132 | 1987 | { |
5f6db75a AM |
1988 | char *orig_line = input_line_pointer; |
1989 | expressionS new_exp; | |
1990 | ||
1991 | input_line_pointer = str; | |
1992 | expression (&new_exp); | |
1993 | if (new_exp.X_op == O_constant) | |
252b5132 | 1994 | { |
5f6db75a AM |
1995 | exp_p->X_add_number += new_exp.X_add_number; |
1996 | str = input_line_pointer; | |
252b5132 | 1997 | } |
5f6db75a AM |
1998 | |
1999 | if (&input_line_pointer != str_p) | |
2000 | input_line_pointer = orig_line; | |
252b5132 | 2001 | } |
252b5132 | 2002 | *str_p = str; |
0baf16f2 | 2003 | |
2b3c4602 | 2004 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2005 | && exp_p->X_op == O_symbol |
2006 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2007 | { |
9f2b53d7 AM |
2008 | /* Change the symbol so that the dummy .TOC. symbol can be |
2009 | omitted from the object file. */ | |
0baf16f2 AM |
2010 | exp_p->X_add_symbol = &abs_symbol; |
2011 | } | |
2012 | ||
15c1449b | 2013 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2014 | } |
2015 | ||
2016 | return BFD_RELOC_UNUSED; | |
2017 | } | |
2018 | ||
99a814a1 AM |
2019 | /* Like normal .long/.short/.word, except support @got, etc. |
2020 | Clobbers input_line_pointer, checks end-of-line. */ | |
252b5132 | 2021 | static void |
98027b10 | 2022 | ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */) |
252b5132 RH |
2023 | { |
2024 | expressionS exp; | |
2025 | bfd_reloc_code_real_type reloc; | |
2026 | ||
2027 | if (is_it_end_of_statement ()) | |
2028 | { | |
2029 | demand_empty_rest_of_line (); | |
2030 | return; | |
2031 | } | |
2032 | ||
2033 | do | |
2034 | { | |
2035 | expression (&exp); | |
2036 | if (exp.X_op == O_symbol | |
2037 | && *input_line_pointer == '@' | |
99a814a1 AM |
2038 | && (reloc = ppc_elf_suffix (&input_line_pointer, |
2039 | &exp)) != BFD_RELOC_UNUSED) | |
252b5132 | 2040 | { |
99a814a1 AM |
2041 | reloc_howto_type *reloc_howto; |
2042 | int size; | |
2043 | ||
2044 | reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
2045 | size = bfd_get_reloc_size (reloc_howto); | |
252b5132 RH |
2046 | |
2047 | if (size > nbytes) | |
0baf16f2 AM |
2048 | { |
2049 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
2050 | reloc_howto->name, nbytes); | |
2051 | } | |
252b5132 RH |
2052 | else |
2053 | { | |
0baf16f2 AM |
2054 | char *p; |
2055 | int offset; | |
252b5132 | 2056 | |
0baf16f2 AM |
2057 | p = frag_more (nbytes); |
2058 | offset = 0; | |
2059 | if (target_big_endian) | |
2060 | offset = nbytes - size; | |
99a814a1 AM |
2061 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
2062 | &exp, 0, reloc); | |
252b5132 RH |
2063 | } |
2064 | } | |
2065 | else | |
2066 | emit_expr (&exp, (unsigned int) nbytes); | |
2067 | } | |
2068 | while (*input_line_pointer++ == ','); | |
2069 | ||
99a814a1 AM |
2070 | /* Put terminator back into stream. */ |
2071 | input_line_pointer--; | |
252b5132 RH |
2072 | demand_empty_rest_of_line (); |
2073 | } | |
2074 | ||
2075 | /* Solaris pseduo op to change to the .rodata section. */ | |
2076 | static void | |
98027b10 | 2077 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2078 | { |
2079 | char *save_line = input_line_pointer; | |
2080 | static char section[] = ".rodata\n"; | |
2081 | ||
99a814a1 | 2082 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2083 | input_line_pointer = section; |
2084 | obj_elf_section (xxx); | |
2085 | ||
2086 | input_line_pointer = save_line; | |
2087 | } | |
2088 | ||
99a814a1 | 2089 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2090 | static void |
98027b10 | 2091 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2092 | { |
98027b10 AM |
2093 | char *name; |
2094 | char c; | |
2095 | char *p; | |
252b5132 | 2096 | offsetT size; |
98027b10 | 2097 | symbolS *symbolP; |
252b5132 RH |
2098 | offsetT align; |
2099 | segT old_sec; | |
2100 | int old_subsec; | |
2101 | char *pfrag; | |
2102 | int align2; | |
2103 | ||
2104 | name = input_line_pointer; | |
2105 | c = get_symbol_end (); | |
2106 | ||
99a814a1 | 2107 | /* just after name is now '\0'. */ |
252b5132 RH |
2108 | p = input_line_pointer; |
2109 | *p = c; | |
2110 | SKIP_WHITESPACE (); | |
2111 | if (*input_line_pointer != ',') | |
2112 | { | |
2113 | as_bad (_("Expected comma after symbol-name: rest of line ignored.")); | |
2114 | ignore_rest_of_line (); | |
2115 | return; | |
2116 | } | |
2117 | ||
2118 | input_line_pointer++; /* skip ',' */ | |
2119 | if ((size = get_absolute_expression ()) < 0) | |
2120 | { | |
2121 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2122 | ignore_rest_of_line (); | |
2123 | return; | |
2124 | } | |
2125 | ||
2126 | /* The third argument to .lcomm is the alignment. */ | |
2127 | if (*input_line_pointer != ',') | |
2128 | align = 8; | |
2129 | else | |
2130 | { | |
2131 | ++input_line_pointer; | |
2132 | align = get_absolute_expression (); | |
2133 | if (align <= 0) | |
2134 | { | |
2135 | as_warn (_("ignoring bad alignment")); | |
2136 | align = 8; | |
2137 | } | |
2138 | } | |
2139 | ||
2140 | *p = 0; | |
2141 | symbolP = symbol_find_or_make (name); | |
2142 | *p = c; | |
2143 | ||
2144 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2145 | { | |
2146 | as_bad (_("Ignoring attempt to re-define symbol `%s'."), | |
2147 | S_GET_NAME (symbolP)); | |
2148 | ignore_rest_of_line (); | |
2149 | return; | |
2150 | } | |
2151 | ||
2152 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2153 | { | |
2154 | as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."), | |
2155 | S_GET_NAME (symbolP), | |
2156 | (long) S_GET_VALUE (symbolP), | |
2157 | (long) size); | |
2158 | ||
2159 | ignore_rest_of_line (); | |
2160 | return; | |
2161 | } | |
2162 | ||
99a814a1 | 2163 | /* Allocate_bss. */ |
252b5132 RH |
2164 | old_sec = now_seg; |
2165 | old_subsec = now_subseg; | |
2166 | if (align) | |
2167 | { | |
99a814a1 | 2168 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2169 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2170 | if (align != 1) | |
2171 | { | |
2172 | as_bad (_("Common alignment not a power of 2")); | |
2173 | ignore_rest_of_line (); | |
2174 | return; | |
2175 | } | |
2176 | } | |
2177 | else | |
2178 | align2 = 0; | |
2179 | ||
2180 | record_alignment (bss_section, align2); | |
2181 | subseg_set (bss_section, 0); | |
2182 | if (align2) | |
2183 | frag_align (align2, 0, 0); | |
2184 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2185 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2186 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2187 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2188 | (char *) 0); | |
2189 | *pfrag = 0; | |
2190 | S_SET_SIZE (symbolP, size); | |
2191 | S_SET_SEGMENT (symbolP, bss_section); | |
2192 | subseg_set (old_sec, old_subsec); | |
2193 | demand_empty_rest_of_line (); | |
2194 | } | |
2195 | ||
2196 | /* Validate any relocations emitted for -mrelocatable, possibly adding | |
2197 | fixups for word relocations in writable segments, so we can adjust | |
2198 | them at runtime. */ | |
2199 | static void | |
98027b10 | 2200 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2201 | { |
2202 | if (fixp->fx_done || fixp->fx_pcrel) | |
2203 | return; | |
2204 | ||
2205 | switch (shlib) | |
2206 | { | |
2207 | case SHLIB_NONE: | |
2208 | case SHLIB_PIC: | |
2209 | return; | |
2210 | ||
5d6f4f16 | 2211 | case SHLIB_MRELOCATABLE: |
252b5132 RH |
2212 | if (fixp->fx_r_type <= BFD_RELOC_UNUSED |
2213 | && fixp->fx_r_type != BFD_RELOC_16_GOTOFF | |
2214 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
2215 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2216 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2217 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2218 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2219 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2220 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2221 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2222 | && strcmp (segment_name (seg), ".got2") != 0 |
2223 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2224 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2225 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2226 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2227 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2228 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2229 | { | |
2230 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2231 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2232 | { | |
2233 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
2234 | _("Relocation cannot be done when using -mrelocatable")); | |
2235 | } | |
2236 | } | |
2237 | return; | |
2238 | } | |
2239 | } | |
0baf16f2 | 2240 | |
7e8d4ab4 AM |
2241 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2242 | function descriptor sym if the corresponding code sym is used. */ | |
2243 | ||
2244 | void | |
98027b10 | 2245 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2246 | { |
7e8d4ab4 | 2247 | symbolS *symp; |
9232bbb0 | 2248 | asection *toc; |
0baf16f2 | 2249 | |
7e8d4ab4 AM |
2250 | if (!ppc_obj64) |
2251 | return; | |
2252 | ||
2253 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2254 | { |
7e8d4ab4 AM |
2255 | const char *name; |
2256 | char *dotname; | |
2257 | symbolS *dotsym; | |
2258 | size_t len; | |
2259 | ||
2260 | name = S_GET_NAME (symp); | |
2261 | if (name[0] == '.') | |
2262 | continue; | |
2263 | ||
2264 | if (! S_IS_WEAK (symp) | |
2265 | || S_IS_DEFINED (symp)) | |
2266 | continue; | |
2267 | ||
2268 | len = strlen (name) + 1; | |
2269 | dotname = xmalloc (len + 1); | |
2270 | dotname[0] = '.'; | |
2271 | memcpy (dotname + 1, name, len); | |
461b725f | 2272 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2273 | free (dotname); |
2274 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2275 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2276 | symbol_mark_used (symp); |
2277 | ||
0baf16f2 AM |
2278 | } |
2279 | ||
9232bbb0 AM |
2280 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2281 | if (toc != NULL | |
2282 | && bfd_section_size (stdoutput, toc) > 0x10000) | |
2283 | as_warn (_("TOC section size exceeds 64k")); | |
2284 | ||
7e8d4ab4 AM |
2285 | /* Don't emit .TOC. symbol. */ |
2286 | symp = symbol_find (".TOC."); | |
2287 | if (symp != NULL) | |
2288 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
0baf16f2 | 2289 | } |
252b5132 RH |
2290 | #endif /* OBJ_ELF */ |
2291 | \f | |
2292 | #ifdef TE_PE | |
2293 | ||
2294 | /* | |
99a814a1 | 2295 | * Summary of parse_toc_entry. |
252b5132 RH |
2296 | * |
2297 | * in: Input_line_pointer points to the '[' in one of: | |
2298 | * | |
2299 | * [toc] [tocv] [toc32] [toc64] | |
2300 | * | |
2301 | * Anything else is an error of one kind or another. | |
2302 | * | |
81d4177b | 2303 | * out: |
252b5132 RH |
2304 | * return value: success or failure |
2305 | * toc_kind: kind of toc reference | |
2306 | * input_line_pointer: | |
2307 | * success: first char after the ']' | |
2308 | * failure: unchanged | |
2309 | * | |
2310 | * settings: | |
2311 | * | |
2312 | * [toc] - rv == success, toc_kind = default_toc | |
2313 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2314 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2315 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2316 | * | |
2317 | */ | |
2318 | ||
81d4177b KH |
2319 | enum toc_size_qualifier |
2320 | { | |
252b5132 RH |
2321 | default_toc, /* The toc cell constructed should be the system default size */ |
2322 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2323 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2324 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2325 | }; | |
2326 | ||
2327 | static int | |
98027b10 | 2328 | parse_toc_entry (enum toc_size_qualifier *toc_kind) |
252b5132 RH |
2329 | { |
2330 | char *start; | |
2331 | char *toc_spec; | |
2332 | char c; | |
2333 | enum toc_size_qualifier t; | |
2334 | ||
99a814a1 | 2335 | /* Save the input_line_pointer. */ |
252b5132 RH |
2336 | start = input_line_pointer; |
2337 | ||
99a814a1 | 2338 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2339 | ++input_line_pointer; |
2340 | SKIP_WHITESPACE (); | |
81d4177b | 2341 | |
99a814a1 | 2342 | /* Find the spelling of the operand. */ |
252b5132 RH |
2343 | toc_spec = input_line_pointer; |
2344 | c = get_symbol_end (); | |
2345 | ||
99a814a1 | 2346 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2347 | { |
2348 | t = default_toc; | |
2349 | } | |
99a814a1 | 2350 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2351 | { |
2352 | t = data_in_toc; | |
2353 | } | |
99a814a1 | 2354 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2355 | { |
2356 | t = must_be_32; | |
2357 | } | |
99a814a1 | 2358 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2359 | { |
2360 | t = must_be_64; | |
2361 | } | |
2362 | else | |
2363 | { | |
2364 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2365 | *input_line_pointer = c; |
2366 | input_line_pointer = start; | |
252b5132 RH |
2367 | return 0; |
2368 | } | |
2369 | ||
99a814a1 AM |
2370 | /* Now find the ']'. */ |
2371 | *input_line_pointer = c; | |
252b5132 | 2372 | |
81d4177b KH |
2373 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2374 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2375 | |
2376 | if (c != ']') | |
2377 | { | |
2378 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2379 | input_line_pointer = start; |
252b5132 RH |
2380 | return 0; |
2381 | } | |
2382 | ||
99a814a1 | 2383 | *toc_kind = t; |
252b5132 RH |
2384 | return 1; |
2385 | } | |
2386 | #endif | |
2387 | \f | |
2388 | ||
dc1d03fc | 2389 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2390 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2391 | static void | |
98027b10 | 2392 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2393 | { |
2394 | unsigned int i; | |
2395 | ||
2396 | /* Check we don't already exist. */ | |
2397 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2398 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2399 | return; |
b34976b6 | 2400 | |
6a0c61b7 EZ |
2401 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2402 | { | |
2403 | if (ppc_apuinfo_num_alloc == 0) | |
2404 | { | |
2405 | ppc_apuinfo_num_alloc = 4; | |
2406 | ppc_apuinfo_list = (unsigned long *) | |
2407 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2408 | } | |
2409 | else | |
2410 | { | |
2411 | ppc_apuinfo_num_alloc += 4; | |
2412 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2413 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2414 | } | |
2415 | } | |
dc1d03fc | 2416 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2417 | } |
2418 | #undef APUID | |
dc1d03fc | 2419 | #endif |
6a0c61b7 EZ |
2420 | \f |
2421 | ||
252b5132 RH |
2422 | /* We need to keep a list of fixups. We can't simply generate them as |
2423 | we go, because that would require us to first create the frag, and | |
2424 | that would screw up references to ``.''. */ | |
2425 | ||
2426 | struct ppc_fixup | |
2427 | { | |
2428 | expressionS exp; | |
2429 | int opindex; | |
2430 | bfd_reloc_code_real_type reloc; | |
2431 | }; | |
2432 | ||
2433 | #define MAX_INSN_FIXUPS (5) | |
2434 | ||
2435 | /* This routine is called for each instruction to be assembled. */ | |
2436 | ||
2437 | void | |
98027b10 | 2438 | md_assemble (char *str) |
252b5132 RH |
2439 | { |
2440 | char *s; | |
2441 | const struct powerpc_opcode *opcode; | |
2442 | unsigned long insn; | |
2443 | const unsigned char *opindex_ptr; | |
2444 | int skip_optional; | |
2445 | int need_paren; | |
2446 | int next_opindex; | |
2447 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2448 | int fc; | |
2449 | char *f; | |
09b935ac | 2450 | int addr_mod; |
252b5132 RH |
2451 | int i; |
2452 | #ifdef OBJ_ELF | |
2453 | bfd_reloc_code_real_type reloc; | |
2454 | #endif | |
2455 | ||
2456 | /* Get the opcode. */ | |
3882b010 | 2457 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2458 | ; |
2459 | if (*s != '\0') | |
2460 | *s++ = '\0'; | |
2461 | ||
2462 | /* Look up the opcode in the hash table. */ | |
2463 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2464 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2465 | { | |
2466 | const struct powerpc_macro *macro; | |
2467 | ||
2468 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2469 | if (macro == (const struct powerpc_macro *) NULL) | |
2470 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
2471 | else | |
2472 | ppc_macro (s, macro); | |
2473 | ||
2474 | return; | |
2475 | } | |
2476 | ||
2477 | insn = opcode->opcode; | |
2478 | ||
2479 | str = s; | |
3882b010 | 2480 | while (ISSPACE (*str)) |
252b5132 RH |
2481 | ++str; |
2482 | ||
2483 | /* PowerPC operands are just expressions. The only real issue is | |
2484 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2485 | an optional operand separate the operands only with commas (in some |
2486 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2487 | have optional operands). Most instructions with optional operands | |
2488 | have only one. Those that have more than one optional operand can | |
2489 | take either all their operands or none. So, before we start seriously | |
2490 | parsing the operands, we check to see if we have optional operands, | |
2491 | and if we do, we count the number of commas to see which operands | |
2492 | have been omitted. */ | |
252b5132 RH |
2493 | skip_optional = 0; |
2494 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2495 | { | |
2496 | const struct powerpc_operand *operand; | |
2497 | ||
2498 | operand = &powerpc_operands[*opindex_ptr]; | |
2499 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2500 | { | |
2501 | unsigned int opcount; | |
7fe9cf6b NC |
2502 | unsigned int num_operands_expected; |
2503 | unsigned int i; | |
252b5132 RH |
2504 | |
2505 | /* There is an optional operand. Count the number of | |
2506 | commas in the input line. */ | |
2507 | if (*str == '\0') | |
2508 | opcount = 0; | |
2509 | else | |
2510 | { | |
2511 | opcount = 1; | |
2512 | s = str; | |
2513 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2514 | { | |
2515 | ++opcount; | |
2516 | ++s; | |
2517 | } | |
2518 | } | |
2519 | ||
7fe9cf6b NC |
2520 | /* Compute the number of expected operands. |
2521 | Do not count fake operands. */ | |
2522 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2523 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2524 | ++ num_operands_expected; | |
2525 | ||
252b5132 RH |
2526 | /* If there are fewer operands in the line then are called |
2527 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2528 | operands. */ |
7fe9cf6b | 2529 | if (opcount < num_operands_expected) |
252b5132 RH |
2530 | skip_optional = 1; |
2531 | ||
2532 | break; | |
2533 | } | |
2534 | } | |
2535 | ||
2536 | /* Gather the operands. */ | |
2537 | need_paren = 0; | |
2538 | next_opindex = 0; | |
2539 | fc = 0; | |
2540 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2541 | { | |
2542 | const struct powerpc_operand *operand; | |
2543 | const char *errmsg; | |
2544 | char *hold; | |
2545 | expressionS ex; | |
2546 | char endc; | |
2547 | ||
2548 | if (next_opindex == 0) | |
2549 | operand = &powerpc_operands[*opindex_ptr]; | |
2550 | else | |
2551 | { | |
2552 | operand = &powerpc_operands[next_opindex]; | |
2553 | next_opindex = 0; | |
2554 | } | |
252b5132 RH |
2555 | errmsg = NULL; |
2556 | ||
2557 | /* If this is a fake operand, then we do not expect anything | |
2558 | from the input. */ | |
2559 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2560 | { | |
2b3c4602 | 2561 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2562 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2563 | as_bad ("%s", errmsg); |
252b5132 RH |
2564 | continue; |
2565 | } | |
2566 | ||
2567 | /* If this is an optional operand, and we are skipping it, just | |
2568 | insert a zero. */ | |
2569 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2570 | && skip_optional) | |
2571 | { | |
2572 | if (operand->insert) | |
2573 | { | |
2b3c4602 | 2574 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2575 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2576 | as_bad ("%s", errmsg); |
252b5132 RH |
2577 | } |
2578 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2579 | next_opindex = *opindex_ptr + 1; | |
2580 | continue; | |
2581 | } | |
2582 | ||
2583 | /* Gather the operand. */ | |
2584 | hold = input_line_pointer; | |
2585 | input_line_pointer = str; | |
2586 | ||
2587 | #ifdef TE_PE | |
81d4177b | 2588 | if (*input_line_pointer == '[') |
252b5132 RH |
2589 | { |
2590 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2591 | * |
2592 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2593 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2594 | * The argument following the `]' must be a symbol name, and the | |
2595 | * register must be the toc register: 'rtoc' or '2' | |
2596 | * | |
2597 | * The effect is to 0 as the displacement field | |
2598 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2599 | * the appropriate variation) reloc against it based on the symbol. | |
2600 | * The linker will build the toc, and insert the resolved toc offset. | |
2601 | * | |
2602 | * Note: | |
2603 | * o The size of the toc entry is currently assumed to be | |
2604 | * 32 bits. This should not be assumed to be a hard coded | |
2605 | * number. | |
2606 | * o In an effort to cope with a change from 32 to 64 bits, | |
2607 | * there are also toc entries that are specified to be | |
2608 | * either 32 or 64 bits: | |
2609 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2610 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2611 | * These demand toc entries of the specified size, and the | |
2612 | * instruction probably requires it. | |
2613 | */ | |
252b5132 RH |
2614 | |
2615 | int valid_toc; | |
2616 | enum toc_size_qualifier toc_kind; | |
2617 | bfd_reloc_code_real_type toc_reloc; | |
2618 | ||
99a814a1 AM |
2619 | /* Go parse off the [tocXX] part. */ |
2620 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2621 | |
81d4177b | 2622 | if (!valid_toc) |
252b5132 | 2623 | { |
99a814a1 AM |
2624 | /* Note: message has already been issued. |
2625 | FIXME: what sort of recovery should we do? | |
2626 | demand_rest_of_line (); return; ? */ | |
252b5132 RH |
2627 | } |
2628 | ||
99a814a1 AM |
2629 | /* Now get the symbol following the ']'. */ |
2630 | expression (&ex); | |
252b5132 RH |
2631 | |
2632 | switch (toc_kind) | |
2633 | { | |
2634 | case default_toc: | |
99a814a1 AM |
2635 | /* In this case, we may not have seen the symbol yet, |
2636 | since it is allowed to appear on a .extern or .globl | |
2637 | or just be a label in the .data section. */ | |
252b5132 RH |
2638 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2639 | break; | |
2640 | case data_in_toc: | |
99a814a1 AM |
2641 | /* 1. The symbol must be defined and either in the toc |
2642 | section, or a global. | |
2643 | 2. The reloc generated must have the TOCDEFN flag set | |
2644 | in upper bit mess of the reloc type. | |
2645 | FIXME: It's a little confusing what the tocv | |
2646 | qualifier can be used for. At the very least, I've | |
2647 | seen three uses, only one of which I'm sure I can | |
2648 | explain. */ | |
81d4177b KH |
2649 | if (ex.X_op == O_symbol) |
2650 | { | |
252b5132 | 2651 | assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2652 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2653 | != tocdata_section) | |
252b5132 | 2654 | { |
99a814a1 | 2655 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2656 | } |
2657 | } | |
2658 | ||
2659 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2660 | break; | |
2661 | case must_be_32: | |
99a814a1 AM |
2662 | /* FIXME: these next two specifically specify 32/64 bit |
2663 | toc entries. We don't support them today. Is this | |
2664 | the right way to say that? */ | |
252b5132 RH |
2665 | toc_reloc = BFD_RELOC_UNUSED; |
2666 | as_bad (_("Unimplemented toc32 expression modifier")); | |
2667 | break; | |
2668 | case must_be_64: | |
99a814a1 | 2669 | /* FIXME: see above. */ |
252b5132 RH |
2670 | toc_reloc = BFD_RELOC_UNUSED; |
2671 | as_bad (_("Unimplemented toc64 expression modifier")); | |
2672 | break; | |
2673 | default: | |
bc805888 | 2674 | fprintf (stderr, |
99a814a1 AM |
2675 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2676 | toc_kind); | |
bc805888 | 2677 | abort (); |
252b5132 RH |
2678 | break; |
2679 | } | |
2680 | ||
2681 | /* We need to generate a fixup for this expression. */ | |
2682 | if (fc >= MAX_INSN_FIXUPS) | |
2683 | as_fatal (_("too many fixups")); | |
2684 | ||
2685 | fixups[fc].reloc = toc_reloc; | |
2686 | fixups[fc].exp = ex; | |
2687 | fixups[fc].opindex = *opindex_ptr; | |
2688 | ++fc; | |
2689 | ||
99a814a1 AM |
2690 | /* Ok. We've set up the fixup for the instruction. Now make it |
2691 | look like the constant 0 was found here. */ | |
252b5132 RH |
2692 | ex.X_unsigned = 1; |
2693 | ex.X_op = O_constant; | |
2694 | ex.X_add_number = 0; | |
2695 | ex.X_add_symbol = NULL; | |
2696 | ex.X_op_symbol = NULL; | |
2697 | } | |
2698 | ||
2699 | else | |
2700 | #endif /* TE_PE */ | |
2701 | { | |
2ad068be AM |
2702 | if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0) |
2703 | || !register_name (&ex)) | |
252b5132 | 2704 | { |
13abbae3 AM |
2705 | char save_lex = lex_type['%']; |
2706 | ||
252b5132 | 2707 | if ((operand->flags & PPC_OPERAND_CR) != 0) |
13abbae3 AM |
2708 | { |
2709 | cr_operand = TRUE; | |
2710 | lex_type['%'] |= LEX_BEGIN_NAME; | |
2711 | } | |
252b5132 | 2712 | expression (&ex); |
b34976b6 | 2713 | cr_operand = FALSE; |
13abbae3 | 2714 | lex_type['%'] = save_lex; |
252b5132 RH |
2715 | } |
2716 | } | |
2717 | ||
2718 | str = input_line_pointer; | |
2719 | input_line_pointer = hold; | |
2720 | ||
2721 | if (ex.X_op == O_illegal) | |
2722 | as_bad (_("illegal operand")); | |
2723 | else if (ex.X_op == O_absent) | |
2724 | as_bad (_("missing operand")); | |
2725 | else if (ex.X_op == O_register) | |
2726 | { | |
2727 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
783de163 | 2728 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2729 | } |
2730 | else if (ex.X_op == O_constant) | |
2731 | { | |
2732 | #ifdef OBJ_ELF | |
81d4177b | 2733 | /* Allow @HA, @L, @H on constants. */ |
252b5132 RH |
2734 | char *orig_str = str; |
2735 | ||
2736 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2737 | switch (reloc) | |
2738 | { | |
2739 | default: | |
2740 | str = orig_str; | |
2741 | break; | |
2742 | ||
2743 | case BFD_RELOC_LO16: | |
2744 | /* X_unsigned is the default, so if the user has done | |
0baf16f2 AM |
2745 | something which cleared it, we always produce a |
2746 | signed value. */ | |
2747 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
252b5132 RH |
2748 | ex.X_add_number &= 0xffff; |
2749 | else | |
0baf16f2 | 2750 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2751 | break; |
2752 | ||
2753 | case BFD_RELOC_HI16: | |
0baf16f2 AM |
2754 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2755 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2756 | else | |
2757 | ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); | |
252b5132 RH |
2758 | break; |
2759 | ||
2760 | case BFD_RELOC_HI16_S: | |
0baf16f2 AM |
2761 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2762 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2763 | else | |
2764 | ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); | |
2765 | break; | |
2766 | ||
0baf16f2 AM |
2767 | case BFD_RELOC_PPC64_HIGHER: |
2768 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2769 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); | |
2770 | else | |
2771 | ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); | |
2772 | break; | |
2773 | ||
2774 | case BFD_RELOC_PPC64_HIGHER_S: | |
2775 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2776 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); | |
2777 | else | |
2778 | ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); | |
252b5132 | 2779 | break; |
0baf16f2 AM |
2780 | |
2781 | case BFD_RELOC_PPC64_HIGHEST: | |
2782 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2783 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); | |
2784 | else | |
2785 | ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); | |
2786 | break; | |
2787 | ||
2788 | case BFD_RELOC_PPC64_HIGHEST_S: | |
2789 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2790 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); | |
2791 | else | |
2792 | ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); | |
2793 | break; | |
252b5132 | 2794 | } |
0baf16f2 | 2795 | #endif /* OBJ_ELF */ |
252b5132 | 2796 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 2797 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2798 | } |
2799 | #ifdef OBJ_ELF | |
2800 | else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2801 | { | |
cdba85ec AM |
2802 | /* Some TLS tweaks. */ |
2803 | switch (reloc) | |
2804 | { | |
2805 | default: | |
2806 | break; | |
2807 | case BFD_RELOC_PPC_TLS: | |
2808 | insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2, | |
783de163 | 2809 | ppc_cpu, (char *) NULL, 0); |
cdba85ec AM |
2810 | break; |
2811 | /* We'll only use the 32 (or 64) bit form of these relocations | |
2812 | in constants. Instructions get the 16 bit form. */ | |
2813 | case BFD_RELOC_PPC_DTPREL: | |
2814 | reloc = BFD_RELOC_PPC_DTPREL16; | |
2815 | break; | |
2816 | case BFD_RELOC_PPC_TPREL: | |
2817 | reloc = BFD_RELOC_PPC_TPREL16; | |
2818 | break; | |
2819 | } | |
2820 | ||
99a814a1 AM |
2821 | /* For the absolute forms of branches, convert the PC |
2822 | relative form back into the absolute. */ | |
252b5132 RH |
2823 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) |
2824 | { | |
2825 | switch (reloc) | |
2826 | { | |
2827 | case BFD_RELOC_PPC_B26: | |
2828 | reloc = BFD_RELOC_PPC_BA26; | |
2829 | break; | |
2830 | case BFD_RELOC_PPC_B16: | |
2831 | reloc = BFD_RELOC_PPC_BA16; | |
2832 | break; | |
2833 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
2834 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
2835 | break; | |
2836 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
2837 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
2838 | break; | |
2839 | default: | |
2840 | break; | |
2841 | } | |
2842 | } | |
2843 | ||
2b3c4602 | 2844 | if (ppc_obj64 |
adadcc0c | 2845 | && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) |
0baf16f2 AM |
2846 | { |
2847 | switch (reloc) | |
2848 | { | |
2849 | case BFD_RELOC_16: | |
2850 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
2851 | break; | |
2852 | case BFD_RELOC_LO16: | |
2853 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
2854 | break; | |
2855 | case BFD_RELOC_16_GOTOFF: | |
2856 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
2857 | break; | |
2858 | case BFD_RELOC_LO16_GOTOFF: | |
2859 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
2860 | break; | |
2861 | case BFD_RELOC_LO16_PLTOFF: | |
2862 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
2863 | break; | |
1cfc59d5 | 2864 | case BFD_RELOC_16_BASEREL: |
0baf16f2 AM |
2865 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; |
2866 | break; | |
2867 | case BFD_RELOC_LO16_BASEREL: | |
2868 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
2869 | break; | |
2870 | case BFD_RELOC_PPC_TOC16: | |
2871 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
2872 | break; | |
2873 | case BFD_RELOC_PPC64_TOC16_LO: | |
2874 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
2875 | break; | |
2876 | case BFD_RELOC_PPC64_PLTGOT16: | |
2877 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
2878 | break; | |
2879 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
2880 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
2881 | break; | |
cdba85ec AM |
2882 | case BFD_RELOC_PPC_DTPREL16: |
2883 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
2884 | break; | |
2885 | case BFD_RELOC_PPC_DTPREL16_LO: | |
2886 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
2887 | break; | |
2888 | case BFD_RELOC_PPC_TPREL16: | |
2889 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
2890 | break; | |
2891 | case BFD_RELOC_PPC_TPREL16_LO: | |
2892 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
2893 | break; | |
2894 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
2895 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
2896 | case BFD_RELOC_PPC_GOT_TPREL16: | |
2897 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
2898 | break; | |
0baf16f2 AM |
2899 | default: |
2900 | as_bad (_("unsupported relocation for DS offset field")); | |
2901 | break; | |
2902 | } | |
2903 | } | |
2904 | ||
252b5132 RH |
2905 | /* We need to generate a fixup for this expression. */ |
2906 | if (fc >= MAX_INSN_FIXUPS) | |
2907 | as_fatal (_("too many fixups")); | |
2908 | fixups[fc].exp = ex; | |
2909 | fixups[fc].opindex = 0; | |
2910 | fixups[fc].reloc = reloc; | |
2911 | ++fc; | |
2912 | } | |
2913 | #endif /* OBJ_ELF */ | |
2914 | ||
2915 | else | |
2916 | { | |
2917 | /* We need to generate a fixup for this expression. */ | |
2918 | if (fc >= MAX_INSN_FIXUPS) | |
2919 | as_fatal (_("too many fixups")); | |
2920 | fixups[fc].exp = ex; | |
2921 | fixups[fc].opindex = *opindex_ptr; | |
2922 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
2923 | ++fc; | |
2924 | } | |
2925 | ||
2926 | if (need_paren) | |
2927 | { | |
2928 | endc = ')'; | |
2929 | need_paren = 0; | |
c3d65c1c BE |
2930 | /* If expecting more operands, then we want to see "),". */ |
2931 | if (*str == endc && opindex_ptr[1] != 0) | |
2932 | { | |
2933 | do | |
2934 | ++str; | |
2935 | while (ISSPACE (*str)); | |
2936 | endc = ','; | |
2937 | } | |
252b5132 RH |
2938 | } |
2939 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
2940 | { | |
2941 | endc = '('; | |
2942 | need_paren = 1; | |
2943 | } | |
2944 | else | |
2945 | endc = ','; | |
2946 | ||
2947 | /* The call to expression should have advanced str past any | |
2948 | whitespace. */ | |
2949 | if (*str != endc | |
2950 | && (endc != ',' || *str != '\0')) | |
2951 | { | |
2952 | as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc); | |
2953 | break; | |
2954 | } | |
2955 | ||
2956 | if (*str != '\0') | |
2957 | ++str; | |
2958 | } | |
2959 | ||
3882b010 | 2960 | while (ISSPACE (*str)) |
252b5132 RH |
2961 | ++str; |
2962 | ||
2963 | if (*str != '\0') | |
2964 | as_bad (_("junk at end of line: `%s'"), str); | |
2965 | ||
dc1d03fc | 2966 | #ifdef OBJ_ELF |
6a0c61b7 | 2967 | /* Do we need/want a APUinfo section? */ |
ed84b57b | 2968 | if ((ppc_cpu & PPC_OPCODE_E500MC) != 0) |
6a0c61b7 EZ |
2969 | { |
2970 | /* These are all version "1". */ | |
2971 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 2972 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 2973 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 2974 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 2975 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 2976 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 2977 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 2978 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 2979 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 2980 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 2981 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 2982 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 2983 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 2984 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
6a0c61b7 | 2985 | } |
dc1d03fc | 2986 | #endif |
6a0c61b7 | 2987 | |
252b5132 RH |
2988 | /* Write out the instruction. */ |
2989 | f = frag_more (4); | |
09b935ac AM |
2990 | addr_mod = frag_now_fix () & 3; |
2991 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
2992 | as_bad (_("instruction address is not a multiple of 4")); | |
2993 | frag_now->insn_addr = addr_mod; | |
2994 | frag_now->has_code = 1; | |
252b5132 RH |
2995 | md_number_to_chars (f, insn, 4); |
2996 | ||
5d6f4f16 GK |
2997 | #ifdef OBJ_ELF |
2998 | dwarf2_emit_insn (4); | |
2999 | #endif | |
3000 | ||
252b5132 RH |
3001 | /* Create any fixups. At this point we do not use a |
3002 | bfd_reloc_code_real_type, but instead just use the | |
3003 | BFD_RELOC_UNUSED plus the operand index. This lets us easily | |
3004 | handle fixups for any operand type, although that is admittedly | |
3005 | not a very exciting feature. We pick a BFD reloc type in | |
55cf6793 | 3006 | md_apply_fix. */ |
252b5132 RH |
3007 | for (i = 0; i < fc; i++) |
3008 | { | |
3009 | const struct powerpc_operand *operand; | |
3010 | ||
3011 | operand = &powerpc_operands[fixups[i].opindex]; | |
3012 | if (fixups[i].reloc != BFD_RELOC_UNUSED) | |
3013 | { | |
99a814a1 | 3014 | reloc_howto_type *reloc_howto; |
252b5132 RH |
3015 | int size; |
3016 | int offset; | |
3017 | fixS *fixP; | |
3018 | ||
99a814a1 | 3019 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
3020 | if (!reloc_howto) |
3021 | abort (); | |
3022 | ||
3023 | size = bfd_get_reloc_size (reloc_howto); | |
3024 | offset = target_big_endian ? (4 - size) : 0; | |
3025 | ||
3026 | if (size < 1 || size > 4) | |
bc805888 | 3027 | abort (); |
252b5132 | 3028 | |
99a814a1 AM |
3029 | fixP = fix_new_exp (frag_now, |
3030 | f - frag_now->fr_literal + offset, | |
3031 | size, | |
3032 | &fixups[i].exp, | |
3033 | reloc_howto->pc_relative, | |
252b5132 RH |
3034 | fixups[i].reloc); |
3035 | ||
3036 | /* Turn off complaints that the addend is too large for things like | |
3037 | foo+100000@ha. */ | |
3038 | switch (fixups[i].reloc) | |
3039 | { | |
3040 | case BFD_RELOC_16_GOTOFF: | |
3041 | case BFD_RELOC_PPC_TOC16: | |
3042 | case BFD_RELOC_LO16: | |
3043 | case BFD_RELOC_HI16: | |
3044 | case BFD_RELOC_HI16_S: | |
0baf16f2 | 3045 | #ifdef OBJ_ELF |
0baf16f2 AM |
3046 | case BFD_RELOC_PPC64_HIGHER: |
3047 | case BFD_RELOC_PPC64_HIGHER_S: | |
3048 | case BFD_RELOC_PPC64_HIGHEST: | |
3049 | case BFD_RELOC_PPC64_HIGHEST_S: | |
0baf16f2 | 3050 | #endif |
252b5132 RH |
3051 | fixP->fx_no_overflow = 1; |
3052 | break; | |
3053 | default: | |
3054 | break; | |
3055 | } | |
3056 | } | |
3057 | else | |
99a814a1 AM |
3058 | fix_new_exp (frag_now, |
3059 | f - frag_now->fr_literal, | |
3060 | 4, | |
252b5132 RH |
3061 | &fixups[i].exp, |
3062 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
3063 | ((bfd_reloc_code_real_type) | |
99a814a1 | 3064 | (fixups[i].opindex + (int) BFD_RELOC_UNUSED))); |
252b5132 RH |
3065 | } |
3066 | } | |
3067 | ||
3068 | /* Handle a macro. Gather all the operands, transform them as | |
3069 | described by the macro, and call md_assemble recursively. All the | |
3070 | operands are separated by commas; we don't accept parentheses | |
3071 | around operands here. */ | |
3072 | ||
3073 | static void | |
98027b10 | 3074 | ppc_macro (char *str, const struct powerpc_macro *macro) |
252b5132 RH |
3075 | { |
3076 | char *operands[10]; | |
3077 | unsigned int count; | |
3078 | char *s; | |
3079 | unsigned int len; | |
3080 | const char *format; | |
db557034 | 3081 | unsigned int arg; |
252b5132 RH |
3082 | char *send; |
3083 | char *complete; | |
3084 | ||
3085 | /* Gather the users operands into the operands array. */ | |
3086 | count = 0; | |
3087 | s = str; | |
3088 | while (1) | |
3089 | { | |
3090 | if (count >= sizeof operands / sizeof operands[0]) | |
3091 | break; | |
3092 | operands[count++] = s; | |
3093 | s = strchr (s, ','); | |
3094 | if (s == (char *) NULL) | |
3095 | break; | |
3096 | *s++ = '\0'; | |
81d4177b | 3097 | } |
252b5132 RH |
3098 | |
3099 | if (count != macro->operands) | |
3100 | { | |
3101 | as_bad (_("wrong number of operands")); | |
3102 | return; | |
3103 | } | |
3104 | ||
3105 | /* Work out how large the string must be (the size is unbounded | |
3106 | because it includes user input). */ | |
3107 | len = 0; | |
3108 | format = macro->format; | |
3109 | while (*format != '\0') | |
3110 | { | |
3111 | if (*format != '%') | |
3112 | { | |
3113 | ++len; | |
3114 | ++format; | |
3115 | } | |
3116 | else | |
3117 | { | |
3118 | arg = strtol (format + 1, &send, 10); | |
db557034 | 3119 | know (send != format && arg < count); |
252b5132 RH |
3120 | len += strlen (operands[arg]); |
3121 | format = send; | |
3122 | } | |
3123 | } | |
3124 | ||
3125 | /* Put the string together. */ | |
3126 | complete = s = (char *) alloca (len + 1); | |
3127 | format = macro->format; | |
3128 | while (*format != '\0') | |
3129 | { | |
3130 | if (*format != '%') | |
3131 | *s++ = *format++; | |
3132 | else | |
3133 | { | |
3134 | arg = strtol (format + 1, &send, 10); | |
3135 | strcpy (s, operands[arg]); | |
3136 | s += strlen (s); | |
3137 | format = send; | |
3138 | } | |
3139 | } | |
3140 | *s = '\0'; | |
3141 | ||
3142 | /* Assemble the constructed instruction. */ | |
3143 | md_assemble (complete); | |
81d4177b | 3144 | } |
252b5132 RH |
3145 | \f |
3146 | #ifdef OBJ_ELF | |
99a814a1 | 3147 | /* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */ |
252b5132 | 3148 | |
01e1a5bc | 3149 | bfd_vma |
98027b10 | 3150 | ppc_section_letter (int letter, char **ptr_msg) |
252b5132 RH |
3151 | { |
3152 | if (letter == 'e') | |
3153 | return SHF_EXCLUDE; | |
3154 | ||
13ae64f3 | 3155 | *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string"); |
711ef82f | 3156 | return -1; |
252b5132 RH |
3157 | } |
3158 | ||
01e1a5bc | 3159 | bfd_vma |
98027b10 | 3160 | ppc_section_word (char *str, size_t len) |
252b5132 | 3161 | { |
9de8d8f1 RH |
3162 | if (len == 7 && strncmp (str, "exclude", 7) == 0) |
3163 | return SHF_EXCLUDE; | |
252b5132 | 3164 | |
9de8d8f1 | 3165 | return -1; |
252b5132 RH |
3166 | } |
3167 | ||
3168 | int | |
98027b10 | 3169 | ppc_section_type (char *str, size_t len) |
252b5132 | 3170 | { |
9de8d8f1 RH |
3171 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
3172 | return SHT_ORDERED; | |
252b5132 | 3173 | |
9de8d8f1 | 3174 | return -1; |
252b5132 RH |
3175 | } |
3176 | ||
3177 | int | |
01e1a5bc | 3178 | ppc_section_flags (flagword flags, bfd_vma attr, int type) |
252b5132 RH |
3179 | { |
3180 | if (type == SHT_ORDERED) | |
3181 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
3182 | ||
3183 | if (attr & SHF_EXCLUDE) | |
3184 | flags |= SEC_EXCLUDE; | |
3185 | ||
3186 | return flags; | |
3187 | } | |
3188 | #endif /* OBJ_ELF */ | |
3189 | ||
3190 | \f | |
3191 | /* Pseudo-op handling. */ | |
3192 | ||
3193 | /* The .byte pseudo-op. This is similar to the normal .byte | |
3194 | pseudo-op, but it can also take a single ASCII string. */ | |
3195 | ||
3196 | static void | |
98027b10 | 3197 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3198 | { |
3199 | if (*input_line_pointer != '\"') | |
3200 | { | |
3201 | cons (1); | |
3202 | return; | |
3203 | } | |
3204 | ||
3205 | /* Gather characters. A real double quote is doubled. Unusual | |
3206 | characters are not permitted. */ | |
3207 | ++input_line_pointer; | |
3208 | while (1) | |
3209 | { | |
3210 | char c; | |
3211 | ||
3212 | c = *input_line_pointer++; | |
3213 | ||
3214 | if (c == '\"') | |
3215 | { | |
3216 | if (*input_line_pointer != '\"') | |
3217 | break; | |
3218 | ++input_line_pointer; | |
3219 | } | |
3220 | ||
3221 | FRAG_APPEND_1_CHAR (c); | |
3222 | } | |
3223 | ||
3224 | demand_empty_rest_of_line (); | |
3225 | } | |
3226 | \f | |
3227 | #ifdef OBJ_XCOFF | |
3228 | ||
3229 | /* XCOFF specific pseudo-op handling. */ | |
3230 | ||
3231 | /* This is set if we are creating a .stabx symbol, since we don't want | |
3232 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 3233 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
3234 | |
3235 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
3236 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 3237 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 3238 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
3239 | |
3240 | static void | |
98027b10 | 3241 | ppc_comm (int lcomm) |
252b5132 RH |
3242 | { |
3243 | asection *current_seg = now_seg; | |
3244 | subsegT current_subseg = now_subseg; | |
3245 | char *name; | |
3246 | char endc; | |
3247 | char *end_name; | |
3248 | offsetT size; | |
3249 | offsetT align; | |
3250 | symbolS *lcomm_sym = NULL; | |
3251 | symbolS *sym; | |
3252 | char *pfrag; | |
3253 | ||
3254 | name = input_line_pointer; | |
3255 | endc = get_symbol_end (); | |
3256 | end_name = input_line_pointer; | |
3257 | *end_name = endc; | |
3258 | ||
3259 | if (*input_line_pointer != ',') | |
3260 | { | |
3261 | as_bad (_("missing size")); | |
3262 | ignore_rest_of_line (); | |
3263 | return; | |
3264 | } | |
3265 | ++input_line_pointer; | |
3266 | ||
3267 | size = get_absolute_expression (); | |
3268 | if (size < 0) | |
3269 | { | |
3270 | as_bad (_("negative size")); | |
3271 | ignore_rest_of_line (); | |
3272 | return; | |
3273 | } | |
3274 | ||
3275 | if (! lcomm) | |
3276 | { | |
3277 | /* The third argument to .comm is the alignment. */ | |
3278 | if (*input_line_pointer != ',') | |
1ad63b2f | 3279 | align = 2; |
252b5132 RH |
3280 | else |
3281 | { | |
3282 | ++input_line_pointer; | |
3283 | align = get_absolute_expression (); | |
3284 | if (align <= 0) | |
3285 | { | |
3286 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3287 | align = 2; |
252b5132 RH |
3288 | } |
3289 | } | |
3290 | } | |
3291 | else | |
3292 | { | |
3293 | char *lcomm_name; | |
3294 | char lcomm_endc; | |
3295 | ||
1ad63b2f | 3296 | if (size <= 4) |
252b5132 RH |
3297 | align = 2; |
3298 | else | |
3299 | align = 3; | |
3300 | ||
3301 | /* The third argument to .lcomm appears to be the real local | |
3302 | common symbol to create. References to the symbol named in | |
3303 | the first argument are turned into references to the third | |
3304 | argument. */ | |
3305 | if (*input_line_pointer != ',') | |
3306 | { | |
3307 | as_bad (_("missing real symbol name")); | |
3308 | ignore_rest_of_line (); | |
3309 | return; | |
3310 | } | |
3311 | ++input_line_pointer; | |
3312 | ||
3313 | lcomm_name = input_line_pointer; | |
3314 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3315 | |
252b5132 RH |
3316 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3317 | ||
3318 | *input_line_pointer = lcomm_endc; | |
3319 | } | |
3320 | ||
3321 | *end_name = '\0'; | |
3322 | sym = symbol_find_or_make (name); | |
3323 | *end_name = endc; | |
3324 | ||
3325 | if (S_IS_DEFINED (sym) | |
3326 | || S_GET_VALUE (sym) != 0) | |
3327 | { | |
3328 | as_bad (_("attempt to redefine symbol")); | |
3329 | ignore_rest_of_line (); | |
3330 | return; | |
3331 | } | |
81d4177b | 3332 | |
252b5132 | 3333 | record_alignment (bss_section, align); |
81d4177b | 3334 | |
252b5132 RH |
3335 | if (! lcomm |
3336 | || ! S_IS_DEFINED (lcomm_sym)) | |
3337 | { | |
3338 | symbolS *def_sym; | |
3339 | offsetT def_size; | |
3340 | ||
3341 | if (! lcomm) | |
3342 | { | |
3343 | def_sym = sym; | |
3344 | def_size = size; | |
3345 | S_SET_EXTERNAL (sym); | |
3346 | } | |
3347 | else | |
3348 | { | |
809ffe0d | 3349 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3350 | def_sym = lcomm_sym; |
3351 | def_size = 0; | |
3352 | } | |
3353 | ||
3354 | subseg_set (bss_section, 1); | |
3355 | frag_align (align, 0, 0); | |
81d4177b | 3356 | |
809ffe0d | 3357 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3358 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3359 | def_size, (char *) NULL); | |
3360 | *pfrag = 0; | |
3361 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3362 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3363 | } |
3364 | else if (lcomm) | |
3365 | { | |
3366 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3367 | symbol_get_frag (lcomm_sym)->fr_offset = |
3368 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3369 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3370 | if (align > symbol_get_tc (lcomm_sym)->align) |
3371 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3372 | } |
3373 | ||
3374 | if (lcomm) | |
3375 | { | |
3376 | /* Make sym an offset from lcomm_sym. */ | |
3377 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3378 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3379 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3380 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3381 | } |
3382 | ||
3383 | subseg_set (current_seg, current_subseg); | |
3384 | ||
3385 | demand_empty_rest_of_line (); | |
3386 | } | |
3387 | ||
3388 | /* The .csect pseudo-op. This switches us into a different | |
3389 | subsegment. The first argument is a symbol whose value is the | |
3390 | start of the .csect. In COFF, csect symbols get special aux | |
3391 | entries defined by the x_csect field of union internal_auxent. The | |
3392 | optional second argument is the alignment (the default is 2). */ | |
3393 | ||
3394 | static void | |
98027b10 | 3395 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3396 | { |
3397 | char *name; | |
3398 | char endc; | |
3399 | symbolS *sym; | |
931e13a6 | 3400 | offsetT align; |
252b5132 RH |
3401 | |
3402 | name = input_line_pointer; | |
3403 | endc = get_symbol_end (); | |
81d4177b | 3404 | |
252b5132 RH |
3405 | sym = symbol_find_or_make (name); |
3406 | ||
3407 | *input_line_pointer = endc; | |
3408 | ||
3409 | if (S_GET_NAME (sym)[0] == '\0') | |
3410 | { | |
3411 | /* An unnamed csect is assumed to be [PR]. */ | |
809ffe0d | 3412 | symbol_get_tc (sym)->class = XMC_PR; |
252b5132 RH |
3413 | } |
3414 | ||
931e13a6 | 3415 | align = 2; |
252b5132 RH |
3416 | if (*input_line_pointer == ',') |
3417 | { | |
3418 | ++input_line_pointer; | |
931e13a6 | 3419 | align = get_absolute_expression (); |
252b5132 RH |
3420 | } |
3421 | ||
931e13a6 AM |
3422 | ppc_change_csect (sym, align); |
3423 | ||
252b5132 RH |
3424 | demand_empty_rest_of_line (); |
3425 | } | |
3426 | ||
3427 | /* Change to a different csect. */ | |
3428 | ||
3429 | static void | |
98027b10 | 3430 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
3431 | { |
3432 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3433 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3434 | else |
3435 | { | |
3436 | symbolS **list_ptr; | |
3437 | int after_toc; | |
3438 | int hold_chunksize; | |
3439 | symbolS *list; | |
931e13a6 AM |
3440 | int is_code; |
3441 | segT sec; | |
252b5132 RH |
3442 | |
3443 | /* This is a new csect. We need to look at the symbol class to | |
3444 | figure out whether it should go in the text section or the | |
3445 | data section. */ | |
3446 | after_toc = 0; | |
931e13a6 | 3447 | is_code = 0; |
809ffe0d | 3448 | switch (symbol_get_tc (sym)->class) |
252b5132 RH |
3449 | { |
3450 | case XMC_PR: | |
3451 | case XMC_RO: | |
3452 | case XMC_DB: | |
3453 | case XMC_GL: | |
3454 | case XMC_XO: | |
3455 | case XMC_SV: | |
3456 | case XMC_TI: | |
3457 | case XMC_TB: | |
3458 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3459 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3460 | ++ppc_text_subsegment; |
3461 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3462 | is_code = 1; |
252b5132 RH |
3463 | break; |
3464 | case XMC_RW: | |
3465 | case XMC_TC0: | |
3466 | case XMC_TC: | |
3467 | case XMC_DS: | |
3468 | case XMC_UA: | |
3469 | case XMC_BS: | |
3470 | case XMC_UC: | |
3471 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3472 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3473 | == ppc_data_subsegment)) | |
252b5132 RH |
3474 | after_toc = 1; |
3475 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3476 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3477 | ++ppc_data_subsegment; |
3478 | list_ptr = &ppc_data_csects; | |
3479 | break; | |
3480 | default: | |
3481 | abort (); | |
3482 | } | |
3483 | ||
3484 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3485 | changing subsegments, so that we don't use a lot of memory |
3486 | space for what may be a small section. */ | |
252b5132 RH |
3487 | hold_chunksize = chunksize; |
3488 | chunksize = 64; | |
3489 | ||
931e13a6 AM |
3490 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3491 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3492 | |
3493 | chunksize = hold_chunksize; | |
3494 | ||
3495 | if (after_toc) | |
3496 | ppc_after_toc_frag = frag_now; | |
3497 | ||
931e13a6 AM |
3498 | record_alignment (sec, align); |
3499 | if (is_code) | |
3500 | frag_align_code (align, 0); | |
3501 | else | |
3502 | frag_align (align, 0, 0); | |
3503 | ||
809ffe0d | 3504 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3505 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3506 | ||
931e13a6 | 3507 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3508 | symbol_get_tc (sym)->output = 1; |
3509 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3510 | |
252b5132 | 3511 | for (list = *list_ptr; |
809ffe0d ILT |
3512 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3513 | list = symbol_get_tc (list)->next) | |
252b5132 | 3514 | ; |
809ffe0d | 3515 | symbol_get_tc (list)->next = sym; |
81d4177b | 3516 | |
252b5132 | 3517 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3518 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3519 | &symbol_lastP); | |
252b5132 RH |
3520 | } |
3521 | ||
3522 | ppc_current_csect = sym; | |
3523 | } | |
3524 | ||
3525 | /* This function handles the .text and .data pseudo-ops. These | |
3526 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3527 | convenience of people who aren't used to XCOFF. */ | |
3528 | ||
3529 | static void | |
98027b10 | 3530 | ppc_section (int type) |
252b5132 RH |
3531 | { |
3532 | const char *name; | |
3533 | symbolS *sym; | |
3534 | ||
3535 | if (type == 't') | |
3536 | name = ".text[PR]"; | |
3537 | else if (type == 'd') | |
3538 | name = ".data[RW]"; | |
3539 | else | |
3540 | abort (); | |
3541 | ||
3542 | sym = symbol_find_or_make (name); | |
3543 | ||
931e13a6 | 3544 | ppc_change_csect (sym, 2); |
252b5132 RH |
3545 | |
3546 | demand_empty_rest_of_line (); | |
3547 | } | |
3548 | ||
3549 | /* This function handles the .section pseudo-op. This is mostly to | |
3550 | give an error, since XCOFF only supports .text, .data and .bss, but | |
3551 | we do permit the user to name the text or data section. */ | |
3552 | ||
3553 | static void | |
98027b10 | 3554 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3555 | { |
3556 | char *user_name; | |
3557 | const char *real_name; | |
3558 | char c; | |
3559 | symbolS *sym; | |
3560 | ||
3561 | user_name = input_line_pointer; | |
3562 | c = get_symbol_end (); | |
3563 | ||
3564 | if (strcmp (user_name, ".text") == 0) | |
3565 | real_name = ".text[PR]"; | |
3566 | else if (strcmp (user_name, ".data") == 0) | |
3567 | real_name = ".data[RW]"; | |
3568 | else | |
3569 | { | |
3570 | as_bad (_("The XCOFF file format does not support arbitrary sections")); | |
3571 | *input_line_pointer = c; | |
3572 | ignore_rest_of_line (); | |
3573 | return; | |
3574 | } | |
3575 | ||
3576 | *input_line_pointer = c; | |
3577 | ||
3578 | sym = symbol_find_or_make (real_name); | |
3579 | ||
931e13a6 | 3580 | ppc_change_csect (sym, 2); |
252b5132 RH |
3581 | |
3582 | demand_empty_rest_of_line (); | |
3583 | } | |
3584 | ||
3585 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
3586 | ||
3587 | static void | |
98027b10 | 3588 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3589 | { |
3590 | char *name; | |
3591 | char endc; | |
3592 | ||
3593 | name = input_line_pointer; | |
3594 | endc = get_symbol_end (); | |
3595 | ||
3596 | (void) symbol_find_or_make (name); | |
3597 | ||
3598 | *input_line_pointer = endc; | |
3599 | ||
3600 | demand_empty_rest_of_line (); | |
3601 | } | |
3602 | ||
3603 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
3604 | ||
3605 | static void | |
98027b10 | 3606 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3607 | { |
3608 | char *name; | |
3609 | char endc; | |
3610 | symbolS *sym; | |
3611 | ||
3612 | name = input_line_pointer; | |
3613 | endc = get_symbol_end (); | |
3614 | ||
3615 | sym = symbol_find_or_make (name); | |
3616 | ||
3617 | *input_line_pointer = endc; | |
3618 | ||
809ffe0d | 3619 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3620 | |
3621 | demand_empty_rest_of_line (); | |
3622 | } | |
3623 | ||
3624 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, | |
3625 | although I don't know why it bothers. */ | |
3626 | ||
3627 | static void | |
98027b10 | 3628 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3629 | { |
3630 | char *name; | |
3631 | char endc; | |
3632 | symbolS *sym; | |
3633 | int len; | |
3634 | ||
3635 | name = input_line_pointer; | |
3636 | endc = get_symbol_end (); | |
3637 | ||
3638 | sym = symbol_find_or_make (name); | |
3639 | ||
3640 | *input_line_pointer = endc; | |
3641 | ||
3642 | if (*input_line_pointer != ',') | |
3643 | { | |
3644 | as_bad (_("missing rename string")); | |
3645 | ignore_rest_of_line (); | |
3646 | return; | |
3647 | } | |
3648 | ++input_line_pointer; | |
3649 | ||
809ffe0d | 3650 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
3651 | |
3652 | demand_empty_rest_of_line (); | |
3653 | } | |
3654 | ||
3655 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
3656 | pseudo-op, but slightly different. A sample is | |
3657 | .stabx "main:F-1",.main,142,0 | |
3658 | The first argument is the symbol name to create. The second is the | |
3659 | value, and the third is the storage class. The fourth seems to be | |
3660 | always zero, and I am assuming it is the type. */ | |
3661 | ||
3662 | static void | |
98027b10 | 3663 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3664 | { |
3665 | char *name; | |
3666 | int len; | |
3667 | symbolS *sym; | |
3668 | expressionS exp; | |
3669 | ||
3670 | name = demand_copy_C_string (&len); | |
3671 | ||
3672 | if (*input_line_pointer != ',') | |
3673 | { | |
3674 | as_bad (_("missing value")); | |
3675 | return; | |
3676 | } | |
3677 | ++input_line_pointer; | |
3678 | ||
b34976b6 | 3679 | ppc_stab_symbol = TRUE; |
252b5132 | 3680 | sym = symbol_make (name); |
b34976b6 | 3681 | ppc_stab_symbol = FALSE; |
252b5132 | 3682 | |
809ffe0d | 3683 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
3684 | |
3685 | (void) expression (&exp); | |
3686 | ||
3687 | switch (exp.X_op) | |
3688 | { | |
3689 | case O_illegal: | |
3690 | case O_absent: | |
3691 | case O_big: | |
3692 | as_bad (_("illegal .stabx expression; zero assumed")); | |
3693 | exp.X_add_number = 0; | |
3694 | /* Fall through. */ | |
3695 | case O_constant: | |
3696 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 3697 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
3698 | break; |
3699 | ||
3700 | case O_symbol: | |
3701 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 3702 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
3703 | else |
3704 | { | |
3705 | S_SET_VALUE (sym, | |
3706 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 3707 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
3708 | } |
3709 | break; | |
3710 | ||
3711 | default: | |
3712 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
3713 | fail at some later point, but this is probably the right |
3714 | thing to do here. */ | |
809ffe0d | 3715 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
3716 | break; |
3717 | } | |
3718 | ||
3719 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 3720 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
3721 | |
3722 | if (*input_line_pointer != ',') | |
3723 | { | |
3724 | as_bad (_("missing class")); | |
3725 | return; | |
3726 | } | |
3727 | ++input_line_pointer; | |
3728 | ||
3729 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
3730 | ||
3731 | if (*input_line_pointer != ',') | |
3732 | { | |
3733 | as_bad (_("missing type")); | |
3734 | return; | |
3735 | } | |
3736 | ++input_line_pointer; | |
3737 | ||
3738 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
3739 | ||
809ffe0d | 3740 | symbol_get_tc (sym)->output = 1; |
252b5132 | 3741 | |
6877bb43 | 3742 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) { |
99a814a1 | 3743 | |
809ffe0d | 3744 | symbol_get_tc (sym)->within = ppc_current_block; |
252b5132 | 3745 | |
41ea10b1 | 3746 | /* In this case : |
99a814a1 | 3747 | |
41ea10b1 TR |
3748 | .bs name |
3749 | .stabx "z",arrays_,133,0 | |
3750 | .es | |
99a814a1 | 3751 | |
41ea10b1 | 3752 | .comm arrays_,13768,3 |
99a814a1 | 3753 | |
41ea10b1 TR |
3754 | resolve_symbol_value will copy the exp's "within" into sym's when the |
3755 | offset is 0. Since this seems to be corner case problem, | |
3756 | only do the correction for storage class C_STSYM. A better solution | |
0baf16f2 | 3757 | would be to have the tc field updated in ppc_symbol_new_hook. */ |
99a814a1 AM |
3758 | |
3759 | if (exp.X_op == O_symbol) | |
41ea10b1 TR |
3760 | { |
3761 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
3762 | } | |
6877bb43 | 3763 | } |
99a814a1 | 3764 | |
252b5132 RH |
3765 | if (exp.X_op != O_symbol |
3766 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
3767 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
3768 | ppc_frob_label (sym); | |
3769 | else | |
3770 | { | |
3771 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
3772 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
3773 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
3774 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
3775 | } |
3776 | ||
3777 | demand_empty_rest_of_line (); | |
3778 | } | |
3779 | ||
3780 | /* The .function pseudo-op. This takes several arguments. The first | |
3781 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 3782 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
3783 | uses the same name for both. I have no idea what the third and |
3784 | fourth arguments are meant to be. The optional fifth argument is | |
3785 | an expression for the size of the function. In COFF this symbol | |
3786 | gets an aux entry like that used for a csect. */ | |
3787 | ||
3788 | static void | |
98027b10 | 3789 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3790 | { |
3791 | char *name; | |
3792 | char endc; | |
3793 | char *s; | |
3794 | symbolS *ext_sym; | |
3795 | symbolS *lab_sym; | |
3796 | ||
3797 | name = input_line_pointer; | |
3798 | endc = get_symbol_end (); | |
3799 | ||
3800 | /* Ignore any [PR] suffix. */ | |
3801 | name = ppc_canonicalize_symbol_name (name); | |
3802 | s = strchr (name, '['); | |
3803 | if (s != (char *) NULL | |
3804 | && strcmp (s + 1, "PR]") == 0) | |
3805 | *s = '\0'; | |
3806 | ||
3807 | ext_sym = symbol_find_or_make (name); | |
3808 | ||
3809 | *input_line_pointer = endc; | |
3810 | ||
3811 | if (*input_line_pointer != ',') | |
3812 | { | |
3813 | as_bad (_("missing symbol name")); | |
3814 | ignore_rest_of_line (); | |
3815 | return; | |
3816 | } | |
3817 | ++input_line_pointer; | |
3818 | ||
3819 | name = input_line_pointer; | |
3820 | endc = get_symbol_end (); | |
3821 | ||
3822 | lab_sym = symbol_find_or_make (name); | |
3823 | ||
3824 | *input_line_pointer = endc; | |
3825 | ||
3826 | if (ext_sym != lab_sym) | |
3827 | { | |
809ffe0d ILT |
3828 | expressionS exp; |
3829 | ||
3830 | exp.X_op = O_symbol; | |
3831 | exp.X_add_symbol = lab_sym; | |
3832 | exp.X_op_symbol = NULL; | |
3833 | exp.X_add_number = 0; | |
3834 | exp.X_unsigned = 0; | |
3835 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
3836 | } |
3837 | ||
809ffe0d ILT |
3838 | if (symbol_get_tc (ext_sym)->class == -1) |
3839 | symbol_get_tc (ext_sym)->class = XMC_PR; | |
3840 | symbol_get_tc (ext_sym)->output = 1; | |
252b5132 RH |
3841 | |
3842 | if (*input_line_pointer == ',') | |
3843 | { | |
3844 | expressionS ignore; | |
3845 | ||
3846 | /* Ignore the third argument. */ | |
3847 | ++input_line_pointer; | |
3848 | expression (&ignore); | |
3849 | if (*input_line_pointer == ',') | |
3850 | { | |
3851 | /* Ignore the fourth argument. */ | |
3852 | ++input_line_pointer; | |
3853 | expression (&ignore); | |
3854 | if (*input_line_pointer == ',') | |
3855 | { | |
3856 | /* The fifth argument is the function size. */ | |
3857 | ++input_line_pointer; | |
809ffe0d ILT |
3858 | symbol_get_tc (ext_sym)->size = symbol_new ("L0\001", |
3859 | absolute_section, | |
3860 | (valueT) 0, | |
3861 | &zero_address_frag); | |
3862 | pseudo_set (symbol_get_tc (ext_sym)->size); | |
252b5132 RH |
3863 | } |
3864 | } | |
3865 | } | |
3866 | ||
3867 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
3868 | SF_SET_FUNCTION (ext_sym); | |
3869 | SF_SET_PROCESS (ext_sym); | |
3870 | coff_add_linesym (ext_sym); | |
3871 | ||
3872 | demand_empty_rest_of_line (); | |
3873 | } | |
3874 | ||
3875 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
3876 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
3877 | with the correct line number */ | |
5d6255fe | 3878 | |
8642cce8 | 3879 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
3880 | |
3881 | static void | |
98027b10 | 3882 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3883 | { |
3884 | symbolS *sym; | |
3885 | ||
3886 | sym = symbol_make (".bf"); | |
3887 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3888 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3889 | S_SET_VALUE (sym, frag_now_fix ()); |
3890 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
3891 | ||
3892 | coff_line_base = get_absolute_expression (); | |
3893 | ||
3894 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
3895 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
3896 | ||
8642cce8 | 3897 | /* Line number for bi. */ |
5d6255fe | 3898 | if (saved_bi_sym) |
8642cce8 TR |
3899 | { |
3900 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
3901 | saved_bi_sym = 0; | |
3902 | } | |
5d6255fe | 3903 | |
8642cce8 | 3904 | |
809ffe0d | 3905 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3906 | |
3907 | ppc_frob_label (sym); | |
3908 | ||
3909 | demand_empty_rest_of_line (); | |
3910 | } | |
3911 | ||
3912 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
3913 | ".ef", except that the line number is absolute, not relative to the | |
3914 | most recent ".bf" symbol. */ | |
3915 | ||
3916 | static void | |
98027b10 | 3917 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3918 | { |
3919 | symbolS *sym; | |
3920 | ||
3921 | sym = symbol_make (".ef"); | |
3922 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3923 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3924 | S_SET_VALUE (sym, frag_now_fix ()); |
3925 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
3926 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
3927 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 3928 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
3929 | |
3930 | ppc_frob_label (sym); | |
3931 | ||
3932 | demand_empty_rest_of_line (); | |
3933 | } | |
3934 | ||
3935 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
3936 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
3937 | the symbol list. The value of .bi will be know when the next .bf |
3938 | is encountered. */ | |
252b5132 RH |
3939 | |
3940 | static void | |
98027b10 | 3941 | ppc_biei (int ei) |
252b5132 RH |
3942 | { |
3943 | static symbolS *last_biei; | |
3944 | ||
3945 | char *name; | |
3946 | int len; | |
3947 | symbolS *sym; | |
3948 | symbolS *look; | |
3949 | ||
3950 | name = demand_copy_C_string (&len); | |
3951 | ||
3952 | /* The value of these symbols is actually file offset. Here we set | |
3953 | the value to the index into the line number entries. In | |
3954 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
3955 | to do the right thing. */ | |
3956 | ||
3957 | sym = symbol_make (name); | |
3958 | /* obj-coff.c currently only handles line numbers correctly in the | |
3959 | .text section. */ | |
3960 | S_SET_SEGMENT (sym, text_section); | |
3961 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 3962 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
3963 | |
3964 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 3965 | symbol_get_tc (sym)->output = 1; |
81d4177b | 3966 | |
8642cce8 | 3967 | /* Save bi. */ |
5d6255fe | 3968 | if (ei) |
8642cce8 TR |
3969 | saved_bi_sym = 0; |
3970 | else | |
3971 | saved_bi_sym = sym; | |
3972 | ||
252b5132 RH |
3973 | for (look = last_biei ? last_biei : symbol_rootP; |
3974 | (look != (symbolS *) NULL | |
3975 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
3976 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
3977 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
3978 | look = symbol_next (look)) | |
3979 | ; | |
3980 | if (look != (symbolS *) NULL) | |
3981 | { | |
3982 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
3983 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
3984 | last_biei = sym; | |
3985 | } | |
3986 | ||
3987 | demand_empty_rest_of_line (); | |
3988 | } | |
3989 | ||
3990 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
3991 | There is one argument, which is a csect symbol. The value of the | |
3992 | .bs symbol is the index of this csect symbol. */ | |
3993 | ||
3994 | static void | |
98027b10 | 3995 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3996 | { |
3997 | char *name; | |
3998 | char endc; | |
3999 | symbolS *csect; | |
4000 | symbolS *sym; | |
4001 | ||
4002 | if (ppc_current_block != NULL) | |
4003 | as_bad (_("nested .bs blocks")); | |
4004 | ||
4005 | name = input_line_pointer; | |
4006 | endc = get_symbol_end (); | |
4007 | ||
4008 | csect = symbol_find_or_make (name); | |
4009 | ||
4010 | *input_line_pointer = endc; | |
4011 | ||
4012 | sym = symbol_make (".bs"); | |
4013 | S_SET_SEGMENT (sym, now_seg); | |
4014 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
4015 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4016 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 4017 | |
809ffe0d | 4018 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
4019 | |
4020 | ppc_frob_label (sym); | |
4021 | ||
4022 | ppc_current_block = sym; | |
4023 | ||
4024 | demand_empty_rest_of_line (); | |
4025 | } | |
4026 | ||
4027 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
4028 | ||
4029 | static void | |
98027b10 | 4030 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4031 | { |
4032 | symbolS *sym; | |
4033 | ||
4034 | if (ppc_current_block == NULL) | |
4035 | as_bad (_(".es without preceding .bs")); | |
4036 | ||
4037 | sym = symbol_make (".es"); | |
4038 | S_SET_SEGMENT (sym, now_seg); | |
4039 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
4040 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4041 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4042 | |
4043 | ppc_frob_label (sym); | |
4044 | ||
4045 | ppc_current_block = NULL; | |
4046 | ||
4047 | demand_empty_rest_of_line (); | |
4048 | } | |
4049 | ||
4050 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
4051 | line number. */ | |
4052 | ||
4053 | static void | |
98027b10 | 4054 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4055 | { |
4056 | symbolS *sym; | |
4057 | ||
4058 | sym = symbol_make (".bb"); | |
4059 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4060 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4061 | S_SET_VALUE (sym, frag_now_fix ()); |
4062 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4063 | ||
4064 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4065 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
4066 | ||
809ffe0d | 4067 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4068 | |
4069 | SF_SET_PROCESS (sym); | |
4070 | ||
4071 | ppc_frob_label (sym); | |
4072 | ||
4073 | demand_empty_rest_of_line (); | |
4074 | } | |
4075 | ||
4076 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
4077 | line number. */ | |
4078 | ||
4079 | static void | |
98027b10 | 4080 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4081 | { |
4082 | symbolS *sym; | |
4083 | ||
4084 | sym = symbol_make (".eb"); | |
4085 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4086 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4087 | S_SET_VALUE (sym, frag_now_fix ()); |
4088 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4089 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4090 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4091 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4092 | |
4093 | SF_SET_PROCESS (sym); | |
4094 | ||
4095 | ppc_frob_label (sym); | |
4096 | ||
4097 | demand_empty_rest_of_line (); | |
4098 | } | |
4099 | ||
4100 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
4101 | specified name. */ | |
4102 | ||
4103 | static void | |
98027b10 | 4104 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4105 | { |
4106 | char *name; | |
4107 | int len; | |
4108 | symbolS *sym; | |
4109 | ||
4110 | name = demand_copy_C_string (&len); | |
4111 | sym = symbol_make (name); | |
4112 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4113 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4114 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
4115 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4116 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4117 | |
4118 | ppc_frob_label (sym); | |
4119 | ||
4120 | demand_empty_rest_of_line (); | |
4121 | } | |
4122 | ||
4123 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
4124 | ||
4125 | static void | |
98027b10 | 4126 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4127 | { |
4128 | symbolS *sym; | |
4129 | ||
4130 | sym = symbol_make (".ec"); | |
4131 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4132 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4133 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
4134 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4135 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4136 | |
4137 | ppc_frob_label (sym); | |
4138 | ||
4139 | demand_empty_rest_of_line (); | |
4140 | } | |
4141 | ||
4142 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
4143 | ||
4144 | static void | |
98027b10 | 4145 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4146 | { |
4147 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 4148 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
4149 | else |
4150 | { | |
4151 | subsegT subseg; | |
4152 | symbolS *sym; | |
4153 | symbolS *list; | |
81d4177b | 4154 | |
252b5132 RH |
4155 | subseg = ppc_data_subsegment; |
4156 | ++ppc_data_subsegment; | |
4157 | ||
4158 | subseg_new (segment_name (data_section), subseg); | |
4159 | ppc_toc_frag = frag_now; | |
4160 | ||
4161 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 4162 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4163 | S_SET_SEGMENT (sym, data_section); |
4164 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
4165 | symbol_get_tc (sym)->subseg = subseg; |
4166 | symbol_get_tc (sym)->output = 1; | |
4167 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
4168 | |
4169 | ppc_toc_csect = sym; | |
81d4177b | 4170 | |
252b5132 | 4171 | for (list = ppc_data_csects; |
809ffe0d ILT |
4172 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4173 | list = symbol_get_tc (list)->next) | |
252b5132 | 4174 | ; |
809ffe0d | 4175 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
4176 | |
4177 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4178 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4179 | &symbol_lastP); | |
252b5132 RH |
4180 | } |
4181 | ||
4182 | ppc_current_csect = ppc_toc_csect; | |
4183 | ||
4184 | demand_empty_rest_of_line (); | |
4185 | } | |
4186 | ||
4187 | /* The AIX assembler automatically aligns the operands of a .long or | |
4188 | .short pseudo-op, and we want to be compatible. */ | |
4189 | ||
4190 | static void | |
98027b10 | 4191 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
4192 | { |
4193 | frag_align (log_size, 0, 0); | |
4194 | record_alignment (now_seg, log_size); | |
4195 | cons (1 << log_size); | |
4196 | } | |
4197 | ||
4198 | static void | |
98027b10 | 4199 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
4200 | { |
4201 | expressionS exp; | |
4202 | int byte_count; | |
4203 | ||
4204 | (void) expression (&exp); | |
4205 | ||
4206 | if (exp.X_op != O_constant) | |
4207 | { | |
4208 | as_bad (_("non-constant byte count")); | |
4209 | return; | |
4210 | } | |
4211 | ||
4212 | byte_count = exp.X_add_number; | |
4213 | ||
4214 | if (*input_line_pointer != ',') | |
4215 | { | |
4216 | as_bad (_("missing value")); | |
4217 | return; | |
4218 | } | |
4219 | ||
4220 | ++input_line_pointer; | |
4221 | cons (byte_count); | |
4222 | } | |
4223 | ||
4224 | #endif /* OBJ_XCOFF */ | |
0baf16f2 | 4225 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
4226 | \f |
4227 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
4228 | ELF. This takes two or more arguments. | |
4229 | ||
4230 | When generating XCOFF output, the first argument is the name to | |
4231 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 4232 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4233 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4234 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4235 | depends on target word size. A 32-bit target uses 4-byte values, a |
4236 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4237 | |
4238 | When not generating XCOFF output, the arguments are the same, but | |
4239 | the first argument is simply ignored. */ | |
4240 | ||
4241 | static void | |
98027b10 | 4242 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4243 | { |
4244 | #ifdef OBJ_XCOFF | |
4245 | ||
4246 | /* Define the TOC symbol name. */ | |
4247 | { | |
4248 | char *name; | |
4249 | char endc; | |
4250 | symbolS *sym; | |
4251 | ||
4252 | if (ppc_toc_csect == (symbolS *) NULL | |
4253 | || ppc_toc_csect != ppc_current_csect) | |
4254 | { | |
4255 | as_bad (_(".tc not in .toc section")); | |
4256 | ignore_rest_of_line (); | |
4257 | return; | |
4258 | } | |
4259 | ||
4260 | name = input_line_pointer; | |
4261 | endc = get_symbol_end (); | |
4262 | ||
4263 | sym = symbol_find_or_make (name); | |
4264 | ||
4265 | *input_line_pointer = endc; | |
4266 | ||
4267 | if (S_IS_DEFINED (sym)) | |
4268 | { | |
4269 | symbolS *label; | |
4270 | ||
809ffe0d ILT |
4271 | label = symbol_get_tc (ppc_current_csect)->within; |
4272 | if (symbol_get_tc (label)->class != XMC_TC0) | |
252b5132 RH |
4273 | { |
4274 | as_bad (_(".tc with no label")); | |
4275 | ignore_rest_of_line (); | |
4276 | return; | |
4277 | } | |
4278 | ||
4279 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4280 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4281 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4282 | ||
4283 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4284 | ++input_line_pointer; | |
4285 | ||
4286 | return; | |
4287 | } | |
4288 | ||
4289 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4290 | symbol_set_frag (sym, frag_now); |
252b5132 | 4291 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
809ffe0d ILT |
4292 | symbol_get_tc (sym)->class = XMC_TC; |
4293 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4294 | |
4295 | ppc_frob_label (sym); | |
4296 | } | |
4297 | ||
0baf16f2 AM |
4298 | #endif /* OBJ_XCOFF */ |
4299 | #ifdef OBJ_ELF | |
9c7977b3 | 4300 | int align; |
252b5132 RH |
4301 | |
4302 | /* Skip the TOC symbol name. */ | |
4303 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 4304 | || *input_line_pointer == ' ' |
252b5132 RH |
4305 | || *input_line_pointer == '[' |
4306 | || *input_line_pointer == ']' | |
4307 | || *input_line_pointer == '{' | |
4308 | || *input_line_pointer == '}') | |
4309 | ++input_line_pointer; | |
4310 | ||
0baf16f2 | 4311 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4312 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4313 | frag_align (align, 0, 0); |
4314 | record_alignment (now_seg, align); | |
0baf16f2 | 4315 | #endif /* OBJ_ELF */ |
252b5132 RH |
4316 | |
4317 | if (*input_line_pointer != ',') | |
4318 | demand_empty_rest_of_line (); | |
4319 | else | |
4320 | { | |
4321 | ++input_line_pointer; | |
2b3c4602 | 4322 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4323 | } |
4324 | } | |
0baf16f2 AM |
4325 | |
4326 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4327 | |
4328 | static void | |
98027b10 | 4329 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 4330 | { |
69c040df AM |
4331 | char *cpu_string; |
4332 | #define MAX_HISTORY 100 | |
fa452fa6 | 4333 | static ppc_cpu_t *cpu_history; |
69c040df AM |
4334 | static int curr_hist; |
4335 | ||
4336 | SKIP_WHITESPACE (); | |
4337 | ||
4338 | if (*input_line_pointer == '"') | |
4339 | { | |
4340 | int len; | |
4341 | cpu_string = demand_copy_C_string (&len); | |
4342 | } | |
4343 | else | |
4344 | { | |
4345 | char c; | |
4346 | cpu_string = input_line_pointer; | |
4347 | c = get_symbol_end (); | |
4348 | cpu_string = xstrdup (cpu_string); | |
4349 | *input_line_pointer = c; | |
4350 | } | |
4351 | ||
4352 | if (cpu_string != NULL) | |
4353 | { | |
fa452fa6 | 4354 | ppc_cpu_t old_cpu = ppc_cpu; |
69c040df AM |
4355 | char *p; |
4356 | ||
4357 | for (p = cpu_string; *p != 0; p++) | |
4358 | *p = TOLOWER (*p); | |
4359 | ||
4360 | if (strcmp (cpu_string, "push") == 0) | |
4361 | { | |
4362 | if (cpu_history == NULL) | |
4363 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4364 | ||
4365 | if (curr_hist >= MAX_HISTORY) | |
4366 | as_bad (_(".machine stack overflow")); | |
4367 | else | |
4368 | cpu_history[curr_hist++] = ppc_cpu; | |
4369 | } | |
4370 | else if (strcmp (cpu_string, "pop") == 0) | |
4371 | { | |
4372 | if (curr_hist <= 0) | |
4373 | as_bad (_(".machine stack underflow")); | |
4374 | else | |
4375 | ppc_cpu = cpu_history[--curr_hist]; | |
4376 | } | |
4377 | else if (parse_cpu (cpu_string)) | |
4378 | ; | |
4379 | else | |
4380 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4381 | ||
4382 | if (ppc_cpu != old_cpu) | |
4383 | ppc_setup_opcodes (); | |
4384 | } | |
4385 | ||
4386 | demand_empty_rest_of_line (); | |
0baf16f2 AM |
4387 | } |
4388 | ||
4389 | /* See whether a symbol is in the TOC section. */ | |
4390 | ||
4391 | static int | |
98027b10 | 4392 | ppc_is_toc_sym (symbolS *sym) |
0baf16f2 AM |
4393 | { |
4394 | #ifdef OBJ_XCOFF | |
4395 | return symbol_get_tc (sym)->class == XMC_TC; | |
4396 | #endif | |
4397 | #ifdef OBJ_ELF | |
4398 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2b3c4602 | 4399 | if (ppc_obj64) |
0baf16f2 AM |
4400 | return strcmp (sname, ".toc") == 0; |
4401 | else | |
4402 | return strcmp (sname, ".got") == 0; | |
4403 | #endif | |
4404 | } | |
4405 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
4406 | \f |
4407 | #ifdef TE_PE | |
4408 | ||
99a814a1 | 4409 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4410 | |
4411 | /* Set the current section. */ | |
4412 | static void | |
98027b10 | 4413 | ppc_set_current_section (segT new) |
252b5132 RH |
4414 | { |
4415 | ppc_previous_section = ppc_current_section; | |
4416 | ppc_current_section = new; | |
4417 | } | |
4418 | ||
4419 | /* pseudo-op: .previous | |
4420 | behaviour: toggles the current section with the previous section. | |
4421 | errors: None | |
99a814a1 AM |
4422 | warnings: "No previous section" */ |
4423 | ||
252b5132 | 4424 | static void |
98027b10 | 4425 | ppc_previous (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4426 | { |
4427 | symbolS *tmp; | |
4428 | ||
81d4177b | 4429 | if (ppc_previous_section == NULL) |
252b5132 | 4430 | { |
99a814a1 | 4431 | as_warn (_("No previous section to return to. Directive ignored.")); |
252b5132 RH |
4432 | return; |
4433 | } | |
4434 | ||
99a814a1 | 4435 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4436 | |
99a814a1 | 4437 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4438 | } |
4439 | ||
4440 | /* pseudo-op: .pdata | |
4441 | behaviour: predefined read only data section | |
b34976b6 | 4442 | double word aligned |
252b5132 RH |
4443 | errors: None |
4444 | warnings: None | |
4445 | initial: .section .pdata "adr3" | |
b34976b6 | 4446 | a - don't know -- maybe a misprint |
252b5132 RH |
4447 | d - initialized data |
4448 | r - readable | |
4449 | 3 - double word aligned (that would be 4 byte boundary) | |
4450 | ||
4451 | commentary: | |
4452 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4453 | handling, debugging, etc. */ |
252b5132 | 4454 | |
252b5132 | 4455 | static void |
98027b10 | 4456 | ppc_pdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4457 | { |
81d4177b | 4458 | if (pdata_section == 0) |
252b5132 RH |
4459 | { |
4460 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4461 | |
252b5132 RH |
4462 | bfd_set_section_flags (stdoutput, pdata_section, |
4463 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4464 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4465 | |
252b5132 RH |
4466 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
4467 | } | |
4468 | else | |
4469 | { | |
99a814a1 | 4470 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 4471 | } |
99a814a1 | 4472 | ppc_set_current_section (pdata_section); |
252b5132 RH |
4473 | } |
4474 | ||
4475 | /* pseudo-op: .ydata | |
4476 | behaviour: predefined read only data section | |
b34976b6 | 4477 | double word aligned |
252b5132 RH |
4478 | errors: None |
4479 | warnings: None | |
4480 | initial: .section .ydata "drw3" | |
b34976b6 | 4481 | a - don't know -- maybe a misprint |
252b5132 RH |
4482 | d - initialized data |
4483 | r - readable | |
4484 | 3 - double word aligned (that would be 4 byte boundary) | |
4485 | commentary: | |
4486 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
4487 | debugging, etc. */ |
4488 | ||
252b5132 | 4489 | static void |
98027b10 | 4490 | ppc_ydata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4491 | { |
81d4177b | 4492 | if (ydata_section == 0) |
252b5132 RH |
4493 | { |
4494 | ydata_section = subseg_new (".ydata", 0); | |
4495 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
4496 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4497 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
4498 | |
4499 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
4500 | } | |
4501 | else | |
4502 | { | |
4503 | ydata_section = subseg_new (".ydata", 0); | |
4504 | } | |
99a814a1 | 4505 | ppc_set_current_section (ydata_section); |
252b5132 RH |
4506 | } |
4507 | ||
4508 | /* pseudo-op: .reldata | |
4509 | behaviour: predefined read write data section | |
b34976b6 | 4510 | double word aligned (4-byte) |
252b5132 RH |
4511 | FIXME: relocation is applied to it |
4512 | FIXME: what's the difference between this and .data? | |
4513 | errors: None | |
4514 | warnings: None | |
4515 | initial: .section .reldata "drw3" | |
4516 | d - initialized data | |
4517 | r - readable | |
4518 | w - writeable | |
4519 | 3 - double word aligned (that would be 8 byte boundary) | |
4520 | ||
4521 | commentary: | |
4522 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
4523 | function descriptors, etc. */ |
4524 | ||
252b5132 | 4525 | static void |
98027b10 | 4526 | ppc_reldata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4527 | { |
4528 | if (reldata_section == 0) | |
4529 | { | |
4530 | reldata_section = subseg_new (".reldata", 0); | |
4531 | ||
4532 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
4533 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4534 | | SEC_DATA)); | |
252b5132 RH |
4535 | |
4536 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
4537 | } | |
4538 | else | |
4539 | { | |
4540 | reldata_section = subseg_new (".reldata", 0); | |
4541 | } | |
99a814a1 | 4542 | ppc_set_current_section (reldata_section); |
252b5132 RH |
4543 | } |
4544 | ||
4545 | /* pseudo-op: .rdata | |
4546 | behaviour: predefined read only data section | |
b34976b6 | 4547 | double word aligned |
252b5132 RH |
4548 | errors: None |
4549 | warnings: None | |
4550 | initial: .section .rdata "dr3" | |
4551 | d - initialized data | |
4552 | r - readable | |
99a814a1 AM |
4553 | 3 - double word aligned (that would be 4 byte boundary) */ |
4554 | ||
252b5132 | 4555 | static void |
98027b10 | 4556 | ppc_rdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4557 | { |
4558 | if (rdata_section == 0) | |
4559 | { | |
4560 | rdata_section = subseg_new (".rdata", 0); | |
4561 | bfd_set_section_flags (stdoutput, rdata_section, | |
4562 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4563 | | SEC_READONLY | SEC_DATA )); | |
4564 | ||
4565 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
4566 | } | |
4567 | else | |
4568 | { | |
4569 | rdata_section = subseg_new (".rdata", 0); | |
4570 | } | |
99a814a1 | 4571 | ppc_set_current_section (rdata_section); |
252b5132 RH |
4572 | } |
4573 | ||
4574 | /* pseudo-op: .ualong | |
81d4177b | 4575 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 4576 | performed. |
252b5132 RH |
4577 | FIXME: test the alignment statement |
4578 | errors: None | |
99a814a1 AM |
4579 | warnings: None */ |
4580 | ||
252b5132 | 4581 | static void |
98027b10 | 4582 | ppc_ualong (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4583 | { |
99a814a1 AM |
4584 | /* Try for long. */ |
4585 | cons (4); | |
252b5132 RH |
4586 | } |
4587 | ||
4588 | /* pseudo-op: .znop <symbol name> | |
4589 | behaviour: Issue a nop instruction | |
b34976b6 | 4590 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
4591 | the supplied symbol name. |
4592 | errors: None | |
99a814a1 AM |
4593 | warnings: Missing symbol name */ |
4594 | ||
252b5132 | 4595 | static void |
98027b10 | 4596 | ppc_znop (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4597 | { |
4598 | unsigned long insn; | |
4599 | const struct powerpc_opcode *opcode; | |
4600 | expressionS ex; | |
4601 | char *f; | |
252b5132 | 4602 | symbolS *sym; |
252b5132 RH |
4603 | char *symbol_name; |
4604 | char c; | |
4605 | char *name; | |
4606 | unsigned int exp; | |
4607 | flagword flags; | |
4608 | asection *sec; | |
4609 | ||
99a814a1 | 4610 | /* Strip out the symbol name. */ |
252b5132 RH |
4611 | symbol_name = input_line_pointer; |
4612 | c = get_symbol_end (); | |
4613 | ||
4614 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
4615 | strcpy (name, symbol_name); | |
4616 | ||
4617 | sym = symbol_find_or_make (name); | |
4618 | ||
4619 | *input_line_pointer = c; | |
4620 | ||
4621 | SKIP_WHITESPACE (); | |
4622 | ||
4623 | /* Look up the opcode in the hash table. */ | |
4624 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
4625 | ||
99a814a1 | 4626 | /* Stick in the nop. */ |
252b5132 RH |
4627 | insn = opcode->opcode; |
4628 | ||
4629 | /* Write out the instruction. */ | |
4630 | f = frag_more (4); | |
4631 | md_number_to_chars (f, insn, 4); | |
4632 | fix_new (frag_now, | |
4633 | f - frag_now->fr_literal, | |
4634 | 4, | |
4635 | sym, | |
4636 | 0, | |
4637 | 0, | |
4638 | BFD_RELOC_16_GOT_PCREL); | |
4639 | ||
4640 | } | |
4641 | ||
81d4177b KH |
4642 | /* pseudo-op: |
4643 | behaviour: | |
4644 | errors: | |
99a814a1 AM |
4645 | warnings: */ |
4646 | ||
252b5132 | 4647 | static void |
98027b10 | 4648 | ppc_pe_comm (int lcomm) |
252b5132 | 4649 | { |
98027b10 AM |
4650 | char *name; |
4651 | char c; | |
4652 | char *p; | |
252b5132 | 4653 | offsetT temp; |
98027b10 | 4654 | symbolS *symbolP; |
252b5132 RH |
4655 | offsetT align; |
4656 | ||
4657 | name = input_line_pointer; | |
4658 | c = get_symbol_end (); | |
4659 | ||
99a814a1 | 4660 | /* just after name is now '\0'. */ |
252b5132 RH |
4661 | p = input_line_pointer; |
4662 | *p = c; | |
4663 | SKIP_WHITESPACE (); | |
4664 | if (*input_line_pointer != ',') | |
4665 | { | |
4666 | as_bad (_("Expected comma after symbol-name: rest of line ignored.")); | |
4667 | ignore_rest_of_line (); | |
4668 | return; | |
4669 | } | |
4670 | ||
4671 | input_line_pointer++; /* skip ',' */ | |
4672 | if ((temp = get_absolute_expression ()) < 0) | |
4673 | { | |
4674 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
4675 | ignore_rest_of_line (); | |
4676 | return; | |
4677 | } | |
4678 | ||
4679 | if (! lcomm) | |
4680 | { | |
4681 | /* The third argument to .comm is the alignment. */ | |
4682 | if (*input_line_pointer != ',') | |
4683 | align = 3; | |
4684 | else | |
4685 | { | |
4686 | ++input_line_pointer; | |
4687 | align = get_absolute_expression (); | |
4688 | if (align <= 0) | |
4689 | { | |
4690 | as_warn (_("ignoring bad alignment")); | |
4691 | align = 3; | |
4692 | } | |
4693 | } | |
4694 | } | |
4695 | ||
4696 | *p = 0; | |
4697 | symbolP = symbol_find_or_make (name); | |
4698 | ||
4699 | *p = c; | |
4700 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
4701 | { | |
4702 | as_bad (_("Ignoring attempt to re-define symbol `%s'."), | |
4703 | S_GET_NAME (symbolP)); | |
4704 | ignore_rest_of_line (); | |
4705 | return; | |
4706 | } | |
4707 | ||
4708 | if (S_GET_VALUE (symbolP)) | |
4709 | { | |
4710 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
4711 | as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), | |
4712 | S_GET_NAME (symbolP), | |
4713 | (long) S_GET_VALUE (symbolP), | |
4714 | (long) temp); | |
4715 | } | |
4716 | else | |
4717 | { | |
4718 | S_SET_VALUE (symbolP, (valueT) temp); | |
4719 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 4720 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
4721 | } |
4722 | ||
4723 | demand_empty_rest_of_line (); | |
4724 | } | |
4725 | ||
4726 | /* | |
4727 | * implement the .section pseudo op: | |
4728 | * .section name {, "flags"} | |
4729 | * ^ ^ | |
4730 | * | +--- optional flags: 'b' for bss | |
4731 | * | 'i' for info | |
4732 | * +-- section name 'l' for lib | |
4733 | * 'n' for noload | |
4734 | * 'o' for over | |
4735 | * 'w' for data | |
4736 | * 'd' (apparently m88k for data) | |
4737 | * 'x' for text | |
4738 | * But if the argument is not a quoted string, treat it as a | |
4739 | * subsegment number. | |
4740 | * | |
4741 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
4742 | * additions/changes for the moto-pas assembler support. There are three | |
4743 | * categories: | |
4744 | * | |
81d4177b | 4745 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
4746 | * setting bits that bfd probably neither understands or uses. The |
4747 | * correct approach (?) will have to incorporate extra fields attached | |
4748 | * to the section to hold the system specific stuff. (krk) | |
4749 | * | |
4750 | * Section Contents: | |
4751 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
4752 | * 'c' - section has code | |
4753 | * 'd' - section has initialized data | |
4754 | * 'u' - section has uninitialized data | |
4755 | * 'i' - section contains directives (info) | |
4756 | * 'n' - section can be discarded | |
4757 | * 'R' - remove section at link time | |
4758 | * | |
4759 | * Section Protection: | |
4760 | * 'r' - section is readable | |
4761 | * 'w' - section is writeable | |
4762 | * 'x' - section is executable | |
4763 | * 's' - section is sharable | |
4764 | * | |
4765 | * Section Alignment: | |
4766 | * '0' - align to byte boundary | |
4767 | * '1' - align to halfword undary | |
4768 | * '2' - align to word boundary | |
4769 | * '3' - align to doubleword boundary | |
4770 | * '4' - align to quadword boundary | |
4771 | * '5' - align to 32 byte boundary | |
4772 | * '6' - align to 64 byte boundary | |
4773 | * | |
4774 | */ | |
4775 | ||
4776 | void | |
98027b10 | 4777 | ppc_pe_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4778 | { |
99a814a1 | 4779 | /* Strip out the section name. */ |
252b5132 RH |
4780 | char *section_name; |
4781 | char c; | |
4782 | char *name; | |
4783 | unsigned int exp; | |
4784 | flagword flags; | |
4785 | segT sec; | |
4786 | int align; | |
4787 | ||
4788 | section_name = input_line_pointer; | |
4789 | c = get_symbol_end (); | |
4790 | ||
4791 | name = xmalloc (input_line_pointer - section_name + 1); | |
4792 | strcpy (name, section_name); | |
4793 | ||
4794 | *input_line_pointer = c; | |
4795 | ||
4796 | SKIP_WHITESPACE (); | |
4797 | ||
4798 | exp = 0; | |
4799 | flags = SEC_NO_FLAGS; | |
4800 | ||
4801 | if (strcmp (name, ".idata$2") == 0) | |
4802 | { | |
4803 | align = 0; | |
4804 | } | |
4805 | else if (strcmp (name, ".idata$3") == 0) | |
4806 | { | |
4807 | align = 0; | |
4808 | } | |
4809 | else if (strcmp (name, ".idata$4") == 0) | |
4810 | { | |
4811 | align = 2; | |
4812 | } | |
4813 | else if (strcmp (name, ".idata$5") == 0) | |
4814 | { | |
4815 | align = 2; | |
4816 | } | |
4817 | else if (strcmp (name, ".idata$6") == 0) | |
4818 | { | |
4819 | align = 1; | |
4820 | } | |
4821 | else | |
99a814a1 AM |
4822 | /* Default alignment to 16 byte boundary. */ |
4823 | align = 4; | |
252b5132 RH |
4824 | |
4825 | if (*input_line_pointer == ',') | |
4826 | { | |
4827 | ++input_line_pointer; | |
4828 | SKIP_WHITESPACE (); | |
4829 | if (*input_line_pointer != '"') | |
4830 | exp = get_absolute_expression (); | |
4831 | else | |
4832 | { | |
4833 | ++input_line_pointer; | |
4834 | while (*input_line_pointer != '"' | |
4835 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4836 | { | |
4837 | switch (*input_line_pointer) | |
4838 | { | |
4839 | /* Section Contents */ | |
4840 | case 'a': /* unknown */ | |
4841 | as_bad (_("Unsupported section attribute -- 'a'")); | |
4842 | break; | |
4843 | case 'c': /* code section */ | |
81d4177b | 4844 | flags |= SEC_CODE; |
252b5132 RH |
4845 | break; |
4846 | case 'd': /* section has initialized data */ | |
4847 | flags |= SEC_DATA; | |
4848 | break; | |
4849 | case 'u': /* section has uninitialized data */ | |
4850 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
4851 | in winnt.h */ | |
4852 | flags |= SEC_ROM; | |
4853 | break; | |
4854 | case 'i': /* section contains directives (info) */ | |
4855 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
4856 | in winnt.h */ | |
4857 | flags |= SEC_HAS_CONTENTS; | |
4858 | break; | |
4859 | case 'n': /* section can be discarded */ | |
81d4177b | 4860 | flags &=~ SEC_LOAD; |
252b5132 RH |
4861 | break; |
4862 | case 'R': /* Remove section at link time */ | |
4863 | flags |= SEC_NEVER_LOAD; | |
4864 | break; | |
8d452c78 | 4865 | #if IFLICT_BRAIN_DAMAGE |
252b5132 RH |
4866 | /* Section Protection */ |
4867 | case 'r': /* section is readable */ | |
4868 | flags |= IMAGE_SCN_MEM_READ; | |
4869 | break; | |
4870 | case 'w': /* section is writeable */ | |
4871 | flags |= IMAGE_SCN_MEM_WRITE; | |
4872 | break; | |
4873 | case 'x': /* section is executable */ | |
4874 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
4875 | break; | |
4876 | case 's': /* section is sharable */ | |
4877 | flags |= IMAGE_SCN_MEM_SHARED; | |
4878 | break; | |
4879 | ||
4880 | /* Section Alignment */ | |
4881 | case '0': /* align to byte boundary */ | |
4882 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
4883 | align = 0; | |
4884 | break; | |
4885 | case '1': /* align to halfword boundary */ | |
4886 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
4887 | align = 1; | |
4888 | break; | |
4889 | case '2': /* align to word boundary */ | |
4890 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
4891 | align = 2; | |
4892 | break; | |
4893 | case '3': /* align to doubleword boundary */ | |
4894 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
4895 | align = 3; | |
4896 | break; | |
4897 | case '4': /* align to quadword boundary */ | |
4898 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
4899 | align = 4; | |
4900 | break; | |
4901 | case '5': /* align to 32 byte boundary */ | |
4902 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
4903 | align = 5; | |
4904 | break; | |
4905 | case '6': /* align to 64 byte boundary */ | |
4906 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
4907 | align = 6; | |
4908 | break; | |
8d452c78 | 4909 | #endif |
252b5132 | 4910 | default: |
99a814a1 AM |
4911 | as_bad (_("unknown section attribute '%c'"), |
4912 | *input_line_pointer); | |
252b5132 RH |
4913 | break; |
4914 | } | |
4915 | ++input_line_pointer; | |
4916 | } | |
4917 | if (*input_line_pointer == '"') | |
4918 | ++input_line_pointer; | |
4919 | } | |
4920 | } | |
4921 | ||
4922 | sec = subseg_new (name, (subsegT) exp); | |
4923 | ||
99a814a1 | 4924 | ppc_set_current_section (sec); |
252b5132 RH |
4925 | |
4926 | if (flags != SEC_NO_FLAGS) | |
4927 | { | |
4928 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
4929 | as_bad (_("error setting flags for \"%s\": %s"), | |
4930 | bfd_section_name (stdoutput, sec), | |
4931 | bfd_errmsg (bfd_get_error ())); | |
4932 | } | |
4933 | ||
99a814a1 | 4934 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
4935 | } |
4936 | ||
4937 | static void | |
98027b10 | 4938 | ppc_pe_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4939 | { |
4940 | char *name; | |
4941 | char endc; | |
4942 | symbolS *ext_sym; | |
4943 | ||
4944 | name = input_line_pointer; | |
4945 | endc = get_symbol_end (); | |
4946 | ||
4947 | ext_sym = symbol_find_or_make (name); | |
4948 | ||
4949 | *input_line_pointer = endc; | |
4950 | ||
4951 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4952 | SF_SET_FUNCTION (ext_sym); | |
4953 | SF_SET_PROCESS (ext_sym); | |
4954 | coff_add_linesym (ext_sym); | |
4955 | ||
4956 | demand_empty_rest_of_line (); | |
4957 | } | |
4958 | ||
4959 | static void | |
98027b10 | 4960 | ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4961 | { |
4962 | if (tocdata_section == 0) | |
4963 | { | |
4964 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 4965 | /* FIXME: section flags won't work. */ |
252b5132 RH |
4966 | bfd_set_section_flags (stdoutput, tocdata_section, |
4967 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 4968 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
4969 | |
4970 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
4971 | } | |
4972 | else | |
4973 | { | |
4974 | rdata_section = subseg_new (".tocd", 0); | |
4975 | } | |
4976 | ||
99a814a1 | 4977 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
4978 | |
4979 | demand_empty_rest_of_line (); | |
4980 | } | |
4981 | ||
4982 | /* Don't adjust TOC relocs to use the section symbol. */ | |
4983 | ||
4984 | int | |
98027b10 | 4985 | ppc_pe_fix_adjustable (fixS *fix) |
252b5132 RH |
4986 | { |
4987 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
4988 | } | |
4989 | ||
4990 | #endif | |
4991 | \f | |
4992 | #ifdef OBJ_XCOFF | |
4993 | ||
4994 | /* XCOFF specific symbol and file handling. */ | |
4995 | ||
4996 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
4997 | any, to use square brackets, and to be in upper case. */ | |
4998 | ||
4999 | char * | |
98027b10 | 5000 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5001 | { |
5002 | char *s; | |
5003 | ||
5004 | if (ppc_stab_symbol) | |
5005 | return name; | |
5006 | ||
5007 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5008 | ; | |
5009 | if (*s != '\0') | |
5010 | { | |
5011 | char brac; | |
5012 | ||
5013 | if (*s == '[') | |
5014 | brac = ']'; | |
5015 | else | |
5016 | { | |
5017 | *s = '['; | |
5018 | brac = '}'; | |
5019 | } | |
5020 | ||
5021 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5022 | *s = TOUPPER (*s); |
252b5132 RH |
5023 | |
5024 | if (*s == '\0' || s[1] != '\0') | |
5025 | as_bad (_("bad symbol suffix")); | |
5026 | ||
5027 | *s = ']'; | |
5028 | } | |
5029 | ||
5030 | return name; | |
5031 | } | |
5032 | ||
5033 | /* Set the class of a symbol based on the suffix, if any. This is | |
5034 | called whenever a new symbol is created. */ | |
5035 | ||
5036 | void | |
98027b10 | 5037 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5038 | { |
809ffe0d | 5039 | struct ppc_tc_sy *tc; |
252b5132 RH |
5040 | const char *s; |
5041 | ||
809ffe0d ILT |
5042 | tc = symbol_get_tc (sym); |
5043 | tc->next = NULL; | |
5044 | tc->output = 0; | |
5045 | tc->class = -1; | |
5046 | tc->real_name = NULL; | |
5047 | tc->subseg = 0; | |
5048 | tc->align = 0; | |
5049 | tc->size = NULL; | |
5050 | tc->within = NULL; | |
252b5132 RH |
5051 | |
5052 | if (ppc_stab_symbol) | |
5053 | return; | |
5054 | ||
5055 | s = strchr (S_GET_NAME (sym), '['); | |
5056 | if (s == (const char *) NULL) | |
5057 | { | |
5058 | /* There is no suffix. */ | |
5059 | return; | |
5060 | } | |
5061 | ||
5062 | ++s; | |
5063 | ||
5064 | switch (s[0]) | |
5065 | { | |
5066 | case 'B': | |
5067 | if (strcmp (s, "BS]") == 0) | |
809ffe0d | 5068 | tc->class = XMC_BS; |
252b5132 RH |
5069 | break; |
5070 | case 'D': | |
5071 | if (strcmp (s, "DB]") == 0) | |
809ffe0d | 5072 | tc->class = XMC_DB; |
252b5132 | 5073 | else if (strcmp (s, "DS]") == 0) |
809ffe0d | 5074 | tc->class = XMC_DS; |
252b5132 RH |
5075 | break; |
5076 | case 'G': | |
5077 | if (strcmp (s, "GL]") == 0) | |
809ffe0d | 5078 | tc->class = XMC_GL; |
252b5132 RH |
5079 | break; |
5080 | case 'P': | |
5081 | if (strcmp (s, "PR]") == 0) | |
809ffe0d | 5082 | tc->class = XMC_PR; |
252b5132 RH |
5083 | break; |
5084 | case 'R': | |
5085 | if (strcmp (s, "RO]") == 0) | |
809ffe0d | 5086 | tc->class = XMC_RO; |
252b5132 | 5087 | else if (strcmp (s, "RW]") == 0) |
809ffe0d | 5088 | tc->class = XMC_RW; |
252b5132 RH |
5089 | break; |
5090 | case 'S': | |
5091 | if (strcmp (s, "SV]") == 0) | |
809ffe0d | 5092 | tc->class = XMC_SV; |
252b5132 RH |
5093 | break; |
5094 | case 'T': | |
5095 | if (strcmp (s, "TC]") == 0) | |
809ffe0d | 5096 | tc->class = XMC_TC; |
252b5132 | 5097 | else if (strcmp (s, "TI]") == 0) |
809ffe0d | 5098 | tc->class = XMC_TI; |
252b5132 | 5099 | else if (strcmp (s, "TB]") == 0) |
809ffe0d | 5100 | tc->class = XMC_TB; |
252b5132 | 5101 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
809ffe0d | 5102 | tc->class = XMC_TC0; |
252b5132 RH |
5103 | break; |
5104 | case 'U': | |
5105 | if (strcmp (s, "UA]") == 0) | |
809ffe0d | 5106 | tc->class = XMC_UA; |
252b5132 | 5107 | else if (strcmp (s, "UC]") == 0) |
809ffe0d | 5108 | tc->class = XMC_UC; |
252b5132 RH |
5109 | break; |
5110 | case 'X': | |
5111 | if (strcmp (s, "XO]") == 0) | |
809ffe0d | 5112 | tc->class = XMC_XO; |
252b5132 RH |
5113 | break; |
5114 | } | |
5115 | ||
809ffe0d | 5116 | if (tc->class == -1) |
252b5132 RH |
5117 | as_bad (_("Unrecognized symbol suffix")); |
5118 | } | |
5119 | ||
5120 | /* Set the class of a label based on where it is defined. This | |
5121 | handles symbols without suffixes. Also, move the symbol so that it | |
5122 | follows the csect symbol. */ | |
5123 | ||
5124 | void | |
98027b10 | 5125 | ppc_frob_label (symbolS *sym) |
252b5132 RH |
5126 | { |
5127 | if (ppc_current_csect != (symbolS *) NULL) | |
5128 | { | |
809ffe0d ILT |
5129 | if (symbol_get_tc (sym)->class == -1) |
5130 | symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class; | |
252b5132 RH |
5131 | |
5132 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5133 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
5134 | &symbol_rootP, &symbol_lastP); | |
5135 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 | 5136 | } |
07a53e5c RH |
5137 | |
5138 | #ifdef OBJ_ELF | |
5139 | dwarf2_emit_label (sym); | |
5140 | #endif | |
252b5132 RH |
5141 | } |
5142 | ||
5143 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
5144 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
5145 | the symbols. */ | |
5146 | ||
b34976b6 | 5147 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
5148 | |
5149 | /* Change the name of a symbol just before writing it out. Set the | |
5150 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
5151 | class suffix. Return 1 if the symbol should not be included in the | |
5152 | symbol table. */ | |
5153 | ||
5154 | int | |
98027b10 | 5155 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
5156 | { |
5157 | static symbolS *ppc_last_function; | |
5158 | static symbolS *set_end; | |
5159 | ||
5160 | /* Discard symbols that should not be included in the output symbol | |
5161 | table. */ | |
809ffe0d ILT |
5162 | if (! symbol_used_in_reloc_p (sym) |
5163 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 5164 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5165 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
5166 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
5167 | return 1; | |
5168 | ||
a161fe53 AM |
5169 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
5170 | if (sym == abs_section_sym) | |
5171 | return 1; | |
5172 | ||
809ffe0d ILT |
5173 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
5174 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
5175 | else |
5176 | { | |
5177 | const char *name; | |
5178 | const char *s; | |
5179 | ||
5180 | name = S_GET_NAME (sym); | |
5181 | s = strchr (name, '['); | |
5182 | if (s != (char *) NULL) | |
5183 | { | |
5184 | unsigned int len; | |
5185 | char *snew; | |
5186 | ||
5187 | len = s - name; | |
5188 | snew = xmalloc (len + 1); | |
5189 | memcpy (snew, name, len); | |
5190 | snew[len] = '\0'; | |
5191 | ||
5192 | S_SET_NAME (sym, snew); | |
5193 | } | |
5194 | } | |
5195 | ||
5196 | if (set_end != (symbolS *) NULL) | |
5197 | { | |
5198 | SA_SET_SYM_ENDNDX (set_end, sym); | |
5199 | set_end = NULL; | |
5200 | } | |
5201 | ||
5202 | if (SF_GET_FUNCTION (sym)) | |
5203 | { | |
5204 | if (ppc_last_function != (symbolS *) NULL) | |
5205 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
5206 | ppc_last_function = sym; | |
809ffe0d | 5207 | if (symbol_get_tc (sym)->size != (symbolS *) NULL) |
252b5132 | 5208 | { |
6386f3a7 | 5209 | resolve_symbol_value (symbol_get_tc (sym)->size); |
809ffe0d ILT |
5210 | SA_SET_SYM_FSIZE (sym, |
5211 | (long) S_GET_VALUE (symbol_get_tc (sym)->size)); | |
252b5132 RH |
5212 | } |
5213 | } | |
5214 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5215 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5216 | { | |
5217 | if (ppc_last_function == (symbolS *) NULL) | |
5218 | as_bad (_(".ef with no preceding .function")); | |
5219 | else | |
5220 | { | |
5221 | set_end = ppc_last_function; | |
5222 | ppc_last_function = NULL; | |
5223 | ||
5224 | /* We don't have a C_EFCN symbol, but we need to force the | |
5225 | COFF backend to believe that it has seen one. */ | |
5226 | coff_last_function = NULL; | |
5227 | } | |
5228 | } | |
5229 | ||
670ec21d | 5230 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5231 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5232 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5233 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5234 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5235 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5236 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5237 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5238 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5239 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5240 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5241 | ||
5242 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
5243 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) | |
5244 | { | |
5245 | int i; | |
5246 | union internal_auxent *a; | |
5247 | ||
5248 | /* Create a csect aux. */ | |
5249 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5250 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d ILT |
5251 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
5252 | if (symbol_get_tc (sym)->class == XMC_TC0) | |
252b5132 RH |
5253 | { |
5254 | /* This is the TOC table. */ | |
5255 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5256 | a->x_csect.x_scnlen.l = 0; | |
5257 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5258 | } | |
809ffe0d | 5259 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5260 | { |
5261 | /* This is a csect symbol. x_scnlen is the size of the | |
5262 | csect. */ | |
809ffe0d | 5263 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5264 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5265 | S_GET_SEGMENT (sym)) | |
5266 | - S_GET_VALUE (sym)); | |
5267 | else | |
5268 | { | |
6386f3a7 | 5269 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5270 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5271 | - S_GET_VALUE (sym)); |
5272 | } | |
809ffe0d | 5273 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5274 | } |
5275 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5276 | { | |
5277 | /* This is a common symbol. */ | |
809ffe0d ILT |
5278 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5279 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5280 | if (S_IS_EXTERNAL (sym)) |
809ffe0d | 5281 | symbol_get_tc (sym)->class = XMC_RW; |
252b5132 | 5282 | else |
809ffe0d | 5283 | symbol_get_tc (sym)->class = XMC_BS; |
252b5132 RH |
5284 | } |
5285 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5286 | { | |
5287 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5288 | ppc_adjust_symtab. */ |
b34976b6 | 5289 | ppc_saw_abs = TRUE; |
252b5132 | 5290 | a->x_csect.x_smtyp = XTY_LD; |
809ffe0d ILT |
5291 | if (symbol_get_tc (sym)->class == -1) |
5292 | symbol_get_tc (sym)->class = XMC_XO; | |
252b5132 RH |
5293 | } |
5294 | else if (! S_IS_DEFINED (sym)) | |
5295 | { | |
5296 | /* This is an external symbol. */ | |
5297 | a->x_csect.x_scnlen.l = 0; | |
5298 | a->x_csect.x_smtyp = XTY_ER; | |
5299 | } | |
809ffe0d | 5300 | else if (symbol_get_tc (sym)->class == XMC_TC) |
252b5132 RH |
5301 | { |
5302 | symbolS *next; | |
5303 | ||
5304 | /* This is a TOC definition. x_scnlen is the size of the | |
5305 | TOC entry. */ | |
5306 | next = symbol_next (sym); | |
809ffe0d | 5307 | while (symbol_get_tc (next)->class == XMC_TC0) |
252b5132 RH |
5308 | next = symbol_next (next); |
5309 | if (next == (symbolS *) NULL | |
809ffe0d | 5310 | || symbol_get_tc (next)->class != XMC_TC) |
252b5132 RH |
5311 | { |
5312 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5313 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5314 | data_section) | |
5315 | - S_GET_VALUE (sym)); | |
5316 | else | |
5317 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5318 | - S_GET_VALUE (sym)); | |
5319 | } | |
5320 | else | |
5321 | { | |
6386f3a7 | 5322 | resolve_symbol_value (next); |
252b5132 RH |
5323 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5324 | - S_GET_VALUE (sym)); | |
5325 | } | |
5326 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5327 | } | |
5328 | else | |
5329 | { | |
5330 | symbolS *csect; | |
5331 | ||
5332 | /* This is a normal symbol definition. x_scnlen is the | |
5333 | symbol index of the containing csect. */ | |
5334 | if (S_GET_SEGMENT (sym) == text_section) | |
5335 | csect = ppc_text_csects; | |
5336 | else if (S_GET_SEGMENT (sym) == data_section) | |
5337 | csect = ppc_data_csects; | |
5338 | else | |
5339 | abort (); | |
5340 | ||
5341 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5342 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5343 | |
5344 | if (csect == (symbolS *) NULL) | |
5345 | { | |
5346 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5347 | a->x_csect.x_scnlen.l = 0; | |
5348 | } | |
5349 | else | |
5350 | { | |
809ffe0d | 5351 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5352 | { |
6386f3a7 | 5353 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5354 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5355 | > S_GET_VALUE (sym)) | |
252b5132 | 5356 | break; |
809ffe0d | 5357 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5358 | } |
5359 | ||
809ffe0d ILT |
5360 | a->x_csect.x_scnlen.p = |
5361 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5362 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5363 | 1; | |
252b5132 RH |
5364 | } |
5365 | a->x_csect.x_smtyp = XTY_LD; | |
5366 | } | |
81d4177b | 5367 | |
252b5132 RH |
5368 | a->x_csect.x_parmhash = 0; |
5369 | a->x_csect.x_snhash = 0; | |
809ffe0d | 5370 | if (symbol_get_tc (sym)->class == -1) |
252b5132 RH |
5371 | a->x_csect.x_smclas = XMC_PR; |
5372 | else | |
809ffe0d | 5373 | a->x_csect.x_smclas = symbol_get_tc (sym)->class; |
252b5132 RH |
5374 | a->x_csect.x_stab = 0; |
5375 | a->x_csect.x_snstab = 0; | |
5376 | ||
5377 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5378 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5379 | } |
5380 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5381 | { | |
5382 | /* We want the value to be the symbol index of the referenced | |
5383 | csect symbol. BFD will do that for us if we set the right | |
5384 | flags. */ | |
b782de16 AM |
5385 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5386 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5387 | ||
5388 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5389 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5390 | } |
5391 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5392 | { | |
5393 | symbolS *block; | |
5394 | symbolS *csect; | |
5395 | ||
5396 | /* The value is the offset from the enclosing csect. */ | |
809ffe0d ILT |
5397 | block = symbol_get_tc (sym)->within; |
5398 | csect = symbol_get_tc (block)->within; | |
6386f3a7 | 5399 | resolve_symbol_value (csect); |
252b5132 RH |
5400 | S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect)); |
5401 | } | |
5402 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5403 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5404 | { | |
5405 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5406 | BFD will do that for us if we set the right flags. We have |
5407 | already set the value correctly. */ | |
809ffe0d | 5408 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5409 | } |
5410 | ||
5411 | return 0; | |
5412 | } | |
5413 | ||
5414 | /* Adjust the symbol table. This creates csect symbols for all | |
5415 | absolute symbols. */ | |
5416 | ||
5417 | void | |
98027b10 | 5418 | ppc_adjust_symtab (void) |
252b5132 RH |
5419 | { |
5420 | symbolS *sym; | |
5421 | ||
5422 | if (! ppc_saw_abs) | |
5423 | return; | |
5424 | ||
5425 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5426 | { | |
5427 | symbolS *csect; | |
5428 | int i; | |
5429 | union internal_auxent *a; | |
5430 | ||
5431 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5432 | continue; | |
5433 | ||
5434 | csect = symbol_create (".abs[XO]", absolute_section, | |
5435 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5436 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5437 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5438 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5439 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5440 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5441 | a->x_csect.x_scnlen.l = 0; |
5442 | a->x_csect.x_smtyp = XTY_SD; | |
5443 | a->x_csect.x_parmhash = 0; | |
5444 | a->x_csect.x_snhash = 0; | |
5445 | a->x_csect.x_smclas = XMC_XO; | |
5446 | a->x_csect.x_stab = 0; | |
5447 | a->x_csect.x_snstab = 0; | |
5448 | ||
5449 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5450 | ||
5451 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5452 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5453 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5454 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5455 | } |
5456 | ||
b34976b6 | 5457 | ppc_saw_abs = FALSE; |
252b5132 RH |
5458 | } |
5459 | ||
5460 | /* Set the VMA for a section. This is called on all the sections in | |
5461 | turn. */ | |
5462 | ||
5463 | void | |
98027b10 | 5464 | ppc_frob_section (asection *sec) |
252b5132 | 5465 | { |
931e13a6 | 5466 | static bfd_vma vma = 0; |
252b5132 | 5467 | |
931e13a6 | 5468 | vma = md_section_align (sec, vma); |
252b5132 RH |
5469 | bfd_set_section_vma (stdoutput, sec, vma); |
5470 | vma += bfd_section_size (stdoutput, sec); | |
5471 | } | |
5472 | ||
5473 | #endif /* OBJ_XCOFF */ | |
5474 | \f | |
252b5132 | 5475 | char * |
98027b10 | 5476 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 5477 | { |
499ac353 | 5478 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
5479 | } |
5480 | ||
5481 | /* Write a value out to the object file, using the appropriate | |
5482 | endianness. */ | |
5483 | ||
5484 | void | |
98027b10 | 5485 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
5486 | { |
5487 | if (target_big_endian) | |
5488 | number_to_chars_bigendian (buf, val, n); | |
5489 | else | |
5490 | number_to_chars_littleendian (buf, val, n); | |
5491 | } | |
5492 | ||
5493 | /* Align a section (I don't know why this is machine dependent). */ | |
5494 | ||
5495 | valueT | |
3aeeedbb | 5496 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 5497 | { |
3aeeedbb AM |
5498 | #ifdef OBJ_ELF |
5499 | return addr; | |
5500 | #else | |
252b5132 RH |
5501 | int align = bfd_get_section_alignment (stdoutput, seg); |
5502 | ||
5503 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 5504 | #endif |
252b5132 RH |
5505 | } |
5506 | ||
5507 | /* We don't have any form of relaxing. */ | |
5508 | ||
5509 | int | |
98027b10 AM |
5510 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
5511 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
5512 | { |
5513 | abort (); | |
5514 | return 0; | |
5515 | } | |
5516 | ||
5517 | /* Convert a machine dependent frag. We never generate these. */ | |
5518 | ||
5519 | void | |
98027b10 AM |
5520 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
5521 | asection *sec ATTRIBUTE_UNUSED, | |
5522 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
5523 | { |
5524 | abort (); | |
5525 | } | |
5526 | ||
5527 | /* We have no need to default values of symbols. */ | |
5528 | ||
252b5132 | 5529 | symbolS * |
98027b10 | 5530 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
5531 | { |
5532 | return 0; | |
5533 | } | |
5534 | \f | |
5535 | /* Functions concerning relocs. */ | |
5536 | ||
5537 | /* The location from which a PC relative jump should be calculated, | |
5538 | given a PC relative reloc. */ | |
5539 | ||
5540 | long | |
98027b10 | 5541 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
5542 | { |
5543 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
5544 | } | |
5545 | ||
5546 | #ifdef OBJ_XCOFF | |
5547 | ||
5548 | /* This is called to see whether a fixup should be adjusted to use a | |
5549 | section symbol. We take the opportunity to change a fixup against | |
5550 | a symbol in the TOC subsegment into a reloc against the | |
5551 | corresponding .tc symbol. */ | |
5552 | ||
5553 | int | |
98027b10 | 5554 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 5555 | { |
b782de16 AM |
5556 | valueT val = resolve_symbol_value (fix->fx_addsy); |
5557 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
5558 | TC_SYMFIELD_TYPE *tc; | |
5559 | ||
5560 | if (symseg == absolute_section) | |
5561 | return 0; | |
252b5132 | 5562 | |
252b5132 | 5563 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 5564 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 5565 | && symseg == data_section |
252b5132 RH |
5566 | && val >= ppc_toc_frag->fr_address |
5567 | && (ppc_after_toc_frag == (fragS *) NULL | |
5568 | || val < ppc_after_toc_frag->fr_address)) | |
5569 | { | |
5570 | symbolS *sy; | |
5571 | ||
5572 | for (sy = symbol_next (ppc_toc_csect); | |
5573 | sy != (symbolS *) NULL; | |
5574 | sy = symbol_next (sy)) | |
5575 | { | |
b782de16 AM |
5576 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
5577 | ||
5578 | if (sy_tc->class == XMC_TC0) | |
252b5132 | 5579 | continue; |
b782de16 | 5580 | if (sy_tc->class != XMC_TC) |
252b5132 | 5581 | break; |
b782de16 | 5582 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
5583 | { |
5584 | fix->fx_addsy = sy; | |
5585 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
5586 | return 0; | |
5587 | } | |
5588 | } | |
5589 | ||
5590 | as_bad_where (fix->fx_file, fix->fx_line, | |
5591 | _("symbol in .toc does not match any .tc")); | |
5592 | } | |
5593 | ||
5594 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
5595 | tc = symbol_get_tc (fix->fx_addsy); |
5596 | if (tc->subseg == 0 | |
5597 | && tc->class != XMC_TC0 | |
5598 | && tc->class != XMC_TC | |
5599 | && symseg != bss_section | |
252b5132 | 5600 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 5601 | && (symseg != data_section |
252b5132 RH |
5602 | || ppc_toc_csect == NULL |
5603 | || val < ppc_toc_frag->fr_address | |
5604 | || (ppc_after_toc_frag != NULL | |
5605 | && val >= ppc_after_toc_frag->fr_address))) | |
5606 | { | |
5607 | symbolS *csect; | |
b782de16 | 5608 | symbolS *next_csect; |
252b5132 | 5609 | |
b782de16 | 5610 | if (symseg == text_section) |
252b5132 | 5611 | csect = ppc_text_csects; |
b782de16 | 5612 | else if (symseg == data_section) |
252b5132 RH |
5613 | csect = ppc_data_csects; |
5614 | else | |
5615 | abort (); | |
5616 | ||
5617 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5618 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5619 | |
5620 | if (csect != (symbolS *) NULL) | |
5621 | { | |
b782de16 AM |
5622 | while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL |
5623 | && (symbol_get_frag (next_csect)->fr_address <= val)) | |
252b5132 RH |
5624 | { |
5625 | /* If the csect address equals the symbol value, then we | |
99a814a1 AM |
5626 | have to look through the full symbol table to see |
5627 | whether this is the csect we want. Note that we will | |
5628 | only get here if the csect has zero length. */ | |
b782de16 AM |
5629 | if (symbol_get_frag (csect)->fr_address == val |
5630 | && S_GET_VALUE (csect) == val) | |
252b5132 RH |
5631 | { |
5632 | symbolS *scan; | |
5633 | ||
809ffe0d | 5634 | for (scan = symbol_next (csect); |
252b5132 | 5635 | scan != NULL; |
809ffe0d | 5636 | scan = symbol_next (scan)) |
252b5132 | 5637 | { |
809ffe0d | 5638 | if (symbol_get_tc (scan)->subseg != 0) |
252b5132 RH |
5639 | break; |
5640 | if (scan == fix->fx_addsy) | |
5641 | break; | |
5642 | } | |
5643 | ||
5644 | /* If we found the symbol before the next csect | |
99a814a1 | 5645 | symbol, then this is the csect we want. */ |
252b5132 RH |
5646 | if (scan == fix->fx_addsy) |
5647 | break; | |
5648 | } | |
5649 | ||
b782de16 | 5650 | csect = next_csect; |
252b5132 RH |
5651 | } |
5652 | ||
b782de16 | 5653 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
252b5132 RH |
5654 | fix->fx_addsy = csect; |
5655 | } | |
b782de16 | 5656 | return 0; |
252b5132 RH |
5657 | } |
5658 | ||
5659 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
5660 | .lcomm. */ | |
b782de16 | 5661 | if (symseg == bss_section |
252b5132 RH |
5662 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
5663 | { | |
b782de16 AM |
5664 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
5665 | ||
5666 | fix->fx_offset += val - resolve_symbol_value (sy); | |
5667 | fix->fx_addsy = sy; | |
252b5132 RH |
5668 | } |
5669 | ||
5670 | return 0; | |
5671 | } | |
5672 | ||
5673 | /* A reloc from one csect to another must be kept. The assembler | |
5674 | will, of course, keep relocs between sections, and it will keep | |
5675 | absolute relocs, but we need to force it to keep PC relative relocs | |
5676 | between two csects in the same section. */ | |
5677 | ||
5678 | int | |
98027b10 | 5679 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
5680 | { |
5681 | /* At this point fix->fx_addsy should already have been converted to | |
5682 | a csect symbol. If the csect does not include the fragment, then | |
5683 | we need to force the relocation. */ | |
5684 | if (fix->fx_pcrel | |
5685 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
5686 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
5687 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
5688 | > fix->fx_frag->fr_address) | |
5689 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
5690 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
5691 | <= fix->fx_frag->fr_address)))) |
5692 | return 1; | |
5693 | ||
ae6063d4 | 5694 | return generic_force_reloc (fix); |
252b5132 RH |
5695 | } |
5696 | ||
5697 | #endif /* OBJ_XCOFF */ | |
5698 | ||
0baf16f2 | 5699 | #ifdef OBJ_ELF |
a161fe53 AM |
5700 | /* If this function returns non-zero, it guarantees that a relocation |
5701 | will be emitted for a fixup. */ | |
5702 | ||
5703 | int | |
98027b10 | 5704 | ppc_force_relocation (fixS *fix) |
a161fe53 AM |
5705 | { |
5706 | /* Branch prediction relocations must force a relocation, as must | |
5707 | the vtable description relocs. */ | |
5708 | switch (fix->fx_r_type) | |
5709 | { | |
5710 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
5711 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
5712 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
5713 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 5714 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 5715 | case BFD_RELOC_PPC64_TOC: |
a161fe53 AM |
5716 | return 1; |
5717 | default: | |
5718 | break; | |
5719 | } | |
5720 | ||
cdba85ec AM |
5721 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
5722 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
5723 | return 1; | |
5724 | ||
ae6063d4 | 5725 | return generic_force_reloc (fix); |
a161fe53 AM |
5726 | } |
5727 | ||
0baf16f2 | 5728 | int |
98027b10 | 5729 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 5730 | { |
0baf16f2 AM |
5731 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
5732 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
5733 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
5734 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
5735 | && fix->fx_r_type != BFD_RELOC_GPREL16 | |
5736 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
5737 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 5738 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 5739 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 5740 | } |
0baf16f2 | 5741 | #endif |
252b5132 | 5742 | |
3aeeedbb AM |
5743 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
5744 | rs_align_code frag. */ | |
5745 | ||
5746 | void | |
5747 | ppc_handle_align (struct frag *fragP) | |
5748 | { | |
5749 | valueT count = (fragP->fr_next->fr_address | |
5750 | - (fragP->fr_address + fragP->fr_fix)); | |
5751 | ||
5752 | if (count != 0 && (count & 3) == 0) | |
5753 | { | |
5754 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
5755 | ||
5756 | fragP->fr_var = 4; | |
5757 | md_number_to_chars (dest, 0x60000000, 4); | |
5758 | ||
5759 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0) | |
5760 | { | |
5761 | /* For power6, we want the last nop to be a group terminating | |
5762 | one, "ori 1,1,0". Do this by inserting an rs_fill frag | |
5763 | immediately after this one, with its address set to the last | |
5764 | nop location. This will automatically reduce the number of | |
5765 | nops in the current frag by one. */ | |
5766 | if (count > 4) | |
5767 | { | |
5768 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
5769 | ||
5770 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
5771 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
5772 | group_nop->fr_fix = 0; | |
5773 | group_nop->fr_offset = 1; | |
5774 | group_nop->fr_type = rs_fill; | |
5775 | fragP->fr_next = group_nop; | |
5776 | dest = group_nop->fr_literal; | |
5777 | } | |
5778 | ||
5779 | md_number_to_chars (dest, 0x60210000, 4); | |
5780 | } | |
5781 | } | |
5782 | } | |
5783 | ||
252b5132 RH |
5784 | /* Apply a fixup to the object code. This is called for all the |
5785 | fixups we generated by the call to fix_new_exp, above. In the call | |
5786 | above we used a reloc code which was the largest legal reloc code | |
5787 | plus the operand index. Here we undo that to recover the operand | |
5788 | index. At this point all symbol values should be fully resolved, | |
5789 | and we attempt to completely resolve the reloc. If we can not do | |
5790 | that, we determine the correct reloc code and put it back in the | |
5791 | fixup. */ | |
5792 | ||
94f592af | 5793 | void |
98027b10 | 5794 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 5795 | { |
94f592af | 5796 | valueT value = * valP; |
252b5132 RH |
5797 | |
5798 | #ifdef OBJ_ELF | |
94f592af | 5799 | if (fixP->fx_addsy != NULL) |
252b5132 | 5800 | { |
a161fe53 | 5801 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
5802 | if (fixP->fx_pcrel) |
5803 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
5804 | } |
5805 | else | |
94f592af | 5806 | fixP->fx_done = 1; |
252b5132 | 5807 | #else |
a161fe53 | 5808 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
5809 | the symbol values. If we are doing this relocation the code in |
5810 | write.c is going to call bfd_install_relocation, which is also | |
5811 | going to use the symbol value. That means that if the reloc is | |
5812 | fully resolved we want to use *valP since bfd_install_relocation is | |
5813 | not being used. | |
252b5132 | 5814 | However, if the reloc is not fully resolved we do not want to use |
a161fe53 AM |
5815 | *valP, and must use fx_offset instead. However, if the reloc |
5816 | is PC relative, we do want to use *valP since it includes the | |
252b5132 | 5817 | result of md_pcrel_from. This is confusing. */ |
94f592af NC |
5818 | if (fixP->fx_addsy == (symbolS *) NULL) |
5819 | fixP->fx_done = 1; | |
5820 | ||
5821 | else if (fixP->fx_pcrel) | |
5822 | ; | |
5823 | ||
252b5132 | 5824 | else |
a161fe53 AM |
5825 | value = fixP->fx_offset; |
5826 | #endif | |
5827 | ||
5828 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 5829 | { |
a161fe53 AM |
5830 | /* We can't actually support subtracting a symbol. */ |
5831 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 5832 | } |
252b5132 | 5833 | |
94f592af | 5834 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) |
252b5132 RH |
5835 | { |
5836 | int opindex; | |
5837 | const struct powerpc_operand *operand; | |
5838 | char *where; | |
5839 | unsigned long insn; | |
5840 | ||
94f592af | 5841 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
252b5132 RH |
5842 | |
5843 | operand = &powerpc_operands[opindex]; | |
5844 | ||
5845 | #ifdef OBJ_XCOFF | |
0baf16f2 AM |
5846 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
5847 | does not generate a reloc. It uses the offset of `sym' within its | |
5848 | csect. Other usages, such as `.long sym', generate relocs. This | |
5849 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 5850 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 5851 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 5852 | && operand->shift == 0 |
2b3c4602 | 5853 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
5854 | && fixP->fx_addsy != NULL |
5855 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
5856 | && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC | |
5857 | && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0 | |
5858 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) | |
252b5132 | 5859 | { |
94f592af NC |
5860 | value = fixP->fx_offset; |
5861 | fixP->fx_done = 1; | |
252b5132 RH |
5862 | } |
5863 | #endif | |
5864 | ||
5865 | /* Fetch the instruction, insert the fully resolved operand | |
5866 | value, and stuff the instruction back again. */ | |
94f592af | 5867 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 RH |
5868 | if (target_big_endian) |
5869 | insn = bfd_getb32 ((unsigned char *) where); | |
5870 | else | |
5871 | insn = bfd_getl32 ((unsigned char *) where); | |
5872 | insn = ppc_insert_operand (insn, operand, (offsetT) value, | |
783de163 | 5873 | fixP->tc_fix_data.ppc_cpu, |
94f592af | 5874 | fixP->fx_file, fixP->fx_line); |
252b5132 RH |
5875 | if (target_big_endian) |
5876 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
5877 | else | |
5878 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
5879 | ||
94f592af NC |
5880 | if (fixP->fx_done) |
5881 | /* Nothing else to do here. */ | |
5882 | return; | |
252b5132 | 5883 | |
94f592af | 5884 | assert (fixP->fx_addsy != NULL); |
0baf16f2 | 5885 | |
252b5132 RH |
5886 | /* Determine a BFD reloc value based on the operand information. |
5887 | We are only prepared to turn a few of the operands into | |
0baf16f2 | 5888 | relocs. */ |
11b37b7b | 5889 | if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 5890 | && operand->bitm == 0x3fffffc |
11b37b7b | 5891 | && operand->shift == 0) |
94f592af | 5892 | fixP->fx_r_type = BFD_RELOC_PPC_B26; |
11b37b7b | 5893 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 5894 | && operand->bitm == 0xfffc |
11b37b7b | 5895 | && operand->shift == 0) |
95210096 AM |
5896 | { |
5897 | fixP->fx_r_type = BFD_RELOC_PPC_B16; | |
5898 | #ifdef OBJ_XCOFF | |
5899 | fixP->fx_size = 2; | |
5900 | if (target_big_endian) | |
5901 | fixP->fx_where += 2; | |
5902 | #endif | |
5903 | } | |
11b37b7b | 5904 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 5905 | && operand->bitm == 0x3fffffc |
11b37b7b | 5906 | && operand->shift == 0) |
94f592af | 5907 | fixP->fx_r_type = BFD_RELOC_PPC_BA26; |
11b37b7b | 5908 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 5909 | && operand->bitm == 0xfffc |
11b37b7b | 5910 | && operand->shift == 0) |
95210096 AM |
5911 | { |
5912 | fixP->fx_r_type = BFD_RELOC_PPC_BA16; | |
5913 | #ifdef OBJ_XCOFF | |
5914 | fixP->fx_size = 2; | |
5915 | if (target_big_endian) | |
5916 | fixP->fx_where += 2; | |
5917 | #endif | |
5918 | } | |
0baf16f2 | 5919 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
11b37b7b | 5920 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 5921 | && (operand->bitm & 0xfff0) == 0xfff0 |
a7fc733f | 5922 | && operand->shift == 0) |
11b37b7b | 5923 | { |
a7fc733f AM |
5924 | if (ppc_is_toc_sym (fixP->fx_addsy)) |
5925 | { | |
5926 | fixP->fx_r_type = BFD_RELOC_PPC_TOC16; | |
0baf16f2 | 5927 | #ifdef OBJ_ELF |
a7fc733f AM |
5928 | if (ppc_obj64 |
5929 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
5930 | fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS; | |
5931 | #endif | |
5932 | } | |
5933 | else | |
5934 | { | |
5935 | fixP->fx_r_type = BFD_RELOC_16; | |
5936 | #ifdef OBJ_ELF | |
5937 | if (ppc_obj64 | |
5938 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
5939 | fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS; | |
0baf16f2 | 5940 | #endif |
a7fc733f | 5941 | } |
94f592af | 5942 | fixP->fx_size = 2; |
11b37b7b | 5943 | if (target_big_endian) |
94f592af | 5944 | fixP->fx_where += 2; |
11b37b7b | 5945 | } |
0baf16f2 | 5946 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
11b37b7b | 5947 | else |
252b5132 RH |
5948 | { |
5949 | char *sfile; | |
5950 | unsigned int sline; | |
5951 | ||
5952 | /* Use expr_symbol_where to see if this is an expression | |
0baf16f2 | 5953 | symbol. */ |
94f592af NC |
5954 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) |
5955 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 RH |
5956 | _("unresolved expression that must be resolved")); |
5957 | else | |
94f592af | 5958 | as_bad_where (fixP->fx_file, fixP->fx_line, |
0baf16f2 | 5959 | _("unsupported relocation against %s"), |
94f592af NC |
5960 | S_GET_NAME (fixP->fx_addsy)); |
5961 | fixP->fx_done = 1; | |
5962 | return; | |
252b5132 RH |
5963 | } |
5964 | } | |
5965 | else | |
5966 | { | |
5967 | #ifdef OBJ_ELF | |
94f592af | 5968 | ppc_elf_validate_fix (fixP, seg); |
252b5132 | 5969 | #endif |
94f592af | 5970 | switch (fixP->fx_r_type) |
252b5132 | 5971 | { |
252b5132 | 5972 | case BFD_RELOC_CTOR: |
2b3c4602 | 5973 | if (ppc_obj64) |
9c7977b3 AM |
5974 | goto ctor64; |
5975 | /* fall through */ | |
5976 | ||
0baf16f2 | 5977 | case BFD_RELOC_32: |
94f592af NC |
5978 | if (fixP->fx_pcrel) |
5979 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
99a814a1 | 5980 | /* fall through */ |
252b5132 RH |
5981 | |
5982 | case BFD_RELOC_RVA: | |
5983 | case BFD_RELOC_32_PCREL: | |
252b5132 | 5984 | case BFD_RELOC_PPC_EMB_NADDR32: |
94f592af | 5985 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
5986 | value, 4); |
5987 | break; | |
5988 | ||
7f6d05e8 | 5989 | case BFD_RELOC_64: |
9c7977b3 | 5990 | ctor64: |
94f592af NC |
5991 | if (fixP->fx_pcrel) |
5992 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
99a814a1 | 5993 | /* fall through */ |
0baf16f2 | 5994 | |
7f6d05e8 | 5995 | case BFD_RELOC_64_PCREL: |
94f592af | 5996 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
7f6d05e8 | 5997 | value, 8); |
81d4177b | 5998 | break; |
0baf16f2 | 5999 | |
252b5132 RH |
6000 | case BFD_RELOC_GPREL16: |
6001 | case BFD_RELOC_16_GOT_PCREL: | |
6002 | case BFD_RELOC_16_GOTOFF: | |
6003 | case BFD_RELOC_LO16_GOTOFF: | |
6004 | case BFD_RELOC_HI16_GOTOFF: | |
6005 | case BFD_RELOC_HI16_S_GOTOFF: | |
1cfc59d5 | 6006 | case BFD_RELOC_16_BASEREL: |
252b5132 RH |
6007 | case BFD_RELOC_LO16_BASEREL: |
6008 | case BFD_RELOC_HI16_BASEREL: | |
6009 | case BFD_RELOC_HI16_S_BASEREL: | |
6010 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6011 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6012 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6013 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6014 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6015 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6016 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6017 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6018 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6019 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6020 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6021 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6022 | case BFD_RELOC_PPC_TOC16: | |
0baf16f2 | 6023 | #ifdef OBJ_ELF |
0baf16f2 AM |
6024 | case BFD_RELOC_PPC64_TOC16_LO: |
6025 | case BFD_RELOC_PPC64_TOC16_HI: | |
6026 | case BFD_RELOC_PPC64_TOC16_HA: | |
0baf16f2 | 6027 | #endif |
94f592af | 6028 | if (fixP->fx_pcrel) |
252b5132 | 6029 | { |
94f592af NC |
6030 | if (fixP->fx_addsy != NULL) |
6031 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 | 6032 | _("cannot emit PC relative %s relocation against %s"), |
94f592af NC |
6033 | bfd_get_reloc_code_name (fixP->fx_r_type), |
6034 | S_GET_NAME (fixP->fx_addsy)); | |
252b5132 | 6035 | else |
94f592af | 6036 | as_bad_where (fixP->fx_file, fixP->fx_line, |
252b5132 | 6037 | _("cannot emit PC relative %s relocation"), |
94f592af | 6038 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
252b5132 RH |
6039 | } |
6040 | ||
94f592af | 6041 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
6042 | value, 2); |
6043 | break; | |
6044 | ||
3c9d25f4 AM |
6045 | case BFD_RELOC_16: |
6046 | if (fixP->fx_pcrel) | |
6047 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
6048 | /* fall through */ | |
6049 | ||
6050 | case BFD_RELOC_16_PCREL: | |
6051 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6052 | value, 2); | |
6053 | break; | |
6054 | ||
6055 | case BFD_RELOC_LO16: | |
6056 | if (fixP->fx_pcrel) | |
6057 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
6058 | /* fall through */ | |
6059 | ||
6060 | case BFD_RELOC_LO16_PCREL: | |
6061 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6062 | value, 2); | |
6063 | break; | |
6064 | ||
252b5132 RH |
6065 | /* This case happens when you write, for example, |
6066 | lis %r3,(L1-L2)@ha | |
6067 | where L1 and L2 are defined later. */ | |
6068 | case BFD_RELOC_HI16: | |
94f592af | 6069 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
6070 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; |
6071 | /* fall through */ | |
6072 | ||
6073 | case BFD_RELOC_HI16_PCREL: | |
94f592af | 6074 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 6075 | PPC_HI (value), 2); |
252b5132 | 6076 | break; |
0baf16f2 | 6077 | |
252b5132 | 6078 | case BFD_RELOC_HI16_S: |
94f592af | 6079 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
6080 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; |
6081 | /* fall through */ | |
6082 | ||
6083 | case BFD_RELOC_HI16_S_PCREL: | |
94f592af | 6084 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6085 | PPC_HA (value), 2); |
6086 | break; | |
6087 | ||
6088 | #ifdef OBJ_ELF | |
0baf16f2 | 6089 | case BFD_RELOC_PPC64_HIGHER: |
94f592af | 6090 | if (fixP->fx_pcrel) |
0baf16f2 | 6091 | abort (); |
94f592af | 6092 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 6093 | PPC_HIGHER (value), 2); |
252b5132 RH |
6094 | break; |
6095 | ||
0baf16f2 | 6096 | case BFD_RELOC_PPC64_HIGHER_S: |
94f592af | 6097 | if (fixP->fx_pcrel) |
0baf16f2 | 6098 | abort (); |
94f592af | 6099 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6100 | PPC_HIGHERA (value), 2); |
6101 | break; | |
6102 | ||
6103 | case BFD_RELOC_PPC64_HIGHEST: | |
94f592af | 6104 | if (fixP->fx_pcrel) |
0baf16f2 | 6105 | abort (); |
94f592af | 6106 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6107 | PPC_HIGHEST (value), 2); |
6108 | break; | |
6109 | ||
6110 | case BFD_RELOC_PPC64_HIGHEST_S: | |
94f592af | 6111 | if (fixP->fx_pcrel) |
0baf16f2 | 6112 | abort (); |
94f592af | 6113 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6114 | PPC_HIGHESTA (value), 2); |
6115 | break; | |
6116 | ||
6117 | case BFD_RELOC_PPC64_ADDR16_DS: | |
6118 | case BFD_RELOC_PPC64_ADDR16_LO_DS: | |
6119 | case BFD_RELOC_PPC64_GOT16_DS: | |
6120 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6121 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6122 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6123 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6124 | case BFD_RELOC_PPC64_TOC16_DS: | |
6125 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6126 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6127 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
94f592af | 6128 | if (fixP->fx_pcrel) |
0baf16f2 AM |
6129 | abort (); |
6130 | { | |
2132e3a3 | 6131 | char *where = fixP->fx_frag->fr_literal + fixP->fx_where; |
3d8aea2f | 6132 | unsigned long val, mask; |
0baf16f2 AM |
6133 | |
6134 | if (target_big_endian) | |
adadcc0c | 6135 | val = bfd_getb32 (where - 2); |
0baf16f2 | 6136 | else |
adadcc0c AM |
6137 | val = bfd_getl32 (where); |
6138 | mask = 0xfffc; | |
6139 | /* lq insns reserve the four lsbs. */ | |
6140 | if ((ppc_cpu & PPC_OPCODE_POWER4) != 0 | |
77a6138a | 6141 | && (val & (0x3f << 26)) == (56u << 26)) |
adadcc0c AM |
6142 | mask = 0xfff0; |
6143 | val |= value & mask; | |
0baf16f2 AM |
6144 | if (target_big_endian) |
6145 | bfd_putb16 ((bfd_vma) val, where); | |
6146 | else | |
6147 | bfd_putl16 ((bfd_vma) val, where); | |
6148 | } | |
6149 | break; | |
cdba85ec | 6150 | |
ba0b2174 AM |
6151 | case BFD_RELOC_PPC_B16_BRTAKEN: |
6152 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6153 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6154 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
6155 | break; | |
6156 | ||
cdba85ec | 6157 | case BFD_RELOC_PPC_TLS: |
7c1d0959 L |
6158 | break; |
6159 | ||
cdba85ec AM |
6160 | case BFD_RELOC_PPC_DTPMOD: |
6161 | case BFD_RELOC_PPC_TPREL16: | |
6162 | case BFD_RELOC_PPC_TPREL16_LO: | |
6163 | case BFD_RELOC_PPC_TPREL16_HI: | |
6164 | case BFD_RELOC_PPC_TPREL16_HA: | |
6165 | case BFD_RELOC_PPC_TPREL: | |
6166 | case BFD_RELOC_PPC_DTPREL16: | |
6167 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6168 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6169 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6170 | case BFD_RELOC_PPC_DTPREL: | |
6171 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6172 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6173 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6174 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6175 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6176 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6177 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6178 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6179 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6180 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6181 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6182 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6183 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6184 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6185 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6186 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6187 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6188 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
6189 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6190 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6191 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6192 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
6193 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
6194 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6195 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6196 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6197 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6198 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
7c1d0959 | 6199 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
cdba85ec | 6200 | break; |
0baf16f2 | 6201 | #endif |
252b5132 | 6202 | /* Because SDA21 modifies the register field, the size is set to 4 |
99a814a1 | 6203 | bytes, rather than 2, so offset it here appropriately. */ |
252b5132 | 6204 | case BFD_RELOC_PPC_EMB_SDA21: |
94f592af | 6205 | if (fixP->fx_pcrel) |
252b5132 RH |
6206 | abort (); |
6207 | ||
94f592af | 6208 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where |
252b5132 RH |
6209 | + ((target_big_endian) ? 2 : 0), |
6210 | value, 2); | |
6211 | break; | |
6212 | ||
6213 | case BFD_RELOC_8: | |
94f592af | 6214 | if (fixP->fx_pcrel) |
31a91399 NC |
6215 | { |
6216 | /* This can occur if there is a bug in the input assembler, eg: | |
b7d7dc63 | 6217 | ".byte <undefined_symbol> - ." */ |
31a91399 NC |
6218 | if (fixP->fx_addsy) |
6219 | as_bad (_("Unable to handle reference to symbol %s"), | |
6220 | S_GET_NAME (fixP->fx_addsy)); | |
6221 | else | |
6222 | as_bad (_("Unable to resolve expression")); | |
6223 | fixP->fx_done = 1; | |
6224 | } | |
6225 | else | |
6226 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6227 | value, 1); | |
252b5132 RH |
6228 | break; |
6229 | ||
6230 | case BFD_RELOC_24_PLT_PCREL: | |
6231 | case BFD_RELOC_PPC_LOCAL24PC: | |
94f592af | 6232 | if (!fixP->fx_pcrel && !fixP->fx_done) |
252b5132 RH |
6233 | abort (); |
6234 | ||
94f592af | 6235 | if (fixP->fx_done) |
99a814a1 AM |
6236 | { |
6237 | char *where; | |
6238 | unsigned long insn; | |
6239 | ||
6240 | /* Fetch the instruction, insert the fully resolved operand | |
6241 | value, and stuff the instruction back again. */ | |
94f592af | 6242 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
99a814a1 AM |
6243 | if (target_big_endian) |
6244 | insn = bfd_getb32 ((unsigned char *) where); | |
6245 | else | |
6246 | insn = bfd_getl32 ((unsigned char *) where); | |
6247 | if ((value & 3) != 0) | |
94f592af | 6248 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6249 | _("must branch to an address a multiple of 4")); |
6250 | if ((offsetT) value < -0x40000000 | |
6251 | || (offsetT) value >= 0x40000000) | |
94f592af | 6252 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6253 | _("@local or @plt branch destination is too far away, %ld bytes"), |
6254 | (long) value); | |
6255 | insn = insn | (value & 0x03fffffc); | |
6256 | if (target_big_endian) | |
6257 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6258 | else | |
6259 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6260 | } | |
252b5132 RH |
6261 | break; |
6262 | ||
6263 | case BFD_RELOC_VTABLE_INHERIT: | |
94f592af NC |
6264 | fixP->fx_done = 0; |
6265 | if (fixP->fx_addsy | |
6266 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6267 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6268 | S_SET_WEAK (fixP->fx_addsy); | |
252b5132 RH |
6269 | break; |
6270 | ||
6271 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6272 | fixP->fx_done = 0; |
252b5132 RH |
6273 | break; |
6274 | ||
0baf16f2 | 6275 | #ifdef OBJ_ELF |
0baf16f2 AM |
6276 | /* Generated by reference to `sym@tocbase'. The sym is |
6277 | ignored by the linker. */ | |
6278 | case BFD_RELOC_PPC64_TOC: | |
94f592af | 6279 | fixP->fx_done = 0; |
0baf16f2 | 6280 | break; |
0baf16f2 | 6281 | #endif |
252b5132 | 6282 | default: |
bc805888 | 6283 | fprintf (stderr, |
94f592af | 6284 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6285 | fflush (stderr); |
252b5132 RH |
6286 | abort (); |
6287 | } | |
6288 | } | |
6289 | ||
6290 | #ifdef OBJ_ELF | |
94f592af | 6291 | fixP->fx_addnumber = value; |
4e6935a6 AM |
6292 | |
6293 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
6294 | from the section contents. If we are going to be emitting a reloc | |
6295 | then the section contents are immaterial, so don't warn if they | |
6296 | happen to overflow. Leave such warnings to ld. */ | |
6297 | if (!fixP->fx_done) | |
6298 | fixP->fx_no_overflow = 1; | |
252b5132 | 6299 | #else |
94f592af NC |
6300 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
6301 | fixP->fx_addnumber = 0; | |
252b5132 RH |
6302 | else |
6303 | { | |
6304 | #ifdef TE_PE | |
94f592af | 6305 | fixP->fx_addnumber = 0; |
252b5132 | 6306 | #else |
8edcbfcd TG |
6307 | /* We want to use the offset within the toc, not the actual VMA |
6308 | of the symbol. */ | |
94f592af | 6309 | fixP->fx_addnumber = |
8edcbfcd TG |
6310 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) |
6311 | - S_GET_VALUE (ppc_toc_csect); | |
252b5132 RH |
6312 | #endif |
6313 | } | |
6314 | #endif | |
252b5132 RH |
6315 | } |
6316 | ||
6317 | /* Generate a reloc for a fixup. */ | |
6318 | ||
6319 | arelent * | |
98027b10 | 6320 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
6321 | { |
6322 | arelent *reloc; | |
6323 | ||
6324 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
6325 | ||
49309057 ILT |
6326 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
6327 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
6328 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
6329 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
6330 | if (reloc->howto == (reloc_howto_type *) NULL) | |
6331 | { | |
6332 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
6333 | _("reloc %d not supported by object file format"), |
6334 | (int) fixp->fx_r_type); | |
252b5132 RH |
6335 | return NULL; |
6336 | } | |
6337 | reloc->addend = fixp->fx_addnumber; | |
6338 | ||
6339 | return reloc; | |
6340 | } | |
75e21f08 JJ |
6341 | |
6342 | void | |
98027b10 | 6343 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
6344 | { |
6345 | cfi_add_CFA_def_cfa (1, 0); | |
6346 | } | |
6347 | ||
6348 | int | |
1df69f4f | 6349 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
6350 | { |
6351 | unsigned int regnum = -1; | |
6352 | unsigned int i; | |
6353 | const char *p; | |
6354 | char *q; | |
6355 | static struct { char *name; int dw2regnum; } regnames[] = | |
6356 | { | |
6357 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
6358 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 6359 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
6360 | { "spe_acc", 111 }, { "spefscr", 112 } |
6361 | }; | |
6362 | ||
6363 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
6364 | if (strcmp (regnames[i].name, regname) == 0) | |
6365 | return regnames[i].dw2regnum; | |
6366 | ||
6367 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
6368 | { | |
6369 | p = regname + 1 + (regname[1] == '.'); | |
6370 | regnum = strtoul (p, &q, 10); | |
6371 | if (p == q || *q || regnum >= 32) | |
6372 | return -1; | |
6373 | if (regname[0] == 'f') | |
b7d7dc63 | 6374 | regnum += 32; |
75e21f08 | 6375 | else if (regname[0] == 'v') |
b7d7dc63 | 6376 | regnum += 77; |
75e21f08 JJ |
6377 | } |
6378 | else if (regname[0] == 'c' && regname[1] == 'r') | |
6379 | { | |
6380 | p = regname + 2 + (regname[2] == '.'); | |
6381 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 6382 | return -1; |
75e21f08 JJ |
6383 | regnum = p[0] - '0' + 68; |
6384 | } | |
6385 | return regnum; | |
6386 | } |