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Make -mlittle-endian switch set the target_big_endian variable to false.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2132e3a3 3 2004, 2005 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC		 187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
909 /* -mcom means assemble for the common intersection between Power
910 and PowerPC. At present, we just allow the union, rather
911 than the intersection. */
912 else if (strcmp (arg, "com") == 0)
913 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
914 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
915 else if (strcmp (arg, "any") == 0)
916 ppc_cpu |= PPC_OPCODE_ANY;
917 else
918 return 0;
919
920 return 1;
921}
922
252b5132
RH		 923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'u':
931 /* -u means that any undefined symbols should be treated as
932 external, which is the default for gas anyhow. */
933 break;
934
935#ifdef OBJ_ELF
936 case 'l':
937 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 938 sake, recognize -be also. */
252b5132
RH		 939 if (strcmp (arg, "e") == 0)
940 {
941 target_big_endian = 0;
942 set_target_endian = 1;
943 }
944 else
945 return 0;
946
947 break;
948
949 case 'b':
950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 1;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'K':
99a814a1 961 /* Recognize -K PIC. */
252b5132
RH		 962 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
963 {
964 shlib = SHLIB_PIC;
965 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
966 }
967 else
968 return 0;
969
970 break;
971#endif
972
7f6d05e8
CP		 973 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
974 case 'a':
975 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 976 {
977#ifdef BFD64
978 ppc_obj64 = 1;
979#else
980 as_fatal (_("%s unsupported"), "-a64");
981#endif
982 }
7f6d05e8 983 else if (strcmp (arg, "32") == 0)
2b3c4602 984 ppc_obj64 = 0;
7f6d05e8
CP		 985 else
986 return 0;
987 break;
81d4177b 988
252b5132 989 case 'm':
69c040df
AM		 990 if (parse_cpu (arg))
991 ;
252b5132
RH		 992
993 else if (strcmp (arg, "regnames") == 0)
b34976b6 994 reg_names_p = TRUE;
252b5132
RH		 995
996 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 997 reg_names_p = FALSE;
252b5132
RH		 998
999#ifdef OBJ_ELF
99a814a1
AM		 1000 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1001 that require relocation. */
252b5132
RH		 1002 else if (strcmp (arg, "relocatable") == 0)
1003 {
5d6f4f16 1004 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1005 ppc_flags |= EF_PPC_RELOCATABLE;
1006 }
1007
1008 else if (strcmp (arg, "relocatable-lib") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1011 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1012 }
1013
99a814a1 1014 /* -memb, set embedded bit. */
252b5132
RH		 1015 else if (strcmp (arg, "emb") == 0)
1016 ppc_flags |= EF_PPC_EMB;
1017
99a814a1
AM		 1018 /* -mlittle/-mbig set the endianess. */
1019 else if (strcmp (arg, "little") == 0
1020 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1021 {
1022 target_big_endian = 0;
1023 set_target_endian = 1;
1024 }
1025
1026 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1027 {
1028 target_big_endian = 1;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "solaris") == 0)
1033 {
b34976b6 1034 msolaris = TRUE;
252b5132
RH		 1035 ppc_comment_chars = ppc_solaris_comment_chars;
1036 }
1037
1038 else if (strcmp (arg, "no-solaris") == 0)
1039 {
b34976b6 1040 msolaris = FALSE;
252b5132
RH		 1041 ppc_comment_chars = ppc_eabi_comment_chars;
1042 }
1043#endif
1044 else
1045 {
1046 as_bad (_("invalid switch -m%s"), arg);
1047 return 0;
1048 }
1049 break;
1050
1051#ifdef OBJ_ELF
1052 /* -V: SVR4 argument to print version ID. */
1053 case 'V':
1054 print_version_id ();
1055 break;
1056
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 case 'Q':
1060 break;
1061
1062 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1063 rather than .stabs.excl, which is ignored by the linker.
1064 FIXME: Not implemented. */
1065 case 's':
1066 if (arg)
1067 return 0;
1068
1069 break;
1070#endif
1071
1072 default:
1073 return 0;
1074 }
1075
1076 return 1;
1077}
1078
1079void
1080md_show_usage (stream)
1081 FILE *stream;
1082{
bc805888 1083 fprintf (stream, _("\
252b5132 1084PowerPC options:\n\
df12615d
AM		 1085-a32 generate ELF32/XCOFF32\n\
1086-a64 generate ELF64/XCOFF64\n\
252b5132 1087-u ignored\n\
23e1d84c
AM		 1088-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1089-mpwr generate code for POWER (RIOS1)\n\
1090-m601 generate code for PowerPC 601\n\
418c1742 1091-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1092 generate code for PowerPC 603/604\n\
df12615d 1093-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1094-m440 generate code for PowerPC 440\n\
f5c120c5 1095-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1096 generate code For PowerPC 7400/7410/7450/7455\n"));
1097 fprintf (stream, _("\
23e1d84c 1098-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1099-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1100-mbooke64 generate code for 64-bit PowerPC BookE\n\
1101-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1102-mpower4 generate code for Power4 architecture\n\
252b5132 1103-mcom generate code Power/PowerPC common instructions\n\
df12615d 1104-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1105 fprintf (stream, _("\
df12615d 1106-maltivec generate code for AltiVec\n\
6a0c61b7 1107-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1108-mspe generate code for Motorola SPE instructions\n\
1109-mregnames Allow symbolic names for registers\n\
1110-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1111#ifdef OBJ_ELF
bc805888 1112 fprintf (stream, _("\
252b5132
RH		 1113-mrelocatable support for GCC's -mrelocatble option\n\
1114-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1115-memb set PPC_EMB bit in ELF flags\n\
df12615d 1116-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1117 generate code for a little endian machine\n\
df12615d
AM		 1118-mbig, -mbig-endian, -b, -be\n\
1119 generate code for a big endian machine\n\
252b5132
RH		 1120-msolaris generate code for Solaris\n\
1121-mno-solaris do not generate code for Solaris\n\
1122-V print assembler version number\n\
1123-Qy, -Qn ignored\n"));
1124#endif
1125}
1126\f
1127/* Set ppc_cpu if it is not already set. */
1128
1129static void
1130ppc_set_cpu ()
1131{
1132 const char *default_os = TARGET_OS;
1133 const char *default_cpu = TARGET_CPU;
1134
3c9030c1 1135 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1136 {
2a98c3a6 1137 if (ppc_obj64)
3c9030c1 1138 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1139 else if (strncmp (default_os, "aix", 3) == 0
1140 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1141 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1142 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1144 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1146 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1147 {
1148 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1150 else
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1152 }
252b5132 1153 else
99a814a1
AM		 1154 as_fatal (_("Unknown default cpu = %s, os = %s"),
1155 default_cpu, default_os);
252b5132
RH		 1156 }
1157}
1158
9232bbb0
AM		 1159/* Figure out the BFD architecture to use. This function and ppc_mach
1160 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1161
1162enum bfd_architecture
1163ppc_arch ()
1164{
1165 const char *default_cpu = TARGET_CPU;
1166 ppc_set_cpu ();
1167
1168 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1169 return bfd_arch_powerpc;
1170 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1171 return bfd_arch_rs6000;
1172 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1173 {
1174 if (strcmp (default_cpu, "rs6000") == 0)
1175 return bfd_arch_rs6000;
0baf16f2 1176 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1177 return bfd_arch_powerpc;
1178 }
1179
1180 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1181 return bfd_arch_unknown;
1182}
1183
7f6d05e8
CP		 1184unsigned long
1185ppc_mach ()
1186{
2a98c3a6
AM		 1187 if (ppc_obj64)
1188 return bfd_mach_ppc64;
1189 else if (ppc_arch () == bfd_arch_rs6000)
1190 return bfd_mach_rs6k;
1191 else
1192 return bfd_mach_ppc;
7f6d05e8
CP		 1193}
1194
81d4177b 1195extern char*
99a814a1 1196ppc_target_format ()
7f6d05e8
CP		 1197{
1198#ifdef OBJ_COFF
1199#ifdef TE_PE
99a814a1 1200 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1201#elif TE_POWERMAC
0baf16f2 1202 return "xcoff-powermac";
7f6d05e8 1203#else
eb1e0e80 1204# ifdef TE_AIX5
2b3c4602 1205 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1206# else
2b3c4602 1207 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1208# endif
7f6d05e8 1209#endif
7f6d05e8
CP		 1210#endif
1211#ifdef OBJ_ELF
0baf16f2 1212 return (target_big_endian
2b3c4602
AM		 1213 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1214 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1215#endif
1216}
1217
69c040df
AM		 1218/* Insert opcodes and macros into hash tables. Called at startup and
1219 for .cpu pseudo. */
252b5132 1220
69c040df
AM		 1221static void
1222ppc_setup_opcodes (void)
252b5132
RH		 1223{
1224 register const struct powerpc_opcode *op;
1225 const struct powerpc_opcode *op_end;
1226 const struct powerpc_macro *macro;
1227 const struct powerpc_macro *macro_end;
b34976b6 1228 bfd_boolean dup_insn = FALSE;
252b5132 1229
69c040df
AM		 1230 if (ppc_hash != NULL)
1231 hash_die (ppc_hash);
1232 if (ppc_macro_hash != NULL)
1233 hash_die (ppc_macro_hash);
252b5132
RH		 1234
1235 /* Insert the opcodes into a hash table. */
1236 ppc_hash = hash_new ();
1237
1238 op_end = powerpc_opcodes + powerpc_num_opcodes;
1239 for (op = powerpc_opcodes; op < op_end; op++)
1240 {
1241 know ((op->opcode & op->mask) == op->opcode);
1242
2b3c4602 1243 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1244 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1245 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1246 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1247 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1248 /* Certain instructions (eg: extsw) do not exist in the
1249 32-bit BookE instruction set, but they do exist in the
1250 64-bit BookE instruction set, and other PPC instruction
1251 sets. Check to see if the opcode has the BOOKE64 flag set.
1252 If it does make sure that the target CPU is not the BookE32. */
1253 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1254 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1255 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1256 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1257 || ((op->flags & PPC_OPCODE_POWER4)
1258 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1259 {
1260 const char *retval;
1261
1262 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1263 if (retval != NULL)
252b5132 1264 {
99a814a1 1265 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1266 if ((ppc_cpu & PPC_OPCODE_601) != 0
1267 && (op->flags & PPC_OPCODE_POWER) != 0)
1268 continue;
1269
99a814a1
AM		 1270 as_bad (_("Internal assembler error for instruction %s"),
1271 op->name);
b34976b6 1272 dup_insn = TRUE;
252b5132
RH		 1273 }
1274 }
1275 }
1276
3c9030c1
AM		 1277 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1278 for (op = powerpc_opcodes; op < op_end; op++)
1279 hash_insert (ppc_hash, op->name, (PTR) op);
1280
252b5132
RH		 1281 /* Insert the macros into a hash table. */
1282 ppc_macro_hash = hash_new ();
1283
1284 macro_end = powerpc_macros + powerpc_num_macros;
1285 for (macro = powerpc_macros; macro < macro_end; macro++)
1286 {
1287 if ((macro->flags & ppc_cpu) != 0)
1288 {
1289 const char *retval;
1290
1291 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1292 if (retval != (const char *) NULL)
1293 {
1294 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1295 dup_insn = TRUE;
252b5132
RH		 1296 }
1297 }
1298 }
1299
1300 if (dup_insn)
1301 abort ();
69c040df
AM		 1302}
1303
1304/* This function is called when the assembler starts up. It is called
1305 after the options have been parsed and the output file has been
1306 opened. */
1307
1308void
1309md_begin ()
1310{
1311 ppc_set_cpu ();
1312
1313 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1314
1315#ifdef OBJ_ELF
1316 /* Set the ELF flags if desired. */
1317 if (ppc_flags && !msolaris)
1318 bfd_set_private_flags (stdoutput, ppc_flags);
1319#endif
1320
1321 ppc_setup_opcodes ();
252b5132 1322
67c1ffbe 1323 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1324 by the user. */
252b5132
RH		 1325 if (!set_target_endian)
1326 {
1327 set_target_endian = 1;
1328 target_big_endian = PPC_BIG_ENDIAN;
1329 }
1330
1331#ifdef OBJ_XCOFF
1332 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1333
1334 /* Create dummy symbols to serve as initial csects. This forces the
1335 text csects to precede the data csects. These symbols will not
1336 be output. */
1337 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1338 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1339 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1340 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1341#endif
1342
1343#ifdef TE_PE
1344
1345 ppc_current_section = text_section;
81d4177b 1346 ppc_previous_section = 0;
252b5132
RH		 1347
1348#endif
1349}
1350
6a0c61b7
EZ		 1351void
1352ppc_cleanup ()
1353{
dc1d03fc 1354#ifdef OBJ_ELF
6a0c61b7
EZ		 1355 if (ppc_apuinfo_list == NULL)
1356 return;
1357
1358 /* Ok, so write the section info out. We have this layout:
1359
1360 byte data what
1361 ---- ---- ----
1362 0 8 length of "APUinfo\0"
1363 4 (n*4) number of APU's (4 bytes each)
1364 8 2 note type 2
1365 12 "APUinfo\0" name
1366 20 APU#1 first APU's info
1367 24 APU#2 second APU's info
1368 ... ...
1369 */
1370 {
1371 char *p;
1372 asection *seg = now_seg;
1373 subsegT subseg = now_subseg;
1374 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1375 unsigned int i;
6a0c61b7
EZ		 1376
1377 /* Create the .PPC.EMB.apuinfo section. */
1378 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1379 bfd_set_section_flags (stdoutput,
1380 apuinfo_secp,
e1a9cb8e 1381 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1382
1383 p = frag_more (4);
1384 md_number_to_chars (p, (valueT) 8, 4);
1385
1386 p = frag_more (4);
e98d298c 1387 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1388
1389 p = frag_more (4);
1390 md_number_to_chars (p, (valueT) 2, 4);
1391
1392 p = frag_more (8);
1393 strcpy (p, "APUinfo");
1394
1395 for (i = 0; i < ppc_apuinfo_num; i++)
1396 {
b34976b6
AM		 1397 p = frag_more (4);
1398 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1399 }
1400
1401 frag_align (2, 0, 0);
1402
1403 /* We probably can't restore the current segment, for there likely
1404 isn't one yet... */
1405 if (seg && subseg)
1406 subseg_set (seg, subseg);
1407 }
dc1d03fc 1408#endif
6a0c61b7
EZ		 1409}
1410
252b5132
RH		 1411/* Insert an operand value into an instruction. */
1412
1413static unsigned long
1414ppc_insert_operand (insn, operand, val, file, line)
1415 unsigned long insn;
1416 const struct powerpc_operand *operand;
1417 offsetT val;
1418 char *file;
1419 unsigned int line;
1420{
1421 if (operand->bits != 32)
1422 {
1423 long min, max;
1424 offsetT test;
1425
1426 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1427 {
d0e9a01c 1428 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1429 max = (1 << operand->bits) - 1;
1430 else
1431 max = (1 << (operand->bits - 1)) - 1;
1432 min = - (1 << (operand->bits - 1));
1433
2b3c4602 1434 if (!ppc_obj64)
252b5132
RH		 1435 {
1436 /* Some people write 32 bit hex constants with the sign
1437 extension done by hand. This shouldn't really be
1438 valid, but, to permit this code to assemble on a 64
1439 bit host, we sign extend the 32 bit value. */
1440 if (val > 0
92161534
ILT		 1441 && (val & (offsetT) 0x80000000) != 0
1442 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1443 {
1444 val -= 0x80000000;
1445 val -= 0x80000000;
1446 }
1447 }
1448 }
1449 else
1450 {
1451 max = (1 << operand->bits) - 1;
1452 min = 0;
1453 }
1454
1455 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1456 test = - val;
1457 else
1458 test = val;
1459
1460 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1461 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1462 }
1463
1464 if (operand->insert)
1465 {
1466 const char *errmsg;
1467
1468 errmsg = NULL;
2b3c4602 1469 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1470 if (errmsg != (const char *) NULL)
0baf16f2 1471 as_bad_where (file, line, errmsg);
252b5132
RH		 1472 }
1473 else
1474 insn |= (((long) val & ((1 << operand->bits) - 1))
1475 << operand->shift);
1476
1477 return insn;
1478}
1479
1480\f
1481#ifdef OBJ_ELF
1482/* Parse @got, etc. and return the desired relocation. */
1483static bfd_reloc_code_real_type
1484ppc_elf_suffix (str_p, exp_p)
1485 char **str_p;
1486 expressionS *exp_p;
1487{
1488 struct map_bfd {
1489 char *string;
b7d7dc63
AM		 1490 unsigned int length : 8;
1491 unsigned int valid32 : 1;
1492 unsigned int valid64 : 1;
1493 unsigned int reloc;
252b5132
RH		 1494 };
1495
1496 char ident[20];
1497 char *str = *str_p;
1498 char *str2;
1499 int ch;
1500 int len;
15c1449b 1501 const struct map_bfd *ptr;
252b5132 1502
b7d7dc63
AM		 1503#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1504#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1505#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1506
15c1449b 1507 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1508 MAP ("l", BFD_RELOC_LO16),
1509 MAP ("h", BFD_RELOC_HI16),
1510 MAP ("ha", BFD_RELOC_HI16_S),
1511 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1512 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1513 MAP ("got", BFD_RELOC_16_GOTOFF),
1514 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1515 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1516 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1517 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1518 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1519 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1520 MAP ("copy", BFD_RELOC_PPC_COPY),
1521 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1522 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1523 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1524 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1525 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1526 MAP ("tls", BFD_RELOC_PPC_TLS),
1527 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1528 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1529 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1530 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1531 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1532 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1533 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1534 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1535 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1536 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1537 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1538 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1539 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1540 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1541 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1542 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1543 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1544 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1545 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1546 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1547 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1548 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1549 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1550 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1551 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1552 MAP32 ("fixup", BFD_RELOC_CTOR),
1553 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1554 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1555 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1556 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1557 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1558 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1559 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1560 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1561 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1562 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1563 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1564 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1565 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1566 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1567 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1568 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1569 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1570 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1571 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1572 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1573 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1574 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1575 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1576 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1577 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1578 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1579 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1580 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1581 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1582 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1583 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1584 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1585 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1586 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1587 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1588 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1589 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1590 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1591 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1592 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1593 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1594 };
1595
1596 if (*str++ != '@')
1597 return BFD_RELOC_UNUSED;
1598
1599 for (ch = *str, str2 = ident;
1600 (str2 < ident + sizeof (ident) - 1
3882b010 1601 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1602 ch = *++str)
1603 {
3882b010 1604 *str2++ = TOLOWER (ch);
252b5132
RH		 1605 }
1606
1607 *str2 = '\0';
1608 len = str2 - ident;
1609
1610 ch = ident[0];
1611 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1612 if (ch == ptr->string[0]
1613 && len == ptr->length
b7d7dc63
AM		 1614 && memcmp (ident, ptr->string, ptr->length) == 0
1615 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1616 {
15c1449b
AM		 1617 int reloc = ptr->reloc;
1618
cdba85ec 1619 if (!ppc_obj64)
5f6db75a
AM		 1620 if (exp_p->X_add_number != 0
1621 && (reloc == (int) BFD_RELOC_16_GOTOFF
1622 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1623 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1624 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1625 as_warn (_("identifier+constant@got means identifier@got+constant"));
1626
1627 /* Now check for identifier@suffix+constant. */
1628 if (*str == '-' || *str == '+')
252b5132 1629 {
5f6db75a
AM		 1630 char *orig_line = input_line_pointer;
1631 expressionS new_exp;
1632
1633 input_line_pointer = str;
1634 expression (&new_exp);
1635 if (new_exp.X_op == O_constant)
252b5132 1636 {
5f6db75a
AM		 1637 exp_p->X_add_number += new_exp.X_add_number;
1638 str = input_line_pointer;
252b5132 1639 }
5f6db75a
AM		 1640
1641 if (&input_line_pointer != str_p)
1642 input_line_pointer = orig_line;
252b5132 1643 }
252b5132 1644 *str_p = str;
0baf16f2 1645
2b3c4602 1646 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1647 && exp_p->X_op == O_symbol
1648 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1649 {
9f2b53d7
AM		 1650 /* Change the symbol so that the dummy .TOC. symbol can be
1651 omitted from the object file. */
0baf16f2
AM		 1652 exp_p->X_add_symbol = &abs_symbol;
1653 }
1654
15c1449b 1655 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1656 }
1657
1658 return BFD_RELOC_UNUSED;
1659}
1660
99a814a1
AM		 1661/* Like normal .long/.short/.word, except support @got, etc.
1662 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1663static void
1664ppc_elf_cons (nbytes)
0baf16f2 1665 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1666{
1667 expressionS exp;
1668 bfd_reloc_code_real_type reloc;
1669
1670 if (is_it_end_of_statement ())
1671 {
1672 demand_empty_rest_of_line ();
1673 return;
1674 }
1675
1676 do
1677 {
1678 expression (&exp);
1679 if (exp.X_op == O_symbol
1680 && *input_line_pointer == '@'
99a814a1
AM		 1681 && (reloc = ppc_elf_suffix (&input_line_pointer,
1682 &exp)) != BFD_RELOC_UNUSED)
252b5132 1683 {
99a814a1
AM		 1684 reloc_howto_type *reloc_howto;
1685 int size;
1686
1687 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1688 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1689
1690 if (size > nbytes)
0baf16f2
AM		 1691 {
1692 as_bad (_("%s relocations do not fit in %d bytes\n"),
1693 reloc_howto->name, nbytes);
1694 }
252b5132
RH		 1695 else
1696 {
0baf16f2
AM		 1697 char *p;
1698 int offset;
252b5132 1699
0baf16f2
AM		 1700 p = frag_more (nbytes);
1701 offset = 0;
1702 if (target_big_endian)
1703 offset = nbytes - size;
99a814a1
AM		 1704 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1705 &exp, 0, reloc);
252b5132
RH		 1706 }
1707 }
1708 else
1709 emit_expr (&exp, (unsigned int) nbytes);
1710 }
1711 while (*input_line_pointer++ == ',');
1712
99a814a1
AM		 1713 /* Put terminator back into stream. */
1714 input_line_pointer--;
252b5132
RH		 1715 demand_empty_rest_of_line ();
1716}
1717
1718/* Solaris pseduo op to change to the .rodata section. */
1719static void
1720ppc_elf_rdata (xxx)
1721 int xxx;
1722{
1723 char *save_line = input_line_pointer;
1724 static char section[] = ".rodata\n";
1725
99a814a1 1726 /* Just pretend this is .section .rodata */
252b5132
RH		 1727 input_line_pointer = section;
1728 obj_elf_section (xxx);
1729
1730 input_line_pointer = save_line;
1731}
1732
99a814a1 1733/* Pseudo op to make file scope bss items. */
252b5132 1734static void
99a814a1 1735ppc_elf_lcomm (xxx)
92161534 1736 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1737{
1738 register char *name;
1739 register char c;
1740 register char *p;
1741 offsetT size;
1742 register symbolS *symbolP;
1743 offsetT align;
1744 segT old_sec;
1745 int old_subsec;
1746 char *pfrag;
1747 int align2;
1748
1749 name = input_line_pointer;
1750 c = get_symbol_end ();
1751
99a814a1 1752 /* just after name is now '\0'. */
252b5132
RH		 1753 p = input_line_pointer;
1754 *p = c;
1755 SKIP_WHITESPACE ();
1756 if (*input_line_pointer != ',')
1757 {
1758 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1759 ignore_rest_of_line ();
1760 return;
1761 }
1762
1763 input_line_pointer++; /* skip ',' */
1764 if ((size = get_absolute_expression ()) < 0)
1765 {
1766 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1767 ignore_rest_of_line ();
1768 return;
1769 }
1770
1771 /* The third argument to .lcomm is the alignment. */
1772 if (*input_line_pointer != ',')
1773 align = 8;
1774 else
1775 {
1776 ++input_line_pointer;
1777 align = get_absolute_expression ();
1778 if (align <= 0)
1779 {
1780 as_warn (_("ignoring bad alignment"));
1781 align = 8;
1782 }
1783 }
1784
1785 *p = 0;
1786 symbolP = symbol_find_or_make (name);
1787 *p = c;
1788
1789 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1790 {
1791 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1792 S_GET_NAME (symbolP));
1793 ignore_rest_of_line ();
1794 return;
1795 }
1796
1797 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1798 {
1799 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1800 S_GET_NAME (symbolP),
1801 (long) S_GET_VALUE (symbolP),
1802 (long) size);
1803
1804 ignore_rest_of_line ();
1805 return;
1806 }
1807
99a814a1 1808 /* Allocate_bss. */
252b5132
RH		 1809 old_sec = now_seg;
1810 old_subsec = now_subseg;
1811 if (align)
1812 {
99a814a1 1813 /* Convert to a power of 2 alignment. */
252b5132
RH		 1814 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1815 if (align != 1)
1816 {
1817 as_bad (_("Common alignment not a power of 2"));
1818 ignore_rest_of_line ();
1819 return;
1820 }
1821 }
1822 else
1823 align2 = 0;
1824
1825 record_alignment (bss_section, align2);
1826 subseg_set (bss_section, 0);
1827 if (align2)
1828 frag_align (align2, 0, 0);
1829 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1830 symbol_get_frag (symbolP)->fr_symbol = 0;
1831 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1832 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1833 (char *) 0);
1834 *pfrag = 0;
1835 S_SET_SIZE (symbolP, size);
1836 S_SET_SEGMENT (symbolP, bss_section);
1837 subseg_set (old_sec, old_subsec);
1838 demand_empty_rest_of_line ();
1839}
1840
1841/* Validate any relocations emitted for -mrelocatable, possibly adding
1842 fixups for word relocations in writable segments, so we can adjust
1843 them at runtime. */
1844static void
1845ppc_elf_validate_fix (fixp, seg)
1846 fixS *fixp;
1847 segT seg;
1848{
1849 if (fixp->fx_done || fixp->fx_pcrel)
1850 return;
1851
1852 switch (shlib)
1853 {
1854 case SHLIB_NONE:
1855 case SHLIB_PIC:
1856 return;
1857
5d6f4f16 1858 case SHLIB_MRELOCATABLE:
252b5132
RH		 1859 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1860 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1861 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1862 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1863 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1864 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1865 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1866 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1867 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1868 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1869 && strcmp (segment_name (seg), ".got2") != 0
1870 && strcmp (segment_name (seg), ".dtors") != 0
1871 && strcmp (segment_name (seg), ".ctors") != 0
1872 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1873 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1874 && strcmp (segment_name (seg), ".eh_frame") != 0
1875 && strcmp (segment_name (seg), ".ex_shared") != 0)
1876 {
1877 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1878 || fixp->fx_r_type != BFD_RELOC_CTOR)
1879 {
1880 as_bad_where (fixp->fx_file, fixp->fx_line,
1881 _("Relocation cannot be done when using -mrelocatable"));
1882 }
1883 }
1884 return;
1885 }
1886}
0baf16f2 1887
7e8d4ab4
AM		 1888/* Prevent elf_frob_file_before_adjust removing a weak undefined
1889 function descriptor sym if the corresponding code sym is used. */
1890
1891void
1892ppc_frob_file_before_adjust ()
0baf16f2 1893{
7e8d4ab4 1894 symbolS *symp;
9232bbb0 1895 asection *toc;
0baf16f2 1896
7e8d4ab4
AM		 1897 if (!ppc_obj64)
1898 return;
1899
1900 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1901 {
7e8d4ab4
AM		 1902 const char *name;
1903 char *dotname;
1904 symbolS *dotsym;
1905 size_t len;
1906
1907 name = S_GET_NAME (symp);
1908 if (name[0] == '.')
1909 continue;
1910
1911 if (! S_IS_WEAK (symp)
1912 || S_IS_DEFINED (symp))
1913 continue;
1914
1915 len = strlen (name) + 1;
1916 dotname = xmalloc (len + 1);
1917 dotname[0] = '.';
1918 memcpy (dotname + 1, name, len);
1919 dotsym = symbol_find (dotname);
1920 free (dotname);
1921 if (dotsym != NULL && (symbol_used_p (dotsym)
1922 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1923 symbol_mark_used (symp);
1924
0baf16f2
AM		 1925 }
1926
9232bbb0
AM		 1927 toc = bfd_get_section_by_name (stdoutput, ".toc");
1928 if (toc != NULL
1929 && bfd_section_size (stdoutput, toc) > 0x10000)
1930 as_warn (_("TOC section size exceeds 64k"));
1931
7e8d4ab4
AM		 1932 /* Don't emit .TOC. symbol. */
1933 symp = symbol_find (".TOC.");
1934 if (symp != NULL)
1935 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1936}
252b5132
RH		 1937#endif /* OBJ_ELF */
1938\f
1939#ifdef TE_PE
1940
1941/*
99a814a1 1942 * Summary of parse_toc_entry.
252b5132
RH		 1943 *
1944 * in: Input_line_pointer points to the '[' in one of:
1945 *
1946 * [toc] [tocv] [toc32] [toc64]
1947 *
1948 * Anything else is an error of one kind or another.
1949 *
81d4177b 1950 * out:
252b5132
RH		 1951 * return value: success or failure
1952 * toc_kind: kind of toc reference
1953 * input_line_pointer:
1954 * success: first char after the ']'
1955 * failure: unchanged
1956 *
1957 * settings:
1958 *
1959 * [toc] - rv == success, toc_kind = default_toc
1960 * [tocv] - rv == success, toc_kind = data_in_toc
1961 * [toc32] - rv == success, toc_kind = must_be_32
1962 * [toc64] - rv == success, toc_kind = must_be_64
1963 *
1964 */
1965
81d4177b
KH		 1966enum toc_size_qualifier
1967{
252b5132
RH		 1968 default_toc, /* The toc cell constructed should be the system default size */
1969 data_in_toc, /* This is a direct reference to a toc cell */
1970 must_be_32, /* The toc cell constructed must be 32 bits wide */
1971 must_be_64 /* The toc cell constructed must be 64 bits wide */
1972};
1973
1974static int
99a814a1 1975parse_toc_entry (toc_kind)
252b5132
RH		 1976 enum toc_size_qualifier *toc_kind;
1977{
1978 char *start;
1979 char *toc_spec;
1980 char c;
1981 enum toc_size_qualifier t;
1982
99a814a1 1983 /* Save the input_line_pointer. */
252b5132
RH		 1984 start = input_line_pointer;
1985
99a814a1 1986 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1987 ++input_line_pointer;
1988 SKIP_WHITESPACE ();
81d4177b 1989
99a814a1 1990 /* Find the spelling of the operand. */
252b5132
RH		 1991 toc_spec = input_line_pointer;
1992 c = get_symbol_end ();
1993
99a814a1 1994 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1995 {
1996 t = default_toc;
1997 }
99a814a1 1998 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1999 {
2000 t = data_in_toc;
2001 }
99a814a1 2002 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2003 {
2004 t = must_be_32;
2005 }
99a814a1 2006 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2007 {
2008 t = must_be_64;
2009 }
2010 else
2011 {
2012 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2013 *input_line_pointer = c;
2014 input_line_pointer = start;
252b5132
RH		 2015 return 0;
2016 }
2017
99a814a1
AM		 2018 /* Now find the ']'. */
2019 *input_line_pointer = c;
252b5132 2020
81d4177b
KH		 2021 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2022 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2023
2024 if (c != ']')
2025 {
2026 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2027 input_line_pointer = start;
252b5132
RH		 2028 return 0;
2029 }
2030
99a814a1 2031 *toc_kind = t;
252b5132
RH		 2032 return 1;
2033}
2034#endif
2035\f
2036
dc1d03fc 2037#ifdef OBJ_ELF
6a0c61b7
EZ		 2038#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2039static void
dc1d03fc 2040ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2041 unsigned int apu, version;
2042{
2043 unsigned int i;
2044
2045 /* Check we don't already exist. */
2046 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2047 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2048 return;
b34976b6 2049
6a0c61b7
EZ		 2050 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2051 {
2052 if (ppc_apuinfo_num_alloc == 0)
2053 {
2054 ppc_apuinfo_num_alloc = 4;
2055 ppc_apuinfo_list = (unsigned long *)
2056 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2057 }
2058 else
2059 {
2060 ppc_apuinfo_num_alloc += 4;
2061 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2062 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2063 }
2064 }
dc1d03fc 2065 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2066}
2067#undef APUID
dc1d03fc 2068#endif
6a0c61b7
EZ		 2069\f
2070
252b5132
RH		 2071/* We need to keep a list of fixups. We can't simply generate them as
2072 we go, because that would require us to first create the frag, and
2073 that would screw up references to ``.''. */
2074
2075struct ppc_fixup
2076{
2077 expressionS exp;
2078 int opindex;
2079 bfd_reloc_code_real_type reloc;
2080};
2081
2082#define MAX_INSN_FIXUPS (5)
2083
2084/* This routine is called for each instruction to be assembled. */
2085
2086void
2087md_assemble (str)
2088 char *str;
2089{
2090 char *s;
2091 const struct powerpc_opcode *opcode;
2092 unsigned long insn;
2093 const unsigned char *opindex_ptr;
2094 int skip_optional;
2095 int need_paren;
2096 int next_opindex;
2097 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2098 int fc;
2099 char *f;
09b935ac 2100 int addr_mod;
252b5132
RH		 2101 int i;
2102#ifdef OBJ_ELF
2103 bfd_reloc_code_real_type reloc;
2104#endif
2105
2106 /* Get the opcode. */
3882b010 2107 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2108 ;
2109 if (*s != '\0')
2110 *s++ = '\0';
2111
2112 /* Look up the opcode in the hash table. */
2113 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2114 if (opcode == (const struct powerpc_opcode *) NULL)
2115 {
2116 const struct powerpc_macro *macro;
2117
2118 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2119 if (macro == (const struct powerpc_macro *) NULL)
2120 as_bad (_("Unrecognized opcode: `%s'"), str);
2121 else
2122 ppc_macro (s, macro);
2123
2124 return;
2125 }
2126
2127 insn = opcode->opcode;
2128
2129 str = s;
3882b010 2130 while (ISSPACE (*str))
252b5132
RH		 2131 ++str;
2132
2133 /* PowerPC operands are just expressions. The only real issue is
2134 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2135 an optional operand separate the operands only with commas (in some
2136 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2137 have optional operands). Most instructions with optional operands
2138 have only one. Those that have more than one optional operand can
2139 take either all their operands or none. So, before we start seriously
2140 parsing the operands, we check to see if we have optional operands,
2141 and if we do, we count the number of commas to see which operands
2142 have been omitted. */
252b5132
RH		 2143 skip_optional = 0;
2144 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2145 {
2146 const struct powerpc_operand *operand;
2147
2148 operand = &powerpc_operands[*opindex_ptr];
2149 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2150 {
2151 unsigned int opcount;
7fe9cf6b
NC		 2152 unsigned int num_operands_expected;
2153 unsigned int i;
252b5132
RH		 2154
2155 /* There is an optional operand. Count the number of
2156 commas in the input line. */
2157 if (*str == '\0')
2158 opcount = 0;
2159 else
2160 {
2161 opcount = 1;
2162 s = str;
2163 while ((s = strchr (s, ',')) != (char *) NULL)
2164 {
2165 ++opcount;
2166 ++s;
2167 }
2168 }
2169
7fe9cf6b
NC		 2170 /* Compute the number of expected operands.
2171 Do not count fake operands. */
2172 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2173 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2174 ++ num_operands_expected;
2175
252b5132
RH		 2176 /* If there are fewer operands in the line then are called
2177 for by the instruction, we want to skip the optional
1f6c9eb0 2178 operands. */
7fe9cf6b 2179 if (opcount < num_operands_expected)
252b5132
RH		 2180 skip_optional = 1;
2181
2182 break;
2183 }
2184 }
2185
2186 /* Gather the operands. */
2187 need_paren = 0;
2188 next_opindex = 0;
2189 fc = 0;
2190 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2191 {
2192 const struct powerpc_operand *operand;
2193 const char *errmsg;
2194 char *hold;
2195 expressionS ex;
2196 char endc;
2197
2198 if (next_opindex == 0)
2199 operand = &powerpc_operands[*opindex_ptr];
2200 else
2201 {
2202 operand = &powerpc_operands[next_opindex];
2203 next_opindex = 0;
2204 }
252b5132
RH		 2205 errmsg = NULL;
2206
2207 /* If this is a fake operand, then we do not expect anything
2208 from the input. */
2209 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2210 {
2b3c4602 2211 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2212 if (errmsg != (const char *) NULL)
2213 as_bad (errmsg);
2214 continue;
2215 }
2216
2217 /* If this is an optional operand, and we are skipping it, just
2218 insert a zero. */
2219 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2220 && skip_optional)
2221 {
2222 if (operand->insert)
2223 {
2b3c4602 2224 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2225 if (errmsg != (const char *) NULL)
2226 as_bad (errmsg);
2227 }
2228 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2229 next_opindex = *opindex_ptr + 1;
2230 continue;
2231 }
2232
2233 /* Gather the operand. */
2234 hold = input_line_pointer;
2235 input_line_pointer = str;
2236
2237#ifdef TE_PE
81d4177b 2238 if (*input_line_pointer == '[')
252b5132
RH		 2239 {
2240 /* We are expecting something like the second argument here:
99a814a1
AM		 2241 *
2242 * lwz r4,[toc].GS.0.static_int(rtoc)
2243 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2244 * The argument following the `]' must be a symbol name, and the
2245 * register must be the toc register: 'rtoc' or '2'
2246 *
2247 * The effect is to 0 as the displacement field
2248 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2249 * the appropriate variation) reloc against it based on the symbol.
2250 * The linker will build the toc, and insert the resolved toc offset.
2251 *
2252 * Note:
2253 * o The size of the toc entry is currently assumed to be
2254 * 32 bits. This should not be assumed to be a hard coded
2255 * number.
2256 * o In an effort to cope with a change from 32 to 64 bits,
2257 * there are also toc entries that are specified to be
2258 * either 32 or 64 bits:
2259 * lwz r4,[toc32].GS.0.static_int(rtoc)
2260 * lwz r4,[toc64].GS.0.static_int(rtoc)
2261 * These demand toc entries of the specified size, and the
2262 * instruction probably requires it.
2263 */
252b5132
RH		 2264
2265 int valid_toc;
2266 enum toc_size_qualifier toc_kind;
2267 bfd_reloc_code_real_type toc_reloc;
2268
99a814a1
AM		 2269 /* Go parse off the [tocXX] part. */
2270 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2271
81d4177b 2272 if (!valid_toc)
252b5132 2273 {
99a814a1
AM		 2274 /* Note: message has already been issued.
2275 FIXME: what sort of recovery should we do?
2276 demand_rest_of_line (); return; ? */
252b5132
RH		 2277 }
2278
99a814a1
AM		 2279 /* Now get the symbol following the ']'. */
2280 expression (&ex);
252b5132
RH		 2281
2282 switch (toc_kind)
2283 {
2284 case default_toc:
99a814a1
AM		 2285 /* In this case, we may not have seen the symbol yet,
2286 since it is allowed to appear on a .extern or .globl
2287 or just be a label in the .data section. */
252b5132
RH		 2288 toc_reloc = BFD_RELOC_PPC_TOC16;
2289 break;
2290 case data_in_toc:
99a814a1
AM		 2291 /* 1. The symbol must be defined and either in the toc
2292 section, or a global.
2293 2. The reloc generated must have the TOCDEFN flag set
2294 in upper bit mess of the reloc type.
2295 FIXME: It's a little confusing what the tocv
2296 qualifier can be used for. At the very least, I've
2297 seen three uses, only one of which I'm sure I can
2298 explain. */
81d4177b
KH		 2299 if (ex.X_op == O_symbol)
2300 {
252b5132 2301 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2302 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2303 != tocdata_section)
252b5132 2304 {
99a814a1 2305 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2306 }
2307 }
2308
2309 toc_reloc = BFD_RELOC_PPC_TOC16;
2310 break;
2311 case must_be_32:
99a814a1
AM		 2312 /* FIXME: these next two specifically specify 32/64 bit
2313 toc entries. We don't support them today. Is this
2314 the right way to say that? */
252b5132
RH		 2315 toc_reloc = BFD_RELOC_UNUSED;
2316 as_bad (_("Unimplemented toc32 expression modifier"));
2317 break;
2318 case must_be_64:
99a814a1 2319 /* FIXME: see above. */
252b5132
RH		 2320 toc_reloc = BFD_RELOC_UNUSED;
2321 as_bad (_("Unimplemented toc64 expression modifier"));
2322 break;
2323 default:
bc805888 2324 fprintf (stderr,
99a814a1
AM		 2325 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2326 toc_kind);
bc805888 2327 abort ();
252b5132
RH		 2328 break;
2329 }
2330
2331 /* We need to generate a fixup for this expression. */
2332 if (fc >= MAX_INSN_FIXUPS)
2333 as_fatal (_("too many fixups"));
2334
2335 fixups[fc].reloc = toc_reloc;
2336 fixups[fc].exp = ex;
2337 fixups[fc].opindex = *opindex_ptr;
2338 ++fc;
2339
99a814a1
AM		 2340 /* Ok. We've set up the fixup for the instruction. Now make it
2341 look like the constant 0 was found here. */
252b5132
RH		 2342 ex.X_unsigned = 1;
2343 ex.X_op = O_constant;
2344 ex.X_add_number = 0;
2345 ex.X_add_symbol = NULL;
2346 ex.X_op_symbol = NULL;
2347 }
2348
2349 else
2350#endif /* TE_PE */
2351 {
2352 if (! register_name (&ex))
2353 {
2354 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2355 cr_operand = TRUE;
252b5132 2356 expression (&ex);
b34976b6 2357 cr_operand = FALSE;
252b5132
RH		 2358 }
2359 }
2360
2361 str = input_line_pointer;
2362 input_line_pointer = hold;
2363
2364 if (ex.X_op == O_illegal)
2365 as_bad (_("illegal operand"));
2366 else if (ex.X_op == O_absent)
2367 as_bad (_("missing operand"));
2368 else if (ex.X_op == O_register)
2369 {
2370 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2371 (char *) NULL, 0);
2372 }
2373 else if (ex.X_op == O_constant)
2374 {
2375#ifdef OBJ_ELF
81d4177b 2376 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2377 char *orig_str = str;
2378
2379 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2380 switch (reloc)
2381 {
2382 default:
2383 str = orig_str;
2384 break;
2385
2386 case BFD_RELOC_LO16:
2387 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2388 something which cleared it, we always produce a
2389 signed value. */
2390 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2391 ex.X_add_number &= 0xffff;
2392 else
0baf16f2 2393 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2394 break;
2395
2396 case BFD_RELOC_HI16:
0baf16f2
AM		 2397 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2398 ex.X_add_number = PPC_HI (ex.X_add_number);
2399 else
2400 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2401 break;
2402
2403 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2404 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2405 ex.X_add_number = PPC_HA (ex.X_add_number);
2406 else
2407 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2408 break;
2409
0baf16f2
AM		 2410 case BFD_RELOC_PPC64_HIGHER:
2411 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2412 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2413 else
2414 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2415 break;
2416
2417 case BFD_RELOC_PPC64_HIGHER_S:
2418 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2419 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2420 else
2421 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2422 break;
0baf16f2
AM		 2423
2424 case BFD_RELOC_PPC64_HIGHEST:
2425 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2426 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2427 else
2428 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2429 break;
2430
2431 case BFD_RELOC_PPC64_HIGHEST_S:
2432 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2433 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2434 else
2435 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2436 break;
252b5132 2437 }
0baf16f2 2438#endif /* OBJ_ELF */
252b5132
RH		 2439 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2440 (char *) NULL, 0);
2441 }
2442#ifdef OBJ_ELF
2443 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2444 {
cdba85ec
AM		 2445 /* Some TLS tweaks. */
2446 switch (reloc)
2447 {
2448 default:
2449 break;
2450 case BFD_RELOC_PPC_TLS:
2451 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2452 (char *) NULL, 0);
2453 break;
2454 /* We'll only use the 32 (or 64) bit form of these relocations
2455 in constants. Instructions get the 16 bit form. */
2456 case BFD_RELOC_PPC_DTPREL:
2457 reloc = BFD_RELOC_PPC_DTPREL16;
2458 break;
2459 case BFD_RELOC_PPC_TPREL:
2460 reloc = BFD_RELOC_PPC_TPREL16;
2461 break;
2462 }
2463
99a814a1
AM		 2464 /* For the absolute forms of branches, convert the PC
2465 relative form back into the absolute. */
252b5132
RH		 2466 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2467 {
2468 switch (reloc)
2469 {
2470 case BFD_RELOC_PPC_B26:
2471 reloc = BFD_RELOC_PPC_BA26;
2472 break;
2473 case BFD_RELOC_PPC_B16:
2474 reloc = BFD_RELOC_PPC_BA16;
2475 break;
2476 case BFD_RELOC_PPC_B16_BRTAKEN:
2477 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2478 break;
2479 case BFD_RELOC_PPC_B16_BRNTAKEN:
2480 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2481 break;
2482 default:
2483 break;
2484 }
2485 }
2486
2b3c4602 2487 if (ppc_obj64
adadcc0c 2488 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2489 {
2490 switch (reloc)
2491 {
2492 case BFD_RELOC_16:
2493 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2494 break;
2495 case BFD_RELOC_LO16:
2496 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2497 break;
2498 case BFD_RELOC_16_GOTOFF:
2499 reloc = BFD_RELOC_PPC64_GOT16_DS;
2500 break;
2501 case BFD_RELOC_LO16_GOTOFF:
2502 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2503 break;
2504 case BFD_RELOC_LO16_PLTOFF:
2505 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2506 break;
1cfc59d5 2507 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2508 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2509 break;
2510 case BFD_RELOC_LO16_BASEREL:
2511 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2512 break;
2513 case BFD_RELOC_PPC_TOC16:
2514 reloc = BFD_RELOC_PPC64_TOC16_DS;
2515 break;
2516 case BFD_RELOC_PPC64_TOC16_LO:
2517 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2518 break;
2519 case BFD_RELOC_PPC64_PLTGOT16:
2520 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2521 break;
2522 case BFD_RELOC_PPC64_PLTGOT16_LO:
2523 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2524 break;
cdba85ec
AM		 2525 case BFD_RELOC_PPC_DTPREL16:
2526 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2527 break;
2528 case BFD_RELOC_PPC_DTPREL16_LO:
2529 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2530 break;
2531 case BFD_RELOC_PPC_TPREL16:
2532 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2533 break;
2534 case BFD_RELOC_PPC_TPREL16_LO:
2535 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2536 break;
2537 case BFD_RELOC_PPC_GOT_DTPREL16:
2538 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2539 case BFD_RELOC_PPC_GOT_TPREL16:
2540 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2541 break;
0baf16f2
AM		 2542 default:
2543 as_bad (_("unsupported relocation for DS offset field"));
2544 break;
2545 }
2546 }
2547
252b5132
RH		 2548 /* We need to generate a fixup for this expression. */
2549 if (fc >= MAX_INSN_FIXUPS)
2550 as_fatal (_("too many fixups"));
2551 fixups[fc].exp = ex;
2552 fixups[fc].opindex = 0;
2553 fixups[fc].reloc = reloc;
2554 ++fc;
2555 }
2556#endif /* OBJ_ELF */
2557
2558 else
2559 {
2560 /* We need to generate a fixup for this expression. */
2561 if (fc >= MAX_INSN_FIXUPS)
2562 as_fatal (_("too many fixups"));
2563 fixups[fc].exp = ex;
2564 fixups[fc].opindex = *opindex_ptr;
2565 fixups[fc].reloc = BFD_RELOC_UNUSED;
2566 ++fc;
2567 }
2568
2569 if (need_paren)
2570 {
2571 endc = ')';
2572 need_paren = 0;
2573 }
2574 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2575 {
2576 endc = '(';
2577 need_paren = 1;
2578 }
2579 else
2580 endc = ',';
2581
2582 /* The call to expression should have advanced str past any
2583 whitespace. */
2584 if (*str != endc
2585 && (endc != ',' || *str != '\0'))
2586 {
2587 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2588 break;
2589 }
2590
2591 if (*str != '\0')
2592 ++str;
2593 }
2594
3882b010 2595 while (ISSPACE (*str))
252b5132
RH		 2596 ++str;
2597
2598 if (*str != '\0')
2599 as_bad (_("junk at end of line: `%s'"), str);
2600
dc1d03fc 2601#ifdef OBJ_ELF
6a0c61b7
EZ		 2602 /* Do we need/want a APUinfo section? */
2603 if (ppc_cpu & (PPC_OPCODE_SPE
2604 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2605 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2606 | PPC_OPCODE_RFMCI))
2607 {
2608 /* These are all version "1". */
2609 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2610 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2611 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2612 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2613 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2614 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2615 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2616 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2617 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2618 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2619 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2620 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2621 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2622 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2623 }
dc1d03fc 2624#endif
6a0c61b7 2625
252b5132
RH		 2626 /* Write out the instruction. */
2627 f = frag_more (4);
09b935ac
AM		 2628 addr_mod = frag_now_fix () & 3;
2629 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2630 as_bad (_("instruction address is not a multiple of 4"));
2631 frag_now->insn_addr = addr_mod;
2632 frag_now->has_code = 1;
252b5132
RH		 2633 md_number_to_chars (f, insn, 4);
2634
5d6f4f16
GK		 2635#ifdef OBJ_ELF
2636 dwarf2_emit_insn (4);
2637#endif
2638
252b5132
RH		 2639 /* Create any fixups. At this point we do not use a
2640 bfd_reloc_code_real_type, but instead just use the
2641 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2642 handle fixups for any operand type, although that is admittedly
2643 not a very exciting feature. We pick a BFD reloc type in
94f592af 2644 md_apply_fix3. */
252b5132
RH		 2645 for (i = 0; i < fc; i++)
2646 {
2647 const struct powerpc_operand *operand;
2648
2649 operand = &powerpc_operands[fixups[i].opindex];
2650 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2651 {
99a814a1 2652 reloc_howto_type *reloc_howto;
252b5132
RH		 2653 int size;
2654 int offset;
2655 fixS *fixP;
2656
99a814a1 2657 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2658 if (!reloc_howto)
2659 abort ();
2660
2661 size = bfd_get_reloc_size (reloc_howto);
2662 offset = target_big_endian ? (4 - size) : 0;
2663
2664 if (size < 1 || size > 4)
bc805888 2665 abort ();
252b5132 2666
99a814a1
AM		 2667 fixP = fix_new_exp (frag_now,
2668 f - frag_now->fr_literal + offset,
2669 size,
2670 &fixups[i].exp,
2671 reloc_howto->pc_relative,
252b5132
RH		 2672 fixups[i].reloc);
2673
2674 /* Turn off complaints that the addend is too large for things like
2675 foo+100000@ha. */
2676 switch (fixups[i].reloc)
2677 {
2678 case BFD_RELOC_16_GOTOFF:
2679 case BFD_RELOC_PPC_TOC16:
2680 case BFD_RELOC_LO16:
2681 case BFD_RELOC_HI16:
2682 case BFD_RELOC_HI16_S:
0baf16f2 2683#ifdef OBJ_ELF
0baf16f2
AM		 2684 case BFD_RELOC_PPC64_HIGHER:
2685 case BFD_RELOC_PPC64_HIGHER_S:
2686 case BFD_RELOC_PPC64_HIGHEST:
2687 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2688#endif
252b5132
RH		 2689 fixP->fx_no_overflow = 1;
2690 break;
2691 default:
2692 break;
2693 }
2694 }
2695 else
99a814a1
AM		 2696 fix_new_exp (frag_now,
2697 f - frag_now->fr_literal,
2698 4,
252b5132
RH		 2699 &fixups[i].exp,
2700 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2701 ((bfd_reloc_code_real_type)
99a814a1 2702 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2703 }
2704}
2705
2706/* Handle a macro. Gather all the operands, transform them as
2707 described by the macro, and call md_assemble recursively. All the
2708 operands are separated by commas; we don't accept parentheses
2709 around operands here. */
2710
2711static void
2712ppc_macro (str, macro)
2713 char *str;
2714 const struct powerpc_macro *macro;
2715{
2716 char *operands[10];
2717 unsigned int count;
2718 char *s;
2719 unsigned int len;
2720 const char *format;
2721 int arg;
2722 char *send;
2723 char *complete;
2724
2725 /* Gather the users operands into the operands array. */
2726 count = 0;
2727 s = str;
2728 while (1)
2729 {
2730 if (count >= sizeof operands / sizeof operands[0])
2731 break;
2732 operands[count++] = s;
2733 s = strchr (s, ',');
2734 if (s == (char *) NULL)
2735 break;
2736 *s++ = '\0';
81d4177b 2737 }
252b5132
RH		 2738
2739 if (count != macro->operands)
2740 {
2741 as_bad (_("wrong number of operands"));
2742 return;
2743 }
2744
2745 /* Work out how large the string must be (the size is unbounded
2746 because it includes user input). */
2747 len = 0;
2748 format = macro->format;
2749 while (*format != '\0')
2750 {
2751 if (*format != '%')
2752 {
2753 ++len;
2754 ++format;
2755 }
2756 else
2757 {
2758 arg = strtol (format + 1, &send, 10);
2759 know (send != format && arg >= 0 && arg < count);
2760 len += strlen (operands[arg]);
2761 format = send;
2762 }
2763 }
2764
2765 /* Put the string together. */
2766 complete = s = (char *) alloca (len + 1);
2767 format = macro->format;
2768 while (*format != '\0')
2769 {
2770 if (*format != '%')
2771 *s++ = *format++;
2772 else
2773 {
2774 arg = strtol (format + 1, &send, 10);
2775 strcpy (s, operands[arg]);
2776 s += strlen (s);
2777 format = send;
2778 }
2779 }
2780 *s = '\0';
2781
2782 /* Assemble the constructed instruction. */
2783 md_assemble (complete);
81d4177b 2784}
252b5132
RH		 2785\f
2786#ifdef OBJ_ELF
99a814a1 2787/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2788
2789int
2790ppc_section_letter (letter, ptr_msg)
2791 int letter;
2792 char **ptr_msg;
2793{
2794 if (letter == 'e')
2795 return SHF_EXCLUDE;
2796
13ae64f3 2797 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2798 return -1;
252b5132
RH		 2799}
2800
2801int
9de8d8f1
RH		 2802ppc_section_word (str, len)
2803 char *str;
2804 size_t len;
252b5132 2805{
9de8d8f1
RH		 2806 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2807 return SHF_EXCLUDE;
252b5132 2808
9de8d8f1 2809 return -1;
252b5132
RH		 2810}
2811
2812int
9de8d8f1
RH		 2813ppc_section_type (str, len)
2814 char *str;
2815 size_t len;
252b5132 2816{
9de8d8f1
RH		 2817 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2818 return SHT_ORDERED;
252b5132 2819
9de8d8f1 2820 return -1;
252b5132
RH		 2821}
2822
2823int
2824ppc_section_flags (flags, attr, type)
2825 int flags;
2826 int attr;
2827 int type;
2828{
2829 if (type == SHT_ORDERED)
2830 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2831
2832 if (attr & SHF_EXCLUDE)
2833 flags |= SEC_EXCLUDE;
2834
2835 return flags;
2836}
2837#endif /* OBJ_ELF */
2838
2839\f
2840/* Pseudo-op handling. */
2841
2842/* The .byte pseudo-op. This is similar to the normal .byte
2843 pseudo-op, but it can also take a single ASCII string. */
2844
2845static void
2846ppc_byte (ignore)
92161534 2847 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2848{
2849 if (*input_line_pointer != '\"')
2850 {
2851 cons (1);
2852 return;
2853 }
2854
2855 /* Gather characters. A real double quote is doubled. Unusual
2856 characters are not permitted. */
2857 ++input_line_pointer;
2858 while (1)
2859 {
2860 char c;
2861
2862 c = *input_line_pointer++;
2863
2864 if (c == '\"')
2865 {
2866 if (*input_line_pointer != '\"')
2867 break;
2868 ++input_line_pointer;
2869 }
2870
2871 FRAG_APPEND_1_CHAR (c);
2872 }
2873
2874 demand_empty_rest_of_line ();
2875}
2876\f
2877#ifdef OBJ_XCOFF
2878
2879/* XCOFF specific pseudo-op handling. */
2880
2881/* This is set if we are creating a .stabx symbol, since we don't want
2882 to handle symbol suffixes for such symbols. */
b34976b6 2883static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2884
2885/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2886 symbols in the .bss segment as though they were local common
67c1ffbe 2887 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2888 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2889
2890static void
2891ppc_comm (lcomm)
2892 int lcomm;
2893{
2894 asection *current_seg = now_seg;
2895 subsegT current_subseg = now_subseg;
2896 char *name;
2897 char endc;
2898 char *end_name;
2899 offsetT size;
2900 offsetT align;
2901 symbolS *lcomm_sym = NULL;
2902 symbolS *sym;
2903 char *pfrag;
2904
2905 name = input_line_pointer;
2906 endc = get_symbol_end ();
2907 end_name = input_line_pointer;
2908 *end_name = endc;
2909
2910 if (*input_line_pointer != ',')
2911 {
2912 as_bad (_("missing size"));
2913 ignore_rest_of_line ();
2914 return;
2915 }
2916 ++input_line_pointer;
2917
2918 size = get_absolute_expression ();
2919 if (size < 0)
2920 {
2921 as_bad (_("negative size"));
2922 ignore_rest_of_line ();
2923 return;
2924 }
2925
2926 if (! lcomm)
2927 {
2928 /* The third argument to .comm is the alignment. */
2929 if (*input_line_pointer != ',')
1ad63b2f 2930 align = 2;
252b5132
RH		 2931 else
2932 {
2933 ++input_line_pointer;
2934 align = get_absolute_expression ();
2935 if (align <= 0)
2936 {
2937 as_warn (_("ignoring bad alignment"));
1ad63b2f 2938 align = 2;
252b5132
RH		 2939 }
2940 }
2941 }
2942 else
2943 {
2944 char *lcomm_name;
2945 char lcomm_endc;
2946
1ad63b2f 2947 if (size <= 4)
252b5132
RH		 2948 align = 2;
2949 else
2950 align = 3;
2951
2952 /* The third argument to .lcomm appears to be the real local
2953 common symbol to create. References to the symbol named in
2954 the first argument are turned into references to the third
2955 argument. */
2956 if (*input_line_pointer != ',')
2957 {
2958 as_bad (_("missing real symbol name"));
2959 ignore_rest_of_line ();
2960 return;
2961 }
2962 ++input_line_pointer;
2963
2964 lcomm_name = input_line_pointer;
2965 lcomm_endc = get_symbol_end ();
81d4177b 2966
252b5132
RH		 2967 lcomm_sym = symbol_find_or_make (lcomm_name);
2968
2969 *input_line_pointer = lcomm_endc;
2970 }
2971
2972 *end_name = '\0';
2973 sym = symbol_find_or_make (name);
2974 *end_name = endc;
2975
2976 if (S_IS_DEFINED (sym)
2977 || S_GET_VALUE (sym) != 0)
2978 {
2979 as_bad (_("attempt to redefine symbol"));
2980 ignore_rest_of_line ();
2981 return;
2982 }
81d4177b 2983
252b5132 2984 record_alignment (bss_section, align);
81d4177b 2985
252b5132
RH		 2986 if (! lcomm
2987 || ! S_IS_DEFINED (lcomm_sym))
2988 {
2989 symbolS *def_sym;
2990 offsetT def_size;
2991
2992 if (! lcomm)
2993 {
2994 def_sym = sym;
2995 def_size = size;
2996 S_SET_EXTERNAL (sym);
2997 }
2998 else
2999 {
809ffe0d 3000 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3001 def_sym = lcomm_sym;
3002 def_size = 0;
3003 }
3004
3005 subseg_set (bss_section, 1);
3006 frag_align (align, 0, 0);
81d4177b 3007
809ffe0d 3008 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3009 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3010 def_size, (char *) NULL);
3011 *pfrag = 0;
3012 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3013 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3014 }
3015 else if (lcomm)
3016 {
3017 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3018 symbol_get_frag (lcomm_sym)->fr_offset =
3019 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3020 &~ ((1 << align) - 1));
809ffe0d
ILT		 3021 if (align > symbol_get_tc (lcomm_sym)->align)
3022 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3023 }
3024
3025 if (lcomm)
3026 {
3027 /* Make sym an offset from lcomm_sym. */
3028 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3029 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3030 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3031 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3032 }
3033
3034 subseg_set (current_seg, current_subseg);
3035
3036 demand_empty_rest_of_line ();
3037}
3038
3039/* The .csect pseudo-op. This switches us into a different
3040 subsegment. The first argument is a symbol whose value is the
3041 start of the .csect. In COFF, csect symbols get special aux
3042 entries defined by the x_csect field of union internal_auxent. The
3043 optional second argument is the alignment (the default is 2). */
3044
3045static void
3046ppc_csect (ignore)
5480ccf3 3047 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3048{
3049 char *name;
3050 char endc;
3051 symbolS *sym;
931e13a6 3052 offsetT align;
252b5132
RH		 3053
3054 name = input_line_pointer;
3055 endc = get_symbol_end ();
81d4177b 3056
252b5132
RH		 3057 sym = symbol_find_or_make (name);
3058
3059 *input_line_pointer = endc;
3060
3061 if (S_GET_NAME (sym)[0] == '\0')
3062 {
3063 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3064 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3065 }
3066
931e13a6 3067 align = 2;
252b5132
RH		 3068 if (*input_line_pointer == ',')
3069 {
3070 ++input_line_pointer;
931e13a6 3071 align = get_absolute_expression ();
252b5132
RH		 3072 }
3073
931e13a6
AM		 3074 ppc_change_csect (sym, align);
3075
252b5132
RH		 3076 demand_empty_rest_of_line ();
3077}
3078
3079/* Change to a different csect. */
3080
3081static void
931e13a6 3082ppc_change_csect (sym, align)
252b5132 3083 symbolS *sym;
931e13a6 3084 offsetT align;
252b5132
RH		 3085{
3086 if (S_IS_DEFINED (sym))
809ffe0d 3087 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3088 else
3089 {
3090 symbolS **list_ptr;
3091 int after_toc;
3092 int hold_chunksize;
3093 symbolS *list;
931e13a6
AM		 3094 int is_code;
3095 segT sec;
252b5132
RH		 3096
3097 /* This is a new csect. We need to look at the symbol class to
3098 figure out whether it should go in the text section or the
3099 data section. */
3100 after_toc = 0;
931e13a6 3101 is_code = 0;
809ffe0d 3102 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3103 {
3104 case XMC_PR:
3105 case XMC_RO:
3106 case XMC_DB:
3107 case XMC_GL:
3108 case XMC_XO:
3109 case XMC_SV:
3110 case XMC_TI:
3111 case XMC_TB:
3112 S_SET_SEGMENT (sym, text_section);
809ffe0d 3113 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3114 ++ppc_text_subsegment;
3115 list_ptr = &ppc_text_csects;
931e13a6 3116 is_code = 1;
252b5132
RH		 3117 break;
3118 case XMC_RW:
3119 case XMC_TC0:
3120 case XMC_TC:
3121 case XMC_DS:
3122 case XMC_UA:
3123 case XMC_BS:
3124 case XMC_UC:
3125 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3126 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3127 == ppc_data_subsegment))
252b5132
RH		 3128 after_toc = 1;
3129 S_SET_SEGMENT (sym, data_section);
809ffe0d 3130 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3131 ++ppc_data_subsegment;
3132 list_ptr = &ppc_data_csects;
3133 break;
3134 default:
3135 abort ();
3136 }
3137
3138 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3139 changing subsegments, so that we don't use a lot of memory
3140 space for what may be a small section. */
252b5132
RH		 3141 hold_chunksize = chunksize;
3142 chunksize = 64;
3143
931e13a6
AM		 3144 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3145 symbol_get_tc (sym)->subseg);
252b5132
RH		 3146
3147 chunksize = hold_chunksize;
3148
3149 if (after_toc)
3150 ppc_after_toc_frag = frag_now;
3151
931e13a6
AM		 3152 record_alignment (sec, align);
3153 if (is_code)
3154 frag_align_code (align, 0);
3155 else
3156 frag_align (align, 0, 0);
3157
809ffe0d 3158 symbol_set_frag (sym, frag_now);
252b5132
RH		 3159 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3160
931e13a6 3161 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3162 symbol_get_tc (sym)->output = 1;
3163 symbol_get_tc (sym)->within = sym;
81d4177b 3164
252b5132 3165 for (list = *list_ptr;
809ffe0d
ILT		 3166 symbol_get_tc (list)->next != (symbolS *) NULL;
3167 list = symbol_get_tc (list)->next)
252b5132 3168 ;
809ffe0d 3169 symbol_get_tc (list)->next = sym;
81d4177b 3170
252b5132 3171 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3172 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3173 &symbol_lastP);
252b5132
RH		 3174 }
3175
3176 ppc_current_csect = sym;
3177}
3178
3179/* This function handles the .text and .data pseudo-ops. These
3180 pseudo-ops aren't really used by XCOFF; we implement them for the
3181 convenience of people who aren't used to XCOFF. */
3182
3183static void
3184ppc_section (type)
3185 int type;
3186{
3187 const char *name;
3188 symbolS *sym;
3189
3190 if (type == 't')
3191 name = ".text[PR]";
3192 else if (type == 'd')
3193 name = ".data[RW]";
3194 else
3195 abort ();
3196
3197 sym = symbol_find_or_make (name);
3198
931e13a6 3199 ppc_change_csect (sym, 2);
252b5132
RH		 3200
3201 demand_empty_rest_of_line ();
3202}
3203
3204/* This function handles the .section pseudo-op. This is mostly to
3205 give an error, since XCOFF only supports .text, .data and .bss, but
3206 we do permit the user to name the text or data section. */
3207
3208static void
3209ppc_named_section (ignore)
5480ccf3 3210 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3211{
3212 char *user_name;
3213 const char *real_name;
3214 char c;
3215 symbolS *sym;
3216
3217 user_name = input_line_pointer;
3218 c = get_symbol_end ();
3219
3220 if (strcmp (user_name, ".text") == 0)
3221 real_name = ".text[PR]";
3222 else if (strcmp (user_name, ".data") == 0)
3223 real_name = ".data[RW]";
3224 else
3225 {
3226 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3227 *input_line_pointer = c;
3228 ignore_rest_of_line ();
3229 return;
3230 }
3231
3232 *input_line_pointer = c;
3233
3234 sym = symbol_find_or_make (real_name);
3235
931e13a6 3236 ppc_change_csect (sym, 2);
252b5132
RH		 3237
3238 demand_empty_rest_of_line ();
3239}
3240
3241/* The .extern pseudo-op. We create an undefined symbol. */
3242
3243static void
3244ppc_extern (ignore)
5480ccf3 3245 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3246{
3247 char *name;
3248 char endc;
3249
3250 name = input_line_pointer;
3251 endc = get_symbol_end ();
3252
3253 (void) symbol_find_or_make (name);
3254
3255 *input_line_pointer = endc;
3256
3257 demand_empty_rest_of_line ();
3258}
3259
3260/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3261
3262static void
3263ppc_lglobl (ignore)
5480ccf3 3264 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3265{
3266 char *name;
3267 char endc;
3268 symbolS *sym;
3269
3270 name = input_line_pointer;
3271 endc = get_symbol_end ();
3272
3273 sym = symbol_find_or_make (name);
3274
3275 *input_line_pointer = endc;
3276
809ffe0d 3277 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3278
3279 demand_empty_rest_of_line ();
3280}
3281
3282/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3283 although I don't know why it bothers. */
3284
3285static void
3286ppc_rename (ignore)
5480ccf3 3287 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3288{
3289 char *name;
3290 char endc;
3291 symbolS *sym;
3292 int len;
3293
3294 name = input_line_pointer;
3295 endc = get_symbol_end ();
3296
3297 sym = symbol_find_or_make (name);
3298
3299 *input_line_pointer = endc;
3300
3301 if (*input_line_pointer != ',')
3302 {
3303 as_bad (_("missing rename string"));
3304 ignore_rest_of_line ();
3305 return;
3306 }
3307 ++input_line_pointer;
3308
809ffe0d 3309 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3310
3311 demand_empty_rest_of_line ();
3312}
3313
3314/* The .stabx pseudo-op. This is similar to a normal .stabs
3315 pseudo-op, but slightly different. A sample is
3316 .stabx "main:F-1",.main,142,0
3317 The first argument is the symbol name to create. The second is the
3318 value, and the third is the storage class. The fourth seems to be
3319 always zero, and I am assuming it is the type. */
3320
3321static void
3322ppc_stabx (ignore)
5480ccf3 3323 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3324{
3325 char *name;
3326 int len;
3327 symbolS *sym;
3328 expressionS exp;
3329
3330 name = demand_copy_C_string (&len);
3331
3332 if (*input_line_pointer != ',')
3333 {
3334 as_bad (_("missing value"));
3335 return;
3336 }
3337 ++input_line_pointer;
3338
b34976b6 3339 ppc_stab_symbol = TRUE;
252b5132 3340 sym = symbol_make (name);
b34976b6 3341 ppc_stab_symbol = FALSE;
252b5132 3342
809ffe0d 3343 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3344
3345 (void) expression (&exp);
3346
3347 switch (exp.X_op)
3348 {
3349 case O_illegal:
3350 case O_absent:
3351 case O_big:
3352 as_bad (_("illegal .stabx expression; zero assumed"));
3353 exp.X_add_number = 0;
3354 /* Fall through. */
3355 case O_constant:
3356 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3357 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3358 break;
3359
3360 case O_symbol:
3361 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3362 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3363 else
3364 {
3365 S_SET_VALUE (sym,
3366 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3367 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3368 }
3369 break;
3370
3371 default:
3372 /* The value is some complex expression. This will probably
99a814a1
AM		 3373 fail at some later point, but this is probably the right
3374 thing to do here. */
809ffe0d 3375 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3376 break;
3377 }
3378
3379 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3380 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3381
3382 if (*input_line_pointer != ',')
3383 {
3384 as_bad (_("missing class"));
3385 return;
3386 }
3387 ++input_line_pointer;
3388
3389 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3390
3391 if (*input_line_pointer != ',')
3392 {
3393 as_bad (_("missing type"));
3394 return;
3395 }
3396 ++input_line_pointer;
3397
3398 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3399
809ffe0d 3400 symbol_get_tc (sym)->output = 1;
252b5132 3401
6877bb43 3402 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3403
809ffe0d 3404 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3405
41ea10b1 3406 /* In this case :
99a814a1 3407
41ea10b1
TR		 3408 .bs name
3409 .stabx "z",arrays_,133,0
3410 .es
99a814a1 3411
41ea10b1 3412 .comm arrays_,13768,3
99a814a1 3413
41ea10b1
TR		 3414 resolve_symbol_value will copy the exp's "within" into sym's when the
3415 offset is 0. Since this seems to be corner case problem,
3416 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3417 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3418
3419 if (exp.X_op == O_symbol)
41ea10b1
TR		 3420 {
3421 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3422 }
6877bb43 3423 }
99a814a1 3424
252b5132
RH		 3425 if (exp.X_op != O_symbol
3426 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3427 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3428 ppc_frob_label (sym);
3429 else
3430 {
3431 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3432 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3433 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3434 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3435 }
3436
3437 demand_empty_rest_of_line ();
3438}
3439
3440/* The .function pseudo-op. This takes several arguments. The first
3441 argument seems to be the external name of the symbol. The second
67c1ffbe 3442 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3443 uses the same name for both. I have no idea what the third and
3444 fourth arguments are meant to be. The optional fifth argument is
3445 an expression for the size of the function. In COFF this symbol
3446 gets an aux entry like that used for a csect. */
3447
3448static void
3449ppc_function (ignore)
5480ccf3 3450 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3451{
3452 char *name;
3453 char endc;
3454 char *s;
3455 symbolS *ext_sym;
3456 symbolS *lab_sym;
3457
3458 name = input_line_pointer;
3459 endc = get_symbol_end ();
3460
3461 /* Ignore any [PR] suffix. */
3462 name = ppc_canonicalize_symbol_name (name);
3463 s = strchr (name, '[');
3464 if (s != (char *) NULL
3465 && strcmp (s + 1, "PR]") == 0)
3466 *s = '\0';
3467
3468 ext_sym = symbol_find_or_make (name);
3469
3470 *input_line_pointer = endc;
3471
3472 if (*input_line_pointer != ',')
3473 {
3474 as_bad (_("missing symbol name"));
3475 ignore_rest_of_line ();
3476 return;
3477 }
3478 ++input_line_pointer;
3479
3480 name = input_line_pointer;
3481 endc = get_symbol_end ();
3482
3483 lab_sym = symbol_find_or_make (name);
3484
3485 *input_line_pointer = endc;
3486
3487 if (ext_sym != lab_sym)
3488 {
809ffe0d
ILT		 3489 expressionS exp;
3490
3491 exp.X_op = O_symbol;
3492 exp.X_add_symbol = lab_sym;
3493 exp.X_op_symbol = NULL;
3494 exp.X_add_number = 0;
3495 exp.X_unsigned = 0;
3496 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3497 }
3498
809ffe0d
ILT		 3499 if (symbol_get_tc (ext_sym)->class == -1)
3500 symbol_get_tc (ext_sym)->class = XMC_PR;
3501 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3502
3503 if (*input_line_pointer == ',')
3504 {
3505 expressionS ignore;
3506
3507 /* Ignore the third argument. */
3508 ++input_line_pointer;
3509 expression (&ignore);
3510 if (*input_line_pointer == ',')
3511 {
3512 /* Ignore the fourth argument. */
3513 ++input_line_pointer;
3514 expression (&ignore);
3515 if (*input_line_pointer == ',')
3516 {
3517 /* The fifth argument is the function size. */
3518 ++input_line_pointer;
809ffe0d
ILT		 3519 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3520 absolute_section,
3521 (valueT) 0,
3522 &zero_address_frag);
3523 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3524 }
3525 }
3526 }
3527
3528 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3529 SF_SET_FUNCTION (ext_sym);
3530 SF_SET_PROCESS (ext_sym);
3531 coff_add_linesym (ext_sym);
3532
3533 demand_empty_rest_of_line ();
3534}
3535
3536/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3537 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3538 with the correct line number */
5d6255fe 3539
8642cce8 3540static symbolS *saved_bi_sym = 0;
252b5132
RH		 3541
3542static void
3543ppc_bf (ignore)
5480ccf3 3544 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3545{
3546 symbolS *sym;
3547
3548 sym = symbol_make (".bf");
3549 S_SET_SEGMENT (sym, text_section);
809ffe0d 3550 symbol_set_frag (sym, frag_now);
252b5132
RH		 3551 S_SET_VALUE (sym, frag_now_fix ());
3552 S_SET_STORAGE_CLASS (sym, C_FCN);
3553
3554 coff_line_base = get_absolute_expression ();
3555
3556 S_SET_NUMBER_AUXILIARY (sym, 1);
3557 SA_SET_SYM_LNNO (sym, coff_line_base);
3558
8642cce8 3559 /* Line number for bi. */
5d6255fe 3560 if (saved_bi_sym)
8642cce8
TR		 3561 {
3562 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3563 saved_bi_sym = 0;
3564 }
5d6255fe 3565
8642cce8 3566
809ffe0d 3567 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3568
3569 ppc_frob_label (sym);
3570
3571 demand_empty_rest_of_line ();
3572}
3573
3574/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3575 ".ef", except that the line number is absolute, not relative to the
3576 most recent ".bf" symbol. */
3577
3578static void
3579ppc_ef (ignore)
5480ccf3 3580 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3581{
3582 symbolS *sym;
3583
3584 sym = symbol_make (".ef");
3585 S_SET_SEGMENT (sym, text_section);
809ffe0d 3586 symbol_set_frag (sym, frag_now);
252b5132
RH		 3587 S_SET_VALUE (sym, frag_now_fix ());
3588 S_SET_STORAGE_CLASS (sym, C_FCN);
3589 S_SET_NUMBER_AUXILIARY (sym, 1);
3590 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3591 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3592
3593 ppc_frob_label (sym);
3594
3595 demand_empty_rest_of_line ();
3596}
3597
3598/* The .bi and .ei pseudo-ops. These take a string argument and
3599 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3600 the symbol list. The value of .bi will be know when the next .bf
3601 is encountered. */
252b5132
RH		 3602
3603static void
3604ppc_biei (ei)
3605 int ei;
3606{
3607 static symbolS *last_biei;
3608
3609 char *name;
3610 int len;
3611 symbolS *sym;
3612 symbolS *look;
3613
3614 name = demand_copy_C_string (&len);
3615
3616 /* The value of these symbols is actually file offset. Here we set
3617 the value to the index into the line number entries. In
3618 ppc_frob_symbols we set the fix_line field, which will cause BFD
3619 to do the right thing. */
3620
3621 sym = symbol_make (name);
3622 /* obj-coff.c currently only handles line numbers correctly in the
3623 .text section. */
3624 S_SET_SEGMENT (sym, text_section);
3625 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3626 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3627
3628 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3629 symbol_get_tc (sym)->output = 1;
81d4177b 3630
8642cce8 3631 /* Save bi. */
5d6255fe 3632 if (ei)
8642cce8
TR		 3633 saved_bi_sym = 0;
3634 else
3635 saved_bi_sym = sym;
3636
252b5132
RH		 3637 for (look = last_biei ? last_biei : symbol_rootP;
3638 (look != (symbolS *) NULL
3639 && (S_GET_STORAGE_CLASS (look) == C_FILE
3640 || S_GET_STORAGE_CLASS (look) == C_BINCL
3641 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3642 look = symbol_next (look))
3643 ;
3644 if (look != (symbolS *) NULL)
3645 {
3646 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3647 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3648 last_biei = sym;
3649 }
3650
3651 demand_empty_rest_of_line ();
3652}
3653
3654/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3655 There is one argument, which is a csect symbol. The value of the
3656 .bs symbol is the index of this csect symbol. */
3657
3658static void
3659ppc_bs (ignore)
5480ccf3 3660 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3661{
3662 char *name;
3663 char endc;
3664 symbolS *csect;
3665 symbolS *sym;
3666
3667 if (ppc_current_block != NULL)
3668 as_bad (_("nested .bs blocks"));
3669
3670 name = input_line_pointer;
3671 endc = get_symbol_end ();
3672
3673 csect = symbol_find_or_make (name);
3674
3675 *input_line_pointer = endc;
3676
3677 sym = symbol_make (".bs");
3678 S_SET_SEGMENT (sym, now_seg);
3679 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3680 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3681 symbol_get_tc (sym)->output = 1;
252b5132 3682
809ffe0d 3683 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3684
3685 ppc_frob_label (sym);
3686
3687 ppc_current_block = sym;
3688
3689 demand_empty_rest_of_line ();
3690}
3691
3692/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3693
3694static void
3695ppc_es (ignore)
5480ccf3 3696 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3697{
3698 symbolS *sym;
3699
3700 if (ppc_current_block == NULL)
3701 as_bad (_(".es without preceding .bs"));
3702
3703 sym = symbol_make (".es");
3704 S_SET_SEGMENT (sym, now_seg);
3705 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3706 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3707 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3708
3709 ppc_frob_label (sym);
3710
3711 ppc_current_block = NULL;
3712
3713 demand_empty_rest_of_line ();
3714}
3715
3716/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3717 line number. */
3718
3719static void
3720ppc_bb (ignore)
5480ccf3 3721 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3722{
3723 symbolS *sym;
3724
3725 sym = symbol_make (".bb");
3726 S_SET_SEGMENT (sym, text_section);
809ffe0d 3727 symbol_set_frag (sym, frag_now);
252b5132
RH		 3728 S_SET_VALUE (sym, frag_now_fix ());
3729 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3730
3731 S_SET_NUMBER_AUXILIARY (sym, 1);
3732 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3733
809ffe0d 3734 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3735
3736 SF_SET_PROCESS (sym);
3737
3738 ppc_frob_label (sym);
3739
3740 demand_empty_rest_of_line ();
3741}
3742
3743/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3744 line number. */
3745
3746static void
3747ppc_eb (ignore)
5480ccf3 3748 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3749{
3750 symbolS *sym;
3751
3752 sym = symbol_make (".eb");
3753 S_SET_SEGMENT (sym, text_section);
809ffe0d 3754 symbol_set_frag (sym, frag_now);
252b5132
RH		 3755 S_SET_VALUE (sym, frag_now_fix ());
3756 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3757 S_SET_NUMBER_AUXILIARY (sym, 1);
3758 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3759 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3760
3761 SF_SET_PROCESS (sym);
3762
3763 ppc_frob_label (sym);
3764
3765 demand_empty_rest_of_line ();
3766}
3767
3768/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3769 specified name. */
3770
3771static void
3772ppc_bc (ignore)
5480ccf3 3773 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3774{
3775 char *name;
3776 int len;
3777 symbolS *sym;
3778
3779 name = demand_copy_C_string (&len);
3780 sym = symbol_make (name);
3781 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3782 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3783 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3784 S_SET_VALUE (sym, 0);
809ffe0d 3785 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3786
3787 ppc_frob_label (sym);
3788
3789 demand_empty_rest_of_line ();
3790}
3791
3792/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3793
3794static void
3795ppc_ec (ignore)
5480ccf3 3796 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3797{
3798 symbolS *sym;
3799
3800 sym = symbol_make (".ec");
3801 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3802 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3803 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3804 S_SET_VALUE (sym, 0);
809ffe0d 3805 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3806
3807 ppc_frob_label (sym);
3808
3809 demand_empty_rest_of_line ();
3810}
3811
3812/* The .toc pseudo-op. Switch to the .toc subsegment. */
3813
3814static void
3815ppc_toc (ignore)
5480ccf3 3816 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3817{
3818 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3819 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3820 else
3821 {
3822 subsegT subseg;
3823 symbolS *sym;
3824 symbolS *list;
81d4177b 3825
252b5132
RH		 3826 subseg = ppc_data_subsegment;
3827 ++ppc_data_subsegment;
3828
3829 subseg_new (segment_name (data_section), subseg);
3830 ppc_toc_frag = frag_now;
3831
3832 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3833 symbol_set_frag (sym, frag_now);
252b5132
RH		 3834 S_SET_SEGMENT (sym, data_section);
3835 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3836 symbol_get_tc (sym)->subseg = subseg;
3837 symbol_get_tc (sym)->output = 1;
3838 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3839
3840 ppc_toc_csect = sym;
81d4177b 3841
252b5132 3842 for (list = ppc_data_csects;
809ffe0d
ILT		 3843 symbol_get_tc (list)->next != (symbolS *) NULL;
3844 list = symbol_get_tc (list)->next)
252b5132 3845 ;
809ffe0d 3846 symbol_get_tc (list)->next = sym;
252b5132
RH		 3847
3848 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3849 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3850 &symbol_lastP);
252b5132
RH		 3851 }
3852
3853 ppc_current_csect = ppc_toc_csect;
3854
3855 demand_empty_rest_of_line ();
3856}
3857
3858/* The AIX assembler automatically aligns the operands of a .long or
3859 .short pseudo-op, and we want to be compatible. */
3860
3861static void
3862ppc_xcoff_cons (log_size)
3863 int log_size;
3864{
3865 frag_align (log_size, 0, 0);
3866 record_alignment (now_seg, log_size);
3867 cons (1 << log_size);
3868}
3869
3870static void
3871ppc_vbyte (dummy)
5480ccf3 3872 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3873{
3874 expressionS exp;
3875 int byte_count;
3876
3877 (void) expression (&exp);
3878
3879 if (exp.X_op != O_constant)
3880 {
3881 as_bad (_("non-constant byte count"));
3882 return;
3883 }
3884
3885 byte_count = exp.X_add_number;
3886
3887 if (*input_line_pointer != ',')
3888 {
3889 as_bad (_("missing value"));
3890 return;
3891 }
3892
3893 ++input_line_pointer;
3894 cons (byte_count);
3895}
3896
3897#endif /* OBJ_XCOFF */
0baf16f2 3898#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3899\f
3900/* The .tc pseudo-op. This is used when generating either XCOFF or
3901 ELF. This takes two or more arguments.
3902
3903 When generating XCOFF output, the first argument is the name to
3904 give to this location in the toc; this will be a symbol with class
0baf16f2 3905 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3906 this location in the TOC; often there is just one more argument, a
1049f94e 3907 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3908 depends on target word size. A 32-bit target uses 4-byte values, a
3909 64-bit target uses 8-byte values.
252b5132
RH		 3910
3911 When not generating XCOFF output, the arguments are the same, but
3912 the first argument is simply ignored. */
3913
3914static void
3915ppc_tc (ignore)
92161534 3916 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3917{
3918#ifdef OBJ_XCOFF
3919
3920 /* Define the TOC symbol name. */
3921 {
3922 char *name;
3923 char endc;
3924 symbolS *sym;
3925
3926 if (ppc_toc_csect == (symbolS *) NULL
3927 || ppc_toc_csect != ppc_current_csect)
3928 {
3929 as_bad (_(".tc not in .toc section"));
3930 ignore_rest_of_line ();
3931 return;
3932 }
3933
3934 name = input_line_pointer;
3935 endc = get_symbol_end ();
3936
3937 sym = symbol_find_or_make (name);
3938
3939 *input_line_pointer = endc;
3940
3941 if (S_IS_DEFINED (sym))
3942 {
3943 symbolS *label;
3944
809ffe0d
ILT		 3945 label = symbol_get_tc (ppc_current_csect)->within;
3946 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3947 {
3948 as_bad (_(".tc with no label"));
3949 ignore_rest_of_line ();
3950 return;
3951 }
3952
3953 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3954 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3955 S_SET_VALUE (label, S_GET_VALUE (sym));
3956
3957 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3958 ++input_line_pointer;
3959
3960 return;
3961 }
3962
3963 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3964 symbol_set_frag (sym, frag_now);
252b5132 3965 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3966 symbol_get_tc (sym)->class = XMC_TC;
3967 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3968
3969 ppc_frob_label (sym);
3970 }
3971
0baf16f2
AM		 3972#endif /* OBJ_XCOFF */
3973#ifdef OBJ_ELF
9c7977b3 3974 int align;
252b5132
RH		 3975
3976 /* Skip the TOC symbol name. */
3977 while (is_part_of_name (*input_line_pointer)
3978 || *input_line_pointer == '['
3979 || *input_line_pointer == ']'
3980 || *input_line_pointer == '{'
3981 || *input_line_pointer == '}')
3982 ++input_line_pointer;
3983
0baf16f2 3984 /* Align to a four/eight byte boundary. */
2b3c4602 3985 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3986 frag_align (align, 0, 0);
3987 record_alignment (now_seg, align);
0baf16f2 3988#endif /* OBJ_ELF */
252b5132
RH		 3989
3990 if (*input_line_pointer != ',')
3991 demand_empty_rest_of_line ();
3992 else
3993 {
3994 ++input_line_pointer;
2b3c4602 3995 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3996 }
3997}
0baf16f2
AM		 3998
3999/* Pseudo-op .machine. */
0baf16f2
AM		 4000
4001static void
4002ppc_machine (ignore)
4003 int ignore ATTRIBUTE_UNUSED;
4004{
69c040df
AM		 4005 char *cpu_string;
4006#define MAX_HISTORY 100
4007 static unsigned long *cpu_history;
4008 static int curr_hist;
4009
4010 SKIP_WHITESPACE ();
4011
4012 if (*input_line_pointer == '"')
4013 {
4014 int len;
4015 cpu_string = demand_copy_C_string (&len);
4016 }
4017 else
4018 {
4019 char c;
4020 cpu_string = input_line_pointer;
4021 c = get_symbol_end ();
4022 cpu_string = xstrdup (cpu_string);
4023 *input_line_pointer = c;
4024 }
4025
4026 if (cpu_string != NULL)
4027 {
4028 unsigned long old_cpu = ppc_cpu;
4029 char *p;
4030
4031 for (p = cpu_string; *p != 0; p++)
4032 *p = TOLOWER (*p);
4033
4034 if (strcmp (cpu_string, "push") == 0)
4035 {
4036 if (cpu_history == NULL)
4037 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4038
4039 if (curr_hist >= MAX_HISTORY)
4040 as_bad (_(".machine stack overflow"));
4041 else
4042 cpu_history[curr_hist++] = ppc_cpu;
4043 }
4044 else if (strcmp (cpu_string, "pop") == 0)
4045 {
4046 if (curr_hist <= 0)
4047 as_bad (_(".machine stack underflow"));
4048 else
4049 ppc_cpu = cpu_history[--curr_hist];
4050 }
4051 else if (parse_cpu (cpu_string))
4052 ;
4053 else
4054 as_bad (_("invalid machine `%s'"), cpu_string);
4055
4056 if (ppc_cpu != old_cpu)
4057 ppc_setup_opcodes ();
4058 }
4059
4060 demand_empty_rest_of_line ();
0baf16f2
AM		 4061}
4062
4063/* See whether a symbol is in the TOC section. */
4064
4065static int
4066ppc_is_toc_sym (sym)
4067 symbolS *sym;
4068{
4069#ifdef OBJ_XCOFF
4070 return symbol_get_tc (sym)->class == XMC_TC;
4071#endif
4072#ifdef OBJ_ELF
4073 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4074 if (ppc_obj64)
0baf16f2
AM		 4075 return strcmp (sname, ".toc") == 0;
4076 else
4077 return strcmp (sname, ".got") == 0;
4078#endif
4079}
4080#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4081\f
4082#ifdef TE_PE
4083
99a814a1 4084/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4085
4086/* Set the current section. */
4087static void
4088ppc_set_current_section (new)
4089 segT new;
4090{
4091 ppc_previous_section = ppc_current_section;
4092 ppc_current_section = new;
4093}
4094
4095/* pseudo-op: .previous
4096 behaviour: toggles the current section with the previous section.
4097 errors: None
99a814a1
AM		 4098 warnings: "No previous section" */
4099
252b5132 4100static void
99a814a1 4101ppc_previous (ignore)
5480ccf3 4102 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4103{
4104 symbolS *tmp;
4105
81d4177b 4106 if (ppc_previous_section == NULL)
252b5132 4107 {
99a814a1 4108 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4109 return;
4110 }
4111
99a814a1 4112 subseg_set (ppc_previous_section, 0);
252b5132 4113
99a814a1 4114 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4115}
4116
4117/* pseudo-op: .pdata
4118 behaviour: predefined read only data section
b34976b6 4119 double word aligned
252b5132
RH		 4120 errors: None
4121 warnings: None
4122 initial: .section .pdata "adr3"
b34976b6 4123 a - don't know -- maybe a misprint
252b5132
RH		 4124 d - initialized data
4125 r - readable
4126 3 - double word aligned (that would be 4 byte boundary)
4127
4128 commentary:
4129 Tag index tables (also known as the function table) for exception
99a814a1 4130 handling, debugging, etc. */
252b5132 4131
252b5132 4132static void
99a814a1 4133ppc_pdata (ignore)
5480ccf3 4134 int ignore ATTRIBUTE_UNUSED;
252b5132 4135{
81d4177b 4136 if (pdata_section == 0)
252b5132
RH		 4137 {
4138 pdata_section = subseg_new (".pdata", 0);
81d4177b 4139
252b5132
RH		 4140 bfd_set_section_flags (stdoutput, pdata_section,
4141 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4142 | SEC_READONLY | SEC_DATA ));
81d4177b 4143
252b5132
RH		 4144 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4145 }
4146 else
4147 {
99a814a1 4148 pdata_section = subseg_new (".pdata", 0);
252b5132 4149 }
99a814a1 4150 ppc_set_current_section (pdata_section);
252b5132
RH		 4151}
4152
4153/* pseudo-op: .ydata
4154 behaviour: predefined read only data section
b34976b6 4155 double word aligned
252b5132
RH		 4156 errors: None
4157 warnings: None
4158 initial: .section .ydata "drw3"
b34976b6 4159 a - don't know -- maybe a misprint
252b5132
RH		 4160 d - initialized data
4161 r - readable
4162 3 - double word aligned (that would be 4 byte boundary)
4163 commentary:
4164 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4165 debugging, etc. */
4166
252b5132 4167static void
99a814a1 4168ppc_ydata (ignore)
5480ccf3 4169 int ignore ATTRIBUTE_UNUSED;
252b5132 4170{
81d4177b 4171 if (ydata_section == 0)
252b5132
RH		 4172 {
4173 ydata_section = subseg_new (".ydata", 0);
4174 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4175 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4176 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4177
4178 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4179 }
4180 else
4181 {
4182 ydata_section = subseg_new (".ydata", 0);
4183 }
99a814a1 4184 ppc_set_current_section (ydata_section);
252b5132
RH		 4185}
4186
4187/* pseudo-op: .reldata
4188 behaviour: predefined read write data section
b34976b6 4189 double word aligned (4-byte)
252b5132
RH		 4190 FIXME: relocation is applied to it
4191 FIXME: what's the difference between this and .data?
4192 errors: None
4193 warnings: None
4194 initial: .section .reldata "drw3"
4195 d - initialized data
4196 r - readable
4197 w - writeable
4198 3 - double word aligned (that would be 8 byte boundary)
4199
4200 commentary:
4201 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4202 function descriptors, etc. */
4203
252b5132 4204static void
99a814a1 4205ppc_reldata (ignore)
5480ccf3 4206 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4207{
4208 if (reldata_section == 0)
4209 {
4210 reldata_section = subseg_new (".reldata", 0);
4211
4212 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4213 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4214 | SEC_DATA));
252b5132
RH		 4215
4216 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4217 }
4218 else
4219 {
4220 reldata_section = subseg_new (".reldata", 0);
4221 }
99a814a1 4222 ppc_set_current_section (reldata_section);
252b5132
RH		 4223}
4224
4225/* pseudo-op: .rdata
4226 behaviour: predefined read only data section
b34976b6 4227 double word aligned
252b5132
RH		 4228 errors: None
4229 warnings: None
4230 initial: .section .rdata "dr3"
4231 d - initialized data
4232 r - readable
99a814a1
AM		 4233 3 - double word aligned (that would be 4 byte boundary) */
4234
252b5132 4235static void
99a814a1 4236ppc_rdata (ignore)
5480ccf3 4237 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4238{
4239 if (rdata_section == 0)
4240 {
4241 rdata_section = subseg_new (".rdata", 0);
4242 bfd_set_section_flags (stdoutput, rdata_section,
4243 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4244 | SEC_READONLY | SEC_DATA ));
4245
4246 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4247 }
4248 else
4249 {
4250 rdata_section = subseg_new (".rdata", 0);
4251 }
99a814a1 4252 ppc_set_current_section (rdata_section);
252b5132
RH		 4253}
4254
4255/* pseudo-op: .ualong
81d4177b 4256 behaviour: much like .int, with the exception that no alignment is
b34976b6 4257 performed.
252b5132
RH		 4258 FIXME: test the alignment statement
4259 errors: None
99a814a1
AM		 4260 warnings: None */
4261
252b5132 4262static void
99a814a1 4263ppc_ualong (ignore)
5480ccf3 4264 int ignore ATTRIBUTE_UNUSED;
252b5132 4265{
99a814a1
AM		 4266 /* Try for long. */
4267 cons (4);
252b5132
RH		 4268}
4269
4270/* pseudo-op: .znop <symbol name>
4271 behaviour: Issue a nop instruction
b34976b6 4272 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4273 the supplied symbol name.
4274 errors: None
99a814a1
AM		 4275 warnings: Missing symbol name */
4276
252b5132 4277static void
99a814a1 4278ppc_znop (ignore)
5480ccf3 4279 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4280{
4281 unsigned long insn;
4282 const struct powerpc_opcode *opcode;
4283 expressionS ex;
4284 char *f;
252b5132 4285 symbolS *sym;
252b5132
RH		 4286 char *symbol_name;
4287 char c;
4288 char *name;
4289 unsigned int exp;
4290 flagword flags;
4291 asection *sec;
4292
99a814a1 4293 /* Strip out the symbol name. */
252b5132
RH		 4294 symbol_name = input_line_pointer;
4295 c = get_symbol_end ();
4296
4297 name = xmalloc (input_line_pointer - symbol_name + 1);
4298 strcpy (name, symbol_name);
4299
4300 sym = symbol_find_or_make (name);
4301
4302 *input_line_pointer = c;
4303
4304 SKIP_WHITESPACE ();
4305
4306 /* Look up the opcode in the hash table. */
4307 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4308
99a814a1 4309 /* Stick in the nop. */
252b5132
RH		 4310 insn = opcode->opcode;
4311
4312 /* Write out the instruction. */
4313 f = frag_more (4);
4314 md_number_to_chars (f, insn, 4);
4315 fix_new (frag_now,
4316 f - frag_now->fr_literal,
4317 4,
4318 sym,
4319 0,
4320 0,
4321 BFD_RELOC_16_GOT_PCREL);
4322
4323}
4324
81d4177b
KH		 4325/* pseudo-op:
4326 behaviour:
4327 errors:
99a814a1
AM		 4328 warnings: */
4329
252b5132 4330static void
99a814a1 4331ppc_pe_comm (lcomm)
252b5132
RH		 4332 int lcomm;
4333{
4334 register char *name;
4335 register char c;
4336 register char *p;
4337 offsetT temp;
4338 register symbolS *symbolP;
4339 offsetT align;
4340
4341 name = input_line_pointer;
4342 c = get_symbol_end ();
4343
99a814a1 4344 /* just after name is now '\0'. */
252b5132
RH		 4345 p = input_line_pointer;
4346 *p = c;
4347 SKIP_WHITESPACE ();
4348 if (*input_line_pointer != ',')
4349 {
4350 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4351 ignore_rest_of_line ();
4352 return;
4353 }
4354
4355 input_line_pointer++; /* skip ',' */
4356 if ((temp = get_absolute_expression ()) < 0)
4357 {
4358 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4359 ignore_rest_of_line ();
4360 return;
4361 }
4362
4363 if (! lcomm)
4364 {
4365 /* The third argument to .comm is the alignment. */
4366 if (*input_line_pointer != ',')
4367 align = 3;
4368 else
4369 {
4370 ++input_line_pointer;
4371 align = get_absolute_expression ();
4372 if (align <= 0)
4373 {
4374 as_warn (_("ignoring bad alignment"));
4375 align = 3;
4376 }
4377 }
4378 }
4379
4380 *p = 0;
4381 symbolP = symbol_find_or_make (name);
4382
4383 *p = c;
4384 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4385 {
4386 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4387 S_GET_NAME (symbolP));
4388 ignore_rest_of_line ();
4389 return;
4390 }
4391
4392 if (S_GET_VALUE (symbolP))
4393 {
4394 if (S_GET_VALUE (symbolP) != (valueT) temp)
4395 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4396 S_GET_NAME (symbolP),
4397 (long) S_GET_VALUE (symbolP),
4398 (long) temp);
4399 }
4400 else
4401 {
4402 S_SET_VALUE (symbolP, (valueT) temp);
4403 S_SET_EXTERNAL (symbolP);
4404 }
4405
4406 demand_empty_rest_of_line ();
4407}
4408
4409/*
4410 * implement the .section pseudo op:
4411 * .section name {, "flags"}
4412 * ^ ^
4413 * | +--- optional flags: 'b' for bss
4414 * | 'i' for info
4415 * +-- section name 'l' for lib
4416 * 'n' for noload
4417 * 'o' for over
4418 * 'w' for data
4419 * 'd' (apparently m88k for data)
4420 * 'x' for text
4421 * But if the argument is not a quoted string, treat it as a
4422 * subsegment number.
4423 *
4424 * FIXME: this is a copy of the section processing from obj-coff.c, with
4425 * additions/changes for the moto-pas assembler support. There are three
4426 * categories:
4427 *
81d4177b 4428 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4429 * setting bits that bfd probably neither understands or uses. The
4430 * correct approach (?) will have to incorporate extra fields attached
4431 * to the section to hold the system specific stuff. (krk)
4432 *
4433 * Section Contents:
4434 * 'a' - unknown - referred to in documentation, but no definition supplied
4435 * 'c' - section has code
4436 * 'd' - section has initialized data
4437 * 'u' - section has uninitialized data
4438 * 'i' - section contains directives (info)
4439 * 'n' - section can be discarded
4440 * 'R' - remove section at link time
4441 *
4442 * Section Protection:
4443 * 'r' - section is readable
4444 * 'w' - section is writeable
4445 * 'x' - section is executable
4446 * 's' - section is sharable
4447 *
4448 * Section Alignment:
4449 * '0' - align to byte boundary
4450 * '1' - align to halfword undary
4451 * '2' - align to word boundary
4452 * '3' - align to doubleword boundary
4453 * '4' - align to quadword boundary
4454 * '5' - align to 32 byte boundary
4455 * '6' - align to 64 byte boundary
4456 *
4457 */
4458
4459void
4460ppc_pe_section (ignore)
5480ccf3 4461 int ignore ATTRIBUTE_UNUSED;
252b5132 4462{
99a814a1 4463 /* Strip out the section name. */
252b5132
RH		 4464 char *section_name;
4465 char c;
4466 char *name;
4467 unsigned int exp;
4468 flagword flags;
4469 segT sec;
4470 int align;
4471
4472 section_name = input_line_pointer;
4473 c = get_symbol_end ();
4474
4475 name = xmalloc (input_line_pointer - section_name + 1);
4476 strcpy (name, section_name);
4477
4478 *input_line_pointer = c;
4479
4480 SKIP_WHITESPACE ();
4481
4482 exp = 0;
4483 flags = SEC_NO_FLAGS;
4484
4485 if (strcmp (name, ".idata$2") == 0)
4486 {
4487 align = 0;
4488 }
4489 else if (strcmp (name, ".idata$3") == 0)
4490 {
4491 align = 0;
4492 }
4493 else if (strcmp (name, ".idata$4") == 0)
4494 {
4495 align = 2;
4496 }
4497 else if (strcmp (name, ".idata$5") == 0)
4498 {
4499 align = 2;
4500 }
4501 else if (strcmp (name, ".idata$6") == 0)
4502 {
4503 align = 1;
4504 }
4505 else
99a814a1
AM		 4506 /* Default alignment to 16 byte boundary. */
4507 align = 4;
252b5132
RH		 4508
4509 if (*input_line_pointer == ',')
4510 {
4511 ++input_line_pointer;
4512 SKIP_WHITESPACE ();
4513 if (*input_line_pointer != '"')
4514 exp = get_absolute_expression ();
4515 else
4516 {
4517 ++input_line_pointer;
4518 while (*input_line_pointer != '"'
4519 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4520 {
4521 switch (*input_line_pointer)
4522 {
4523 /* Section Contents */
4524 case 'a': /* unknown */
4525 as_bad (_("Unsupported section attribute -- 'a'"));
4526 break;
4527 case 'c': /* code section */
81d4177b 4528 flags |= SEC_CODE;
252b5132
RH		 4529 break;
4530 case 'd': /* section has initialized data */
4531 flags |= SEC_DATA;
4532 break;
4533 case 'u': /* section has uninitialized data */
4534 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4535 in winnt.h */
4536 flags |= SEC_ROM;
4537 break;
4538 case 'i': /* section contains directives (info) */
4539 /* FIXME: This is IMAGE_SCN_LNK_INFO
4540 in winnt.h */
4541 flags |= SEC_HAS_CONTENTS;
4542 break;
4543 case 'n': /* section can be discarded */
81d4177b 4544 flags &=~ SEC_LOAD;
252b5132
RH		 4545 break;
4546 case 'R': /* Remove section at link time */
4547 flags |= SEC_NEVER_LOAD;
4548 break;
4549
4550 /* Section Protection */
4551 case 'r': /* section is readable */
4552 flags |= IMAGE_SCN_MEM_READ;
4553 break;
4554 case 'w': /* section is writeable */
4555 flags |= IMAGE_SCN_MEM_WRITE;
4556 break;
4557 case 'x': /* section is executable */
4558 flags |= IMAGE_SCN_MEM_EXECUTE;
4559 break;
4560 case 's': /* section is sharable */
4561 flags |= IMAGE_SCN_MEM_SHARED;
4562 break;
4563
4564 /* Section Alignment */
4565 case '0': /* align to byte boundary */
4566 flags |= IMAGE_SCN_ALIGN_1BYTES;
4567 align = 0;
4568 break;
4569 case '1': /* align to halfword boundary */
4570 flags |= IMAGE_SCN_ALIGN_2BYTES;
4571 align = 1;
4572 break;
4573 case '2': /* align to word boundary */
4574 flags |= IMAGE_SCN_ALIGN_4BYTES;
4575 align = 2;
4576 break;
4577 case '3': /* align to doubleword boundary */
4578 flags |= IMAGE_SCN_ALIGN_8BYTES;
4579 align = 3;
4580 break;
4581 case '4': /* align to quadword boundary */
4582 flags |= IMAGE_SCN_ALIGN_16BYTES;
4583 align = 4;
4584 break;
4585 case '5': /* align to 32 byte boundary */
4586 flags |= IMAGE_SCN_ALIGN_32BYTES;
4587 align = 5;
4588 break;
4589 case '6': /* align to 64 byte boundary */
4590 flags |= IMAGE_SCN_ALIGN_64BYTES;
4591 align = 6;
4592 break;
4593
4594 default:
99a814a1
AM		 4595 as_bad (_("unknown section attribute '%c'"),
4596 *input_line_pointer);
252b5132
RH		 4597 break;
4598 }
4599 ++input_line_pointer;
4600 }
4601 if (*input_line_pointer == '"')
4602 ++input_line_pointer;
4603 }
4604 }
4605
4606 sec = subseg_new (name, (subsegT) exp);
4607
99a814a1 4608 ppc_set_current_section (sec);
252b5132
RH		 4609
4610 if (flags != SEC_NO_FLAGS)
4611 {
4612 if (! bfd_set_section_flags (stdoutput, sec, flags))
4613 as_bad (_("error setting flags for \"%s\": %s"),
4614 bfd_section_name (stdoutput, sec),
4615 bfd_errmsg (bfd_get_error ()));
4616 }
4617
99a814a1 4618 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4619
4620}
4621
4622static void
4623ppc_pe_function (ignore)
5480ccf3 4624 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4625{
4626 char *name;
4627 char endc;
4628 symbolS *ext_sym;
4629
4630 name = input_line_pointer;
4631 endc = get_symbol_end ();
4632
4633 ext_sym = symbol_find_or_make (name);
4634
4635 *input_line_pointer = endc;
4636
4637 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4638 SF_SET_FUNCTION (ext_sym);
4639 SF_SET_PROCESS (ext_sym);
4640 coff_add_linesym (ext_sym);
4641
4642 demand_empty_rest_of_line ();
4643}
4644
4645static void
4646ppc_pe_tocd (ignore)
5480ccf3 4647 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4648{
4649 if (tocdata_section == 0)
4650 {
4651 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4652 /* FIXME: section flags won't work. */
252b5132
RH		 4653 bfd_set_section_flags (stdoutput, tocdata_section,
4654 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4655 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4656
4657 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4658 }
4659 else
4660 {
4661 rdata_section = subseg_new (".tocd", 0);
4662 }
4663
99a814a1 4664 ppc_set_current_section (tocdata_section);
252b5132
RH		 4665
4666 demand_empty_rest_of_line ();
4667}
4668
4669/* Don't adjust TOC relocs to use the section symbol. */
4670
4671int
4672ppc_pe_fix_adjustable (fix)
4673 fixS *fix;
4674{
4675 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4676}
4677
4678#endif
4679\f
4680#ifdef OBJ_XCOFF
4681
4682/* XCOFF specific symbol and file handling. */
4683
4684/* Canonicalize the symbol name. We use the to force the suffix, if
4685 any, to use square brackets, and to be in upper case. */
4686
4687char *
4688ppc_canonicalize_symbol_name (name)
4689 char *name;
4690{
4691 char *s;
4692
4693 if (ppc_stab_symbol)
4694 return name;
4695
4696 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4697 ;
4698 if (*s != '\0')
4699 {
4700 char brac;
4701
4702 if (*s == '[')
4703 brac = ']';
4704 else
4705 {
4706 *s = '[';
4707 brac = '}';
4708 }
4709
4710 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4711 *s = TOUPPER (*s);
252b5132
RH		 4712
4713 if (*s == '\0' || s[1] != '\0')
4714 as_bad (_("bad symbol suffix"));
4715
4716 *s = ']';
4717 }
4718
4719 return name;
4720}
4721
4722/* Set the class of a symbol based on the suffix, if any. This is
4723 called whenever a new symbol is created. */
4724
4725void
4726ppc_symbol_new_hook (sym)
4727 symbolS *sym;
4728{
809ffe0d 4729 struct ppc_tc_sy *tc;
252b5132
RH		 4730 const char *s;
4731
809ffe0d
ILT		 4732 tc = symbol_get_tc (sym);
4733 tc->next = NULL;
4734 tc->output = 0;
4735 tc->class = -1;
4736 tc->real_name = NULL;
4737 tc->subseg = 0;
4738 tc->align = 0;
4739 tc->size = NULL;
4740 tc->within = NULL;
252b5132
RH		 4741
4742 if (ppc_stab_symbol)
4743 return;
4744
4745 s = strchr (S_GET_NAME (sym), '[');
4746 if (s == (const char *) NULL)
4747 {
4748 /* There is no suffix. */
4749 return;
4750 }
4751
4752 ++s;
4753
4754 switch (s[0])
4755 {
4756 case 'B':
4757 if (strcmp (s, "BS]") == 0)
809ffe0d 4758 tc->class = XMC_BS;
252b5132
RH		 4759 break;
4760 case 'D':
4761 if (strcmp (s, "DB]") == 0)
809ffe0d 4762 tc->class = XMC_DB;
252b5132 4763 else if (strcmp (s, "DS]") == 0)
809ffe0d 4764 tc->class = XMC_DS;
252b5132
RH		 4765 break;
4766 case 'G':
4767 if (strcmp (s, "GL]") == 0)
809ffe0d 4768 tc->class = XMC_GL;
252b5132
RH		 4769 break;
4770 case 'P':
4771 if (strcmp (s, "PR]") == 0)
809ffe0d 4772 tc->class = XMC_PR;
252b5132
RH		 4773 break;
4774 case 'R':
4775 if (strcmp (s, "RO]") == 0)
809ffe0d 4776 tc->class = XMC_RO;
252b5132 4777 else if (strcmp (s, "RW]") == 0)
809ffe0d 4778 tc->class = XMC_RW;
252b5132
RH		 4779 break;
4780 case 'S':
4781 if (strcmp (s, "SV]") == 0)
809ffe0d 4782 tc->class = XMC_SV;
252b5132
RH		 4783 break;
4784 case 'T':
4785 if (strcmp (s, "TC]") == 0)
809ffe0d 4786 tc->class = XMC_TC;
252b5132 4787 else if (strcmp (s, "TI]") == 0)
809ffe0d 4788 tc->class = XMC_TI;
252b5132 4789 else if (strcmp (s, "TB]") == 0)
809ffe0d 4790 tc->class = XMC_TB;
252b5132 4791 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4792 tc->class = XMC_TC0;
252b5132
RH		 4793 break;
4794 case 'U':
4795 if (strcmp (s, "UA]") == 0)
809ffe0d 4796 tc->class = XMC_UA;
252b5132 4797 else if (strcmp (s, "UC]") == 0)
809ffe0d 4798 tc->class = XMC_UC;
252b5132
RH		 4799 break;
4800 case 'X':
4801 if (strcmp (s, "XO]") == 0)
809ffe0d 4802 tc->class = XMC_XO;
252b5132
RH		 4803 break;
4804 }
4805
809ffe0d 4806 if (tc->class == -1)
252b5132
RH		 4807 as_bad (_("Unrecognized symbol suffix"));
4808}
4809
4810/* Set the class of a label based on where it is defined. This
4811 handles symbols without suffixes. Also, move the symbol so that it
4812 follows the csect symbol. */
4813
4814void
4815ppc_frob_label (sym)
4816 symbolS *sym;
4817{
4818 if (ppc_current_csect != (symbolS *) NULL)
4819 {
809ffe0d
ILT		 4820 if (symbol_get_tc (sym)->class == -1)
4821 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4822
4823 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4824 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4825 &symbol_rootP, &symbol_lastP);
4826 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4827 }
4828}
4829
4830/* This variable is set by ppc_frob_symbol if any absolute symbols are
4831 seen. It tells ppc_adjust_symtab whether it needs to look through
4832 the symbols. */
4833
b34976b6 4834static bfd_boolean ppc_saw_abs;
252b5132
RH		 4835
4836/* Change the name of a symbol just before writing it out. Set the
4837 real name if the .rename pseudo-op was used. Otherwise, remove any
4838 class suffix. Return 1 if the symbol should not be included in the
4839 symbol table. */
4840
4841int
4842ppc_frob_symbol (sym)
4843 symbolS *sym;
4844{
4845 static symbolS *ppc_last_function;
4846 static symbolS *set_end;
4847
4848 /* Discard symbols that should not be included in the output symbol
4849 table. */
809ffe0d
ILT		 4850 if (! symbol_used_in_reloc_p (sym)
4851 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4852 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4853 && ! symbol_get_tc (sym)->output
252b5132
RH		 4854 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4855 return 1;
4856
a161fe53
AM		 4857 /* This one will disappear anyway. Don't make a csect sym for it. */
4858 if (sym == abs_section_sym)
4859 return 1;
4860
809ffe0d
ILT		 4861 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4862 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4863 else
4864 {
4865 const char *name;
4866 const char *s;
4867
4868 name = S_GET_NAME (sym);
4869 s = strchr (name, '[');
4870 if (s != (char *) NULL)
4871 {
4872 unsigned int len;
4873 char *snew;
4874
4875 len = s - name;
4876 snew = xmalloc (len + 1);
4877 memcpy (snew, name, len);
4878 snew[len] = '\0';
4879
4880 S_SET_NAME (sym, snew);
4881 }
4882 }
4883
4884 if (set_end != (symbolS *) NULL)
4885 {
4886 SA_SET_SYM_ENDNDX (set_end, sym);
4887 set_end = NULL;
4888 }
4889
4890 if (SF_GET_FUNCTION (sym))
4891 {
4892 if (ppc_last_function != (symbolS *) NULL)
4893 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4894 ppc_last_function = sym;
809ffe0d 4895 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4896 {
6386f3a7 4897 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4898 SA_SET_SYM_FSIZE (sym,
4899 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4900 }
4901 }
4902 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4903 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4904 {
4905 if (ppc_last_function == (symbolS *) NULL)
4906 as_bad (_(".ef with no preceding .function"));
4907 else
4908 {
4909 set_end = ppc_last_function;
4910 ppc_last_function = NULL;
4911
4912 /* We don't have a C_EFCN symbol, but we need to force the
4913 COFF backend to believe that it has seen one. */
4914 coff_last_function = NULL;
4915 }
4916 }
4917
670ec21d 4918 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4919 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4920 && S_GET_STORAGE_CLASS (sym) != C_FILE
4921 && S_GET_STORAGE_CLASS (sym) != C_FCN
4922 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4923 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4924 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4925 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4926 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4927 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4928 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4929
4930 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4931 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4932 {
4933 int i;
4934 union internal_auxent *a;
4935
4936 /* Create a csect aux. */
4937 i = S_GET_NUMBER_AUXILIARY (sym);
4938 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4939 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4940 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4941 {
4942 /* This is the TOC table. */
4943 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4944 a->x_csect.x_scnlen.l = 0;
4945 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4946 }
809ffe0d 4947 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4948 {
4949 /* This is a csect symbol. x_scnlen is the size of the
4950 csect. */
809ffe0d 4951 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4952 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4953 S_GET_SEGMENT (sym))
4954 - S_GET_VALUE (sym));
4955 else
4956 {
6386f3a7 4957 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4958 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4959 - S_GET_VALUE (sym));
4960 }
809ffe0d 4961 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4962 }
4963 else if (S_GET_SEGMENT (sym) == bss_section)
4964 {
4965 /* This is a common symbol. */
809ffe0d
ILT		 4966 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4967 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4968 if (S_IS_EXTERNAL (sym))
809ffe0d 4969 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4970 else
809ffe0d 4971 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4972 }
4973 else if (S_GET_SEGMENT (sym) == absolute_section)
4974 {
4975 /* This is an absolute symbol. The csect will be created by
99a814a1 4976 ppc_adjust_symtab. */
b34976b6 4977 ppc_saw_abs = TRUE;
252b5132 4978 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4979 if (symbol_get_tc (sym)->class == -1)
4980 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4981 }
4982 else if (! S_IS_DEFINED (sym))
4983 {
4984 /* This is an external symbol. */
4985 a->x_csect.x_scnlen.l = 0;
4986 a->x_csect.x_smtyp = XTY_ER;
4987 }
809ffe0d 4988 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4989 {
4990 symbolS *next;
4991
4992 /* This is a TOC definition. x_scnlen is the size of the
4993 TOC entry. */
4994 next = symbol_next (sym);
809ffe0d 4995 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4996 next = symbol_next (next);
4997 if (next == (symbolS *) NULL
809ffe0d 4998 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4999 {
5000 if (ppc_after_toc_frag == (fragS *) NULL)
5001 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5002 data_section)
5003 - S_GET_VALUE (sym));
5004 else
5005 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5006 - S_GET_VALUE (sym));
5007 }
5008 else
5009 {
6386f3a7 5010 resolve_symbol_value (next);
252b5132
RH		 5011 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5012 - S_GET_VALUE (sym));
5013 }
5014 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5015 }
5016 else
5017 {
5018 symbolS *csect;
5019
5020 /* This is a normal symbol definition. x_scnlen is the
5021 symbol index of the containing csect. */
5022 if (S_GET_SEGMENT (sym) == text_section)
5023 csect = ppc_text_csects;
5024 else if (S_GET_SEGMENT (sym) == data_section)
5025 csect = ppc_data_csects;
5026 else
5027 abort ();
5028
5029 /* Skip the initial dummy symbol. */
809ffe0d 5030 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5031
5032 if (csect == (symbolS *) NULL)
5033 {
5034 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5035 a->x_csect.x_scnlen.l = 0;
5036 }
5037 else
5038 {
809ffe0d 5039 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5040 {
6386f3a7 5041 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5042 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5043 > S_GET_VALUE (sym))
252b5132 5044 break;
809ffe0d 5045 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5046 }
5047
809ffe0d
ILT		 5048 a->x_csect.x_scnlen.p =
5049 coffsymbol (symbol_get_bfdsym (csect))->native;
5050 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5051 1;
252b5132
RH		 5052 }
5053 a->x_csect.x_smtyp = XTY_LD;
5054 }
81d4177b 5055
252b5132
RH		 5056 a->x_csect.x_parmhash = 0;
5057 a->x_csect.x_snhash = 0;
809ffe0d 5058 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5059 a->x_csect.x_smclas = XMC_PR;
5060 else
809ffe0d 5061 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5062 a->x_csect.x_stab = 0;
5063 a->x_csect.x_snstab = 0;
5064
5065 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5066 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5067 }
5068 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5069 {
5070 /* We want the value to be the symbol index of the referenced
5071 csect symbol. BFD will do that for us if we set the right
5072 flags. */
b782de16
AM		 5073 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5074 combined_entry_type *c = coffsymbol (bsym)->native;
5075
5076 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5077 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5078 }
5079 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5080 {
5081 symbolS *block;
5082 symbolS *csect;
5083
5084 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5085 block = symbol_get_tc (sym)->within;
5086 csect = symbol_get_tc (block)->within;
6386f3a7 5087 resolve_symbol_value (csect);
252b5132
RH		 5088 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5089 }
5090 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5091 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5092 {
5093 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5094 BFD will do that for us if we set the right flags. We have
5095 already set the value correctly. */
809ffe0d 5096 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5097 }
5098
5099 return 0;
5100}
5101
5102/* Adjust the symbol table. This creates csect symbols for all
5103 absolute symbols. */
5104
5105void
5106ppc_adjust_symtab ()
5107{
5108 symbolS *sym;
5109
5110 if (! ppc_saw_abs)
5111 return;
5112
5113 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5114 {
5115 symbolS *csect;
5116 int i;
5117 union internal_auxent *a;
5118
5119 if (S_GET_SEGMENT (sym) != absolute_section)
5120 continue;
5121
5122 csect = symbol_create (".abs[XO]", absolute_section,
5123 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5124 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5125 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5126 i = S_GET_NUMBER_AUXILIARY (csect);
5127 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5128 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5129 a->x_csect.x_scnlen.l = 0;
5130 a->x_csect.x_smtyp = XTY_SD;
5131 a->x_csect.x_parmhash = 0;
5132 a->x_csect.x_snhash = 0;
5133 a->x_csect.x_smclas = XMC_XO;
5134 a->x_csect.x_stab = 0;
5135 a->x_csect.x_snstab = 0;
5136
5137 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5138
5139 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5140 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5141 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5142 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5143 }
5144
b34976b6 5145 ppc_saw_abs = FALSE;
252b5132
RH		 5146}
5147
5148/* Set the VMA for a section. This is called on all the sections in
5149 turn. */
5150
5151void
5152ppc_frob_section (sec)
5153 asection *sec;
5154{
931e13a6 5155 static bfd_vma vma = 0;
252b5132 5156
931e13a6 5157 vma = md_section_align (sec, vma);
252b5132
RH		 5158 bfd_set_section_vma (stdoutput, sec, vma);
5159 vma += bfd_section_size (stdoutput, sec);
5160}
5161
5162#endif /* OBJ_XCOFF */
5163\f
5164/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5165 of type TYPE, and store the appropriate bytes in *LITP. The number
5166 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5167 returned, or NULL on OK. */
5168
5169char *
5170md_atof (type, litp, sizep)
5171 int type;
5172 char *litp;
5173 int *sizep;
5174{
5175 int prec;
5176 LITTLENUM_TYPE words[4];
5177 char *t;
5178 int i;
5179
5180 switch (type)
5181 {
5182 case 'f':
5183 prec = 2;
5184 break;
5185
5186 case 'd':
5187 prec = 4;
5188 break;
5189
5190 default:
5191 *sizep = 0;
5192 return _("bad call to md_atof");
5193 }
5194
5195 t = atof_ieee (input_line_pointer, type, words);
5196 if (t)
5197 input_line_pointer = t;
5198
5199 *sizep = prec * 2;
5200
5201 if (target_big_endian)
5202 {
5203 for (i = 0; i < prec; i++)
5204 {
5205 md_number_to_chars (litp, (valueT) words[i], 2);
5206 litp += 2;
5207 }
5208 }
5209 else
5210 {
5211 for (i = prec - 1; i >= 0; i--)
5212 {
5213 md_number_to_chars (litp, (valueT) words[i], 2);
5214 litp += 2;
5215 }
5216 }
81d4177b 5217
252b5132
RH		 5218 return NULL;
5219}
5220
5221/* Write a value out to the object file, using the appropriate
5222 endianness. */
5223
5224void
5225md_number_to_chars (buf, val, n)
5226 char *buf;
5227 valueT val;
5228 int n;
5229{
5230 if (target_big_endian)
5231 number_to_chars_bigendian (buf, val, n);
5232 else
5233 number_to_chars_littleendian (buf, val, n);
5234}
5235
5236/* Align a section (I don't know why this is machine dependent). */
5237
5238valueT
5239md_section_align (seg, addr)
5240 asection *seg;
5241 valueT addr;
5242{
5243 int align = bfd_get_section_alignment (stdoutput, seg);
5244
5245 return ((addr + (1 << align) - 1) & (-1 << align));
5246}
5247
5248/* We don't have any form of relaxing. */
5249
5250int
5251md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5252 fragS *fragp ATTRIBUTE_UNUSED;
5253 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5254{
5255 abort ();
5256 return 0;
5257}
5258
5259/* Convert a machine dependent frag. We never generate these. */
5260
5261void
5262md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5263 bfd *abfd ATTRIBUTE_UNUSED;
5264 asection *sec ATTRIBUTE_UNUSED;
5265 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5266{
5267 abort ();
5268}
5269
5270/* We have no need to default values of symbols. */
5271
252b5132
RH		 5272symbolS *
5273md_undefined_symbol (name)
92161534 5274 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5275{
5276 return 0;
5277}
5278\f
5279/* Functions concerning relocs. */
5280
5281/* The location from which a PC relative jump should be calculated,
5282 given a PC relative reloc. */
5283
5284long
5285md_pcrel_from_section (fixp, sec)
5286 fixS *fixp;
92161534 5287 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5288{
5289 return fixp->fx_frag->fr_address + fixp->fx_where;
5290}
5291
5292#ifdef OBJ_XCOFF
5293
5294/* This is called to see whether a fixup should be adjusted to use a
5295 section symbol. We take the opportunity to change a fixup against
5296 a symbol in the TOC subsegment into a reloc against the
5297 corresponding .tc symbol. */
5298
5299int
5300ppc_fix_adjustable (fix)
5301 fixS *fix;
5302{
b782de16
AM		 5303 valueT val = resolve_symbol_value (fix->fx_addsy);
5304 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5305 TC_SYMFIELD_TYPE *tc;
5306
5307 if (symseg == absolute_section)
5308 return 0;
252b5132 5309
252b5132 5310 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5311 && fix->fx_addsy != ppc_toc_csect
b782de16 5312 && symseg == data_section
252b5132
RH		 5313 && val >= ppc_toc_frag->fr_address
5314 && (ppc_after_toc_frag == (fragS *) NULL
5315 || val < ppc_after_toc_frag->fr_address))
5316 {
5317 symbolS *sy;
5318
5319 for (sy = symbol_next (ppc_toc_csect);
5320 sy != (symbolS *) NULL;
5321 sy = symbol_next (sy))
5322 {
b782de16
AM		 5323 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5324
5325 if (sy_tc->class == XMC_TC0)
252b5132 5326 continue;
b782de16 5327 if (sy_tc->class != XMC_TC)
252b5132 5328 break;
b782de16 5329 if (val == resolve_symbol_value (sy))
252b5132
RH		 5330 {
5331 fix->fx_addsy = sy;
5332 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5333 return 0;
5334 }
5335 }
5336
5337 as_bad_where (fix->fx_file, fix->fx_line,
5338 _("symbol in .toc does not match any .tc"));
5339 }
5340
5341 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5342 tc = symbol_get_tc (fix->fx_addsy);
5343 if (tc->subseg == 0
5344 && tc->class != XMC_TC0
5345 && tc->class != XMC_TC
5346 && symseg != bss_section
252b5132 5347 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5348 && (symseg != data_section
252b5132
RH		 5349 || ppc_toc_csect == NULL
5350 || val < ppc_toc_frag->fr_address
5351 || (ppc_after_toc_frag != NULL
5352 && val >= ppc_after_toc_frag->fr_address)))
5353 {
5354 symbolS *csect;
b782de16 5355 symbolS *next_csect;
252b5132 5356
b782de16 5357 if (symseg == text_section)
252b5132 5358 csect = ppc_text_csects;
b782de16 5359 else if (symseg == data_section)
252b5132
RH		 5360 csect = ppc_data_csects;
5361 else
5362 abort ();
5363
5364 /* Skip the initial dummy symbol. */
809ffe0d 5365 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5366
5367 if (csect != (symbolS *) NULL)
5368 {
b782de16
AM		 5369 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5370 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5371 {
5372 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5373 have to look through the full symbol table to see
5374 whether this is the csect we want. Note that we will
5375 only get here if the csect has zero length. */
b782de16
AM		 5376 if (symbol_get_frag (csect)->fr_address == val
5377 && S_GET_VALUE (csect) == val)
252b5132
RH		 5378 {
5379 symbolS *scan;
5380
809ffe0d 5381 for (scan = symbol_next (csect);
252b5132 5382 scan != NULL;
809ffe0d 5383 scan = symbol_next (scan))
252b5132 5384 {
809ffe0d 5385 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5386 break;
5387 if (scan == fix->fx_addsy)
5388 break;
5389 }
5390
5391 /* If we found the symbol before the next csect
99a814a1 5392 symbol, then this is the csect we want. */
252b5132
RH		 5393 if (scan == fix->fx_addsy)
5394 break;
5395 }
5396
b782de16 5397 csect = next_csect;
252b5132
RH		 5398 }
5399
b782de16 5400 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5401 fix->fx_addsy = csect;
5402 }
b782de16 5403 return 0;
252b5132
RH		 5404 }
5405
5406 /* Adjust a reloc against a .lcomm symbol to be against the base
5407 .lcomm. */
b782de16 5408 if (symseg == bss_section
252b5132
RH		 5409 && ! S_IS_EXTERNAL (fix->fx_addsy))
5410 {
b782de16
AM		 5411 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5412
5413 fix->fx_offset += val - resolve_symbol_value (sy);
5414 fix->fx_addsy = sy;
252b5132
RH		 5415 }
5416
5417 return 0;
5418}
5419
5420/* A reloc from one csect to another must be kept. The assembler
5421 will, of course, keep relocs between sections, and it will keep
5422 absolute relocs, but we need to force it to keep PC relative relocs
5423 between two csects in the same section. */
5424
5425int
5426ppc_force_relocation (fix)
5427 fixS *fix;
5428{
5429 /* At this point fix->fx_addsy should already have been converted to
5430 a csect symbol. If the csect does not include the fragment, then
5431 we need to force the relocation. */
5432 if (fix->fx_pcrel
5433 && fix->fx_addsy != NULL
809ffe0d
ILT		 5434 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5435 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5436 > fix->fx_frag->fr_address)
5437 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5438 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5439 <= fix->fx_frag->fr_address))))
5440 return 1;
5441
ae6063d4 5442 return generic_force_reloc (fix);
252b5132
RH		 5443}
5444
5445#endif /* OBJ_XCOFF */
5446
0baf16f2 5447#ifdef OBJ_ELF
a161fe53
AM		 5448/* If this function returns non-zero, it guarantees that a relocation
5449 will be emitted for a fixup. */
5450
5451int
5452ppc_force_relocation (fix)
5453 fixS *fix;
5454{
5455 /* Branch prediction relocations must force a relocation, as must
5456 the vtable description relocs. */
5457 switch (fix->fx_r_type)
5458 {
5459 case BFD_RELOC_PPC_B16_BRTAKEN:
5460 case BFD_RELOC_PPC_B16_BRNTAKEN:
5461 case BFD_RELOC_PPC_BA16_BRTAKEN:
5462 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5463 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5464 return 1;
5465 default:
5466 break;
5467 }
5468
cdba85ec
AM		 5469 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5470 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5471 return 1;
5472
ae6063d4 5473 return generic_force_reloc (fix);
a161fe53
AM		 5474}
5475
0baf16f2
AM		 5476int
5477ppc_fix_adjustable (fix)
5478 fixS *fix;
252b5132 5479{
0baf16f2
AM		 5480 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5481 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5482 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5483 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5484 && fix->fx_r_type != BFD_RELOC_GPREL16
5485 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5486 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5487 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5488 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5489}
0baf16f2 5490#endif
252b5132
RH		 5491
5492/* Apply a fixup to the object code. This is called for all the
5493 fixups we generated by the call to fix_new_exp, above. In the call
5494 above we used a reloc code which was the largest legal reloc code
5495 plus the operand index. Here we undo that to recover the operand
5496 index. At this point all symbol values should be fully resolved,
5497 and we attempt to completely resolve the reloc. If we can not do
5498 that, we determine the correct reloc code and put it back in the
5499 fixup. */
5500
94f592af
NC		 5501void
5502md_apply_fix3 (fixP, valP, seg)
5503 fixS *fixP;
5504 valueT * valP;
0baf16f2 5505 segT seg ATTRIBUTE_UNUSED;
252b5132 5506{
94f592af 5507 valueT value = * valP;
252b5132
RH		 5508
5509#ifdef OBJ_ELF
94f592af 5510 if (fixP->fx_addsy != NULL)
252b5132 5511 {
a161fe53 5512 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5513 if (fixP->fx_pcrel)
5514 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5515 }
5516 else
94f592af 5517 fixP->fx_done = 1;
252b5132 5518#else
a161fe53 5519 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5520 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5521 doing this relocation the code in write.c is going to call
5522 bfd_install_relocation, which is also going to use the symbol
5523 value. That means that if the reloc is fully resolved we want to
a161fe53 5524 use *valP since bfd_install_relocation is not being used.
252b5132 5525 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5526 *valP, and must use fx_offset instead. However, if the reloc
5527 is PC relative, we do want to use *valP since it includes the
252b5132 5528 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5529 if (fixP->fx_addsy == (symbolS *) NULL)
5530 fixP->fx_done = 1;
5531
5532 else if (fixP->fx_pcrel)
5533 ;
5534
252b5132 5535 else
a161fe53
AM		 5536 value = fixP->fx_offset;
5537#endif
5538
5539 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5540 {
a161fe53
AM		 5541 /* We can't actually support subtracting a symbol. */
5542 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5543 }
252b5132 5544
94f592af 5545 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5546 {
5547 int opindex;
5548 const struct powerpc_operand *operand;
5549 char *where;
5550 unsigned long insn;
5551
94f592af 5552 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5553
5554 operand = &powerpc_operands[opindex];
5555
5556#ifdef OBJ_XCOFF
0baf16f2
AM		 5557 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5558 does not generate a reloc. It uses the offset of `sym' within its
5559 csect. Other usages, such as `.long sym', generate relocs. This
5560 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5561 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5562 && operand->bits == 16
5563 && operand->shift == 0
2b3c4602 5564 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5565 && fixP->fx_addsy != NULL
5566 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5567 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5568 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5569 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5570 {
94f592af
NC		 5571 value = fixP->fx_offset;
5572 fixP->fx_done = 1;
252b5132
RH		 5573 }
5574#endif
5575
5576 /* Fetch the instruction, insert the fully resolved operand
5577 value, and stuff the instruction back again. */
94f592af 5578 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5579 if (target_big_endian)
5580 insn = bfd_getb32 ((unsigned char *) where);
5581 else
5582 insn = bfd_getl32 ((unsigned char *) where);
5583 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5584 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5585 if (target_big_endian)
5586 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5587 else
5588 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5589
94f592af
NC		 5590 if (fixP->fx_done)
5591 /* Nothing else to do here. */
5592 return;
252b5132 5593
94f592af 5594 assert (fixP->fx_addsy != NULL);
0baf16f2 5595
252b5132
RH		 5596 /* Determine a BFD reloc value based on the operand information.
5597 We are only prepared to turn a few of the operands into
0baf16f2 5598 relocs. */
11b37b7b
AM		 5599 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5600 && operand->bits == 26
5601 && operand->shift == 0)
94f592af 5602 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5603 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5604 && operand->bits == 16
5605 && operand->shift == 0)
95210096
AM		 5606 {
5607 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5608#ifdef OBJ_XCOFF
5609 fixP->fx_size = 2;
5610 if (target_big_endian)
5611 fixP->fx_where += 2;
5612#endif
5613 }
11b37b7b
AM		 5614 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5615 && operand->bits == 26
5616 && operand->shift == 0)
94f592af 5617 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5618 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5619 && operand->bits == 16
5620 && operand->shift == 0)
95210096
AM		 5621 {
5622 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5623#ifdef OBJ_XCOFF
5624 fixP->fx_size = 2;
5625 if (target_big_endian)
5626 fixP->fx_where += 2;
5627#endif
5628 }
0baf16f2 5629#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5630 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5631 && operand->bits == 16
a7fc733f 5632 && operand->shift == 0)
11b37b7b 5633 {
a7fc733f
AM		 5634 if (ppc_is_toc_sym (fixP->fx_addsy))
5635 {
5636 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5637#ifdef OBJ_ELF
a7fc733f
AM		 5638 if (ppc_obj64
5639 && (operand->flags & PPC_OPERAND_DS) != 0)
5640 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5641#endif
5642 }
5643 else
5644 {
5645 fixP->fx_r_type = BFD_RELOC_16;
5646#ifdef OBJ_ELF
5647 if (ppc_obj64
5648 && (operand->flags & PPC_OPERAND_DS) != 0)
5649 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5650#endif
a7fc733f 5651 }
94f592af 5652 fixP->fx_size = 2;
11b37b7b 5653 if (target_big_endian)
94f592af 5654 fixP->fx_where += 2;
11b37b7b 5655 }
0baf16f2 5656#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5657 else
252b5132
RH		 5658 {
5659 char *sfile;
5660 unsigned int sline;
5661
5662 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5663 symbol. */
94f592af
NC		 5664 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5665 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5666 _("unresolved expression that must be resolved"));
5667 else
94f592af 5668 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5669 _("unsupported relocation against %s"),
94f592af
NC		 5670 S_GET_NAME (fixP->fx_addsy));
5671 fixP->fx_done = 1;
5672 return;
252b5132
RH		 5673 }
5674 }
5675 else
5676 {
5677#ifdef OBJ_ELF
94f592af 5678 ppc_elf_validate_fix (fixP, seg);
252b5132 5679#endif
94f592af 5680 switch (fixP->fx_r_type)
252b5132 5681 {
252b5132 5682 case BFD_RELOC_CTOR:
2b3c4602 5683 if (ppc_obj64)
9c7977b3
AM		 5684 goto ctor64;
5685 /* fall through */
5686
0baf16f2 5687 case BFD_RELOC_32:
94f592af
NC		 5688 if (fixP->fx_pcrel)
5689 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5690 /* fall through */
252b5132
RH		 5691
5692 case BFD_RELOC_RVA:
5693 case BFD_RELOC_32_PCREL:
252b5132 5694 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5695 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5696 value, 4);
5697 break;
5698
7f6d05e8 5699 case BFD_RELOC_64:
9c7977b3 5700 ctor64:
94f592af
NC		 5701 if (fixP->fx_pcrel)
5702 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5703 /* fall through */
0baf16f2 5704
7f6d05e8 5705 case BFD_RELOC_64_PCREL:
94f592af 5706 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5707 value, 8);
81d4177b 5708 break;
0baf16f2 5709
252b5132
RH		 5710 case BFD_RELOC_LO16:
5711 case BFD_RELOC_16:
5712 case BFD_RELOC_GPREL16:
5713 case BFD_RELOC_16_GOT_PCREL:
5714 case BFD_RELOC_16_GOTOFF:
5715 case BFD_RELOC_LO16_GOTOFF:
5716 case BFD_RELOC_HI16_GOTOFF:
5717 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5718 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5719 case BFD_RELOC_LO16_BASEREL:
5720 case BFD_RELOC_HI16_BASEREL:
5721 case BFD_RELOC_HI16_S_BASEREL:
5722 case BFD_RELOC_PPC_EMB_NADDR16:
5723 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5724 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5725 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5726 case BFD_RELOC_PPC_EMB_SDAI16:
5727 case BFD_RELOC_PPC_EMB_SDA2REL:
5728 case BFD_RELOC_PPC_EMB_SDA2I16:
5729 case BFD_RELOC_PPC_EMB_RELSEC16:
5730 case BFD_RELOC_PPC_EMB_RELST_LO:
5731 case BFD_RELOC_PPC_EMB_RELST_HI:
5732 case BFD_RELOC_PPC_EMB_RELST_HA:
5733 case BFD_RELOC_PPC_EMB_RELSDA:
5734 case BFD_RELOC_PPC_TOC16:
0baf16f2 5735#ifdef OBJ_ELF
0baf16f2
AM		 5736 case BFD_RELOC_PPC64_TOC16_LO:
5737 case BFD_RELOC_PPC64_TOC16_HI:
5738 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5739#endif
94f592af 5740 if (fixP->fx_pcrel)
252b5132 5741 {
94f592af
NC		 5742 if (fixP->fx_addsy != NULL)
5743 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5744 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5745 bfd_get_reloc_code_name (fixP->fx_r_type),
5746 S_GET_NAME (fixP->fx_addsy));
252b5132 5747 else
94f592af 5748 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5749 _("cannot emit PC relative %s relocation"),
94f592af 5750 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5751 }
5752
94f592af 5753 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5754 value, 2);
5755 break;
5756
5757 /* This case happens when you write, for example,
5758 lis %r3,(L1-L2)@ha
5759 where L1 and L2 are defined later. */
5760 case BFD_RELOC_HI16:
94f592af 5761 if (fixP->fx_pcrel)
252b5132 5762 abort ();
94f592af 5763 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5764 PPC_HI (value), 2);
252b5132 5765 break;
0baf16f2 5766
252b5132 5767 case BFD_RELOC_HI16_S:
94f592af 5768 if (fixP->fx_pcrel)
252b5132 5769 abort ();
94f592af 5770 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5771 PPC_HA (value), 2);
5772 break;
5773
5774#ifdef OBJ_ELF
0baf16f2 5775 case BFD_RELOC_PPC64_HIGHER:
94f592af 5776 if (fixP->fx_pcrel)
0baf16f2 5777 abort ();
94f592af 5778 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5779 PPC_HIGHER (value), 2);
252b5132
RH		 5780 break;
5781
0baf16f2 5782 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5783 if (fixP->fx_pcrel)
0baf16f2 5784 abort ();
94f592af 5785 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5786 PPC_HIGHERA (value), 2);
5787 break;
5788
5789 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5790 if (fixP->fx_pcrel)
0baf16f2 5791 abort ();
94f592af 5792 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5793 PPC_HIGHEST (value), 2);
5794 break;
5795
5796 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5797 if (fixP->fx_pcrel)
0baf16f2 5798 abort ();
94f592af 5799 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5800 PPC_HIGHESTA (value), 2);
5801 break;
5802
5803 case BFD_RELOC_PPC64_ADDR16_DS:
5804 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5805 case BFD_RELOC_PPC64_GOT16_DS:
5806 case BFD_RELOC_PPC64_GOT16_LO_DS:
5807 case BFD_RELOC_PPC64_PLT16_LO_DS:
5808 case BFD_RELOC_PPC64_SECTOFF_DS:
5809 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5810 case BFD_RELOC_PPC64_TOC16_DS:
5811 case BFD_RELOC_PPC64_TOC16_LO_DS:
5812 case BFD_RELOC_PPC64_PLTGOT16_DS:
5813 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5814 if (fixP->fx_pcrel)
0baf16f2
AM		 5815 abort ();
5816 {
2132e3a3 5817 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5818 unsigned long val, mask;
0baf16f2
AM		 5819
5820 if (target_big_endian)
adadcc0c 5821 val = bfd_getb32 (where - 2);
0baf16f2 5822 else
adadcc0c
AM		 5823 val = bfd_getl32 (where);
5824 mask = 0xfffc;
5825 /* lq insns reserve the four lsbs. */
5826 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5827 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5828 mask = 0xfff0;
5829 val |= value & mask;
0baf16f2
AM		 5830 if (target_big_endian)
5831 bfd_putb16 ((bfd_vma) val, where);
5832 else
5833 bfd_putl16 ((bfd_vma) val, where);
5834 }
5835 break;
cdba85ec 5836
ba0b2174
AM		 5837 case BFD_RELOC_PPC_B16_BRTAKEN:
5838 case BFD_RELOC_PPC_B16_BRNTAKEN:
5839 case BFD_RELOC_PPC_BA16_BRTAKEN:
5840 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5841 break;
5842
cdba85ec 5843 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5844 break;
5845
cdba85ec
AM		 5846 case BFD_RELOC_PPC_DTPMOD:
5847 case BFD_RELOC_PPC_TPREL16:
5848 case BFD_RELOC_PPC_TPREL16_LO:
5849 case BFD_RELOC_PPC_TPREL16_HI:
5850 case BFD_RELOC_PPC_TPREL16_HA:
5851 case BFD_RELOC_PPC_TPREL:
5852 case BFD_RELOC_PPC_DTPREL16:
5853 case BFD_RELOC_PPC_DTPREL16_LO:
5854 case BFD_RELOC_PPC_DTPREL16_HI:
5855 case BFD_RELOC_PPC_DTPREL16_HA:
5856 case BFD_RELOC_PPC_DTPREL:
5857 case BFD_RELOC_PPC_GOT_TLSGD16:
5858 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5859 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5860 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5861 case BFD_RELOC_PPC_GOT_TLSLD16:
5862 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5863 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5864 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5865 case BFD_RELOC_PPC_GOT_TPREL16:
5866 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5867 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5868 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5869 case BFD_RELOC_PPC_GOT_DTPREL16:
5870 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5871 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5872 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5873 case BFD_RELOC_PPC64_TPREL16_DS:
5874 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5875 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5876 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5877 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5878 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5879 case BFD_RELOC_PPC64_DTPREL16_DS:
5880 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5881 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5882 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5883 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5884 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5885 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5886 break;
0baf16f2 5887#endif
252b5132 5888 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5889 bytes, rather than 2, so offset it here appropriately. */
252b5132 5890 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5891 if (fixP->fx_pcrel)
252b5132
RH		 5892 abort ();
5893
94f592af 5894 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5895 + ((target_big_endian) ? 2 : 0),
5896 value, 2);
5897 break;
5898
5899 case BFD_RELOC_8:
94f592af 5900 if (fixP->fx_pcrel)
31a91399
NC		 5901 {
5902 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5903 ".byte <undefined_symbol> - ." */
31a91399
NC		 5904 if (fixP->fx_addsy)
5905 as_bad (_("Unable to handle reference to symbol %s"),
5906 S_GET_NAME (fixP->fx_addsy));
5907 else
5908 as_bad (_("Unable to resolve expression"));
5909 fixP->fx_done = 1;
5910 }
5911 else
5912 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5913 value, 1);
252b5132
RH		 5914 break;
5915
5916 case BFD_RELOC_24_PLT_PCREL:
5917 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5918 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5919 abort ();
5920
94f592af 5921 if (fixP->fx_done)
99a814a1
AM		 5922 {
5923 char *where;
5924 unsigned long insn;
5925
5926 /* Fetch the instruction, insert the fully resolved operand
5927 value, and stuff the instruction back again. */
94f592af 5928 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5929 if (target_big_endian)
5930 insn = bfd_getb32 ((unsigned char *) where);
5931 else
5932 insn = bfd_getl32 ((unsigned char *) where);
5933 if ((value & 3) != 0)
94f592af 5934 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5935 _("must branch to an address a multiple of 4"));
5936 if ((offsetT) value < -0x40000000
5937 || (offsetT) value >= 0x40000000)
94f592af 5938 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5939 _("@local or @plt branch destination is too far away, %ld bytes"),
5940 (long) value);
5941 insn = insn | (value & 0x03fffffc);
5942 if (target_big_endian)
5943 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5944 else
5945 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5946 }
252b5132
RH		 5947 break;
5948
5949 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5950 fixP->fx_done = 0;
5951 if (fixP->fx_addsy
5952 && !S_IS_DEFINED (fixP->fx_addsy)
5953 && !S_IS_WEAK (fixP->fx_addsy))
5954 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5955 break;
5956
5957 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5958 fixP->fx_done = 0;
252b5132
RH		 5959 break;
5960
0baf16f2 5961#ifdef OBJ_ELF
0baf16f2
AM		 5962 /* Generated by reference to `sym@tocbase'. The sym is
5963 ignored by the linker. */
5964 case BFD_RELOC_PPC64_TOC:
94f592af 5965 fixP->fx_done = 0;
0baf16f2 5966 break;
0baf16f2 5967#endif
252b5132 5968 default:
bc805888 5969 fprintf (stderr,
94f592af 5970 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5971 fflush (stderr);
252b5132
RH		 5972 abort ();
5973 }
5974 }
5975
5976#ifdef OBJ_ELF
94f592af 5977 fixP->fx_addnumber = value;
252b5132 5978#else
94f592af
NC		 5979 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5980 fixP->fx_addnumber = 0;
252b5132
RH		 5981 else
5982 {
5983#ifdef TE_PE
94f592af 5984 fixP->fx_addnumber = 0;
252b5132
RH		 5985#else
5986 /* We want to use the offset within the data segment of the
5987 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5988 fixP->fx_addnumber =
5989 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5990#endif
5991 }
5992#endif
252b5132
RH		 5993}
5994
5995/* Generate a reloc for a fixup. */
5996
5997arelent *
5998tc_gen_reloc (seg, fixp)
92161534 5999 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6000 fixS *fixp;
6001{
6002 arelent *reloc;
6003
6004 reloc = (arelent *) xmalloc (sizeof (arelent));
6005
49309057
ILT		 6006 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6007 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6008 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6009 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6010 if (reloc->howto == (reloc_howto_type *) NULL)
6011 {
6012 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6013 _("reloc %d not supported by object file format"),
6014 (int) fixp->fx_r_type);
252b5132
RH		 6015 return NULL;
6016 }
6017 reloc->addend = fixp->fx_addnumber;
6018
6019 return reloc;
6020}
75e21f08
JJ		 6021
6022void
6023ppc_cfi_frame_initial_instructions ()
6024{
6025 cfi_add_CFA_def_cfa (1, 0);
6026}
6027
6028int
6029tc_ppc_regname_to_dw2regnum (const char *regname)
6030{
6031 unsigned int regnum = -1;
6032 unsigned int i;
6033 const char *p;
6034 char *q;
6035 static struct { char *name; int dw2regnum; } regnames[] =
6036 {
6037 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6038 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6039 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6040 { "spe_acc", 111 }, { "spefscr", 112 }
6041 };
6042
6043 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6044 if (strcmp (regnames[i].name, regname) == 0)
6045 return regnames[i].dw2regnum;
6046
6047 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6048 {
6049 p = regname + 1 + (regname[1] == '.');
6050 regnum = strtoul (p, &q, 10);
6051 if (p == q || *q || regnum >= 32)
6052 return -1;
6053 if (regname[0] == 'f')
b7d7dc63 6054 regnum += 32;
75e21f08 6055 else if (regname[0] == 'v')
b7d7dc63 6056 regnum += 77;
75e21f08
JJ		 6057 }
6058 else if (regname[0] == 'c' && regname[1] == 'r')
6059 {
6060 p = regname + 2 + (regname[2] == '.');
6061 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6062 return -1;
75e21f08
JJ		 6063 regnum = p[0] - '0' + 68;
6064 }
6065 return regnum;
6066}
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