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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH
22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH
33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH
53#endif
54#endif
55
0baf16f2
AM
56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM
69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM
72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM
76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM
79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM
81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM
83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH
89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM
95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM
99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH
101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH
134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f
NC
185
186/* '+' and '-' can be used as postfix predicate predictors for conditional
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ
189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH
192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH
229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM
235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH
237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM
263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH
265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM
270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH
273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH
287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C
291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH
295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH
315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH
343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH
366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH
368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH
399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH
401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH
407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH
494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C
517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH
519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C
525
526 { "v0", 0 },
81d4177b
KH
527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C
550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH
552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH
558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH
564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH
601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH
612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH
623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH
627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM
631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH
636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH
641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM
645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH
649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH
657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM
706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH
709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH
720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH
727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH
730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH
789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ
796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM
804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ
806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH
810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH
818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM
822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
909 /* -mcom means assemble for the common intersection between Power
910 and PowerPC. At present, we just allow the union, rather
911 than the intersection. */
912 else if (strcmp (arg, "com") == 0)
913 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
914 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
915 else if (strcmp (arg, "any") == 0)
916 ppc_cpu |= PPC_OPCODE_ANY;
917 else
918 return 0;
919
920 return 1;
921}
922
252b5132
RH
923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'u':
931 /* -u means that any undefined symbols should be treated as
932 external, which is the default for gas anyhow. */
933 break;
934
935#ifdef OBJ_ELF
936 case 'l':
937 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 938 sake, recognize -be also. */
252b5132
RH
939 if (strcmp (arg, "e") == 0)
940 {
941 target_big_endian = 0;
942 set_target_endian = 1;
943 }
944 else
945 return 0;
946
947 break;
948
949 case 'b':
950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 1;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'K':
99a814a1 961 /* Recognize -K PIC. */
252b5132
RH
962 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
963 {
964 shlib = SHLIB_PIC;
965 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
966 }
967 else
968 return 0;
969
970 break;
971#endif
972
7f6d05e8
CP
973 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
974 case 'a':
975 if (strcmp (arg, "64") == 0)
2a98c3a6
AM
976 {
977#ifdef BFD64
978 ppc_obj64 = 1;
979#else
980 as_fatal (_("%s unsupported"), "-a64");
981#endif
982 }
7f6d05e8 983 else if (strcmp (arg, "32") == 0)
2b3c4602 984 ppc_obj64 = 0;
7f6d05e8
CP
985 else
986 return 0;
987 break;
81d4177b 988
252b5132 989 case 'm':
69c040df
AM
990 if (parse_cpu (arg))
991 ;
252b5132
RH
992
993 else if (strcmp (arg, "regnames") == 0)
b34976b6 994 reg_names_p = TRUE;
252b5132
RH
995
996 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 997 reg_names_p = FALSE;
252b5132
RH
998
999#ifdef OBJ_ELF
99a814a1
AM
1000 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1001 that require relocation. */
252b5132
RH
1002 else if (strcmp (arg, "relocatable") == 0)
1003 {
5d6f4f16 1004 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
1005 ppc_flags |= EF_PPC_RELOCATABLE;
1006 }
1007
1008 else if (strcmp (arg, "relocatable-lib") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
1011 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1012 }
1013
99a814a1 1014 /* -memb, set embedded bit. */
252b5132
RH
1015 else if (strcmp (arg, "emb") == 0)
1016 ppc_flags |= EF_PPC_EMB;
1017
99a814a1
AM
1018 /* -mlittle/-mbig set the endianess. */
1019 else if (strcmp (arg, "little") == 0
1020 || strcmp (arg, "little-endian") == 0)
252b5132
RH
1021 {
1022 target_big_endian = 0;
1023 set_target_endian = 1;
1024 }
1025
1026 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1027 {
1028 target_big_endian = 1;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "solaris") == 0)
1033 {
b34976b6 1034 msolaris = TRUE;
252b5132
RH
1035 ppc_comment_chars = ppc_solaris_comment_chars;
1036 }
1037
1038 else if (strcmp (arg, "no-solaris") == 0)
1039 {
b34976b6 1040 msolaris = FALSE;
252b5132
RH
1041 ppc_comment_chars = ppc_eabi_comment_chars;
1042 }
1043#endif
1044 else
1045 {
1046 as_bad (_("invalid switch -m%s"), arg);
1047 return 0;
1048 }
1049 break;
1050
1051#ifdef OBJ_ELF
1052 /* -V: SVR4 argument to print version ID. */
1053 case 'V':
1054 print_version_id ();
1055 break;
1056
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 case 'Q':
1060 break;
1061
1062 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1063 rather than .stabs.excl, which is ignored by the linker.
1064 FIXME: Not implemented. */
1065 case 's':
1066 if (arg)
1067 return 0;
1068
1069 break;
1070#endif
1071
1072 default:
1073 return 0;
1074 }
1075
1076 return 1;
1077}
1078
1079void
1080md_show_usage (stream)
1081 FILE *stream;
1082{
bc805888 1083 fprintf (stream, _("\
252b5132 1084PowerPC options:\n\
df12615d
AM
1085-a32 generate ELF32/XCOFF32\n\
1086-a64 generate ELF64/XCOFF64\n\
252b5132 1087-u ignored\n\
23e1d84c
AM
1088-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1089-mpwr generate code for POWER (RIOS1)\n\
1090-m601 generate code for PowerPC 601\n\
418c1742 1091-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1092 generate code for PowerPC 603/604\n\
df12615d 1093-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1094-m440 generate code for PowerPC 440\n\
f5c120c5 1095-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM
1096 generate code For PowerPC 7400/7410/7450/7455\n"));
1097 fprintf (stream, _("\
23e1d84c 1098-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1099-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG
1100-mbooke64 generate code for 64-bit PowerPC BookE\n\
1101-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1102-mpower4 generate code for Power4 architecture\n\
252b5132 1103-mcom generate code Power/PowerPC common instructions\n\
df12615d 1104-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1105 fprintf (stream, _("\
df12615d 1106-maltivec generate code for AltiVec\n\
6a0c61b7 1107-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM
1108-mspe generate code for Motorola SPE instructions\n\
1109-mregnames Allow symbolic names for registers\n\
1110-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1111#ifdef OBJ_ELF
bc805888 1112 fprintf (stream, _("\
252b5132
RH
1113-mrelocatable support for GCC's -mrelocatble option\n\
1114-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1115-memb set PPC_EMB bit in ELF flags\n\
df12615d 1116-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1117 generate code for a little endian machine\n\
df12615d
AM
1118-mbig, -mbig-endian, -b, -be\n\
1119 generate code for a big endian machine\n\
252b5132
RH
1120-msolaris generate code for Solaris\n\
1121-mno-solaris do not generate code for Solaris\n\
1122-V print assembler version number\n\
1123-Qy, -Qn ignored\n"));
1124#endif
1125}
1126\f
1127/* Set ppc_cpu if it is not already set. */
1128
1129static void
1130ppc_set_cpu ()
1131{
1132 const char *default_os = TARGET_OS;
1133 const char *default_cpu = TARGET_CPU;
1134
3c9030c1 1135 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1136 {
2a98c3a6 1137 if (ppc_obj64)
3c9030c1 1138 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM
1139 else if (strncmp (default_os, "aix", 3) == 0
1140 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1141 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1142 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1144 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1146 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM
1147 {
1148 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1150 else
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1152 }
252b5132 1153 else
99a814a1
AM
1154 as_fatal (_("Unknown default cpu = %s, os = %s"),
1155 default_cpu, default_os);
252b5132
RH
1156 }
1157}
1158
1159/* Figure out the BFD architecture to use. */
1160
1161enum bfd_architecture
1162ppc_arch ()
1163{
1164 const char *default_cpu = TARGET_CPU;
1165 ppc_set_cpu ();
1166
1167 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1168 return bfd_arch_powerpc;
1169 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1170 return bfd_arch_rs6000;
1171 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1172 {
1173 if (strcmp (default_cpu, "rs6000") == 0)
1174 return bfd_arch_rs6000;
0baf16f2 1175 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH
1176 return bfd_arch_powerpc;
1177 }
1178
1179 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1180 return bfd_arch_unknown;
1181}
1182
7f6d05e8
CP
1183unsigned long
1184ppc_mach ()
1185{
2a98c3a6
AM
1186 if (ppc_obj64)
1187 return bfd_mach_ppc64;
1188 else if (ppc_arch () == bfd_arch_rs6000)
1189 return bfd_mach_rs6k;
1190 else
1191 return bfd_mach_ppc;
7f6d05e8
CP
1192}
1193
81d4177b 1194extern char*
99a814a1 1195ppc_target_format ()
7f6d05e8
CP
1196{
1197#ifdef OBJ_COFF
1198#ifdef TE_PE
99a814a1 1199 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1200#elif TE_POWERMAC
0baf16f2 1201 return "xcoff-powermac";
7f6d05e8 1202#else
eb1e0e80 1203# ifdef TE_AIX5
2b3c4602 1204 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1205# else
2b3c4602 1206 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1207# endif
7f6d05e8 1208#endif
7f6d05e8
CP
1209#endif
1210#ifdef OBJ_ELF
0baf16f2 1211 return (target_big_endian
2b3c4602
AM
1212 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1213 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP
1214#endif
1215}
1216
69c040df
AM
1217/* Insert opcodes and macros into hash tables. Called at startup and
1218 for .cpu pseudo. */
252b5132 1219
69c040df
AM
1220static void
1221ppc_setup_opcodes (void)
252b5132
RH
1222{
1223 register const struct powerpc_opcode *op;
1224 const struct powerpc_opcode *op_end;
1225 const struct powerpc_macro *macro;
1226 const struct powerpc_macro *macro_end;
b34976b6 1227 bfd_boolean dup_insn = FALSE;
252b5132 1228
69c040df
AM
1229 if (ppc_hash != NULL)
1230 hash_die (ppc_hash);
1231 if (ppc_macro_hash != NULL)
1232 hash_die (ppc_macro_hash);
252b5132
RH
1233
1234 /* Insert the opcodes into a hash table. */
1235 ppc_hash = hash_new ();
1236
1237 op_end = powerpc_opcodes + powerpc_num_opcodes;
1238 for (op = powerpc_opcodes; op < op_end; op++)
1239 {
1240 know ((op->opcode & op->mask) == op->opcode);
1241
2b3c4602 1242 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1243 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM
1244 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1245 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1246 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC
1247 /* Certain instructions (eg: extsw) do not exist in the
1248 32-bit BookE instruction set, but they do exist in the
1249 64-bit BookE instruction set, and other PPC instruction
1250 sets. Check to see if the opcode has the BOOKE64 flag set.
1251 If it does make sure that the target CPU is not the BookE32. */
1252 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1253 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1254 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM
1255 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1256 || ((op->flags & PPC_OPCODE_POWER4)
1257 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH
1258 {
1259 const char *retval;
1260
1261 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1262 if (retval != NULL)
252b5132 1263 {
99a814a1 1264 /* Ignore Power duplicates for -m601. */
252b5132
RH
1265 if ((ppc_cpu & PPC_OPCODE_601) != 0
1266 && (op->flags & PPC_OPCODE_POWER) != 0)
1267 continue;
1268
99a814a1
AM
1269 as_bad (_("Internal assembler error for instruction %s"),
1270 op->name);
b34976b6 1271 dup_insn = TRUE;
252b5132
RH
1272 }
1273 }
1274 }
1275
3c9030c1
AM
1276 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1277 for (op = powerpc_opcodes; op < op_end; op++)
1278 hash_insert (ppc_hash, op->name, (PTR) op);
1279
252b5132
RH
1280 /* Insert the macros into a hash table. */
1281 ppc_macro_hash = hash_new ();
1282
1283 macro_end = powerpc_macros + powerpc_num_macros;
1284 for (macro = powerpc_macros; macro < macro_end; macro++)
1285 {
1286 if ((macro->flags & ppc_cpu) != 0)
1287 {
1288 const char *retval;
1289
1290 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1291 if (retval != (const char *) NULL)
1292 {
1293 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1294 dup_insn = TRUE;
252b5132
RH
1295 }
1296 }
1297 }
1298
1299 if (dup_insn)
1300 abort ();
69c040df
AM
1301}
1302
1303/* This function is called when the assembler starts up. It is called
1304 after the options have been parsed and the output file has been
1305 opened. */
1306
1307void
1308md_begin ()
1309{
1310 ppc_set_cpu ();
1311
1312 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1313
1314#ifdef OBJ_ELF
1315 /* Set the ELF flags if desired. */
1316 if (ppc_flags && !msolaris)
1317 bfd_set_private_flags (stdoutput, ppc_flags);
1318#endif
1319
1320 ppc_setup_opcodes ();
252b5132 1321
67c1ffbe 1322 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1323 by the user. */
252b5132
RH
1324 if (!set_target_endian)
1325 {
1326 set_target_endian = 1;
1327 target_big_endian = PPC_BIG_ENDIAN;
1328 }
1329
1330#ifdef OBJ_XCOFF
1331 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1332
1333 /* Create dummy symbols to serve as initial csects. This forces the
1334 text csects to precede the data csects. These symbols will not
1335 be output. */
1336 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1337 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1338 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1339 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH
1340#endif
1341
1342#ifdef TE_PE
1343
1344 ppc_current_section = text_section;
81d4177b 1345 ppc_previous_section = 0;
252b5132
RH
1346
1347#endif
1348}
1349
6a0c61b7
EZ
1350void
1351ppc_cleanup ()
1352{
dc1d03fc 1353#ifdef OBJ_ELF
6a0c61b7
EZ
1354 if (ppc_apuinfo_list == NULL)
1355 return;
1356
1357 /* Ok, so write the section info out. We have this layout:
1358
1359 byte data what
1360 ---- ---- ----
1361 0 8 length of "APUinfo\0"
1362 4 (n*4) number of APU's (4 bytes each)
1363 8 2 note type 2
1364 12 "APUinfo\0" name
1365 20 APU#1 first APU's info
1366 24 APU#2 second APU's info
1367 ... ...
1368 */
1369 {
1370 char *p;
1371 asection *seg = now_seg;
1372 subsegT subseg = now_subseg;
1373 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1374 unsigned int i;
6a0c61b7
EZ
1375
1376 /* Create the .PPC.EMB.apuinfo section. */
1377 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1378 bfd_set_section_flags (stdoutput,
1379 apuinfo_secp,
e1a9cb8e 1380 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ
1381
1382 p = frag_more (4);
1383 md_number_to_chars (p, (valueT) 8, 4);
1384
1385 p = frag_more (4);
e98d298c 1386 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ
1387
1388 p = frag_more (4);
1389 md_number_to_chars (p, (valueT) 2, 4);
1390
1391 p = frag_more (8);
1392 strcpy (p, "APUinfo");
1393
1394 for (i = 0; i < ppc_apuinfo_num; i++)
1395 {
b34976b6
AM
1396 p = frag_more (4);
1397 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ
1398 }
1399
1400 frag_align (2, 0, 0);
1401
1402 /* We probably can't restore the current segment, for there likely
1403 isn't one yet... */
1404 if (seg && subseg)
1405 subseg_set (seg, subseg);
1406 }
dc1d03fc 1407#endif
6a0c61b7
EZ
1408}
1409
252b5132
RH
1410/* Insert an operand value into an instruction. */
1411
1412static unsigned long
1413ppc_insert_operand (insn, operand, val, file, line)
1414 unsigned long insn;
1415 const struct powerpc_operand *operand;
1416 offsetT val;
1417 char *file;
1418 unsigned int line;
1419{
1420 if (operand->bits != 32)
1421 {
1422 long min, max;
1423 offsetT test;
1424
1425 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1426 {
d0e9a01c 1427 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH
1428 max = (1 << operand->bits) - 1;
1429 else
1430 max = (1 << (operand->bits - 1)) - 1;
1431 min = - (1 << (operand->bits - 1));
1432
2b3c4602 1433 if (!ppc_obj64)
252b5132
RH
1434 {
1435 /* Some people write 32 bit hex constants with the sign
1436 extension done by hand. This shouldn't really be
1437 valid, but, to permit this code to assemble on a 64
1438 bit host, we sign extend the 32 bit value. */
1439 if (val > 0
92161534
ILT
1440 && (val & (offsetT) 0x80000000) != 0
1441 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH
1442 {
1443 val -= 0x80000000;
1444 val -= 0x80000000;
1445 }
1446 }
1447 }
1448 else
1449 {
1450 max = (1 << operand->bits) - 1;
1451 min = 0;
1452 }
1453
1454 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1455 test = - val;
1456 else
1457 test = val;
1458
1459 if (test < (offsetT) min || test > (offsetT) max)
1460 {
1461 const char *err =
1462 _("operand out of range (%s not between %ld and %ld)");
1463 char buf[100];
1464
1465 sprint_value (buf, test);
0baf16f2 1466 as_bad_where (file, line, err, buf, min, max);
252b5132
RH
1467 }
1468 }
1469
1470 if (operand->insert)
1471 {
1472 const char *errmsg;
1473
1474 errmsg = NULL;
2b3c4602 1475 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1476 if (errmsg != (const char *) NULL)
0baf16f2 1477 as_bad_where (file, line, errmsg);
252b5132
RH
1478 }
1479 else
1480 insn |= (((long) val & ((1 << operand->bits) - 1))
1481 << operand->shift);
1482
1483 return insn;
1484}
1485
1486\f
1487#ifdef OBJ_ELF
1488/* Parse @got, etc. and return the desired relocation. */
1489static bfd_reloc_code_real_type
1490ppc_elf_suffix (str_p, exp_p)
1491 char **str_p;
1492 expressionS *exp_p;
1493{
1494 struct map_bfd {
1495 char *string;
1496 int length;
15c1449b 1497 int reloc;
252b5132
RH
1498 };
1499
1500 char ident[20];
1501 char *str = *str_p;
1502 char *str2;
1503 int ch;
1504 int len;
15c1449b 1505 const struct map_bfd *ptr;
252b5132 1506
bc805888 1507#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1508
15c1449b 1509 static const struct map_bfd mapping[] = {
cdba85ec
AM
1510 MAP ("l", (int) BFD_RELOC_LO16),
1511 MAP ("h", (int) BFD_RELOC_HI16),
1512 MAP ("ha", (int) BFD_RELOC_HI16_S),
1513 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1514 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1515 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1516 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1517 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1518 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1519 MAP ("fixup", (int) BFD_RELOC_CTOR),
1520 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1521 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1522 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1523 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1524 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1525 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1526 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1527 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1528 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1529 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1530 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1531 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1532 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1533 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1534 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1535 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1536 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1537 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1538 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1539 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1540 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1541 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1542 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1543 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1544 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1545 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1546 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1547 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1548 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1549 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1550 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1551 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1552 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1553 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1554 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1555 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1556 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1557 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1558 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1559 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1560 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1561 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1562 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1563 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1564 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1565 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1566 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1567 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1568 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1569 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1570 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1571 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1572 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1573 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1574 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1575 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1576 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1577 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM
1578 /* The following are only valid for ppc64. Negative values are
1579 used instead of a flag. */
cdba85ec
AM
1580 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1581 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1582 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1583 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1584 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1585 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1586 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1587 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1588 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1589 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1590 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1591 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1592 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1593 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1594 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1595 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1596 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1597 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH
1598 };
1599
1600 if (*str++ != '@')
1601 return BFD_RELOC_UNUSED;
1602
1603 for (ch = *str, str2 = ident;
1604 (str2 < ident + sizeof (ident) - 1
3882b010 1605 && (ISALNUM (ch) || ch == '@'));
252b5132
RH
1606 ch = *++str)
1607 {
3882b010 1608 *str2++ = TOLOWER (ch);
252b5132
RH
1609 }
1610
1611 *str2 = '\0';
1612 len = str2 - ident;
1613
1614 ch = ident[0];
1615 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1616 if (ch == ptr->string[0]
1617 && len == ptr->length
1618 && memcmp (ident, ptr->string, ptr->length) == 0)
1619 {
15c1449b
AM
1620 int reloc = ptr->reloc;
1621
2b3c4602 1622 if (reloc < 0)
15c1449b 1623 {
2b3c4602 1624 if (!ppc_obj64)
15c1449b
AM
1625 return BFD_RELOC_UNUSED;
1626 reloc = -reloc;
1627 }
1628
cdba85ec 1629 if (!ppc_obj64)
5f6db75a
AM
1630 if (exp_p->X_add_number != 0
1631 && (reloc == (int) BFD_RELOC_16_GOTOFF
1632 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1633 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1634 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1635 as_warn (_("identifier+constant@got means identifier@got+constant"));
1636
1637 /* Now check for identifier@suffix+constant. */
1638 if (*str == '-' || *str == '+')
252b5132 1639 {
5f6db75a
AM
1640 char *orig_line = input_line_pointer;
1641 expressionS new_exp;
1642
1643 input_line_pointer = str;
1644 expression (&new_exp);
1645 if (new_exp.X_op == O_constant)
252b5132 1646 {
5f6db75a
AM
1647 exp_p->X_add_number += new_exp.X_add_number;
1648 str = input_line_pointer;
252b5132 1649 }
5f6db75a
AM
1650
1651 if (&input_line_pointer != str_p)
1652 input_line_pointer = orig_line;
252b5132 1653 }
252b5132 1654 *str_p = str;
0baf16f2 1655
2b3c4602 1656 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM
1657 && exp_p->X_op == O_symbol
1658 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1659 {
9f2b53d7
AM
1660 /* Change the symbol so that the dummy .TOC. symbol can be
1661 omitted from the object file. */
0baf16f2
AM
1662 exp_p->X_add_symbol = &abs_symbol;
1663 }
1664
15c1449b 1665 return (bfd_reloc_code_real_type) reloc;
252b5132
RH
1666 }
1667
1668 return BFD_RELOC_UNUSED;
1669}
1670
99a814a1
AM
1671/* Like normal .long/.short/.word, except support @got, etc.
1672 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH
1673static void
1674ppc_elf_cons (nbytes)
0baf16f2 1675 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH
1676{
1677 expressionS exp;
1678 bfd_reloc_code_real_type reloc;
1679
1680 if (is_it_end_of_statement ())
1681 {
1682 demand_empty_rest_of_line ();
1683 return;
1684 }
1685
1686 do
1687 {
1688 expression (&exp);
1689 if (exp.X_op == O_symbol
1690 && *input_line_pointer == '@'
99a814a1
AM
1691 && (reloc = ppc_elf_suffix (&input_line_pointer,
1692 &exp)) != BFD_RELOC_UNUSED)
252b5132 1693 {
99a814a1
AM
1694 reloc_howto_type *reloc_howto;
1695 int size;
1696
1697 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1698 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH
1699
1700 if (size > nbytes)
0baf16f2
AM
1701 {
1702 as_bad (_("%s relocations do not fit in %d bytes\n"),
1703 reloc_howto->name, nbytes);
1704 }
252b5132
RH
1705 else
1706 {
0baf16f2
AM
1707 char *p;
1708 int offset;
252b5132 1709
0baf16f2
AM
1710 p = frag_more (nbytes);
1711 offset = 0;
1712 if (target_big_endian)
1713 offset = nbytes - size;
99a814a1
AM
1714 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1715 &exp, 0, reloc);
252b5132
RH
1716 }
1717 }
1718 else
1719 emit_expr (&exp, (unsigned int) nbytes);
1720 }
1721 while (*input_line_pointer++ == ',');
1722
99a814a1
AM
1723 /* Put terminator back into stream. */
1724 input_line_pointer--;
252b5132
RH
1725 demand_empty_rest_of_line ();
1726}
1727
1728/* Solaris pseduo op to change to the .rodata section. */
1729static void
1730ppc_elf_rdata (xxx)
1731 int xxx;
1732{
1733 char *save_line = input_line_pointer;
1734 static char section[] = ".rodata\n";
1735
99a814a1 1736 /* Just pretend this is .section .rodata */
252b5132
RH
1737 input_line_pointer = section;
1738 obj_elf_section (xxx);
1739
1740 input_line_pointer = save_line;
1741}
1742
99a814a1 1743/* Pseudo op to make file scope bss items. */
252b5132 1744static void
99a814a1 1745ppc_elf_lcomm (xxx)
92161534 1746 int xxx ATTRIBUTE_UNUSED;
252b5132
RH
1747{
1748 register char *name;
1749 register char c;
1750 register char *p;
1751 offsetT size;
1752 register symbolS *symbolP;
1753 offsetT align;
1754 segT old_sec;
1755 int old_subsec;
1756 char *pfrag;
1757 int align2;
1758
1759 name = input_line_pointer;
1760 c = get_symbol_end ();
1761
99a814a1 1762 /* just after name is now '\0'. */
252b5132
RH
1763 p = input_line_pointer;
1764 *p = c;
1765 SKIP_WHITESPACE ();
1766 if (*input_line_pointer != ',')
1767 {
1768 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1769 ignore_rest_of_line ();
1770 return;
1771 }
1772
1773 input_line_pointer++; /* skip ',' */
1774 if ((size = get_absolute_expression ()) < 0)
1775 {
1776 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1777 ignore_rest_of_line ();
1778 return;
1779 }
1780
1781 /* The third argument to .lcomm is the alignment. */
1782 if (*input_line_pointer != ',')
1783 align = 8;
1784 else
1785 {
1786 ++input_line_pointer;
1787 align = get_absolute_expression ();
1788 if (align <= 0)
1789 {
1790 as_warn (_("ignoring bad alignment"));
1791 align = 8;
1792 }
1793 }
1794
1795 *p = 0;
1796 symbolP = symbol_find_or_make (name);
1797 *p = c;
1798
1799 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1800 {
1801 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1802 S_GET_NAME (symbolP));
1803 ignore_rest_of_line ();
1804 return;
1805 }
1806
1807 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1808 {
1809 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1810 S_GET_NAME (symbolP),
1811 (long) S_GET_VALUE (symbolP),
1812 (long) size);
1813
1814 ignore_rest_of_line ();
1815 return;
1816 }
1817
99a814a1 1818 /* Allocate_bss. */
252b5132
RH
1819 old_sec = now_seg;
1820 old_subsec = now_subseg;
1821 if (align)
1822 {
99a814a1 1823 /* Convert to a power of 2 alignment. */
252b5132
RH
1824 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1825 if (align != 1)
1826 {
1827 as_bad (_("Common alignment not a power of 2"));
1828 ignore_rest_of_line ();
1829 return;
1830 }
1831 }
1832 else
1833 align2 = 0;
1834
1835 record_alignment (bss_section, align2);
1836 subseg_set (bss_section, 0);
1837 if (align2)
1838 frag_align (align2, 0, 0);
1839 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT
1840 symbol_get_frag (symbolP)->fr_symbol = 0;
1841 symbol_set_frag (symbolP, frag_now);
252b5132
RH
1842 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1843 (char *) 0);
1844 *pfrag = 0;
1845 S_SET_SIZE (symbolP, size);
1846 S_SET_SEGMENT (symbolP, bss_section);
1847 subseg_set (old_sec, old_subsec);
1848 demand_empty_rest_of_line ();
1849}
1850
1851/* Validate any relocations emitted for -mrelocatable, possibly adding
1852 fixups for word relocations in writable segments, so we can adjust
1853 them at runtime. */
1854static void
1855ppc_elf_validate_fix (fixp, seg)
1856 fixS *fixp;
1857 segT seg;
1858{
1859 if (fixp->fx_done || fixp->fx_pcrel)
1860 return;
1861
1862 switch (shlib)
1863 {
1864 case SHLIB_NONE:
1865 case SHLIB_PIC:
1866 return;
1867
5d6f4f16 1868 case SHLIB_MRELOCATABLE:
252b5132
RH
1869 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1870 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1871 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1872 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1873 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1874 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH
1875 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1876 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1877 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1878 && (seg->flags & SEC_LOAD) != 0
252b5132
RH
1879 && strcmp (segment_name (seg), ".got2") != 0
1880 && strcmp (segment_name (seg), ".dtors") != 0
1881 && strcmp (segment_name (seg), ".ctors") != 0
1882 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH
1883 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1884 && strcmp (segment_name (seg), ".eh_frame") != 0
1885 && strcmp (segment_name (seg), ".ex_shared") != 0)
1886 {
1887 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1888 || fixp->fx_r_type != BFD_RELOC_CTOR)
1889 {
1890 as_bad_where (fixp->fx_file, fixp->fx_line,
1891 _("Relocation cannot be done when using -mrelocatable"));
1892 }
1893 }
1894 return;
1895 }
1896}
0baf16f2 1897
7e8d4ab4
AM
1898/* Prevent elf_frob_file_before_adjust removing a weak undefined
1899 function descriptor sym if the corresponding code sym is used. */
1900
1901void
1902ppc_frob_file_before_adjust ()
0baf16f2 1903{
7e8d4ab4 1904 symbolS *symp;
0baf16f2 1905
7e8d4ab4
AM
1906 if (!ppc_obj64)
1907 return;
1908
1909 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1910 {
7e8d4ab4
AM
1911 const char *name;
1912 char *dotname;
1913 symbolS *dotsym;
1914 size_t len;
1915
1916 name = S_GET_NAME (symp);
1917 if (name[0] == '.')
1918 continue;
1919
1920 if (! S_IS_WEAK (symp)
1921 || S_IS_DEFINED (symp))
1922 continue;
1923
1924 len = strlen (name) + 1;
1925 dotname = xmalloc (len + 1);
1926 dotname[0] = '.';
1927 memcpy (dotname + 1, name, len);
1928 dotsym = symbol_find (dotname);
1929 free (dotname);
1930 if (dotsym != NULL && (symbol_used_p (dotsym)
1931 || symbol_used_in_reloc_p (dotsym)))
1932 {
1933 symbol_mark_used (symp);
1934 }
0baf16f2
AM
1935 }
1936
7e8d4ab4
AM
1937 /* Don't emit .TOC. symbol. */
1938 symp = symbol_find (".TOC.");
1939 if (symp != NULL)
1940 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1941}
252b5132
RH
1942#endif /* OBJ_ELF */
1943\f
1944#ifdef TE_PE
1945
1946/*
99a814a1 1947 * Summary of parse_toc_entry.
252b5132
RH
1948 *
1949 * in: Input_line_pointer points to the '[' in one of:
1950 *
1951 * [toc] [tocv] [toc32] [toc64]
1952 *
1953 * Anything else is an error of one kind or another.
1954 *
81d4177b 1955 * out:
252b5132
RH
1956 * return value: success or failure
1957 * toc_kind: kind of toc reference
1958 * input_line_pointer:
1959 * success: first char after the ']'
1960 * failure: unchanged
1961 *
1962 * settings:
1963 *
1964 * [toc] - rv == success, toc_kind = default_toc
1965 * [tocv] - rv == success, toc_kind = data_in_toc
1966 * [toc32] - rv == success, toc_kind = must_be_32
1967 * [toc64] - rv == success, toc_kind = must_be_64
1968 *
1969 */
1970
81d4177b
KH
1971enum toc_size_qualifier
1972{
252b5132
RH
1973 default_toc, /* The toc cell constructed should be the system default size */
1974 data_in_toc, /* This is a direct reference to a toc cell */
1975 must_be_32, /* The toc cell constructed must be 32 bits wide */
1976 must_be_64 /* The toc cell constructed must be 64 bits wide */
1977};
1978
1979static int
99a814a1 1980parse_toc_entry (toc_kind)
252b5132
RH
1981 enum toc_size_qualifier *toc_kind;
1982{
1983 char *start;
1984 char *toc_spec;
1985 char c;
1986 enum toc_size_qualifier t;
1987
99a814a1 1988 /* Save the input_line_pointer. */
252b5132
RH
1989 start = input_line_pointer;
1990
99a814a1 1991 /* Skip over the '[' , and whitespace. */
252b5132
RH
1992 ++input_line_pointer;
1993 SKIP_WHITESPACE ();
81d4177b 1994
99a814a1 1995 /* Find the spelling of the operand. */
252b5132
RH
1996 toc_spec = input_line_pointer;
1997 c = get_symbol_end ();
1998
99a814a1 1999 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH
2000 {
2001 t = default_toc;
2002 }
99a814a1 2003 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH
2004 {
2005 t = data_in_toc;
2006 }
99a814a1 2007 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH
2008 {
2009 t = must_be_32;
2010 }
99a814a1 2011 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH
2012 {
2013 t = must_be_64;
2014 }
2015 else
2016 {
2017 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM
2018 *input_line_pointer = c;
2019 input_line_pointer = start;
252b5132
RH
2020 return 0;
2021 }
2022
99a814a1
AM
2023 /* Now find the ']'. */
2024 *input_line_pointer = c;
252b5132 2025
81d4177b
KH
2026 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2027 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH
2028
2029 if (c != ']')
2030 {
2031 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2032 input_line_pointer = start;
252b5132
RH
2033 return 0;
2034 }
2035
99a814a1 2036 *toc_kind = t;
252b5132
RH
2037 return 1;
2038}
2039#endif
2040\f
2041
dc1d03fc 2042#ifdef OBJ_ELF
6a0c61b7
EZ
2043#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2044static void
dc1d03fc 2045ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ
2046 unsigned int apu, version;
2047{
2048 unsigned int i;
2049
2050 /* Check we don't already exist. */
2051 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2052 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2053 return;
b34976b6 2054
6a0c61b7
EZ
2055 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2056 {
2057 if (ppc_apuinfo_num_alloc == 0)
2058 {
2059 ppc_apuinfo_num_alloc = 4;
2060 ppc_apuinfo_list = (unsigned long *)
2061 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2062 }
2063 else
2064 {
2065 ppc_apuinfo_num_alloc += 4;
2066 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2067 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2068 }
2069 }
dc1d03fc 2070 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ
2071}
2072#undef APUID
dc1d03fc 2073#endif
6a0c61b7
EZ
2074\f
2075
252b5132
RH
2076/* We need to keep a list of fixups. We can't simply generate them as
2077 we go, because that would require us to first create the frag, and
2078 that would screw up references to ``.''. */
2079
2080struct ppc_fixup
2081{
2082 expressionS exp;
2083 int opindex;
2084 bfd_reloc_code_real_type reloc;
2085};
2086
2087#define MAX_INSN_FIXUPS (5)
2088
2089/* This routine is called for each instruction to be assembled. */
2090
2091void
2092md_assemble (str)
2093 char *str;
2094{
2095 char *s;
2096 const struct powerpc_opcode *opcode;
2097 unsigned long insn;
2098 const unsigned char *opindex_ptr;
2099 int skip_optional;
2100 int need_paren;
2101 int next_opindex;
2102 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2103 int fc;
2104 char *f;
2105 int i;
2106#ifdef OBJ_ELF
2107 bfd_reloc_code_real_type reloc;
2108#endif
2109
2110 /* Get the opcode. */
3882b010 2111 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH
2112 ;
2113 if (*s != '\0')
2114 *s++ = '\0';
2115
2116 /* Look up the opcode in the hash table. */
2117 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2118 if (opcode == (const struct powerpc_opcode *) NULL)
2119 {
2120 const struct powerpc_macro *macro;
2121
2122 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2123 if (macro == (const struct powerpc_macro *) NULL)
2124 as_bad (_("Unrecognized opcode: `%s'"), str);
2125 else
2126 ppc_macro (s, macro);
2127
2128 return;
2129 }
2130
2131 insn = opcode->opcode;
2132
2133 str = s;
3882b010 2134 while (ISSPACE (*str))
252b5132
RH
2135 ++str;
2136
2137 /* PowerPC operands are just expressions. The only real issue is
2138 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW
2139 an optional operand separate the operands only with commas (in some
2140 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2141 have optional operands). Most instructions with optional operands
2142 have only one. Those that have more than one optional operand can
2143 take either all their operands or none. So, before we start seriously
2144 parsing the operands, we check to see if we have optional operands,
2145 and if we do, we count the number of commas to see which operands
2146 have been omitted. */
252b5132
RH
2147 skip_optional = 0;
2148 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2149 {
2150 const struct powerpc_operand *operand;
2151
2152 operand = &powerpc_operands[*opindex_ptr];
2153 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2154 {
2155 unsigned int opcount;
7fe9cf6b
NC
2156 unsigned int num_operands_expected;
2157 unsigned int i;
252b5132
RH
2158
2159 /* There is an optional operand. Count the number of
2160 commas in the input line. */
2161 if (*str == '\0')
2162 opcount = 0;
2163 else
2164 {
2165 opcount = 1;
2166 s = str;
2167 while ((s = strchr (s, ',')) != (char *) NULL)
2168 {
2169 ++opcount;
2170 ++s;
2171 }
2172 }
2173
7fe9cf6b
NC
2174 /* Compute the number of expected operands.
2175 Do not count fake operands. */
2176 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2177 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2178 ++ num_operands_expected;
2179
252b5132
RH
2180 /* If there are fewer operands in the line then are called
2181 for by the instruction, we want to skip the optional
1f6c9eb0 2182 operands. */
7fe9cf6b 2183 if (opcount < num_operands_expected)
252b5132
RH
2184 skip_optional = 1;
2185
2186 break;
2187 }
2188 }
2189
2190 /* Gather the operands. */
2191 need_paren = 0;
2192 next_opindex = 0;
2193 fc = 0;
2194 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2195 {
2196 const struct powerpc_operand *operand;
2197 const char *errmsg;
2198 char *hold;
2199 expressionS ex;
2200 char endc;
2201
2202 if (next_opindex == 0)
2203 operand = &powerpc_operands[*opindex_ptr];
2204 else
2205 {
2206 operand = &powerpc_operands[next_opindex];
2207 next_opindex = 0;
2208 }
252b5132
RH
2209 errmsg = NULL;
2210
2211 /* If this is a fake operand, then we do not expect anything
2212 from the input. */
2213 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2214 {
2b3c4602 2215 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2216 if (errmsg != (const char *) NULL)
2217 as_bad (errmsg);
2218 continue;
2219 }
2220
2221 /* If this is an optional operand, and we are skipping it, just
2222 insert a zero. */
2223 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2224 && skip_optional)
2225 {
2226 if (operand->insert)
2227 {
2b3c4602 2228 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2229 if (errmsg != (const char *) NULL)
2230 as_bad (errmsg);
2231 }
2232 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2233 next_opindex = *opindex_ptr + 1;
2234 continue;
2235 }
2236
2237 /* Gather the operand. */
2238 hold = input_line_pointer;
2239 input_line_pointer = str;
2240
2241#ifdef TE_PE
81d4177b 2242 if (*input_line_pointer == '[')
252b5132
RH
2243 {
2244 /* We are expecting something like the second argument here:
99a814a1
AM
2245 *
2246 * lwz r4,[toc].GS.0.static_int(rtoc)
2247 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2248 * The argument following the `]' must be a symbol name, and the
2249 * register must be the toc register: 'rtoc' or '2'
2250 *
2251 * The effect is to 0 as the displacement field
2252 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2253 * the appropriate variation) reloc against it based on the symbol.
2254 * The linker will build the toc, and insert the resolved toc offset.
2255 *
2256 * Note:
2257 * o The size of the toc entry is currently assumed to be
2258 * 32 bits. This should not be assumed to be a hard coded
2259 * number.
2260 * o In an effort to cope with a change from 32 to 64 bits,
2261 * there are also toc entries that are specified to be
2262 * either 32 or 64 bits:
2263 * lwz r4,[toc32].GS.0.static_int(rtoc)
2264 * lwz r4,[toc64].GS.0.static_int(rtoc)
2265 * These demand toc entries of the specified size, and the
2266 * instruction probably requires it.
2267 */
252b5132
RH
2268
2269 int valid_toc;
2270 enum toc_size_qualifier toc_kind;
2271 bfd_reloc_code_real_type toc_reloc;
2272
99a814a1
AM
2273 /* Go parse off the [tocXX] part. */
2274 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2275
81d4177b 2276 if (!valid_toc)
252b5132 2277 {
99a814a1
AM
2278 /* Note: message has already been issued.
2279 FIXME: what sort of recovery should we do?
2280 demand_rest_of_line (); return; ? */
252b5132
RH
2281 }
2282
99a814a1
AM
2283 /* Now get the symbol following the ']'. */
2284 expression (&ex);
252b5132
RH
2285
2286 switch (toc_kind)
2287 {
2288 case default_toc:
99a814a1
AM
2289 /* In this case, we may not have seen the symbol yet,
2290 since it is allowed to appear on a .extern or .globl
2291 or just be a label in the .data section. */
252b5132
RH
2292 toc_reloc = BFD_RELOC_PPC_TOC16;
2293 break;
2294 case data_in_toc:
99a814a1
AM
2295 /* 1. The symbol must be defined and either in the toc
2296 section, or a global.
2297 2. The reloc generated must have the TOCDEFN flag set
2298 in upper bit mess of the reloc type.
2299 FIXME: It's a little confusing what the tocv
2300 qualifier can be used for. At the very least, I've
2301 seen three uses, only one of which I'm sure I can
2302 explain. */
81d4177b
KH
2303 if (ex.X_op == O_symbol)
2304 {
252b5132 2305 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT
2306 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2307 != tocdata_section)
252b5132 2308 {
99a814a1 2309 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH
2310 }
2311 }
2312
2313 toc_reloc = BFD_RELOC_PPC_TOC16;
2314 break;
2315 case must_be_32:
99a814a1
AM
2316 /* FIXME: these next two specifically specify 32/64 bit
2317 toc entries. We don't support them today. Is this
2318 the right way to say that? */
252b5132
RH
2319 toc_reloc = BFD_RELOC_UNUSED;
2320 as_bad (_("Unimplemented toc32 expression modifier"));
2321 break;
2322 case must_be_64:
99a814a1 2323 /* FIXME: see above. */
252b5132
RH
2324 toc_reloc = BFD_RELOC_UNUSED;
2325 as_bad (_("Unimplemented toc64 expression modifier"));
2326 break;
2327 default:
bc805888 2328 fprintf (stderr,
99a814a1
AM
2329 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2330 toc_kind);
bc805888 2331 abort ();
252b5132
RH
2332 break;
2333 }
2334
2335 /* We need to generate a fixup for this expression. */
2336 if (fc >= MAX_INSN_FIXUPS)
2337 as_fatal (_("too many fixups"));
2338
2339 fixups[fc].reloc = toc_reloc;
2340 fixups[fc].exp = ex;
2341 fixups[fc].opindex = *opindex_ptr;
2342 ++fc;
2343
99a814a1
AM
2344 /* Ok. We've set up the fixup for the instruction. Now make it
2345 look like the constant 0 was found here. */
252b5132
RH
2346 ex.X_unsigned = 1;
2347 ex.X_op = O_constant;
2348 ex.X_add_number = 0;
2349 ex.X_add_symbol = NULL;
2350 ex.X_op_symbol = NULL;
2351 }
2352
2353 else
2354#endif /* TE_PE */
2355 {
2356 if (! register_name (&ex))
2357 {
2358 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2359 cr_operand = TRUE;
252b5132 2360 expression (&ex);
b34976b6 2361 cr_operand = FALSE;
252b5132
RH
2362 }
2363 }
2364
2365 str = input_line_pointer;
2366 input_line_pointer = hold;
2367
2368 if (ex.X_op == O_illegal)
2369 as_bad (_("illegal operand"));
2370 else if (ex.X_op == O_absent)
2371 as_bad (_("missing operand"));
2372 else if (ex.X_op == O_register)
2373 {
2374 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2375 (char *) NULL, 0);
2376 }
2377 else if (ex.X_op == O_constant)
2378 {
2379#ifdef OBJ_ELF
81d4177b 2380 /* Allow @HA, @L, @H on constants. */
252b5132
RH
2381 char *orig_str = str;
2382
2383 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2384 switch (reloc)
2385 {
2386 default:
2387 str = orig_str;
2388 break;
2389
2390 case BFD_RELOC_LO16:
2391 /* X_unsigned is the default, so if the user has done
0baf16f2
AM
2392 something which cleared it, we always produce a
2393 signed value. */
2394 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH
2395 ex.X_add_number &= 0xffff;
2396 else
0baf16f2 2397 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH
2398 break;
2399
2400 case BFD_RELOC_HI16:
0baf16f2
AM
2401 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2402 ex.X_add_number = PPC_HI (ex.X_add_number);
2403 else
2404 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH
2405 break;
2406
2407 case BFD_RELOC_HI16_S:
0baf16f2
AM
2408 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2409 ex.X_add_number = PPC_HA (ex.X_add_number);
2410 else
2411 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2412 break;
2413
0baf16f2
AM
2414 case BFD_RELOC_PPC64_HIGHER:
2415 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2416 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2417 else
2418 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2419 break;
2420
2421 case BFD_RELOC_PPC64_HIGHER_S:
2422 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2423 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2424 else
2425 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2426 break;
0baf16f2
AM
2427
2428 case BFD_RELOC_PPC64_HIGHEST:
2429 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2430 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2431 else
2432 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2433 break;
2434
2435 case BFD_RELOC_PPC64_HIGHEST_S:
2436 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2437 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2438 else
2439 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2440 break;
252b5132 2441 }
0baf16f2 2442#endif /* OBJ_ELF */
252b5132
RH
2443 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2444 (char *) NULL, 0);
2445 }
2446#ifdef OBJ_ELF
2447 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2448 {
cdba85ec
AM
2449 /* Some TLS tweaks. */
2450 switch (reloc)
2451 {
2452 default:
2453 break;
2454 case BFD_RELOC_PPC_TLS:
2455 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2456 (char *) NULL, 0);
2457 break;
2458 /* We'll only use the 32 (or 64) bit form of these relocations
2459 in constants. Instructions get the 16 bit form. */
2460 case BFD_RELOC_PPC_DTPREL:
2461 reloc = BFD_RELOC_PPC_DTPREL16;
2462 break;
2463 case BFD_RELOC_PPC_TPREL:
2464 reloc = BFD_RELOC_PPC_TPREL16;
2465 break;
2466 }
2467
99a814a1
AM
2468 /* For the absolute forms of branches, convert the PC
2469 relative form back into the absolute. */
252b5132
RH
2470 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2471 {
2472 switch (reloc)
2473 {
2474 case BFD_RELOC_PPC_B26:
2475 reloc = BFD_RELOC_PPC_BA26;
2476 break;
2477 case BFD_RELOC_PPC_B16:
2478 reloc = BFD_RELOC_PPC_BA16;
2479 break;
2480 case BFD_RELOC_PPC_B16_BRTAKEN:
2481 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2482 break;
2483 case BFD_RELOC_PPC_B16_BRNTAKEN:
2484 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2485 break;
2486 default:
2487 break;
2488 }
2489 }
2490
2b3c4602 2491 if (ppc_obj64
adadcc0c 2492 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM
2493 {
2494 switch (reloc)
2495 {
2496 case BFD_RELOC_16:
2497 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2498 break;
2499 case BFD_RELOC_LO16:
2500 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2501 break;
2502 case BFD_RELOC_16_GOTOFF:
2503 reloc = BFD_RELOC_PPC64_GOT16_DS;
2504 break;
2505 case BFD_RELOC_LO16_GOTOFF:
2506 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2507 break;
2508 case BFD_RELOC_LO16_PLTOFF:
2509 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2510 break;
1cfc59d5 2511 case BFD_RELOC_16_BASEREL:
0baf16f2
AM
2512 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2513 break;
2514 case BFD_RELOC_LO16_BASEREL:
2515 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2516 break;
2517 case BFD_RELOC_PPC_TOC16:
2518 reloc = BFD_RELOC_PPC64_TOC16_DS;
2519 break;
2520 case BFD_RELOC_PPC64_TOC16_LO:
2521 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2522 break;
2523 case BFD_RELOC_PPC64_PLTGOT16:
2524 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2525 break;
2526 case BFD_RELOC_PPC64_PLTGOT16_LO:
2527 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2528 break;
cdba85ec
AM
2529 case BFD_RELOC_PPC_DTPREL16:
2530 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2531 break;
2532 case BFD_RELOC_PPC_DTPREL16_LO:
2533 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2534 break;
2535 case BFD_RELOC_PPC_TPREL16:
2536 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2537 break;
2538 case BFD_RELOC_PPC_TPREL16_LO:
2539 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2540 break;
2541 case BFD_RELOC_PPC_GOT_DTPREL16:
2542 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2543 case BFD_RELOC_PPC_GOT_TPREL16:
2544 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2545 break;
0baf16f2
AM
2546 default:
2547 as_bad (_("unsupported relocation for DS offset field"));
2548 break;
2549 }
2550 }
2551
252b5132
RH
2552 /* We need to generate a fixup for this expression. */
2553 if (fc >= MAX_INSN_FIXUPS)
2554 as_fatal (_("too many fixups"));
2555 fixups[fc].exp = ex;
2556 fixups[fc].opindex = 0;
2557 fixups[fc].reloc = reloc;
2558 ++fc;
2559 }
2560#endif /* OBJ_ELF */
2561
2562 else
2563 {
2564 /* We need to generate a fixup for this expression. */
2565 if (fc >= MAX_INSN_FIXUPS)
2566 as_fatal (_("too many fixups"));
2567 fixups[fc].exp = ex;
2568 fixups[fc].opindex = *opindex_ptr;
2569 fixups[fc].reloc = BFD_RELOC_UNUSED;
2570 ++fc;
2571 }
2572
2573 if (need_paren)
2574 {
2575 endc = ')';
2576 need_paren = 0;
2577 }
2578 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2579 {
2580 endc = '(';
2581 need_paren = 1;
2582 }
2583 else
2584 endc = ',';
2585
2586 /* The call to expression should have advanced str past any
2587 whitespace. */
2588 if (*str != endc
2589 && (endc != ',' || *str != '\0'))
2590 {
2591 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2592 break;
2593 }
2594
2595 if (*str != '\0')
2596 ++str;
2597 }
2598
3882b010 2599 while (ISSPACE (*str))
252b5132
RH
2600 ++str;
2601
2602 if (*str != '\0')
2603 as_bad (_("junk at end of line: `%s'"), str);
2604
dc1d03fc 2605#ifdef OBJ_ELF
6a0c61b7
EZ
2606 /* Do we need/want a APUinfo section? */
2607 if (ppc_cpu & (PPC_OPCODE_SPE
2608 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2609 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2610 | PPC_OPCODE_RFMCI))
2611 {
2612 /* These are all version "1". */
2613 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2614 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2615 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2616 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2617 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2618 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2619 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2620 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2621 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2622 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2623 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2624 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2625 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2626 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2627 }
dc1d03fc 2628#endif
6a0c61b7 2629
252b5132
RH
2630 /* Write out the instruction. */
2631 f = frag_more (4);
2632 md_number_to_chars (f, insn, 4);
2633
5d6f4f16
GK
2634#ifdef OBJ_ELF
2635 dwarf2_emit_insn (4);
2636#endif
2637
252b5132
RH
2638 /* Create any fixups. At this point we do not use a
2639 bfd_reloc_code_real_type, but instead just use the
2640 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2641 handle fixups for any operand type, although that is admittedly
2642 not a very exciting feature. We pick a BFD reloc type in
94f592af 2643 md_apply_fix3. */
252b5132
RH
2644 for (i = 0; i < fc; i++)
2645 {
2646 const struct powerpc_operand *operand;
2647
2648 operand = &powerpc_operands[fixups[i].opindex];
2649 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2650 {
99a814a1 2651 reloc_howto_type *reloc_howto;
252b5132
RH
2652 int size;
2653 int offset;
2654 fixS *fixP;
2655
99a814a1 2656 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH
2657 if (!reloc_howto)
2658 abort ();
2659
2660 size = bfd_get_reloc_size (reloc_howto);
2661 offset = target_big_endian ? (4 - size) : 0;
2662
2663 if (size < 1 || size > 4)
bc805888 2664 abort ();
252b5132 2665
99a814a1
AM
2666 fixP = fix_new_exp (frag_now,
2667 f - frag_now->fr_literal + offset,
2668 size,
2669 &fixups[i].exp,
2670 reloc_howto->pc_relative,
252b5132
RH
2671 fixups[i].reloc);
2672
2673 /* Turn off complaints that the addend is too large for things like
2674 foo+100000@ha. */
2675 switch (fixups[i].reloc)
2676 {
2677 case BFD_RELOC_16_GOTOFF:
2678 case BFD_RELOC_PPC_TOC16:
2679 case BFD_RELOC_LO16:
2680 case BFD_RELOC_HI16:
2681 case BFD_RELOC_HI16_S:
0baf16f2 2682#ifdef OBJ_ELF
0baf16f2
AM
2683 case BFD_RELOC_PPC64_HIGHER:
2684 case BFD_RELOC_PPC64_HIGHER_S:
2685 case BFD_RELOC_PPC64_HIGHEST:
2686 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2687#endif
252b5132
RH
2688 fixP->fx_no_overflow = 1;
2689 break;
2690 default:
2691 break;
2692 }
2693 }
2694 else
99a814a1
AM
2695 fix_new_exp (frag_now,
2696 f - frag_now->fr_literal,
2697 4,
252b5132
RH
2698 &fixups[i].exp,
2699 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2700 ((bfd_reloc_code_real_type)
99a814a1 2701 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH
2702 }
2703}
2704
2705/* Handle a macro. Gather all the operands, transform them as
2706 described by the macro, and call md_assemble recursively. All the
2707 operands are separated by commas; we don't accept parentheses
2708 around operands here. */
2709
2710static void
2711ppc_macro (str, macro)
2712 char *str;
2713 const struct powerpc_macro *macro;
2714{
2715 char *operands[10];
2716 unsigned int count;
2717 char *s;
2718 unsigned int len;
2719 const char *format;
2720 int arg;
2721 char *send;
2722 char *complete;
2723
2724 /* Gather the users operands into the operands array. */
2725 count = 0;
2726 s = str;
2727 while (1)
2728 {
2729 if (count >= sizeof operands / sizeof operands[0])
2730 break;
2731 operands[count++] = s;
2732 s = strchr (s, ',');
2733 if (s == (char *) NULL)
2734 break;
2735 *s++ = '\0';
81d4177b 2736 }
252b5132
RH
2737
2738 if (count != macro->operands)
2739 {
2740 as_bad (_("wrong number of operands"));
2741 return;
2742 }
2743
2744 /* Work out how large the string must be (the size is unbounded
2745 because it includes user input). */
2746 len = 0;
2747 format = macro->format;
2748 while (*format != '\0')
2749 {
2750 if (*format != '%')
2751 {
2752 ++len;
2753 ++format;
2754 }
2755 else
2756 {
2757 arg = strtol (format + 1, &send, 10);
2758 know (send != format && arg >= 0 && arg < count);
2759 len += strlen (operands[arg]);
2760 format = send;
2761 }
2762 }
2763
2764 /* Put the string together. */
2765 complete = s = (char *) alloca (len + 1);
2766 format = macro->format;
2767 while (*format != '\0')
2768 {
2769 if (*format != '%')
2770 *s++ = *format++;
2771 else
2772 {
2773 arg = strtol (format + 1, &send, 10);
2774 strcpy (s, operands[arg]);
2775 s += strlen (s);
2776 format = send;
2777 }
2778 }
2779 *s = '\0';
2780
2781 /* Assemble the constructed instruction. */
2782 md_assemble (complete);
81d4177b 2783}
252b5132
RH
2784\f
2785#ifdef OBJ_ELF
99a814a1 2786/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH
2787
2788int
2789ppc_section_letter (letter, ptr_msg)
2790 int letter;
2791 char **ptr_msg;
2792{
2793 if (letter == 'e')
2794 return SHF_EXCLUDE;
2795
13ae64f3 2796 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2797 return -1;
252b5132
RH
2798}
2799
2800int
9de8d8f1
RH
2801ppc_section_word (str, len)
2802 char *str;
2803 size_t len;
252b5132 2804{
9de8d8f1
RH
2805 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2806 return SHF_EXCLUDE;
252b5132 2807
9de8d8f1 2808 return -1;
252b5132
RH
2809}
2810
2811int
9de8d8f1
RH
2812ppc_section_type (str, len)
2813 char *str;
2814 size_t len;
252b5132 2815{
9de8d8f1
RH
2816 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2817 return SHT_ORDERED;
252b5132 2818
9de8d8f1 2819 return -1;
252b5132
RH
2820}
2821
2822int
2823ppc_section_flags (flags, attr, type)
2824 int flags;
2825 int attr;
2826 int type;
2827{
2828 if (type == SHT_ORDERED)
2829 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2830
2831 if (attr & SHF_EXCLUDE)
2832 flags |= SEC_EXCLUDE;
2833
2834 return flags;
2835}
2836#endif /* OBJ_ELF */
2837
2838\f
2839/* Pseudo-op handling. */
2840
2841/* The .byte pseudo-op. This is similar to the normal .byte
2842 pseudo-op, but it can also take a single ASCII string. */
2843
2844static void
2845ppc_byte (ignore)
92161534 2846 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
2847{
2848 if (*input_line_pointer != '\"')
2849 {
2850 cons (1);
2851 return;
2852 }
2853
2854 /* Gather characters. A real double quote is doubled. Unusual
2855 characters are not permitted. */
2856 ++input_line_pointer;
2857 while (1)
2858 {
2859 char c;
2860
2861 c = *input_line_pointer++;
2862
2863 if (c == '\"')
2864 {
2865 if (*input_line_pointer != '\"')
2866 break;
2867 ++input_line_pointer;
2868 }
2869
2870 FRAG_APPEND_1_CHAR (c);
2871 }
2872
2873 demand_empty_rest_of_line ();
2874}
2875\f
2876#ifdef OBJ_XCOFF
2877
2878/* XCOFF specific pseudo-op handling. */
2879
2880/* This is set if we are creating a .stabx symbol, since we don't want
2881 to handle symbol suffixes for such symbols. */
b34976b6 2882static bfd_boolean ppc_stab_symbol;
252b5132
RH
2883
2884/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2885 symbols in the .bss segment as though they were local common
67c1ffbe 2886 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2887 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH
2888
2889static void
2890ppc_comm (lcomm)
2891 int lcomm;
2892{
2893 asection *current_seg = now_seg;
2894 subsegT current_subseg = now_subseg;
2895 char *name;
2896 char endc;
2897 char *end_name;
2898 offsetT size;
2899 offsetT align;
2900 symbolS *lcomm_sym = NULL;
2901 symbolS *sym;
2902 char *pfrag;
2903
2904 name = input_line_pointer;
2905 endc = get_symbol_end ();
2906 end_name = input_line_pointer;
2907 *end_name = endc;
2908
2909 if (*input_line_pointer != ',')
2910 {
2911 as_bad (_("missing size"));
2912 ignore_rest_of_line ();
2913 return;
2914 }
2915 ++input_line_pointer;
2916
2917 size = get_absolute_expression ();
2918 if (size < 0)
2919 {
2920 as_bad (_("negative size"));
2921 ignore_rest_of_line ();
2922 return;
2923 }
2924
2925 if (! lcomm)
2926 {
2927 /* The third argument to .comm is the alignment. */
2928 if (*input_line_pointer != ',')
1ad63b2f 2929 align = 2;
252b5132
RH
2930 else
2931 {
2932 ++input_line_pointer;
2933 align = get_absolute_expression ();
2934 if (align <= 0)
2935 {
2936 as_warn (_("ignoring bad alignment"));
1ad63b2f 2937 align = 2;
252b5132
RH
2938 }
2939 }
2940 }
2941 else
2942 {
2943 char *lcomm_name;
2944 char lcomm_endc;
2945
1ad63b2f 2946 if (size <= 4)
252b5132
RH
2947 align = 2;
2948 else
2949 align = 3;
2950
2951 /* The third argument to .lcomm appears to be the real local
2952 common symbol to create. References to the symbol named in
2953 the first argument are turned into references to the third
2954 argument. */
2955 if (*input_line_pointer != ',')
2956 {
2957 as_bad (_("missing real symbol name"));
2958 ignore_rest_of_line ();
2959 return;
2960 }
2961 ++input_line_pointer;
2962
2963 lcomm_name = input_line_pointer;
2964 lcomm_endc = get_symbol_end ();
81d4177b 2965
252b5132
RH
2966 lcomm_sym = symbol_find_or_make (lcomm_name);
2967
2968 *input_line_pointer = lcomm_endc;
2969 }
2970
2971 *end_name = '\0';
2972 sym = symbol_find_or_make (name);
2973 *end_name = endc;
2974
2975 if (S_IS_DEFINED (sym)
2976 || S_GET_VALUE (sym) != 0)
2977 {
2978 as_bad (_("attempt to redefine symbol"));
2979 ignore_rest_of_line ();
2980 return;
2981 }
81d4177b 2982
252b5132 2983 record_alignment (bss_section, align);
81d4177b 2984
252b5132
RH
2985 if (! lcomm
2986 || ! S_IS_DEFINED (lcomm_sym))
2987 {
2988 symbolS *def_sym;
2989 offsetT def_size;
2990
2991 if (! lcomm)
2992 {
2993 def_sym = sym;
2994 def_size = size;
2995 S_SET_EXTERNAL (sym);
2996 }
2997 else
2998 {
809ffe0d 2999 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH
3000 def_sym = lcomm_sym;
3001 def_size = 0;
3002 }
3003
3004 subseg_set (bss_section, 1);
3005 frag_align (align, 0, 0);
81d4177b 3006
809ffe0d 3007 symbol_set_frag (def_sym, frag_now);
252b5132
RH
3008 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3009 def_size, (char *) NULL);
3010 *pfrag = 0;
3011 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3012 symbol_get_tc (def_sym)->align = align;
252b5132
RH
3013 }
3014 else if (lcomm)
3015 {
3016 /* Align the size of lcomm_sym. */
809ffe0d
ILT
3017 symbol_get_frag (lcomm_sym)->fr_offset =
3018 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3019 &~ ((1 << align) - 1));
809ffe0d
ILT
3020 if (align > symbol_get_tc (lcomm_sym)->align)
3021 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH
3022 }
3023
3024 if (lcomm)
3025 {
3026 /* Make sym an offset from lcomm_sym. */
3027 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT
3028 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3029 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3030 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH
3031 }
3032
3033 subseg_set (current_seg, current_subseg);
3034
3035 demand_empty_rest_of_line ();
3036}
3037
3038/* The .csect pseudo-op. This switches us into a different
3039 subsegment. The first argument is a symbol whose value is the
3040 start of the .csect. In COFF, csect symbols get special aux
3041 entries defined by the x_csect field of union internal_auxent. The
3042 optional second argument is the alignment (the default is 2). */
3043
3044static void
3045ppc_csect (ignore)
5480ccf3 3046 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3047{
3048 char *name;
3049 char endc;
3050 symbolS *sym;
931e13a6 3051 offsetT align;
252b5132
RH
3052
3053 name = input_line_pointer;
3054 endc = get_symbol_end ();
81d4177b 3055
252b5132
RH
3056 sym = symbol_find_or_make (name);
3057
3058 *input_line_pointer = endc;
3059
3060 if (S_GET_NAME (sym)[0] == '\0')
3061 {
3062 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3063 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH
3064 }
3065
931e13a6 3066 align = 2;
252b5132
RH
3067 if (*input_line_pointer == ',')
3068 {
3069 ++input_line_pointer;
931e13a6 3070 align = get_absolute_expression ();
252b5132
RH
3071 }
3072
931e13a6
AM
3073 ppc_change_csect (sym, align);
3074
252b5132
RH
3075 demand_empty_rest_of_line ();
3076}
3077
3078/* Change to a different csect. */
3079
3080static void
931e13a6 3081ppc_change_csect (sym, align)
252b5132 3082 symbolS *sym;
931e13a6 3083 offsetT align;
252b5132
RH
3084{
3085 if (S_IS_DEFINED (sym))
809ffe0d 3086 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH
3087 else
3088 {
3089 symbolS **list_ptr;
3090 int after_toc;
3091 int hold_chunksize;
3092 symbolS *list;
931e13a6
AM
3093 int is_code;
3094 segT sec;
252b5132
RH
3095
3096 /* This is a new csect. We need to look at the symbol class to
3097 figure out whether it should go in the text section or the
3098 data section. */
3099 after_toc = 0;
931e13a6 3100 is_code = 0;
809ffe0d 3101 switch (symbol_get_tc (sym)->class)
252b5132
RH
3102 {
3103 case XMC_PR:
3104 case XMC_RO:
3105 case XMC_DB:
3106 case XMC_GL:
3107 case XMC_XO:
3108 case XMC_SV:
3109 case XMC_TI:
3110 case XMC_TB:
3111 S_SET_SEGMENT (sym, text_section);
809ffe0d 3112 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH
3113 ++ppc_text_subsegment;
3114 list_ptr = &ppc_text_csects;
931e13a6 3115 is_code = 1;
252b5132
RH
3116 break;
3117 case XMC_RW:
3118 case XMC_TC0:
3119 case XMC_TC:
3120 case XMC_DS:
3121 case XMC_UA:
3122 case XMC_BS:
3123 case XMC_UC:
3124 if (ppc_toc_csect != NULL
809ffe0d
ILT
3125 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3126 == ppc_data_subsegment))
252b5132
RH
3127 after_toc = 1;
3128 S_SET_SEGMENT (sym, data_section);
809ffe0d 3129 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH
3130 ++ppc_data_subsegment;
3131 list_ptr = &ppc_data_csects;
3132 break;
3133 default:
3134 abort ();
3135 }
3136
3137 /* We set the obstack chunk size to a small value before
99a814a1
AM
3138 changing subsegments, so that we don't use a lot of memory
3139 space for what may be a small section. */
252b5132
RH
3140 hold_chunksize = chunksize;
3141 chunksize = 64;
3142
931e13a6
AM
3143 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3144 symbol_get_tc (sym)->subseg);
252b5132
RH
3145
3146 chunksize = hold_chunksize;
3147
3148 if (after_toc)
3149 ppc_after_toc_frag = frag_now;
3150
931e13a6
AM
3151 record_alignment (sec, align);
3152 if (is_code)
3153 frag_align_code (align, 0);
3154 else
3155 frag_align (align, 0, 0);
3156
809ffe0d 3157 symbol_set_frag (sym, frag_now);
252b5132
RH
3158 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3159
931e13a6 3160 symbol_get_tc (sym)->align = align;
809ffe0d
ILT
3161 symbol_get_tc (sym)->output = 1;
3162 symbol_get_tc (sym)->within = sym;
81d4177b 3163
252b5132 3164 for (list = *list_ptr;
809ffe0d
ILT
3165 symbol_get_tc (list)->next != (symbolS *) NULL;
3166 list = symbol_get_tc (list)->next)
252b5132 3167 ;
809ffe0d 3168 symbol_get_tc (list)->next = sym;
81d4177b 3169
252b5132 3170 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3171 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3172 &symbol_lastP);
252b5132
RH
3173 }
3174
3175 ppc_current_csect = sym;
3176}
3177
3178/* This function handles the .text and .data pseudo-ops. These
3179 pseudo-ops aren't really used by XCOFF; we implement them for the
3180 convenience of people who aren't used to XCOFF. */
3181
3182static void
3183ppc_section (type)
3184 int type;
3185{
3186 const char *name;
3187 symbolS *sym;
3188
3189 if (type == 't')
3190 name = ".text[PR]";
3191 else if (type == 'd')
3192 name = ".data[RW]";
3193 else
3194 abort ();
3195
3196 sym = symbol_find_or_make (name);
3197
931e13a6 3198 ppc_change_csect (sym, 2);
252b5132
RH
3199
3200 demand_empty_rest_of_line ();
3201}
3202
3203/* This function handles the .section pseudo-op. This is mostly to
3204 give an error, since XCOFF only supports .text, .data and .bss, but
3205 we do permit the user to name the text or data section. */
3206
3207static void
3208ppc_named_section (ignore)
5480ccf3 3209 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3210{
3211 char *user_name;
3212 const char *real_name;
3213 char c;
3214 symbolS *sym;
3215
3216 user_name = input_line_pointer;
3217 c = get_symbol_end ();
3218
3219 if (strcmp (user_name, ".text") == 0)
3220 real_name = ".text[PR]";
3221 else if (strcmp (user_name, ".data") == 0)
3222 real_name = ".data[RW]";
3223 else
3224 {
3225 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3226 *input_line_pointer = c;
3227 ignore_rest_of_line ();
3228 return;
3229 }
3230
3231 *input_line_pointer = c;
3232
3233 sym = symbol_find_or_make (real_name);
3234
931e13a6 3235 ppc_change_csect (sym, 2);
252b5132
RH
3236
3237 demand_empty_rest_of_line ();
3238}
3239
3240/* The .extern pseudo-op. We create an undefined symbol. */
3241
3242static void
3243ppc_extern (ignore)
5480ccf3 3244 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3245{
3246 char *name;
3247 char endc;
3248
3249 name = input_line_pointer;
3250 endc = get_symbol_end ();
3251
3252 (void) symbol_find_or_make (name);
3253
3254 *input_line_pointer = endc;
3255
3256 demand_empty_rest_of_line ();
3257}
3258
3259/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3260
3261static void
3262ppc_lglobl (ignore)
5480ccf3 3263 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3264{
3265 char *name;
3266 char endc;
3267 symbolS *sym;
3268
3269 name = input_line_pointer;
3270 endc = get_symbol_end ();
3271
3272 sym = symbol_find_or_make (name);
3273
3274 *input_line_pointer = endc;
3275
809ffe0d 3276 symbol_get_tc (sym)->output = 1;
252b5132
RH
3277
3278 demand_empty_rest_of_line ();
3279}
3280
3281/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3282 although I don't know why it bothers. */
3283
3284static void
3285ppc_rename (ignore)
5480ccf3 3286 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3287{
3288 char *name;
3289 char endc;
3290 symbolS *sym;
3291 int len;
3292
3293 name = input_line_pointer;
3294 endc = get_symbol_end ();
3295
3296 sym = symbol_find_or_make (name);
3297
3298 *input_line_pointer = endc;
3299
3300 if (*input_line_pointer != ',')
3301 {
3302 as_bad (_("missing rename string"));
3303 ignore_rest_of_line ();
3304 return;
3305 }
3306 ++input_line_pointer;
3307
809ffe0d 3308 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH
3309
3310 demand_empty_rest_of_line ();
3311}
3312
3313/* The .stabx pseudo-op. This is similar to a normal .stabs
3314 pseudo-op, but slightly different. A sample is
3315 .stabx "main:F-1",.main,142,0
3316 The first argument is the symbol name to create. The second is the
3317 value, and the third is the storage class. The fourth seems to be
3318 always zero, and I am assuming it is the type. */
3319
3320static void
3321ppc_stabx (ignore)
5480ccf3 3322 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3323{
3324 char *name;
3325 int len;
3326 symbolS *sym;
3327 expressionS exp;
3328
3329 name = demand_copy_C_string (&len);
3330
3331 if (*input_line_pointer != ',')
3332 {
3333 as_bad (_("missing value"));
3334 return;
3335 }
3336 ++input_line_pointer;
3337
b34976b6 3338 ppc_stab_symbol = TRUE;
252b5132 3339 sym = symbol_make (name);
b34976b6 3340 ppc_stab_symbol = FALSE;
252b5132 3341
809ffe0d 3342 symbol_get_tc (sym)->real_name = name;
252b5132
RH
3343
3344 (void) expression (&exp);
3345
3346 switch (exp.X_op)
3347 {
3348 case O_illegal:
3349 case O_absent:
3350 case O_big:
3351 as_bad (_("illegal .stabx expression; zero assumed"));
3352 exp.X_add_number = 0;
3353 /* Fall through. */
3354 case O_constant:
3355 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3356 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH
3357 break;
3358
3359 case O_symbol:
3360 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3361 symbol_set_value_expression (sym, &exp);
252b5132
RH
3362 else
3363 {
3364 S_SET_VALUE (sym,
3365 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3366 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH
3367 }
3368 break;
3369
3370 default:
3371 /* The value is some complex expression. This will probably
99a814a1
AM
3372 fail at some later point, but this is probably the right
3373 thing to do here. */
809ffe0d 3374 symbol_set_value_expression (sym, &exp);
252b5132
RH
3375 break;
3376 }
3377
3378 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3379 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3380
3381 if (*input_line_pointer != ',')
3382 {
3383 as_bad (_("missing class"));
3384 return;
3385 }
3386 ++input_line_pointer;
3387
3388 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3389
3390 if (*input_line_pointer != ',')
3391 {
3392 as_bad (_("missing type"));
3393 return;
3394 }
3395 ++input_line_pointer;
3396
3397 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3398
809ffe0d 3399 symbol_get_tc (sym)->output = 1;
252b5132 3400
6877bb43 3401 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3402
809ffe0d 3403 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3404
41ea10b1 3405 /* In this case :
99a814a1 3406
41ea10b1
TR
3407 .bs name
3408 .stabx "z",arrays_,133,0
3409 .es
99a814a1 3410
41ea10b1 3411 .comm arrays_,13768,3
99a814a1 3412
41ea10b1
TR
3413 resolve_symbol_value will copy the exp's "within" into sym's when the
3414 offset is 0. Since this seems to be corner case problem,
3415 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3416 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM
3417
3418 if (exp.X_op == O_symbol)
41ea10b1
TR
3419 {
3420 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3421 }
6877bb43 3422 }
99a814a1 3423
252b5132
RH
3424 if (exp.X_op != O_symbol
3425 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3426 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3427 ppc_frob_label (sym);
3428 else
3429 {
3430 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3431 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3432 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3433 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
3434 }
3435
3436 demand_empty_rest_of_line ();
3437}
3438
3439/* The .function pseudo-op. This takes several arguments. The first
3440 argument seems to be the external name of the symbol. The second
67c1ffbe 3441 argument seems to be the label for the start of the function. gcc
252b5132
RH
3442 uses the same name for both. I have no idea what the third and
3443 fourth arguments are meant to be. The optional fifth argument is
3444 an expression for the size of the function. In COFF this symbol
3445 gets an aux entry like that used for a csect. */
3446
3447static void
3448ppc_function (ignore)
5480ccf3 3449 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3450{
3451 char *name;
3452 char endc;
3453 char *s;
3454 symbolS *ext_sym;
3455 symbolS *lab_sym;
3456
3457 name = input_line_pointer;
3458 endc = get_symbol_end ();
3459
3460 /* Ignore any [PR] suffix. */
3461 name = ppc_canonicalize_symbol_name (name);
3462 s = strchr (name, '[');
3463 if (s != (char *) NULL
3464 && strcmp (s + 1, "PR]") == 0)
3465 *s = '\0';
3466
3467 ext_sym = symbol_find_or_make (name);
3468
3469 *input_line_pointer = endc;
3470
3471 if (*input_line_pointer != ',')
3472 {
3473 as_bad (_("missing symbol name"));
3474 ignore_rest_of_line ();
3475 return;
3476 }
3477 ++input_line_pointer;
3478
3479 name = input_line_pointer;
3480 endc = get_symbol_end ();
3481
3482 lab_sym = symbol_find_or_make (name);
3483
3484 *input_line_pointer = endc;
3485
3486 if (ext_sym != lab_sym)
3487 {
809ffe0d
ILT
3488 expressionS exp;
3489
3490 exp.X_op = O_symbol;
3491 exp.X_add_symbol = lab_sym;
3492 exp.X_op_symbol = NULL;
3493 exp.X_add_number = 0;
3494 exp.X_unsigned = 0;
3495 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH
3496 }
3497
809ffe0d
ILT
3498 if (symbol_get_tc (ext_sym)->class == -1)
3499 symbol_get_tc (ext_sym)->class = XMC_PR;
3500 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH
3501
3502 if (*input_line_pointer == ',')
3503 {
3504 expressionS ignore;
3505
3506 /* Ignore the third argument. */
3507 ++input_line_pointer;
3508 expression (&ignore);
3509 if (*input_line_pointer == ',')
3510 {
3511 /* Ignore the fourth argument. */
3512 ++input_line_pointer;
3513 expression (&ignore);
3514 if (*input_line_pointer == ',')
3515 {
3516 /* The fifth argument is the function size. */
3517 ++input_line_pointer;
809ffe0d
ILT
3518 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3519 absolute_section,
3520 (valueT) 0,
3521 &zero_address_frag);
3522 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH
3523 }
3524 }
3525 }
3526
3527 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3528 SF_SET_FUNCTION (ext_sym);
3529 SF_SET_PROCESS (ext_sym);
3530 coff_add_linesym (ext_sym);
3531
3532 demand_empty_rest_of_line ();
3533}
3534
3535/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR
3536 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3537 with the correct line number */
5d6255fe 3538
8642cce8 3539static symbolS *saved_bi_sym = 0;
252b5132
RH
3540
3541static void
3542ppc_bf (ignore)
5480ccf3 3543 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3544{
3545 symbolS *sym;
3546
3547 sym = symbol_make (".bf");
3548 S_SET_SEGMENT (sym, text_section);
809ffe0d 3549 symbol_set_frag (sym, frag_now);
252b5132
RH
3550 S_SET_VALUE (sym, frag_now_fix ());
3551 S_SET_STORAGE_CLASS (sym, C_FCN);
3552
3553 coff_line_base = get_absolute_expression ();
3554
3555 S_SET_NUMBER_AUXILIARY (sym, 1);
3556 SA_SET_SYM_LNNO (sym, coff_line_base);
3557
8642cce8 3558 /* Line number for bi. */
5d6255fe 3559 if (saved_bi_sym)
8642cce8
TR
3560 {
3561 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3562 saved_bi_sym = 0;
3563 }
5d6255fe 3564
8642cce8 3565
809ffe0d 3566 symbol_get_tc (sym)->output = 1;
252b5132
RH
3567
3568 ppc_frob_label (sym);
3569
3570 demand_empty_rest_of_line ();
3571}
3572
3573/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3574 ".ef", except that the line number is absolute, not relative to the
3575 most recent ".bf" symbol. */
3576
3577static void
3578ppc_ef (ignore)
5480ccf3 3579 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3580{
3581 symbolS *sym;
3582
3583 sym = symbol_make (".ef");
3584 S_SET_SEGMENT (sym, text_section);
809ffe0d 3585 symbol_set_frag (sym, frag_now);
252b5132
RH
3586 S_SET_VALUE (sym, frag_now_fix ());
3587 S_SET_STORAGE_CLASS (sym, C_FCN);
3588 S_SET_NUMBER_AUXILIARY (sym, 1);
3589 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3590 symbol_get_tc (sym)->output = 1;
252b5132
RH
3591
3592 ppc_frob_label (sym);
3593
3594 demand_empty_rest_of_line ();
3595}
3596
3597/* The .bi and .ei pseudo-ops. These take a string argument and
3598 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR
3599 the symbol list. The value of .bi will be know when the next .bf
3600 is encountered. */
252b5132
RH
3601
3602static void
3603ppc_biei (ei)
3604 int ei;
3605{
3606 static symbolS *last_biei;
3607
3608 char *name;
3609 int len;
3610 symbolS *sym;
3611 symbolS *look;
3612
3613 name = demand_copy_C_string (&len);
3614
3615 /* The value of these symbols is actually file offset. Here we set
3616 the value to the index into the line number entries. In
3617 ppc_frob_symbols we set the fix_line field, which will cause BFD
3618 to do the right thing. */
3619
3620 sym = symbol_make (name);
3621 /* obj-coff.c currently only handles line numbers correctly in the
3622 .text section. */
3623 S_SET_SEGMENT (sym, text_section);
3624 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3625 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3626
3627 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3628 symbol_get_tc (sym)->output = 1;
81d4177b 3629
8642cce8 3630 /* Save bi. */
5d6255fe 3631 if (ei)
8642cce8
TR
3632 saved_bi_sym = 0;
3633 else
3634 saved_bi_sym = sym;
3635
252b5132
RH
3636 for (look = last_biei ? last_biei : symbol_rootP;
3637 (look != (symbolS *) NULL
3638 && (S_GET_STORAGE_CLASS (look) == C_FILE
3639 || S_GET_STORAGE_CLASS (look) == C_BINCL
3640 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3641 look = symbol_next (look))
3642 ;
3643 if (look != (symbolS *) NULL)
3644 {
3645 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3646 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3647 last_biei = sym;
3648 }
3649
3650 demand_empty_rest_of_line ();
3651}
3652
3653/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3654 There is one argument, which is a csect symbol. The value of the
3655 .bs symbol is the index of this csect symbol. */
3656
3657static void
3658ppc_bs (ignore)
5480ccf3 3659 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3660{
3661 char *name;
3662 char endc;
3663 symbolS *csect;
3664 symbolS *sym;
3665
3666 if (ppc_current_block != NULL)
3667 as_bad (_("nested .bs blocks"));
3668
3669 name = input_line_pointer;
3670 endc = get_symbol_end ();
3671
3672 csect = symbol_find_or_make (name);
3673
3674 *input_line_pointer = endc;
3675
3676 sym = symbol_make (".bs");
3677 S_SET_SEGMENT (sym, now_seg);
3678 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT
3679 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3680 symbol_get_tc (sym)->output = 1;
252b5132 3681
809ffe0d 3682 symbol_get_tc (sym)->within = csect;
252b5132
RH
3683
3684 ppc_frob_label (sym);
3685
3686 ppc_current_block = sym;
3687
3688 demand_empty_rest_of_line ();
3689}
3690
3691/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3692
3693static void
3694ppc_es (ignore)
5480ccf3 3695 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3696{
3697 symbolS *sym;
3698
3699 if (ppc_current_block == NULL)
3700 as_bad (_(".es without preceding .bs"));
3701
3702 sym = symbol_make (".es");
3703 S_SET_SEGMENT (sym, now_seg);
3704 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT
3705 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3706 symbol_get_tc (sym)->output = 1;
252b5132
RH
3707
3708 ppc_frob_label (sym);
3709
3710 ppc_current_block = NULL;
3711
3712 demand_empty_rest_of_line ();
3713}
3714
3715/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3716 line number. */
3717
3718static void
3719ppc_bb (ignore)
5480ccf3 3720 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3721{
3722 symbolS *sym;
3723
3724 sym = symbol_make (".bb");
3725 S_SET_SEGMENT (sym, text_section);
809ffe0d 3726 symbol_set_frag (sym, frag_now);
252b5132
RH
3727 S_SET_VALUE (sym, frag_now_fix ());
3728 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3729
3730 S_SET_NUMBER_AUXILIARY (sym, 1);
3731 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3732
809ffe0d 3733 symbol_get_tc (sym)->output = 1;
252b5132
RH
3734
3735 SF_SET_PROCESS (sym);
3736
3737 ppc_frob_label (sym);
3738
3739 demand_empty_rest_of_line ();
3740}
3741
3742/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3743 line number. */
3744
3745static void
3746ppc_eb (ignore)
5480ccf3 3747 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3748{
3749 symbolS *sym;
3750
3751 sym = symbol_make (".eb");
3752 S_SET_SEGMENT (sym, text_section);
809ffe0d 3753 symbol_set_frag (sym, frag_now);
252b5132
RH
3754 S_SET_VALUE (sym, frag_now_fix ());
3755 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3756 S_SET_NUMBER_AUXILIARY (sym, 1);
3757 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3758 symbol_get_tc (sym)->output = 1;
252b5132
RH
3759
3760 SF_SET_PROCESS (sym);
3761
3762 ppc_frob_label (sym);
3763
3764 demand_empty_rest_of_line ();
3765}
3766
3767/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3768 specified name. */
3769
3770static void
3771ppc_bc (ignore)
5480ccf3 3772 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3773{
3774 char *name;
3775 int len;
3776 symbolS *sym;
3777
3778 name = demand_copy_C_string (&len);
3779 sym = symbol_make (name);
3780 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3781 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3782 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3783 S_SET_VALUE (sym, 0);
809ffe0d 3784 symbol_get_tc (sym)->output = 1;
252b5132
RH
3785
3786 ppc_frob_label (sym);
3787
3788 demand_empty_rest_of_line ();
3789}
3790
3791/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3792
3793static void
3794ppc_ec (ignore)
5480ccf3 3795 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3796{
3797 symbolS *sym;
3798
3799 sym = symbol_make (".ec");
3800 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3801 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3802 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3803 S_SET_VALUE (sym, 0);
809ffe0d 3804 symbol_get_tc (sym)->output = 1;
252b5132
RH
3805
3806 ppc_frob_label (sym);
3807
3808 demand_empty_rest_of_line ();
3809}
3810
3811/* The .toc pseudo-op. Switch to the .toc subsegment. */
3812
3813static void
3814ppc_toc (ignore)
5480ccf3 3815 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3816{
3817 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3818 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH
3819 else
3820 {
3821 subsegT subseg;
3822 symbolS *sym;
3823 symbolS *list;
81d4177b 3824
252b5132
RH
3825 subseg = ppc_data_subsegment;
3826 ++ppc_data_subsegment;
3827
3828 subseg_new (segment_name (data_section), subseg);
3829 ppc_toc_frag = frag_now;
3830
3831 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3832 symbol_set_frag (sym, frag_now);
252b5132
RH
3833 S_SET_SEGMENT (sym, data_section);
3834 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3835 symbol_get_tc (sym)->subseg = subseg;
3836 symbol_get_tc (sym)->output = 1;
3837 symbol_get_tc (sym)->within = sym;
252b5132
RH
3838
3839 ppc_toc_csect = sym;
81d4177b 3840
252b5132 3841 for (list = ppc_data_csects;
809ffe0d
ILT
3842 symbol_get_tc (list)->next != (symbolS *) NULL;
3843 list = symbol_get_tc (list)->next)
252b5132 3844 ;
809ffe0d 3845 symbol_get_tc (list)->next = sym;
252b5132
RH
3846
3847 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3848 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3849 &symbol_lastP);
252b5132
RH
3850 }
3851
3852 ppc_current_csect = ppc_toc_csect;
3853
3854 demand_empty_rest_of_line ();
3855}
3856
3857/* The AIX assembler automatically aligns the operands of a .long or
3858 .short pseudo-op, and we want to be compatible. */
3859
3860static void
3861ppc_xcoff_cons (log_size)
3862 int log_size;
3863{
3864 frag_align (log_size, 0, 0);
3865 record_alignment (now_seg, log_size);
3866 cons (1 << log_size);
3867}
3868
3869static void
3870ppc_vbyte (dummy)
5480ccf3 3871 int dummy ATTRIBUTE_UNUSED;
252b5132
RH
3872{
3873 expressionS exp;
3874 int byte_count;
3875
3876 (void) expression (&exp);
3877
3878 if (exp.X_op != O_constant)
3879 {
3880 as_bad (_("non-constant byte count"));
3881 return;
3882 }
3883
3884 byte_count = exp.X_add_number;
3885
3886 if (*input_line_pointer != ',')
3887 {
3888 as_bad (_("missing value"));
3889 return;
3890 }
3891
3892 ++input_line_pointer;
3893 cons (byte_count);
3894}
3895
3896#endif /* OBJ_XCOFF */
0baf16f2 3897#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
3898\f
3899/* The .tc pseudo-op. This is used when generating either XCOFF or
3900 ELF. This takes two or more arguments.
3901
3902 When generating XCOFF output, the first argument is the name to
3903 give to this location in the toc; this will be a symbol with class
0baf16f2 3904 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3905 this location in the TOC; often there is just one more argument, a
1049f94e 3906 relocatable symbol reference. The size of the value to store
0baf16f2
AM
3907 depends on target word size. A 32-bit target uses 4-byte values, a
3908 64-bit target uses 8-byte values.
252b5132
RH
3909
3910 When not generating XCOFF output, the arguments are the same, but
3911 the first argument is simply ignored. */
3912
3913static void
3914ppc_tc (ignore)
92161534 3915 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3916{
3917#ifdef OBJ_XCOFF
3918
3919 /* Define the TOC symbol name. */
3920 {
3921 char *name;
3922 char endc;
3923 symbolS *sym;
3924
3925 if (ppc_toc_csect == (symbolS *) NULL
3926 || ppc_toc_csect != ppc_current_csect)
3927 {
3928 as_bad (_(".tc not in .toc section"));
3929 ignore_rest_of_line ();
3930 return;
3931 }
3932
3933 name = input_line_pointer;
3934 endc = get_symbol_end ();
3935
3936 sym = symbol_find_or_make (name);
3937
3938 *input_line_pointer = endc;
3939
3940 if (S_IS_DEFINED (sym))
3941 {
3942 symbolS *label;
3943
809ffe0d
ILT
3944 label = symbol_get_tc (ppc_current_csect)->within;
3945 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH
3946 {
3947 as_bad (_(".tc with no label"));
3948 ignore_rest_of_line ();
3949 return;
3950 }
3951
3952 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3953 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH
3954 S_SET_VALUE (label, S_GET_VALUE (sym));
3955
3956 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3957 ++input_line_pointer;
3958
3959 return;
3960 }
3961
3962 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3963 symbol_set_frag (sym, frag_now);
252b5132 3964 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3965 symbol_get_tc (sym)->class = XMC_TC;
3966 symbol_get_tc (sym)->output = 1;
252b5132
RH
3967
3968 ppc_frob_label (sym);
3969 }
3970
0baf16f2
AM
3971#endif /* OBJ_XCOFF */
3972#ifdef OBJ_ELF
9c7977b3 3973 int align;
252b5132
RH
3974
3975 /* Skip the TOC symbol name. */
3976 while (is_part_of_name (*input_line_pointer)
3977 || *input_line_pointer == '['
3978 || *input_line_pointer == ']'
3979 || *input_line_pointer == '{'
3980 || *input_line_pointer == '}')
3981 ++input_line_pointer;
3982
0baf16f2 3983 /* Align to a four/eight byte boundary. */
2b3c4602 3984 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM
3985 frag_align (align, 0, 0);
3986 record_alignment (now_seg, align);
0baf16f2 3987#endif /* OBJ_ELF */
252b5132
RH
3988
3989 if (*input_line_pointer != ',')
3990 demand_empty_rest_of_line ();
3991 else
3992 {
3993 ++input_line_pointer;
2b3c4602 3994 cons (ppc_obj64 ? 8 : 4);
252b5132
RH
3995 }
3996}
0baf16f2
AM
3997
3998/* Pseudo-op .machine. */
0baf16f2
AM
3999
4000static void
4001ppc_machine (ignore)
4002 int ignore ATTRIBUTE_UNUSED;
4003{
69c040df
AM
4004 char *cpu_string;
4005#define MAX_HISTORY 100
4006 static unsigned long *cpu_history;
4007 static int curr_hist;
4008
4009 SKIP_WHITESPACE ();
4010
4011 if (*input_line_pointer == '"')
4012 {
4013 int len;
4014 cpu_string = demand_copy_C_string (&len);
4015 }
4016 else
4017 {
4018 char c;
4019 cpu_string = input_line_pointer;
4020 c = get_symbol_end ();
4021 cpu_string = xstrdup (cpu_string);
4022 *input_line_pointer = c;
4023 }
4024
4025 if (cpu_string != NULL)
4026 {
4027 unsigned long old_cpu = ppc_cpu;
4028 char *p;
4029
4030 for (p = cpu_string; *p != 0; p++)
4031 *p = TOLOWER (*p);
4032
4033 if (strcmp (cpu_string, "push") == 0)
4034 {
4035 if (cpu_history == NULL)
4036 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4037
4038 if (curr_hist >= MAX_HISTORY)
4039 as_bad (_(".machine stack overflow"));
4040 else
4041 cpu_history[curr_hist++] = ppc_cpu;
4042 }
4043 else if (strcmp (cpu_string, "pop") == 0)
4044 {
4045 if (curr_hist <= 0)
4046 as_bad (_(".machine stack underflow"));
4047 else
4048 ppc_cpu = cpu_history[--curr_hist];
4049 }
4050 else if (parse_cpu (cpu_string))
4051 ;
4052 else
4053 as_bad (_("invalid machine `%s'"), cpu_string);
4054
4055 if (ppc_cpu != old_cpu)
4056 ppc_setup_opcodes ();
4057 }
4058
4059 demand_empty_rest_of_line ();
0baf16f2
AM
4060}
4061
4062/* See whether a symbol is in the TOC section. */
4063
4064static int
4065ppc_is_toc_sym (sym)
4066 symbolS *sym;
4067{
4068#ifdef OBJ_XCOFF
4069 return symbol_get_tc (sym)->class == XMC_TC;
4070#endif
4071#ifdef OBJ_ELF
4072 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4073 if (ppc_obj64)
0baf16f2
AM
4074 return strcmp (sname, ".toc") == 0;
4075 else
4076 return strcmp (sname, ".got") == 0;
4077#endif
4078}
4079#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH
4080\f
4081#ifdef TE_PE
4082
99a814a1 4083/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
4084
4085/* Set the current section. */
4086static void
4087ppc_set_current_section (new)
4088 segT new;
4089{
4090 ppc_previous_section = ppc_current_section;
4091 ppc_current_section = new;
4092}
4093
4094/* pseudo-op: .previous
4095 behaviour: toggles the current section with the previous section.
4096 errors: None
99a814a1
AM
4097 warnings: "No previous section" */
4098
252b5132 4099static void
99a814a1 4100ppc_previous (ignore)
5480ccf3 4101 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4102{
4103 symbolS *tmp;
4104
81d4177b 4105 if (ppc_previous_section == NULL)
252b5132 4106 {
99a814a1 4107 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH
4108 return;
4109 }
4110
99a814a1 4111 subseg_set (ppc_previous_section, 0);
252b5132 4112
99a814a1 4113 ppc_set_current_section (ppc_previous_section);
252b5132
RH
4114}
4115
4116/* pseudo-op: .pdata
4117 behaviour: predefined read only data section
b34976b6 4118 double word aligned
252b5132
RH
4119 errors: None
4120 warnings: None
4121 initial: .section .pdata "adr3"
b34976b6 4122 a - don't know -- maybe a misprint
252b5132
RH
4123 d - initialized data
4124 r - readable
4125 3 - double word aligned (that would be 4 byte boundary)
4126
4127 commentary:
4128 Tag index tables (also known as the function table) for exception
99a814a1 4129 handling, debugging, etc. */
252b5132 4130
252b5132 4131static void
99a814a1 4132ppc_pdata (ignore)
5480ccf3 4133 int ignore ATTRIBUTE_UNUSED;
252b5132 4134{
81d4177b 4135 if (pdata_section == 0)
252b5132
RH
4136 {
4137 pdata_section = subseg_new (".pdata", 0);
81d4177b 4138
252b5132
RH
4139 bfd_set_section_flags (stdoutput, pdata_section,
4140 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4141 | SEC_READONLY | SEC_DATA ));
81d4177b 4142
252b5132
RH
4143 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4144 }
4145 else
4146 {
99a814a1 4147 pdata_section = subseg_new (".pdata", 0);
252b5132 4148 }
99a814a1 4149 ppc_set_current_section (pdata_section);
252b5132
RH
4150}
4151
4152/* pseudo-op: .ydata
4153 behaviour: predefined read only data section
b34976b6 4154 double word aligned
252b5132
RH
4155 errors: None
4156 warnings: None
4157 initial: .section .ydata "drw3"
b34976b6 4158 a - don't know -- maybe a misprint
252b5132
RH
4159 d - initialized data
4160 r - readable
4161 3 - double word aligned (that would be 4 byte boundary)
4162 commentary:
4163 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM
4164 debugging, etc. */
4165
252b5132 4166static void
99a814a1 4167ppc_ydata (ignore)
5480ccf3 4168 int ignore ATTRIBUTE_UNUSED;
252b5132 4169{
81d4177b 4170 if (ydata_section == 0)
252b5132
RH
4171 {
4172 ydata_section = subseg_new (".ydata", 0);
4173 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM
4174 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4175 | SEC_READONLY | SEC_DATA ));
252b5132
RH
4176
4177 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4178 }
4179 else
4180 {
4181 ydata_section = subseg_new (".ydata", 0);
4182 }
99a814a1 4183 ppc_set_current_section (ydata_section);
252b5132
RH
4184}
4185
4186/* pseudo-op: .reldata
4187 behaviour: predefined read write data section
b34976b6 4188 double word aligned (4-byte)
252b5132
RH
4189 FIXME: relocation is applied to it
4190 FIXME: what's the difference between this and .data?
4191 errors: None
4192 warnings: None
4193 initial: .section .reldata "drw3"
4194 d - initialized data
4195 r - readable
4196 w - writeable
4197 3 - double word aligned (that would be 8 byte boundary)
4198
4199 commentary:
4200 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM
4201 function descriptors, etc. */
4202
252b5132 4203static void
99a814a1 4204ppc_reldata (ignore)
5480ccf3 4205 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4206{
4207 if (reldata_section == 0)
4208 {
4209 reldata_section = subseg_new (".reldata", 0);
4210
4211 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM
4212 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4213 | SEC_DATA));
252b5132
RH
4214
4215 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4216 }
4217 else
4218 {
4219 reldata_section = subseg_new (".reldata", 0);
4220 }
99a814a1 4221 ppc_set_current_section (reldata_section);
252b5132
RH
4222}
4223
4224/* pseudo-op: .rdata
4225 behaviour: predefined read only data section
b34976b6 4226 double word aligned
252b5132
RH
4227 errors: None
4228 warnings: None
4229 initial: .section .rdata "dr3"
4230 d - initialized data
4231 r - readable
99a814a1
AM
4232 3 - double word aligned (that would be 4 byte boundary) */
4233
252b5132 4234static void
99a814a1 4235ppc_rdata (ignore)
5480ccf3 4236 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4237{
4238 if (rdata_section == 0)
4239 {
4240 rdata_section = subseg_new (".rdata", 0);
4241 bfd_set_section_flags (stdoutput, rdata_section,
4242 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4243 | SEC_READONLY | SEC_DATA ));
4244
4245 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4246 }
4247 else
4248 {
4249 rdata_section = subseg_new (".rdata", 0);
4250 }
99a814a1 4251 ppc_set_current_section (rdata_section);
252b5132
RH
4252}
4253
4254/* pseudo-op: .ualong
81d4177b 4255 behaviour: much like .int, with the exception that no alignment is
b34976b6 4256 performed.
252b5132
RH
4257 FIXME: test the alignment statement
4258 errors: None
99a814a1
AM
4259 warnings: None */
4260
252b5132 4261static void
99a814a1 4262ppc_ualong (ignore)
5480ccf3 4263 int ignore ATTRIBUTE_UNUSED;
252b5132 4264{
99a814a1
AM
4265 /* Try for long. */
4266 cons (4);
252b5132
RH
4267}
4268
4269/* pseudo-op: .znop <symbol name>
4270 behaviour: Issue a nop instruction
b34976b6 4271 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH
4272 the supplied symbol name.
4273 errors: None
99a814a1
AM
4274 warnings: Missing symbol name */
4275
252b5132 4276static void
99a814a1 4277ppc_znop (ignore)
5480ccf3 4278 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4279{
4280 unsigned long insn;
4281 const struct powerpc_opcode *opcode;
4282 expressionS ex;
4283 char *f;
252b5132 4284 symbolS *sym;
252b5132
RH
4285 char *symbol_name;
4286 char c;
4287 char *name;
4288 unsigned int exp;
4289 flagword flags;
4290 asection *sec;
4291
99a814a1 4292 /* Strip out the symbol name. */
252b5132
RH
4293 symbol_name = input_line_pointer;
4294 c = get_symbol_end ();
4295
4296 name = xmalloc (input_line_pointer - symbol_name + 1);
4297 strcpy (name, symbol_name);
4298
4299 sym = symbol_find_or_make (name);
4300
4301 *input_line_pointer = c;
4302
4303 SKIP_WHITESPACE ();
4304
4305 /* Look up the opcode in the hash table. */
4306 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4307
99a814a1 4308 /* Stick in the nop. */
252b5132
RH
4309 insn = opcode->opcode;
4310
4311 /* Write out the instruction. */
4312 f = frag_more (4);
4313 md_number_to_chars (f, insn, 4);
4314 fix_new (frag_now,
4315 f - frag_now->fr_literal,
4316 4,
4317 sym,
4318 0,
4319 0,
4320 BFD_RELOC_16_GOT_PCREL);
4321
4322}
4323
81d4177b
KH
4324/* pseudo-op:
4325 behaviour:
4326 errors:
99a814a1
AM
4327 warnings: */
4328
252b5132 4329static void
99a814a1 4330ppc_pe_comm (lcomm)
252b5132
RH
4331 int lcomm;
4332{
4333 register char *name;
4334 register char c;
4335 register char *p;
4336 offsetT temp;
4337 register symbolS *symbolP;
4338 offsetT align;
4339
4340 name = input_line_pointer;
4341 c = get_symbol_end ();
4342
99a814a1 4343 /* just after name is now '\0'. */
252b5132
RH
4344 p = input_line_pointer;
4345 *p = c;
4346 SKIP_WHITESPACE ();
4347 if (*input_line_pointer != ',')
4348 {
4349 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4350 ignore_rest_of_line ();
4351 return;
4352 }
4353
4354 input_line_pointer++; /* skip ',' */
4355 if ((temp = get_absolute_expression ()) < 0)
4356 {
4357 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4358 ignore_rest_of_line ();
4359 return;
4360 }
4361
4362 if (! lcomm)
4363 {
4364 /* The third argument to .comm is the alignment. */
4365 if (*input_line_pointer != ',')
4366 align = 3;
4367 else
4368 {
4369 ++input_line_pointer;
4370 align = get_absolute_expression ();
4371 if (align <= 0)
4372 {
4373 as_warn (_("ignoring bad alignment"));
4374 align = 3;
4375 }
4376 }
4377 }
4378
4379 *p = 0;
4380 symbolP = symbol_find_or_make (name);
4381
4382 *p = c;
4383 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4384 {
4385 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4386 S_GET_NAME (symbolP));
4387 ignore_rest_of_line ();
4388 return;
4389 }
4390
4391 if (S_GET_VALUE (symbolP))
4392 {
4393 if (S_GET_VALUE (symbolP) != (valueT) temp)
4394 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4395 S_GET_NAME (symbolP),
4396 (long) S_GET_VALUE (symbolP),
4397 (long) temp);
4398 }
4399 else
4400 {
4401 S_SET_VALUE (symbolP, (valueT) temp);
4402 S_SET_EXTERNAL (symbolP);
4403 }
4404
4405 demand_empty_rest_of_line ();
4406}
4407
4408/*
4409 * implement the .section pseudo op:
4410 * .section name {, "flags"}
4411 * ^ ^
4412 * | +--- optional flags: 'b' for bss
4413 * | 'i' for info
4414 * +-- section name 'l' for lib
4415 * 'n' for noload
4416 * 'o' for over
4417 * 'w' for data
4418 * 'd' (apparently m88k for data)
4419 * 'x' for text
4420 * But if the argument is not a quoted string, treat it as a
4421 * subsegment number.
4422 *
4423 * FIXME: this is a copy of the section processing from obj-coff.c, with
4424 * additions/changes for the moto-pas assembler support. There are three
4425 * categories:
4426 *
81d4177b 4427 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH
4428 * setting bits that bfd probably neither understands or uses. The
4429 * correct approach (?) will have to incorporate extra fields attached
4430 * to the section to hold the system specific stuff. (krk)
4431 *
4432 * Section Contents:
4433 * 'a' - unknown - referred to in documentation, but no definition supplied
4434 * 'c' - section has code
4435 * 'd' - section has initialized data
4436 * 'u' - section has uninitialized data
4437 * 'i' - section contains directives (info)
4438 * 'n' - section can be discarded
4439 * 'R' - remove section at link time
4440 *
4441 * Section Protection:
4442 * 'r' - section is readable
4443 * 'w' - section is writeable
4444 * 'x' - section is executable
4445 * 's' - section is sharable
4446 *
4447 * Section Alignment:
4448 * '0' - align to byte boundary
4449 * '1' - align to halfword undary
4450 * '2' - align to word boundary
4451 * '3' - align to doubleword boundary
4452 * '4' - align to quadword boundary
4453 * '5' - align to 32 byte boundary
4454 * '6' - align to 64 byte boundary
4455 *
4456 */
4457
4458void
4459ppc_pe_section (ignore)
5480ccf3 4460 int ignore ATTRIBUTE_UNUSED;
252b5132 4461{
99a814a1 4462 /* Strip out the section name. */
252b5132
RH
4463 char *section_name;
4464 char c;
4465 char *name;
4466 unsigned int exp;
4467 flagword flags;
4468 segT sec;
4469 int align;
4470
4471 section_name = input_line_pointer;
4472 c = get_symbol_end ();
4473
4474 name = xmalloc (input_line_pointer - section_name + 1);
4475 strcpy (name, section_name);
4476
4477 *input_line_pointer = c;
4478
4479 SKIP_WHITESPACE ();
4480
4481 exp = 0;
4482 flags = SEC_NO_FLAGS;
4483
4484 if (strcmp (name, ".idata$2") == 0)
4485 {
4486 align = 0;
4487 }
4488 else if (strcmp (name, ".idata$3") == 0)
4489 {
4490 align = 0;
4491 }
4492 else if (strcmp (name, ".idata$4") == 0)
4493 {
4494 align = 2;
4495 }
4496 else if (strcmp (name, ".idata$5") == 0)
4497 {
4498 align = 2;
4499 }
4500 else if (strcmp (name, ".idata$6") == 0)
4501 {
4502 align = 1;
4503 }
4504 else
99a814a1
AM
4505 /* Default alignment to 16 byte boundary. */
4506 align = 4;
252b5132
RH
4507
4508 if (*input_line_pointer == ',')
4509 {
4510 ++input_line_pointer;
4511 SKIP_WHITESPACE ();
4512 if (*input_line_pointer != '"')
4513 exp = get_absolute_expression ();
4514 else
4515 {
4516 ++input_line_pointer;
4517 while (*input_line_pointer != '"'
4518 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4519 {
4520 switch (*input_line_pointer)
4521 {
4522 /* Section Contents */
4523 case 'a': /* unknown */
4524 as_bad (_("Unsupported section attribute -- 'a'"));
4525 break;
4526 case 'c': /* code section */
81d4177b 4527 flags |= SEC_CODE;
252b5132
RH
4528 break;
4529 case 'd': /* section has initialized data */
4530 flags |= SEC_DATA;
4531 break;
4532 case 'u': /* section has uninitialized data */
4533 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4534 in winnt.h */
4535 flags |= SEC_ROM;
4536 break;
4537 case 'i': /* section contains directives (info) */
4538 /* FIXME: This is IMAGE_SCN_LNK_INFO
4539 in winnt.h */
4540 flags |= SEC_HAS_CONTENTS;
4541 break;
4542 case 'n': /* section can be discarded */
81d4177b 4543 flags &=~ SEC_LOAD;
252b5132
RH
4544 break;
4545 case 'R': /* Remove section at link time */
4546 flags |= SEC_NEVER_LOAD;
4547 break;
4548
4549 /* Section Protection */
4550 case 'r': /* section is readable */
4551 flags |= IMAGE_SCN_MEM_READ;
4552 break;
4553 case 'w': /* section is writeable */
4554 flags |= IMAGE_SCN_MEM_WRITE;
4555 break;
4556 case 'x': /* section is executable */
4557 flags |= IMAGE_SCN_MEM_EXECUTE;
4558 break;
4559 case 's': /* section is sharable */
4560 flags |= IMAGE_SCN_MEM_SHARED;
4561 break;
4562
4563 /* Section Alignment */
4564 case '0': /* align to byte boundary */
4565 flags |= IMAGE_SCN_ALIGN_1BYTES;
4566 align = 0;
4567 break;
4568 case '1': /* align to halfword boundary */
4569 flags |= IMAGE_SCN_ALIGN_2BYTES;
4570 align = 1;
4571 break;
4572 case '2': /* align to word boundary */
4573 flags |= IMAGE_SCN_ALIGN_4BYTES;
4574 align = 2;
4575 break;
4576 case '3': /* align to doubleword boundary */
4577 flags |= IMAGE_SCN_ALIGN_8BYTES;
4578 align = 3;
4579 break;
4580 case '4': /* align to quadword boundary */
4581 flags |= IMAGE_SCN_ALIGN_16BYTES;
4582 align = 4;
4583 break;
4584 case '5': /* align to 32 byte boundary */
4585 flags |= IMAGE_SCN_ALIGN_32BYTES;
4586 align = 5;
4587 break;
4588 case '6': /* align to 64 byte boundary */
4589 flags |= IMAGE_SCN_ALIGN_64BYTES;
4590 align = 6;
4591 break;
4592
4593 default:
99a814a1
AM
4594 as_bad (_("unknown section attribute '%c'"),
4595 *input_line_pointer);
252b5132
RH
4596 break;
4597 }
4598 ++input_line_pointer;
4599 }
4600 if (*input_line_pointer == '"')
4601 ++input_line_pointer;
4602 }
4603 }
4604
4605 sec = subseg_new (name, (subsegT) exp);
4606
99a814a1 4607 ppc_set_current_section (sec);
252b5132
RH
4608
4609 if (flags != SEC_NO_FLAGS)
4610 {
4611 if (! bfd_set_section_flags (stdoutput, sec, flags))
4612 as_bad (_("error setting flags for \"%s\": %s"),
4613 bfd_section_name (stdoutput, sec),
4614 bfd_errmsg (bfd_get_error ()));
4615 }
4616
99a814a1 4617 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH
4618
4619}
4620
4621static void
4622ppc_pe_function (ignore)
5480ccf3 4623 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4624{
4625 char *name;
4626 char endc;
4627 symbolS *ext_sym;
4628
4629 name = input_line_pointer;
4630 endc = get_symbol_end ();
4631
4632 ext_sym = symbol_find_or_make (name);
4633
4634 *input_line_pointer = endc;
4635
4636 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4637 SF_SET_FUNCTION (ext_sym);
4638 SF_SET_PROCESS (ext_sym);
4639 coff_add_linesym (ext_sym);
4640
4641 demand_empty_rest_of_line ();
4642}
4643
4644static void
4645ppc_pe_tocd (ignore)
5480ccf3 4646 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4647{
4648 if (tocdata_section == 0)
4649 {
4650 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4651 /* FIXME: section flags won't work. */
252b5132
RH
4652 bfd_set_section_flags (stdoutput, tocdata_section,
4653 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4654 | SEC_READONLY | SEC_DATA));
252b5132
RH
4655
4656 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4657 }
4658 else
4659 {
4660 rdata_section = subseg_new (".tocd", 0);
4661 }
4662
99a814a1 4663 ppc_set_current_section (tocdata_section);
252b5132
RH
4664
4665 demand_empty_rest_of_line ();
4666}
4667
4668/* Don't adjust TOC relocs to use the section symbol. */
4669
4670int
4671ppc_pe_fix_adjustable (fix)
4672 fixS *fix;
4673{
4674 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4675}
4676
4677#endif
4678\f
4679#ifdef OBJ_XCOFF
4680
4681/* XCOFF specific symbol and file handling. */
4682
4683/* Canonicalize the symbol name. We use the to force the suffix, if
4684 any, to use square brackets, and to be in upper case. */
4685
4686char *
4687ppc_canonicalize_symbol_name (name)
4688 char *name;
4689{
4690 char *s;
4691
4692 if (ppc_stab_symbol)
4693 return name;
4694
4695 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4696 ;
4697 if (*s != '\0')
4698 {
4699 char brac;
4700
4701 if (*s == '[')
4702 brac = ']';
4703 else
4704 {
4705 *s = '[';
4706 brac = '}';
4707 }
4708
4709 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4710 *s = TOUPPER (*s);
252b5132
RH
4711
4712 if (*s == '\0' || s[1] != '\0')
4713 as_bad (_("bad symbol suffix"));
4714
4715 *s = ']';
4716 }
4717
4718 return name;
4719}
4720
4721/* Set the class of a symbol based on the suffix, if any. This is
4722 called whenever a new symbol is created. */
4723
4724void
4725ppc_symbol_new_hook (sym)
4726 symbolS *sym;
4727{
809ffe0d 4728 struct ppc_tc_sy *tc;
252b5132
RH
4729 const char *s;
4730
809ffe0d
ILT
4731 tc = symbol_get_tc (sym);
4732 tc->next = NULL;
4733 tc->output = 0;
4734 tc->class = -1;
4735 tc->real_name = NULL;
4736 tc->subseg = 0;
4737 tc->align = 0;
4738 tc->size = NULL;
4739 tc->within = NULL;
252b5132
RH
4740
4741 if (ppc_stab_symbol)
4742 return;
4743
4744 s = strchr (S_GET_NAME (sym), '[');
4745 if (s == (const char *) NULL)
4746 {
4747 /* There is no suffix. */
4748 return;
4749 }
4750
4751 ++s;
4752
4753 switch (s[0])
4754 {
4755 case 'B':
4756 if (strcmp (s, "BS]") == 0)
809ffe0d 4757 tc->class = XMC_BS;
252b5132
RH
4758 break;
4759 case 'D':
4760 if (strcmp (s, "DB]") == 0)
809ffe0d 4761 tc->class = XMC_DB;
252b5132 4762 else if (strcmp (s, "DS]") == 0)
809ffe0d 4763 tc->class = XMC_DS;
252b5132
RH
4764 break;
4765 case 'G':
4766 if (strcmp (s, "GL]") == 0)
809ffe0d 4767 tc->class = XMC_GL;
252b5132
RH
4768 break;
4769 case 'P':
4770 if (strcmp (s, "PR]") == 0)
809ffe0d 4771 tc->class = XMC_PR;
252b5132
RH
4772 break;
4773 case 'R':
4774 if (strcmp (s, "RO]") == 0)
809ffe0d 4775 tc->class = XMC_RO;
252b5132 4776 else if (strcmp (s, "RW]") == 0)
809ffe0d 4777 tc->class = XMC_RW;
252b5132
RH
4778 break;
4779 case 'S':
4780 if (strcmp (s, "SV]") == 0)
809ffe0d 4781 tc->class = XMC_SV;
252b5132
RH
4782 break;
4783 case 'T':
4784 if (strcmp (s, "TC]") == 0)
809ffe0d 4785 tc->class = XMC_TC;
252b5132 4786 else if (strcmp (s, "TI]") == 0)
809ffe0d 4787 tc->class = XMC_TI;
252b5132 4788 else if (strcmp (s, "TB]") == 0)
809ffe0d 4789 tc->class = XMC_TB;
252b5132 4790 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4791 tc->class = XMC_TC0;
252b5132
RH
4792 break;
4793 case 'U':
4794 if (strcmp (s, "UA]") == 0)
809ffe0d 4795 tc->class = XMC_UA;
252b5132 4796 else if (strcmp (s, "UC]") == 0)
809ffe0d 4797 tc->class = XMC_UC;
252b5132
RH
4798 break;
4799 case 'X':
4800 if (strcmp (s, "XO]") == 0)
809ffe0d 4801 tc->class = XMC_XO;
252b5132
RH
4802 break;
4803 }
4804
809ffe0d 4805 if (tc->class == -1)
252b5132
RH
4806 as_bad (_("Unrecognized symbol suffix"));
4807}
4808
4809/* Set the class of a label based on where it is defined. This
4810 handles symbols without suffixes. Also, move the symbol so that it
4811 follows the csect symbol. */
4812
4813void
4814ppc_frob_label (sym)
4815 symbolS *sym;
4816{
4817 if (ppc_current_csect != (symbolS *) NULL)
4818 {
809ffe0d
ILT
4819 if (symbol_get_tc (sym)->class == -1)
4820 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH
4821
4822 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
4823 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4824 &symbol_rootP, &symbol_lastP);
4825 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
4826 }
4827}
4828
4829/* This variable is set by ppc_frob_symbol if any absolute symbols are
4830 seen. It tells ppc_adjust_symtab whether it needs to look through
4831 the symbols. */
4832
b34976b6 4833static bfd_boolean ppc_saw_abs;
252b5132
RH
4834
4835/* Change the name of a symbol just before writing it out. Set the
4836 real name if the .rename pseudo-op was used. Otherwise, remove any
4837 class suffix. Return 1 if the symbol should not be included in the
4838 symbol table. */
4839
4840int
4841ppc_frob_symbol (sym)
4842 symbolS *sym;
4843{
4844 static symbolS *ppc_last_function;
4845 static symbolS *set_end;
4846
4847 /* Discard symbols that should not be included in the output symbol
4848 table. */
809ffe0d
ILT
4849 if (! symbol_used_in_reloc_p (sym)
4850 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4851 || (! S_IS_EXTERNAL (sym)
809ffe0d 4852 && ! symbol_get_tc (sym)->output
252b5132
RH
4853 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4854 return 1;
4855
a161fe53
AM
4856 /* This one will disappear anyway. Don't make a csect sym for it. */
4857 if (sym == abs_section_sym)
4858 return 1;
4859
809ffe0d
ILT
4860 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4861 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH
4862 else
4863 {
4864 const char *name;
4865 const char *s;
4866
4867 name = S_GET_NAME (sym);
4868 s = strchr (name, '[');
4869 if (s != (char *) NULL)
4870 {
4871 unsigned int len;
4872 char *snew;
4873
4874 len = s - name;
4875 snew = xmalloc (len + 1);
4876 memcpy (snew, name, len);
4877 snew[len] = '\0';
4878
4879 S_SET_NAME (sym, snew);
4880 }
4881 }
4882
4883 if (set_end != (symbolS *) NULL)
4884 {
4885 SA_SET_SYM_ENDNDX (set_end, sym);
4886 set_end = NULL;
4887 }
4888
4889 if (SF_GET_FUNCTION (sym))
4890 {
4891 if (ppc_last_function != (symbolS *) NULL)
4892 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4893 ppc_last_function = sym;
809ffe0d 4894 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4895 {
6386f3a7 4896 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT
4897 SA_SET_SYM_FSIZE (sym,
4898 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH
4899 }
4900 }
4901 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4902 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4903 {
4904 if (ppc_last_function == (symbolS *) NULL)
4905 as_bad (_(".ef with no preceding .function"));
4906 else
4907 {
4908 set_end = ppc_last_function;
4909 ppc_last_function = NULL;
4910
4911 /* We don't have a C_EFCN symbol, but we need to force the
4912 COFF backend to believe that it has seen one. */
4913 coff_last_function = NULL;
4914 }
4915 }
4916
4917 if (! S_IS_EXTERNAL (sym)
809ffe0d 4918 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH
4919 && S_GET_STORAGE_CLASS (sym) != C_FILE
4920 && S_GET_STORAGE_CLASS (sym) != C_FCN
4921 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4922 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4923 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4924 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4925 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4926 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4927 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4928
4929 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4930 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4931 {
4932 int i;
4933 union internal_auxent *a;
4934
4935 /* Create a csect aux. */
4936 i = S_GET_NUMBER_AUXILIARY (sym);
4937 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT
4938 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4939 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH
4940 {
4941 /* This is the TOC table. */
4942 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4943 a->x_csect.x_scnlen.l = 0;
4944 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4945 }
809ffe0d 4946 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH
4947 {
4948 /* This is a csect symbol. x_scnlen is the size of the
4949 csect. */
809ffe0d 4950 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH
4951 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4952 S_GET_SEGMENT (sym))
4953 - S_GET_VALUE (sym));
4954 else
4955 {
6386f3a7 4956 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4957 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH
4958 - S_GET_VALUE (sym));
4959 }
809ffe0d 4960 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH
4961 }
4962 else if (S_GET_SEGMENT (sym) == bss_section)
4963 {
4964 /* This is a common symbol. */
809ffe0d
ILT
4965 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4966 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4967 if (S_IS_EXTERNAL (sym))
809ffe0d 4968 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4969 else
809ffe0d 4970 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH
4971 }
4972 else if (S_GET_SEGMENT (sym) == absolute_section)
4973 {
4974 /* This is an absolute symbol. The csect will be created by
99a814a1 4975 ppc_adjust_symtab. */
b34976b6 4976 ppc_saw_abs = TRUE;
252b5132 4977 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT
4978 if (symbol_get_tc (sym)->class == -1)
4979 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH
4980 }
4981 else if (! S_IS_DEFINED (sym))
4982 {
4983 /* This is an external symbol. */
4984 a->x_csect.x_scnlen.l = 0;
4985 a->x_csect.x_smtyp = XTY_ER;
4986 }
809ffe0d 4987 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH
4988 {
4989 symbolS *next;
4990
4991 /* This is a TOC definition. x_scnlen is the size of the
4992 TOC entry. */
4993 next = symbol_next (sym);
809ffe0d 4994 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH
4995 next = symbol_next (next);
4996 if (next == (symbolS *) NULL
809ffe0d 4997 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH
4998 {
4999 if (ppc_after_toc_frag == (fragS *) NULL)
5000 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5001 data_section)
5002 - S_GET_VALUE (sym));
5003 else
5004 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5005 - S_GET_VALUE (sym));
5006 }
5007 else
5008 {
6386f3a7 5009 resolve_symbol_value (next);
252b5132
RH
5010 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5011 - S_GET_VALUE (sym));
5012 }
5013 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5014 }
5015 else
5016 {
5017 symbolS *csect;
5018
5019 /* This is a normal symbol definition. x_scnlen is the
5020 symbol index of the containing csect. */
5021 if (S_GET_SEGMENT (sym) == text_section)
5022 csect = ppc_text_csects;
5023 else if (S_GET_SEGMENT (sym) == data_section)
5024 csect = ppc_data_csects;
5025 else
5026 abort ();
5027
5028 /* Skip the initial dummy symbol. */
809ffe0d 5029 csect = symbol_get_tc (csect)->next;
252b5132
RH
5030
5031 if (csect == (symbolS *) NULL)
5032 {
5033 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5034 a->x_csect.x_scnlen.l = 0;
5035 }
5036 else
5037 {
809ffe0d 5038 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5039 {
6386f3a7 5040 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT
5041 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5042 > S_GET_VALUE (sym))
252b5132 5043 break;
809ffe0d 5044 csect = symbol_get_tc (csect)->next;
252b5132
RH
5045 }
5046
809ffe0d
ILT
5047 a->x_csect.x_scnlen.p =
5048 coffsymbol (symbol_get_bfdsym (csect))->native;
5049 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5050 1;
252b5132
RH
5051 }
5052 a->x_csect.x_smtyp = XTY_LD;
5053 }
81d4177b 5054
252b5132
RH
5055 a->x_csect.x_parmhash = 0;
5056 a->x_csect.x_snhash = 0;
809ffe0d 5057 if (symbol_get_tc (sym)->class == -1)
252b5132
RH
5058 a->x_csect.x_smclas = XMC_PR;
5059 else
809ffe0d 5060 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH
5061 a->x_csect.x_stab = 0;
5062 a->x_csect.x_snstab = 0;
5063
5064 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5065 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH
5066 }
5067 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5068 {
5069 /* We want the value to be the symbol index of the referenced
5070 csect symbol. BFD will do that for us if we set the right
5071 flags. */
b782de16
AM
5072 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5073 combined_entry_type *c = coffsymbol (bsym)->native;
5074
5075 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5076 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH
5077 }
5078 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5079 {
5080 symbolS *block;
5081 symbolS *csect;
5082
5083 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT
5084 block = symbol_get_tc (sym)->within;
5085 csect = symbol_get_tc (block)->within;
6386f3a7 5086 resolve_symbol_value (csect);
252b5132
RH
5087 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5088 }
5089 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5090 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5091 {
5092 /* We want the value to be a file offset into the line numbers.
99a814a1
AM
5093 BFD will do that for us if we set the right flags. We have
5094 already set the value correctly. */
809ffe0d 5095 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH
5096 }
5097
5098 return 0;
5099}
5100
5101/* Adjust the symbol table. This creates csect symbols for all
5102 absolute symbols. */
5103
5104void
5105ppc_adjust_symtab ()
5106{
5107 symbolS *sym;
5108
5109 if (! ppc_saw_abs)
5110 return;
5111
5112 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5113 {
5114 symbolS *csect;
5115 int i;
5116 union internal_auxent *a;
5117
5118 if (S_GET_SEGMENT (sym) != absolute_section)
5119 continue;
5120
5121 csect = symbol_create (".abs[XO]", absolute_section,
5122 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5123 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH
5124 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5125 i = S_GET_NUMBER_AUXILIARY (csect);
5126 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5127 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH
5128 a->x_csect.x_scnlen.l = 0;
5129 a->x_csect.x_smtyp = XTY_SD;
5130 a->x_csect.x_parmhash = 0;
5131 a->x_csect.x_snhash = 0;
5132 a->x_csect.x_smclas = XMC_XO;
5133 a->x_csect.x_stab = 0;
5134 a->x_csect.x_snstab = 0;
5135
5136 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5137
5138 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT
5139 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5140 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5141 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH
5142 }
5143
b34976b6 5144 ppc_saw_abs = FALSE;
252b5132
RH
5145}
5146
5147/* Set the VMA for a section. This is called on all the sections in
5148 turn. */
5149
5150void
5151ppc_frob_section (sec)
5152 asection *sec;
5153{
931e13a6 5154 static bfd_vma vma = 0;
252b5132 5155
931e13a6 5156 vma = md_section_align (sec, vma);
252b5132
RH
5157 bfd_set_section_vma (stdoutput, sec, vma);
5158 vma += bfd_section_size (stdoutput, sec);
5159}
5160
5161#endif /* OBJ_XCOFF */
5162\f
5163/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC
5164 of type TYPE, and store the appropriate bytes in *LITP. The number
5165 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH
5166 returned, or NULL on OK. */
5167
5168char *
5169md_atof (type, litp, sizep)
5170 int type;
5171 char *litp;
5172 int *sizep;
5173{
5174 int prec;
5175 LITTLENUM_TYPE words[4];
5176 char *t;
5177 int i;
5178
5179 switch (type)
5180 {
5181 case 'f':
5182 prec = 2;
5183 break;
5184
5185 case 'd':
5186 prec = 4;
5187 break;
5188
5189 default:
5190 *sizep = 0;
5191 return _("bad call to md_atof");
5192 }
5193
5194 t = atof_ieee (input_line_pointer, type, words);
5195 if (t)
5196 input_line_pointer = t;
5197
5198 *sizep = prec * 2;
5199
5200 if (target_big_endian)
5201 {
5202 for (i = 0; i < prec; i++)
5203 {
5204 md_number_to_chars (litp, (valueT) words[i], 2);
5205 litp += 2;
5206 }
5207 }
5208 else
5209 {
5210 for (i = prec - 1; i >= 0; i--)
5211 {
5212 md_number_to_chars (litp, (valueT) words[i], 2);
5213 litp += 2;
5214 }
5215 }
81d4177b 5216
252b5132
RH
5217 return NULL;
5218}
5219
5220/* Write a value out to the object file, using the appropriate
5221 endianness. */
5222
5223void
5224md_number_to_chars (buf, val, n)
5225 char *buf;
5226 valueT val;
5227 int n;
5228{
5229 if (target_big_endian)
5230 number_to_chars_bigendian (buf, val, n);
5231 else
5232 number_to_chars_littleendian (buf, val, n);
5233}
5234
5235/* Align a section (I don't know why this is machine dependent). */
5236
5237valueT
5238md_section_align (seg, addr)
5239 asection *seg;
5240 valueT addr;
5241{
5242 int align = bfd_get_section_alignment (stdoutput, seg);
5243
5244 return ((addr + (1 << align) - 1) & (-1 << align));
5245}
5246
5247/* We don't have any form of relaxing. */
5248
5249int
5250md_estimate_size_before_relax (fragp, seg)
92161534
ILT
5251 fragS *fragp ATTRIBUTE_UNUSED;
5252 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5253{
5254 abort ();
5255 return 0;
5256}
5257
5258/* Convert a machine dependent frag. We never generate these. */
5259
5260void
5261md_convert_frag (abfd, sec, fragp)
92161534
ILT
5262 bfd *abfd ATTRIBUTE_UNUSED;
5263 asection *sec ATTRIBUTE_UNUSED;
5264 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH
5265{
5266 abort ();
5267}
5268
5269/* We have no need to default values of symbols. */
5270
252b5132
RH
5271symbolS *
5272md_undefined_symbol (name)
92161534 5273 char *name ATTRIBUTE_UNUSED;
252b5132
RH
5274{
5275 return 0;
5276}
5277\f
5278/* Functions concerning relocs. */
5279
5280/* The location from which a PC relative jump should be calculated,
5281 given a PC relative reloc. */
5282
5283long
5284md_pcrel_from_section (fixp, sec)
5285 fixS *fixp;
92161534 5286 segT sec ATTRIBUTE_UNUSED;
252b5132
RH
5287{
5288 return fixp->fx_frag->fr_address + fixp->fx_where;
5289}
5290
5291#ifdef OBJ_XCOFF
5292
5293/* This is called to see whether a fixup should be adjusted to use a
5294 section symbol. We take the opportunity to change a fixup against
5295 a symbol in the TOC subsegment into a reloc against the
5296 corresponding .tc symbol. */
5297
5298int
5299ppc_fix_adjustable (fix)
5300 fixS *fix;
5301{
b782de16
AM
5302 valueT val = resolve_symbol_value (fix->fx_addsy);
5303 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5304 TC_SYMFIELD_TYPE *tc;
5305
5306 if (symseg == absolute_section)
5307 return 0;
252b5132 5308
252b5132 5309 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5310 && fix->fx_addsy != ppc_toc_csect
b782de16 5311 && symseg == data_section
252b5132
RH
5312 && val >= ppc_toc_frag->fr_address
5313 && (ppc_after_toc_frag == (fragS *) NULL
5314 || val < ppc_after_toc_frag->fr_address))
5315 {
5316 symbolS *sy;
5317
5318 for (sy = symbol_next (ppc_toc_csect);
5319 sy != (symbolS *) NULL;
5320 sy = symbol_next (sy))
5321 {
b782de16
AM
5322 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5323
5324 if (sy_tc->class == XMC_TC0)
252b5132 5325 continue;
b782de16 5326 if (sy_tc->class != XMC_TC)
252b5132 5327 break;
b782de16 5328 if (val == resolve_symbol_value (sy))
252b5132
RH
5329 {
5330 fix->fx_addsy = sy;
5331 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5332 return 0;
5333 }
5334 }
5335
5336 as_bad_where (fix->fx_file, fix->fx_line,
5337 _("symbol in .toc does not match any .tc"));
5338 }
5339
5340 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM
5341 tc = symbol_get_tc (fix->fx_addsy);
5342 if (tc->subseg == 0
5343 && tc->class != XMC_TC0
5344 && tc->class != XMC_TC
5345 && symseg != bss_section
252b5132 5346 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5347 && (symseg != data_section
252b5132
RH
5348 || ppc_toc_csect == NULL
5349 || val < ppc_toc_frag->fr_address
5350 || (ppc_after_toc_frag != NULL
5351 && val >= ppc_after_toc_frag->fr_address)))
5352 {
5353 symbolS *csect;
b782de16 5354 symbolS *next_csect;
252b5132 5355
b782de16 5356 if (symseg == text_section)
252b5132 5357 csect = ppc_text_csects;
b782de16 5358 else if (symseg == data_section)
252b5132
RH
5359 csect = ppc_data_csects;
5360 else
5361 abort ();
5362
5363 /* Skip the initial dummy symbol. */
809ffe0d 5364 csect = symbol_get_tc (csect)->next;
252b5132
RH
5365
5366 if (csect != (symbolS *) NULL)
5367 {
b782de16
AM
5368 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5369 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH
5370 {
5371 /* If the csect address equals the symbol value, then we
99a814a1
AM
5372 have to look through the full symbol table to see
5373 whether this is the csect we want. Note that we will
5374 only get here if the csect has zero length. */
b782de16
AM
5375 if (symbol_get_frag (csect)->fr_address == val
5376 && S_GET_VALUE (csect) == val)
252b5132
RH
5377 {
5378 symbolS *scan;
5379
809ffe0d 5380 for (scan = symbol_next (csect);
252b5132 5381 scan != NULL;
809ffe0d 5382 scan = symbol_next (scan))
252b5132 5383 {
809ffe0d 5384 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH
5385 break;
5386 if (scan == fix->fx_addsy)
5387 break;
5388 }
5389
5390 /* If we found the symbol before the next csect
99a814a1 5391 symbol, then this is the csect we want. */
252b5132
RH
5392 if (scan == fix->fx_addsy)
5393 break;
5394 }
5395
b782de16 5396 csect = next_csect;
252b5132
RH
5397 }
5398
b782de16 5399 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH
5400 fix->fx_addsy = csect;
5401 }
b782de16 5402 return 0;
252b5132
RH
5403 }
5404
5405 /* Adjust a reloc against a .lcomm symbol to be against the base
5406 .lcomm. */
b782de16 5407 if (symseg == bss_section
252b5132
RH
5408 && ! S_IS_EXTERNAL (fix->fx_addsy))
5409 {
b782de16
AM
5410 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5411
5412 fix->fx_offset += val - resolve_symbol_value (sy);
5413 fix->fx_addsy = sy;
252b5132
RH
5414 }
5415
5416 return 0;
5417}
5418
5419/* A reloc from one csect to another must be kept. The assembler
5420 will, of course, keep relocs between sections, and it will keep
5421 absolute relocs, but we need to force it to keep PC relative relocs
5422 between two csects in the same section. */
5423
5424int
5425ppc_force_relocation (fix)
5426 fixS *fix;
5427{
5428 /* At this point fix->fx_addsy should already have been converted to
5429 a csect symbol. If the csect does not include the fragment, then
5430 we need to force the relocation. */
5431 if (fix->fx_pcrel
5432 && fix->fx_addsy != NULL
809ffe0d
ILT
5433 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5434 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5435 > fix->fx_frag->fr_address)
5436 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5437 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH
5438 <= fix->fx_frag->fr_address))))
5439 return 1;
5440
ae6063d4 5441 return generic_force_reloc (fix);
252b5132
RH
5442}
5443
5444#endif /* OBJ_XCOFF */
5445
0baf16f2 5446#ifdef OBJ_ELF
a161fe53
AM
5447/* If this function returns non-zero, it guarantees that a relocation
5448 will be emitted for a fixup. */
5449
5450int
5451ppc_force_relocation (fix)
5452 fixS *fix;
5453{
5454 /* Branch prediction relocations must force a relocation, as must
5455 the vtable description relocs. */
5456 switch (fix->fx_r_type)
5457 {
5458 case BFD_RELOC_PPC_B16_BRTAKEN:
5459 case BFD_RELOC_PPC_B16_BRNTAKEN:
5460 case BFD_RELOC_PPC_BA16_BRTAKEN:
5461 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5462 case BFD_RELOC_PPC64_TOC:
a161fe53
AM
5463 return 1;
5464 default:
5465 break;
5466 }
5467
cdba85ec
AM
5468 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5469 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5470 return 1;
5471
ae6063d4 5472 return generic_force_reloc (fix);
a161fe53
AM
5473}
5474
0baf16f2
AM
5475int
5476ppc_fix_adjustable (fix)
5477 fixS *fix;
252b5132 5478{
0baf16f2
AM
5479 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5480 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5481 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5482 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5483 && fix->fx_r_type != BFD_RELOC_GPREL16
5484 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5485 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM
5486 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5487 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM
5488 && (fix->fx_pcrel
5489 || (fix->fx_subsy != NULL
5490 && (S_GET_SEGMENT (fix->fx_subsy)
5491 == S_GET_SEGMENT (fix->fx_addsy)))
5492 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5493}
0baf16f2 5494#endif
252b5132
RH
5495
5496/* Apply a fixup to the object code. This is called for all the
5497 fixups we generated by the call to fix_new_exp, above. In the call
5498 above we used a reloc code which was the largest legal reloc code
5499 plus the operand index. Here we undo that to recover the operand
5500 index. At this point all symbol values should be fully resolved,
5501 and we attempt to completely resolve the reloc. If we can not do
5502 that, we determine the correct reloc code and put it back in the
5503 fixup. */
5504
94f592af
NC
5505void
5506md_apply_fix3 (fixP, valP, seg)
5507 fixS *fixP;
5508 valueT * valP;
0baf16f2 5509 segT seg ATTRIBUTE_UNUSED;
252b5132 5510{
94f592af 5511 valueT value = * valP;
252b5132
RH
5512
5513#ifdef OBJ_ELF
94f592af 5514 if (fixP->fx_addsy != NULL)
252b5132 5515 {
a161fe53 5516 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC
5517 if (fixP->fx_pcrel)
5518 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH
5519 }
5520 else
94f592af 5521 fixP->fx_done = 1;
252b5132 5522#else
a161fe53 5523 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH
5524 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5525 doing this relocation the code in write.c is going to call
5526 bfd_install_relocation, which is also going to use the symbol
5527 value. That means that if the reloc is fully resolved we want to
a161fe53 5528 use *valP since bfd_install_relocation is not being used.
252b5132 5529 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM
5530 *valP, and must use fx_offset instead. However, if the reloc
5531 is PC relative, we do want to use *valP since it includes the
252b5132 5532 result of md_pcrel_from. This is confusing. */
94f592af
NC
5533 if (fixP->fx_addsy == (symbolS *) NULL)
5534 fixP->fx_done = 1;
5535
5536 else if (fixP->fx_pcrel)
5537 ;
5538
252b5132 5539 else
a161fe53
AM
5540 value = fixP->fx_offset;
5541#endif
5542
5543 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5544 {
a161fe53
AM
5545 /* We can't actually support subtracting a symbol. */
5546 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5547 }
252b5132 5548
94f592af 5549 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH
5550 {
5551 int opindex;
5552 const struct powerpc_operand *operand;
5553 char *where;
5554 unsigned long insn;
5555
94f592af 5556 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH
5557
5558 operand = &powerpc_operands[opindex];
5559
5560#ifdef OBJ_XCOFF
0baf16f2
AM
5561 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5562 does not generate a reloc. It uses the offset of `sym' within its
5563 csect. Other usages, such as `.long sym', generate relocs. This
5564 is the documented behaviour of non-TOC symbols. */
252b5132
RH
5565 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5566 && operand->bits == 16
5567 && operand->shift == 0
2b3c4602 5568 && (operand->insert == NULL || ppc_obj64)
94f592af
NC
5569 && fixP->fx_addsy != NULL
5570 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5571 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5572 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5573 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5574 {
94f592af
NC
5575 value = fixP->fx_offset;
5576 fixP->fx_done = 1;
252b5132
RH
5577 }
5578#endif
5579
5580 /* Fetch the instruction, insert the fully resolved operand
5581 value, and stuff the instruction back again. */
94f592af 5582 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
5583 if (target_big_endian)
5584 insn = bfd_getb32 ((unsigned char *) where);
5585 else
5586 insn = bfd_getl32 ((unsigned char *) where);
5587 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5588 fixP->fx_file, fixP->fx_line);
252b5132
RH
5589 if (target_big_endian)
5590 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5591 else
5592 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5593
94f592af
NC
5594 if (fixP->fx_done)
5595 /* Nothing else to do here. */
5596 return;
252b5132 5597
94f592af 5598 assert (fixP->fx_addsy != NULL);
0baf16f2 5599
252b5132
RH
5600 /* Determine a BFD reloc value based on the operand information.
5601 We are only prepared to turn a few of the operands into
0baf16f2 5602 relocs. */
11b37b7b
AM
5603 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5604 && operand->bits == 26
5605 && operand->shift == 0)
94f592af 5606 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM
5607 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5608 && operand->bits == 16
5609 && operand->shift == 0)
95210096
AM
5610 {
5611 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5612#ifdef OBJ_XCOFF
5613 fixP->fx_size = 2;
5614 if (target_big_endian)
5615 fixP->fx_where += 2;
5616#endif
5617 }
11b37b7b
AM
5618 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5619 && operand->bits == 26
5620 && operand->shift == 0)
94f592af 5621 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM
5622 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5623 && operand->bits == 16
5624 && operand->shift == 0)
95210096
AM
5625 {
5626 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5627#ifdef OBJ_XCOFF
5628 fixP->fx_size = 2;
5629 if (target_big_endian)
5630 fixP->fx_where += 2;
5631#endif
5632 }
0baf16f2 5633#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM
5634 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5635 && operand->bits == 16
a7fc733f 5636 && operand->shift == 0)
11b37b7b 5637 {
a7fc733f
AM
5638 if (ppc_is_toc_sym (fixP->fx_addsy))
5639 {
5640 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5641#ifdef OBJ_ELF
a7fc733f
AM
5642 if (ppc_obj64
5643 && (operand->flags & PPC_OPERAND_DS) != 0)
5644 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5645#endif
5646 }
5647 else
5648 {
5649 fixP->fx_r_type = BFD_RELOC_16;
5650#ifdef OBJ_ELF
5651 if (ppc_obj64
5652 && (operand->flags & PPC_OPERAND_DS) != 0)
5653 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5654#endif
a7fc733f 5655 }
94f592af 5656 fixP->fx_size = 2;
11b37b7b 5657 if (target_big_endian)
94f592af 5658 fixP->fx_where += 2;
11b37b7b 5659 }
0baf16f2 5660#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5661 else
252b5132
RH
5662 {
5663 char *sfile;
5664 unsigned int sline;
5665
5666 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5667 symbol. */
94f592af
NC
5668 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5669 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
5670 _("unresolved expression that must be resolved"));
5671 else
94f592af 5672 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5673 _("unsupported relocation against %s"),
94f592af
NC
5674 S_GET_NAME (fixP->fx_addsy));
5675 fixP->fx_done = 1;
5676 return;
252b5132
RH
5677 }
5678 }
5679 else
5680 {
5681#ifdef OBJ_ELF
94f592af 5682 ppc_elf_validate_fix (fixP, seg);
252b5132 5683#endif
94f592af 5684 switch (fixP->fx_r_type)
252b5132 5685 {
252b5132 5686 case BFD_RELOC_CTOR:
2b3c4602 5687 if (ppc_obj64)
9c7977b3
AM
5688 goto ctor64;
5689 /* fall through */
5690
0baf16f2 5691 case BFD_RELOC_32:
94f592af
NC
5692 if (fixP->fx_pcrel)
5693 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5694 /* fall through */
252b5132
RH
5695
5696 case BFD_RELOC_RVA:
5697 case BFD_RELOC_32_PCREL:
252b5132 5698 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5699 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5700 value, 4);
5701 break;
5702
7f6d05e8 5703 case BFD_RELOC_64:
9c7977b3 5704 ctor64:
94f592af
NC
5705 if (fixP->fx_pcrel)
5706 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5707 /* fall through */
0baf16f2 5708
7f6d05e8 5709 case BFD_RELOC_64_PCREL:
94f592af 5710 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5711 value, 8);
81d4177b 5712 break;
0baf16f2 5713
252b5132
RH
5714 case BFD_RELOC_LO16:
5715 case BFD_RELOC_16:
5716 case BFD_RELOC_GPREL16:
5717 case BFD_RELOC_16_GOT_PCREL:
5718 case BFD_RELOC_16_GOTOFF:
5719 case BFD_RELOC_LO16_GOTOFF:
5720 case BFD_RELOC_HI16_GOTOFF:
5721 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5722 case BFD_RELOC_16_BASEREL:
252b5132
RH
5723 case BFD_RELOC_LO16_BASEREL:
5724 case BFD_RELOC_HI16_BASEREL:
5725 case BFD_RELOC_HI16_S_BASEREL:
5726 case BFD_RELOC_PPC_EMB_NADDR16:
5727 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5728 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5729 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5730 case BFD_RELOC_PPC_EMB_SDAI16:
5731 case BFD_RELOC_PPC_EMB_SDA2REL:
5732 case BFD_RELOC_PPC_EMB_SDA2I16:
5733 case BFD_RELOC_PPC_EMB_RELSEC16:
5734 case BFD_RELOC_PPC_EMB_RELST_LO:
5735 case BFD_RELOC_PPC_EMB_RELST_HI:
5736 case BFD_RELOC_PPC_EMB_RELST_HA:
5737 case BFD_RELOC_PPC_EMB_RELSDA:
5738 case BFD_RELOC_PPC_TOC16:
0baf16f2 5739#ifdef OBJ_ELF
0baf16f2
AM
5740 case BFD_RELOC_PPC64_TOC16_LO:
5741 case BFD_RELOC_PPC64_TOC16_HI:
5742 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5743#endif
94f592af 5744 if (fixP->fx_pcrel)
252b5132 5745 {
94f592af
NC
5746 if (fixP->fx_addsy != NULL)
5747 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5748 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC
5749 bfd_get_reloc_code_name (fixP->fx_r_type),
5750 S_GET_NAME (fixP->fx_addsy));
252b5132 5751 else
94f592af 5752 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5753 _("cannot emit PC relative %s relocation"),
94f592af 5754 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH
5755 }
5756
94f592af 5757 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5758 value, 2);
5759 break;
5760
5761 /* This case happens when you write, for example,
5762 lis %r3,(L1-L2)@ha
5763 where L1 and L2 are defined later. */
5764 case BFD_RELOC_HI16:
94f592af 5765 if (fixP->fx_pcrel)
252b5132 5766 abort ();
94f592af 5767 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5768 PPC_HI (value), 2);
252b5132 5769 break;
0baf16f2 5770
252b5132 5771 case BFD_RELOC_HI16_S:
94f592af 5772 if (fixP->fx_pcrel)
252b5132 5773 abort ();
94f592af 5774 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5775 PPC_HA (value), 2);
5776 break;
5777
5778#ifdef OBJ_ELF
0baf16f2 5779 case BFD_RELOC_PPC64_HIGHER:
94f592af 5780 if (fixP->fx_pcrel)
0baf16f2 5781 abort ();
94f592af 5782 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5783 PPC_HIGHER (value), 2);
252b5132
RH
5784 break;
5785
0baf16f2 5786 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5787 if (fixP->fx_pcrel)
0baf16f2 5788 abort ();
94f592af 5789 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5790 PPC_HIGHERA (value), 2);
5791 break;
5792
5793 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5794 if (fixP->fx_pcrel)
0baf16f2 5795 abort ();
94f592af 5796 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5797 PPC_HIGHEST (value), 2);
5798 break;
5799
5800 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5801 if (fixP->fx_pcrel)
0baf16f2 5802 abort ();
94f592af 5803 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5804 PPC_HIGHESTA (value), 2);
5805 break;
5806
5807 case BFD_RELOC_PPC64_ADDR16_DS:
5808 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5809 case BFD_RELOC_PPC64_GOT16_DS:
5810 case BFD_RELOC_PPC64_GOT16_LO_DS:
5811 case BFD_RELOC_PPC64_PLT16_LO_DS:
5812 case BFD_RELOC_PPC64_SECTOFF_DS:
5813 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5814 case BFD_RELOC_PPC64_TOC16_DS:
5815 case BFD_RELOC_PPC64_TOC16_LO_DS:
5816 case BFD_RELOC_PPC64_PLTGOT16_DS:
5817 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5818 if (fixP->fx_pcrel)
0baf16f2
AM
5819 abort ();
5820 {
94f592af 5821 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5822 unsigned long val, mask;
0baf16f2
AM
5823
5824 if (target_big_endian)
adadcc0c 5825 val = bfd_getb32 (where - 2);
0baf16f2 5826 else
adadcc0c
AM
5827 val = bfd_getl32 (where);
5828 mask = 0xfffc;
5829 /* lq insns reserve the four lsbs. */
5830 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5831 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM
5832 mask = 0xfff0;
5833 val |= value & mask;
0baf16f2
AM
5834 if (target_big_endian)
5835 bfd_putb16 ((bfd_vma) val, where);
5836 else
5837 bfd_putl16 ((bfd_vma) val, where);
5838 }
5839 break;
cdba85ec 5840
ba0b2174
AM
5841 case BFD_RELOC_PPC_B16_BRTAKEN:
5842 case BFD_RELOC_PPC_B16_BRNTAKEN:
5843 case BFD_RELOC_PPC_BA16_BRTAKEN:
5844 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5845 break;
5846
cdba85ec
AM
5847 case BFD_RELOC_PPC_TLS:
5848 case BFD_RELOC_PPC_DTPMOD:
5849 case BFD_RELOC_PPC_TPREL16:
5850 case BFD_RELOC_PPC_TPREL16_LO:
5851 case BFD_RELOC_PPC_TPREL16_HI:
5852 case BFD_RELOC_PPC_TPREL16_HA:
5853 case BFD_RELOC_PPC_TPREL:
5854 case BFD_RELOC_PPC_DTPREL16:
5855 case BFD_RELOC_PPC_DTPREL16_LO:
5856 case BFD_RELOC_PPC_DTPREL16_HI:
5857 case BFD_RELOC_PPC_DTPREL16_HA:
5858 case BFD_RELOC_PPC_DTPREL:
5859 case BFD_RELOC_PPC_GOT_TLSGD16:
5860 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5861 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5862 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5863 case BFD_RELOC_PPC_GOT_TLSLD16:
5864 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5865 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5866 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5867 case BFD_RELOC_PPC_GOT_TPREL16:
5868 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5869 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5870 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5871 case BFD_RELOC_PPC_GOT_DTPREL16:
5872 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5873 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5874 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5875 case BFD_RELOC_PPC64_TPREL16_DS:
5876 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5877 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5878 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5879 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5880 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5881 case BFD_RELOC_PPC64_DTPREL16_DS:
5882 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5883 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5884 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5885 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5886 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5887 break;
0baf16f2 5888#endif
252b5132 5889 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5890 bytes, rather than 2, so offset it here appropriately. */
252b5132 5891 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5892 if (fixP->fx_pcrel)
252b5132
RH
5893 abort ();
5894
94f592af 5895 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH
5896 + ((target_big_endian) ? 2 : 0),
5897 value, 2);
5898 break;
5899
5900 case BFD_RELOC_8:
94f592af 5901 if (fixP->fx_pcrel)
252b5132
RH
5902 abort ();
5903
94f592af 5904 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5905 value, 1);
5906 break;
5907
5908 case BFD_RELOC_24_PLT_PCREL:
5909 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5910 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH
5911 abort ();
5912
94f592af 5913 if (fixP->fx_done)
99a814a1
AM
5914 {
5915 char *where;
5916 unsigned long insn;
5917
5918 /* Fetch the instruction, insert the fully resolved operand
5919 value, and stuff the instruction back again. */
94f592af 5920 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM
5921 if (target_big_endian)
5922 insn = bfd_getb32 ((unsigned char *) where);
5923 else
5924 insn = bfd_getl32 ((unsigned char *) where);
5925 if ((value & 3) != 0)
94f592af 5926 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5927 _("must branch to an address a multiple of 4"));
5928 if ((offsetT) value < -0x40000000
5929 || (offsetT) value >= 0x40000000)
94f592af 5930 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5931 _("@local or @plt branch destination is too far away, %ld bytes"),
5932 (long) value);
5933 insn = insn | (value & 0x03fffffc);
5934 if (target_big_endian)
5935 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5936 else
5937 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5938 }
252b5132
RH
5939 break;
5940
5941 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC
5942 fixP->fx_done = 0;
5943 if (fixP->fx_addsy
5944 && !S_IS_DEFINED (fixP->fx_addsy)
5945 && !S_IS_WEAK (fixP->fx_addsy))
5946 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH
5947 break;
5948
5949 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5950 fixP->fx_done = 0;
252b5132
RH
5951 break;
5952
0baf16f2 5953#ifdef OBJ_ELF
0baf16f2
AM
5954 /* Generated by reference to `sym@tocbase'. The sym is
5955 ignored by the linker. */
5956 case BFD_RELOC_PPC64_TOC:
94f592af 5957 fixP->fx_done = 0;
0baf16f2 5958 break;
0baf16f2 5959#endif
252b5132 5960 default:
bc805888 5961 fprintf (stderr,
94f592af 5962 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5963 fflush (stderr);
252b5132
RH
5964 abort ();
5965 }
5966 }
5967
5968#ifdef OBJ_ELF
94f592af 5969 fixP->fx_addnumber = value;
252b5132 5970#else
94f592af
NC
5971 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5972 fixP->fx_addnumber = 0;
252b5132
RH
5973 else
5974 {
5975#ifdef TE_PE
94f592af 5976 fixP->fx_addnumber = 0;
252b5132
RH
5977#else
5978 /* We want to use the offset within the data segment of the
5979 symbol, not the actual VMA of the symbol. */
94f592af
NC
5980 fixP->fx_addnumber =
5981 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH
5982#endif
5983 }
5984#endif
252b5132
RH
5985}
5986
5987/* Generate a reloc for a fixup. */
5988
5989arelent *
5990tc_gen_reloc (seg, fixp)
92161534 5991 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5992 fixS *fixp;
5993{
5994 arelent *reloc;
5995
5996 reloc = (arelent *) xmalloc (sizeof (arelent));
5997
49309057
ILT
5998 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5999 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
6000 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6001 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6002 if (reloc->howto == (reloc_howto_type *) NULL)
6003 {
6004 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM
6005 _("reloc %d not supported by object file format"),
6006 (int) fixp->fx_r_type);
252b5132
RH
6007 return NULL;
6008 }
6009 reloc->addend = fixp->fx_addnumber;
6010
6011 return reloc;
6012}
75e21f08
JJ
6013
6014void
6015ppc_cfi_frame_initial_instructions ()
6016{
6017 cfi_add_CFA_def_cfa (1, 0);
6018}
6019
6020int
6021tc_ppc_regname_to_dw2regnum (const char *regname)
6022{
6023 unsigned int regnum = -1;
6024 unsigned int i;
6025 const char *p;
6026 char *q;
6027 static struct { char *name; int dw2regnum; } regnames[] =
6028 {
6029 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6030 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6031 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6032 { "spe_acc", 111 }, { "spefscr", 112 }
6033 };
6034
6035 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6036 if (strcmp (regnames[i].name, regname) == 0)
6037 return regnames[i].dw2regnum;
6038
6039 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6040 {
6041 p = regname + 1 + (regname[1] == '.');
6042 regnum = strtoul (p, &q, 10);
6043 if (p == q || *q || regnum >= 32)
6044 return -1;
6045 if (regname[0] == 'f')
6046 regnum += 32;
6047 else if (regname[0] == 'v')
6048 regnum += 77;
6049 }
6050 else if (regname[0] == 'c' && regname[1] == 'r')
6051 {
6052 p = regname + 2 + (regname[2] == '.');
6053 if (p[0] < '0' || p[0] > '7' || p[1])
6054 return -1;
6055 regnum = p[0] - '0' + 68;
6056 }
6057 return regnum;
6058}