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* gas/m68k/cpu32.d: Set explicit architecture for objdump.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163 182
cef4f754
AM		 183/* More than this number of nops in an alignment op gets a branch
184 instead. */
185unsigned long nop_limit = 4;
186
783de163
AM		 187/* The type of processor we are assembling for. This is one or more
188 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 189ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 190
191/* Flags set on encountering toc relocs. */
192enum {
193 has_large_toc_reloc = 1,
194 has_small_toc_reloc = 2
195} toc_reloc_types;
252b5132
RH		 196\f
197/* The target specific pseudo-ops which we support. */
198
199const pseudo_typeS md_pseudo_table[] =
200{
201 /* Pseudo-ops which must be overridden. */
202 { "byte", ppc_byte, 0 },
203
204#ifdef OBJ_XCOFF
205 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
206 legitimately belong in the obj-*.c file. However, XCOFF is based
207 on COFF, and is only implemented for the RS/6000. We just use
208 obj-coff.c, and add what we need here. */
209 { "comm", ppc_comm, 0 },
210 { "lcomm", ppc_comm, 1 },
211 { "bb", ppc_bb, 0 },
212 { "bc", ppc_bc, 0 },
213 { "bf", ppc_bf, 0 },
214 { "bi", ppc_biei, 0 },
215 { "bs", ppc_bs, 0 },
216 { "csect", ppc_csect, 0 },
217 { "data", ppc_section, 'd' },
218 { "eb", ppc_eb, 0 },
219 { "ec", ppc_ec, 0 },
220 { "ef", ppc_ef, 0 },
221 { "ei", ppc_biei, 1 },
222 { "es", ppc_es, 0 },
223 { "extern", ppc_extern, 0 },
224 { "function", ppc_function, 0 },
225 { "lglobl", ppc_lglobl, 0 },
c865e45b 226 { "ref", ppc_ref, 0 },
252b5132
RH		 227 { "rename", ppc_rename, 0 },
228 { "section", ppc_named_section, 0 },
229 { "stabx", ppc_stabx, 0 },
230 { "text", ppc_section, 't' },
231 { "toc", ppc_toc, 0 },
232 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 233 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 234 { "word", ppc_xcoff_cons, 1 },
235 { "short", ppc_xcoff_cons, 1 },
236 { "vbyte", ppc_vbyte, 0 },
237#endif
238
239#ifdef OBJ_ELF
0baf16f2
AM		 240 { "llong", ppc_elf_cons, 8 },
241 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 242 { "long", ppc_elf_cons, 4 },
243 { "word", ppc_elf_cons, 2 },
244 { "short", ppc_elf_cons, 2 },
245 { "rdata", ppc_elf_rdata, 0 },
246 { "rodata", ppc_elf_rdata, 0 },
247 { "lcomm", ppc_elf_lcomm, 0 },
248#endif
249
250#ifdef TE_PE
99a814a1 251 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 252 { "previous", ppc_previous, 0 },
253 { "pdata", ppc_pdata, 0 },
254 { "ydata", ppc_ydata, 0 },
255 { "reldata", ppc_reldata, 0 },
256 { "rdata", ppc_rdata, 0 },
257 { "ualong", ppc_ualong, 0 },
258 { "znop", ppc_znop, 0 },
259 { "comm", ppc_pe_comm, 0 },
260 { "lcomm", ppc_pe_comm, 1 },
261 { "section", ppc_pe_section, 0 },
262 { "function", ppc_pe_function,0 },
263 { "tocd", ppc_pe_tocd, 0 },
264#endif
265
0baf16f2 266#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 267 { "tc", ppc_tc, 0 },
0baf16f2
AM		 268 { "machine", ppc_machine, 0 },
269#endif
252b5132
RH		 270
271 { NULL, NULL, 0 }
272};
273
274\f
99a814a1
AM		 275/* Predefined register names if -mregnames (or default for Windows NT).
276 In general, there are lots of them, in an attempt to be compatible
277 with a number of other Windows NT assemblers. */
252b5132
RH		 278
279/* Structure to hold information about predefined registers. */
280struct pd_reg
281 {
282 char *name;
283 int value;
284 };
285
286/* List of registers that are pre-defined:
287
288 Each general register has predefined names of the form:
289 1. r<reg_num> which has the value <reg_num>.
290 2. r.<reg_num> which has the value <reg_num>.
291
252b5132
RH		 292 Each floating point register has predefined names of the form:
293 1. f<reg_num> which has the value <reg_num>.
294 2. f.<reg_num> which has the value <reg_num>.
295
7a899fff
C		 296 Each vector unit register has predefined names of the form:
297 1. v<reg_num> which has the value <reg_num>.
298 2. v.<reg_num> which has the value <reg_num>.
299
252b5132
RH		 300 Each condition register has predefined names of the form:
301 1. cr<reg_num> which has the value <reg_num>.
302 2. cr.<reg_num> which has the value <reg_num>.
303
304 There are individual registers as well:
305 sp or r.sp has the value 1
306 rtoc or r.toc has the value 2
307 fpscr has the value 0
308 xer has the value 1
309 lr has the value 8
310 ctr has the value 9
311 pmr has the value 0
312 dar has the value 19
313 dsisr has the value 18
314 dec has the value 22
315 sdr1 has the value 25
316 srr0 has the value 26
317 srr1 has the value 27
318
81d4177b 319 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 320
321static const struct pd_reg pre_defined_registers[] =
322{
323 { "cr.0", 0 }, /* Condition Registers */
324 { "cr.1", 1 },
325 { "cr.2", 2 },
326 { "cr.3", 3 },
327 { "cr.4", 4 },
328 { "cr.5", 5 },
329 { "cr.6", 6 },
330 { "cr.7", 7 },
331
332 { "cr0", 0 },
333 { "cr1", 1 },
334 { "cr2", 2 },
335 { "cr3", 3 },
336 { "cr4", 4 },
337 { "cr5", 5 },
338 { "cr6", 6 },
339 { "cr7", 7 },
340
341 { "ctr", 9 },
342
343 { "dar", 19 }, /* Data Access Register */
344 { "dec", 22 }, /* Decrementer */
345 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
346
347 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 348 { "f.1", 1 },
349 { "f.10", 10 },
350 { "f.11", 11 },
351 { "f.12", 12 },
352 { "f.13", 13 },
353 { "f.14", 14 },
354 { "f.15", 15 },
355 { "f.16", 16 },
356 { "f.17", 17 },
357 { "f.18", 18 },
358 { "f.19", 19 },
359 { "f.2", 2 },
360 { "f.20", 20 },
361 { "f.21", 21 },
362 { "f.22", 22 },
363 { "f.23", 23 },
364 { "f.24", 24 },
365 { "f.25", 25 },
366 { "f.26", 26 },
367 { "f.27", 27 },
368 { "f.28", 28 },
369 { "f.29", 29 },
370 { "f.3", 3 },
252b5132
RH		 371 { "f.30", 30 },
372 { "f.31", 31 },
066be9f7
PB		 373
374 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
375 { "f.33", 33 },
376 { "f.34", 34 },
377 { "f.35", 35 },
378 { "f.36", 36 },
379 { "f.37", 37 },
380 { "f.38", 38 },
381 { "f.39", 39 },
81d4177b 382 { "f.4", 4 },
066be9f7
PB		 383 { "f.40", 40 },
384 { "f.41", 41 },
385 { "f.42", 42 },
386 { "f.43", 43 },
387 { "f.44", 44 },
388 { "f.45", 45 },
389 { "f.46", 46 },
390 { "f.47", 47 },
391 { "f.48", 48 },
392 { "f.49", 49 },
81d4177b 393 { "f.5", 5 },
066be9f7
PB		 394 { "f.50", 50 },
395 { "f.51", 51 },
396 { "f.52", 52 },
397 { "f.53", 53 },
398 { "f.54", 54 },
399 { "f.55", 55 },
400 { "f.56", 56 },
401 { "f.57", 57 },
402 { "f.58", 58 },
403 { "f.59", 59 },
81d4177b 404 { "f.6", 6 },
066be9f7
PB		 405 { "f.60", 60 },
406 { "f.61", 61 },
407 { "f.62", 62 },
408 { "f.63", 63 },
81d4177b
KH		 409 { "f.7", 7 },
410 { "f.8", 8 },
411 { "f.9", 9 },
412
413 { "f0", 0 },
414 { "f1", 1 },
415 { "f10", 10 },
416 { "f11", 11 },
417 { "f12", 12 },
418 { "f13", 13 },
419 { "f14", 14 },
420 { "f15", 15 },
421 { "f16", 16 },
422 { "f17", 17 },
423 { "f18", 18 },
424 { "f19", 19 },
425 { "f2", 2 },
426 { "f20", 20 },
427 { "f21", 21 },
428 { "f22", 22 },
429 { "f23", 23 },
430 { "f24", 24 },
431 { "f25", 25 },
432 { "f26", 26 },
433 { "f27", 27 },
434 { "f28", 28 },
435 { "f29", 29 },
436 { "f3", 3 },
252b5132
RH		 437 { "f30", 30 },
438 { "f31", 31 },
066be9f7
PB		 439
440 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
441 { "f33", 33 },
442 { "f34", 34 },
443 { "f35", 35 },
444 { "f36", 36 },
445 { "f37", 37 },
446 { "f38", 38 },
447 { "f39", 39 },
81d4177b 448 { "f4", 4 },
066be9f7
PB		 449 { "f40", 40 },
450 { "f41", 41 },
451 { "f42", 42 },
452 { "f43", 43 },
453 { "f44", 44 },
454 { "f45", 45 },
455 { "f46", 46 },
456 { "f47", 47 },
457 { "f48", 48 },
458 { "f49", 49 },
81d4177b 459 { "f5", 5 },
066be9f7
PB		 460 { "f50", 50 },
461 { "f51", 51 },
462 { "f52", 52 },
463 { "f53", 53 },
464 { "f54", 54 },
465 { "f55", 55 },
466 { "f56", 56 },
467 { "f57", 57 },
468 { "f58", 58 },
469 { "f59", 59 },
81d4177b 470 { "f6", 6 },
066be9f7
PB		 471 { "f60", 60 },
472 { "f61", 61 },
473 { "f62", 62 },
474 { "f63", 63 },
81d4177b
KH		 475 { "f7", 7 },
476 { "f8", 8 },
477 { "f9", 9 },
252b5132
RH		 478
479 { "fpscr", 0 },
480
c3d65c1c
BE		 481 /* Quantization registers used with pair single instructions. */
482 { "gqr.0", 0 },
483 { "gqr.1", 1 },
484 { "gqr.2", 2 },
485 { "gqr.3", 3 },
486 { "gqr.4", 4 },
487 { "gqr.5", 5 },
488 { "gqr.6", 6 },
489 { "gqr.7", 7 },
490 { "gqr0", 0 },
491 { "gqr1", 1 },
492 { "gqr2", 2 },
493 { "gqr3", 3 },
494 { "gqr4", 4 },
495 { "gqr5", 5 },
496 { "gqr6", 6 },
497 { "gqr7", 7 },
498
252b5132
RH		 499 { "lr", 8 }, /* Link Register */
500
501 { "pmr", 0 },
502
503 { "r.0", 0 }, /* General Purpose Registers */
504 { "r.1", 1 },
505 { "r.10", 10 },
506 { "r.11", 11 },
507 { "r.12", 12 },
508 { "r.13", 13 },
509 { "r.14", 14 },
510 { "r.15", 15 },
511 { "r.16", 16 },
512 { "r.17", 17 },
513 { "r.18", 18 },
514 { "r.19", 19 },
515 { "r.2", 2 },
516 { "r.20", 20 },
517 { "r.21", 21 },
518 { "r.22", 22 },
519 { "r.23", 23 },
520 { "r.24", 24 },
521 { "r.25", 25 },
522 { "r.26", 26 },
523 { "r.27", 27 },
524 { "r.28", 28 },
525 { "r.29", 29 },
526 { "r.3", 3 },
527 { "r.30", 30 },
528 { "r.31", 31 },
529 { "r.4", 4 },
530 { "r.5", 5 },
531 { "r.6", 6 },
532 { "r.7", 7 },
533 { "r.8", 8 },
534 { "r.9", 9 },
535
536 { "r.sp", 1 }, /* Stack Pointer */
537
538 { "r.toc", 2 }, /* Pointer to the table of contents */
539
540 { "r0", 0 }, /* More general purpose registers */
541 { "r1", 1 },
542 { "r10", 10 },
543 { "r11", 11 },
544 { "r12", 12 },
545 { "r13", 13 },
546 { "r14", 14 },
547 { "r15", 15 },
548 { "r16", 16 },
549 { "r17", 17 },
550 { "r18", 18 },
551 { "r19", 19 },
552 { "r2", 2 },
553 { "r20", 20 },
554 { "r21", 21 },
555 { "r22", 22 },
556 { "r23", 23 },
557 { "r24", 24 },
558 { "r25", 25 },
559 { "r26", 26 },
560 { "r27", 27 },
561 { "r28", 28 },
562 { "r29", 29 },
563 { "r3", 3 },
564 { "r30", 30 },
565 { "r31", 31 },
566 { "r4", 4 },
567 { "r5", 5 },
568 { "r6", 6 },
569 { "r7", 7 },
570 { "r8", 8 },
571 { "r9", 9 },
572
573 { "rtoc", 2 }, /* Table of contents */
574
575 { "sdr1", 25 }, /* Storage Description Register 1 */
576
577 { "sp", 1 },
578
579 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
580 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 581
066be9f7 582 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 583 { "v.1", 1 },
584 { "v.10", 10 },
585 { "v.11", 11 },
586 { "v.12", 12 },
587 { "v.13", 13 },
588 { "v.14", 14 },
589 { "v.15", 15 },
590 { "v.16", 16 },
591 { "v.17", 17 },
592 { "v.18", 18 },
593 { "v.19", 19 },
594 { "v.2", 2 },
595 { "v.20", 20 },
596 { "v.21", 21 },
597 { "v.22", 22 },
598 { "v.23", 23 },
599 { "v.24", 24 },
600 { "v.25", 25 },
601 { "v.26", 26 },
602 { "v.27", 27 },
603 { "v.28", 28 },
604 { "v.29", 29 },
605 { "v.3", 3 },
7a899fff
C		 606 { "v.30", 30 },
607 { "v.31", 31 },
81d4177b
KH		 608 { "v.4", 4 },
609 { "v.5", 5 },
610 { "v.6", 6 },
611 { "v.7", 7 },
612 { "v.8", 8 },
613 { "v.9", 9 },
7a899fff
C		 614
615 { "v0", 0 },
81d4177b
KH		 616 { "v1", 1 },
617 { "v10", 10 },
618 { "v11", 11 },
619 { "v12", 12 },
620 { "v13", 13 },
621 { "v14", 14 },
622 { "v15", 15 },
623 { "v16", 16 },
624 { "v17", 17 },
625 { "v18", 18 },
626 { "v19", 19 },
627 { "v2", 2 },
628 { "v20", 20 },
629 { "v21", 21 },
630 { "v22", 22 },
631 { "v23", 23 },
632 { "v24", 24 },
633 { "v25", 25 },
634 { "v26", 26 },
635 { "v27", 27 },
636 { "v28", 28 },
637 { "v29", 29 },
638 { "v3", 3 },
7a899fff
C		 639 { "v30", 30 },
640 { "v31", 31 },
81d4177b
KH		 641 { "v4", 4 },
642 { "v5", 5 },
643 { "v6", 6 },
644 { "v7", 7 },
645 { "v8", 8 },
7a899fff 646 { "v9", 9 },
252b5132 647
066be9f7
PB		 648 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
649 { "vs.1", 1 },
650 { "vs.10", 10 },
651 { "vs.11", 11 },
652 { "vs.12", 12 },
653 { "vs.13", 13 },
654 { "vs.14", 14 },
655 { "vs.15", 15 },
656 { "vs.16", 16 },
657 { "vs.17", 17 },
658 { "vs.18", 18 },
659 { "vs.19", 19 },
660 { "vs.2", 2 },
661 { "vs.20", 20 },
662 { "vs.21", 21 },
663 { "vs.22", 22 },
664 { "vs.23", 23 },
665 { "vs.24", 24 },
666 { "vs.25", 25 },
667 { "vs.26", 26 },
668 { "vs.27", 27 },
669 { "vs.28", 28 },
670 { "vs.29", 29 },
671 { "vs.3", 3 },
672 { "vs.30", 30 },
673 { "vs.31", 31 },
674 { "vs.32", 32 },
675 { "vs.33", 33 },
676 { "vs.34", 34 },
677 { "vs.35", 35 },
678 { "vs.36", 36 },
679 { "vs.37", 37 },
680 { "vs.38", 38 },
681 { "vs.39", 39 },
682 { "vs.4", 4 },
683 { "vs.40", 40 },
684 { "vs.41", 41 },
685 { "vs.42", 42 },
686 { "vs.43", 43 },
687 { "vs.44", 44 },
688 { "vs.45", 45 },
689 { "vs.46", 46 },
690 { "vs.47", 47 },
691 { "vs.48", 48 },
692 { "vs.49", 49 },
693 { "vs.5", 5 },
694 { "vs.50", 50 },
695 { "vs.51", 51 },
696 { "vs.52", 52 },
697 { "vs.53", 53 },
698 { "vs.54", 54 },
699 { "vs.55", 55 },
700 { "vs.56", 56 },
701 { "vs.57", 57 },
702 { "vs.58", 58 },
703 { "vs.59", 59 },
704 { "vs.6", 6 },
705 { "vs.60", 60 },
706 { "vs.61", 61 },
707 { "vs.62", 62 },
708 { "vs.63", 63 },
709 { "vs.7", 7 },
710 { "vs.8", 8 },
711 { "vs.9", 9 },
712
713 { "vs0", 0 },
714 { "vs1", 1 },
715 { "vs10", 10 },
716 { "vs11", 11 },
717 { "vs12", 12 },
718 { "vs13", 13 },
719 { "vs14", 14 },
720 { "vs15", 15 },
721 { "vs16", 16 },
722 { "vs17", 17 },
723 { "vs18", 18 },
724 { "vs19", 19 },
725 { "vs2", 2 },
726 { "vs20", 20 },
727 { "vs21", 21 },
728 { "vs22", 22 },
729 { "vs23", 23 },
730 { "vs24", 24 },
731 { "vs25", 25 },
732 { "vs26", 26 },
733 { "vs27", 27 },
734 { "vs28", 28 },
735 { "vs29", 29 },
736 { "vs3", 3 },
737 { "vs30", 30 },
738 { "vs31", 31 },
739 { "vs32", 32 },
740 { "vs33", 33 },
741 { "vs34", 34 },
742 { "vs35", 35 },
743 { "vs36", 36 },
744 { "vs37", 37 },
745 { "vs38", 38 },
746 { "vs39", 39 },
747 { "vs4", 4 },
748 { "vs40", 40 },
749 { "vs41", 41 },
750 { "vs42", 42 },
751 { "vs43", 43 },
752 { "vs44", 44 },
753 { "vs45", 45 },
754 { "vs46", 46 },
755 { "vs47", 47 },
756 { "vs48", 48 },
757 { "vs49", 49 },
758 { "vs5", 5 },
759 { "vs50", 50 },
760 { "vs51", 51 },
761 { "vs52", 52 },
762 { "vs53", 53 },
763 { "vs54", 54 },
764 { "vs55", 55 },
765 { "vs56", 56 },
766 { "vs57", 57 },
767 { "vs58", 58 },
768 { "vs59", 59 },
769 { "vs6", 6 },
770 { "vs60", 60 },
771 { "vs61", 61 },
772 { "vs62", 62 },
773 { "vs63", 63 },
774 { "vs7", 7 },
775 { "vs8", 8 },
776 { "vs9", 9 },
777
252b5132
RH		 778 { "xer", 1 },
779
780};
781
bc805888 782#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 783
784/* Given NAME, find the register number associated with that name, return
785 the integer value associated with the given name or -1 on failure. */
786
252b5132 787static int
98027b10 788reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 789{
790 int middle, low, high;
791 int cmp;
792
793 low = 0;
794 high = regcount - 1;
795
796 do
797 {
798 middle = (low + high) / 2;
799 cmp = strcasecmp (name, regs[middle].name);
800 if (cmp < 0)
801 high = middle - 1;
802 else if (cmp > 0)
803 low = middle + 1;
804 else
805 return regs[middle].value;
806 }
807 while (low <= high);
808
809 return -1;
810}
811
812/*
99a814a1 813 * Summary of register_name.
252b5132
RH		 814 *
815 * in: Input_line_pointer points to 1st char of operand.
816 *
817 * out: A expressionS.
818 * The operand may have been a register: in this case, X_op == O_register,
819 * X_add_number is set to the register number, and truth is returned.
820 * Input_line_pointer->(next non-blank) char after operand, or is in its
821 * original state.
822 */
823
b34976b6 824static bfd_boolean
98027b10 825register_name (expressionS *expressionP)
252b5132
RH		 826{
827 int reg_number;
828 char *name;
829 char *start;
830 char c;
831
99a814a1 832 /* Find the spelling of the operand. */
252b5132 833 start = name = input_line_pointer;
3882b010 834 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 835 name = ++input_line_pointer;
836
3882b010 837 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 838 return FALSE;
252b5132
RH		 839
840 c = get_symbol_end ();
841 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
842
468cced8
AM		 843 /* Put back the delimiting char. */
844 *input_line_pointer = c;
845
99a814a1 846 /* Look to see if it's in the register table. */
81d4177b 847 if (reg_number >= 0)
252b5132
RH		 848 {
849 expressionP->X_op = O_register;
850 expressionP->X_add_number = reg_number;
81d4177b 851
99a814a1 852 /* Make the rest nice. */
252b5132
RH		 853 expressionP->X_add_symbol = NULL;
854 expressionP->X_op_symbol = NULL;
b34976b6 855 return TRUE;
252b5132 856 }
468cced8
AM		 857
858 /* Reset the line as if we had not done anything. */
859 input_line_pointer = start;
b34976b6 860 return FALSE;
252b5132
RH		 861}
862\f
863/* This function is called for each symbol seen in an expression. It
864 handles the special parsing which PowerPC assemblers are supposed
865 to use for condition codes. */
866
867/* Whether to do the special parsing. */
b34976b6 868static bfd_boolean cr_operand;
252b5132
RH		 869
870/* Names to recognize in a condition code. This table is sorted. */
871static const struct pd_reg cr_names[] =
872{
873 { "cr0", 0 },
874 { "cr1", 1 },
875 { "cr2", 2 },
876 { "cr3", 3 },
877 { "cr4", 4 },
878 { "cr5", 5 },
879 { "cr6", 6 },
880 { "cr7", 7 },
881 { "eq", 2 },
882 { "gt", 1 },
883 { "lt", 0 },
884 { "so", 3 },
885 { "un", 3 }
886};
887
888/* Parsing function. This returns non-zero if it recognized an
889 expression. */
890
891int
91d6fa6a 892ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 893{
894 int val;
895
896 if (! cr_operand)
897 return 0;
898
13abbae3
AM		 899 if (*name == '%')
900 ++name;
252b5132
RH		 901 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
902 name);
903 if (val < 0)
904 return 0;
905
91d6fa6a
NC		 906 exp->X_op = O_constant;
907 exp->X_add_number = val;
252b5132
RH		 908
909 return 1;
910}
911\f
912/* Local variables. */
913
2b3c4602
AM		 914/* Whether to target xcoff64/elf64. */
915static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 916
252b5132
RH		 917/* Opcode hash table. */
918static struct hash_control *ppc_hash;
919
920/* Macro hash table. */
921static struct hash_control *ppc_macro_hash;
922
923#ifdef OBJ_ELF
99a814a1 924/* What type of shared library support to use. */
5d6f4f16 925static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 926
99a814a1 927/* Flags to set in the elf header. */
252b5132
RH		 928static flagword ppc_flags = 0;
929
930/* Whether this is Solaris or not. */
931#ifdef TARGET_SOLARIS_COMMENT
b34976b6 932#define SOLARIS_P TRUE
252b5132 933#else
b34976b6 934#define SOLARIS_P FALSE
252b5132
RH		 935#endif
936
b34976b6 937static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 938#endif
939
940#ifdef OBJ_XCOFF
941
942/* The RS/6000 assembler uses the .csect pseudo-op to generate code
943 using a bunch of different sections. These assembler sections,
944 however, are all encompassed within the .text or .data sections of
945 the final output file. We handle this by using different
946 subsegments within these main segments. */
947
948/* Next subsegment to allocate within the .text segment. */
949static subsegT ppc_text_subsegment = 2;
950
951/* Linked list of csects in the text section. */
952static symbolS *ppc_text_csects;
953
954/* Next subsegment to allocate within the .data segment. */
955static subsegT ppc_data_subsegment = 2;
956
957/* Linked list of csects in the data section. */
958static symbolS *ppc_data_csects;
959
960/* The current csect. */
961static symbolS *ppc_current_csect;
962
963/* The RS/6000 assembler uses a TOC which holds addresses of functions
964 and variables. Symbols are put in the TOC with the .tc pseudo-op.
965 A special relocation is used when accessing TOC entries. We handle
966 the TOC as a subsegment within the .data segment. We set it up if
967 we see a .toc pseudo-op, and save the csect symbol here. */
968static symbolS *ppc_toc_csect;
969
970/* The first frag in the TOC subsegment. */
971static fragS *ppc_toc_frag;
972
973/* The first frag in the first subsegment after the TOC in the .data
974 segment. NULL if there are no subsegments after the TOC. */
975static fragS *ppc_after_toc_frag;
976
977/* The current static block. */
978static symbolS *ppc_current_block;
979
980/* The COFF debugging section; set by md_begin. This is not the
981 .debug section, but is instead the secret BFD section which will
982 cause BFD to set the section number of a symbol to N_DEBUG. */
983static asection *ppc_coff_debug_section;
984
985#endif /* OBJ_XCOFF */
986
987#ifdef TE_PE
988
989/* Various sections that we need for PE coff support. */
990static segT ydata_section;
991static segT pdata_section;
992static segT reldata_section;
993static segT rdata_section;
994static segT tocdata_section;
995
81d4177b 996/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 997static segT ppc_previous_section;
998static segT ppc_current_section;
999
1000#endif /* TE_PE */
1001
1002#ifdef OBJ_ELF
1003symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1004#define PPC_APUINFO_ISEL 0x40
1005#define PPC_APUINFO_PMR 0x41
1006#define PPC_APUINFO_RFMCI 0x42
1007#define PPC_APUINFO_CACHELCK 0x43
1008#define PPC_APUINFO_SPE 0x100
1009#define PPC_APUINFO_EFS 0x101
1010#define PPC_APUINFO_BRLOCK 0x102
1011
b34976b6
AM		 1012/*
1013 * We keep a list of APUinfo
6a0c61b7
EZ		 1014 */
1015unsigned long *ppc_apuinfo_list;
1016unsigned int ppc_apuinfo_num;
1017unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1018#endif /* OBJ_ELF */
1019\f
1020#ifdef OBJ_ELF
15c1449b 1021const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1022#else
15c1449b 1023const char *const md_shortopts = "um:";
252b5132 1024#endif
cef4f754 1025#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1026const struct option md_longopts[] = {
cef4f754 1027 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1028 {NULL, no_argument, NULL, 0}
1029};
15c1449b 1030const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1031
1032int
98027b10 1033md_parse_option (int c, char *arg)
252b5132 1034{
69fe9ce5
AM		 1035 ppc_cpu_t new_cpu;
1036
252b5132
RH		 1037 switch (c)
1038 {
1039 case 'u':
1040 /* -u means that any undefined symbols should be treated as
1041 external, which is the default for gas anyhow. */
1042 break;
1043
1044#ifdef OBJ_ELF
1045 case 'l':
1046 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1047 sake, recognize -be also. */
252b5132
RH		 1048 if (strcmp (arg, "e") == 0)
1049 {
1050 target_big_endian = 0;
1051 set_target_endian = 1;
1052 }
1053 else
1054 return 0;
1055
1056 break;
1057
1058 case 'b':
1059 if (strcmp (arg, "e") == 0)
1060 {
1061 target_big_endian = 1;
1062 set_target_endian = 1;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068
1069 case 'K':
99a814a1 1070 /* Recognize -K PIC. */
252b5132
RH		 1071 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1072 {
1073 shlib = SHLIB_PIC;
1074 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1075 }
1076 else
1077 return 0;
1078
1079 break;
1080#endif
1081
7f6d05e8
CP		 1082 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1083 case 'a':
1084 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1085 {
1086#ifdef BFD64
1087 ppc_obj64 = 1;
1088#else
1089 as_fatal (_("%s unsupported"), "-a64");
1090#endif
1091 }
7f6d05e8 1092 else if (strcmp (arg, "32") == 0)
2b3c4602 1093 ppc_obj64 = 0;
7f6d05e8
CP		 1094 else
1095 return 0;
1096 break;
81d4177b 1097
252b5132 1098 case 'm':
69fe9ce5
AM		 1099 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1100 ppc_cpu = new_cpu;
252b5132
RH		 1101
1102 else if (strcmp (arg, "regnames") == 0)
b34976b6 1103 reg_names_p = TRUE;
252b5132
RH		 1104
1105 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1106 reg_names_p = FALSE;
252b5132
RH		 1107
1108#ifdef OBJ_ELF
99a814a1
AM		 1109 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1110 that require relocation. */
252b5132
RH		 1111 else if (strcmp (arg, "relocatable") == 0)
1112 {
5d6f4f16 1113 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1114 ppc_flags |= EF_PPC_RELOCATABLE;
1115 }
1116
1117 else if (strcmp (arg, "relocatable-lib") == 0)
1118 {
5d6f4f16 1119 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1120 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1121 }
1122
99a814a1 1123 /* -memb, set embedded bit. */
252b5132
RH		 1124 else if (strcmp (arg, "emb") == 0)
1125 ppc_flags |= EF_PPC_EMB;
1126
99a814a1
AM		 1127 /* -mlittle/-mbig set the endianess. */
1128 else if (strcmp (arg, "little") == 0
1129 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1130 {
1131 target_big_endian = 0;
1132 set_target_endian = 1;
1133 }
1134
1135 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1136 {
1137 target_big_endian = 1;
1138 set_target_endian = 1;
1139 }
1140
1141 else if (strcmp (arg, "solaris") == 0)
1142 {
b34976b6 1143 msolaris = TRUE;
252b5132
RH		 1144 ppc_comment_chars = ppc_solaris_comment_chars;
1145 }
1146
1147 else if (strcmp (arg, "no-solaris") == 0)
1148 {
b34976b6 1149 msolaris = FALSE;
252b5132
RH		 1150 ppc_comment_chars = ppc_eabi_comment_chars;
1151 }
1152#endif
1153 else
1154 {
1155 as_bad (_("invalid switch -m%s"), arg);
1156 return 0;
1157 }
1158 break;
1159
1160#ifdef OBJ_ELF
1161 /* -V: SVR4 argument to print version ID. */
1162 case 'V':
1163 print_version_id ();
1164 break;
1165
1166 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1167 should be emitted or not. FIXME: Not implemented. */
1168 case 'Q':
1169 break;
1170
1171 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1172 rather than .stabs.excl, which is ignored by the linker.
1173 FIXME: Not implemented. */
1174 case 's':
1175 if (arg)
1176 return 0;
1177
1178 break;
1179#endif
1180
cef4f754
AM		 1181 case OPTION_NOPS:
1182 {
1183 char *end;
1184 nop_limit = strtoul (optarg, &end, 0);
1185 if (*end)
1186 as_bad (_("--nops needs a numeric argument"));
1187 }
1188 break;
1189
252b5132
RH		 1190 default:
1191 return 0;
1192 }
1193
1194 return 1;
1195}
1196
1197void
98027b10 1198md_show_usage (FILE *stream)
252b5132 1199{
bc805888 1200 fprintf (stream, _("\
252b5132 1201PowerPC options:\n\
ce3d2015
AM		 1202-a32 generate ELF32/XCOFF32\n\
1203-a64 generate ELF64/XCOFF64\n\
1204-u ignored\n\
1205-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1206-mpwr generate code for POWER (RIOS1)\n\
1207-m601 generate code for PowerPC 601\n\
418c1742 1208-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1209 generate code for PowerPC 603/604\n\
1210-m403 generate code for PowerPC 403\n\
1211-m405 generate code for PowerPC 405\n\
1212-m440 generate code for PowerPC 440\n\
1213-m464 generate code for PowerPC 464\n\
1214-m476 generate code for PowerPC 476\n\
f5c120c5 1215-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1216 generate code for PowerPC 7400/7410/7450/7455\n\
1217-m750cl generate code for PowerPC 750cl\n"));
df12615d 1218 fprintf (stream, _("\
ce3d2015
AM		 1219-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1220-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1221-mbooke generate code for 32-bit PowerPC BookE\n\
1222-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1223-mpower4, -mpwr4 generate code for Power4 architecture\n\
1224-mpower5, -mpwr5, -mpwr5x\n\
1225 generate code for Power5 architecture\n\
1226-mpower6, -mpwr6 generate code for Power6 architecture\n\
1227-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1228-mcell generate code for Cell Broadband Engine architecture\n\
1229-mcom generate code Power/PowerPC common instructions\n\
1230-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1231 fprintf (stream, _("\
ce3d2015
AM		 1232-maltivec generate code for AltiVec\n\
1233-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1234-me300 generate code for PowerPC e300 family\n\
1235-me500, -me500x2 generate code for Motorola e500 core complex\n\
1236-me500mc, generate code for Freescale e500mc core complex\n\
1237-me500mc64, generate code for Freescale e500mc64 core complex\n\
1238-mspe generate code for Motorola SPE instructions\n\
1239-mtitan generate code for AppliedMicro Titan core complex\n\
1240-mregnames Allow symbolic names for registers\n\
1241-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1242#ifdef OBJ_ELF
bc805888 1243 fprintf (stream, _("\
ce3d2015
AM		 1244-mrelocatable support for GCC's -mrelocatble option\n\
1245-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1246-memb set PPC_EMB bit in ELF flags\n\
df12615d 1247-mlittle, -mlittle-endian, -l, -le\n\
ce3d2015 1248 generate code for a little endian machine\n\
df12615d 1249-mbig, -mbig-endian, -b, -be\n\
ce3d2015
AM		 1250 generate code for a big endian machine\n\
1251-msolaris generate code for Solaris\n\
1252-mno-solaris do not generate code for Solaris\n\
1253-V print assembler version number\n\
1254-Qy, -Qn ignored\n"));
252b5132 1255#endif
cef4f754
AM		 1256 fprintf (stream, _("\
1257-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1258}
1259\f
1260/* Set ppc_cpu if it is not already set. */
1261
1262static void
98027b10 1263ppc_set_cpu (void)
252b5132
RH		 1264{
1265 const char *default_os = TARGET_OS;
1266 const char *default_cpu = TARGET_CPU;
1267
7102e95e 1268 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1269 {
2a98c3a6 1270 if (ppc_obj64)
bdc70b4a 1271 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1272 else if (strncmp (default_os, "aix", 3) == 0
1273 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1274 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1275 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1276 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1277 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1278 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1279 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1280 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1281 else
99a814a1
AM		 1282 as_fatal (_("Unknown default cpu = %s, os = %s"),
1283 default_cpu, default_os);
252b5132
RH		 1284 }
1285}
1286
9232bbb0
AM		 1287/* Figure out the BFD architecture to use. This function and ppc_mach
1288 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1289
1290enum bfd_architecture
98027b10 1291ppc_arch (void)
252b5132
RH		 1292{
1293 const char *default_cpu = TARGET_CPU;
1294 ppc_set_cpu ();
1295
1296 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1297 return bfd_arch_powerpc;
1298 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1299 return bfd_arch_rs6000;
1300 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1301 {
1302 if (strcmp (default_cpu, "rs6000") == 0)
1303 return bfd_arch_rs6000;
0baf16f2 1304 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1305 return bfd_arch_powerpc;
1306 }
1307
1308 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1309 return bfd_arch_unknown;
1310}
1311
7f6d05e8 1312unsigned long
98027b10 1313ppc_mach (void)
7f6d05e8 1314{
2a98c3a6
AM		 1315 if (ppc_obj64)
1316 return bfd_mach_ppc64;
1317 else if (ppc_arch () == bfd_arch_rs6000)
1318 return bfd_mach_rs6k;
ce3d2015
AM		 1319 else if (ppc_cpu & PPC_OPCODE_TITAN)
1320 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1321 else
1322 return bfd_mach_ppc;
7f6d05e8
CP		 1323}
1324
81d4177b 1325extern char*
98027b10 1326ppc_target_format (void)
7f6d05e8
CP		 1327{
1328#ifdef OBJ_COFF
1329#ifdef TE_PE
99a814a1 1330 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1331#elif TE_POWERMAC
0baf16f2 1332 return "xcoff-powermac";
7f6d05e8 1333#else
eb1e0e80 1334# ifdef TE_AIX5
2b3c4602 1335 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1336# else
2b3c4602 1337 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1338# endif
7f6d05e8 1339#endif
7f6d05e8
CP		 1340#endif
1341#ifdef OBJ_ELF
9d8504b1
PB		 1342# ifdef TE_VXWORKS
1343 return "elf32-powerpc-vxworks";
1344# else
0baf16f2 1345 return (target_big_endian
2b3c4602
AM		 1346 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1347 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1348# endif
7f6d05e8
CP		 1349#endif
1350}
1351
69c040df
AM		 1352/* Insert opcodes and macros into hash tables. Called at startup and
1353 for .cpu pseudo. */
252b5132 1354
69c040df
AM		 1355static void
1356ppc_setup_opcodes (void)
252b5132 1357{
98027b10 1358 const struct powerpc_opcode *op;
252b5132
RH		 1359 const struct powerpc_opcode *op_end;
1360 const struct powerpc_macro *macro;
1361 const struct powerpc_macro *macro_end;
b84bf58a 1362 bfd_boolean bad_insn = FALSE;
252b5132 1363
69c040df
AM		 1364 if (ppc_hash != NULL)
1365 hash_die (ppc_hash);
1366 if (ppc_macro_hash != NULL)
1367 hash_die (ppc_macro_hash);
252b5132
RH		 1368
1369 /* Insert the opcodes into a hash table. */
1370 ppc_hash = hash_new ();
1371
c43a438d 1372 if (ENABLE_CHECKING)
b84bf58a 1373 {
c43a438d 1374 unsigned int i;
b84bf58a 1375
c43a438d
AM		 1376 /* Check operand masks. Code here and in the disassembler assumes
1377 all the 1's in the mask are contiguous. */
1378 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1379 {
c43a438d
AM		 1380 unsigned long mask = powerpc_operands[i].bitm;
1381 unsigned long right_bit;
1382 unsigned int j;
1383
1384 right_bit = mask & -mask;
1385 mask += right_bit;
1386 right_bit = mask & -mask;
1387 if (mask != right_bit)
1388 {
1389 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1390 bad_insn = TRUE;
1391 }
1392 for (j = i + 1; j < num_powerpc_operands; ++j)
1393 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1394 sizeof (powerpc_operands[0])) == 0)
1395 {
1396 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1397 j, i);
1398 bad_insn = TRUE;
1399 }
b84bf58a
AM		 1400 }
1401 }
1402
252b5132
RH		 1403 op_end = powerpc_opcodes + powerpc_num_opcodes;
1404 for (op = powerpc_opcodes; op < op_end; op++)
1405 {
c43a438d 1406 if (ENABLE_CHECKING)
b84bf58a 1407 {
c43a438d
AM		 1408 const unsigned char *o;
1409 unsigned long omask = op->mask;
8dbcd839 1410
d815f1a9 1411 if (op != powerpc_opcodes)
8dbcd839 1412 {
d815f1a9
AM		 1413 /* The major opcodes had better be sorted. Code in the
1414 disassembler assumes the insns are sorted according to
1415 major opcode. */
1416 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1417 {
1418 as_bad (_("major opcode is not sorted for %s"),
1419 op->name);
1420 bad_insn = TRUE;
1421 }
1422
1423 /* Warn if the table isn't more strictly ordered.
1424 Unfortunately it doesn't seem possible to order the
1425 table on much more than the major opcode, which makes
1426 it difficult to implement a binary search in the
1427 disassembler. The problem is that we have multiple
1428 ways to disassemble instructions, and we usually want
1429 to choose a more specific form (with more bits set in
1430 the opcode) than a more general form. eg. all of the
1431 following are equivalent:
1432 bne label # opcode = 0x40820000, mask = 0xff830003
1433 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1434 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1435
1436 There are also cases where the table needs to be out
1437 of order to disassemble the correct instruction for
2f3bb96a 1438 processor variants. */
d815f1a9
AM		 1439 else if (0)
1440 {
1441 unsigned long t1 = op[0].opcode;
1442 unsigned long t2 = op[-1].opcode;
1443
1444 if (((t1 ^ t2) & 0xfc0007ff) == 0
1445 && (t1 & 0xfc0006df) == 0x7c000286)
1446 {
1447 /* spr field is split. */
1448 t1 = ((t1 & ~0x1ff800)
1449 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1450 t2 = ((t2 & ~0x1ff800)
1451 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1452 }
1453 if (t1 < t2)
1454 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1455 op[0].name, op[0].opcode, op[0].mask,
1456 op[-1].name, op[-1].opcode, op[-1].mask);
1457 }
8dbcd839 1458 }
c43a438d
AM		 1459
1460 /* The mask had better not trim off opcode bits. */
1461 if ((op->opcode & omask) != op->opcode)
1462 {
1463 as_bad (_("mask trims opcode bits for %s"),
1464 op->name);
1465 bad_insn = TRUE;
1466 }
1467
1468 /* The operands must not overlap the opcode or each other. */
1469 for (o = op->operands; *o; ++o)
1470 if (*o >= num_powerpc_operands)
1471 {
1472 as_bad (_("operand index error for %s"),
1473 op->name);
1474 bad_insn = TRUE;
1475 }
1476 else
b84bf58a 1477 {
c43a438d
AM		 1478 const struct powerpc_operand *operand = &powerpc_operands[*o];
1479 if (operand->shift >= 0)
b84bf58a 1480 {
c43a438d
AM		 1481 unsigned long mask = operand->bitm << operand->shift;
1482 if (omask & mask)
1483 {
1484 as_bad (_("operand %d overlap in %s"),
1485 (int) (o - op->operands), op->name);
1486 bad_insn = TRUE;
1487 }
1488 omask |= mask;
b84bf58a 1489 }
b84bf58a 1490 }
c43a438d 1491 }
252b5132 1492
bdc70b4a 1493 if ((ppc_cpu & op->flags) != 0
1cb0a767 1494 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1495 {
1496 const char *retval;
1497
98027b10 1498 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1499 if (retval != NULL)
252b5132 1500 {
b84bf58a 1501 as_bad (_("duplicate instruction %s"),
99a814a1 1502 op->name);
b84bf58a 1503 bad_insn = TRUE;
252b5132
RH		 1504 }
1505 }
1506 }
1507
3c9030c1
AM		 1508 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1509 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1510 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1511
252b5132
RH		 1512 /* Insert the macros into a hash table. */
1513 ppc_macro_hash = hash_new ();
1514
1515 macro_end = powerpc_macros + powerpc_num_macros;
1516 for (macro = powerpc_macros; macro < macro_end; macro++)
1517 {
33740db9 1518 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1519 {
1520 const char *retval;
1521
98027b10 1522 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1523 if (retval != (const char *) NULL)
1524 {
b84bf58a
AM		 1525 as_bad (_("duplicate macro %s"), macro->name);
1526 bad_insn = TRUE;
252b5132
RH		 1527 }
1528 }
1529 }
1530
b84bf58a 1531 if (bad_insn)
252b5132 1532 abort ();
69c040df
AM		 1533}
1534
1535/* This function is called when the assembler starts up. It is called
1536 after the options have been parsed and the output file has been
1537 opened. */
1538
1539void
98027b10 1540md_begin (void)
69c040df
AM		 1541{
1542 ppc_set_cpu ();
1543
1544 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1545
1546#ifdef OBJ_ELF
1547 /* Set the ELF flags if desired. */
1548 if (ppc_flags && !msolaris)
1549 bfd_set_private_flags (stdoutput, ppc_flags);
1550#endif
1551
1552 ppc_setup_opcodes ();
252b5132 1553
67c1ffbe 1554 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1555 by the user. */
252b5132
RH		 1556 if (!set_target_endian)
1557 {
1558 set_target_endian = 1;
1559 target_big_endian = PPC_BIG_ENDIAN;
1560 }
1561
1562#ifdef OBJ_XCOFF
1563 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1564
1565 /* Create dummy symbols to serve as initial csects. This forces the
1566 text csects to precede the data csects. These symbols will not
1567 be output. */
1568 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1569 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1570 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1571 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1572#endif
1573
1574#ifdef TE_PE
1575
1576 ppc_current_section = text_section;
81d4177b 1577 ppc_previous_section = 0;
252b5132
RH		 1578
1579#endif
1580}
1581
6a0c61b7 1582void
98027b10 1583ppc_cleanup (void)
6a0c61b7 1584{
dc1d03fc 1585#ifdef OBJ_ELF
6a0c61b7
EZ		 1586 if (ppc_apuinfo_list == NULL)
1587 return;
1588
1589 /* Ok, so write the section info out. We have this layout:
1590
1591 byte data what
1592 ---- ---- ----
1593 0 8 length of "APUinfo\0"
1594 4 (n*4) number of APU's (4 bytes each)
1595 8 2 note type 2
1596 12 "APUinfo\0" name
1597 20 APU#1 first APU's info
1598 24 APU#2 second APU's info
1599 ... ...
1600 */
1601 {
1602 char *p;
1603 asection *seg = now_seg;
1604 subsegT subseg = now_subseg;
1605 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1606 unsigned int i;
6a0c61b7
EZ		 1607
1608 /* Create the .PPC.EMB.apuinfo section. */
1609 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1610 bfd_set_section_flags (stdoutput,
1611 apuinfo_secp,
e1a9cb8e 1612 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1613
1614 p = frag_more (4);
1615 md_number_to_chars (p, (valueT) 8, 4);
1616
1617 p = frag_more (4);
e98d298c 1618 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1619
1620 p = frag_more (4);
1621 md_number_to_chars (p, (valueT) 2, 4);
1622
1623 p = frag_more (8);
1624 strcpy (p, "APUinfo");
1625
1626 for (i = 0; i < ppc_apuinfo_num; i++)
1627 {
b34976b6
AM		 1628 p = frag_more (4);
1629 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1630 }
1631
1632 frag_align (2, 0, 0);
1633
1634 /* We probably can't restore the current segment, for there likely
1635 isn't one yet... */
1636 if (seg && subseg)
1637 subseg_set (seg, subseg);
1638 }
dc1d03fc 1639#endif
6a0c61b7
EZ		 1640}
1641
252b5132
RH		 1642/* Insert an operand value into an instruction. */
1643
1644static unsigned long
a1867a27
AM		 1645ppc_insert_operand (unsigned long insn,
1646 const struct powerpc_operand *operand,
1647 offsetT val,
91d6fa6a 1648 ppc_cpu_t cpu,
a1867a27
AM		 1649 char *file,
1650 unsigned int line)
252b5132 1651{
b84bf58a 1652 long min, max, right;
eb42fac1 1653
b84bf58a
AM		 1654 max = operand->bitm;
1655 right = max & -max;
1656 min = 0;
1657
1658 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1659 {
b84bf58a 1660 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1661 max = (max >> 1) & -right;
1662 min = ~max & -right;
b84bf58a 1663 }
252b5132 1664
b84bf58a 1665 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1666 max++;
252b5132 1667
b84bf58a 1668 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1669 {
1670 long tmp = min;
1671 min = -max;
1672 max = -tmp;
1673 }
b84bf58a 1674
a1867a27
AM		 1675 if (min <= max)
1676 {
1677 /* Some people write constants with the sign extension done by
1678 hand but only up to 32 bits. This shouldn't really be valid,
1679 but, to permit this code to assemble on a 64-bit host, we
1680 sign extend the 32-bit value to 64 bits if so doing makes the
1681 value valid. */
1682 if (val > max
1683 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1684 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1685 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1686 val = val - 0x80000000 - 0x80000000;
1687
1688 /* Similarly, people write expressions like ~(1<<15), and expect
1689 this to be OK for a 32-bit unsigned value. */
1690 else if (val < min
1691 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1692 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1693 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1694 val = val + 0x80000000 + 0x80000000;
1695
1696 else if (val < min
1697 || val > max
1698 || (val & (right - 1)) != 0)
1699 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1700 }
b84bf58a 1701
252b5132
RH		 1702 if (operand->insert)
1703 {
1704 const char *errmsg;
1705
1706 errmsg = NULL;
91d6fa6a 1707 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1708 if (errmsg != (const char *) NULL)
ee2c9aa9 1709 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1710 }
1711 else
b84bf58a 1712 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1713
1714 return insn;
1715}
1716
1717\f
1718#ifdef OBJ_ELF
1719/* Parse @got, etc. and return the desired relocation. */
1720static bfd_reloc_code_real_type
98027b10 1721ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1722{
1723 struct map_bfd {
1724 char *string;
b7d7dc63
AM		 1725 unsigned int length : 8;
1726 unsigned int valid32 : 1;
1727 unsigned int valid64 : 1;
1728 unsigned int reloc;
252b5132
RH		 1729 };
1730
1731 char ident[20];
1732 char *str = *str_p;
1733 char *str2;
1734 int ch;
1735 int len;
15c1449b 1736 const struct map_bfd *ptr;
252b5132 1737
b7d7dc63
AM		 1738#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1739#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1740#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1741
15c1449b 1742 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1743 MAP ("l", BFD_RELOC_LO16),
1744 MAP ("h", BFD_RELOC_HI16),
1745 MAP ("ha", BFD_RELOC_HI16_S),
1746 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1747 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1748 MAP ("got", BFD_RELOC_16_GOTOFF),
1749 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1750 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1751 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1752 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1753 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1754 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1755 MAP ("copy", BFD_RELOC_PPC_COPY),
1756 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1757 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1758 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1759 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1760 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1761 MAP ("tls", BFD_RELOC_PPC_TLS),
1762 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1763 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1764 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1765 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1766 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1767 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1768 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1769 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1770 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1771 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1772 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1773 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1774 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1775 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1776 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1777 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1778 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1779 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1780 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1781 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1782 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1783 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1784 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1785 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1786 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1787 MAP32 ("fixup", BFD_RELOC_CTOR),
1788 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1789 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1790 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1791 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1792 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1793 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1794 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1795 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1796 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1797 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1798 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1799 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1800 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1801 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1802 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1803 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1804 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1805 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1806 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1807 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1808 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1809 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1810 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1811 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1812 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1813 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1814 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1815 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1816 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1817 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1818 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1819 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1820 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1821 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1822 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1823 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1824 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1825 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1826 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1827 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1828 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1829 };
1830
1831 if (*str++ != '@')
1832 return BFD_RELOC_UNUSED;
1833
1834 for (ch = *str, str2 = ident;
1835 (str2 < ident + sizeof (ident) - 1
3882b010 1836 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1837 ch = *++str)
1838 {
3882b010 1839 *str2++ = TOLOWER (ch);
252b5132
RH		 1840 }
1841
1842 *str2 = '\0';
1843 len = str2 - ident;
1844
1845 ch = ident[0];
1846 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1847 if (ch == ptr->string[0]
1848 && len == ptr->length
b7d7dc63
AM		 1849 && memcmp (ident, ptr->string, ptr->length) == 0
1850 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1851 {
15c1449b
AM		 1852 int reloc = ptr->reloc;
1853
727fc41e
AM		 1854 if (!ppc_obj64 && exp_p->X_add_number != 0)
1855 {
1856 switch (reloc)
1857 {
1858 case BFD_RELOC_16_GOTOFF:
1859 case BFD_RELOC_LO16_GOTOFF:
1860 case BFD_RELOC_HI16_GOTOFF:
1861 case BFD_RELOC_HI16_S_GOTOFF:
1862 as_warn (_("identifier+constant@got means "
1863 "identifier@got+constant"));
1864 break;
1865
1866 case BFD_RELOC_PPC_GOT_TLSGD16:
1867 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1868 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1869 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1870 case BFD_RELOC_PPC_GOT_TLSLD16:
1871 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1872 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1873 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1874 case BFD_RELOC_PPC_GOT_DTPREL16:
1875 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1876 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1877 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1878 case BFD_RELOC_PPC_GOT_TPREL16:
1879 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1880 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1881 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1882 as_bad (_("symbol+offset not supported for got tls"));
1883 break;
1884 }
1885 }
5f6db75a
AM		 1886
1887 /* Now check for identifier@suffix+constant. */
1888 if (*str == '-' || *str == '+')
252b5132 1889 {
5f6db75a
AM		 1890 char *orig_line = input_line_pointer;
1891 expressionS new_exp;
1892
1893 input_line_pointer = str;
1894 expression (&new_exp);
1895 if (new_exp.X_op == O_constant)
252b5132 1896 {
5f6db75a
AM		 1897 exp_p->X_add_number += new_exp.X_add_number;
1898 str = input_line_pointer;
252b5132 1899 }
5f6db75a
AM		 1900
1901 if (&input_line_pointer != str_p)
1902 input_line_pointer = orig_line;
252b5132 1903 }
252b5132 1904 *str_p = str;
0baf16f2 1905
2b3c4602 1906 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1907 && exp_p->X_op == O_symbol
1908 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1909 {
9f2b53d7
AM		 1910 /* Change the symbol so that the dummy .TOC. symbol can be
1911 omitted from the object file. */
0baf16f2
AM		 1912 exp_p->X_add_symbol = &abs_symbol;
1913 }
1914
15c1449b 1915 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1916 }
1917
1918 return BFD_RELOC_UNUSED;
1919}
1920
99a814a1
AM		 1921/* Like normal .long/.short/.word, except support @got, etc.
1922 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1923static void
98027b10 1924ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1925{
1926 expressionS exp;
1927 bfd_reloc_code_real_type reloc;
1928
1929 if (is_it_end_of_statement ())
1930 {
1931 demand_empty_rest_of_line ();
1932 return;
1933 }
1934
1935 do
1936 {
1937 expression (&exp);
1938 if (exp.X_op == O_symbol
1939 && *input_line_pointer == '@'
99a814a1
AM		 1940 && (reloc = ppc_elf_suffix (&input_line_pointer,
1941 &exp)) != BFD_RELOC_UNUSED)
252b5132 1942 {
99a814a1
AM		 1943 reloc_howto_type *reloc_howto;
1944 int size;
1945
1946 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1947 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1948
1949 if (size > nbytes)
0baf16f2
AM		 1950 {
1951 as_bad (_("%s relocations do not fit in %d bytes\n"),
1952 reloc_howto->name, nbytes);
1953 }
252b5132
RH		 1954 else
1955 {
0baf16f2
AM		 1956 char *p;
1957 int offset;
252b5132 1958
0baf16f2 1959 p = frag_more (nbytes);
aa0c8c1a 1960 memset (p, 0, nbytes);
0baf16f2
AM		 1961 offset = 0;
1962 if (target_big_endian)
1963 offset = nbytes - size;
99a814a1
AM		 1964 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1965 &exp, 0, reloc);
252b5132
RH		 1966 }
1967 }
1968 else
1969 emit_expr (&exp, (unsigned int) nbytes);
1970 }
1971 while (*input_line_pointer++ == ',');
1972
99a814a1
AM		 1973 /* Put terminator back into stream. */
1974 input_line_pointer--;
252b5132
RH		 1975 demand_empty_rest_of_line ();
1976}
1977
1978/* Solaris pseduo op to change to the .rodata section. */
1979static void
98027b10 1980ppc_elf_rdata (int xxx)
252b5132
RH		 1981{
1982 char *save_line = input_line_pointer;
1983 static char section[] = ".rodata\n";
1984
99a814a1 1985 /* Just pretend this is .section .rodata */
252b5132
RH		 1986 input_line_pointer = section;
1987 obj_elf_section (xxx);
1988
1989 input_line_pointer = save_line;
1990}
1991
99a814a1 1992/* Pseudo op to make file scope bss items. */
252b5132 1993static void
98027b10 1994ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1995{
98027b10
AM		 1996 char *name;
1997 char c;
1998 char *p;
252b5132 1999 offsetT size;
98027b10 2000 symbolS *symbolP;
252b5132
RH		 2001 offsetT align;
2002 segT old_sec;
2003 int old_subsec;
2004 char *pfrag;
2005 int align2;
2006
2007 name = input_line_pointer;
2008 c = get_symbol_end ();
2009
99a814a1 2010 /* just after name is now '\0'. */
252b5132
RH		 2011 p = input_line_pointer;
2012 *p = c;
2013 SKIP_WHITESPACE ();
2014 if (*input_line_pointer != ',')
2015 {
2016 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2017 ignore_rest_of_line ();
2018 return;
2019 }
2020
2021 input_line_pointer++; /* skip ',' */
2022 if ((size = get_absolute_expression ()) < 0)
2023 {
2024 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2025 ignore_rest_of_line ();
2026 return;
2027 }
2028
2029 /* The third argument to .lcomm is the alignment. */
2030 if (*input_line_pointer != ',')
2031 align = 8;
2032 else
2033 {
2034 ++input_line_pointer;
2035 align = get_absolute_expression ();
2036 if (align <= 0)
2037 {
2038 as_warn (_("ignoring bad alignment"));
2039 align = 8;
2040 }
2041 }
2042
2043 *p = 0;
2044 symbolP = symbol_find_or_make (name);
2045 *p = c;
2046
2047 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2048 {
2049 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2050 S_GET_NAME (symbolP));
2051 ignore_rest_of_line ();
2052 return;
2053 }
2054
2055 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2056 {
2057 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2058 S_GET_NAME (symbolP),
2059 (long) S_GET_VALUE (symbolP),
2060 (long) size);
2061
2062 ignore_rest_of_line ();
2063 return;
2064 }
2065
99a814a1 2066 /* Allocate_bss. */
252b5132
RH		 2067 old_sec = now_seg;
2068 old_subsec = now_subseg;
2069 if (align)
2070 {
99a814a1 2071 /* Convert to a power of 2 alignment. */
252b5132
RH		 2072 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2073 if (align != 1)
2074 {
2075 as_bad (_("Common alignment not a power of 2"));
2076 ignore_rest_of_line ();
2077 return;
2078 }
2079 }
2080 else
2081 align2 = 0;
2082
2083 record_alignment (bss_section, align2);
2084 subseg_set (bss_section, 0);
2085 if (align2)
2086 frag_align (align2, 0, 0);
2087 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2088 symbol_get_frag (symbolP)->fr_symbol = 0;
2089 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2090 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2091 (char *) 0);
2092 *pfrag = 0;
2093 S_SET_SIZE (symbolP, size);
2094 S_SET_SEGMENT (symbolP, bss_section);
2095 subseg_set (old_sec, old_subsec);
2096 demand_empty_rest_of_line ();
2097}
2098
2099/* Validate any relocations emitted for -mrelocatable, possibly adding
2100 fixups for word relocations in writable segments, so we can adjust
2101 them at runtime. */
2102static void
98027b10 2103ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2104{
2105 if (fixp->fx_done || fixp->fx_pcrel)
2106 return;
2107
2108 switch (shlib)
2109 {
2110 case SHLIB_NONE:
2111 case SHLIB_PIC:
2112 return;
2113
5d6f4f16 2114 case SHLIB_MRELOCATABLE:
252b5132
RH		 2115 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2116 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2117 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2118 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2119 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2120 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2121 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2122 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2123 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2124 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2125 && strcmp (segment_name (seg), ".got2") != 0
2126 && strcmp (segment_name (seg), ".dtors") != 0
2127 && strcmp (segment_name (seg), ".ctors") != 0
2128 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2129 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2130 && strcmp (segment_name (seg), ".eh_frame") != 0
2131 && strcmp (segment_name (seg), ".ex_shared") != 0)
2132 {
2133 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2134 || fixp->fx_r_type != BFD_RELOC_CTOR)
2135 {
2136 as_bad_where (fixp->fx_file, fixp->fx_line,
2137 _("Relocation cannot be done when using -mrelocatable"));
2138 }
2139 }
2140 return;
2141 }
2142}
0baf16f2 2143
7e8d4ab4
AM		 2144/* Prevent elf_frob_file_before_adjust removing a weak undefined
2145 function descriptor sym if the corresponding code sym is used. */
2146
2147void
98027b10 2148ppc_frob_file_before_adjust (void)
0baf16f2 2149{
7e8d4ab4 2150 symbolS *symp;
9232bbb0 2151 asection *toc;
0baf16f2 2152
7e8d4ab4
AM		 2153 if (!ppc_obj64)
2154 return;
2155
2156 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2157 {
7e8d4ab4
AM		 2158 const char *name;
2159 char *dotname;
2160 symbolS *dotsym;
2161 size_t len;
2162
2163 name = S_GET_NAME (symp);
2164 if (name[0] == '.')
2165 continue;
2166
2167 if (! S_IS_WEAK (symp)
2168 || S_IS_DEFINED (symp))
2169 continue;
2170
2171 len = strlen (name) + 1;
2172 dotname = xmalloc (len + 1);
2173 dotname[0] = '.';
2174 memcpy (dotname + 1, name, len);
461b725f 2175 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2176 free (dotname);
2177 if (dotsym != NULL && (symbol_used_p (dotsym)
2178 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2179 symbol_mark_used (symp);
2180
0baf16f2
AM		 2181 }
2182
9232bbb0
AM		 2183 toc = bfd_get_section_by_name (stdoutput, ".toc");
2184 if (toc != NULL
01efc3af 2185 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2186 && bfd_section_size (stdoutput, toc) > 0x10000)
2187 as_warn (_("TOC section size exceeds 64k"));
2188
7e8d4ab4
AM		 2189 /* Don't emit .TOC. symbol. */
2190 symp = symbol_find (".TOC.");
2191 if (symp != NULL)
2192 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2193}
252b5132
RH		 2194#endif /* OBJ_ELF */
2195\f
2196#ifdef TE_PE
2197
2198/*
99a814a1 2199 * Summary of parse_toc_entry.
252b5132
RH		 2200 *
2201 * in: Input_line_pointer points to the '[' in one of:
2202 *
2203 * [toc] [tocv] [toc32] [toc64]
2204 *
2205 * Anything else is an error of one kind or another.
2206 *
81d4177b 2207 * out:
252b5132
RH		 2208 * return value: success or failure
2209 * toc_kind: kind of toc reference
2210 * input_line_pointer:
2211 * success: first char after the ']'
2212 * failure: unchanged
2213 *
2214 * settings:
2215 *
2216 * [toc] - rv == success, toc_kind = default_toc
2217 * [tocv] - rv == success, toc_kind = data_in_toc
2218 * [toc32] - rv == success, toc_kind = must_be_32
2219 * [toc64] - rv == success, toc_kind = must_be_64
2220 *
2221 */
2222
81d4177b
KH		 2223enum toc_size_qualifier
2224{
252b5132
RH		 2225 default_toc, /* The toc cell constructed should be the system default size */
2226 data_in_toc, /* This is a direct reference to a toc cell */
2227 must_be_32, /* The toc cell constructed must be 32 bits wide */
2228 must_be_64 /* The toc cell constructed must be 64 bits wide */
2229};
2230
2231static int
98027b10 2232parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2233{
2234 char *start;
2235 char *toc_spec;
2236 char c;
2237 enum toc_size_qualifier t;
2238
99a814a1 2239 /* Save the input_line_pointer. */
252b5132
RH		 2240 start = input_line_pointer;
2241
99a814a1 2242 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2243 ++input_line_pointer;
2244 SKIP_WHITESPACE ();
81d4177b 2245
99a814a1 2246 /* Find the spelling of the operand. */
252b5132
RH		 2247 toc_spec = input_line_pointer;
2248 c = get_symbol_end ();
2249
99a814a1 2250 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2251 {
2252 t = default_toc;
2253 }
99a814a1 2254 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2255 {
2256 t = data_in_toc;
2257 }
99a814a1 2258 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2259 {
2260 t = must_be_32;
2261 }
99a814a1 2262 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2263 {
2264 t = must_be_64;
2265 }
2266 else
2267 {
2268 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2269 *input_line_pointer = c;
2270 input_line_pointer = start;
252b5132
RH		 2271 return 0;
2272 }
2273
99a814a1
AM		 2274 /* Now find the ']'. */
2275 *input_line_pointer = c;
252b5132 2276
81d4177b
KH		 2277 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2278 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2279
2280 if (c != ']')
2281 {
2282 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2283 input_line_pointer = start;
252b5132
RH		 2284 return 0;
2285 }
2286
99a814a1 2287 *toc_kind = t;
252b5132
RH		 2288 return 1;
2289}
2290#endif
2291\f
2292
dc1d03fc 2293#ifdef OBJ_ELF
6a0c61b7
EZ		 2294#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2295static void
98027b10 2296ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2297{
2298 unsigned int i;
2299
2300 /* Check we don't already exist. */
2301 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2302 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2303 return;
b34976b6 2304
6a0c61b7
EZ		 2305 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2306 {
2307 if (ppc_apuinfo_num_alloc == 0)
2308 {
2309 ppc_apuinfo_num_alloc = 4;
2310 ppc_apuinfo_list = (unsigned long *)
2311 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2312 }
2313 else
2314 {
2315 ppc_apuinfo_num_alloc += 4;
2316 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2317 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2318 }
2319 }
dc1d03fc 2320 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2321}
2322#undef APUID
dc1d03fc 2323#endif
6a0c61b7
EZ		 2324\f
2325
252b5132
RH		 2326/* We need to keep a list of fixups. We can't simply generate them as
2327 we go, because that would require us to first create the frag, and
2328 that would screw up references to ``.''. */
2329
2330struct ppc_fixup
2331{
2332 expressionS exp;
2333 int opindex;
2334 bfd_reloc_code_real_type reloc;
2335};
2336
2337#define MAX_INSN_FIXUPS (5)
2338
2339/* This routine is called for each instruction to be assembled. */
2340
2341void
98027b10 2342md_assemble (char *str)
252b5132
RH		 2343{
2344 char *s;
2345 const struct powerpc_opcode *opcode;
2346 unsigned long insn;
2347 const unsigned char *opindex_ptr;
2348 int skip_optional;
2349 int need_paren;
2350 int next_opindex;
2351 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2352 int fc;
2353 char *f;
09b935ac 2354 int addr_mod;
252b5132
RH		 2355 int i;
2356#ifdef OBJ_ELF
2357 bfd_reloc_code_real_type reloc;
2358#endif
2359
2360 /* Get the opcode. */
3882b010 2361 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2362 ;
2363 if (*s != '\0')
2364 *s++ = '\0';
2365
2366 /* Look up the opcode in the hash table. */
2367 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2368 if (opcode == (const struct powerpc_opcode *) NULL)
2369 {
2370 const struct powerpc_macro *macro;
2371
2372 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2373 if (macro == (const struct powerpc_macro *) NULL)
2374 as_bad (_("Unrecognized opcode: `%s'"), str);
2375 else
2376 ppc_macro (s, macro);
2377
2378 return;
2379 }
2380
2381 insn = opcode->opcode;
2382
2383 str = s;
3882b010 2384 while (ISSPACE (*str))
252b5132
RH		 2385 ++str;
2386
2387 /* PowerPC operands are just expressions. The only real issue is
2388 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2389 an optional operand separate the operands only with commas (in some
2390 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2391 have optional operands). Most instructions with optional operands
2392 have only one. Those that have more than one optional operand can
2393 take either all their operands or none. So, before we start seriously
2394 parsing the operands, we check to see if we have optional operands,
2395 and if we do, we count the number of commas to see which operands
2396 have been omitted. */
252b5132
RH		 2397 skip_optional = 0;
2398 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2399 {
2400 const struct powerpc_operand *operand;
2401
2402 operand = &powerpc_operands[*opindex_ptr];
2403 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2404 {
2405 unsigned int opcount;
7fe9cf6b 2406 unsigned int num_operands_expected;
252b5132
RH		 2407
2408 /* There is an optional operand. Count the number of
2409 commas in the input line. */
2410 if (*str == '\0')
2411 opcount = 0;
2412 else
2413 {
2414 opcount = 1;
2415 s = str;
2416 while ((s = strchr (s, ',')) != (char *) NULL)
2417 {
2418 ++opcount;
2419 ++s;
2420 }
2421 }
2422
7fe9cf6b
NC		 2423 /* Compute the number of expected operands.
2424 Do not count fake operands. */
2425 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2426 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2427 ++ num_operands_expected;
2428
252b5132
RH		 2429 /* If there are fewer operands in the line then are called
2430 for by the instruction, we want to skip the optional
1f6c9eb0 2431 operands. */
7fe9cf6b 2432 if (opcount < num_operands_expected)
252b5132
RH		 2433 skip_optional = 1;
2434
2435 break;
2436 }
2437 }
2438
2439 /* Gather the operands. */
2440 need_paren = 0;
2441 next_opindex = 0;
2442 fc = 0;
2443 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2444 {
2445 const struct powerpc_operand *operand;
2446 const char *errmsg;
2447 char *hold;
2448 expressionS ex;
2449 char endc;
2450
2451 if (next_opindex == 0)
2452 operand = &powerpc_operands[*opindex_ptr];
2453 else
2454 {
2455 operand = &powerpc_operands[next_opindex];
2456 next_opindex = 0;
2457 }
252b5132
RH		 2458 errmsg = NULL;
2459
2460 /* If this is a fake operand, then we do not expect anything
2461 from the input. */
2462 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2463 {
2b3c4602 2464 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2465 if (errmsg != (const char *) NULL)
ee2c9aa9 2466 as_bad ("%s", errmsg);
252b5132
RH		 2467 continue;
2468 }
2469
2470 /* If this is an optional operand, and we are skipping it, just
2471 insert a zero. */
2472 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2473 && skip_optional)
2474 {
2475 if (operand->insert)
2476 {
2b3c4602 2477 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2478 if (errmsg != (const char *) NULL)
ee2c9aa9 2479 as_bad ("%s", errmsg);
252b5132
RH		 2480 }
2481 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2482 next_opindex = *opindex_ptr + 1;
2483 continue;
2484 }
2485
2486 /* Gather the operand. */
2487 hold = input_line_pointer;
2488 input_line_pointer = str;
2489
2490#ifdef TE_PE
81d4177b 2491 if (*input_line_pointer == '[')
252b5132
RH		 2492 {
2493 /* We are expecting something like the second argument here:
99a814a1
AM		 2494 *
2495 * lwz r4,[toc].GS.0.static_int(rtoc)
2496 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2497 * The argument following the `]' must be a symbol name, and the
2498 * register must be the toc register: 'rtoc' or '2'
2499 *
2500 * The effect is to 0 as the displacement field
2501 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2502 * the appropriate variation) reloc against it based on the symbol.
2503 * The linker will build the toc, and insert the resolved toc offset.
2504 *
2505 * Note:
2506 * o The size of the toc entry is currently assumed to be
2507 * 32 bits. This should not be assumed to be a hard coded
2508 * number.
2509 * o In an effort to cope with a change from 32 to 64 bits,
2510 * there are also toc entries that are specified to be
2511 * either 32 or 64 bits:
2512 * lwz r4,[toc32].GS.0.static_int(rtoc)
2513 * lwz r4,[toc64].GS.0.static_int(rtoc)
2514 * These demand toc entries of the specified size, and the
2515 * instruction probably requires it.
2516 */
252b5132
RH		 2517
2518 int valid_toc;
2519 enum toc_size_qualifier toc_kind;
2520 bfd_reloc_code_real_type toc_reloc;
2521
99a814a1
AM		 2522 /* Go parse off the [tocXX] part. */
2523 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2524
81d4177b 2525 if (!valid_toc)
252b5132 2526 {
99a814a1
AM		 2527 /* Note: message has already been issued.
2528 FIXME: what sort of recovery should we do?
2529 demand_rest_of_line (); return; ? */
252b5132
RH		 2530 }
2531
99a814a1
AM		 2532 /* Now get the symbol following the ']'. */
2533 expression (&ex);
252b5132
RH		 2534
2535 switch (toc_kind)
2536 {
2537 case default_toc:
99a814a1
AM		 2538 /* In this case, we may not have seen the symbol yet,
2539 since it is allowed to appear on a .extern or .globl
2540 or just be a label in the .data section. */
252b5132
RH		 2541 toc_reloc = BFD_RELOC_PPC_TOC16;
2542 break;
2543 case data_in_toc:
99a814a1
AM		 2544 /* 1. The symbol must be defined and either in the toc
2545 section, or a global.
2546 2. The reloc generated must have the TOCDEFN flag set
2547 in upper bit mess of the reloc type.
2548 FIXME: It's a little confusing what the tocv
2549 qualifier can be used for. At the very least, I've
2550 seen three uses, only one of which I'm sure I can
2551 explain. */
81d4177b
KH		 2552 if (ex.X_op == O_symbol)
2553 {
9c2799c2 2554 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2555 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2556 != tocdata_section)
252b5132 2557 {
99a814a1 2558 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2559 }
2560 }
2561
2562 toc_reloc = BFD_RELOC_PPC_TOC16;
2563 break;
2564 case must_be_32:
99a814a1
AM		 2565 /* FIXME: these next two specifically specify 32/64 bit
2566 toc entries. We don't support them today. Is this
2567 the right way to say that? */
252b5132
RH		 2568 toc_reloc = BFD_RELOC_UNUSED;
2569 as_bad (_("Unimplemented toc32 expression modifier"));
2570 break;
2571 case must_be_64:
99a814a1 2572 /* FIXME: see above. */
252b5132
RH		 2573 toc_reloc = BFD_RELOC_UNUSED;
2574 as_bad (_("Unimplemented toc64 expression modifier"));
2575 break;
2576 default:
bc805888 2577 fprintf (stderr,
99a814a1
AM		 2578 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2579 toc_kind);
bc805888 2580 abort ();
252b5132
RH		 2581 break;
2582 }
2583
2584 /* We need to generate a fixup for this expression. */
2585 if (fc >= MAX_INSN_FIXUPS)
2586 as_fatal (_("too many fixups"));
2587
2588 fixups[fc].reloc = toc_reloc;
2589 fixups[fc].exp = ex;
2590 fixups[fc].opindex = *opindex_ptr;
2591 ++fc;
2592
99a814a1
AM		 2593 /* Ok. We've set up the fixup for the instruction. Now make it
2594 look like the constant 0 was found here. */
252b5132
RH		 2595 ex.X_unsigned = 1;
2596 ex.X_op = O_constant;
2597 ex.X_add_number = 0;
2598 ex.X_add_symbol = NULL;
2599 ex.X_op_symbol = NULL;
2600 }
2601
2602 else
2603#endif /* TE_PE */
2604 {
2ad068be
AM		 2605 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2606 || !register_name (&ex))
252b5132 2607 {
13abbae3
AM		 2608 char save_lex = lex_type['%'];
2609
252b5132 2610 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2611 {
2612 cr_operand = TRUE;
2613 lex_type['%'] |= LEX_BEGIN_NAME;
2614 }
252b5132 2615 expression (&ex);
b34976b6 2616 cr_operand = FALSE;
13abbae3 2617 lex_type['%'] = save_lex;
252b5132
RH		 2618 }
2619 }
2620
2621 str = input_line_pointer;
2622 input_line_pointer = hold;
2623
2624 if (ex.X_op == O_illegal)
2625 as_bad (_("illegal operand"));
2626 else if (ex.X_op == O_absent)
2627 as_bad (_("missing operand"));
2628 else if (ex.X_op == O_register)
2629 {
2630 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2631 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2632 }
2633 else if (ex.X_op == O_constant)
2634 {
2635#ifdef OBJ_ELF
81d4177b 2636 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2637 char *orig_str = str;
2638
2639 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2640 switch (reloc)
2641 {
2642 default:
2643 str = orig_str;
2644 break;
2645
2646 case BFD_RELOC_LO16:
2647 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2648 something which cleared it, we always produce a
2649 signed value. */
2650 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2651 ex.X_add_number &= 0xffff;
2652 else
0baf16f2 2653 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2654 break;
2655
2656 case BFD_RELOC_HI16:
0baf16f2
AM		 2657 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2658 ex.X_add_number = PPC_HI (ex.X_add_number);
2659 else
2660 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2661 break;
2662
2663 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2664 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2665 ex.X_add_number = PPC_HA (ex.X_add_number);
2666 else
2667 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2668 break;
2669
0baf16f2
AM		 2670 case BFD_RELOC_PPC64_HIGHER:
2671 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2672 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2673 else
2674 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2675 break;
2676
2677 case BFD_RELOC_PPC64_HIGHER_S:
2678 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2679 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2680 else
2681 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2682 break;
0baf16f2
AM		 2683
2684 case BFD_RELOC_PPC64_HIGHEST:
2685 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2686 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2687 else
2688 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2689 break;
2690
2691 case BFD_RELOC_PPC64_HIGHEST_S:
2692 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2693 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2694 else
2695 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2696 break;
252b5132 2697 }
0baf16f2 2698#endif /* OBJ_ELF */
252b5132 2699 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2700 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2701 }
2702#ifdef OBJ_ELF
727fc41e 2703 else
252b5132 2704 {
727fc41e 2705 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2706 {
727fc41e
AM		 2707 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2708 if (sym_name[0] == '.')
2709 ++sym_name;
cdba85ec 2710
727fc41e 2711 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2712 {
727fc41e
AM		 2713 expressionS tls_exp;
2714
2715 hold = input_line_pointer;
2716 input_line_pointer = str + 1;
2717 expression (&tls_exp);
2718 if (tls_exp.X_op == O_symbol)
2719 {
2720 reloc = BFD_RELOC_UNUSED;
2721 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2722 {
2723 reloc = BFD_RELOC_PPC_TLSGD;
2724 input_line_pointer += 7;
2725 }
2726 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2727 {
2728 reloc = BFD_RELOC_PPC_TLSLD;
2729 input_line_pointer += 7;
2730 }
2731 if (reloc != BFD_RELOC_UNUSED)
2732 {
2733 SKIP_WHITESPACE ();
2734 str = input_line_pointer;
2735
2736 if (fc >= MAX_INSN_FIXUPS)
2737 as_fatal (_("too many fixups"));
2738 fixups[fc].exp = tls_exp;
2739 fixups[fc].opindex = *opindex_ptr;
2740 fixups[fc].reloc = reloc;
2741 ++fc;
2742 }
2743 }
2744 input_line_pointer = hold;
252b5132
RH		 2745 }
2746 }
2747
727fc41e 2748 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2749 {
727fc41e 2750 /* Some TLS tweaks. */
0baf16f2
AM		 2751 switch (reloc)
2752 {
727fc41e 2753 default:
cdba85ec 2754 break;
727fc41e
AM		 2755
2756 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2757 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2758 as_bad (_("@tls may not be used with \"%s\" operands"),
2759 opcode->name);
2760 else if (operand->shift != 11)
2761 as_bad (_("@tls may only be used in last operand"));
2762 else
2763 insn = ppc_insert_operand (insn, operand,
2764 ppc_obj64 ? 13 : 2,
2765 ppc_cpu, (char *) NULL, 0);
cdba85ec 2766 break;
727fc41e
AM		 2767
2768 /* We'll only use the 32 (or 64) bit form of these relocations
2769 in constants. Instructions get the 16 bit form. */
2770 case BFD_RELOC_PPC_DTPREL:
2771 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2772 break;
727fc41e
AM		 2773 case BFD_RELOC_PPC_TPREL:
2774 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2775 break;
2776 }
727fc41e
AM		 2777
2778 /* For the absolute forms of branches, convert the PC
2779 relative form back into the absolute. */
2780 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2781 {
2782 switch (reloc)
2783 {
2784 case BFD_RELOC_PPC_B26:
2785 reloc = BFD_RELOC_PPC_BA26;
2786 break;
2787 case BFD_RELOC_PPC_B16:
2788 reloc = BFD_RELOC_PPC_BA16;
2789 break;
2790 case BFD_RELOC_PPC_B16_BRTAKEN:
2791 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2792 break;
2793 case BFD_RELOC_PPC_B16_BRNTAKEN:
2794 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2795 break;
2796 default:
2797 break;
2798 }
2799 }
2800
01efc3af
AM		 2801 switch (reloc)
2802 {
2803 case BFD_RELOC_PPC_TOC16:
2804 toc_reloc_types |= has_small_toc_reloc;
2805 break;
2806 case BFD_RELOC_PPC64_TOC16_LO:
2807 case BFD_RELOC_PPC64_TOC16_HI:
2808 case BFD_RELOC_PPC64_TOC16_HA:
2809 toc_reloc_types |= has_large_toc_reloc;
2810 break;
2811 default:
2812 break;
2813 }
2814
727fc41e
AM		 2815 if (ppc_obj64
2816 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2817 {
2818 switch (reloc)
2819 {
2820 case BFD_RELOC_16:
2821 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2822 break;
2823 case BFD_RELOC_LO16:
2824 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2825 break;
2826 case BFD_RELOC_16_GOTOFF:
2827 reloc = BFD_RELOC_PPC64_GOT16_DS;
2828 break;
2829 case BFD_RELOC_LO16_GOTOFF:
2830 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2831 break;
2832 case BFD_RELOC_LO16_PLTOFF:
2833 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2834 break;
2835 case BFD_RELOC_16_BASEREL:
2836 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2837 break;
2838 case BFD_RELOC_LO16_BASEREL:
2839 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2840 break;
2841 case BFD_RELOC_PPC_TOC16:
2842 reloc = BFD_RELOC_PPC64_TOC16_DS;
2843 break;
2844 case BFD_RELOC_PPC64_TOC16_LO:
2845 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2846 break;
2847 case BFD_RELOC_PPC64_PLTGOT16:
2848 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2849 break;
2850 case BFD_RELOC_PPC64_PLTGOT16_LO:
2851 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2852 break;
2853 case BFD_RELOC_PPC_DTPREL16:
2854 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2855 break;
2856 case BFD_RELOC_PPC_DTPREL16_LO:
2857 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2858 break;
2859 case BFD_RELOC_PPC_TPREL16:
2860 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2861 break;
2862 case BFD_RELOC_PPC_TPREL16_LO:
2863 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2864 break;
2865 case BFD_RELOC_PPC_GOT_DTPREL16:
2866 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2867 case BFD_RELOC_PPC_GOT_TPREL16:
2868 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2869 break;
2870 default:
2871 as_bad (_("unsupported relocation for DS offset field"));
2872 break;
2873 }
2874 }
0baf16f2
AM		 2875 }
2876
252b5132
RH		 2877 /* We need to generate a fixup for this expression. */
2878 if (fc >= MAX_INSN_FIXUPS)
2879 as_fatal (_("too many fixups"));
2880 fixups[fc].exp = ex;
727fc41e 2881 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2882 fixups[fc].reloc = reloc;
2883 ++fc;
2884 }
727fc41e 2885#else /* OBJ_ELF */
252b5132
RH		 2886 else
2887 {
2888 /* We need to generate a fixup for this expression. */
2889 if (fc >= MAX_INSN_FIXUPS)
2890 as_fatal (_("too many fixups"));
2891 fixups[fc].exp = ex;
2892 fixups[fc].opindex = *opindex_ptr;
2893 fixups[fc].reloc = BFD_RELOC_UNUSED;
2894 ++fc;
2895 }
727fc41e 2896#endif /* OBJ_ELF */
252b5132
RH		 2897
2898 if (need_paren)
2899 {
2900 endc = ')';
2901 need_paren = 0;
c3d65c1c
BE		 2902 /* If expecting more operands, then we want to see "),". */
2903 if (*str == endc && opindex_ptr[1] != 0)
2904 {
2905 do
2906 ++str;
2907 while (ISSPACE (*str));
2908 endc = ',';
2909 }
252b5132
RH		 2910 }
2911 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2912 {
2913 endc = '(';
2914 need_paren = 1;
2915 }
2916 else
2917 endc = ',';
2918
2919 /* The call to expression should have advanced str past any
2920 whitespace. */
2921 if (*str != endc
2922 && (endc != ',' || *str != '\0'))
2923 {
5a938047
AM		 2924 if (*str == '\0')
2925 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2926 else
2927 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2928 break;
2929 }
2930
2931 if (*str != '\0')
2932 ++str;
2933 }
2934
3882b010 2935 while (ISSPACE (*str))
252b5132
RH		 2936 ++str;
2937
2938 if (*str != '\0')
2939 as_bad (_("junk at end of line: `%s'"), str);
2940
dc1d03fc 2941#ifdef OBJ_ELF
6a0c61b7 2942 /* Do we need/want a APUinfo section? */
e01d869a 2943 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2944 {
2945 /* These are all version "1". */
2946 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2947 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2948 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2949 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2950 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2951 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2952 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2953 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2954 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2955 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2956 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2957 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2958 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2959 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2960 }
dc1d03fc 2961#endif
6a0c61b7 2962
252b5132
RH		 2963 /* Write out the instruction. */
2964 f = frag_more (4);
09b935ac
AM		 2965 addr_mod = frag_now_fix () & 3;
2966 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2967 as_bad (_("instruction address is not a multiple of 4"));
2968 frag_now->insn_addr = addr_mod;
2969 frag_now->has_code = 1;
252b5132
RH		 2970 md_number_to_chars (f, insn, 4);
2971
5d6f4f16
GK		 2972#ifdef OBJ_ELF
2973 dwarf2_emit_insn (4);
2974#endif
2975
252b5132
RH		 2976 /* Create any fixups. At this point we do not use a
2977 bfd_reloc_code_real_type, but instead just use the
2978 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2979 handle fixups for any operand type, although that is admittedly
2980 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2981 md_apply_fix. */
252b5132
RH		 2982 for (i = 0; i < fc; i++)
2983 {
252b5132
RH		 2984 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2985 {
99a814a1 2986 reloc_howto_type *reloc_howto;
252b5132
RH		 2987 int size;
2988 int offset;
2989 fixS *fixP;
2990
99a814a1 2991 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2992 if (!reloc_howto)
2993 abort ();
2994
2995 size = bfd_get_reloc_size (reloc_howto);
2996 offset = target_big_endian ? (4 - size) : 0;
2997
2998 if (size < 1 || size > 4)
bc805888 2999 abort ();
252b5132 3000
99a814a1
AM		 3001 fixP = fix_new_exp (frag_now,
3002 f - frag_now->fr_literal + offset,
3003 size,
3004 &fixups[i].exp,
3005 reloc_howto->pc_relative,
252b5132
RH		 3006 fixups[i].reloc);
3007
3008 /* Turn off complaints that the addend is too large for things like
3009 foo+100000@ha. */
3010 switch (fixups[i].reloc)
3011 {
3012 case BFD_RELOC_16_GOTOFF:
3013 case BFD_RELOC_PPC_TOC16:
3014 case BFD_RELOC_LO16:
3015 case BFD_RELOC_HI16:
3016 case BFD_RELOC_HI16_S:
0baf16f2 3017#ifdef OBJ_ELF
0baf16f2
AM		 3018 case BFD_RELOC_PPC64_HIGHER:
3019 case BFD_RELOC_PPC64_HIGHER_S:
3020 case BFD_RELOC_PPC64_HIGHEST:
3021 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3022#endif
252b5132
RH		 3023 fixP->fx_no_overflow = 1;
3024 break;
3025 default:
3026 break;
3027 }
3028 }
3029 else
727fc41e
AM		 3030 {
3031 const struct powerpc_operand *operand;
3032
3033 operand = &powerpc_operands[fixups[i].opindex];
3034 fix_new_exp (frag_now,
3035 f - frag_now->fr_literal,
3036 4,
3037 &fixups[i].exp,
3038 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3039 ((bfd_reloc_code_real_type)
3040 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3041 }
252b5132
RH		 3042 }
3043}
3044
3045/* Handle a macro. Gather all the operands, transform them as
3046 described by the macro, and call md_assemble recursively. All the
3047 operands are separated by commas; we don't accept parentheses
3048 around operands here. */
3049
3050static void
98027b10 3051ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3052{
3053 char *operands[10];
3054 unsigned int count;
3055 char *s;
3056 unsigned int len;
3057 const char *format;
db557034 3058 unsigned int arg;
252b5132
RH		 3059 char *send;
3060 char *complete;
3061
3062 /* Gather the users operands into the operands array. */
3063 count = 0;
3064 s = str;
3065 while (1)
3066 {
3067 if (count >= sizeof operands / sizeof operands[0])
3068 break;
3069 operands[count++] = s;
3070 s = strchr (s, ',');
3071 if (s == (char *) NULL)
3072 break;
3073 *s++ = '\0';
81d4177b 3074 }
252b5132
RH		 3075
3076 if (count != macro->operands)
3077 {
3078 as_bad (_("wrong number of operands"));
3079 return;
3080 }
3081
3082 /* Work out how large the string must be (the size is unbounded
3083 because it includes user input). */
3084 len = 0;
3085 format = macro->format;
3086 while (*format != '\0')
3087 {
3088 if (*format != '%')
3089 {
3090 ++len;
3091 ++format;
3092 }
3093 else
3094 {
3095 arg = strtol (format + 1, &send, 10);
db557034 3096 know (send != format && arg < count);
252b5132
RH		 3097 len += strlen (operands[arg]);
3098 format = send;
3099 }
3100 }
3101
3102 /* Put the string together. */
3103 complete = s = (char *) alloca (len + 1);
3104 format = macro->format;
3105 while (*format != '\0')
3106 {
3107 if (*format != '%')
3108 *s++ = *format++;
3109 else
3110 {
3111 arg = strtol (format + 1, &send, 10);
3112 strcpy (s, operands[arg]);
3113 s += strlen (s);
3114 format = send;
3115 }
3116 }
3117 *s = '\0';
3118
3119 /* Assemble the constructed instruction. */
3120 md_assemble (complete);
81d4177b 3121}
252b5132
RH		 3122\f
3123#ifdef OBJ_ELF
18ae9cc1 3124/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3125
3126int
98027b10 3127ppc_section_type (char *str, size_t len)
252b5132 3128{
9de8d8f1
RH		 3129 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3130 return SHT_ORDERED;
252b5132 3131
9de8d8f1 3132 return -1;
252b5132
RH		 3133}
3134
3135int
1239de13 3136ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3137{
3138 if (type == SHT_ORDERED)
3139 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3140
252b5132
RH		 3141 return flags;
3142}
3143#endif /* OBJ_ELF */
3144
3145\f
3146/* Pseudo-op handling. */
3147
3148/* The .byte pseudo-op. This is similar to the normal .byte
3149 pseudo-op, but it can also take a single ASCII string. */
3150
3151static void
98027b10 3152ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3153{
3154 if (*input_line_pointer != '\"')
3155 {
3156 cons (1);
3157 return;
3158 }
3159
3160 /* Gather characters. A real double quote is doubled. Unusual
3161 characters are not permitted. */
3162 ++input_line_pointer;
3163 while (1)
3164 {
3165 char c;
3166
3167 c = *input_line_pointer++;
3168
3169 if (c == '\"')
3170 {
3171 if (*input_line_pointer != '\"')
3172 break;
3173 ++input_line_pointer;
3174 }
3175
3176 FRAG_APPEND_1_CHAR (c);
3177 }
3178
3179 demand_empty_rest_of_line ();
3180}
3181\f
3182#ifdef OBJ_XCOFF
3183
3184/* XCOFF specific pseudo-op handling. */
3185
3186/* This is set if we are creating a .stabx symbol, since we don't want
3187 to handle symbol suffixes for such symbols. */
b34976b6 3188static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3189
3190/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3191 symbols in the .bss segment as though they were local common
67c1ffbe 3192 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3193 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3194
3195static void
98027b10 3196ppc_comm (int lcomm)
252b5132
RH		 3197{
3198 asection *current_seg = now_seg;
3199 subsegT current_subseg = now_subseg;
3200 char *name;
3201 char endc;
3202 char *end_name;
3203 offsetT size;
3204 offsetT align;
3205 symbolS *lcomm_sym = NULL;
3206 symbolS *sym;
3207 char *pfrag;
3208
3209 name = input_line_pointer;
3210 endc = get_symbol_end ();
3211 end_name = input_line_pointer;
3212 *end_name = endc;
3213
3214 if (*input_line_pointer != ',')
3215 {
3216 as_bad (_("missing size"));
3217 ignore_rest_of_line ();
3218 return;
3219 }
3220 ++input_line_pointer;
3221
3222 size = get_absolute_expression ();
3223 if (size < 0)
3224 {
3225 as_bad (_("negative size"));
3226 ignore_rest_of_line ();
3227 return;
3228 }
3229
3230 if (! lcomm)
3231 {
3232 /* The third argument to .comm is the alignment. */
3233 if (*input_line_pointer != ',')
1ad63b2f 3234 align = 2;
252b5132
RH		 3235 else
3236 {
3237 ++input_line_pointer;
3238 align = get_absolute_expression ();
3239 if (align <= 0)
3240 {
3241 as_warn (_("ignoring bad alignment"));
1ad63b2f 3242 align = 2;
252b5132
RH		 3243 }
3244 }
3245 }
3246 else
3247 {
3248 char *lcomm_name;
3249 char lcomm_endc;
3250
1ad63b2f 3251 if (size <= 4)
252b5132
RH		 3252 align = 2;
3253 else
3254 align = 3;
3255
3256 /* The third argument to .lcomm appears to be the real local
3257 common symbol to create. References to the symbol named in
3258 the first argument are turned into references to the third
3259 argument. */
3260 if (*input_line_pointer != ',')
3261 {
3262 as_bad (_("missing real symbol name"));
3263 ignore_rest_of_line ();
3264 return;
3265 }
3266 ++input_line_pointer;
3267
3268 lcomm_name = input_line_pointer;
3269 lcomm_endc = get_symbol_end ();
81d4177b 3270
252b5132
RH		 3271 lcomm_sym = symbol_find_or_make (lcomm_name);
3272
3273 *input_line_pointer = lcomm_endc;
3274 }
3275
3276 *end_name = '\0';
3277 sym = symbol_find_or_make (name);
3278 *end_name = endc;
3279
3280 if (S_IS_DEFINED (sym)
3281 || S_GET_VALUE (sym) != 0)
3282 {
3283 as_bad (_("attempt to redefine symbol"));
3284 ignore_rest_of_line ();
3285 return;
3286 }
81d4177b 3287
252b5132 3288 record_alignment (bss_section, align);
81d4177b 3289
252b5132
RH		 3290 if (! lcomm
3291 || ! S_IS_DEFINED (lcomm_sym))
3292 {
3293 symbolS *def_sym;
3294 offsetT def_size;
3295
3296 if (! lcomm)
3297 {
3298 def_sym = sym;
3299 def_size = size;
3300 S_SET_EXTERNAL (sym);
3301 }
3302 else
3303 {
809ffe0d 3304 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3305 def_sym = lcomm_sym;
3306 def_size = 0;
3307 }
3308
3309 subseg_set (bss_section, 1);
3310 frag_align (align, 0, 0);
81d4177b 3311
809ffe0d 3312 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3313 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3314 def_size, (char *) NULL);
3315 *pfrag = 0;
3316 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3317 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3318 }
3319 else if (lcomm)
3320 {
3321 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3322 symbol_get_frag (lcomm_sym)->fr_offset =
3323 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3324 &~ ((1 << align) - 1));
809ffe0d
ILT		 3325 if (align > symbol_get_tc (lcomm_sym)->align)
3326 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3327 }
3328
3329 if (lcomm)
3330 {
3331 /* Make sym an offset from lcomm_sym. */
3332 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3333 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3334 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3335 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3336 }
3337
3338 subseg_set (current_seg, current_subseg);
3339
3340 demand_empty_rest_of_line ();
3341}
3342
3343/* The .csect pseudo-op. This switches us into a different
3344 subsegment. The first argument is a symbol whose value is the
3345 start of the .csect. In COFF, csect symbols get special aux
3346 entries defined by the x_csect field of union internal_auxent. The
3347 optional second argument is the alignment (the default is 2). */
3348
3349static void
98027b10 3350ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3351{
3352 char *name;
3353 char endc;
3354 symbolS *sym;
931e13a6 3355 offsetT align;
252b5132
RH		 3356
3357 name = input_line_pointer;
3358 endc = get_symbol_end ();
81d4177b 3359
252b5132
RH		 3360 sym = symbol_find_or_make (name);
3361
3362 *input_line_pointer = endc;
3363
3364 if (S_GET_NAME (sym)[0] == '\0')
3365 {
3366 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3367 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3368 }
3369
931e13a6 3370 align = 2;
252b5132
RH		 3371 if (*input_line_pointer == ',')
3372 {
3373 ++input_line_pointer;
931e13a6 3374 align = get_absolute_expression ();
252b5132
RH		 3375 }
3376
931e13a6
AM		 3377 ppc_change_csect (sym, align);
3378
252b5132
RH		 3379 demand_empty_rest_of_line ();
3380}
3381
3382/* Change to a different csect. */
3383
3384static void
98027b10 3385ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3386{
3387 if (S_IS_DEFINED (sym))
809ffe0d 3388 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3389 else
3390 {
3391 symbolS **list_ptr;
3392 int after_toc;
3393 int hold_chunksize;
3394 symbolS *list;
931e13a6
AM		 3395 int is_code;
3396 segT sec;
252b5132
RH		 3397
3398 /* This is a new csect. We need to look at the symbol class to
3399 figure out whether it should go in the text section or the
3400 data section. */
3401 after_toc = 0;
931e13a6 3402 is_code = 0;
96d56e9f 3403 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3404 {
3405 case XMC_PR:
3406 case XMC_RO:
3407 case XMC_DB:
3408 case XMC_GL:
3409 case XMC_XO:
3410 case XMC_SV:
3411 case XMC_TI:
3412 case XMC_TB:
3413 S_SET_SEGMENT (sym, text_section);
809ffe0d 3414 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3415 ++ppc_text_subsegment;
3416 list_ptr = &ppc_text_csects;
931e13a6 3417 is_code = 1;
252b5132
RH		 3418 break;
3419 case XMC_RW:
3420 case XMC_TC0:
3421 case XMC_TC:
3422 case XMC_DS:
3423 case XMC_UA:
3424 case XMC_BS:
3425 case XMC_UC:
3426 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3427 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3428 == ppc_data_subsegment))
252b5132
RH		 3429 after_toc = 1;
3430 S_SET_SEGMENT (sym, data_section);
809ffe0d 3431 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3432 ++ppc_data_subsegment;
3433 list_ptr = &ppc_data_csects;
3434 break;
3435 default:
3436 abort ();
3437 }
3438
3439 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3440 changing subsegments, so that we don't use a lot of memory
3441 space for what may be a small section. */
252b5132
RH		 3442 hold_chunksize = chunksize;
3443 chunksize = 64;
3444
931e13a6
AM		 3445 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3446 symbol_get_tc (sym)->subseg);
252b5132
RH		 3447
3448 chunksize = hold_chunksize;
3449
3450 if (after_toc)
3451 ppc_after_toc_frag = frag_now;
3452
931e13a6
AM		 3453 record_alignment (sec, align);
3454 if (is_code)
3455 frag_align_code (align, 0);
3456 else
3457 frag_align (align, 0, 0);
3458
809ffe0d 3459 symbol_set_frag (sym, frag_now);
252b5132
RH		 3460 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3461
931e13a6 3462 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3463 symbol_get_tc (sym)->output = 1;
3464 symbol_get_tc (sym)->within = sym;
81d4177b 3465
252b5132 3466 for (list = *list_ptr;
809ffe0d
ILT		 3467 symbol_get_tc (list)->next != (symbolS *) NULL;
3468 list = symbol_get_tc (list)->next)
252b5132 3469 ;
809ffe0d 3470 symbol_get_tc (list)->next = sym;
81d4177b 3471
252b5132 3472 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3473 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3474 &symbol_lastP);
252b5132
RH		 3475 }
3476
3477 ppc_current_csect = sym;
3478}
3479
3480/* This function handles the .text and .data pseudo-ops. These
3481 pseudo-ops aren't really used by XCOFF; we implement them for the
3482 convenience of people who aren't used to XCOFF. */
3483
3484static void
98027b10 3485ppc_section (int type)
252b5132
RH		 3486{
3487 const char *name;
3488 symbolS *sym;
3489
3490 if (type == 't')
3491 name = ".text[PR]";
3492 else if (type == 'd')
3493 name = ".data[RW]";
3494 else
3495 abort ();
3496
3497 sym = symbol_find_or_make (name);
3498
931e13a6 3499 ppc_change_csect (sym, 2);
252b5132
RH		 3500
3501 demand_empty_rest_of_line ();
3502}
3503
3504/* This function handles the .section pseudo-op. This is mostly to
3505 give an error, since XCOFF only supports .text, .data and .bss, but
3506 we do permit the user to name the text or data section. */
3507
3508static void
98027b10 3509ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3510{
3511 char *user_name;
3512 const char *real_name;
3513 char c;
3514 symbolS *sym;
3515
3516 user_name = input_line_pointer;
3517 c = get_symbol_end ();
3518
3519 if (strcmp (user_name, ".text") == 0)
3520 real_name = ".text[PR]";
3521 else if (strcmp (user_name, ".data") == 0)
3522 real_name = ".data[RW]";
3523 else
3524 {
3525 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3526 *input_line_pointer = c;
3527 ignore_rest_of_line ();
3528 return;
3529 }
3530
3531 *input_line_pointer = c;
3532
3533 sym = symbol_find_or_make (real_name);
3534
931e13a6 3535 ppc_change_csect (sym, 2);
252b5132
RH		 3536
3537 demand_empty_rest_of_line ();
3538}
3539
3540/* The .extern pseudo-op. We create an undefined symbol. */
3541
3542static void
98027b10 3543ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3544{
3545 char *name;
3546 char endc;
3547
3548 name = input_line_pointer;
3549 endc = get_symbol_end ();
3550
3551 (void) symbol_find_or_make (name);
3552
3553 *input_line_pointer = endc;
3554
3555 demand_empty_rest_of_line ();
3556}
3557
3558/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3559
3560static void
98027b10 3561ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3562{
3563 char *name;
3564 char endc;
3565 symbolS *sym;
3566
3567 name = input_line_pointer;
3568 endc = get_symbol_end ();
3569
3570 sym = symbol_find_or_make (name);
3571
3572 *input_line_pointer = endc;
3573
809ffe0d 3574 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3575
3576 demand_empty_rest_of_line ();
3577}
3578
c865e45b
RS		 3579/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3580 relocations at the beginning of the current csect.
3581
3582 (In principle, there's no reason why the relocations _have_ to be at
3583 the beginning. Anywhere in the csect would do. However, inserting
3584 at the beginning is what the native assmebler does, and it helps to
3585 deal with cases where the .ref statements follow the section contents.)
3586
3587 ??? .refs don't work for empty .csects. However, the native assembler
3588 doesn't report an error in this case, and neither yet do we. */
3589
3590static void
3591ppc_ref (int ignore ATTRIBUTE_UNUSED)
3592{
3593 char *name;
3594 char c;
3595
3596 if (ppc_current_csect == NULL)
3597 {
3598 as_bad (_(".ref outside .csect"));
3599 ignore_rest_of_line ();
3600 return;
3601 }
3602
3603 do
3604 {
3605 name = input_line_pointer;
3606 c = get_symbol_end ();
3607
3608 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3609 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3610
3611 *input_line_pointer = c;
3612 SKIP_WHITESPACE ();
3613 c = *input_line_pointer;
3614 if (c == ',')
3615 {
3616 input_line_pointer++;
3617 SKIP_WHITESPACE ();
3618 if (is_end_of_line[(unsigned char) *input_line_pointer])
3619 {
3620 as_bad (_("missing symbol name"));
3621 ignore_rest_of_line ();
3622 return;
3623 }
3624 }
3625 }
3626 while (c == ',');
3627
3628 demand_empty_rest_of_line ();
3629}
3630
252b5132
RH		 3631/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3632 although I don't know why it bothers. */
3633
3634static void
98027b10 3635ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3636{
3637 char *name;
3638 char endc;
3639 symbolS *sym;
3640 int len;
3641
3642 name = input_line_pointer;
3643 endc = get_symbol_end ();
3644
3645 sym = symbol_find_or_make (name);
3646
3647 *input_line_pointer = endc;
3648
3649 if (*input_line_pointer != ',')
3650 {
3651 as_bad (_("missing rename string"));
3652 ignore_rest_of_line ();
3653 return;
3654 }
3655 ++input_line_pointer;
3656
809ffe0d 3657 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3658
3659 demand_empty_rest_of_line ();
3660}
3661
3662/* The .stabx pseudo-op. This is similar to a normal .stabs
3663 pseudo-op, but slightly different. A sample is
3664 .stabx "main:F-1",.main,142,0
3665 The first argument is the symbol name to create. The second is the
3666 value, and the third is the storage class. The fourth seems to be
3667 always zero, and I am assuming it is the type. */
3668
3669static void
98027b10 3670ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3671{
3672 char *name;
3673 int len;
3674 symbolS *sym;
3675 expressionS exp;
3676
3677 name = demand_copy_C_string (&len);
3678
3679 if (*input_line_pointer != ',')
3680 {
3681 as_bad (_("missing value"));
3682 return;
3683 }
3684 ++input_line_pointer;
3685
b34976b6 3686 ppc_stab_symbol = TRUE;
252b5132 3687 sym = symbol_make (name);
b34976b6 3688 ppc_stab_symbol = FALSE;
252b5132 3689
809ffe0d 3690 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3691
3692 (void) expression (&exp);
3693
3694 switch (exp.X_op)
3695 {
3696 case O_illegal:
3697 case O_absent:
3698 case O_big:
3699 as_bad (_("illegal .stabx expression; zero assumed"));
3700 exp.X_add_number = 0;
3701 /* Fall through. */
3702 case O_constant:
3703 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3704 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3705 break;
3706
3707 case O_symbol:
3708 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3709 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3710 else
3711 {
3712 S_SET_VALUE (sym,
3713 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3714 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3715 }
3716 break;
3717
3718 default:
3719 /* The value is some complex expression. This will probably
99a814a1
AM		 3720 fail at some later point, but this is probably the right
3721 thing to do here. */
809ffe0d 3722 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3723 break;
3724 }
3725
3726 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3727 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3728
3729 if (*input_line_pointer != ',')
3730 {
3731 as_bad (_("missing class"));
3732 return;
3733 }
3734 ++input_line_pointer;
3735
3736 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3737
3738 if (*input_line_pointer != ',')
3739 {
3740 as_bad (_("missing type"));
3741 return;
3742 }
3743 ++input_line_pointer;
3744
3745 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3746
809ffe0d 3747 symbol_get_tc (sym)->output = 1;
252b5132 3748
6877bb43 3749 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3750
809ffe0d 3751 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3752
41ea10b1 3753 /* In this case :
99a814a1 3754
41ea10b1
TR		 3755 .bs name
3756 .stabx "z",arrays_,133,0
3757 .es
99a814a1 3758
41ea10b1 3759 .comm arrays_,13768,3
99a814a1 3760
41ea10b1
TR		 3761 resolve_symbol_value will copy the exp's "within" into sym's when the
3762 offset is 0. Since this seems to be corner case problem,
3763 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3764 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3765
3766 if (exp.X_op == O_symbol)
41ea10b1
TR		 3767 {
3768 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3769 }
6877bb43 3770 }
99a814a1 3771
252b5132
RH		 3772 if (exp.X_op != O_symbol
3773 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3774 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3775 ppc_frob_label (sym);
3776 else
3777 {
3778 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3779 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3780 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3781 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3782 }
3783
3784 demand_empty_rest_of_line ();
3785}
3786
3787/* The .function pseudo-op. This takes several arguments. The first
3788 argument seems to be the external name of the symbol. The second
67c1ffbe 3789 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3790 uses the same name for both. I have no idea what the third and
3791 fourth arguments are meant to be. The optional fifth argument is
3792 an expression for the size of the function. In COFF this symbol
3793 gets an aux entry like that used for a csect. */
3794
3795static void
98027b10 3796ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3797{
3798 char *name;
3799 char endc;
3800 char *s;
3801 symbolS *ext_sym;
3802 symbolS *lab_sym;
3803
3804 name = input_line_pointer;
3805 endc = get_symbol_end ();
3806
3807 /* Ignore any [PR] suffix. */
3808 name = ppc_canonicalize_symbol_name (name);
3809 s = strchr (name, '[');
3810 if (s != (char *) NULL
3811 && strcmp (s + 1, "PR]") == 0)
3812 *s = '\0';
3813
3814 ext_sym = symbol_find_or_make (name);
3815
3816 *input_line_pointer = endc;
3817
3818 if (*input_line_pointer != ',')
3819 {
3820 as_bad (_("missing symbol name"));
3821 ignore_rest_of_line ();
3822 return;
3823 }
3824 ++input_line_pointer;
3825
3826 name = input_line_pointer;
3827 endc = get_symbol_end ();
3828
3829 lab_sym = symbol_find_or_make (name);
3830
3831 *input_line_pointer = endc;
3832
3833 if (ext_sym != lab_sym)
3834 {
809ffe0d
ILT		 3835 expressionS exp;
3836
3837 exp.X_op = O_symbol;
3838 exp.X_add_symbol = lab_sym;
3839 exp.X_op_symbol = NULL;
3840 exp.X_add_number = 0;
3841 exp.X_unsigned = 0;
3842 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3843 }
3844
96d56e9f
NC		 3845 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3846 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3847 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3848
3849 if (*input_line_pointer == ',')
3850 {
91d6fa6a 3851 expressionS exp;
252b5132
RH		 3852
3853 /* Ignore the third argument. */
3854 ++input_line_pointer;
91d6fa6a 3855 expression (& exp);
252b5132
RH		 3856 if (*input_line_pointer == ',')
3857 {
3858 /* Ignore the fourth argument. */
3859 ++input_line_pointer;
91d6fa6a 3860 expression (& exp);
252b5132
RH		 3861 if (*input_line_pointer == ',')
3862 {
3863 /* The fifth argument is the function size. */
3864 ++input_line_pointer;
809ffe0d
ILT		 3865 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3866 absolute_section,
3867 (valueT) 0,
3868 &zero_address_frag);
3869 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3870 }
3871 }
3872 }
3873
3874 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3875 SF_SET_FUNCTION (ext_sym);
3876 SF_SET_PROCESS (ext_sym);
3877 coff_add_linesym (ext_sym);
3878
3879 demand_empty_rest_of_line ();
3880}
3881
3882/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3883 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3884 with the correct line number */
5d6255fe 3885
8642cce8 3886static symbolS *saved_bi_sym = 0;
252b5132
RH		 3887
3888static void
98027b10 3889ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3890{
3891 symbolS *sym;
3892
3893 sym = symbol_make (".bf");
3894 S_SET_SEGMENT (sym, text_section);
809ffe0d 3895 symbol_set_frag (sym, frag_now);
252b5132
RH		 3896 S_SET_VALUE (sym, frag_now_fix ());
3897 S_SET_STORAGE_CLASS (sym, C_FCN);
3898
3899 coff_line_base = get_absolute_expression ();
3900
3901 S_SET_NUMBER_AUXILIARY (sym, 1);
3902 SA_SET_SYM_LNNO (sym, coff_line_base);
3903
8642cce8 3904 /* Line number for bi. */
5d6255fe 3905 if (saved_bi_sym)
8642cce8
TR		 3906 {
3907 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3908 saved_bi_sym = 0;
3909 }
5d6255fe 3910
8642cce8 3911
809ffe0d 3912 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3913
3914 ppc_frob_label (sym);
3915
3916 demand_empty_rest_of_line ();
3917}
3918
3919/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3920 ".ef", except that the line number is absolute, not relative to the
3921 most recent ".bf" symbol. */
3922
3923static void
98027b10 3924ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3925{
3926 symbolS *sym;
3927
3928 sym = symbol_make (".ef");
3929 S_SET_SEGMENT (sym, text_section);
809ffe0d 3930 symbol_set_frag (sym, frag_now);
252b5132
RH		 3931 S_SET_VALUE (sym, frag_now_fix ());
3932 S_SET_STORAGE_CLASS (sym, C_FCN);
3933 S_SET_NUMBER_AUXILIARY (sym, 1);
3934 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3935 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3936
3937 ppc_frob_label (sym);
3938
3939 demand_empty_rest_of_line ();
3940}
3941
3942/* The .bi and .ei pseudo-ops. These take a string argument and
3943 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3944 the symbol list. The value of .bi will be know when the next .bf
3945 is encountered. */
252b5132
RH		 3946
3947static void
98027b10 3948ppc_biei (int ei)
252b5132
RH		 3949{
3950 static symbolS *last_biei;
3951
3952 char *name;
3953 int len;
3954 symbolS *sym;
3955 symbolS *look;
3956
3957 name = demand_copy_C_string (&len);
3958
3959 /* The value of these symbols is actually file offset. Here we set
3960 the value to the index into the line number entries. In
3961 ppc_frob_symbols we set the fix_line field, which will cause BFD
3962 to do the right thing. */
3963
3964 sym = symbol_make (name);
3965 /* obj-coff.c currently only handles line numbers correctly in the
3966 .text section. */
3967 S_SET_SEGMENT (sym, text_section);
3968 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3969 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3970
3971 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3972 symbol_get_tc (sym)->output = 1;
81d4177b 3973
8642cce8 3974 /* Save bi. */
5d6255fe 3975 if (ei)
8642cce8
TR		 3976 saved_bi_sym = 0;
3977 else
3978 saved_bi_sym = sym;
3979
252b5132
RH		 3980 for (look = last_biei ? last_biei : symbol_rootP;
3981 (look != (symbolS *) NULL
3982 && (S_GET_STORAGE_CLASS (look) == C_FILE
3983 || S_GET_STORAGE_CLASS (look) == C_BINCL
3984 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3985 look = symbol_next (look))
3986 ;
3987 if (look != (symbolS *) NULL)
3988 {
3989 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3990 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3991 last_biei = sym;
3992 }
3993
3994 demand_empty_rest_of_line ();
3995}
3996
3997/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3998 There is one argument, which is a csect symbol. The value of the
3999 .bs symbol is the index of this csect symbol. */
4000
4001static void
98027b10 4002ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4003{
4004 char *name;
4005 char endc;
4006 symbolS *csect;
4007 symbolS *sym;
4008
4009 if (ppc_current_block != NULL)
4010 as_bad (_("nested .bs blocks"));
4011
4012 name = input_line_pointer;
4013 endc = get_symbol_end ();
4014
4015 csect = symbol_find_or_make (name);
4016
4017 *input_line_pointer = endc;
4018
4019 sym = symbol_make (".bs");
4020 S_SET_SEGMENT (sym, now_seg);
4021 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4022 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4023 symbol_get_tc (sym)->output = 1;
252b5132 4024
809ffe0d 4025 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4026
4027 ppc_frob_label (sym);
4028
4029 ppc_current_block = sym;
4030
4031 demand_empty_rest_of_line ();
4032}
4033
4034/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4035
4036static void
98027b10 4037ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4038{
4039 symbolS *sym;
4040
4041 if (ppc_current_block == NULL)
4042 as_bad (_(".es without preceding .bs"));
4043
4044 sym = symbol_make (".es");
4045 S_SET_SEGMENT (sym, now_seg);
4046 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4047 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4048 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4049
4050 ppc_frob_label (sym);
4051
4052 ppc_current_block = NULL;
4053
4054 demand_empty_rest_of_line ();
4055}
4056
4057/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4058 line number. */
4059
4060static void
98027b10 4061ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4062{
4063 symbolS *sym;
4064
4065 sym = symbol_make (".bb");
4066 S_SET_SEGMENT (sym, text_section);
809ffe0d 4067 symbol_set_frag (sym, frag_now);
252b5132
RH		 4068 S_SET_VALUE (sym, frag_now_fix ());
4069 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4070
4071 S_SET_NUMBER_AUXILIARY (sym, 1);
4072 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4073
809ffe0d 4074 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4075
4076 SF_SET_PROCESS (sym);
4077
4078 ppc_frob_label (sym);
4079
4080 demand_empty_rest_of_line ();
4081}
4082
4083/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4084 line number. */
4085
4086static void
98027b10 4087ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4088{
4089 symbolS *sym;
4090
4091 sym = symbol_make (".eb");
4092 S_SET_SEGMENT (sym, text_section);
809ffe0d 4093 symbol_set_frag (sym, frag_now);
252b5132
RH		 4094 S_SET_VALUE (sym, frag_now_fix ());
4095 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4096 S_SET_NUMBER_AUXILIARY (sym, 1);
4097 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4098 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4099
4100 SF_SET_PROCESS (sym);
4101
4102 ppc_frob_label (sym);
4103
4104 demand_empty_rest_of_line ();
4105}
4106
4107/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4108 specified name. */
4109
4110static void
98027b10 4111ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4112{
4113 char *name;
4114 int len;
4115 symbolS *sym;
4116
4117 name = demand_copy_C_string (&len);
4118 sym = symbol_make (name);
4119 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4120 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4121 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4122 S_SET_VALUE (sym, 0);
809ffe0d 4123 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4124
4125 ppc_frob_label (sym);
4126
4127 demand_empty_rest_of_line ();
4128}
4129
4130/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4131
4132static void
98027b10 4133ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4134{
4135 symbolS *sym;
4136
4137 sym = symbol_make (".ec");
4138 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4139 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4140 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4141 S_SET_VALUE (sym, 0);
809ffe0d 4142 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4143
4144 ppc_frob_label (sym);
4145
4146 demand_empty_rest_of_line ();
4147}
4148
4149/* The .toc pseudo-op. Switch to the .toc subsegment. */
4150
4151static void
98027b10 4152ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4153{
4154 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4155 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4156 else
4157 {
4158 subsegT subseg;
4159 symbolS *sym;
4160 symbolS *list;
81d4177b 4161
252b5132
RH		 4162 subseg = ppc_data_subsegment;
4163 ++ppc_data_subsegment;
4164
4165 subseg_new (segment_name (data_section), subseg);
4166 ppc_toc_frag = frag_now;
4167
4168 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4169 symbol_set_frag (sym, frag_now);
252b5132
RH		 4170 S_SET_SEGMENT (sym, data_section);
4171 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4172 symbol_get_tc (sym)->subseg = subseg;
4173 symbol_get_tc (sym)->output = 1;
4174 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4175
4176 ppc_toc_csect = sym;
81d4177b 4177
252b5132 4178 for (list = ppc_data_csects;
809ffe0d
ILT		 4179 symbol_get_tc (list)->next != (symbolS *) NULL;
4180 list = symbol_get_tc (list)->next)
252b5132 4181 ;
809ffe0d 4182 symbol_get_tc (list)->next = sym;
252b5132
RH		 4183
4184 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4185 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4186 &symbol_lastP);
252b5132
RH		 4187 }
4188
4189 ppc_current_csect = ppc_toc_csect;
4190
4191 demand_empty_rest_of_line ();
4192}
4193
4194/* The AIX assembler automatically aligns the operands of a .long or
4195 .short pseudo-op, and we want to be compatible. */
4196
4197static void
98027b10 4198ppc_xcoff_cons (int log_size)
252b5132
RH		 4199{
4200 frag_align (log_size, 0, 0);
4201 record_alignment (now_seg, log_size);
4202 cons (1 << log_size);
4203}
4204
4205static void
98027b10 4206ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4207{
4208 expressionS exp;
4209 int byte_count;
4210
4211 (void) expression (&exp);
4212
4213 if (exp.X_op != O_constant)
4214 {
4215 as_bad (_("non-constant byte count"));
4216 return;
4217 }
4218
4219 byte_count = exp.X_add_number;
4220
4221 if (*input_line_pointer != ',')
4222 {
4223 as_bad (_("missing value"));
4224 return;
4225 }
4226
4227 ++input_line_pointer;
4228 cons (byte_count);
4229}
4230
4231#endif /* OBJ_XCOFF */
0baf16f2 4232#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4233\f
4234/* The .tc pseudo-op. This is used when generating either XCOFF or
4235 ELF. This takes two or more arguments.
4236
4237 When generating XCOFF output, the first argument is the name to
4238 give to this location in the toc; this will be a symbol with class
0baf16f2 4239 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4240 this location in the TOC; often there is just one more argument, a
1049f94e 4241 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4242 depends on target word size. A 32-bit target uses 4-byte values, a
4243 64-bit target uses 8-byte values.
252b5132
RH		 4244
4245 When not generating XCOFF output, the arguments are the same, but
4246 the first argument is simply ignored. */
4247
4248static void
98027b10 4249ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4250{
4251#ifdef OBJ_XCOFF
4252
4253 /* Define the TOC symbol name. */
4254 {
4255 char *name;
4256 char endc;
4257 symbolS *sym;
4258
4259 if (ppc_toc_csect == (symbolS *) NULL
4260 || ppc_toc_csect != ppc_current_csect)
4261 {
4262 as_bad (_(".tc not in .toc section"));
4263 ignore_rest_of_line ();
4264 return;
4265 }
4266
4267 name = input_line_pointer;
4268 endc = get_symbol_end ();
4269
4270 sym = symbol_find_or_make (name);
4271
4272 *input_line_pointer = endc;
4273
4274 if (S_IS_DEFINED (sym))
4275 {
4276 symbolS *label;
4277
809ffe0d 4278 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4279 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4280 {
4281 as_bad (_(".tc with no label"));
4282 ignore_rest_of_line ();
4283 return;
4284 }
4285
4286 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4287 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4288 S_SET_VALUE (label, S_GET_VALUE (sym));
4289
4290 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4291 ++input_line_pointer;
4292
4293 return;
4294 }
4295
4296 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4297 symbol_set_frag (sym, frag_now);
252b5132 4298 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4299 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4300 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4301
4302 ppc_frob_label (sym);
4303 }
4304
0baf16f2
AM		 4305#endif /* OBJ_XCOFF */
4306#ifdef OBJ_ELF
9c7977b3 4307 int align;
252b5132
RH		 4308
4309 /* Skip the TOC symbol name. */
4310 while (is_part_of_name (*input_line_pointer)
d13d4015 4311 || *input_line_pointer == ' '
252b5132
RH		 4312 || *input_line_pointer == '['
4313 || *input_line_pointer == ']'
4314 || *input_line_pointer == '{'
4315 || *input_line_pointer == '}')
4316 ++input_line_pointer;
4317
0baf16f2 4318 /* Align to a four/eight byte boundary. */
2b3c4602 4319 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4320 frag_align (align, 0, 0);
4321 record_alignment (now_seg, align);
0baf16f2 4322#endif /* OBJ_ELF */
252b5132
RH		 4323
4324 if (*input_line_pointer != ',')
4325 demand_empty_rest_of_line ();
4326 else
4327 {
4328 ++input_line_pointer;
2b3c4602 4329 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4330 }
4331}
0baf16f2
AM		 4332
4333/* Pseudo-op .machine. */
0baf16f2
AM		 4334
4335static void
98027b10 4336ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4337{
69c040df
AM		 4338 char *cpu_string;
4339#define MAX_HISTORY 100
fa452fa6 4340 static ppc_cpu_t *cpu_history;
69c040df
AM		 4341 static int curr_hist;
4342
4343 SKIP_WHITESPACE ();
4344
4345 if (*input_line_pointer == '"')
4346 {
4347 int len;
4348 cpu_string = demand_copy_C_string (&len);
4349 }
4350 else
4351 {
4352 char c;
4353 cpu_string = input_line_pointer;
4354 c = get_symbol_end ();
4355 cpu_string = xstrdup (cpu_string);
4356 *input_line_pointer = c;
4357 }
4358
4359 if (cpu_string != NULL)
4360 {
fa452fa6 4361 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4362 ppc_cpu_t new_cpu;
69c040df
AM		 4363 char *p;
4364
4365 for (p = cpu_string; *p != 0; p++)
4366 *p = TOLOWER (*p);
4367
4368 if (strcmp (cpu_string, "push") == 0)
4369 {
4370 if (cpu_history == NULL)
4371 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4372
4373 if (curr_hist >= MAX_HISTORY)
4374 as_bad (_(".machine stack overflow"));
4375 else
4376 cpu_history[curr_hist++] = ppc_cpu;
4377 }
4378 else if (strcmp (cpu_string, "pop") == 0)
4379 {
4380 if (curr_hist <= 0)
4381 as_bad (_(".machine stack underflow"));
4382 else
4383 ppc_cpu = cpu_history[--curr_hist];
4384 }
69fe9ce5
AM		 4385 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4386 ppc_cpu = new_cpu;
69c040df
AM		 4387 else
4388 as_bad (_("invalid machine `%s'"), cpu_string);
4389
4390 if (ppc_cpu != old_cpu)
4391 ppc_setup_opcodes ();
4392 }
4393
4394 demand_empty_rest_of_line ();
0baf16f2
AM		 4395}
4396
4397/* See whether a symbol is in the TOC section. */
4398
4399static int
98027b10 4400ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4401{
4402#ifdef OBJ_XCOFF
96d56e9f 4403 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4404#endif
4405#ifdef OBJ_ELF
4406 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4407 if (ppc_obj64)
0baf16f2
AM		 4408 return strcmp (sname, ".toc") == 0;
4409 else
4410 return strcmp (sname, ".got") == 0;
4411#endif
4412}
4413#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4414\f
4415#ifdef TE_PE
4416
99a814a1 4417/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4418
4419/* Set the current section. */
4420static void
98027b10 4421ppc_set_current_section (segT new)
252b5132
RH		 4422{
4423 ppc_previous_section = ppc_current_section;
4424 ppc_current_section = new;
4425}
4426
4427/* pseudo-op: .previous
4428 behaviour: toggles the current section with the previous section.
4429 errors: None
99a814a1
AM		 4430 warnings: "No previous section" */
4431
252b5132 4432static void
98027b10 4433ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4434{
4435 symbolS *tmp;
4436
81d4177b 4437 if (ppc_previous_section == NULL)
252b5132 4438 {
99a814a1 4439 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4440 return;
4441 }
4442
99a814a1 4443 subseg_set (ppc_previous_section, 0);
252b5132 4444
99a814a1 4445 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4446}
4447
4448/* pseudo-op: .pdata
4449 behaviour: predefined read only data section
b34976b6 4450 double word aligned
252b5132
RH		 4451 errors: None
4452 warnings: None
4453 initial: .section .pdata "adr3"
b34976b6 4454 a - don't know -- maybe a misprint
252b5132
RH		 4455 d - initialized data
4456 r - readable
4457 3 - double word aligned (that would be 4 byte boundary)
4458
4459 commentary:
4460 Tag index tables (also known as the function table) for exception
99a814a1 4461 handling, debugging, etc. */
252b5132 4462
252b5132 4463static void
98027b10 4464ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4465{
81d4177b 4466 if (pdata_section == 0)
252b5132
RH		 4467 {
4468 pdata_section = subseg_new (".pdata", 0);
81d4177b 4469
252b5132
RH		 4470 bfd_set_section_flags (stdoutput, pdata_section,
4471 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4472 | SEC_READONLY | SEC_DATA ));
81d4177b 4473
252b5132
RH		 4474 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4475 }
4476 else
4477 {
99a814a1 4478 pdata_section = subseg_new (".pdata", 0);
252b5132 4479 }
99a814a1 4480 ppc_set_current_section (pdata_section);
252b5132
RH		 4481}
4482
4483/* pseudo-op: .ydata
4484 behaviour: predefined read only data section
b34976b6 4485 double word aligned
252b5132
RH		 4486 errors: None
4487 warnings: None
4488 initial: .section .ydata "drw3"
b34976b6 4489 a - don't know -- maybe a misprint
252b5132
RH		 4490 d - initialized data
4491 r - readable
4492 3 - double word aligned (that would be 4 byte boundary)
4493 commentary:
4494 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4495 debugging, etc. */
4496
252b5132 4497static void
98027b10 4498ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4499{
81d4177b 4500 if (ydata_section == 0)
252b5132
RH		 4501 {
4502 ydata_section = subseg_new (".ydata", 0);
4503 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4504 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4505 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4506
4507 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4508 }
4509 else
4510 {
4511 ydata_section = subseg_new (".ydata", 0);
4512 }
99a814a1 4513 ppc_set_current_section (ydata_section);
252b5132
RH		 4514}
4515
4516/* pseudo-op: .reldata
4517 behaviour: predefined read write data section
b34976b6 4518 double word aligned (4-byte)
252b5132
RH		 4519 FIXME: relocation is applied to it
4520 FIXME: what's the difference between this and .data?
4521 errors: None
4522 warnings: None
4523 initial: .section .reldata "drw3"
4524 d - initialized data
4525 r - readable
4526 w - writeable
4527 3 - double word aligned (that would be 8 byte boundary)
4528
4529 commentary:
4530 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4531 function descriptors, etc. */
4532
252b5132 4533static void
98027b10 4534ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4535{
4536 if (reldata_section == 0)
4537 {
4538 reldata_section = subseg_new (".reldata", 0);
4539
4540 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4541 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4542 | SEC_DATA));
252b5132
RH		 4543
4544 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4545 }
4546 else
4547 {
4548 reldata_section = subseg_new (".reldata", 0);
4549 }
99a814a1 4550 ppc_set_current_section (reldata_section);
252b5132
RH		 4551}
4552
4553/* pseudo-op: .rdata
4554 behaviour: predefined read only data section
b34976b6 4555 double word aligned
252b5132
RH		 4556 errors: None
4557 warnings: None
4558 initial: .section .rdata "dr3"
4559 d - initialized data
4560 r - readable
99a814a1
AM		 4561 3 - double word aligned (that would be 4 byte boundary) */
4562
252b5132 4563static void
98027b10 4564ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4565{
4566 if (rdata_section == 0)
4567 {
4568 rdata_section = subseg_new (".rdata", 0);
4569 bfd_set_section_flags (stdoutput, rdata_section,
4570 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4571 | SEC_READONLY | SEC_DATA ));
4572
4573 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4574 }
4575 else
4576 {
4577 rdata_section = subseg_new (".rdata", 0);
4578 }
99a814a1 4579 ppc_set_current_section (rdata_section);
252b5132
RH		 4580}
4581
4582/* pseudo-op: .ualong
81d4177b 4583 behaviour: much like .int, with the exception that no alignment is
b34976b6 4584 performed.
252b5132
RH		 4585 FIXME: test the alignment statement
4586 errors: None
99a814a1
AM		 4587 warnings: None */
4588
252b5132 4589static void
98027b10 4590ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4591{
99a814a1
AM		 4592 /* Try for long. */
4593 cons (4);
252b5132
RH		 4594}
4595
4596/* pseudo-op: .znop <symbol name>
4597 behaviour: Issue a nop instruction
b34976b6 4598 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4599 the supplied symbol name.
4600 errors: None
99a814a1
AM		 4601 warnings: Missing symbol name */
4602
252b5132 4603static void
98027b10 4604ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4605{
4606 unsigned long insn;
4607 const struct powerpc_opcode *opcode;
4608 expressionS ex;
4609 char *f;
252b5132 4610 symbolS *sym;
252b5132
RH		 4611 char *symbol_name;
4612 char c;
4613 char *name;
4614 unsigned int exp;
4615 flagword flags;
4616 asection *sec;
4617
99a814a1 4618 /* Strip out the symbol name. */
252b5132
RH		 4619 symbol_name = input_line_pointer;
4620 c = get_symbol_end ();
4621
4622 name = xmalloc (input_line_pointer - symbol_name + 1);
4623 strcpy (name, symbol_name);
4624
4625 sym = symbol_find_or_make (name);
4626
4627 *input_line_pointer = c;
4628
4629 SKIP_WHITESPACE ();
4630
4631 /* Look up the opcode in the hash table. */
4632 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4633
99a814a1 4634 /* Stick in the nop. */
252b5132
RH		 4635 insn = opcode->opcode;
4636
4637 /* Write out the instruction. */
4638 f = frag_more (4);
4639 md_number_to_chars (f, insn, 4);
4640 fix_new (frag_now,
4641 f - frag_now->fr_literal,
4642 4,
4643 sym,
4644 0,
4645 0,
4646 BFD_RELOC_16_GOT_PCREL);
4647
4648}
4649
81d4177b
KH		 4650/* pseudo-op:
4651 behaviour:
4652 errors:
99a814a1
AM		 4653 warnings: */
4654
252b5132 4655static void
98027b10 4656ppc_pe_comm (int lcomm)
252b5132 4657{
98027b10
AM		 4658 char *name;
4659 char c;
4660 char *p;
252b5132 4661 offsetT temp;
98027b10 4662 symbolS *symbolP;
252b5132
RH		 4663 offsetT align;
4664
4665 name = input_line_pointer;
4666 c = get_symbol_end ();
4667
99a814a1 4668 /* just after name is now '\0'. */
252b5132
RH		 4669 p = input_line_pointer;
4670 *p = c;
4671 SKIP_WHITESPACE ();
4672 if (*input_line_pointer != ',')
4673 {
4674 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4675 ignore_rest_of_line ();
4676 return;
4677 }
4678
4679 input_line_pointer++; /* skip ',' */
4680 if ((temp = get_absolute_expression ()) < 0)
4681 {
4682 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4683 ignore_rest_of_line ();
4684 return;
4685 }
4686
4687 if (! lcomm)
4688 {
4689 /* The third argument to .comm is the alignment. */
4690 if (*input_line_pointer != ',')
4691 align = 3;
4692 else
4693 {
4694 ++input_line_pointer;
4695 align = get_absolute_expression ();
4696 if (align <= 0)
4697 {
4698 as_warn (_("ignoring bad alignment"));
4699 align = 3;
4700 }
4701 }
4702 }
4703
4704 *p = 0;
4705 symbolP = symbol_find_or_make (name);
4706
4707 *p = c;
4708 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4709 {
4710 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4711 S_GET_NAME (symbolP));
4712 ignore_rest_of_line ();
4713 return;
4714 }
4715
4716 if (S_GET_VALUE (symbolP))
4717 {
4718 if (S_GET_VALUE (symbolP) != (valueT) temp)
4719 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4720 S_GET_NAME (symbolP),
4721 (long) S_GET_VALUE (symbolP),
4722 (long) temp);
4723 }
4724 else
4725 {
4726 S_SET_VALUE (symbolP, (valueT) temp);
4727 S_SET_EXTERNAL (symbolP);
86ebace2 4728 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4729 }
4730
4731 demand_empty_rest_of_line ();
4732}
4733
4734/*
4735 * implement the .section pseudo op:
4736 * .section name {, "flags"}
4737 * ^ ^
4738 * | +--- optional flags: 'b' for bss
4739 * | 'i' for info
4740 * +-- section name 'l' for lib
4741 * 'n' for noload
4742 * 'o' for over
4743 * 'w' for data
4744 * 'd' (apparently m88k for data)
4745 * 'x' for text
4746 * But if the argument is not a quoted string, treat it as a
4747 * subsegment number.
4748 *
4749 * FIXME: this is a copy of the section processing from obj-coff.c, with
4750 * additions/changes for the moto-pas assembler support. There are three
4751 * categories:
4752 *
81d4177b 4753 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4754 * setting bits that bfd probably neither understands or uses. The
4755 * correct approach (?) will have to incorporate extra fields attached
4756 * to the section to hold the system specific stuff. (krk)
4757 *
4758 * Section Contents:
4759 * 'a' - unknown - referred to in documentation, but no definition supplied
4760 * 'c' - section has code
4761 * 'd' - section has initialized data
4762 * 'u' - section has uninitialized data
4763 * 'i' - section contains directives (info)
4764 * 'n' - section can be discarded
4765 * 'R' - remove section at link time
4766 *
4767 * Section Protection:
4768 * 'r' - section is readable
4769 * 'w' - section is writeable
4770 * 'x' - section is executable
4771 * 's' - section is sharable
4772 *
4773 * Section Alignment:
4774 * '0' - align to byte boundary
4775 * '1' - align to halfword undary
4776 * '2' - align to word boundary
4777 * '3' - align to doubleword boundary
4778 * '4' - align to quadword boundary
4779 * '5' - align to 32 byte boundary
4780 * '6' - align to 64 byte boundary
4781 *
4782 */
4783
4784void
98027b10 4785ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4786{
99a814a1 4787 /* Strip out the section name. */
252b5132
RH		 4788 char *section_name;
4789 char c;
4790 char *name;
4791 unsigned int exp;
4792 flagword flags;
4793 segT sec;
4794 int align;
4795
4796 section_name = input_line_pointer;
4797 c = get_symbol_end ();
4798
4799 name = xmalloc (input_line_pointer - section_name + 1);
4800 strcpy (name, section_name);
4801
4802 *input_line_pointer = c;
4803
4804 SKIP_WHITESPACE ();
4805
4806 exp = 0;
4807 flags = SEC_NO_FLAGS;
4808
4809 if (strcmp (name, ".idata$2") == 0)
4810 {
4811 align = 0;
4812 }
4813 else if (strcmp (name, ".idata$3") == 0)
4814 {
4815 align = 0;
4816 }
4817 else if (strcmp (name, ".idata$4") == 0)
4818 {
4819 align = 2;
4820 }
4821 else if (strcmp (name, ".idata$5") == 0)
4822 {
4823 align = 2;
4824 }
4825 else if (strcmp (name, ".idata$6") == 0)
4826 {
4827 align = 1;
4828 }
4829 else
99a814a1
AM		 4830 /* Default alignment to 16 byte boundary. */
4831 align = 4;
252b5132
RH		 4832
4833 if (*input_line_pointer == ',')
4834 {
4835 ++input_line_pointer;
4836 SKIP_WHITESPACE ();
4837 if (*input_line_pointer != '"')
4838 exp = get_absolute_expression ();
4839 else
4840 {
4841 ++input_line_pointer;
4842 while (*input_line_pointer != '"'
4843 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4844 {
4845 switch (*input_line_pointer)
4846 {
4847 /* Section Contents */
4848 case 'a': /* unknown */
4849 as_bad (_("Unsupported section attribute -- 'a'"));
4850 break;
4851 case 'c': /* code section */
81d4177b 4852 flags |= SEC_CODE;
252b5132
RH		 4853 break;
4854 case 'd': /* section has initialized data */
4855 flags |= SEC_DATA;
4856 break;
4857 case 'u': /* section has uninitialized data */
4858 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4859 in winnt.h */
4860 flags |= SEC_ROM;
4861 break;
4862 case 'i': /* section contains directives (info) */
4863 /* FIXME: This is IMAGE_SCN_LNK_INFO
4864 in winnt.h */
4865 flags |= SEC_HAS_CONTENTS;
4866 break;
4867 case 'n': /* section can be discarded */
81d4177b 4868 flags &=~ SEC_LOAD;
252b5132
RH		 4869 break;
4870 case 'R': /* Remove section at link time */
4871 flags |= SEC_NEVER_LOAD;
4872 break;
8d452c78 4873#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4874 /* Section Protection */
4875 case 'r': /* section is readable */
4876 flags |= IMAGE_SCN_MEM_READ;
4877 break;
4878 case 'w': /* section is writeable */
4879 flags |= IMAGE_SCN_MEM_WRITE;
4880 break;
4881 case 'x': /* section is executable */
4882 flags |= IMAGE_SCN_MEM_EXECUTE;
4883 break;
4884 case 's': /* section is sharable */
4885 flags |= IMAGE_SCN_MEM_SHARED;
4886 break;
4887
4888 /* Section Alignment */
4889 case '0': /* align to byte boundary */
4890 flags |= IMAGE_SCN_ALIGN_1BYTES;
4891 align = 0;
4892 break;
4893 case '1': /* align to halfword boundary */
4894 flags |= IMAGE_SCN_ALIGN_2BYTES;
4895 align = 1;
4896 break;
4897 case '2': /* align to word boundary */
4898 flags |= IMAGE_SCN_ALIGN_4BYTES;
4899 align = 2;
4900 break;
4901 case '3': /* align to doubleword boundary */
4902 flags |= IMAGE_SCN_ALIGN_8BYTES;
4903 align = 3;
4904 break;
4905 case '4': /* align to quadword boundary */
4906 flags |= IMAGE_SCN_ALIGN_16BYTES;
4907 align = 4;
4908 break;
4909 case '5': /* align to 32 byte boundary */
4910 flags |= IMAGE_SCN_ALIGN_32BYTES;
4911 align = 5;
4912 break;
4913 case '6': /* align to 64 byte boundary */
4914 flags |= IMAGE_SCN_ALIGN_64BYTES;
4915 align = 6;
4916 break;
8d452c78 4917#endif
252b5132 4918 default:
99a814a1
AM		 4919 as_bad (_("unknown section attribute '%c'"),
4920 *input_line_pointer);
252b5132
RH		 4921 break;
4922 }
4923 ++input_line_pointer;
4924 }
4925 if (*input_line_pointer == '"')
4926 ++input_line_pointer;
4927 }
4928 }
4929
4930 sec = subseg_new (name, (subsegT) exp);
4931
99a814a1 4932 ppc_set_current_section (sec);
252b5132
RH		 4933
4934 if (flags != SEC_NO_FLAGS)
4935 {
4936 if (! bfd_set_section_flags (stdoutput, sec, flags))
4937 as_bad (_("error setting flags for \"%s\": %s"),
4938 bfd_section_name (stdoutput, sec),
4939 bfd_errmsg (bfd_get_error ()));
4940 }
4941
99a814a1 4942 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4943}
4944
4945static void
98027b10 4946ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4947{
4948 char *name;
4949 char endc;
4950 symbolS *ext_sym;
4951
4952 name = input_line_pointer;
4953 endc = get_symbol_end ();
4954
4955 ext_sym = symbol_find_or_make (name);
4956
4957 *input_line_pointer = endc;
4958
4959 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4960 SF_SET_FUNCTION (ext_sym);
4961 SF_SET_PROCESS (ext_sym);
4962 coff_add_linesym (ext_sym);
4963
4964 demand_empty_rest_of_line ();
4965}
4966
4967static void
98027b10 4968ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4969{
4970 if (tocdata_section == 0)
4971 {
4972 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4973 /* FIXME: section flags won't work. */
252b5132
RH		 4974 bfd_set_section_flags (stdoutput, tocdata_section,
4975 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4976 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4977
4978 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4979 }
4980 else
4981 {
4982 rdata_section = subseg_new (".tocd", 0);
4983 }
4984
99a814a1 4985 ppc_set_current_section (tocdata_section);
252b5132
RH		 4986
4987 demand_empty_rest_of_line ();
4988}
4989
4990/* Don't adjust TOC relocs to use the section symbol. */
4991
4992int
98027b10 4993ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4994{
4995 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4996}
4997
4998#endif
4999\f
5000#ifdef OBJ_XCOFF
5001
5002/* XCOFF specific symbol and file handling. */
5003
5004/* Canonicalize the symbol name. We use the to force the suffix, if
5005 any, to use square brackets, and to be in upper case. */
5006
5007char *
98027b10 5008ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5009{
5010 char *s;
5011
5012 if (ppc_stab_symbol)
5013 return name;
5014
5015 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5016 ;
5017 if (*s != '\0')
5018 {
5019 char brac;
5020
5021 if (*s == '[')
5022 brac = ']';
5023 else
5024 {
5025 *s = '[';
5026 brac = '}';
5027 }
5028
5029 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5030 *s = TOUPPER (*s);
252b5132
RH		 5031
5032 if (*s == '\0' || s[1] != '\0')
5033 as_bad (_("bad symbol suffix"));
5034
5035 *s = ']';
5036 }
5037
5038 return name;
5039}
5040
5041/* Set the class of a symbol based on the suffix, if any. This is
5042 called whenever a new symbol is created. */
5043
5044void
98027b10 5045ppc_symbol_new_hook (symbolS *sym)
252b5132 5046{
809ffe0d 5047 struct ppc_tc_sy *tc;
252b5132
RH		 5048 const char *s;
5049
809ffe0d
ILT		 5050 tc = symbol_get_tc (sym);
5051 tc->next = NULL;
5052 tc->output = 0;
96d56e9f 5053 tc->symbol_class = -1;
809ffe0d
ILT		 5054 tc->real_name = NULL;
5055 tc->subseg = 0;
5056 tc->align = 0;
5057 tc->size = NULL;
5058 tc->within = NULL;
252b5132
RH		 5059
5060 if (ppc_stab_symbol)
5061 return;
5062
5063 s = strchr (S_GET_NAME (sym), '[');
5064 if (s == (const char *) NULL)
5065 {
5066 /* There is no suffix. */
5067 return;
5068 }
5069
5070 ++s;
5071
5072 switch (s[0])
5073 {
5074 case 'B':
5075 if (strcmp (s, "BS]") == 0)
96d56e9f 5076 tc->symbol_class = XMC_BS;
252b5132
RH		 5077 break;
5078 case 'D':
5079 if (strcmp (s, "DB]") == 0)
96d56e9f 5080 tc->symbol_class = XMC_DB;
252b5132 5081 else if (strcmp (s, "DS]") == 0)
96d56e9f 5082 tc->symbol_class = XMC_DS;
252b5132
RH		 5083 break;
5084 case 'G':
5085 if (strcmp (s, "GL]") == 0)
96d56e9f 5086 tc->symbol_class = XMC_GL;
252b5132
RH		 5087 break;
5088 case 'P':
5089 if (strcmp (s, "PR]") == 0)
96d56e9f 5090 tc->symbol_class = XMC_PR;
252b5132
RH		 5091 break;
5092 case 'R':
5093 if (strcmp (s, "RO]") == 0)
96d56e9f 5094 tc->symbol_class = XMC_RO;
252b5132 5095 else if (strcmp (s, "RW]") == 0)
96d56e9f 5096 tc->symbol_class = XMC_RW;
252b5132
RH		 5097 break;
5098 case 'S':
5099 if (strcmp (s, "SV]") == 0)
96d56e9f 5100 tc->symbol_class = XMC_SV;
252b5132
RH		 5101 break;
5102 case 'T':
5103 if (strcmp (s, "TC]") == 0)
96d56e9f 5104 tc->symbol_class = XMC_TC;
252b5132 5105 else if (strcmp (s, "TI]") == 0)
96d56e9f 5106 tc->symbol_class = XMC_TI;
252b5132 5107 else if (strcmp (s, "TB]") == 0)
96d56e9f 5108 tc->symbol_class = XMC_TB;
252b5132 5109 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5110 tc->symbol_class = XMC_TC0;
252b5132
RH		 5111 break;
5112 case 'U':
5113 if (strcmp (s, "UA]") == 0)
96d56e9f 5114 tc->symbol_class = XMC_UA;
252b5132 5115 else if (strcmp (s, "UC]") == 0)
96d56e9f 5116 tc->symbol_class = XMC_UC;
252b5132
RH		 5117 break;
5118 case 'X':
5119 if (strcmp (s, "XO]") == 0)
96d56e9f 5120 tc->symbol_class = XMC_XO;
252b5132
RH		 5121 break;
5122 }
5123
96d56e9f 5124 if (tc->symbol_class == -1)
252b5132
RH		 5125 as_bad (_("Unrecognized symbol suffix"));
5126}
5127
5128/* Set the class of a label based on where it is defined. This
5129 handles symbols without suffixes. Also, move the symbol so that it
5130 follows the csect symbol. */
5131
5132void
98027b10 5133ppc_frob_label (symbolS *sym)
252b5132
RH		 5134{
5135 if (ppc_current_csect != (symbolS *) NULL)
5136 {
96d56e9f
NC		 5137 if (symbol_get_tc (sym)->symbol_class == -1)
5138 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5139
5140 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5141 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5142 &symbol_rootP, &symbol_lastP);
5143 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5144 }
07a53e5c
RH		 5145
5146#ifdef OBJ_ELF
5147 dwarf2_emit_label (sym);
5148#endif
252b5132
RH		 5149}
5150
5151/* This variable is set by ppc_frob_symbol if any absolute symbols are
5152 seen. It tells ppc_adjust_symtab whether it needs to look through
5153 the symbols. */
5154
b34976b6 5155static bfd_boolean ppc_saw_abs;
252b5132
RH		 5156
5157/* Change the name of a symbol just before writing it out. Set the
5158 real name if the .rename pseudo-op was used. Otherwise, remove any
5159 class suffix. Return 1 if the symbol should not be included in the
5160 symbol table. */
5161
5162int
98027b10 5163ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5164{
5165 static symbolS *ppc_last_function;
5166 static symbolS *set_end;
5167
5168 /* Discard symbols that should not be included in the output symbol
5169 table. */
809ffe0d
ILT		 5170 if (! symbol_used_in_reloc_p (sym)
5171 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5172 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5173 && ! symbol_get_tc (sym)->output
252b5132
RH		 5174 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5175 return 1;
5176
a161fe53
AM		 5177 /* This one will disappear anyway. Don't make a csect sym for it. */
5178 if (sym == abs_section_sym)
5179 return 1;
5180
809ffe0d
ILT		 5181 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5182 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5183 else
5184 {
5185 const char *name;
5186 const char *s;
5187
5188 name = S_GET_NAME (sym);
5189 s = strchr (name, '[');
5190 if (s != (char *) NULL)
5191 {
5192 unsigned int len;
5193 char *snew;
5194
5195 len = s - name;
5196 snew = xmalloc (len + 1);
5197 memcpy (snew, name, len);
5198 snew[len] = '\0';
5199
5200 S_SET_NAME (sym, snew);
5201 }
5202 }
5203
5204 if (set_end != (symbolS *) NULL)
5205 {
5206 SA_SET_SYM_ENDNDX (set_end, sym);
5207 set_end = NULL;
5208 }
5209
5210 if (SF_GET_FUNCTION (sym))
5211 {
5212 if (ppc_last_function != (symbolS *) NULL)
5213 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5214 ppc_last_function = sym;
809ffe0d 5215 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5216 {
6386f3a7 5217 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5218 SA_SET_SYM_FSIZE (sym,
5219 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5220 }
5221 }
5222 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5223 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5224 {
5225 if (ppc_last_function == (symbolS *) NULL)
5226 as_bad (_(".ef with no preceding .function"));
5227 else
5228 {
5229 set_end = ppc_last_function;
5230 ppc_last_function = NULL;
5231
5232 /* We don't have a C_EFCN symbol, but we need to force the
5233 COFF backend to believe that it has seen one. */
5234 coff_last_function = NULL;
5235 }
5236 }
5237
670ec21d 5238 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5239 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5240 && S_GET_STORAGE_CLASS (sym) != C_FILE
5241 && S_GET_STORAGE_CLASS (sym) != C_FCN
5242 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5243 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5244 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5245 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5246 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5247 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5248 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5249
5250 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5251 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5252 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5253 {
5254 int i;
5255 union internal_auxent *a;
5256
5257 /* Create a csect aux. */
5258 i = S_GET_NUMBER_AUXILIARY (sym);
5259 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5260 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5261 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5262 {
5263 /* This is the TOC table. */
5264 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5265 a->x_csect.x_scnlen.l = 0;
5266 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5267 }
809ffe0d 5268 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5269 {
5270 /* This is a csect symbol. x_scnlen is the size of the
5271 csect. */
809ffe0d 5272 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5273 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5274 S_GET_SEGMENT (sym))
5275 - S_GET_VALUE (sym));
5276 else
5277 {
6386f3a7 5278 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5279 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5280 - S_GET_VALUE (sym));
5281 }
809ffe0d 5282 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5283 }
5284 else if (S_GET_SEGMENT (sym) == bss_section)
5285 {
5286 /* This is a common symbol. */
809ffe0d
ILT		 5287 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5288 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5289 if (S_IS_EXTERNAL (sym))
96d56e9f 5290 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5291 else
96d56e9f 5292 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5293 }
5294 else if (S_GET_SEGMENT (sym) == absolute_section)
5295 {
5296 /* This is an absolute symbol. The csect will be created by
99a814a1 5297 ppc_adjust_symtab. */
b34976b6 5298 ppc_saw_abs = TRUE;
252b5132 5299 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5300 if (symbol_get_tc (sym)->symbol_class == -1)
5301 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5302 }
5303 else if (! S_IS_DEFINED (sym))
5304 {
5305 /* This is an external symbol. */
5306 a->x_csect.x_scnlen.l = 0;
5307 a->x_csect.x_smtyp = XTY_ER;
5308 }
96d56e9f 5309 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5310 {
5311 symbolS *next;
5312
5313 /* This is a TOC definition. x_scnlen is the size of the
5314 TOC entry. */
5315 next = symbol_next (sym);
96d56e9f 5316 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5317 next = symbol_next (next);
5318 if (next == (symbolS *) NULL
96d56e9f 5319 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5320 {
5321 if (ppc_after_toc_frag == (fragS *) NULL)
5322 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5323 data_section)
5324 - S_GET_VALUE (sym));
5325 else
5326 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5327 - S_GET_VALUE (sym));
5328 }
5329 else
5330 {
6386f3a7 5331 resolve_symbol_value (next);
252b5132
RH		 5332 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5333 - S_GET_VALUE (sym));
5334 }
5335 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5336 }
5337 else
5338 {
5339 symbolS *csect;
5340
5341 /* This is a normal symbol definition. x_scnlen is the
5342 symbol index of the containing csect. */
5343 if (S_GET_SEGMENT (sym) == text_section)
5344 csect = ppc_text_csects;
5345 else if (S_GET_SEGMENT (sym) == data_section)
5346 csect = ppc_data_csects;
5347 else
5348 abort ();
5349
5350 /* Skip the initial dummy symbol. */
809ffe0d 5351 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5352
5353 if (csect == (symbolS *) NULL)
5354 {
5355 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5356 a->x_csect.x_scnlen.l = 0;
5357 }
5358 else
5359 {
809ffe0d 5360 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5361 {
6386f3a7 5362 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5363 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5364 > S_GET_VALUE (sym))
252b5132 5365 break;
809ffe0d 5366 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5367 }
5368
809ffe0d
ILT		 5369 a->x_csect.x_scnlen.p =
5370 coffsymbol (symbol_get_bfdsym (csect))->native;
5371 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5372 1;
252b5132
RH		 5373 }
5374 a->x_csect.x_smtyp = XTY_LD;
5375 }
81d4177b 5376
252b5132
RH		 5377 a->x_csect.x_parmhash = 0;
5378 a->x_csect.x_snhash = 0;
96d56e9f 5379 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5380 a->x_csect.x_smclas = XMC_PR;
5381 else
96d56e9f 5382 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5383 a->x_csect.x_stab = 0;
5384 a->x_csect.x_snstab = 0;
5385
5386 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5387 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5388 }
5389 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5390 {
5391 /* We want the value to be the symbol index of the referenced
5392 csect symbol. BFD will do that for us if we set the right
5393 flags. */
b782de16
AM		 5394 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5395 combined_entry_type *c = coffsymbol (bsym)->native;
5396
5397 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5398 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5399 }
5400 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5401 {
5402 symbolS *block;
5403 symbolS *csect;
5404
5405 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5406 block = symbol_get_tc (sym)->within;
5407 csect = symbol_get_tc (block)->within;
6386f3a7 5408 resolve_symbol_value (csect);
252b5132
RH		 5409 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5410 }
5411 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5412 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5413 {
5414 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5415 BFD will do that for us if we set the right flags. We have
5416 already set the value correctly. */
809ffe0d 5417 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5418 }
5419
5420 return 0;
5421}
5422
5423/* Adjust the symbol table. This creates csect symbols for all
5424 absolute symbols. */
5425
5426void
98027b10 5427ppc_adjust_symtab (void)
252b5132
RH		 5428{
5429 symbolS *sym;
5430
5431 if (! ppc_saw_abs)
5432 return;
5433
5434 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5435 {
5436 symbolS *csect;
5437 int i;
5438 union internal_auxent *a;
5439
5440 if (S_GET_SEGMENT (sym) != absolute_section)
5441 continue;
5442
5443 csect = symbol_create (".abs[XO]", absolute_section,
5444 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5445 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5446 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5447 i = S_GET_NUMBER_AUXILIARY (csect);
5448 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5449 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5450 a->x_csect.x_scnlen.l = 0;
5451 a->x_csect.x_smtyp = XTY_SD;
5452 a->x_csect.x_parmhash = 0;
5453 a->x_csect.x_snhash = 0;
5454 a->x_csect.x_smclas = XMC_XO;
5455 a->x_csect.x_stab = 0;
5456 a->x_csect.x_snstab = 0;
5457
5458 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5459
5460 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5461 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5462 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5463 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5464 }
5465
b34976b6 5466 ppc_saw_abs = FALSE;
252b5132
RH		 5467}
5468
5469/* Set the VMA for a section. This is called on all the sections in
5470 turn. */
5471
5472void
98027b10 5473ppc_frob_section (asection *sec)
252b5132 5474{
931e13a6 5475 static bfd_vma vma = 0;
252b5132 5476
931e13a6 5477 vma = md_section_align (sec, vma);
252b5132
RH		 5478 bfd_set_section_vma (stdoutput, sec, vma);
5479 vma += bfd_section_size (stdoutput, sec);
5480}
5481
5482#endif /* OBJ_XCOFF */
5483\f
252b5132 5484char *
98027b10 5485md_atof (int type, char *litp, int *sizep)
252b5132 5486{
499ac353 5487 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5488}
5489
5490/* Write a value out to the object file, using the appropriate
5491 endianness. */
5492
5493void
98027b10 5494md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5495{
5496 if (target_big_endian)
5497 number_to_chars_bigendian (buf, val, n);
5498 else
5499 number_to_chars_littleendian (buf, val, n);
5500}
5501
5502/* Align a section (I don't know why this is machine dependent). */
5503
5504valueT
3aeeedbb 5505md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5506{
3aeeedbb
AM		 5507#ifdef OBJ_ELF
5508 return addr;
5509#else
252b5132
RH		 5510 int align = bfd_get_section_alignment (stdoutput, seg);
5511
5512 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5513#endif
252b5132
RH		 5514}
5515
5516/* We don't have any form of relaxing. */
5517
5518int
98027b10
AM		 5519md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5520 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5521{
5522 abort ();
5523 return 0;
5524}
5525
5526/* Convert a machine dependent frag. We never generate these. */
5527
5528void
98027b10
AM		 5529md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5530 asection *sec ATTRIBUTE_UNUSED,
5531 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5532{
5533 abort ();
5534}
5535
5536/* We have no need to default values of symbols. */
5537
252b5132 5538symbolS *
98027b10 5539md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5540{
5541 return 0;
5542}
5543\f
5544/* Functions concerning relocs. */
5545
5546/* The location from which a PC relative jump should be calculated,
5547 given a PC relative reloc. */
5548
5549long
98027b10 5550md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5551{
5552 return fixp->fx_frag->fr_address + fixp->fx_where;
5553}
5554
5555#ifdef OBJ_XCOFF
5556
5557/* This is called to see whether a fixup should be adjusted to use a
5558 section symbol. We take the opportunity to change a fixup against
5559 a symbol in the TOC subsegment into a reloc against the
5560 corresponding .tc symbol. */
5561
5562int
98027b10 5563ppc_fix_adjustable (fixS *fix)
252b5132 5564{
b782de16
AM		 5565 valueT val = resolve_symbol_value (fix->fx_addsy);
5566 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5567 TC_SYMFIELD_TYPE *tc;
5568
5569 if (symseg == absolute_section)
5570 return 0;
252b5132 5571
252b5132 5572 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5573 && fix->fx_addsy != ppc_toc_csect
b782de16 5574 && symseg == data_section
252b5132
RH		 5575 && val >= ppc_toc_frag->fr_address
5576 && (ppc_after_toc_frag == (fragS *) NULL
5577 || val < ppc_after_toc_frag->fr_address))
5578 {
5579 symbolS *sy;
5580
5581 for (sy = symbol_next (ppc_toc_csect);
5582 sy != (symbolS *) NULL;
5583 sy = symbol_next (sy))
5584 {
b782de16
AM		 5585 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5586
96d56e9f 5587 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5588 continue;
96d56e9f 5589 if (sy_tc->symbol_class != XMC_TC)
252b5132 5590 break;
b782de16 5591 if (val == resolve_symbol_value (sy))
252b5132
RH		 5592 {
5593 fix->fx_addsy = sy;
5594 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5595 return 0;
5596 }
5597 }
5598
5599 as_bad_where (fix->fx_file, fix->fx_line,
5600 _("symbol in .toc does not match any .tc"));
5601 }
5602
5603 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5604 tc = symbol_get_tc (fix->fx_addsy);
5605 if (tc->subseg == 0
96d56e9f
NC		 5606 && tc->symbol_class != XMC_TC0
5607 && tc->symbol_class != XMC_TC
b782de16 5608 && symseg != bss_section
252b5132 5609 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5610 && (symseg != data_section
252b5132
RH		 5611 || ppc_toc_csect == NULL
5612 || val < ppc_toc_frag->fr_address
5613 || (ppc_after_toc_frag != NULL
5614 && val >= ppc_after_toc_frag->fr_address)))
5615 {
5616 symbolS *csect;
b782de16 5617 symbolS *next_csect;
252b5132 5618
b782de16 5619 if (symseg == text_section)
252b5132 5620 csect = ppc_text_csects;
b782de16 5621 else if (symseg == data_section)
252b5132
RH		 5622 csect = ppc_data_csects;
5623 else
5624 abort ();
5625
5626 /* Skip the initial dummy symbol. */
809ffe0d 5627 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5628
5629 if (csect != (symbolS *) NULL)
5630 {
b782de16
AM		 5631 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5632 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5633 {
5634 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5635 have to look through the full symbol table to see
5636 whether this is the csect we want. Note that we will
5637 only get here if the csect has zero length. */
b782de16
AM		 5638 if (symbol_get_frag (csect)->fr_address == val
5639 && S_GET_VALUE (csect) == val)
252b5132
RH		 5640 {
5641 symbolS *scan;
5642
809ffe0d 5643 for (scan = symbol_next (csect);
252b5132 5644 scan != NULL;
809ffe0d 5645 scan = symbol_next (scan))
252b5132 5646 {
809ffe0d 5647 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5648 break;
5649 if (scan == fix->fx_addsy)
5650 break;
5651 }
5652
5653 /* If we found the symbol before the next csect
99a814a1 5654 symbol, then this is the csect we want. */
252b5132
RH		 5655 if (scan == fix->fx_addsy)
5656 break;
5657 }
5658
b782de16 5659 csect = next_csect;
252b5132
RH		 5660 }
5661
b782de16 5662 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5663 fix->fx_addsy = csect;
5664 }
b782de16 5665 return 0;
252b5132
RH		 5666 }
5667
5668 /* Adjust a reloc against a .lcomm symbol to be against the base
5669 .lcomm. */
b782de16 5670 if (symseg == bss_section
252b5132
RH		 5671 && ! S_IS_EXTERNAL (fix->fx_addsy))
5672 {
b782de16
AM		 5673 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5674
5675 fix->fx_offset += val - resolve_symbol_value (sy);
5676 fix->fx_addsy = sy;
252b5132
RH		 5677 }
5678
5679 return 0;
5680}
5681
5682/* A reloc from one csect to another must be kept. The assembler
5683 will, of course, keep relocs between sections, and it will keep
5684 absolute relocs, but we need to force it to keep PC relative relocs
5685 between two csects in the same section. */
5686
5687int
98027b10 5688ppc_force_relocation (fixS *fix)
252b5132
RH		 5689{
5690 /* At this point fix->fx_addsy should already have been converted to
5691 a csect symbol. If the csect does not include the fragment, then
5692 we need to force the relocation. */
5693 if (fix->fx_pcrel
5694 && fix->fx_addsy != NULL
809ffe0d
ILT		 5695 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5696 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5697 > fix->fx_frag->fr_address)
5698 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5699 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5700 <= fix->fx_frag->fr_address))))
5701 return 1;
5702
ae6063d4 5703 return generic_force_reloc (fix);
252b5132
RH		 5704}
5705
5706#endif /* OBJ_XCOFF */
5707
0baf16f2 5708#ifdef OBJ_ELF
a161fe53
AM		 5709/* If this function returns non-zero, it guarantees that a relocation
5710 will be emitted for a fixup. */
5711
5712int
98027b10 5713ppc_force_relocation (fixS *fix)
a161fe53
AM		 5714{
5715 /* Branch prediction relocations must force a relocation, as must
5716 the vtable description relocs. */
5717 switch (fix->fx_r_type)
5718 {
5719 case BFD_RELOC_PPC_B16_BRTAKEN:
5720 case BFD_RELOC_PPC_B16_BRNTAKEN:
5721 case BFD_RELOC_PPC_BA16_BRTAKEN:
5722 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5723 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5724 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5725 return 1;
5726 default:
5727 break;
5728 }
5729
cdba85ec
AM		 5730 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5731 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5732 return 1;
5733
ae6063d4 5734 return generic_force_reloc (fix);
a161fe53
AM		 5735}
5736
0baf16f2 5737int
98027b10 5738ppc_fix_adjustable (fixS *fix)
252b5132 5739{
0baf16f2
AM		 5740 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5741 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5742 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5743 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 5744 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5745 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 5746 && fix->fx_r_type != BFD_RELOC_GPREL16
5747 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5748 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5749 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5750 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5751}
0baf16f2 5752#endif
252b5132 5753
3aeeedbb
AM		 5754/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5755 rs_align_code frag. */
5756
5757void
5758ppc_handle_align (struct frag *fragP)
5759{
5760 valueT count = (fragP->fr_next->fr_address
5761 - (fragP->fr_address + fragP->fr_fix));
5762
5763 if (count != 0 && (count & 3) == 0)
5764 {
5765 char *dest = fragP->fr_literal + fragP->fr_fix;
5766
5767 fragP->fr_var = 4;
cef4f754
AM		 5768
5769 if (count > 4 * nop_limit && count < 0x2000000)
5770 {
5771 struct frag *rest;
5772
5773 /* Make a branch, then follow with nops. Insert another
5774 frag to handle the nops. */
5775 md_number_to_chars (dest, 0x48000000 + count, 4);
5776 count -= 4;
5777 if (count == 0)
5778 return;
5779
5780 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5781 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
5782 fragP->fr_next = rest;
5783 fragP = rest;
5784 rest->fr_address += rest->fr_fix + 4;
5785 rest->fr_fix = 0;
5786 /* If we leave the next frag as rs_align_code we'll come here
5787 again, resulting in a bunch of branches rather than a
5788 branch followed by nops. */
5789 rest->fr_type = rs_align;
5790 dest = rest->fr_literal;
5791 }
5792
3aeeedbb
AM		 5793 md_number_to_chars (dest, 0x60000000, 4);
5794
42240548
PB		 5795 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5796 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5797 {
42240548
PB		 5798 /* For power6 and power7, we want the last nop to be a group
5799 terminating one. Do this by inserting an rs_fill frag immediately
5800 after this one, with its address set to the last nop location.
5801 This will automatically reduce the number of nops in the current
5802 frag by one. */
3aeeedbb
AM		 5803 if (count > 4)
5804 {
5805 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5806
5807 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5808 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5809 group_nop->fr_fix = 0;
5810 group_nop->fr_offset = 1;
5811 group_nop->fr_type = rs_fill;
5812 fragP->fr_next = group_nop;
5813 dest = group_nop->fr_literal;
5814 }
5815
42240548
PB		 5816 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5817 /* power7 group terminating nop: "ori 2,2,0". */
5818 md_number_to_chars (dest, 0x60420000, 4);
5819 else
5820 /* power6 group terminating nop: "ori 1,1,0". */
5821 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5822 }
5823 }
5824}
5825
252b5132
RH		 5826/* Apply a fixup to the object code. This is called for all the
5827 fixups we generated by the call to fix_new_exp, above. In the call
5828 above we used a reloc code which was the largest legal reloc code
5829 plus the operand index. Here we undo that to recover the operand
5830 index. At this point all symbol values should be fully resolved,
5831 and we attempt to completely resolve the reloc. If we can not do
5832 that, we determine the correct reloc code and put it back in the
5833 fixup. */
5834
94f592af 5835void
98027b10 5836md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5837{
94f592af 5838 valueT value = * valP;
252b5132
RH		 5839
5840#ifdef OBJ_ELF
94f592af 5841 if (fixP->fx_addsy != NULL)
252b5132 5842 {
a161fe53 5843 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5844 if (fixP->fx_pcrel)
5845 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5846 }
5847 else
94f592af 5848 fixP->fx_done = 1;
252b5132 5849#else
a161fe53 5850 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5851 the symbol values. If we are doing this relocation the code in
5852 write.c is going to call bfd_install_relocation, which is also
5853 going to use the symbol value. That means that if the reloc is
5854 fully resolved we want to use *valP since bfd_install_relocation is
5855 not being used.
9f0eb232
RS		 5856 However, if the reloc is not fully resolved we do not want to
5857 use *valP, and must use fx_offset instead. If the relocation
5858 is PC-relative, we then need to re-apply md_pcrel_from_section
5859 to this new relocation value. */
94f592af
NC		 5860 if (fixP->fx_addsy == (symbolS *) NULL)
5861 fixP->fx_done = 1;
5862
252b5132 5863 else
9f0eb232
RS		 5864 {
5865 value = fixP->fx_offset;
5866 if (fixP->fx_pcrel)
5867 value -= md_pcrel_from_section (fixP, seg);
5868 }
a161fe53
AM		 5869#endif
5870
5871 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5872 {
a161fe53
AM		 5873 /* We can't actually support subtracting a symbol. */
5874 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5875 }
252b5132 5876
94f592af 5877 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5878 {
5879 int opindex;
5880 const struct powerpc_operand *operand;
5881 char *where;
5882 unsigned long insn;
5883
94f592af 5884 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5885
5886 operand = &powerpc_operands[opindex];
5887
5888#ifdef OBJ_XCOFF
0baf16f2
AM		 5889 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5890 does not generate a reloc. It uses the offset of `sym' within its
5891 csect. Other usages, such as `.long sym', generate relocs. This
5892 is the documented behaviour of non-TOC symbols. */
252b5132 5893 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5894 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5895 && operand->shift == 0
2b3c4602 5896 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5897 && fixP->fx_addsy != NULL
5898 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5899 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5900 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5901 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5902 {
94f592af
NC		 5903 value = fixP->fx_offset;
5904 fixP->fx_done = 1;
252b5132
RH		 5905 }
5906#endif
5907
5908 /* Fetch the instruction, insert the fully resolved operand
5909 value, and stuff the instruction back again. */
94f592af 5910 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5911 if (target_big_endian)
5912 insn = bfd_getb32 ((unsigned char *) where);
5913 else
5914 insn = bfd_getl32 ((unsigned char *) where);
5915 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5916 fixP->tc_fix_data.ppc_cpu,
94f592af 5917 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5918 if (target_big_endian)
5919 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5920 else
5921 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5922
94f592af
NC		 5923 if (fixP->fx_done)
5924 /* Nothing else to do here. */
5925 return;
252b5132 5926
9c2799c2 5927 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5928
252b5132
RH		 5929 /* Determine a BFD reloc value based on the operand information.
5930 We are only prepared to turn a few of the operands into
0baf16f2 5931 relocs. */
11b37b7b 5932 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5933 && operand->bitm == 0x3fffffc
11b37b7b 5934 && operand->shift == 0)
94f592af 5935 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5936 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5937 && operand->bitm == 0xfffc
11b37b7b 5938 && operand->shift == 0)
95210096
AM		 5939 {
5940 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5941#ifdef OBJ_XCOFF
5942 fixP->fx_size = 2;
5943 if (target_big_endian)
5944 fixP->fx_where += 2;
5945#endif
5946 }
11b37b7b 5947 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5948 && operand->bitm == 0x3fffffc
11b37b7b 5949 && operand->shift == 0)
94f592af 5950 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5951 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5952 && operand->bitm == 0xfffc
11b37b7b 5953 && operand->shift == 0)
95210096
AM		 5954 {
5955 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5956#ifdef OBJ_XCOFF
5957 fixP->fx_size = 2;
5958 if (target_big_endian)
5959 fixP->fx_where += 2;
5960#endif
5961 }
0baf16f2 5962#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5963 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5964 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5965 && operand->shift == 0)
11b37b7b 5966 {
a7fc733f
AM		 5967 if (ppc_is_toc_sym (fixP->fx_addsy))
5968 {
5969 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5970#ifdef OBJ_ELF
a7fc733f
AM		 5971 if (ppc_obj64
5972 && (operand->flags & PPC_OPERAND_DS) != 0)
5973 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5974#endif
5975 }
5976 else
5977 {
5978 fixP->fx_r_type = BFD_RELOC_16;
5979#ifdef OBJ_ELF
5980 if (ppc_obj64
5981 && (operand->flags & PPC_OPERAND_DS) != 0)
5982 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5983#endif
a7fc733f 5984 }
94f592af 5985 fixP->fx_size = 2;
11b37b7b 5986 if (target_big_endian)
94f592af 5987 fixP->fx_where += 2;
11b37b7b 5988 }
0baf16f2 5989#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5990 else
252b5132
RH		 5991 {
5992 char *sfile;
5993 unsigned int sline;
5994
5995 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5996 symbol. */
94f592af
NC		 5997 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5998 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5999 _("unresolved expression that must be resolved"));
6000 else
94f592af 6001 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6002 _("unsupported relocation against %s"),
94f592af
NC		 6003 S_GET_NAME (fixP->fx_addsy));
6004 fixP->fx_done = 1;
6005 return;
252b5132
RH		 6006 }
6007 }
6008 else
6009 {
6010#ifdef OBJ_ELF
94f592af 6011 ppc_elf_validate_fix (fixP, seg);
252b5132 6012#endif
94f592af 6013 switch (fixP->fx_r_type)
252b5132 6014 {
252b5132 6015 case BFD_RELOC_CTOR:
2b3c4602 6016 if (ppc_obj64)
9c7977b3
AM		 6017 goto ctor64;
6018 /* fall through */
6019
0baf16f2 6020 case BFD_RELOC_32:
94f592af
NC		 6021 if (fixP->fx_pcrel)
6022 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6023 /* fall through */
252b5132
RH		 6024
6025 case BFD_RELOC_RVA:
6026 case BFD_RELOC_32_PCREL:
252b5132 6027 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6028 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6029 value, 4);
6030 break;
6031
7f6d05e8 6032 case BFD_RELOC_64:
9c7977b3 6033 ctor64:
94f592af
NC		 6034 if (fixP->fx_pcrel)
6035 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6036 /* fall through */
0baf16f2 6037
7f6d05e8 6038 case BFD_RELOC_64_PCREL:
94f592af 6039 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6040 value, 8);
81d4177b 6041 break;
0baf16f2 6042
252b5132
RH		 6043 case BFD_RELOC_GPREL16:
6044 case BFD_RELOC_16_GOT_PCREL:
6045 case BFD_RELOC_16_GOTOFF:
6046 case BFD_RELOC_LO16_GOTOFF:
6047 case BFD_RELOC_HI16_GOTOFF:
6048 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6049 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6050 case BFD_RELOC_LO16_BASEREL:
6051 case BFD_RELOC_HI16_BASEREL:
6052 case BFD_RELOC_HI16_S_BASEREL:
6053 case BFD_RELOC_PPC_EMB_NADDR16:
6054 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6055 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6056 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6057 case BFD_RELOC_PPC_EMB_SDAI16:
6058 case BFD_RELOC_PPC_EMB_SDA2REL:
6059 case BFD_RELOC_PPC_EMB_SDA2I16:
6060 case BFD_RELOC_PPC_EMB_RELSEC16:
6061 case BFD_RELOC_PPC_EMB_RELST_LO:
6062 case BFD_RELOC_PPC_EMB_RELST_HI:
6063 case BFD_RELOC_PPC_EMB_RELST_HA:
6064 case BFD_RELOC_PPC_EMB_RELSDA:
6065 case BFD_RELOC_PPC_TOC16:
0baf16f2 6066#ifdef OBJ_ELF
0baf16f2
AM		 6067 case BFD_RELOC_PPC64_TOC16_LO:
6068 case BFD_RELOC_PPC64_TOC16_HI:
6069 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6070#endif
94f592af 6071 if (fixP->fx_pcrel)
252b5132 6072 {
94f592af
NC		 6073 if (fixP->fx_addsy != NULL)
6074 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6075 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6076 bfd_get_reloc_code_name (fixP->fx_r_type),
6077 S_GET_NAME (fixP->fx_addsy));
252b5132 6078 else
94f592af 6079 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6080 _("cannot emit PC relative %s relocation"),
94f592af 6081 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6082 }
6083
94f592af 6084 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6085 value, 2);
6086 break;
6087
3c9d25f4
AM		 6088 case BFD_RELOC_16:
6089 if (fixP->fx_pcrel)
6090 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6091 /* fall through */
6092
6093 case BFD_RELOC_16_PCREL:
6094 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6095 value, 2);
6096 break;
6097
6098 case BFD_RELOC_LO16:
6099 if (fixP->fx_pcrel)
6100 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6101 /* fall through */
6102
6103 case BFD_RELOC_LO16_PCREL:
6104 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6105 value, 2);
6106 break;
6107
252b5132
RH		 6108 /* This case happens when you write, for example,
6109 lis %r3,(L1-L2)@ha
6110 where L1 and L2 are defined later. */
6111 case BFD_RELOC_HI16:
94f592af 6112 if (fixP->fx_pcrel)
3c9d25f4
AM		 6113 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6114 /* fall through */
6115
6116 case BFD_RELOC_HI16_PCREL:
94f592af 6117 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6118 PPC_HI (value), 2);
252b5132 6119 break;
0baf16f2 6120
252b5132 6121 case BFD_RELOC_HI16_S:
94f592af 6122 if (fixP->fx_pcrel)
3c9d25f4
AM		 6123 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6124 /* fall through */
6125
6126 case BFD_RELOC_HI16_S_PCREL:
94f592af 6127 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6128 PPC_HA (value), 2);
6129 break;
6130
c865e45b
RS		 6131#ifdef OBJ_XCOFF
6132 case BFD_RELOC_NONE:
6133 break;
6134#endif
6135
0baf16f2 6136#ifdef OBJ_ELF
0baf16f2 6137 case BFD_RELOC_PPC64_HIGHER:
94f592af 6138 if (fixP->fx_pcrel)
0baf16f2 6139 abort ();
94f592af 6140 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6141 PPC_HIGHER (value), 2);
252b5132
RH		 6142 break;
6143
0baf16f2 6144 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6145 if (fixP->fx_pcrel)
0baf16f2 6146 abort ();
94f592af 6147 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6148 PPC_HIGHERA (value), 2);
6149 break;
6150
6151 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6152 if (fixP->fx_pcrel)
0baf16f2 6153 abort ();
94f592af 6154 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6155 PPC_HIGHEST (value), 2);
6156 break;
6157
6158 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6159 if (fixP->fx_pcrel)
0baf16f2 6160 abort ();
94f592af 6161 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6162 PPC_HIGHESTA (value), 2);
6163 break;
6164
6165 case BFD_RELOC_PPC64_ADDR16_DS:
6166 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6167 case BFD_RELOC_PPC64_GOT16_DS:
6168 case BFD_RELOC_PPC64_GOT16_LO_DS:
6169 case BFD_RELOC_PPC64_PLT16_LO_DS:
6170 case BFD_RELOC_PPC64_SECTOFF_DS:
6171 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6172 case BFD_RELOC_PPC64_TOC16_DS:
6173 case BFD_RELOC_PPC64_TOC16_LO_DS:
6174 case BFD_RELOC_PPC64_PLTGOT16_DS:
6175 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6176 if (fixP->fx_pcrel)
0baf16f2
AM		 6177 abort ();
6178 {
2132e3a3 6179 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6180 unsigned long val, mask;
0baf16f2
AM		 6181
6182 if (target_big_endian)
adadcc0c 6183 val = bfd_getb32 (where - 2);
0baf16f2 6184 else
adadcc0c
AM		 6185 val = bfd_getl32 (where);
6186 mask = 0xfffc;
6187 /* lq insns reserve the four lsbs. */
6188 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6189 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6190 mask = 0xfff0;
6191 val |= value & mask;
0baf16f2
AM		 6192 if (target_big_endian)
6193 bfd_putb16 ((bfd_vma) val, where);
6194 else
6195 bfd_putl16 ((bfd_vma) val, where);
6196 }
6197 break;
cdba85ec 6198
ba0b2174
AM		 6199 case BFD_RELOC_PPC_B16_BRTAKEN:
6200 case BFD_RELOC_PPC_B16_BRNTAKEN:
6201 case BFD_RELOC_PPC_BA16_BRTAKEN:
6202 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6203 break;
6204
cdba85ec 6205 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6206 case BFD_RELOC_PPC_TLSGD:
6207 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6208 break;
6209
cdba85ec
AM		 6210 case BFD_RELOC_PPC_DTPMOD:
6211 case BFD_RELOC_PPC_TPREL16:
6212 case BFD_RELOC_PPC_TPREL16_LO:
6213 case BFD_RELOC_PPC_TPREL16_HI:
6214 case BFD_RELOC_PPC_TPREL16_HA:
6215 case BFD_RELOC_PPC_TPREL:
6216 case BFD_RELOC_PPC_DTPREL16:
6217 case BFD_RELOC_PPC_DTPREL16_LO:
6218 case BFD_RELOC_PPC_DTPREL16_HI:
6219 case BFD_RELOC_PPC_DTPREL16_HA:
6220 case BFD_RELOC_PPC_DTPREL:
6221 case BFD_RELOC_PPC_GOT_TLSGD16:
6222 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6223 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6224 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6225 case BFD_RELOC_PPC_GOT_TLSLD16:
6226 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6227 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6228 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6229 case BFD_RELOC_PPC_GOT_TPREL16:
6230 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6231 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6232 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6233 case BFD_RELOC_PPC_GOT_DTPREL16:
6234 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6235 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6236 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6237 case BFD_RELOC_PPC64_TPREL16_DS:
6238 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6239 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6240 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6241 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6242 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6243 case BFD_RELOC_PPC64_DTPREL16_DS:
6244 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6245 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6246 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6247 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6248 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6249 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6250 break;
0baf16f2 6251#endif
252b5132 6252 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6253 bytes, rather than 2, so offset it here appropriately. */
252b5132 6254 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6255 if (fixP->fx_pcrel)
252b5132
RH		 6256 abort ();
6257
94f592af 6258 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6259 + ((target_big_endian) ? 2 : 0),
6260 value, 2);
6261 break;
6262
6263 case BFD_RELOC_8:
94f592af 6264 if (fixP->fx_pcrel)
31a91399
NC		 6265 {
6266 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6267 ".byte <undefined_symbol> - ." */
31a91399
NC		 6268 if (fixP->fx_addsy)
6269 as_bad (_("Unable to handle reference to symbol %s"),
6270 S_GET_NAME (fixP->fx_addsy));
6271 else
6272 as_bad (_("Unable to resolve expression"));
6273 fixP->fx_done = 1;
6274 }
6275 else
6276 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6277 value, 1);
252b5132
RH		 6278 break;
6279
6280 case BFD_RELOC_24_PLT_PCREL:
6281 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6282 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6283 abort ();
6284
94f592af 6285 if (fixP->fx_done)
99a814a1
AM		 6286 {
6287 char *where;
6288 unsigned long insn;
6289
6290 /* Fetch the instruction, insert the fully resolved operand
6291 value, and stuff the instruction back again. */
94f592af 6292 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6293 if (target_big_endian)
6294 insn = bfd_getb32 ((unsigned char *) where);
6295 else
6296 insn = bfd_getl32 ((unsigned char *) where);
6297 if ((value & 3) != 0)
94f592af 6298 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6299 _("must branch to an address a multiple of 4"));
6300 if ((offsetT) value < -0x40000000
6301 || (offsetT) value >= 0x40000000)
94f592af 6302 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6303 _("@local or @plt branch destination is too far away, %ld bytes"),
6304 (long) value);
6305 insn = insn | (value & 0x03fffffc);
6306 if (target_big_endian)
6307 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6308 else
6309 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6310 }
252b5132
RH		 6311 break;
6312
6313 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6314 fixP->fx_done = 0;
6315 if (fixP->fx_addsy
6316 && !S_IS_DEFINED (fixP->fx_addsy)
6317 && !S_IS_WEAK (fixP->fx_addsy))
6318 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6319 break;
6320
6321 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6322 fixP->fx_done = 0;
252b5132
RH		 6323 break;
6324
0baf16f2 6325#ifdef OBJ_ELF
0baf16f2
AM		 6326 /* Generated by reference to `sym@tocbase'. The sym is
6327 ignored by the linker. */
6328 case BFD_RELOC_PPC64_TOC:
94f592af 6329 fixP->fx_done = 0;
0baf16f2 6330 break;
0baf16f2 6331#endif
252b5132 6332 default:
bc805888 6333 fprintf (stderr,
94f592af 6334 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6335 fflush (stderr);
252b5132
RH		 6336 abort ();
6337 }
6338 }
6339
6340#ifdef OBJ_ELF
94f592af 6341 fixP->fx_addnumber = value;
4e6935a6
AM		 6342
6343 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6344 from the section contents. If we are going to be emitting a reloc
6345 then the section contents are immaterial, so don't warn if they
6346 happen to overflow. Leave such warnings to ld. */
6347 if (!fixP->fx_done)
6348 fixP->fx_no_overflow = 1;
252b5132 6349#else
94f592af
NC		 6350 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6351 fixP->fx_addnumber = 0;
252b5132
RH		 6352 else
6353 {
6354#ifdef TE_PE
94f592af 6355 fixP->fx_addnumber = 0;
252b5132 6356#else
8edcbfcd
TG		 6357 /* We want to use the offset within the toc, not the actual VMA
6358 of the symbol. */
94f592af 6359 fixP->fx_addnumber =
8edcbfcd
TG		 6360 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6361 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6362#endif
6363 }
6364#endif
252b5132
RH		 6365}
6366
6367/* Generate a reloc for a fixup. */
6368
6369arelent *
98027b10 6370tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6371{
6372 arelent *reloc;
6373
6374 reloc = (arelent *) xmalloc (sizeof (arelent));
6375
49309057
ILT		 6376 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6377 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6378 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6379 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6380 if (reloc->howto == (reloc_howto_type *) NULL)
6381 {
6382 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6383 _("reloc %d not supported by object file format"),
6384 (int) fixp->fx_r_type);
252b5132
RH		 6385 return NULL;
6386 }
6387 reloc->addend = fixp->fx_addnumber;
6388
6389 return reloc;
6390}
75e21f08
JJ		 6391
6392void
98027b10 6393ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6394{
6395 cfi_add_CFA_def_cfa (1, 0);
6396}
6397
6398int
1df69f4f 6399tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6400{
6401 unsigned int regnum = -1;
6402 unsigned int i;
6403 const char *p;
6404 char *q;
6405 static struct { char *name; int dw2regnum; } regnames[] =
6406 {
6407 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6408 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6409 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6410 { "spe_acc", 111 }, { "spefscr", 112 }
6411 };
6412
6413 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6414 if (strcmp (regnames[i].name, regname) == 0)
6415 return regnames[i].dw2regnum;
6416
6417 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6418 {
6419 p = regname + 1 + (regname[1] == '.');
6420 regnum = strtoul (p, &q, 10);
6421 if (p == q || *q || regnum >= 32)
6422 return -1;
6423 if (regname[0] == 'f')
b7d7dc63 6424 regnum += 32;
75e21f08 6425 else if (regname[0] == 'v')
b7d7dc63 6426 regnum += 77;
75e21f08
JJ		 6427 }
6428 else if (regname[0] == 'c' && regname[1] == 'r')
6429 {
6430 p = regname + 2 + (regname[2] == '.');
6431 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6432 return -1;
75e21f08
JJ		 6433 regnum = p[0] - '0' + 68;
6434 }
6435 return regnum;
6436}
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