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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
d87bef3a | 2 | Copyright (C) 1994-2023 Free Software Foundation, Inc. |
252b5132 RH |
3 | Written by Ian Lance Taylor, Cygnus Support. |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
10 | any later version. |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "as.h" |
3882b010 | 23 | #include "safe-ctype.h" |
252b5132 | 24 | #include "subsegs.h" |
75e21f08 | 25 | #include "dw2gencfi.h" |
252b5132 RH |
26 | #include "opcode/ppc.h" |
27 | ||
28 | #ifdef OBJ_ELF | |
29 | #include "elf/ppc.h" | |
ee67d69a | 30 | #include "elf/ppc64.h" |
5d6f4f16 | 31 | #include "dwarf2dbg.h" |
252b5132 RH |
32 | #endif |
33 | ||
85645aed TG |
34 | #ifdef OBJ_XCOFF |
35 | #include "coff/xcoff.h" | |
36 | #include "libxcoff.h" | |
37 | #endif | |
38 | ||
252b5132 RH |
39 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ |
40 | ||
41 | /* Tell the main code what the endianness is. */ | |
42 | extern int target_big_endian; | |
43 | ||
44 | /* Whether or not, we've set target_big_endian. */ | |
45 | static int set_target_endian = 0; | |
46 | ||
47 | /* Whether to use user friendly register names. */ | |
48 | #ifndef TARGET_REG_NAMES_P | |
5b7c81bd | 49 | #define TARGET_REG_NAMES_P false |
252b5132 | 50 | #endif |
252b5132 | 51 | |
0baf16f2 AM |
52 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
53 | HIGHESTA. */ | |
54 | ||
55 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
56 | #define PPC_LO(v) ((v) & 0xffff) | |
57 | ||
58 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ | |
59 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
60 | ||
61 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of | |
62 | the indicated value, compensating for #lo() being treated as a | |
63 | signed number. */ | |
15c1449b | 64 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 AM |
65 | |
66 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ | |
2a98c3a6 | 67 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
68 | |
69 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
70 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 71 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
72 | |
73 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 74 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
75 | |
76 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
77 | compensating for #lo being treated as a signed number. */ |
78 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 | 79 | |
f9c6b907 AM |
80 | #define SEX16(val) (((val) ^ 0x8000) - 0x8000) |
81 | ||
82 | /* For the time being on ppc64, don't report overflow on @h and @ha | |
83 | applied to constants. */ | |
84 | #define REPORT_OVERFLOW_HI 0 | |
0baf16f2 | 85 | |
5b7c81bd | 86 | static bool reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 87 | |
98027b10 | 88 | static void ppc_byte (int); |
0baf16f2 AM |
89 | |
90 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
91 | static void ppc_tc (int); |
92 | static void ppc_machine (int); | |
0baf16f2 | 93 | #endif |
252b5132 RH |
94 | |
95 | #ifdef OBJ_XCOFF | |
98027b10 AM |
96 | static void ppc_comm (int); |
97 | static void ppc_bb (int); | |
98 | static void ppc_bc (int); | |
99 | static void ppc_bf (int); | |
100 | static void ppc_biei (int); | |
101 | static void ppc_bs (int); | |
102 | static void ppc_eb (int); | |
103 | static void ppc_ec (int); | |
104 | static void ppc_ef (int); | |
105 | static void ppc_es (int); | |
106 | static void ppc_csect (int); | |
85645aed | 107 | static void ppc_dwsect (int); |
98027b10 | 108 | static void ppc_change_csect (symbolS *, offsetT); |
e86fc4a5 | 109 | static void ppc_file (int); |
98027b10 AM |
110 | static void ppc_function (int); |
111 | static void ppc_extern (int); | |
add588a8 | 112 | static void ppc_globl (int); |
98027b10 | 113 | static void ppc_lglobl (int); |
c865e45b | 114 | static void ppc_ref (int); |
98027b10 AM |
115 | static void ppc_section (int); |
116 | static void ppc_named_section (int); | |
117 | static void ppc_stabx (int); | |
118 | static void ppc_rename (int); | |
119 | static void ppc_toc (int); | |
120 | static void ppc_xcoff_cons (int); | |
121 | static void ppc_vbyte (int); | |
add588a8 | 122 | static void ppc_weak (int); |
09d4578f | 123 | static void ppc_GNU_visibility (int); |
252b5132 RH |
124 | #endif |
125 | ||
126 | #ifdef OBJ_ELF | |
98027b10 AM |
127 | static void ppc_elf_rdata (int); |
128 | static void ppc_elf_lcomm (int); | |
6911b7dc | 129 | static void ppc_elf_localentry (int); |
ee67d69a | 130 | static void ppc_elf_abiversion (int); |
005d79fd | 131 | static void ppc_elf_gnu_attribute (int); |
252b5132 | 132 | #endif |
252b5132 RH |
133 | \f |
134 | /* Generic assembler global variables which must be defined by all | |
135 | targets. */ | |
136 | ||
137 | #ifdef OBJ_ELF | |
138 | /* This string holds the chars that always start a comment. If the | |
139 | pre-processor is disabled, these aren't very useful. The macro | |
140 | tc_comment_chars points to this. We use this, rather than the | |
141 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
142 | static const char ppc_solaris_comment_chars[] = "#!"; | |
143 | static const char ppc_eabi_comment_chars[] = "#"; | |
144 | ||
145 | #ifdef TARGET_SOLARIS_COMMENT | |
146 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
147 | #else | |
148 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
149 | #endif | |
150 | #else | |
151 | const char comment_chars[] = "#"; | |
152 | #endif | |
153 | ||
154 | /* Characters which start a comment at the beginning of a line. */ | |
155 | const char line_comment_chars[] = "#"; | |
156 | ||
157 | /* Characters which may be used to separate multiple commands on a | |
158 | single line. */ | |
159 | const char line_separator_chars[] = ";"; | |
160 | ||
161 | /* Characters which are used to indicate an exponent in a floating | |
162 | point number. */ | |
163 | const char EXP_CHARS[] = "eE"; | |
164 | ||
165 | /* Characters which mean that a number is a floating point constant, | |
166 | as in 0d1.0. */ | |
167 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 168 | |
5e02f92e | 169 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 170 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 171 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
172 | |
173 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
174 | int ppc_cie_data_alignment; | |
783de163 | 175 | |
8fbf7334 JL |
176 | /* The dwarf2 minimum instruction length. */ |
177 | int ppc_dwarf2_line_min_insn_length; | |
178 | ||
cef4f754 AM |
179 | /* More than this number of nops in an alignment op gets a branch |
180 | instead. */ | |
181 | unsigned long nop_limit = 4; | |
182 | ||
783de163 AM |
183 | /* The type of processor we are assembling for. This is one or more |
184 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 185 | ppc_cpu_t ppc_cpu = 0; |
776fc418 | 186 | ppc_cpu_t sticky = 0; |
01efc3af | 187 | |
ee67d69a AM |
188 | /* Value for ELF e_flags EF_PPC64_ABI. */ |
189 | unsigned int ppc_abiversion = 0; | |
190 | ||
05f7541e | 191 | #ifdef OBJ_ELF |
01efc3af | 192 | /* Flags set on encountering toc relocs. */ |
4f2a7b51 | 193 | static enum { |
01efc3af AM |
194 | has_large_toc_reloc = 1, |
195 | has_small_toc_reloc = 2 | |
196 | } toc_reloc_types; | |
05f7541e | 197 | #endif |
bf7279d5 AM |
198 | |
199 | /* Warn on emitting data to code sections. */ | |
200 | int warn_476; | |
0f873fd5 | 201 | uint64_t last_insn; |
bf7279d5 AM |
202 | segT last_seg; |
203 | subsegT last_subseg; | |
252b5132 RH |
204 | \f |
205 | /* The target specific pseudo-ops which we support. */ | |
206 | ||
207 | const pseudo_typeS md_pseudo_table[] = | |
208 | { | |
209 | /* Pseudo-ops which must be overridden. */ | |
210 | { "byte", ppc_byte, 0 }, | |
211 | ||
212 | #ifdef OBJ_XCOFF | |
213 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
214 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
215 | on COFF, and is only implemented for the RS/6000. We just use | |
216 | obj-coff.c, and add what we need here. */ | |
217 | { "comm", ppc_comm, 0 }, | |
218 | { "lcomm", ppc_comm, 1 }, | |
219 | { "bb", ppc_bb, 0 }, | |
220 | { "bc", ppc_bc, 0 }, | |
221 | { "bf", ppc_bf, 0 }, | |
222 | { "bi", ppc_biei, 0 }, | |
223 | { "bs", ppc_bs, 0 }, | |
224 | { "csect", ppc_csect, 0 }, | |
85645aed | 225 | { "dwsect", ppc_dwsect, 0 }, |
252b5132 RH |
226 | { "data", ppc_section, 'd' }, |
227 | { "eb", ppc_eb, 0 }, | |
228 | { "ec", ppc_ec, 0 }, | |
229 | { "ef", ppc_ef, 0 }, | |
230 | { "ei", ppc_biei, 1 }, | |
231 | { "es", ppc_es, 0 }, | |
232 | { "extern", ppc_extern, 0 }, | |
e86fc4a5 | 233 | { "file", ppc_file, 0 }, |
252b5132 | 234 | { "function", ppc_function, 0 }, |
add588a8 | 235 | { "globl", ppc_globl, 0 }, |
252b5132 | 236 | { "lglobl", ppc_lglobl, 0 }, |
c865e45b | 237 | { "ref", ppc_ref, 0 }, |
252b5132 RH |
238 | { "rename", ppc_rename, 0 }, |
239 | { "section", ppc_named_section, 0 }, | |
240 | { "stabx", ppc_stabx, 0 }, | |
241 | { "text", ppc_section, 't' }, | |
242 | { "toc", ppc_toc, 0 }, | |
243 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 244 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
245 | { "word", ppc_xcoff_cons, 1 }, |
246 | { "short", ppc_xcoff_cons, 1 }, | |
247 | { "vbyte", ppc_vbyte, 0 }, | |
add588a8 | 248 | { "weak", ppc_weak, 0 }, |
09d4578f CC |
249 | |
250 | /* Enable GNU syntax for symbol visibility. */ | |
251 | {"internal", ppc_GNU_visibility, SYM_V_INTERNAL}, | |
252 | {"hidden", ppc_GNU_visibility, SYM_V_HIDDEN}, | |
253 | {"protected", ppc_GNU_visibility, SYM_V_PROTECTED}, | |
252b5132 RH |
254 | #endif |
255 | ||
256 | #ifdef OBJ_ELF | |
62ebcb5c | 257 | { "llong", cons, 8 }, |
252b5132 RH |
258 | { "rdata", ppc_elf_rdata, 0 }, |
259 | { "rodata", ppc_elf_rdata, 0 }, | |
260 | { "lcomm", ppc_elf_lcomm, 0 }, | |
6911b7dc | 261 | { "localentry", ppc_elf_localentry, 0 }, |
ee67d69a | 262 | { "abiversion", ppc_elf_abiversion, 0 }, |
005d79fd | 263 | { "gnu_attribute", ppc_elf_gnu_attribute, 0}, |
252b5132 RH |
264 | #endif |
265 | ||
0baf16f2 | 266 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 267 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
268 | { "machine", ppc_machine, 0 }, |
269 | #endif | |
252b5132 RH |
270 | |
271 | { NULL, NULL, 0 } | |
272 | }; | |
273 | ||
274 | \f | |
99a814a1 AM |
275 | /* Predefined register names if -mregnames (or default for Windows NT). |
276 | In general, there are lots of them, in an attempt to be compatible | |
277 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
278 | |
279 | /* Structure to hold information about predefined registers. */ | |
280 | struct pd_reg | |
281 | { | |
e0471c16 | 282 | const char *name; |
7e0de605 AM |
283 | unsigned short value; |
284 | unsigned short flags; | |
252b5132 RH |
285 | }; |
286 | ||
287 | /* List of registers that are pre-defined: | |
288 | ||
289 | Each general register has predefined names of the form: | |
290 | 1. r<reg_num> which has the value <reg_num>. | |
291 | 2. r.<reg_num> which has the value <reg_num>. | |
292 | ||
252b5132 RH |
293 | Each floating point register has predefined names of the form: |
294 | 1. f<reg_num> which has the value <reg_num>. | |
295 | 2. f.<reg_num> which has the value <reg_num>. | |
296 | ||
7a899fff C |
297 | Each vector unit register has predefined names of the form: |
298 | 1. v<reg_num> which has the value <reg_num>. | |
299 | 2. v.<reg_num> which has the value <reg_num>. | |
300 | ||
252b5132 RH |
301 | Each condition register has predefined names of the form: |
302 | 1. cr<reg_num> which has the value <reg_num>. | |
303 | 2. cr.<reg_num> which has the value <reg_num>. | |
304 | ||
305 | There are individual registers as well: | |
306 | sp or r.sp has the value 1 | |
307 | rtoc or r.toc has the value 2 | |
252b5132 RH |
308 | xer has the value 1 |
309 | lr has the value 8 | |
310 | ctr has the value 9 | |
252b5132 RH |
311 | dar has the value 19 |
312 | dsisr has the value 18 | |
313 | dec has the value 22 | |
314 | sdr1 has the value 25 | |
315 | srr0 has the value 26 | |
316 | srr1 has the value 27 | |
317 | ||
81d4177b | 318 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
319 | |
320 | static const struct pd_reg pre_defined_registers[] = | |
321 | { | |
aa3c112f AM |
322 | /* VSX accumulators. */ |
323 | { "a0", 0, PPC_OPERAND_ACC }, | |
324 | { "a1", 1, PPC_OPERAND_ACC }, | |
325 | { "a2", 2, PPC_OPERAND_ACC }, | |
326 | { "a3", 3, PPC_OPERAND_ACC }, | |
327 | { "a4", 4, PPC_OPERAND_ACC }, | |
328 | { "a5", 5, PPC_OPERAND_ACC }, | |
329 | { "a6", 6, PPC_OPERAND_ACC }, | |
330 | { "a7", 7, PPC_OPERAND_ACC }, | |
331 | ||
7e0de605 AM |
332 | /* Condition Registers */ |
333 | { "cr.0", 0, PPC_OPERAND_CR_REG }, | |
334 | { "cr.1", 1, PPC_OPERAND_CR_REG }, | |
335 | { "cr.2", 2, PPC_OPERAND_CR_REG }, | |
336 | { "cr.3", 3, PPC_OPERAND_CR_REG }, | |
337 | { "cr.4", 4, PPC_OPERAND_CR_REG }, | |
338 | { "cr.5", 5, PPC_OPERAND_CR_REG }, | |
339 | { "cr.6", 6, PPC_OPERAND_CR_REG }, | |
340 | { "cr.7", 7, PPC_OPERAND_CR_REG }, | |
341 | ||
342 | { "cr0", 0, PPC_OPERAND_CR_REG }, | |
343 | { "cr1", 1, PPC_OPERAND_CR_REG }, | |
344 | { "cr2", 2, PPC_OPERAND_CR_REG }, | |
345 | { "cr3", 3, PPC_OPERAND_CR_REG }, | |
346 | { "cr4", 4, PPC_OPERAND_CR_REG }, | |
347 | { "cr5", 5, PPC_OPERAND_CR_REG }, | |
348 | { "cr6", 6, PPC_OPERAND_CR_REG }, | |
349 | { "cr7", 7, PPC_OPERAND_CR_REG }, | |
350 | ||
351 | { "ctr", 9, PPC_OPERAND_SPR }, | |
352 | { "dar", 19, PPC_OPERAND_SPR }, | |
353 | { "dec", 22, PPC_OPERAND_SPR }, | |
354 | { "dsisr", 18, PPC_OPERAND_SPR }, | |
355 | ||
79e24d0a PB |
356 | /* Dense Math Registers. */ |
357 | { "dm0", 0, PPC_OPERAND_DMR }, | |
358 | { "dm1", 1, PPC_OPERAND_DMR }, | |
359 | { "dm2", 2, PPC_OPERAND_DMR }, | |
360 | { "dm3", 3, PPC_OPERAND_DMR }, | |
361 | { "dm4", 4, PPC_OPERAND_DMR }, | |
362 | { "dm5", 5, PPC_OPERAND_DMR }, | |
363 | { "dm6", 6, PPC_OPERAND_DMR }, | |
364 | { "dm7", 7, PPC_OPERAND_DMR }, | |
365 | ||
7e0de605 AM |
366 | /* Floating point registers */ |
367 | { "f.0", 0, PPC_OPERAND_FPR }, | |
368 | { "f.1", 1, PPC_OPERAND_FPR }, | |
369 | { "f.10", 10, PPC_OPERAND_FPR }, | |
370 | { "f.11", 11, PPC_OPERAND_FPR }, | |
371 | { "f.12", 12, PPC_OPERAND_FPR }, | |
372 | { "f.13", 13, PPC_OPERAND_FPR }, | |
373 | { "f.14", 14, PPC_OPERAND_FPR }, | |
374 | { "f.15", 15, PPC_OPERAND_FPR }, | |
375 | { "f.16", 16, PPC_OPERAND_FPR }, | |
376 | { "f.17", 17, PPC_OPERAND_FPR }, | |
377 | { "f.18", 18, PPC_OPERAND_FPR }, | |
378 | { "f.19", 19, PPC_OPERAND_FPR }, | |
379 | { "f.2", 2, PPC_OPERAND_FPR }, | |
380 | { "f.20", 20, PPC_OPERAND_FPR }, | |
381 | { "f.21", 21, PPC_OPERAND_FPR }, | |
382 | { "f.22", 22, PPC_OPERAND_FPR }, | |
383 | { "f.23", 23, PPC_OPERAND_FPR }, | |
384 | { "f.24", 24, PPC_OPERAND_FPR }, | |
385 | { "f.25", 25, PPC_OPERAND_FPR }, | |
386 | { "f.26", 26, PPC_OPERAND_FPR }, | |
387 | { "f.27", 27, PPC_OPERAND_FPR }, | |
388 | { "f.28", 28, PPC_OPERAND_FPR }, | |
389 | { "f.29", 29, PPC_OPERAND_FPR }, | |
390 | { "f.3", 3, PPC_OPERAND_FPR }, | |
391 | { "f.30", 30, PPC_OPERAND_FPR }, | |
392 | { "f.31", 31, PPC_OPERAND_FPR }, | |
393 | { "f.32", 32, PPC_OPERAND_VSR }, | |
394 | { "f.33", 33, PPC_OPERAND_VSR }, | |
395 | { "f.34", 34, PPC_OPERAND_VSR }, | |
396 | { "f.35", 35, PPC_OPERAND_VSR }, | |
397 | { "f.36", 36, PPC_OPERAND_VSR }, | |
398 | { "f.37", 37, PPC_OPERAND_VSR }, | |
399 | { "f.38", 38, PPC_OPERAND_VSR }, | |
400 | { "f.39", 39, PPC_OPERAND_VSR }, | |
401 | { "f.4", 4, PPC_OPERAND_FPR }, | |
402 | { "f.40", 40, PPC_OPERAND_VSR }, | |
403 | { "f.41", 41, PPC_OPERAND_VSR }, | |
404 | { "f.42", 42, PPC_OPERAND_VSR }, | |
405 | { "f.43", 43, PPC_OPERAND_VSR }, | |
406 | { "f.44", 44, PPC_OPERAND_VSR }, | |
407 | { "f.45", 45, PPC_OPERAND_VSR }, | |
408 | { "f.46", 46, PPC_OPERAND_VSR }, | |
409 | { "f.47", 47, PPC_OPERAND_VSR }, | |
410 | { "f.48", 48, PPC_OPERAND_VSR }, | |
411 | { "f.49", 49, PPC_OPERAND_VSR }, | |
412 | { "f.5", 5, PPC_OPERAND_FPR }, | |
413 | { "f.50", 50, PPC_OPERAND_VSR }, | |
414 | { "f.51", 51, PPC_OPERAND_VSR }, | |
415 | { "f.52", 52, PPC_OPERAND_VSR }, | |
416 | { "f.53", 53, PPC_OPERAND_VSR }, | |
417 | { "f.54", 54, PPC_OPERAND_VSR }, | |
418 | { "f.55", 55, PPC_OPERAND_VSR }, | |
419 | { "f.56", 56, PPC_OPERAND_VSR }, | |
420 | { "f.57", 57, PPC_OPERAND_VSR }, | |
421 | { "f.58", 58, PPC_OPERAND_VSR }, | |
422 | { "f.59", 59, PPC_OPERAND_VSR }, | |
423 | { "f.6", 6, PPC_OPERAND_FPR }, | |
424 | { "f.60", 60, PPC_OPERAND_VSR }, | |
425 | { "f.61", 61, PPC_OPERAND_VSR }, | |
426 | { "f.62", 62, PPC_OPERAND_VSR }, | |
427 | { "f.63", 63, PPC_OPERAND_VSR }, | |
428 | { "f.7", 7, PPC_OPERAND_FPR }, | |
429 | { "f.8", 8, PPC_OPERAND_FPR }, | |
430 | { "f.9", 9, PPC_OPERAND_FPR }, | |
431 | ||
432 | { "f0", 0, PPC_OPERAND_FPR }, | |
433 | { "f1", 1, PPC_OPERAND_FPR }, | |
434 | { "f10", 10, PPC_OPERAND_FPR }, | |
435 | { "f11", 11, PPC_OPERAND_FPR }, | |
436 | { "f12", 12, PPC_OPERAND_FPR }, | |
437 | { "f13", 13, PPC_OPERAND_FPR }, | |
438 | { "f14", 14, PPC_OPERAND_FPR }, | |
439 | { "f15", 15, PPC_OPERAND_FPR }, | |
440 | { "f16", 16, PPC_OPERAND_FPR }, | |
441 | { "f17", 17, PPC_OPERAND_FPR }, | |
442 | { "f18", 18, PPC_OPERAND_FPR }, | |
443 | { "f19", 19, PPC_OPERAND_FPR }, | |
444 | { "f2", 2, PPC_OPERAND_FPR }, | |
445 | { "f20", 20, PPC_OPERAND_FPR }, | |
446 | { "f21", 21, PPC_OPERAND_FPR }, | |
447 | { "f22", 22, PPC_OPERAND_FPR }, | |
448 | { "f23", 23, PPC_OPERAND_FPR }, | |
449 | { "f24", 24, PPC_OPERAND_FPR }, | |
450 | { "f25", 25, PPC_OPERAND_FPR }, | |
451 | { "f26", 26, PPC_OPERAND_FPR }, | |
452 | { "f27", 27, PPC_OPERAND_FPR }, | |
453 | { "f28", 28, PPC_OPERAND_FPR }, | |
454 | { "f29", 29, PPC_OPERAND_FPR }, | |
455 | { "f3", 3, PPC_OPERAND_FPR }, | |
456 | { "f30", 30, PPC_OPERAND_FPR }, | |
457 | { "f31", 31, PPC_OPERAND_FPR }, | |
458 | { "f32", 32, PPC_OPERAND_VSR }, | |
459 | { "f33", 33, PPC_OPERAND_VSR }, | |
460 | { "f34", 34, PPC_OPERAND_VSR }, | |
461 | { "f35", 35, PPC_OPERAND_VSR }, | |
462 | { "f36", 36, PPC_OPERAND_VSR }, | |
463 | { "f37", 37, PPC_OPERAND_VSR }, | |
464 | { "f38", 38, PPC_OPERAND_VSR }, | |
465 | { "f39", 39, PPC_OPERAND_VSR }, | |
466 | { "f4", 4, PPC_OPERAND_FPR }, | |
467 | { "f40", 40, PPC_OPERAND_VSR }, | |
468 | { "f41", 41, PPC_OPERAND_VSR }, | |
469 | { "f42", 42, PPC_OPERAND_VSR }, | |
470 | { "f43", 43, PPC_OPERAND_VSR }, | |
471 | { "f44", 44, PPC_OPERAND_VSR }, | |
472 | { "f45", 45, PPC_OPERAND_VSR }, | |
473 | { "f46", 46, PPC_OPERAND_VSR }, | |
474 | { "f47", 47, PPC_OPERAND_VSR }, | |
475 | { "f48", 48, PPC_OPERAND_VSR }, | |
476 | { "f49", 49, PPC_OPERAND_VSR }, | |
477 | { "f5", 5, PPC_OPERAND_FPR }, | |
478 | { "f50", 50, PPC_OPERAND_VSR }, | |
479 | { "f51", 51, PPC_OPERAND_VSR }, | |
480 | { "f52", 52, PPC_OPERAND_VSR }, | |
481 | { "f53", 53, PPC_OPERAND_VSR }, | |
482 | { "f54", 54, PPC_OPERAND_VSR }, | |
483 | { "f55", 55, PPC_OPERAND_VSR }, | |
484 | { "f56", 56, PPC_OPERAND_VSR }, | |
485 | { "f57", 57, PPC_OPERAND_VSR }, | |
486 | { "f58", 58, PPC_OPERAND_VSR }, | |
487 | { "f59", 59, PPC_OPERAND_VSR }, | |
488 | { "f6", 6, PPC_OPERAND_FPR }, | |
489 | { "f60", 60, PPC_OPERAND_VSR }, | |
490 | { "f61", 61, PPC_OPERAND_VSR }, | |
491 | { "f62", 62, PPC_OPERAND_VSR }, | |
492 | { "f63", 63, PPC_OPERAND_VSR }, | |
493 | { "f7", 7, PPC_OPERAND_FPR }, | |
494 | { "f8", 8, PPC_OPERAND_FPR }, | |
495 | { "f9", 9, PPC_OPERAND_FPR }, | |
252b5132 | 496 | |
c3d65c1c | 497 | /* Quantization registers used with pair single instructions. */ |
7e0de605 AM |
498 | { "gqr.0", 0, PPC_OPERAND_GQR }, |
499 | { "gqr.1", 1, PPC_OPERAND_GQR }, | |
500 | { "gqr.2", 2, PPC_OPERAND_GQR }, | |
501 | { "gqr.3", 3, PPC_OPERAND_GQR }, | |
502 | { "gqr.4", 4, PPC_OPERAND_GQR }, | |
503 | { "gqr.5", 5, PPC_OPERAND_GQR }, | |
504 | { "gqr.6", 6, PPC_OPERAND_GQR }, | |
505 | { "gqr.7", 7, PPC_OPERAND_GQR }, | |
506 | { "gqr0", 0, PPC_OPERAND_GQR }, | |
507 | { "gqr1", 1, PPC_OPERAND_GQR }, | |
508 | { "gqr2", 2, PPC_OPERAND_GQR }, | |
509 | { "gqr3", 3, PPC_OPERAND_GQR }, | |
510 | { "gqr4", 4, PPC_OPERAND_GQR }, | |
511 | { "gqr5", 5, PPC_OPERAND_GQR }, | |
512 | { "gqr6", 6, PPC_OPERAND_GQR }, | |
513 | { "gqr7", 7, PPC_OPERAND_GQR }, | |
514 | ||
515 | { "lr", 8, PPC_OPERAND_SPR }, | |
516 | ||
517 | /* General Purpose Registers */ | |
518 | { "r.0", 0, PPC_OPERAND_GPR }, | |
519 | { "r.1", 1, PPC_OPERAND_GPR }, | |
520 | { "r.10", 10, PPC_OPERAND_GPR }, | |
521 | { "r.11", 11, PPC_OPERAND_GPR }, | |
522 | { "r.12", 12, PPC_OPERAND_GPR }, | |
523 | { "r.13", 13, PPC_OPERAND_GPR }, | |
524 | { "r.14", 14, PPC_OPERAND_GPR }, | |
525 | { "r.15", 15, PPC_OPERAND_GPR }, | |
526 | { "r.16", 16, PPC_OPERAND_GPR }, | |
527 | { "r.17", 17, PPC_OPERAND_GPR }, | |
528 | { "r.18", 18, PPC_OPERAND_GPR }, | |
529 | { "r.19", 19, PPC_OPERAND_GPR }, | |
530 | { "r.2", 2, PPC_OPERAND_GPR }, | |
531 | { "r.20", 20, PPC_OPERAND_GPR }, | |
532 | { "r.21", 21, PPC_OPERAND_GPR }, | |
533 | { "r.22", 22, PPC_OPERAND_GPR }, | |
534 | { "r.23", 23, PPC_OPERAND_GPR }, | |
535 | { "r.24", 24, PPC_OPERAND_GPR }, | |
536 | { "r.25", 25, PPC_OPERAND_GPR }, | |
537 | { "r.26", 26, PPC_OPERAND_GPR }, | |
538 | { "r.27", 27, PPC_OPERAND_GPR }, | |
539 | { "r.28", 28, PPC_OPERAND_GPR }, | |
540 | { "r.29", 29, PPC_OPERAND_GPR }, | |
541 | { "r.3", 3, PPC_OPERAND_GPR }, | |
542 | { "r.30", 30, PPC_OPERAND_GPR }, | |
543 | { "r.31", 31, PPC_OPERAND_GPR }, | |
544 | { "r.4", 4, PPC_OPERAND_GPR }, | |
545 | { "r.5", 5, PPC_OPERAND_GPR }, | |
546 | { "r.6", 6, PPC_OPERAND_GPR }, | |
547 | { "r.7", 7, PPC_OPERAND_GPR }, | |
548 | { "r.8", 8, PPC_OPERAND_GPR }, | |
549 | { "r.9", 9, PPC_OPERAND_GPR }, | |
550 | ||
551 | { "r.sp", 1, PPC_OPERAND_GPR }, | |
552 | ||
553 | { "r.toc", 2, PPC_OPERAND_GPR }, | |
554 | ||
555 | { "r0", 0, PPC_OPERAND_GPR }, | |
556 | { "r1", 1, PPC_OPERAND_GPR }, | |
557 | { "r10", 10, PPC_OPERAND_GPR }, | |
558 | { "r11", 11, PPC_OPERAND_GPR }, | |
559 | { "r12", 12, PPC_OPERAND_GPR }, | |
560 | { "r13", 13, PPC_OPERAND_GPR }, | |
561 | { "r14", 14, PPC_OPERAND_GPR }, | |
562 | { "r15", 15, PPC_OPERAND_GPR }, | |
563 | { "r16", 16, PPC_OPERAND_GPR }, | |
564 | { "r17", 17, PPC_OPERAND_GPR }, | |
565 | { "r18", 18, PPC_OPERAND_GPR }, | |
566 | { "r19", 19, PPC_OPERAND_GPR }, | |
567 | { "r2", 2, PPC_OPERAND_GPR }, | |
568 | { "r20", 20, PPC_OPERAND_GPR }, | |
569 | { "r21", 21, PPC_OPERAND_GPR }, | |
570 | { "r22", 22, PPC_OPERAND_GPR }, | |
571 | { "r23", 23, PPC_OPERAND_GPR }, | |
572 | { "r24", 24, PPC_OPERAND_GPR }, | |
573 | { "r25", 25, PPC_OPERAND_GPR }, | |
574 | { "r26", 26, PPC_OPERAND_GPR }, | |
575 | { "r27", 27, PPC_OPERAND_GPR }, | |
576 | { "r28", 28, PPC_OPERAND_GPR }, | |
577 | { "r29", 29, PPC_OPERAND_GPR }, | |
578 | { "r3", 3, PPC_OPERAND_GPR }, | |
579 | { "r30", 30, PPC_OPERAND_GPR }, | |
580 | { "r31", 31, PPC_OPERAND_GPR }, | |
581 | { "r4", 4, PPC_OPERAND_GPR }, | |
582 | { "r5", 5, PPC_OPERAND_GPR }, | |
583 | { "r6", 6, PPC_OPERAND_GPR }, | |
584 | { "r7", 7, PPC_OPERAND_GPR }, | |
585 | { "r8", 8, PPC_OPERAND_GPR }, | |
586 | { "r9", 9, PPC_OPERAND_GPR }, | |
587 | ||
588 | { "rtoc", 2, PPC_OPERAND_GPR }, | |
589 | ||
590 | { "sdr1", 25, PPC_OPERAND_SPR }, | |
591 | ||
592 | { "sp", 1, PPC_OPERAND_GPR }, | |
593 | ||
594 | { "srr0", 26, PPC_OPERAND_SPR }, | |
595 | { "srr1", 27, PPC_OPERAND_SPR }, | |
596 | ||
597 | /* Vector (Altivec/VMX) registers */ | |
598 | { "v.0", 0, PPC_OPERAND_VR }, | |
599 | { "v.1", 1, PPC_OPERAND_VR }, | |
600 | { "v.10", 10, PPC_OPERAND_VR }, | |
601 | { "v.11", 11, PPC_OPERAND_VR }, | |
602 | { "v.12", 12, PPC_OPERAND_VR }, | |
603 | { "v.13", 13, PPC_OPERAND_VR }, | |
604 | { "v.14", 14, PPC_OPERAND_VR }, | |
605 | { "v.15", 15, PPC_OPERAND_VR }, | |
606 | { "v.16", 16, PPC_OPERAND_VR }, | |
607 | { "v.17", 17, PPC_OPERAND_VR }, | |
608 | { "v.18", 18, PPC_OPERAND_VR }, | |
609 | { "v.19", 19, PPC_OPERAND_VR }, | |
610 | { "v.2", 2, PPC_OPERAND_VR }, | |
611 | { "v.20", 20, PPC_OPERAND_VR }, | |
612 | { "v.21", 21, PPC_OPERAND_VR }, | |
613 | { "v.22", 22, PPC_OPERAND_VR }, | |
614 | { "v.23", 23, PPC_OPERAND_VR }, | |
615 | { "v.24", 24, PPC_OPERAND_VR }, | |
616 | { "v.25", 25, PPC_OPERAND_VR }, | |
617 | { "v.26", 26, PPC_OPERAND_VR }, | |
618 | { "v.27", 27, PPC_OPERAND_VR }, | |
619 | { "v.28", 28, PPC_OPERAND_VR }, | |
620 | { "v.29", 29, PPC_OPERAND_VR }, | |
621 | { "v.3", 3, PPC_OPERAND_VR }, | |
622 | { "v.30", 30, PPC_OPERAND_VR }, | |
623 | { "v.31", 31, PPC_OPERAND_VR }, | |
624 | { "v.4", 4, PPC_OPERAND_VR }, | |
625 | { "v.5", 5, PPC_OPERAND_VR }, | |
626 | { "v.6", 6, PPC_OPERAND_VR }, | |
627 | { "v.7", 7, PPC_OPERAND_VR }, | |
628 | { "v.8", 8, PPC_OPERAND_VR }, | |
629 | { "v.9", 9, PPC_OPERAND_VR }, | |
630 | ||
631 | { "v0", 0, PPC_OPERAND_VR }, | |
632 | { "v1", 1, PPC_OPERAND_VR }, | |
633 | { "v10", 10, PPC_OPERAND_VR }, | |
634 | { "v11", 11, PPC_OPERAND_VR }, | |
635 | { "v12", 12, PPC_OPERAND_VR }, | |
636 | { "v13", 13, PPC_OPERAND_VR }, | |
637 | { "v14", 14, PPC_OPERAND_VR }, | |
638 | { "v15", 15, PPC_OPERAND_VR }, | |
639 | { "v16", 16, PPC_OPERAND_VR }, | |
640 | { "v17", 17, PPC_OPERAND_VR }, | |
641 | { "v18", 18, PPC_OPERAND_VR }, | |
642 | { "v19", 19, PPC_OPERAND_VR }, | |
643 | { "v2", 2, PPC_OPERAND_VR }, | |
644 | { "v20", 20, PPC_OPERAND_VR }, | |
645 | { "v21", 21, PPC_OPERAND_VR }, | |
646 | { "v22", 22, PPC_OPERAND_VR }, | |
647 | { "v23", 23, PPC_OPERAND_VR }, | |
648 | { "v24", 24, PPC_OPERAND_VR }, | |
649 | { "v25", 25, PPC_OPERAND_VR }, | |
650 | { "v26", 26, PPC_OPERAND_VR }, | |
651 | { "v27", 27, PPC_OPERAND_VR }, | |
652 | { "v28", 28, PPC_OPERAND_VR }, | |
653 | { "v29", 29, PPC_OPERAND_VR }, | |
654 | { "v3", 3, PPC_OPERAND_VR }, | |
655 | { "v30", 30, PPC_OPERAND_VR }, | |
656 | { "v31", 31, PPC_OPERAND_VR }, | |
657 | { "v4", 4, PPC_OPERAND_VR }, | |
658 | { "v5", 5, PPC_OPERAND_VR }, | |
659 | { "v6", 6, PPC_OPERAND_VR }, | |
660 | { "v7", 7, PPC_OPERAND_VR }, | |
661 | { "v8", 8, PPC_OPERAND_VR }, | |
662 | { "v9", 9, PPC_OPERAND_VR }, | |
663 | ||
664 | /* Vector Scalar (VSX) registers (ISA 2.06). */ | |
665 | { "vs.0", 0, PPC_OPERAND_VSR }, | |
666 | { "vs.1", 1, PPC_OPERAND_VSR }, | |
667 | { "vs.10", 10, PPC_OPERAND_VSR }, | |
668 | { "vs.11", 11, PPC_OPERAND_VSR }, | |
669 | { "vs.12", 12, PPC_OPERAND_VSR }, | |
670 | { "vs.13", 13, PPC_OPERAND_VSR }, | |
671 | { "vs.14", 14, PPC_OPERAND_VSR }, | |
672 | { "vs.15", 15, PPC_OPERAND_VSR }, | |
673 | { "vs.16", 16, PPC_OPERAND_VSR }, | |
674 | { "vs.17", 17, PPC_OPERAND_VSR }, | |
675 | { "vs.18", 18, PPC_OPERAND_VSR }, | |
676 | { "vs.19", 19, PPC_OPERAND_VSR }, | |
677 | { "vs.2", 2, PPC_OPERAND_VSR }, | |
678 | { "vs.20", 20, PPC_OPERAND_VSR }, | |
679 | { "vs.21", 21, PPC_OPERAND_VSR }, | |
680 | { "vs.22", 22, PPC_OPERAND_VSR }, | |
681 | { "vs.23", 23, PPC_OPERAND_VSR }, | |
682 | { "vs.24", 24, PPC_OPERAND_VSR }, | |
683 | { "vs.25", 25, PPC_OPERAND_VSR }, | |
684 | { "vs.26", 26, PPC_OPERAND_VSR }, | |
685 | { "vs.27", 27, PPC_OPERAND_VSR }, | |
686 | { "vs.28", 28, PPC_OPERAND_VSR }, | |
687 | { "vs.29", 29, PPC_OPERAND_VSR }, | |
688 | { "vs.3", 3, PPC_OPERAND_VSR }, | |
689 | { "vs.30", 30, PPC_OPERAND_VSR }, | |
690 | { "vs.31", 31, PPC_OPERAND_VSR }, | |
691 | { "vs.32", 32, PPC_OPERAND_VSR }, | |
692 | { "vs.33", 33, PPC_OPERAND_VSR }, | |
693 | { "vs.34", 34, PPC_OPERAND_VSR }, | |
694 | { "vs.35", 35, PPC_OPERAND_VSR }, | |
695 | { "vs.36", 36, PPC_OPERAND_VSR }, | |
696 | { "vs.37", 37, PPC_OPERAND_VSR }, | |
697 | { "vs.38", 38, PPC_OPERAND_VSR }, | |
698 | { "vs.39", 39, PPC_OPERAND_VSR }, | |
699 | { "vs.4", 4, PPC_OPERAND_VSR }, | |
700 | { "vs.40", 40, PPC_OPERAND_VSR }, | |
701 | { "vs.41", 41, PPC_OPERAND_VSR }, | |
702 | { "vs.42", 42, PPC_OPERAND_VSR }, | |
703 | { "vs.43", 43, PPC_OPERAND_VSR }, | |
704 | { "vs.44", 44, PPC_OPERAND_VSR }, | |
705 | { "vs.45", 45, PPC_OPERAND_VSR }, | |
706 | { "vs.46", 46, PPC_OPERAND_VSR }, | |
707 | { "vs.47", 47, PPC_OPERAND_VSR }, | |
708 | { "vs.48", 48, PPC_OPERAND_VSR }, | |
709 | { "vs.49", 49, PPC_OPERAND_VSR }, | |
710 | { "vs.5", 5, PPC_OPERAND_VSR }, | |
711 | { "vs.50", 50, PPC_OPERAND_VSR }, | |
712 | { "vs.51", 51, PPC_OPERAND_VSR }, | |
713 | { "vs.52", 52, PPC_OPERAND_VSR }, | |
714 | { "vs.53", 53, PPC_OPERAND_VSR }, | |
715 | { "vs.54", 54, PPC_OPERAND_VSR }, | |
716 | { "vs.55", 55, PPC_OPERAND_VSR }, | |
717 | { "vs.56", 56, PPC_OPERAND_VSR }, | |
718 | { "vs.57", 57, PPC_OPERAND_VSR }, | |
719 | { "vs.58", 58, PPC_OPERAND_VSR }, | |
720 | { "vs.59", 59, PPC_OPERAND_VSR }, | |
721 | { "vs.6", 6, PPC_OPERAND_VSR }, | |
722 | { "vs.60", 60, PPC_OPERAND_VSR }, | |
723 | { "vs.61", 61, PPC_OPERAND_VSR }, | |
724 | { "vs.62", 62, PPC_OPERAND_VSR }, | |
725 | { "vs.63", 63, PPC_OPERAND_VSR }, | |
726 | { "vs.7", 7, PPC_OPERAND_VSR }, | |
727 | { "vs.8", 8, PPC_OPERAND_VSR }, | |
728 | { "vs.9", 9, PPC_OPERAND_VSR }, | |
729 | ||
730 | { "vs0", 0, PPC_OPERAND_VSR }, | |
731 | { "vs1", 1, PPC_OPERAND_VSR }, | |
732 | { "vs10", 10, PPC_OPERAND_VSR }, | |
733 | { "vs11", 11, PPC_OPERAND_VSR }, | |
734 | { "vs12", 12, PPC_OPERAND_VSR }, | |
735 | { "vs13", 13, PPC_OPERAND_VSR }, | |
736 | { "vs14", 14, PPC_OPERAND_VSR }, | |
737 | { "vs15", 15, PPC_OPERAND_VSR }, | |
738 | { "vs16", 16, PPC_OPERAND_VSR }, | |
739 | { "vs17", 17, PPC_OPERAND_VSR }, | |
740 | { "vs18", 18, PPC_OPERAND_VSR }, | |
741 | { "vs19", 19, PPC_OPERAND_VSR }, | |
742 | { "vs2", 2, PPC_OPERAND_VSR }, | |
743 | { "vs20", 20, PPC_OPERAND_VSR }, | |
744 | { "vs21", 21, PPC_OPERAND_VSR }, | |
745 | { "vs22", 22, PPC_OPERAND_VSR }, | |
746 | { "vs23", 23, PPC_OPERAND_VSR }, | |
747 | { "vs24", 24, PPC_OPERAND_VSR }, | |
748 | { "vs25", 25, PPC_OPERAND_VSR }, | |
749 | { "vs26", 26, PPC_OPERAND_VSR }, | |
750 | { "vs27", 27, PPC_OPERAND_VSR }, | |
751 | { "vs28", 28, PPC_OPERAND_VSR }, | |
752 | { "vs29", 29, PPC_OPERAND_VSR }, | |
753 | { "vs3", 3, PPC_OPERAND_VSR }, | |
754 | { "vs30", 30, PPC_OPERAND_VSR }, | |
755 | { "vs31", 31, PPC_OPERAND_VSR }, | |
756 | { "vs32", 32, PPC_OPERAND_VSR }, | |
757 | { "vs33", 33, PPC_OPERAND_VSR }, | |
758 | { "vs34", 34, PPC_OPERAND_VSR }, | |
759 | { "vs35", 35, PPC_OPERAND_VSR }, | |
760 | { "vs36", 36, PPC_OPERAND_VSR }, | |
761 | { "vs37", 37, PPC_OPERAND_VSR }, | |
762 | { "vs38", 38, PPC_OPERAND_VSR }, | |
763 | { "vs39", 39, PPC_OPERAND_VSR }, | |
764 | { "vs4", 4, PPC_OPERAND_VSR }, | |
765 | { "vs40", 40, PPC_OPERAND_VSR }, | |
766 | { "vs41", 41, PPC_OPERAND_VSR }, | |
767 | { "vs42", 42, PPC_OPERAND_VSR }, | |
768 | { "vs43", 43, PPC_OPERAND_VSR }, | |
769 | { "vs44", 44, PPC_OPERAND_VSR }, | |
770 | { "vs45", 45, PPC_OPERAND_VSR }, | |
771 | { "vs46", 46, PPC_OPERAND_VSR }, | |
772 | { "vs47", 47, PPC_OPERAND_VSR }, | |
773 | { "vs48", 48, PPC_OPERAND_VSR }, | |
774 | { "vs49", 49, PPC_OPERAND_VSR }, | |
775 | { "vs5", 5, PPC_OPERAND_VSR }, | |
776 | { "vs50", 50, PPC_OPERAND_VSR }, | |
777 | { "vs51", 51, PPC_OPERAND_VSR }, | |
778 | { "vs52", 52, PPC_OPERAND_VSR }, | |
779 | { "vs53", 53, PPC_OPERAND_VSR }, | |
780 | { "vs54", 54, PPC_OPERAND_VSR }, | |
781 | { "vs55", 55, PPC_OPERAND_VSR }, | |
782 | { "vs56", 56, PPC_OPERAND_VSR }, | |
783 | { "vs57", 57, PPC_OPERAND_VSR }, | |
784 | { "vs58", 58, PPC_OPERAND_VSR }, | |
785 | { "vs59", 59, PPC_OPERAND_VSR }, | |
786 | { "vs6", 6, PPC_OPERAND_VSR }, | |
787 | { "vs60", 60, PPC_OPERAND_VSR }, | |
788 | { "vs61", 61, PPC_OPERAND_VSR }, | |
789 | { "vs62", 62, PPC_OPERAND_VSR }, | |
790 | { "vs63", 63, PPC_OPERAND_VSR }, | |
791 | { "vs7", 7, PPC_OPERAND_VSR }, | |
792 | { "vs8", 8, PPC_OPERAND_VSR }, | |
793 | { "vs9", 9, PPC_OPERAND_VSR }, | |
794 | ||
795 | { "xer", 1, PPC_OPERAND_SPR } | |
252b5132 RH |
796 | }; |
797 | ||
252b5132 RH |
798 | /* Given NAME, find the register number associated with that name, return |
799 | the integer value associated with the given name or -1 on failure. */ | |
800 | ||
7e0de605 | 801 | static const struct pd_reg * |
98027b10 | 802 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
803 | { |
804 | int middle, low, high; | |
805 | int cmp; | |
806 | ||
807 | low = 0; | |
808 | high = regcount - 1; | |
809 | ||
810 | do | |
811 | { | |
812 | middle = (low + high) / 2; | |
813 | cmp = strcasecmp (name, regs[middle].name); | |
814 | if (cmp < 0) | |
815 | high = middle - 1; | |
816 | else if (cmp > 0) | |
817 | low = middle + 1; | |
818 | else | |
7e0de605 | 819 | return ®s[middle]; |
252b5132 RH |
820 | } |
821 | while (low <= high); | |
822 | ||
7e0de605 | 823 | return NULL; |
252b5132 RH |
824 | } |
825 | ||
00b37cc4 | 826 | /* Called for a non-symbol, non-number operand. Handles %reg. */ |
252b5132 | 827 | |
00b37cc4 AM |
828 | void |
829 | md_operand (expressionS *expressionP) | |
252b5132 | 830 | { |
7e0de605 | 831 | const struct pd_reg *reg; |
252b5132 RH |
832 | char *name; |
833 | char *start; | |
834 | char c; | |
835 | ||
00b37cc4 AM |
836 | if (input_line_pointer[0] != '%' || !ISALPHA (input_line_pointer[1])) |
837 | return; | |
252b5132 | 838 | |
00b37cc4 AM |
839 | start = input_line_pointer; |
840 | ++input_line_pointer; | |
252b5132 | 841 | |
d02603dc | 842 | c = get_symbol_name (&name); |
00b37cc4 AM |
843 | reg = reg_name_search (pre_defined_registers, |
844 | ARRAY_SIZE (pre_defined_registers), name); | |
468cced8 AM |
845 | *input_line_pointer = c; |
846 | ||
7e0de605 | 847 | if (reg != NULL) |
252b5132 RH |
848 | { |
849 | expressionP->X_op = O_register; | |
7e0de605 AM |
850 | expressionP->X_add_number = reg->value; |
851 | expressionP->X_md = reg->flags; | |
252b5132 | 852 | } |
00b37cc4 AM |
853 | else |
854 | input_line_pointer = start; | |
252b5132 | 855 | } |
252b5132 RH |
856 | |
857 | /* Whether to do the special parsing. */ | |
5b7c81bd | 858 | static bool cr_operand; |
252b5132 | 859 | |
00b37cc4 AM |
860 | /* Extra names to recognise in a condition code. This table is sorted. */ |
861 | static const struct pd_reg cr_cond[] = | |
252b5132 | 862 | { |
7e0de605 AM |
863 | { "eq", 2, PPC_OPERAND_CR_BIT }, |
864 | { "gt", 1, PPC_OPERAND_CR_BIT }, | |
865 | { "lt", 0, PPC_OPERAND_CR_BIT }, | |
866 | { "so", 3, PPC_OPERAND_CR_BIT }, | |
867 | { "un", 3, PPC_OPERAND_CR_BIT } | |
252b5132 RH |
868 | }; |
869 | ||
00b37cc4 AM |
870 | /* This function is called for each symbol seen in an expression. It |
871 | handles the special parsing which PowerPC assemblers are supposed | |
872 | to use for condition codes, and recognises other registers when | |
873 | -mregnames. */ | |
252b5132 | 874 | |
5f6c9229 | 875 | void |
00b37cc4 | 876 | ppc_parse_name (const char *name, expressionS *exp, enum expr_mode mode) |
252b5132 | 877 | { |
00b37cc4 | 878 | const struct pd_reg *reg = NULL; |
252b5132 | 879 | |
00b37cc4 AM |
880 | if (cr_operand) |
881 | reg = reg_name_search (cr_cond, ARRAY_SIZE (cr_cond), name); | |
882 | if (reg == NULL && (cr_operand || reg_names_p)) | |
883 | reg = reg_name_search (pre_defined_registers, | |
884 | ARRAY_SIZE (pre_defined_registers), name); | |
885 | if (reg != NULL) | |
886 | { | |
887 | exp->X_op = O_register; | |
888 | exp->X_add_number = reg->value; | |
889 | exp->X_md = reg->flags; | |
5f6c9229 | 890 | return; |
00b37cc4 | 891 | } |
252b5132 | 892 | |
00b37cc4 AM |
893 | /* The following replaces code in expr.c operand() after the |
894 | md_parse_name call. There is too much difference between targets | |
895 | in the way X_md is used to move this code into expr.c. If you | |
896 | do, you'll get failures on x86 due to uninitialised X_md fields, | |
897 | failures on alpha and other targets due to creating register | |
898 | symbols as O_constant rather than O_register, and failures on arc | |
899 | and others due to expecting expr() to leave X_md alone. */ | |
900 | symbolS *sym = symbol_find_or_make (name); | |
901 | ||
902 | /* If we have an absolute symbol or a reg, then we know its value | |
903 | now. Copy the symbol value expression to propagate X_md. */ | |
904 | bool done = false; | |
905 | if (mode != expr_defer | |
906 | && !S_FORCE_RELOC (sym, 0)) | |
907 | { | |
908 | segT segment = S_GET_SEGMENT (sym); | |
909 | if (segment == absolute_section || segment == reg_section) | |
910 | { | |
911 | resolve_symbol_value (sym); | |
912 | *exp = *symbol_get_value_expression (sym); | |
913 | done = true; | |
914 | } | |
915 | } | |
916 | if (!done) | |
917 | { | |
918 | exp->X_op = O_symbol; | |
919 | exp->X_add_symbol = sym; | |
920 | exp->X_add_number = 0; | |
921 | } | |
252b5132 | 922 | } |
7e0de605 AM |
923 | |
924 | /* Propagate X_md and check register expressions. This is to support | |
925 | condition codes like 4*cr5+eq. */ | |
926 | ||
927 | int | |
928 | ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right) | |
929 | { | |
930 | /* Accept 4*cr<n> and cr<n>*4. */ | |
931 | if (op == O_multiply | |
932 | && ((right->X_op == O_register | |
933 | && right->X_md == PPC_OPERAND_CR_REG | |
934 | && left->X_op == O_constant | |
935 | && left->X_add_number == 4) | |
936 | || (left->X_op == O_register | |
937 | && left->X_md == PPC_OPERAND_CR_REG | |
938 | && right->X_op == O_constant | |
939 | && right->X_add_number == 4))) | |
940 | { | |
941 | left->X_op = O_register; | |
942 | left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT; | |
943 | left->X_add_number *= right->X_add_number; | |
944 | return 1; | |
945 | } | |
946 | ||
947 | /* Accept the above plus <cr bit>, and <cr bit> plus the above. */ | |
948 | if (right->X_op == O_register | |
949 | && left->X_op == O_register | |
950 | && op == O_add | |
951 | && ((right->X_md == PPC_OPERAND_CR_BIT | |
952 | && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)) | |
953 | || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT) | |
954 | && left->X_md == PPC_OPERAND_CR_BIT))) | |
955 | { | |
956 | left->X_md = PPC_OPERAND_CR_BIT; | |
957 | right->X_op = O_constant; | |
958 | return 0; | |
959 | } | |
960 | ||
961 | /* Accept reg +/- constant. */ | |
962 | if (left->X_op == O_register | |
963 | && !((op == O_add || op == O_subtract) && right->X_op == O_constant)) | |
ece5dcc1 | 964 | as_warn (_("invalid register expression")); |
7e0de605 AM |
965 | |
966 | /* Accept constant + reg. */ | |
967 | if (right->X_op == O_register) | |
968 | { | |
969 | if (op == O_add && left->X_op == O_constant) | |
970 | left->X_md = right->X_md; | |
971 | else | |
ece5dcc1 | 972 | as_warn (_("invalid register expression")); |
7e0de605 AM |
973 | } |
974 | ||
975 | return 0; | |
976 | } | |
252b5132 RH |
977 | \f |
978 | /* Local variables. */ | |
979 | ||
2b3c4602 AM |
980 | /* Whether to target xcoff64/elf64. */ |
981 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 982 | |
a887be69 AM |
983 | /* A separate obstack for use by ppc_hash, so that we can quickly |
984 | throw away hash table memory . */ | |
985 | struct obstack insn_obstack; | |
986 | ||
252b5132 | 987 | /* Opcode hash table. */ |
629310ab | 988 | static htab_t ppc_hash; |
252b5132 | 989 | |
252b5132 | 990 | #ifdef OBJ_ELF |
99a814a1 | 991 | /* What type of shared library support to use. */ |
5d6f4f16 | 992 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 993 | |
99a814a1 | 994 | /* Flags to set in the elf header. */ |
252b5132 RH |
995 | static flagword ppc_flags = 0; |
996 | ||
997 | /* Whether this is Solaris or not. */ | |
998 | #ifdef TARGET_SOLARIS_COMMENT | |
5b7c81bd | 999 | #define SOLARIS_P true |
252b5132 | 1000 | #else |
5b7c81bd | 1001 | #define SOLARIS_P false |
252b5132 RH |
1002 | #endif |
1003 | ||
5b7c81bd | 1004 | static bool msolaris = SOLARIS_P; |
252b5132 RH |
1005 | #endif |
1006 | ||
1007 | #ifdef OBJ_XCOFF | |
1008 | ||
1009 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
1010 | using a bunch of different sections. These assembler sections, | |
1b2cb8e2 CC |
1011 | however, are all encompassed within the .text, .data or .bss sections |
1012 | of the final output file. We handle this by using different | |
1013 | subsegments within these main segments. | |
1014 | .tdata and .tbss sections only have one type of csects for now, | |
1015 | but it's better to follow the same construction like the others. */ | |
1016 | ||
1017 | struct ppc_xcoff_section ppc_xcoff_text_section; | |
1018 | struct ppc_xcoff_section ppc_xcoff_data_section; | |
1019 | struct ppc_xcoff_section ppc_xcoff_bss_section; | |
1020 | struct ppc_xcoff_section ppc_xcoff_tdata_section; | |
1021 | struct ppc_xcoff_section ppc_xcoff_tbss_section; | |
1022 | ||
1023 | /* Return true if the ppc_xcoff_section structure is already | |
1024 | initialized. */ | |
5b7c81bd | 1025 | static bool |
1b2cb8e2 CC |
1026 | ppc_xcoff_section_is_initialized (struct ppc_xcoff_section *section) |
1027 | { | |
1028 | return section->segment != NULL; | |
1029 | } | |
252b5132 | 1030 | |
1b2cb8e2 CC |
1031 | /* Initialize a ppc_xcoff_section. |
1032 | Dummy symbols are used to ensure the position of .text over .data | |
934cb849 CC |
1033 | and .tdata. Moreover, they allow all algorithms here to be sure that |
1034 | csects isn't NULL. These symbols won't be output. */ | |
1b2cb8e2 | 1035 | static void |
934cb849 | 1036 | ppc_init_xcoff_section (struct ppc_xcoff_section *s, segT seg) |
1b2cb8e2 CC |
1037 | { |
1038 | s->segment = seg; | |
1039 | s->next_subsegment = 2; | |
934cb849 CC |
1040 | s->csects = symbol_make ("dummy\001"); |
1041 | symbol_get_tc (s->csects)->within = s->csects; | |
1b2cb8e2 | 1042 | } |
252b5132 RH |
1043 | |
1044 | /* The current csect. */ | |
1045 | static symbolS *ppc_current_csect; | |
1046 | ||
1047 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
1048 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
1049 | A special relocation is used when accessing TOC entries. We handle | |
1050 | the TOC as a subsegment within the .data segment. We set it up if | |
1051 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
1052 | static symbolS *ppc_toc_csect; | |
1053 | ||
1054 | /* The first frag in the TOC subsegment. */ | |
1055 | static fragS *ppc_toc_frag; | |
1056 | ||
1057 | /* The first frag in the first subsegment after the TOC in the .data | |
1058 | segment. NULL if there are no subsegments after the TOC. */ | |
1059 | static fragS *ppc_after_toc_frag; | |
1060 | ||
1061 | /* The current static block. */ | |
1062 | static symbolS *ppc_current_block; | |
1063 | ||
1064 | /* The COFF debugging section; set by md_begin. This is not the | |
1065 | .debug section, but is instead the secret BFD section which will | |
1066 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
1067 | static asection *ppc_coff_debug_section; | |
1068 | ||
85645aed TG |
1069 | /* Structure to set the length field of the dwarf sections. */ |
1070 | struct dw_subsection { | |
1071 | /* Subsections are simply linked. */ | |
1072 | struct dw_subsection *link; | |
1073 | ||
1074 | /* The subsection number. */ | |
1075 | subsegT subseg; | |
1076 | ||
1077 | /* Expression to compute the length of the section. */ | |
1078 | expressionS end_exp; | |
1079 | }; | |
1080 | ||
1081 | static struct dw_section { | |
1082 | /* Corresponding section. */ | |
1083 | segT sect; | |
1084 | ||
1085 | /* Simply linked list of subsections with a label. */ | |
1086 | struct dw_subsection *list_subseg; | |
1087 | ||
1088 | /* The anonymous subsection. */ | |
1089 | struct dw_subsection *anon_subseg; | |
1090 | } dw_sections[XCOFF_DWSECT_NBR_NAMES]; | |
252b5132 RH |
1091 | #endif /* OBJ_XCOFF */ |
1092 | ||
252b5132 RH |
1093 | #ifdef OBJ_ELF |
1094 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
1095 | unsigned long *ppc_apuinfo_list; |
1096 | unsigned int ppc_apuinfo_num; | |
1097 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1098 | #endif /* OBJ_ELF */ |
1099 | \f | |
1100 | #ifdef OBJ_ELF | |
15c1449b | 1101 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1102 | #else |
15c1449b | 1103 | const char *const md_shortopts = "um:"; |
252b5132 | 1104 | #endif |
cef4f754 | 1105 | #define OPTION_NOPS (OPTION_MD_BASE + 0) |
15c1449b | 1106 | const struct option md_longopts[] = { |
cef4f754 | 1107 | {"nops", required_argument, NULL, OPTION_NOPS}, |
bf7279d5 AM |
1108 | {"ppc476-workaround", no_argument, &warn_476, 1}, |
1109 | {"no-ppc476-workaround", no_argument, &warn_476, 0}, | |
252b5132 RH |
1110 | {NULL, no_argument, NULL, 0} |
1111 | }; | |
15c1449b | 1112 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
1113 | |
1114 | int | |
17b9d67d | 1115 | md_parse_option (int c, const char *arg) |
252b5132 | 1116 | { |
69fe9ce5 AM |
1117 | ppc_cpu_t new_cpu; |
1118 | ||
252b5132 RH |
1119 | switch (c) |
1120 | { | |
1121 | case 'u': | |
1122 | /* -u means that any undefined symbols should be treated as | |
1123 | external, which is the default for gas anyhow. */ | |
1124 | break; | |
1125 | ||
1126 | #ifdef OBJ_ELF | |
1127 | case 'l': | |
1128 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1129 | sake, recognize -be also. */ |
252b5132 RH |
1130 | if (strcmp (arg, "e") == 0) |
1131 | { | |
1132 | target_big_endian = 0; | |
1133 | set_target_endian = 1; | |
b9c361e0 | 1134 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1135 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1136 | } |
1137 | else | |
1138 | return 0; | |
1139 | ||
1140 | break; | |
1141 | ||
1142 | case 'b': | |
1143 | if (strcmp (arg, "e") == 0) | |
1144 | { | |
1145 | target_big_endian = 1; | |
1146 | set_target_endian = 1; | |
1147 | } | |
1148 | else | |
1149 | return 0; | |
1150 | ||
1151 | break; | |
1152 | ||
1153 | case 'K': | |
99a814a1 | 1154 | /* Recognize -K PIC. */ |
252b5132 RH |
1155 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1156 | { | |
1157 | shlib = SHLIB_PIC; | |
1158 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1159 | } | |
1160 | else | |
1161 | return 0; | |
1162 | ||
1163 | break; | |
1164 | #endif | |
1165 | ||
7f6d05e8 CP |
1166 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1167 | case 'a': | |
1168 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1169 | { |
1170 | #ifdef BFD64 | |
1171 | ppc_obj64 = 1; | |
d6ed37ed AM |
1172 | if (ppc_cpu & PPC_OPCODE_VLE) |
1173 | as_bad (_("the use of -mvle requires -a32.")); | |
2a98c3a6 AM |
1174 | #else |
1175 | as_fatal (_("%s unsupported"), "-a64"); | |
1176 | #endif | |
1177 | } | |
7f6d05e8 | 1178 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1179 | ppc_obj64 = 0; |
7f6d05e8 CP |
1180 | else |
1181 | return 0; | |
1182 | break; | |
81d4177b | 1183 | |
252b5132 | 1184 | case 'm': |
776fc418 | 1185 | new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); |
52be03fd AM |
1186 | /* "raw" is only valid for the disassembler. */ |
1187 | if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0) | |
b9c361e0 JL |
1188 | { |
1189 | ppc_cpu = new_cpu; | |
d6ed37ed AM |
1190 | if (strcmp (arg, "vle") == 0) |
1191 | { | |
1192 | if (set_target_endian && target_big_endian == 0) | |
1193 | as_bad (_("the use of -mvle requires big endian.")); | |
1194 | if (ppc_obj64) | |
1195 | as_bad (_("the use of -mvle requires -a32.")); | |
1196 | } | |
b9c361e0 | 1197 | } |
252b5132 | 1198 | |
83eef883 AFB |
1199 | else if (strcmp (arg, "no-vle") == 0) |
1200 | { | |
1201 | sticky &= ~PPC_OPCODE_VLE; | |
1202 | ||
1203 | new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke"); | |
1204 | new_cpu &= ~PPC_OPCODE_VLE; | |
1205 | ||
1206 | ppc_cpu = new_cpu; | |
1207 | } | |
1208 | ||
252b5132 | 1209 | else if (strcmp (arg, "regnames") == 0) |
5b7c81bd | 1210 | reg_names_p = true; |
252b5132 RH |
1211 | |
1212 | else if (strcmp (arg, "no-regnames") == 0) | |
5b7c81bd | 1213 | reg_names_p = false; |
252b5132 RH |
1214 | |
1215 | #ifdef OBJ_ELF | |
99a814a1 AM |
1216 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1217 | that require relocation. */ | |
252b5132 RH |
1218 | else if (strcmp (arg, "relocatable") == 0) |
1219 | { | |
5d6f4f16 | 1220 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1221 | ppc_flags |= EF_PPC_RELOCATABLE; |
1222 | } | |
1223 | ||
1224 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1225 | { | |
5d6f4f16 | 1226 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1227 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1228 | } | |
1229 | ||
99a814a1 | 1230 | /* -memb, set embedded bit. */ |
252b5132 RH |
1231 | else if (strcmp (arg, "emb") == 0) |
1232 | ppc_flags |= EF_PPC_EMB; | |
1233 | ||
cc643b88 | 1234 | /* -mlittle/-mbig set the endianness. */ |
99a814a1 AM |
1235 | else if (strcmp (arg, "little") == 0 |
1236 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1237 | { |
1238 | target_big_endian = 0; | |
1239 | set_target_endian = 1; | |
b9c361e0 | 1240 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1241 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1242 | } |
1243 | ||
1244 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1245 | { | |
1246 | target_big_endian = 1; | |
1247 | set_target_endian = 1; | |
1248 | } | |
1249 | ||
1250 | else if (strcmp (arg, "solaris") == 0) | |
1251 | { | |
5b7c81bd | 1252 | msolaris = true; |
252b5132 RH |
1253 | ppc_comment_chars = ppc_solaris_comment_chars; |
1254 | } | |
1255 | ||
1256 | else if (strcmp (arg, "no-solaris") == 0) | |
1257 | { | |
5b7c81bd | 1258 | msolaris = false; |
252b5132 RH |
1259 | ppc_comment_chars = ppc_eabi_comment_chars; |
1260 | } | |
74081948 AF |
1261 | else if (strcmp (arg, "spe2") == 0) |
1262 | { | |
1263 | ppc_cpu |= PPC_OPCODE_SPE2; | |
1264 | } | |
252b5132 RH |
1265 | #endif |
1266 | else | |
1267 | { | |
1268 | as_bad (_("invalid switch -m%s"), arg); | |
1269 | return 0; | |
1270 | } | |
1271 | break; | |
1272 | ||
1273 | #ifdef OBJ_ELF | |
1274 | /* -V: SVR4 argument to print version ID. */ | |
1275 | case 'V': | |
1276 | print_version_id (); | |
1277 | break; | |
1278 | ||
1279 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1280 | should be emitted or not. FIXME: Not implemented. */ | |
1281 | case 'Q': | |
1282 | break; | |
1283 | ||
1284 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1285 | rather than .stabs.excl, which is ignored by the linker. | |
1286 | FIXME: Not implemented. */ | |
1287 | case 's': | |
1288 | if (arg) | |
1289 | return 0; | |
1290 | ||
1291 | break; | |
1292 | #endif | |
1293 | ||
cef4f754 AM |
1294 | case OPTION_NOPS: |
1295 | { | |
1296 | char *end; | |
1297 | nop_limit = strtoul (optarg, &end, 0); | |
1298 | if (*end) | |
1299 | as_bad (_("--nops needs a numeric argument")); | |
1300 | } | |
1301 | break; | |
85645aed | 1302 | |
bf7279d5 AM |
1303 | case 0: |
1304 | break; | |
1305 | ||
252b5132 RH |
1306 | default: |
1307 | return 0; | |
1308 | } | |
1309 | ||
1310 | return 1; | |
1311 | } | |
1312 | ||
5f63875b AM |
1313 | static int |
1314 | is_ppc64_target (const bfd_target *targ, void *data ATTRIBUTE_UNUSED) | |
1315 | { | |
1316 | switch (targ->flavour) | |
1317 | { | |
1318 | #ifdef OBJ_ELF | |
1319 | case bfd_target_elf_flavour: | |
d34049e8 | 1320 | return startswith (targ->name, "elf64-powerpc"); |
5f63875b AM |
1321 | #endif |
1322 | #ifdef OBJ_XCOFF | |
1323 | case bfd_target_xcoff_flavour: | |
1324 | return (strcmp (targ->name, "aixcoff64-rs6000") == 0 | |
1325 | || strcmp (targ->name, "aix5coff64-rs6000") == 0); | |
1326 | #endif | |
1327 | default: | |
1328 | return 0; | |
1329 | } | |
1330 | } | |
1331 | ||
252b5132 | 1332 | void |
98027b10 | 1333 | md_show_usage (FILE *stream) |
252b5132 | 1334 | { |
bc805888 | 1335 | fprintf (stream, _("\ |
5f63875b AM |
1336 | PowerPC options:\n")); |
1337 | fprintf (stream, _("\ | |
1338 | -a32 generate ELF32/XCOFF32\n")); | |
1339 | if (bfd_iterate_over_targets (is_ppc64_target, NULL)) | |
1340 | fprintf (stream, _("\ | |
1341 | -a64 generate ELF64/XCOFF64\n")); | |
1342 | fprintf (stream, _("\ | |
1343 | -u ignored\n")); | |
1344 | fprintf (stream, _("\ | |
1345 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n")); | |
1346 | fprintf (stream, _("\ | |
1347 | -mpwr generate code for POWER (RIOS1)\n")); | |
1348 | fprintf (stream, _("\ | |
1349 | -m601 generate code for PowerPC 601\n")); | |
1350 | fprintf (stream, _("\ | |
418c1742 | 1351 | -mppc, -mppc32, -m603, -m604\n\ |
5f63875b AM |
1352 | generate code for PowerPC 603/604\n")); |
1353 | fprintf (stream, _("\ | |
1354 | -m403 generate code for PowerPC 403\n")); | |
1355 | fprintf (stream, _("\ | |
1356 | -m405 generate code for PowerPC 405\n")); | |
1357 | fprintf (stream, _("\ | |
1358 | -m440 generate code for PowerPC 440\n")); | |
1359 | fprintf (stream, _("\ | |
1360 | -m464 generate code for PowerPC 464\n")); | |
1361 | fprintf (stream, _("\ | |
1362 | -m476 generate code for PowerPC 476\n")); | |
1363 | fprintf (stream, _("\ | |
f5c120c5 | 1364 | -m7400, -m7410, -m7450, -m7455\n\ |
5f63875b AM |
1365 | generate code for PowerPC 7400/7410/7450/7455\n")); |
1366 | fprintf (stream, _("\ | |
fa758a70 | 1367 | -m750cl, -mgekko, -mbroadway\n\ |
5f63875b AM |
1368 | generate code for PowerPC 750cl/Gekko/Broadway\n")); |
1369 | fprintf (stream, _("\ | |
ef5a96d5 | 1370 | -m821, -m850, -m860 generate code for PowerPC 821/850/860\n")); |
df12615d | 1371 | fprintf (stream, _("\ |
5f63875b AM |
1372 | -mppc64, -m620 generate code for PowerPC 620/625/630\n")); |
1373 | fprintf (stream, _("\ | |
1374 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n")); | |
1375 | fprintf (stream, _("\ | |
1376 | -mbooke generate code for 32-bit PowerPC BookE\n")); | |
1377 | fprintf (stream, _("\ | |
1378 | -ma2 generate code for A2 architecture\n")); | |
1379 | fprintf (stream, _("\ | |
1380 | -mpower4, -mpwr4 generate code for Power4 architecture\n")); | |
1381 | fprintf (stream, _("\ | |
cdc51b07 | 1382 | -mpower5, -mpwr5, -mpwr5x\n\ |
5f63875b AM |
1383 | generate code for Power5 architecture\n")); |
1384 | fprintf (stream, _("\ | |
1385 | -mpower6, -mpwr6 generate code for Power6 architecture\n")); | |
1386 | fprintf (stream, _("\ | |
1387 | -mpower7, -mpwr7 generate code for Power7 architecture\n")); | |
1388 | fprintf (stream, _("\ | |
1389 | -mpower8, -mpwr8 generate code for Power8 architecture\n")); | |
1390 | fprintf (stream, _("\ | |
1391 | -mpower9, -mpwr9 generate code for Power9 architecture\n")); | |
1392 | fprintf (stream, _("\ | |
1424c35d AM |
1393 | -mpower10, -mpwr10 generate code for Power10 architecture\n")); |
1394 | fprintf (stream, _("\ | |
33ae8a3a DS |
1395 | -mlibresoc generate code for Libre-SOC architecture\n")); |
1396 | fprintf (stream, _("\ | |
29a6701e PB |
1397 | -mfuture generate code for 'future' architecture\n")); |
1398 | fprintf (stream, _("\ | |
5f63875b AM |
1399 | -mcell generate code for Cell Broadband Engine architecture\n")); |
1400 | fprintf (stream, _("\ | |
1401 | -mcom generate code for Power/PowerPC common instructions\n")); | |
1402 | fprintf (stream, _("\ | |
ce3d2015 | 1403 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); |
6a0c61b7 | 1404 | fprintf (stream, _("\ |
5f63875b AM |
1405 | -maltivec generate code for AltiVec\n")); |
1406 | fprintf (stream, _("\ | |
1407 | -mvsx generate code for Vector-Scalar (VSX) instructions\n")); | |
1408 | fprintf (stream, _("\ | |
1409 | -me300 generate code for PowerPC e300 family\n")); | |
1410 | fprintf (stream, _("\ | |
1411 | -me500, -me500x2 generate code for Motorola e500 core complex\n")); | |
1412 | fprintf (stream, _("\ | |
1413 | -me500mc, generate code for Freescale e500mc core complex\n")); | |
1414 | fprintf (stream, _("\ | |
1415 | -me500mc64, generate code for Freescale e500mc64 core complex\n")); | |
1416 | fprintf (stream, _("\ | |
1417 | -me5500, generate code for Freescale e5500 core complex\n")); | |
1418 | fprintf (stream, _("\ | |
1419 | -me6500, generate code for Freescale e6500 core complex\n")); | |
1420 | fprintf (stream, _("\ | |
1421 | -mspe generate code for Motorola SPE instructions\n")); | |
1422 | fprintf (stream, _("\ | |
1423 | -mspe2 generate code for Freescale SPE2 instructions\n")); | |
1424 | fprintf (stream, _("\ | |
1425 | -mvle generate code for Freescale VLE instructions\n")); | |
1426 | fprintf (stream, _("\ | |
1427 | -mtitan generate code for AppliedMicro Titan core complex\n")); | |
1428 | fprintf (stream, _("\ | |
1429 | -mregnames Allow symbolic names for registers\n")); | |
1430 | fprintf (stream, _("\ | |
ce3d2015 | 1431 | -mno-regnames Do not allow symbolic names for registers\n")); |
252b5132 | 1432 | #ifdef OBJ_ELF |
bc805888 | 1433 | fprintf (stream, _("\ |
5f63875b AM |
1434 | -mrelocatable support for GCC's -mrelocatble option\n")); |
1435 | fprintf (stream, _("\ | |
1436 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n")); | |
1437 | fprintf (stream, _("\ | |
1438 | -memb set PPC_EMB bit in ELF flags\n")); | |
1439 | fprintf (stream, _("\ | |
b8b738ac | 1440 | -mlittle, -mlittle-endian, -le\n\ |
5f63875b AM |
1441 | generate code for a little endian machine\n")); |
1442 | fprintf (stream, _("\ | |
b8b738ac | 1443 | -mbig, -mbig-endian, -be\n\ |
5f63875b AM |
1444 | generate code for a big endian machine\n")); |
1445 | fprintf (stream, _("\ | |
1446 | -msolaris generate code for Solaris\n")); | |
1447 | fprintf (stream, _("\ | |
1448 | -mno-solaris do not generate code for Solaris\n")); | |
1449 | fprintf (stream, _("\ | |
1450 | -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n")); | |
1451 | fprintf (stream, _("\ | |
1452 | -V print assembler version number\n")); | |
1453 | fprintf (stream, _("\ | |
ce3d2015 | 1454 | -Qy, -Qn ignored\n")); |
252b5132 | 1455 | #endif |
cef4f754 | 1456 | fprintf (stream, _("\ |
5f63875b AM |
1457 | -nops=count when aligning, more than COUNT nops uses a branch\n")); |
1458 | fprintf (stream, _("\ | |
bf7279d5 | 1459 | -ppc476-workaround warn if emitting data to code sections\n")); |
252b5132 RH |
1460 | } |
1461 | \f | |
1462 | /* Set ppc_cpu if it is not already set. */ | |
1463 | ||
1464 | static void | |
98027b10 | 1465 | ppc_set_cpu (void) |
252b5132 RH |
1466 | { |
1467 | const char *default_os = TARGET_OS; | |
1468 | const char *default_cpu = TARGET_CPU; | |
1469 | ||
7102e95e | 1470 | if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) |
252b5132 | 1471 | { |
2a98c3a6 | 1472 | if (ppc_obj64) |
f2ab4b42 PB |
1473 | if (target_big_endian) |
1474 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; | |
1475 | else | |
1476 | /* The minimum supported cpu for 64-bit little-endian is power8. */ | |
1477 | ppc_cpu |= ppc_parse_cpu (ppc_cpu, &sticky, "power8"); | |
d34049e8 | 1478 | else if (startswith (default_os, "aix") |
2a98c3a6 | 1479 | && default_os[3] >= '4' && default_os[3] <= '9') |
bdc70b4a | 1480 | ppc_cpu |= PPC_OPCODE_COMMON; |
d34049e8 | 1481 | else if (startswith (default_os, "aix3")) |
bdc70b4a | 1482 | ppc_cpu |= PPC_OPCODE_POWER; |
252b5132 | 1483 | else if (strcmp (default_cpu, "rs6000") == 0) |
bdc70b4a | 1484 | ppc_cpu |= PPC_OPCODE_POWER; |
d34049e8 | 1485 | else if (startswith (default_cpu, "powerpc")) |
bdc70b4a | 1486 | ppc_cpu |= PPC_OPCODE_PPC; |
252b5132 | 1487 | else |
d6ed37ed | 1488 | as_fatal (_("unknown default cpu = %s, os = %s"), |
99a814a1 | 1489 | default_cpu, default_os); |
252b5132 RH |
1490 | } |
1491 | } | |
1492 | ||
9232bbb0 AM |
1493 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1494 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1495 | |
1496 | enum bfd_architecture | |
98027b10 | 1497 | ppc_arch (void) |
252b5132 | 1498 | { |
252b5132 RH |
1499 | ppc_set_cpu (); |
1500 | ||
4d826e13 AM |
1501 | #ifdef OBJ_ELF |
1502 | return bfd_arch_powerpc; | |
1503 | #else | |
252b5132 RH |
1504 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) |
1505 | return bfd_arch_powerpc; | |
b9c361e0 JL |
1506 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1507 | return bfd_arch_powerpc; | |
1508 | if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
252b5132 | 1509 | return bfd_arch_rs6000; |
b9c361e0 | 1510 | if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) |
252b5132 | 1511 | { |
4d826e13 AM |
1512 | const char *default_cpu = TARGET_CPU; |
1513 | if (startswith (default_cpu, "powerpc")) | |
252b5132 RH |
1514 | return bfd_arch_powerpc; |
1515 | } | |
4d826e13 AM |
1516 | return bfd_arch_rs6000; |
1517 | #endif | |
252b5132 RH |
1518 | } |
1519 | ||
7f6d05e8 | 1520 | unsigned long |
98027b10 | 1521 | ppc_mach (void) |
7f6d05e8 | 1522 | { |
2a98c3a6 AM |
1523 | if (ppc_obj64) |
1524 | return bfd_mach_ppc64; | |
1525 | else if (ppc_arch () == bfd_arch_rs6000) | |
1526 | return bfd_mach_rs6k; | |
ce3d2015 AM |
1527 | else if (ppc_cpu & PPC_OPCODE_TITAN) |
1528 | return bfd_mach_ppc_titan; | |
b9c361e0 JL |
1529 | else if (ppc_cpu & PPC_OPCODE_VLE) |
1530 | return bfd_mach_ppc_vle; | |
2a98c3a6 AM |
1531 | else |
1532 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1533 | } |
1534 | ||
e0471c16 | 1535 | extern const char* |
98027b10 | 1536 | ppc_target_format (void) |
7f6d05e8 CP |
1537 | { |
1538 | #ifdef OBJ_COFF | |
fe49679d | 1539 | #if TE_POWERMAC |
0baf16f2 | 1540 | return "xcoff-powermac"; |
7f6d05e8 | 1541 | #else |
eb1e0e80 | 1542 | # ifdef TE_AIX5 |
edc1d652 | 1543 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1544 | # else |
edc1d652 | 1545 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1546 | # endif |
7f6d05e8 | 1547 | #endif |
7f6d05e8 CP |
1548 | #endif |
1549 | #ifdef OBJ_ELF | |
edc1d652 AM |
1550 | # ifdef TE_FreeBSD |
1551 | return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); | |
1552 | # elif defined (TE_VXWORKS) | |
9d8504b1 PB |
1553 | return "elf32-powerpc-vxworks"; |
1554 | # else | |
0baf16f2 | 1555 | return (target_big_endian |
2b3c4602 AM |
1556 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1557 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1558 | # endif |
7f6d05e8 CP |
1559 | #endif |
1560 | } | |
1561 | ||
b9c361e0 JL |
1562 | /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. |
1563 | Return TRUE if there's a problem, otherwise FALSE. */ | |
1564 | ||
5b7c81bd | 1565 | static bool |
b9c361e0 JL |
1566 | insn_validate (const struct powerpc_opcode *op) |
1567 | { | |
8e5eb8e1 | 1568 | const ppc_opindex_t *o; |
0f873fd5 | 1569 | uint64_t omask = op->mask; |
b9c361e0 JL |
1570 | |
1571 | /* The mask had better not trim off opcode bits. */ | |
1572 | if ((op->opcode & omask) != op->opcode) | |
1573 | { | |
1574 | as_bad (_("mask trims opcode bits for %s"), op->name); | |
5b7c81bd | 1575 | return true; |
b9c361e0 JL |
1576 | } |
1577 | ||
1578 | /* The operands must not overlap the opcode or each other. */ | |
1579 | for (o = op->operands; *o; ++o) | |
1580 | { | |
5b7c81bd | 1581 | bool optional = false; |
b9c361e0 JL |
1582 | if (*o >= num_powerpc_operands) |
1583 | { | |
1584 | as_bad (_("operand index error for %s"), op->name); | |
5b7c81bd | 1585 | return true; |
b9c361e0 JL |
1586 | } |
1587 | else | |
1588 | { | |
71553718 | 1589 | uint64_t mask; |
b9c361e0 | 1590 | const struct powerpc_operand *operand = &powerpc_operands[*o]; |
71553718 | 1591 | if (operand->shift == (int) PPC_OPSHIFT_INV) |
b9c361e0 | 1592 | { |
71553718 | 1593 | const char *errmsg; |
32d71569 | 1594 | uint64_t val; |
71553718 AM |
1595 | |
1596 | errmsg = NULL; | |
1597 | val = -1; | |
1598 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) | |
1599 | val = -val; | |
71553718 | 1600 | mask = (*operand->insert) (0, val, ppc_cpu, &errmsg); |
b9c361e0 | 1601 | } |
42952a96 AM |
1602 | else if (operand->shift == (int) PPC_OPSHIFT_SH6) |
1603 | mask = (0x1f << 11) | 0x2; | |
71553718 AM |
1604 | else if (operand->shift >= 0) |
1605 | mask = operand->bitm << operand->shift; | |
1606 | else | |
1607 | mask = operand->bitm >> -operand->shift; | |
1608 | if (omask & mask) | |
1609 | { | |
1610 | as_bad (_("operand %d overlap in %s"), | |
1611 | (int) (o - op->operands), op->name); | |
5b7c81bd | 1612 | return true; |
71553718 AM |
1613 | } |
1614 | omask |= mask; | |
2eac3da1 | 1615 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) |
5b7c81bd | 1616 | optional = true; |
2eac3da1 AM |
1617 | else if (optional) |
1618 | { | |
1619 | as_bad (_("non-optional operand %d follows optional operand in %s"), | |
1620 | (int) (o - op->operands), op->name); | |
5b7c81bd | 1621 | return true; |
2eac3da1 | 1622 | } |
b9c361e0 JL |
1623 | } |
1624 | } | |
5b7c81bd | 1625 | return false; |
b9c361e0 JL |
1626 | } |
1627 | ||
a887be69 AM |
1628 | static void * |
1629 | insn_calloc (size_t n, size_t size) | |
1630 | { | |
a14413dd AM |
1631 | size_t amt = n * size; |
1632 | void *ret = obstack_alloc (&insn_obstack, amt); | |
a887be69 AM |
1633 | memset (ret, 0, amt); |
1634 | return ret; | |
1635 | } | |
1636 | ||
dc3ff926 AM |
1637 | /* Insert opcodes into hash tables. Called at startup and for |
1638 | .machine pseudo. */ | |
252b5132 | 1639 | |
69c040df AM |
1640 | static void |
1641 | ppc_setup_opcodes (void) | |
252b5132 | 1642 | { |
98027b10 | 1643 | const struct powerpc_opcode *op; |
252b5132 | 1644 | const struct powerpc_opcode *op_end; |
5b7c81bd | 1645 | bool bad_insn = false; |
252b5132 | 1646 | |
69c040df | 1647 | if (ppc_hash != NULL) |
a887be69 AM |
1648 | { |
1649 | htab_delete (ppc_hash); | |
1650 | _obstack_free (&insn_obstack, NULL); | |
1651 | } | |
1652 | ||
1653 | obstack_begin (&insn_obstack, chunksize); | |
252b5132 RH |
1654 | |
1655 | /* Insert the opcodes into a hash table. */ | |
a887be69 AM |
1656 | ppc_hash = htab_create_alloc (5000, hash_string_tuple, eq_string_tuple, |
1657 | NULL, insn_calloc, NULL); | |
252b5132 | 1658 | |
c43a438d | 1659 | if (ENABLE_CHECKING) |
b84bf58a | 1660 | { |
c43a438d | 1661 | unsigned int i; |
b84bf58a | 1662 | |
3b8b57a9 | 1663 | /* An index into powerpc_operands is stored in struct fix |
8e5eb8e1 DS |
1664 | fx_pcrel_adjust which is a 16 bit field. */ |
1665 | gas_assert (num_powerpc_operands <= PPC_OPINDEX_MAX + 1); | |
3b8b57a9 | 1666 | |
c43a438d AM |
1667 | /* Check operand masks. Code here and in the disassembler assumes |
1668 | all the 1's in the mask are contiguous. */ | |
1669 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1670 | { |
0f873fd5 | 1671 | uint64_t mask = powerpc_operands[i].bitm; |
59f08271 | 1672 | unsigned long flags = powerpc_operands[i].flags; |
0f873fd5 | 1673 | uint64_t right_bit; |
c43a438d AM |
1674 | unsigned int j; |
1675 | ||
59f08271 DS |
1676 | if ((flags & PPC_OPERAND_PLUS1) != 0 |
1677 | && (flags & PPC_OPERAND_NONZERO) != 0) | |
1678 | as_bad ("mutually exclusive operand flags"); | |
1679 | ||
c43a438d AM |
1680 | right_bit = mask & -mask; |
1681 | mask += right_bit; | |
1682 | right_bit = mask & -mask; | |
1683 | if (mask != right_bit) | |
1684 | { | |
1685 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
5b7c81bd | 1686 | bad_insn = true; |
c43a438d AM |
1687 | } |
1688 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1689 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1690 | sizeof (powerpc_operands[0])) == 0) | |
1691 | { | |
1692 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1693 | j, i); | |
5b7c81bd | 1694 | bad_insn = true; |
c43a438d | 1695 | } |
b84bf58a AM |
1696 | } |
1697 | } | |
1698 | ||
252b5132 RH |
1699 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1700 | for (op = powerpc_opcodes; op < op_end; op++) | |
1701 | { | |
c43a438d | 1702 | if (ENABLE_CHECKING) |
b84bf58a | 1703 | { |
2ceb7719 | 1704 | unsigned int new_opcode = PPC_OP (op[0].opcode); |
b9c361e0 JL |
1705 | |
1706 | #ifdef PRINT_OPCODE_TABLE | |
45685a2f AM |
1707 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx" |
1708 | "\tmask: 0x%llx\tflags: 0x%llx\n", | |
2ceb7719 PB |
1709 | op->name, (unsigned int) (op - powerpc_opcodes), |
1710 | new_opcode, (unsigned long long) op->opcode, | |
45685a2f AM |
1711 | (unsigned long long) op->mask, |
1712 | (unsigned long long) op->flags); | |
b9c361e0 JL |
1713 | #endif |
1714 | ||
2ceb7719 PB |
1715 | /* The major opcodes had better be sorted. Code in the disassembler |
1716 | assumes the insns are sorted according to major opcode. */ | |
1717 | if (op != powerpc_opcodes | |
1718 | && new_opcode < PPC_OP (op[-1].opcode)) | |
1719 | { | |
1720 | as_bad (_("major opcode is not sorted for %s"), op->name); | |
5b7c81bd | 1721 | bad_insn = true; |
8dbcd839 | 1722 | } |
2ceb7719 | 1723 | |
14b57c7c AM |
1724 | if ((op->flags & PPC_OPCODE_VLE) != 0) |
1725 | { | |
1726 | as_bad (_("%s is enabled by vle flag"), op->name); | |
5b7c81bd | 1727 | bad_insn = true; |
14b57c7c AM |
1728 | } |
1729 | if (PPC_OP (op->opcode) != 4 | |
1730 | && PPC_OP (op->opcode) != 31 | |
1731 | && (op->deprecated & PPC_OPCODE_VLE) == 0) | |
1732 | { | |
1733 | as_bad (_("%s not disabled by vle flag"), op->name); | |
5b7c81bd | 1734 | bad_insn = true; |
14b57c7c | 1735 | } |
b9c361e0 JL |
1736 | bad_insn |= insn_validate (op); |
1737 | } | |
c43a438d | 1738 | |
b9c361e0 | 1739 | if ((ppc_cpu & op->flags) != 0 |
fe0e921f AM |
1740 | && !(ppc_cpu & op->deprecated) |
1741 | && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) | |
1742 | { | |
1743 | as_bad (_("duplicate %s"), op->name); | |
5b7c81bd | 1744 | bad_insn = true; |
fe0e921f | 1745 | } |
b9c361e0 | 1746 | } |
c43a438d | 1747 | |
b9c361e0 JL |
1748 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1749 | for (op = powerpc_opcodes; op < op_end; op++) | |
fe0e921f | 1750 | str_hash_insert (ppc_hash, op->name, op, 0); |
b9c361e0 | 1751 | |
dd7efa79 PB |
1752 | op_end = prefix_opcodes + prefix_num_opcodes; |
1753 | for (op = prefix_opcodes; op < op_end; op++) | |
1754 | { | |
1755 | if (ENABLE_CHECKING) | |
1756 | { | |
1757 | unsigned int new_opcode = PPC_PREFIX_SEG (op[0].opcode); | |
1758 | ||
1759 | #ifdef PRINT_OPCODE_TABLE | |
45685a2f AM |
1760 | printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx" |
1761 | "\tmask: 0x%llx\tflags: 0x%llx\n", | |
dd7efa79 PB |
1762 | op->name, (unsigned int) (op - prefix_opcodes), |
1763 | new_opcode, (unsigned long long) op->opcode, | |
45685a2f AM |
1764 | (unsigned long long) op->mask, |
1765 | (unsigned long long) op->flags); | |
dd7efa79 PB |
1766 | #endif |
1767 | ||
1768 | /* The major opcodes had better be sorted. Code in the disassembler | |
1769 | assumes the insns are sorted according to major opcode. */ | |
1770 | if (op != prefix_opcodes | |
1771 | && new_opcode < PPC_PREFIX_SEG (op[-1].opcode)) | |
1772 | { | |
1773 | as_bad (_("major opcode is not sorted for %s"), op->name); | |
5b7c81bd | 1774 | bad_insn = true; |
dd7efa79 PB |
1775 | } |
1776 | bad_insn |= insn_validate (op); | |
1777 | } | |
1778 | ||
1779 | if ((ppc_cpu & op->flags) != 0 | |
fe0e921f AM |
1780 | && !(ppc_cpu & op->deprecated) |
1781 | && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) | |
1782 | { | |
1783 | as_bad (_("duplicate %s"), op->name); | |
5b7c81bd | 1784 | bad_insn = true; |
fe0e921f | 1785 | } |
dd7efa79 PB |
1786 | } |
1787 | ||
1788 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) | |
1789 | for (op = prefix_opcodes; op < op_end; op++) | |
fe0e921f | 1790 | str_hash_insert (ppc_hash, op->name, op, 0); |
dd7efa79 | 1791 | |
45685a2f | 1792 | if ((ppc_cpu & (PPC_OPCODE_VLE | PPC_OPCODE_ANY)) != 0) |
b9c361e0 | 1793 | { |
45685a2f AM |
1794 | unsigned int prev_seg = 0; |
1795 | unsigned int seg; | |
1796 | ||
1797 | op_end = vle_opcodes + vle_num_opcodes; | |
1798 | for (op = vle_opcodes; op < op_end; op++) | |
b9c361e0 | 1799 | { |
45685a2f AM |
1800 | if (ENABLE_CHECKING) |
1801 | { | |
1802 | seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask)); | |
b9c361e0 JL |
1803 | |
1804 | #ifdef PRINT_OPCODE_TABLE | |
45685a2f AM |
1805 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx" |
1806 | "\tmask: 0x%llx\tflags: 0x%llx\n", | |
1807 | op->name, (unsigned int) (op - vle_opcodes), | |
1808 | (unsigned int) seg, (unsigned long long) op->opcode, | |
1809 | (unsigned long long) op->mask, | |
1810 | (unsigned long long) op->flags); | |
b9c361e0 | 1811 | #endif |
2ceb7719 | 1812 | |
45685a2f AM |
1813 | if (seg < prev_seg) |
1814 | { | |
1815 | as_bad (_("major opcode is not sorted for %s"), op->name); | |
1816 | bad_insn = true; | |
1817 | } | |
1818 | prev_seg = seg; | |
1819 | bad_insn |= insn_validate (op); | |
b9c361e0 JL |
1820 | } |
1821 | ||
45685a2f | 1822 | str_hash_insert (ppc_hash, op->name, op, 0); |
fe0e921f | 1823 | } |
252b5132 RH |
1824 | } |
1825 | ||
61a457e5 | 1826 | /* LSP instructions */ |
45685a2f | 1827 | if ((ppc_cpu & (PPC_OPCODE_LSP | PPC_OPCODE_ANY)) != 0) |
61a457e5 AM |
1828 | { |
1829 | unsigned int prev_seg = 0; | |
1830 | unsigned int seg; | |
1831 | op_end = lsp_opcodes + lsp_num_opcodes; | |
1832 | for (op = lsp_opcodes; op < op_end; op++) | |
1833 | { | |
1834 | if (ENABLE_CHECKING) | |
1835 | { | |
1836 | seg = LSP_OP_TO_SEG (op->opcode); | |
1837 | if (seg < prev_seg) | |
1838 | { | |
1839 | as_bad (_("opcode is not sorted for %s"), op->name); | |
1840 | bad_insn = true; | |
1841 | } | |
1842 | prev_seg = seg; | |
1843 | bad_insn |= insn_validate (op); | |
1844 | } | |
1845 | ||
1846 | str_hash_insert (ppc_hash, op->name, op, 0); | |
1847 | } | |
1848 | } | |
1849 | ||
74081948 | 1850 | /* SPE2 instructions */ |
45685a2f | 1851 | if ((ppc_cpu & (PPC_OPCODE_SPE2 | PPC_OPCODE_ANY)) != 0) |
74081948 | 1852 | { |
45685a2f AM |
1853 | unsigned int prev_seg = 0; |
1854 | unsigned int seg; | |
74081948 AF |
1855 | op_end = spe2_opcodes + spe2_num_opcodes; |
1856 | for (op = spe2_opcodes; op < op_end; op++) | |
1857 | { | |
1858 | if (ENABLE_CHECKING) | |
1859 | { | |
45685a2f AM |
1860 | seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask)); |
1861 | if (seg < prev_seg) | |
74081948 | 1862 | { |
74081948 | 1863 | as_bad (_("major opcode is not sorted for %s"), op->name); |
5b7c81bd | 1864 | bad_insn = true; |
74081948 | 1865 | } |
45685a2f | 1866 | prev_seg = seg; |
74081948 AF |
1867 | bad_insn |= insn_validate (op); |
1868 | } | |
1869 | ||
45685a2f | 1870 | str_hash_insert (ppc_hash, op->name, op, 0); |
74081948 | 1871 | } |
74081948 AF |
1872 | } |
1873 | ||
b84bf58a | 1874 | if (bad_insn) |
252b5132 | 1875 | abort (); |
69c040df AM |
1876 | } |
1877 | ||
1878 | /* This function is called when the assembler starts up. It is called | |
1879 | after the options have been parsed and the output file has been | |
1880 | opened. */ | |
1881 | ||
1882 | void | |
98027b10 | 1883 | md_begin (void) |
69c040df AM |
1884 | { |
1885 | ppc_set_cpu (); | |
1886 | ||
1887 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
8fbf7334 | 1888 | ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; |
69c040df AM |
1889 | |
1890 | #ifdef OBJ_ELF | |
1891 | /* Set the ELF flags if desired. */ | |
1892 | if (ppc_flags && !msolaris) | |
1893 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1894 | #endif | |
1895 | ||
1896 | ppc_setup_opcodes (); | |
252b5132 | 1897 | |
67c1ffbe | 1898 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1899 | by the user. */ |
252b5132 RH |
1900 | if (!set_target_endian) |
1901 | { | |
1902 | set_target_endian = 1; | |
1903 | target_big_endian = PPC_BIG_ENDIAN; | |
1904 | } | |
1905 | ||
1906 | #ifdef OBJ_XCOFF | |
1907 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1908 | ||
1b2cb8e2 CC |
1909 | /* Create XCOFF sections with .text in first, as it's creating dummy symbols |
1910 | to serve as initial csects. This forces the text csects to precede the | |
1911 | data csects. These symbols will not be output. */ | |
934cb849 CC |
1912 | ppc_init_xcoff_section (&ppc_xcoff_text_section, text_section); |
1913 | ppc_init_xcoff_section (&ppc_xcoff_data_section, data_section); | |
1914 | ppc_init_xcoff_section (&ppc_xcoff_bss_section, bss_section); | |
252b5132 | 1915 | #endif |
252b5132 RH |
1916 | } |
1917 | ||
a887be69 AM |
1918 | void |
1919 | ppc_md_end (void) | |
1920 | { | |
a14413dd AM |
1921 | if (ppc_hash) |
1922 | { | |
1923 | htab_delete (ppc_hash); | |
1924 | _obstack_free (&insn_obstack, NULL); | |
1925 | } | |
1926 | ppc_hash = NULL; | |
a887be69 AM |
1927 | } |
1928 | ||
6a0c61b7 | 1929 | void |
98027b10 | 1930 | ppc_cleanup (void) |
6a0c61b7 | 1931 | { |
dc1d03fc | 1932 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1933 | if (ppc_apuinfo_list == NULL) |
1934 | return; | |
1935 | ||
1936 | /* Ok, so write the section info out. We have this layout: | |
1937 | ||
1938 | byte data what | |
1939 | ---- ---- ---- | |
1940 | 0 8 length of "APUinfo\0" | |
1941 | 4 (n*4) number of APU's (4 bytes each) | |
1942 | 8 2 note type 2 | |
1943 | 12 "APUinfo\0" name | |
1944 | 20 APU#1 first APU's info | |
1945 | 24 APU#2 second APU's info | |
1946 | ... ... | |
1947 | */ | |
1948 | { | |
1949 | char *p; | |
1950 | asection *seg = now_seg; | |
1951 | subsegT subseg = now_subseg; | |
1952 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1953 | unsigned int i; |
6a0c61b7 EZ |
1954 | |
1955 | /* Create the .PPC.EMB.apuinfo section. */ | |
14b57c7c | 1956 | apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0); |
fd361982 | 1957 | bfd_set_section_flags (apuinfo_secp, SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1958 | |
1959 | p = frag_more (4); | |
1960 | md_number_to_chars (p, (valueT) 8, 4); | |
1961 | ||
1962 | p = frag_more (4); | |
e98d298c | 1963 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1964 | |
1965 | p = frag_more (4); | |
1966 | md_number_to_chars (p, (valueT) 2, 4); | |
1967 | ||
1968 | p = frag_more (8); | |
14b57c7c | 1969 | strcpy (p, APUINFO_LABEL); |
6a0c61b7 EZ |
1970 | |
1971 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1972 | { | |
b34976b6 AM |
1973 | p = frag_more (4); |
1974 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1975 | } |
1976 | ||
1977 | frag_align (2, 0, 0); | |
1978 | ||
1979 | /* We probably can't restore the current segment, for there likely | |
1980 | isn't one yet... */ | |
1981 | if (seg && subseg) | |
1982 | subseg_set (seg, subseg); | |
1983 | } | |
dc1d03fc | 1984 | #endif |
6a0c61b7 EZ |
1985 | } |
1986 | ||
252b5132 RH |
1987 | /* Insert an operand value into an instruction. */ |
1988 | ||
0f873fd5 PB |
1989 | static uint64_t |
1990 | ppc_insert_operand (uint64_t insn, | |
a1867a27 | 1991 | const struct powerpc_operand *operand, |
0f873fd5 | 1992 | int64_t val, |
91d6fa6a | 1993 | ppc_cpu_t cpu, |
3b4dbbbf | 1994 | const char *file, |
a1867a27 | 1995 | unsigned int line) |
252b5132 | 1996 | { |
0f873fd5 | 1997 | int64_t min, max, right; |
eb42fac1 | 1998 | |
b84bf58a AM |
1999 | max = operand->bitm; |
2000 | right = max & -max; | |
2001 | min = 0; | |
2002 | ||
a47622ac | 2003 | if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) |
252b5132 | 2004 | { |
a255f00a AM |
2005 | /* Extend the allowed range for addis to [-32768, 65535]. |
2006 | Similarly for cmpli and some VLE high part insns. For 64-bit | |
2007 | it would be good to disable this for signed fields since the | |
a47622ac AM |
2008 | value is sign extended into the high 32 bits of the register. |
2009 | If the value is, say, an address, then we might care about | |
2010 | the high bits. However, gcc as of 2014-06 uses unsigned | |
2011 | values when loading the high part of 64-bit constants using | |
a255f00a AM |
2012 | lis. */ |
2013 | min = ~(max >> 1) & -right; | |
a47622ac AM |
2014 | } |
2015 | else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2016 | { | |
2017 | max = (max >> 1) & -right; | |
931774a9 | 2018 | min = ~max & -right; |
b84bf58a | 2019 | } |
59f08271 DS |
2020 | else if ((operand->flags & PPC_OPERAND_NONZERO) != 0) |
2021 | { | |
2022 | ++min; | |
2023 | ++max; | |
2024 | } | |
252b5132 | 2025 | |
b84bf58a | 2026 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 2027 | max++; |
252b5132 | 2028 | |
b84bf58a | 2029 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 | 2030 | { |
0f873fd5 | 2031 | int64_t tmp = min; |
a1867a27 AM |
2032 | min = -max; |
2033 | max = -tmp; | |
2034 | } | |
b84bf58a | 2035 | |
a1867a27 AM |
2036 | if (min <= max) |
2037 | { | |
2038 | /* Some people write constants with the sign extension done by | |
2039 | hand but only up to 32 bits. This shouldn't really be valid, | |
2040 | but, to permit this code to assemble on a 64-bit host, we | |
2041 | sign extend the 32-bit value to 64 bits if so doing makes the | |
8acf1435 PB |
2042 | value valid. We only do this for operands that are 32-bits or |
2043 | smaller. */ | |
a1867a27 | 2044 | if (val > max |
8acf1435 | 2045 | && (operand->bitm & ~0xffffffffULL) == 0 |
0f873fd5 PB |
2046 | && (val - (1LL << 32)) >= min |
2047 | && (val - (1LL << 32)) <= max | |
2048 | && ((val - (1LL << 32)) & (right - 1)) == 0) | |
2049 | val = val - (1LL << 32); | |
a1867a27 AM |
2050 | |
2051 | /* Similarly, people write expressions like ~(1<<15), and expect | |
2052 | this to be OK for a 32-bit unsigned value. */ | |
2053 | else if (val < min | |
8acf1435 | 2054 | && (operand->bitm & ~0xffffffffULL) == 0 |
0f873fd5 PB |
2055 | && (val + (1LL << 32)) >= min |
2056 | && (val + (1LL << 32)) <= max | |
2057 | && ((val + (1LL << 32)) & (right - 1)) == 0) | |
2058 | val = val + (1LL << 32); | |
a1867a27 AM |
2059 | |
2060 | else if (val < min | |
2061 | || val > max | |
2062 | || (val & (right - 1)) != 0) | |
2063 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
2064 | } | |
b84bf58a | 2065 | |
252b5132 RH |
2066 | if (operand->insert) |
2067 | { | |
2068 | const char *errmsg; | |
2069 | ||
2070 | errmsg = NULL; | |
0f873fd5 | 2071 | insn = (*operand->insert) (insn, val, cpu, &errmsg); |
252b5132 | 2072 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2073 | as_bad_where (file, line, "%s", errmsg); |
252b5132 | 2074 | } |
b9c361e0 | 2075 | else |
59f08271 DS |
2076 | { |
2077 | if ((operand->flags & PPC_OPERAND_NONZERO) != 0) | |
2078 | --val; | |
2079 | if (operand->shift >= 0) | |
2080 | insn |= (val & operand->bitm) << operand->shift; | |
2081 | else | |
2082 | insn |= (val & operand->bitm) >> -operand->shift; | |
2083 | } | |
252b5132 RH |
2084 | |
2085 | return insn; | |
2086 | } | |
2087 | ||
2088 | \f | |
2089 | #ifdef OBJ_ELF | |
2090 | /* Parse @got, etc. and return the desired relocation. */ | |
2091 | static bfd_reloc_code_real_type | |
98027b10 | 2092 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
2093 | { |
2094 | struct map_bfd { | |
e0471c16 | 2095 | const char *string; |
b7d7dc63 AM |
2096 | unsigned int length : 8; |
2097 | unsigned int valid32 : 1; | |
2098 | unsigned int valid64 : 1; | |
2099 | unsigned int reloc; | |
252b5132 RH |
2100 | }; |
2101 | ||
2102 | char ident[20]; | |
2103 | char *str = *str_p; | |
2104 | char *str2; | |
2105 | int ch; | |
2106 | int len; | |
15c1449b | 2107 | const struct map_bfd *ptr; |
252b5132 | 2108 | |
b7d7dc63 AM |
2109 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
2110 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
2111 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 2112 | |
15c1449b | 2113 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
2114 | MAP ("l", BFD_RELOC_LO16), |
2115 | MAP ("h", BFD_RELOC_HI16), | |
2116 | MAP ("ha", BFD_RELOC_HI16_S), | |
2117 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
2118 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
2119 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
2120 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
2121 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
2122 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
2123 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
2124 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
2125 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
2126 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
2127 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
2128 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
2129 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
2130 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
2131 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
2132 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
2133 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
2134 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
2135 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
2136 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
2137 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
2138 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
2139 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
2140 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
2141 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
2142 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
2143 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
2144 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
2145 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
2146 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
2147 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
2148 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
2149 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
2150 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
2151 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
2152 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
2153 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
2154 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
2155 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
2156 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
2157 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
2158 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
2159 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
2160 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
2161 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
2162 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
2163 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
2164 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
b9c361e0 JL |
2165 | MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), |
2166 | MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), | |
2167 | MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), | |
b7d7dc63 AM |
2168 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), |
2169 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
2170 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
2171 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
2172 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
2173 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
2174 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
2175 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
2176 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
b9c361e0 | 2177 | MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), |
b7d7dc63 AM |
2178 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), |
2179 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
2180 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
2181 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
2182 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
2183 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
2184 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
2185 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
f9c6b907 AM |
2186 | MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), |
2187 | MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), | |
b7d7dc63 AM |
2188 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), |
2189 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
2190 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
2191 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
2192 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
2193 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
2194 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
2195 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
2196 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
f9c6b907 AM |
2197 | MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), |
2198 | MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), | |
b7d7dc63 AM |
2199 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), |
2200 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
2201 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
2202 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
45965137 | 2203 | MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), |
f9c6b907 AM |
2204 | MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), |
2205 | MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), | |
b7d7dc63 AM |
2206 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), |
2207 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
2208 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
2209 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
05d0e962 | 2210 | MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC), |
5663e321 AM |
2211 | MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34), |
2212 | MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34), | |
2213 | MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34), | |
c213164a | 2214 | MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL), |
87c69f97 AM |
2215 | MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34), |
2216 | MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34), | |
2217 | MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34), | |
2218 | MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34), | |
5663e321 AM |
2219 | MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34), |
2220 | MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34), | |
2221 | MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34), | |
2222 | MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34), | |
62ebcb5c | 2223 | { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } |
252b5132 RH |
2224 | }; |
2225 | ||
2226 | if (*str++ != '@') | |
62ebcb5c | 2227 | return BFD_RELOC_NONE; |
252b5132 RH |
2228 | |
2229 | for (ch = *str, str2 = ident; | |
2230 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 2231 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
2232 | ch = *++str) |
2233 | { | |
3882b010 | 2234 | *str2++ = TOLOWER (ch); |
252b5132 RH |
2235 | } |
2236 | ||
2237 | *str2 = '\0'; | |
2238 | len = str2 - ident; | |
2239 | ||
2240 | ch = ident[0]; | |
2241 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
2242 | if (ch == ptr->string[0] | |
2243 | && len == ptr->length | |
b7d7dc63 AM |
2244 | && memcmp (ident, ptr->string, ptr->length) == 0 |
2245 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 2246 | { |
15c1449b AM |
2247 | int reloc = ptr->reloc; |
2248 | ||
32d71569 | 2249 | if (!ppc_obj64 && (exp_p->X_op == O_big || exp_p->X_add_number != 0)) |
727fc41e AM |
2250 | { |
2251 | switch (reloc) | |
2252 | { | |
2253 | case BFD_RELOC_16_GOTOFF: | |
2254 | case BFD_RELOC_LO16_GOTOFF: | |
2255 | case BFD_RELOC_HI16_GOTOFF: | |
2256 | case BFD_RELOC_HI16_S_GOTOFF: | |
e47d413a AM |
2257 | as_warn (_("symbol+offset@%s means symbol@%s+offset"), |
2258 | ptr->string, ptr->string); | |
727fc41e AM |
2259 | break; |
2260 | ||
2261 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
2262 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
2263 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
2264 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
2265 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
2266 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
2267 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
2268 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
2269 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
2270 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
2271 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
2272 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
2273 | case BFD_RELOC_PPC_GOT_TPREL16: | |
2274 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
2275 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
2276 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
e47d413a | 2277 | as_bad (_("symbol+offset@%s not supported"), ptr->string); |
727fc41e AM |
2278 | break; |
2279 | } | |
2280 | } | |
5f6db75a AM |
2281 | |
2282 | /* Now check for identifier@suffix+constant. */ | |
2283 | if (*str == '-' || *str == '+') | |
252b5132 | 2284 | { |
5f6db75a AM |
2285 | char *orig_line = input_line_pointer; |
2286 | expressionS new_exp; | |
2287 | ||
2288 | input_line_pointer = str; | |
2289 | expression (&new_exp); | |
32d71569 | 2290 | if (new_exp.X_op == O_constant && exp_p->X_op != O_big) |
252b5132 | 2291 | { |
5f6db75a AM |
2292 | exp_p->X_add_number += new_exp.X_add_number; |
2293 | str = input_line_pointer; | |
252b5132 | 2294 | } |
32d71569 | 2295 | input_line_pointer = orig_line; |
252b5132 | 2296 | } |
252b5132 | 2297 | *str_p = str; |
0baf16f2 | 2298 | |
2b3c4602 | 2299 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2300 | && exp_p->X_op == O_symbol |
2301 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2302 | { |
9f2b53d7 AM |
2303 | /* Change the symbol so that the dummy .TOC. symbol can be |
2304 | omitted from the object file. */ | |
0baf16f2 AM |
2305 | exp_p->X_add_symbol = &abs_symbol; |
2306 | } | |
2307 | ||
7aba54da AM |
2308 | if (reloc == BFD_RELOC_PPC64_REL24_NOTOC |
2309 | && (ppc_cpu & PPC_OPCODE_POWER10) == 0) | |
2310 | reloc = BFD_RELOC_PPC64_REL24_P9NOTOC; | |
2311 | ||
15c1449b | 2312 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2313 | } |
2314 | ||
62ebcb5c | 2315 | return BFD_RELOC_NONE; |
252b5132 RH |
2316 | } |
2317 | ||
62ebcb5c | 2318 | /* Support @got, etc. on constants emitted via .short, .int etc. */ |
99a814a1 | 2319 | |
62ebcb5c AM |
2320 | bfd_reloc_code_real_type |
2321 | ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) | |
2322 | { | |
2323 | expression (exp); | |
2324 | if (nbytes >= 2 && *input_line_pointer == '@') | |
2325 | return ppc_elf_suffix (&input_line_pointer, exp); | |
2326 | return BFD_RELOC_NONE; | |
252b5132 RH |
2327 | } |
2328 | ||
bf7279d5 AM |
2329 | /* Warn when emitting data to code sections, unless we are emitting |
2330 | a relocation that ld --ppc476-workaround uses to recognise data | |
2331 | *and* there was an unconditional branch prior to the data. */ | |
2332 | ||
2333 | void | |
2334 | ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, | |
2335 | unsigned int nbytes, fixS *fix) | |
2336 | { | |
2337 | if (warn_476 | |
2338 | && (now_seg->flags & SEC_CODE) != 0 | |
2339 | && (nbytes != 4 | |
2340 | || fix == NULL | |
2341 | || !(fix->fx_r_type == BFD_RELOC_32 | |
2342 | || fix->fx_r_type == BFD_RELOC_CTOR | |
2343 | || fix->fx_r_type == BFD_RELOC_32_PCREL) | |
2344 | || !(last_seg == now_seg && last_subseg == now_subseg) | |
2345 | || !((last_insn & (0x3f << 26)) == (18u << 26) | |
2346 | || ((last_insn & (0x3f << 26)) == (16u << 26) | |
2347 | && (last_insn & (0x14 << 21)) == (0x14 << 21)) | |
2348 | || ((last_insn & (0x3f << 26)) == (19u << 26) | |
2349 | && (last_insn & (0x3ff << 1)) == (16u << 1) | |
2350 | && (last_insn & (0x14 << 21)) == (0x14 << 21))))) | |
2351 | { | |
2352 | /* Flag that we've warned. */ | |
2353 | if (fix != NULL) | |
2354 | fix->fx_tcbit = 1; | |
2355 | ||
2356 | as_warn (_("data in executable section")); | |
2357 | } | |
2358 | } | |
2359 | ||
252b5132 RH |
2360 | /* Solaris pseduo op to change to the .rodata section. */ |
2361 | static void | |
98027b10 | 2362 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2363 | { |
2364 | char *save_line = input_line_pointer; | |
2365 | static char section[] = ".rodata\n"; | |
2366 | ||
99a814a1 | 2367 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2368 | input_line_pointer = section; |
2369 | obj_elf_section (xxx); | |
2370 | ||
2371 | input_line_pointer = save_line; | |
2372 | } | |
2373 | ||
99a814a1 | 2374 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2375 | static void |
98027b10 | 2376 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2377 | { |
98027b10 AM |
2378 | char *name; |
2379 | char c; | |
2380 | char *p; | |
252b5132 | 2381 | offsetT size; |
98027b10 | 2382 | symbolS *symbolP; |
252b5132 RH |
2383 | offsetT align; |
2384 | segT old_sec; | |
2385 | int old_subsec; | |
2386 | char *pfrag; | |
2387 | int align2; | |
2388 | ||
d02603dc | 2389 | c = get_symbol_name (&name); |
252b5132 | 2390 | |
d02603dc | 2391 | /* Just after name is now '\0'. */ |
252b5132 RH |
2392 | p = input_line_pointer; |
2393 | *p = c; | |
d02603dc | 2394 | SKIP_WHITESPACE_AFTER_NAME (); |
252b5132 RH |
2395 | if (*input_line_pointer != ',') |
2396 | { | |
d6ed37ed | 2397 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
2398 | ignore_rest_of_line (); |
2399 | return; | |
2400 | } | |
2401 | ||
2402 | input_line_pointer++; /* skip ',' */ | |
2403 | if ((size = get_absolute_expression ()) < 0) | |
2404 | { | |
2405 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2406 | ignore_rest_of_line (); | |
2407 | return; | |
2408 | } | |
2409 | ||
2410 | /* The third argument to .lcomm is the alignment. */ | |
2411 | if (*input_line_pointer != ',') | |
2412 | align = 8; | |
2413 | else | |
2414 | { | |
2415 | ++input_line_pointer; | |
2416 | align = get_absolute_expression (); | |
2417 | if (align <= 0) | |
2418 | { | |
2419 | as_warn (_("ignoring bad alignment")); | |
2420 | align = 8; | |
2421 | } | |
2422 | } | |
2423 | ||
2424 | *p = 0; | |
2425 | symbolP = symbol_find_or_make (name); | |
2426 | *p = c; | |
2427 | ||
2428 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2429 | { | |
d6ed37ed | 2430 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
2431 | S_GET_NAME (symbolP)); |
2432 | ignore_rest_of_line (); | |
2433 | return; | |
2434 | } | |
2435 | ||
2436 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2437 | { | |
d6ed37ed | 2438 | as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
2439 | S_GET_NAME (symbolP), |
2440 | (long) S_GET_VALUE (symbolP), | |
2441 | (long) size); | |
2442 | ||
2443 | ignore_rest_of_line (); | |
2444 | return; | |
2445 | } | |
2446 | ||
99a814a1 | 2447 | /* Allocate_bss. */ |
252b5132 RH |
2448 | old_sec = now_seg; |
2449 | old_subsec = now_subseg; | |
2450 | if (align) | |
2451 | { | |
99a814a1 | 2452 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2453 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2454 | if (align != 1) | |
2455 | { | |
d6ed37ed | 2456 | as_bad (_("common alignment not a power of 2")); |
252b5132 RH |
2457 | ignore_rest_of_line (); |
2458 | return; | |
2459 | } | |
2460 | } | |
2461 | else | |
2462 | align2 = 0; | |
2463 | ||
2464 | record_alignment (bss_section, align2); | |
cbe02d4f | 2465 | subseg_set (bss_section, 1); |
252b5132 RH |
2466 | if (align2) |
2467 | frag_align (align2, 0, 0); | |
2468 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2469 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2470 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2471 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2472 | (char *) 0); | |
2473 | *pfrag = 0; | |
2474 | S_SET_SIZE (symbolP, size); | |
2475 | S_SET_SEGMENT (symbolP, bss_section); | |
2476 | subseg_set (old_sec, old_subsec); | |
2477 | demand_empty_rest_of_line (); | |
2478 | } | |
2479 | ||
6911b7dc AM |
2480 | /* Pseudo op to set symbol local entry point. */ |
2481 | static void | |
2482 | ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) | |
2483 | { | |
d02603dc NC |
2484 | char *name; |
2485 | char c = get_symbol_name (&name); | |
6911b7dc AM |
2486 | char *p; |
2487 | expressionS exp; | |
2488 | symbolS *sym; | |
2489 | asymbol *bfdsym; | |
2490 | elf_symbol_type *elfsym; | |
2491 | ||
2492 | p = input_line_pointer; | |
2493 | *p = c; | |
d02603dc | 2494 | SKIP_WHITESPACE_AFTER_NAME (); |
6911b7dc AM |
2495 | if (*input_line_pointer != ',') |
2496 | { | |
2497 | *p = 0; | |
2498 | as_bad (_("expected comma after name `%s' in .localentry directive"), | |
2499 | name); | |
2500 | *p = c; | |
2501 | ignore_rest_of_line (); | |
2502 | return; | |
2503 | } | |
2504 | input_line_pointer++; | |
2505 | expression (&exp); | |
2506 | if (exp.X_op == O_absent) | |
2507 | { | |
2508 | as_bad (_("missing expression in .localentry directive")); | |
2509 | exp.X_op = O_constant; | |
2510 | exp.X_add_number = 0; | |
2511 | } | |
2512 | *p = 0; | |
2513 | sym = symbol_find_or_make (name); | |
2514 | *p = c; | |
2515 | ||
2516 | if (resolve_expression (&exp) | |
2517 | && exp.X_op == O_constant) | |
2518 | { | |
33cb30a1 | 2519 | unsigned int encoded, ok; |
6911b7dc | 2520 | |
33cb30a1 AM |
2521 | ok = 1; |
2522 | if (exp.X_add_number == 1 || exp.X_add_number == 7) | |
2523 | encoded = exp.X_add_number << STO_PPC64_LOCAL_BIT; | |
6911b7dc | 2524 | else |
33cb30a1 AM |
2525 | { |
2526 | encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); | |
2527 | if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) | |
2528 | { | |
2529 | as_bad (_(".localentry expression for `%s' " | |
2530 | "is not a valid power of 2"), S_GET_NAME (sym)); | |
2531 | ok = 0; | |
2532 | } | |
2533 | } | |
2534 | if (ok) | |
6911b7dc AM |
2535 | { |
2536 | bfdsym = symbol_get_bfdsym (sym); | |
c1229f84 | 2537 | elfsym = elf_symbol_from (bfdsym); |
6911b7dc AM |
2538 | gas_assert (elfsym); |
2539 | elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; | |
2540 | elfsym->internal_elf_sym.st_other |= encoded; | |
2541 | if (ppc_abiversion == 0) | |
2542 | ppc_abiversion = 2; | |
2543 | } | |
2544 | } | |
2545 | else | |
2546 | as_bad (_(".localentry expression for `%s' " | |
2547 | "does not evaluate to a constant"), S_GET_NAME (sym)); | |
2548 | ||
2549 | demand_empty_rest_of_line (); | |
2550 | } | |
2551 | ||
ee67d69a AM |
2552 | /* Pseudo op to set ABI version. */ |
2553 | static void | |
2554 | ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) | |
2555 | { | |
2556 | expressionS exp; | |
2557 | ||
2558 | expression (&exp); | |
2559 | if (exp.X_op == O_absent) | |
2560 | { | |
2561 | as_bad (_("missing expression in .abiversion directive")); | |
2562 | exp.X_op = O_constant; | |
2563 | exp.X_add_number = 0; | |
2564 | } | |
2565 | ||
2566 | if (resolve_expression (&exp) | |
2567 | && exp.X_op == O_constant) | |
2568 | ppc_abiversion = exp.X_add_number; | |
2569 | else | |
2570 | as_bad (_(".abiversion expression does not evaluate to a constant")); | |
2571 | demand_empty_rest_of_line (); | |
2572 | } | |
2573 | ||
005d79fd AM |
2574 | /* Parse a .gnu_attribute directive. */ |
2575 | static void | |
2576 | ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED) | |
2577 | { | |
2578 | int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU); | |
2579 | ||
2580 | /* Check validity of defined powerpc tags. */ | |
2581 | if (tag == Tag_GNU_Power_ABI_FP | |
2582 | || tag == Tag_GNU_Power_ABI_Vector | |
2583 | || tag == Tag_GNU_Power_ABI_Struct_Return) | |
2584 | { | |
2585 | unsigned int val; | |
2586 | ||
2587 | val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag); | |
2588 | ||
2589 | if ((tag == Tag_GNU_Power_ABI_FP && val > 15) | |
2590 | || (tag == Tag_GNU_Power_ABI_Vector && val > 3) | |
2591 | || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2)) | |
2592 | as_warn (_("unknown .gnu_attribute value")); | |
2593 | } | |
2594 | } | |
2595 | ||
ee67d69a AM |
2596 | /* Set ABI version in output file. */ |
2597 | void | |
ed2917de | 2598 | ppc_elf_md_finish (void) |
ee67d69a AM |
2599 | { |
2600 | if (ppc_obj64 && ppc_abiversion != 0) | |
2601 | { | |
2602 | elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; | |
2603 | elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; | |
2604 | } | |
22f72c48 AM |
2605 | /* Any selection of opcodes based on ppc_cpu after gas has finished |
2606 | parsing the file is invalid. md_apply_fix and ppc_handle_align | |
2607 | must select opcodes based on the machine in force at the point | |
2608 | where the fixup or alignment frag was created, not the machine in | |
2609 | force at the end of file. */ | |
2610 | ppc_cpu = 0; | |
ee67d69a AM |
2611 | } |
2612 | ||
252b5132 RH |
2613 | /* Validate any relocations emitted for -mrelocatable, possibly adding |
2614 | fixups for word relocations in writable segments, so we can adjust | |
2615 | them at runtime. */ | |
2616 | static void | |
98027b10 | 2617 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2618 | { |
2619 | if (fixp->fx_done || fixp->fx_pcrel) | |
2620 | return; | |
2621 | ||
2622 | switch (shlib) | |
2623 | { | |
2624 | case SHLIB_NONE: | |
2625 | case SHLIB_PIC: | |
2626 | return; | |
2627 | ||
5d6f4f16 | 2628 | case SHLIB_MRELOCATABLE: |
62ebcb5c | 2629 | if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF |
252b5132 RH |
2630 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF |
2631 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2632 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2633 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2634 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2635 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2636 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2637 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2638 | && strcmp (segment_name (seg), ".got2") != 0 |
2639 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2640 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2641 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2642 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2643 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2644 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2645 | { | |
2646 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2647 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2648 | { | |
2649 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
d6ed37ed | 2650 | _("relocation cannot be done when using -mrelocatable")); |
252b5132 RH |
2651 | } |
2652 | } | |
2653 | return; | |
2654 | } | |
2655 | } | |
0baf16f2 | 2656 | |
7e8d4ab4 AM |
2657 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2658 | function descriptor sym if the corresponding code sym is used. */ | |
2659 | ||
2660 | void | |
98027b10 | 2661 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2662 | { |
7e8d4ab4 | 2663 | symbolS *symp; |
9232bbb0 | 2664 | asection *toc; |
0baf16f2 | 2665 | |
7e8d4ab4 AM |
2666 | if (!ppc_obj64) |
2667 | return; | |
2668 | ||
2669 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2670 | { |
7e8d4ab4 AM |
2671 | const char *name; |
2672 | char *dotname; | |
2673 | symbolS *dotsym; | |
7e8d4ab4 AM |
2674 | |
2675 | name = S_GET_NAME (symp); | |
2676 | if (name[0] == '.') | |
2677 | continue; | |
2678 | ||
2679 | if (! S_IS_WEAK (symp) | |
2680 | || S_IS_DEFINED (symp)) | |
2681 | continue; | |
2682 | ||
a44e2901 | 2683 | dotname = concat (".", name, (char *) NULL); |
461b725f | 2684 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2685 | free (dotname); |
2686 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2687 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2688 | symbol_mark_used (symp); |
2689 | ||
0baf16f2 AM |
2690 | } |
2691 | ||
9232bbb0 AM |
2692 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2693 | if (toc != NULL | |
01efc3af | 2694 | && toc_reloc_types != has_large_toc_reloc |
fd361982 | 2695 | && bfd_section_size (toc) > 0x10000) |
9232bbb0 | 2696 | as_warn (_("TOC section size exceeds 64k")); |
a38a07e0 AM |
2697 | } |
2698 | ||
2699 | /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be | |
2700 | emitted. Other uses of .TOC. will cause the symbol to be marked | |
2701 | with BSF_KEEP in md_apply_fix. */ | |
9232bbb0 | 2702 | |
a38a07e0 AM |
2703 | void |
2704 | ppc_elf_adjust_symtab (void) | |
2705 | { | |
2706 | if (ppc_obj64) | |
2707 | { | |
2708 | symbolS *symp; | |
2709 | symp = symbol_find (".TOC."); | |
2710 | if (symp != NULL) | |
2711 | { | |
2712 | asymbol *bsym = symbol_get_bfdsym (symp); | |
2713 | if ((bsym->flags & BSF_KEEP) == 0) | |
2714 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
a38a07e0 AM |
2715 | } |
2716 | } | |
0baf16f2 | 2717 | } |
252b5132 | 2718 | #endif /* OBJ_ELF */ |
4a403be0 CC |
2719 | |
2720 | #ifdef OBJ_XCOFF | |
2721 | /* Parse XCOFF relocations. */ | |
2722 | static bfd_reloc_code_real_type | |
2723 | ppc_xcoff_suffix (char **str_p) | |
2724 | { | |
2725 | struct map_bfd { | |
2726 | const char *string; | |
2727 | unsigned int length : 8; | |
2728 | unsigned int valid32 : 1; | |
2729 | unsigned int valid64 : 1; | |
2730 | unsigned int reloc; | |
2731 | }; | |
2732 | ||
2733 | char ident[20]; | |
2734 | char *str = *str_p; | |
2735 | char *str2; | |
2736 | int ch; | |
2737 | int len; | |
2738 | const struct map_bfd *ptr; | |
2739 | ||
2740 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } | |
2741 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
2742 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
2743 | ||
2744 | static const struct map_bfd mapping[] = { | |
2745 | MAP ("l", BFD_RELOC_PPC_TOC16_LO), | |
2746 | MAP ("u", BFD_RELOC_PPC_TOC16_HI), | |
1b2cb8e2 CC |
2747 | MAP32 ("ie", BFD_RELOC_PPC_TLSIE), |
2748 | MAP32 ("ld", BFD_RELOC_PPC_TLSLD), | |
2749 | MAP32 ("le", BFD_RELOC_PPC_TLSLE), | |
2750 | MAP32 ("m", BFD_RELOC_PPC_TLSM), | |
2751 | MAP32 ("ml", BFD_RELOC_PPC_TLSML), | |
2752 | MAP64 ("ie", BFD_RELOC_PPC64_TLSIE), | |
2753 | MAP64 ("ld", BFD_RELOC_PPC64_TLSLD), | |
2754 | MAP64 ("le", BFD_RELOC_PPC64_TLSLE), | |
2755 | MAP64 ("m", BFD_RELOC_PPC64_TLSM), | |
2756 | MAP64 ("ml", BFD_RELOC_PPC64_TLSML), | |
4a403be0 CC |
2757 | }; |
2758 | ||
2759 | if (*str++ != '@') | |
2760 | return BFD_RELOC_NONE; | |
2761 | ||
2762 | for (ch = *str, str2 = ident; | |
2763 | (str2 < ident + sizeof (ident) - 1 | |
2764 | && (ISALNUM (ch) || ch == '@')); | |
2765 | ch = *++str) | |
2766 | { | |
2767 | *str2++ = TOLOWER (ch); | |
2768 | } | |
2769 | ||
2770 | *str2 = '\0'; | |
2771 | len = str2 - ident; | |
2772 | ||
2773 | ch = ident[0]; | |
2774 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
2775 | if (ch == ptr->string[0] | |
2776 | && len == ptr->length | |
2777 | && memcmp (ident, ptr->string, ptr->length) == 0 | |
2778 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
2779 | { | |
2780 | *str_p = str; | |
2781 | return (bfd_reloc_code_real_type) ptr->reloc; | |
2782 | } | |
2783 | ||
2784 | return BFD_RELOC_NONE; | |
2785 | } | |
2786 | ||
2787 | /* Restore XCOFF addis instruction to ELF format. | |
2788 | AIX often generates addis instructions using "addis RT,D(RA)" | |
2789 | format instead of the ELF "addis RT,RA,SI" one. | |
2790 | On entry RT_E is at the comma after RT, D_E is at the open | |
2791 | parenthesis after D, and RA_E is at the close parenthesis after RA. */ | |
2792 | static void | |
2793 | ppc_xcoff_fixup_addis (char *rt_e, char *d_e, char *ra_e) | |
2794 | { | |
2795 | size_t ra_size = ra_e - d_e - 1; | |
2796 | char *save_ra = xmalloc (ra_size); | |
2797 | ||
2798 | /* Copy RA. */ | |
2799 | memcpy (save_ra, d_e + 1, ra_size); | |
2800 | /* Shuffle D to make room for RA, copying the comma too. */ | |
2801 | memmove (rt_e + ra_size + 1, rt_e, d_e - rt_e); | |
2802 | /* Erase the trailing ')', keeping any rubbish for potential errors. */ | |
2803 | memmove (ra_e, ra_e + 1, strlen (ra_e)); | |
2804 | /* Write RA back. */ | |
2805 | memcpy (rt_e + 1, save_ra, ra_size); | |
2806 | free (save_ra); | |
2807 | } | |
2808 | ||
1b2cb8e2 CC |
2809 | /* Support @ie, etc. on constants emitted via .short, .int etc. */ |
2810 | ||
2811 | bfd_reloc_code_real_type | |
2812 | ppc_xcoff_parse_cons (expressionS *exp, unsigned int nbytes) | |
2813 | { | |
2814 | expression (exp); | |
2815 | if (nbytes >= 2 && *input_line_pointer == '@') | |
2816 | return ppc_xcoff_suffix (&input_line_pointer); | |
2817 | ||
2818 | /* There isn't any @ symbol for default TLS relocations (R_TLS). */ | |
2819 | if (exp->X_add_symbol != NULL | |
2820 | && (symbol_get_tc (exp->X_add_symbol)->symbol_class == XMC_TL | |
2821 | || symbol_get_tc (exp->X_add_symbol)->symbol_class == XMC_UL)) | |
2822 | return (ppc_obj64 ? BFD_RELOC_PPC64_TLSGD: BFD_RELOC_PPC_TLSGD); | |
2823 | ||
2824 | return BFD_RELOC_NONE; | |
2825 | } | |
2826 | ||
4a403be0 | 2827 | #endif /* OBJ_XCOFF */ |
252b5132 | 2828 | \f |
3e60bf4d | 2829 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
3b8b57a9 AM |
2830 | /* See whether a symbol is in the TOC section. */ |
2831 | ||
2832 | static int | |
2833 | ppc_is_toc_sym (symbolS *sym) | |
2834 | { | |
3e60bf4d | 2835 | #ifdef OBJ_XCOFF |
9f6e76f4 | 2836 | return (symbol_get_tc (sym)->symbol_class == XMC_TC |
4a403be0 | 2837 | || symbol_get_tc (sym)->symbol_class == XMC_TE |
9f6e76f4 | 2838 | || symbol_get_tc (sym)->symbol_class == XMC_TC0); |
f50c47f1 | 2839 | #endif |
3e60bf4d AM |
2840 | #ifdef OBJ_ELF |
2841 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2842 | if (ppc_obj64) | |
2843 | return strcmp (sname, ".toc") == 0; | |
2844 | else | |
2845 | return strcmp (sname, ".got") == 0; | |
2846 | #endif | |
2847 | } | |
2848 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
2849 | \f |
2850 | ||
dc1d03fc | 2851 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2852 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2853 | static void | |
98027b10 | 2854 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2855 | { |
2856 | unsigned int i; | |
2857 | ||
2858 | /* Check we don't already exist. */ | |
2859 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2860 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2861 | return; |
b34976b6 | 2862 | |
6a0c61b7 EZ |
2863 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2864 | { | |
2865 | if (ppc_apuinfo_num_alloc == 0) | |
2866 | { | |
2867 | ppc_apuinfo_num_alloc = 4; | |
325801bd | 2868 | ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc); |
6a0c61b7 EZ |
2869 | } |
2870 | else | |
2871 | { | |
2872 | ppc_apuinfo_num_alloc += 4; | |
325801bd TS |
2873 | ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list, |
2874 | ppc_apuinfo_num_alloc); | |
6a0c61b7 EZ |
2875 | } |
2876 | } | |
dc1d03fc | 2877 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2878 | } |
2879 | #undef APUID | |
dc1d03fc | 2880 | #endif |
6a0c61b7 | 2881 | \f |
dd7efa79 PB |
2882 | /* Various frobbings of labels and their addresses. */ |
2883 | ||
2884 | /* Symbols labelling the current insn. */ | |
2885 | struct insn_label_list | |
2886 | { | |
2887 | struct insn_label_list *next; | |
2888 | symbolS *label; | |
2889 | }; | |
2890 | ||
2891 | static struct insn_label_list *insn_labels; | |
2892 | static struct insn_label_list *free_insn_labels; | |
2893 | ||
2894 | static void | |
2895 | ppc_record_label (symbolS *sym) | |
2896 | { | |
2897 | struct insn_label_list *l; | |
2898 | ||
2899 | if (free_insn_labels == NULL) | |
2900 | l = XNEW (struct insn_label_list); | |
2901 | else | |
2902 | { | |
2903 | l = free_insn_labels; | |
2904 | free_insn_labels = l->next; | |
2905 | } | |
2906 | ||
2907 | l->label = sym; | |
2908 | l->next = insn_labels; | |
2909 | insn_labels = l; | |
2910 | } | |
2911 | ||
2912 | static void | |
2913 | ppc_clear_labels (void) | |
2914 | { | |
2915 | while (insn_labels != NULL) | |
2916 | { | |
2917 | struct insn_label_list *l = insn_labels; | |
2918 | insn_labels = l->next; | |
2919 | l->next = free_insn_labels; | |
2920 | free_insn_labels = l; | |
2921 | } | |
2922 | } | |
2923 | ||
2924 | void | |
2925 | ppc_start_line_hook (void) | |
2926 | { | |
2927 | ppc_clear_labels (); | |
2928 | } | |
2929 | ||
2930 | void | |
2931 | ppc_new_dot_label (symbolS *sym) | |
2932 | { | |
2933 | ppc_record_label (sym); | |
2934 | #ifdef OBJ_XCOFF | |
2935 | /* Anchor this label to the current csect for relocations. */ | |
2936 | symbol_get_tc (sym)->within = ppc_current_csect; | |
2937 | #endif | |
2938 | } | |
2939 | ||
2940 | void | |
2941 | ppc_frob_label (symbolS *sym) | |
2942 | { | |
2943 | ppc_record_label (sym); | |
2944 | ||
2945 | #ifdef OBJ_XCOFF | |
2946 | /* Set the class of a label based on where it is defined. This handles | |
2947 | symbols without suffixes. Also, move the symbol so that it follows | |
2948 | the csect symbol. */ | |
2949 | if (ppc_current_csect != (symbolS *) NULL) | |
2950 | { | |
2951 | if (symbol_get_tc (sym)->symbol_class == -1) | |
2952 | symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; | |
2953 | ||
2954 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
2955 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, | |
2956 | &symbol_rootP, &symbol_lastP); | |
cd026728 | 2957 | /* Update last csect symbol. */ |
dd7efa79 | 2958 | symbol_get_tc (ppc_current_csect)->within = sym; |
cd026728 CC |
2959 | |
2960 | /* Some labels like .bs are using within differently. | |
2961 | So avoid changing it, if it's already set. */ | |
2962 | if (symbol_get_tc (sym)->within == NULL) | |
2963 | symbol_get_tc (sym)->within = ppc_current_csect; | |
dd7efa79 PB |
2964 | } |
2965 | #endif | |
2966 | ||
2967 | #ifdef OBJ_ELF | |
2968 | dwarf2_emit_label (sym); | |
2969 | #endif | |
2970 | } | |
6a0c61b7 | 2971 | |
252b5132 RH |
2972 | /* We need to keep a list of fixups. We can't simply generate them as |
2973 | we go, because that would require us to first create the frag, and | |
2974 | that would screw up references to ``.''. */ | |
2975 | ||
2976 | struct ppc_fixup | |
2977 | { | |
2978 | expressionS exp; | |
2979 | int opindex; | |
2980 | bfd_reloc_code_real_type reloc; | |
2981 | }; | |
2982 | ||
2983 | #define MAX_INSN_FIXUPS (5) | |
2984 | ||
0e2779e9 AM |
2985 | /* Return the field size operated on by RELOC, and whether it is |
2986 | pc-relative in PC_RELATIVE. */ | |
2987 | ||
2988 | static unsigned int | |
5b7c81bd | 2989 | fixup_size (bfd_reloc_code_real_type reloc, bool *pc_relative) |
0e2779e9 AM |
2990 | { |
2991 | unsigned int size = 0; | |
5b7c81bd | 2992 | bool pcrel = false; |
0e2779e9 AM |
2993 | |
2994 | switch (reloc) | |
2995 | { | |
2996 | /* This switch statement must handle all BFD_RELOC values | |
2997 | possible in instruction fixups. As is, it handles all | |
2998 | BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c, | |
fe49679d | 2999 | bfd/coff-rs6000.c and bfd/coff64-rs6000.c. |
0e2779e9 AM |
3000 | Overkill since data and marker relocs need not be handled |
3001 | here, but this way we can be sure a needed fixup reloc isn't | |
3002 | accidentally omitted. */ | |
3003 | case BFD_RELOC_PPC_EMB_MRKREF: | |
3004 | case BFD_RELOC_VTABLE_ENTRY: | |
3005 | case BFD_RELOC_VTABLE_INHERIT: | |
3006 | break; | |
3007 | ||
3008 | case BFD_RELOC_8: | |
3009 | size = 1; | |
3010 | break; | |
3011 | ||
3012 | case BFD_RELOC_16: | |
3013 | case BFD_RELOC_16_BASEREL: | |
3014 | case BFD_RELOC_16_GOTOFF: | |
3015 | case BFD_RELOC_GPREL16: | |
3016 | case BFD_RELOC_HI16: | |
3017 | case BFD_RELOC_HI16_BASEREL: | |
3018 | case BFD_RELOC_HI16_GOTOFF: | |
3019 | case BFD_RELOC_HI16_PLTOFF: | |
3020 | case BFD_RELOC_HI16_S: | |
3021 | case BFD_RELOC_HI16_S_BASEREL: | |
3022 | case BFD_RELOC_HI16_S_GOTOFF: | |
3023 | case BFD_RELOC_HI16_S_PLTOFF: | |
3024 | case BFD_RELOC_LO16: | |
3025 | case BFD_RELOC_LO16_BASEREL: | |
3026 | case BFD_RELOC_LO16_GOTOFF: | |
3027 | case BFD_RELOC_LO16_PLTOFF: | |
3028 | case BFD_RELOC_PPC64_ADDR16_DS: | |
3029 | case BFD_RELOC_PPC64_ADDR16_HIGH: | |
3030 | case BFD_RELOC_PPC64_ADDR16_HIGHA: | |
5663e321 AM |
3031 | case BFD_RELOC_PPC64_ADDR16_HIGHER34: |
3032 | case BFD_RELOC_PPC64_ADDR16_HIGHERA34: | |
3033 | case BFD_RELOC_PPC64_ADDR16_HIGHEST34: | |
3034 | case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: | |
0e2779e9 AM |
3035 | case BFD_RELOC_PPC64_ADDR16_LO_DS: |
3036 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
3037 | case BFD_RELOC_PPC64_DTPREL16_HIGH: | |
3038 | case BFD_RELOC_PPC64_DTPREL16_HIGHA: | |
3039 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
3040 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
3041 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
3042 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
3043 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
3044 | case BFD_RELOC_PPC64_GOT16_DS: | |
3045 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
3046 | case BFD_RELOC_PPC64_HIGHER: | |
3047 | case BFD_RELOC_PPC64_HIGHER_S: | |
3048 | case BFD_RELOC_PPC64_HIGHEST: | |
3049 | case BFD_RELOC_PPC64_HIGHEST_S: | |
3050 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
3051 | case BFD_RELOC_PPC64_PLTGOT16: | |
3052 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
3053 | case BFD_RELOC_PPC64_PLTGOT16_HA: | |
3054 | case BFD_RELOC_PPC64_PLTGOT16_HI: | |
3055 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
3056 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
3057 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
3058 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
3059 | case BFD_RELOC_PPC64_TOC16_DS: | |
3060 | case BFD_RELOC_PPC64_TOC16_HA: | |
3061 | case BFD_RELOC_PPC64_TOC16_HI: | |
3062 | case BFD_RELOC_PPC64_TOC16_LO: | |
3063 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
3064 | case BFD_RELOC_PPC64_TPREL16_DS: | |
3065 | case BFD_RELOC_PPC64_TPREL16_HIGH: | |
3066 | case BFD_RELOC_PPC64_TPREL16_HIGHA: | |
3067 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
3068 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
3069 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
3070 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
3071 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
3072 | #ifdef OBJ_XCOFF | |
3073 | case BFD_RELOC_PPC_BA16: | |
3074 | #endif | |
3075 | case BFD_RELOC_PPC_DTPREL16: | |
3076 | case BFD_RELOC_PPC_DTPREL16_HA: | |
3077 | case BFD_RELOC_PPC_DTPREL16_HI: | |
3078 | case BFD_RELOC_PPC_DTPREL16_LO: | |
3079 | case BFD_RELOC_PPC_EMB_NADDR16: | |
3080 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
3081 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
3082 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
3083 | case BFD_RELOC_PPC_EMB_RELSDA: | |
3084 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
3085 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
3086 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
3087 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
3088 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
3089 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
3090 | case BFD_RELOC_PPC_EMB_SDAI16: | |
3091 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
3092 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
3093 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
3094 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3095 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
3096 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
3097 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
3098 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
3099 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
3100 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
3101 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
3102 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
3103 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3104 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
3105 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
3106 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3107 | case BFD_RELOC_PPC_TOC16: | |
4a403be0 CC |
3108 | case BFD_RELOC_PPC_TOC16_HI: |
3109 | case BFD_RELOC_PPC_TOC16_LO: | |
0e2779e9 AM |
3110 | case BFD_RELOC_PPC_TPREL16: |
3111 | case BFD_RELOC_PPC_TPREL16_HA: | |
3112 | case BFD_RELOC_PPC_TPREL16_HI: | |
3113 | case BFD_RELOC_PPC_TPREL16_LO: | |
3114 | size = 2; | |
3115 | break; | |
3116 | ||
3117 | case BFD_RELOC_16_PCREL: | |
3118 | case BFD_RELOC_HI16_PCREL: | |
3119 | case BFD_RELOC_HI16_S_PCREL: | |
3120 | case BFD_RELOC_LO16_PCREL: | |
3121 | case BFD_RELOC_PPC64_REL16_HIGH: | |
3122 | case BFD_RELOC_PPC64_REL16_HIGHA: | |
3123 | case BFD_RELOC_PPC64_REL16_HIGHER: | |
5663e321 | 3124 | case BFD_RELOC_PPC64_REL16_HIGHER34: |
0e2779e9 | 3125 | case BFD_RELOC_PPC64_REL16_HIGHERA: |
5663e321 | 3126 | case BFD_RELOC_PPC64_REL16_HIGHERA34: |
0e2779e9 | 3127 | case BFD_RELOC_PPC64_REL16_HIGHEST: |
5663e321 | 3128 | case BFD_RELOC_PPC64_REL16_HIGHEST34: |
0e2779e9 | 3129 | case BFD_RELOC_PPC64_REL16_HIGHESTA: |
5663e321 | 3130 | case BFD_RELOC_PPC64_REL16_HIGHESTA34: |
0e2779e9 AM |
3131 | #ifdef OBJ_XCOFF |
3132 | case BFD_RELOC_PPC_B16: | |
3133 | #endif | |
3134 | case BFD_RELOC_PPC_VLE_REL8: | |
3135 | size = 2; | |
5b7c81bd | 3136 | pcrel = true; |
0e2779e9 AM |
3137 | break; |
3138 | ||
0e2779e9 | 3139 | case BFD_RELOC_32: |
0e2779e9 AM |
3140 | case BFD_RELOC_32_PLTOFF: |
3141 | #ifdef OBJ_XCOFF | |
3142 | case BFD_RELOC_CTOR: | |
3143 | #endif | |
3144 | case BFD_RELOC_PPC64_ENTRY: | |
3145 | case BFD_RELOC_PPC_16DX_HA: | |
3146 | #ifndef OBJ_XCOFF | |
3147 | case BFD_RELOC_PPC_BA16: | |
3148 | #endif | |
3149 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
3150 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
3151 | case BFD_RELOC_PPC_BA26: | |
3152 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
3153 | case BFD_RELOC_PPC_EMB_NADDR32: | |
3154 | case BFD_RELOC_PPC_EMB_SDA21: | |
3155 | case BFD_RELOC_PPC_TLS: | |
3156 | case BFD_RELOC_PPC_TLSGD: | |
3157 | case BFD_RELOC_PPC_TLSLD: | |
1b2cb8e2 CC |
3158 | case BFD_RELOC_PPC_TLSLE: |
3159 | case BFD_RELOC_PPC_TLSIE: | |
3160 | case BFD_RELOC_PPC_TLSM: | |
3161 | case BFD_RELOC_PPC_TLSML: | |
0e2779e9 AM |
3162 | case BFD_RELOC_PPC_VLE_HA16A: |
3163 | case BFD_RELOC_PPC_VLE_HA16D: | |
3164 | case BFD_RELOC_PPC_VLE_HI16A: | |
3165 | case BFD_RELOC_PPC_VLE_HI16D: | |
3166 | case BFD_RELOC_PPC_VLE_LO16A: | |
3167 | case BFD_RELOC_PPC_VLE_LO16D: | |
3168 | case BFD_RELOC_PPC_VLE_SDA21: | |
3169 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
3170 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3171 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
3172 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3173 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
3174 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
3175 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
c213164a | 3176 | case BFD_RELOC_PPC64_TLS_PCREL: |
0e2779e9 AM |
3177 | case BFD_RELOC_RVA: |
3178 | size = 4; | |
3179 | break; | |
3180 | ||
3181 | case BFD_RELOC_24_PLT_PCREL: | |
3182 | case BFD_RELOC_32_PCREL: | |
3183 | case BFD_RELOC_32_PLT_PCREL: | |
3184 | case BFD_RELOC_PPC64_REL24_NOTOC: | |
7aba54da | 3185 | case BFD_RELOC_PPC64_REL24_P9NOTOC: |
0e2779e9 AM |
3186 | #ifndef OBJ_XCOFF |
3187 | case BFD_RELOC_PPC_B16: | |
3188 | #endif | |
3189 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3190 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3191 | case BFD_RELOC_PPC_B26: | |
3192 | case BFD_RELOC_PPC_LOCAL24PC: | |
3193 | case BFD_RELOC_PPC_REL16DX_HA: | |
3194 | case BFD_RELOC_PPC_VLE_REL15: | |
3195 | case BFD_RELOC_PPC_VLE_REL24: | |
3196 | size = 4; | |
5b7c81bd | 3197 | pcrel = true; |
0e2779e9 AM |
3198 | break; |
3199 | ||
3200 | #ifndef OBJ_XCOFF | |
3201 | case BFD_RELOC_CTOR: | |
3202 | #endif | |
3203 | case BFD_RELOC_PPC_COPY: | |
3204 | case BFD_RELOC_PPC_DTPMOD: | |
3205 | case BFD_RELOC_PPC_DTPREL: | |
3206 | case BFD_RELOC_PPC_GLOB_DAT: | |
3207 | case BFD_RELOC_PPC_TPREL: | |
3208 | size = ppc_obj64 ? 8 : 4; | |
3209 | break; | |
3210 | ||
3211 | case BFD_RELOC_64: | |
3212 | case BFD_RELOC_64_PLTOFF: | |
3213 | case BFD_RELOC_PPC64_ADDR64_LOCAL: | |
5663e321 AM |
3214 | case BFD_RELOC_PPC64_D28: |
3215 | case BFD_RELOC_PPC64_D34: | |
3216 | case BFD_RELOC_PPC64_D34_LO: | |
3217 | case BFD_RELOC_PPC64_D34_HI30: | |
3218 | case BFD_RELOC_PPC64_D34_HA30: | |
c213164a AM |
3219 | case BFD_RELOC_PPC64_TPREL34: |
3220 | case BFD_RELOC_PPC64_DTPREL34: | |
0e2779e9 | 3221 | case BFD_RELOC_PPC64_TOC: |
1b2cb8e2 CC |
3222 | case BFD_RELOC_PPC64_TLSGD: |
3223 | case BFD_RELOC_PPC64_TLSLD: | |
3224 | case BFD_RELOC_PPC64_TLSLE: | |
3225 | case BFD_RELOC_PPC64_TLSIE: | |
3226 | case BFD_RELOC_PPC64_TLSM: | |
3227 | case BFD_RELOC_PPC64_TLSML: | |
0e2779e9 AM |
3228 | size = 8; |
3229 | break; | |
3230 | ||
3231 | case BFD_RELOC_64_PCREL: | |
3232 | case BFD_RELOC_64_PLT_PCREL: | |
5663e321 | 3233 | case BFD_RELOC_PPC64_GOT_PCREL34: |
87c69f97 AM |
3234 | case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: |
3235 | case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: | |
3236 | case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: | |
3237 | case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: | |
5663e321 AM |
3238 | case BFD_RELOC_PPC64_PCREL28: |
3239 | case BFD_RELOC_PPC64_PCREL34: | |
3240 | case BFD_RELOC_PPC64_PLT_PCREL34: | |
0e2779e9 | 3241 | size = 8; |
5b7c81bd | 3242 | pcrel = true; |
0e2779e9 AM |
3243 | break; |
3244 | ||
3245 | default: | |
3246 | abort (); | |
3247 | } | |
3248 | ||
3249 | if (ENABLE_CHECKING) | |
3250 | { | |
3251 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
3252 | if (reloc_howto != NULL | |
3253 | && (size != bfd_get_reloc_size (reloc_howto) | |
3254 | || pcrel != reloc_howto->pc_relative)) | |
3255 | { | |
3256 | as_bad (_("%s howto doesn't match size/pcrel in gas"), | |
3257 | reloc_howto->name); | |
3258 | abort (); | |
3259 | } | |
3260 | } | |
3261 | *pc_relative = pcrel; | |
3262 | return size; | |
3263 | } | |
3264 | ||
a894d76a | 3265 | #ifdef OBJ_ELF |
160eba93 AM |
3266 | /* If we have parsed a call to __tls_get_addr, parse an argument like |
3267 | (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg | |
3268 | is successfully parsed, *STR is updated past the trailing | |
3269 | parenthesis and trailing white space, and *TLS_FIX contains the | |
3270 | reloc and arg expression. */ | |
3271 | ||
3272 | static int | |
3273 | parse_tls_arg (char **str, const expressionS *exp, struct ppc_fixup *tls_fix) | |
3274 | { | |
3275 | const char *sym_name = S_GET_NAME (exp->X_add_symbol); | |
3276 | if (sym_name[0] == '.') | |
3277 | ++sym_name; | |
3278 | ||
3279 | tls_fix->reloc = BFD_RELOC_NONE; | |
9e7028aa AM |
3280 | if (strncasecmp (sym_name, "__tls_get_addr", 14) == 0 |
3281 | && (sym_name[14] == 0 | |
3282 | || strcasecmp (sym_name + 14, "_desc") == 0 | |
3283 | || strcasecmp (sym_name + 14, "_opt") == 0)) | |
160eba93 AM |
3284 | { |
3285 | char *hold = input_line_pointer; | |
3286 | input_line_pointer = *str + 1; | |
3287 | expression (&tls_fix->exp); | |
3288 | if (tls_fix->exp.X_op == O_symbol) | |
3289 | { | |
3290 | if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) | |
3291 | tls_fix->reloc = BFD_RELOC_PPC_TLSGD; | |
3292 | else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) | |
3293 | tls_fix->reloc = BFD_RELOC_PPC_TLSLD; | |
3294 | if (tls_fix->reloc != BFD_RELOC_NONE) | |
3295 | { | |
3296 | input_line_pointer += 7; | |
3297 | SKIP_WHITESPACE (); | |
3298 | *str = input_line_pointer; | |
3299 | } | |
3300 | } | |
3301 | input_line_pointer = hold; | |
3302 | } | |
3303 | return tls_fix->reloc != BFD_RELOC_NONE; | |
3304 | } | |
a894d76a | 3305 | #endif |
160eba93 | 3306 | |
252b5132 RH |
3307 | /* This routine is called for each instruction to be assembled. */ |
3308 | ||
3309 | void | |
98027b10 | 3310 | md_assemble (char *str) |
252b5132 RH |
3311 | { |
3312 | char *s; | |
3313 | const struct powerpc_opcode *opcode; | |
0f873fd5 | 3314 | uint64_t insn; |
8e5eb8e1 | 3315 | const ppc_opindex_t *opindex_ptr; |
252b5132 RH |
3316 | int need_paren; |
3317 | int next_opindex; | |
3318 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
3319 | int fc; | |
3320 | char *f; | |
a9479dc0 | 3321 | int addr_mask; |
252b5132 | 3322 | int i; |
b9c361e0 | 3323 | unsigned int insn_length; |
252b5132 RH |
3324 | |
3325 | /* Get the opcode. */ | |
3882b010 | 3326 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
3327 | ; |
3328 | if (*s != '\0') | |
3329 | *s++ = '\0'; | |
3330 | ||
3331 | /* Look up the opcode in the hash table. */ | |
629310ab | 3332 | opcode = (const struct powerpc_opcode *) str_hash_find (ppc_hash, str); |
252b5132 RH |
3333 | if (opcode == (const struct powerpc_opcode *) NULL) |
3334 | { | |
dc3ff926 | 3335 | as_bad (_("unrecognized opcode: `%s'"), str); |
dd7efa79 | 3336 | ppc_clear_labels (); |
252b5132 RH |
3337 | return; |
3338 | } | |
3339 | ||
3340 | insn = opcode->opcode; | |
86c0f617 AM |
3341 | if (!target_big_endian |
3342 | && ((insn & ~(1 << 26)) == 46u << 26 | |
3343 | || (insn & ~(0xc0 << 1)) == (31u << 26 | 533 << 1))) | |
3344 | { | |
3345 | /* lmw, stmw, lswi, lswx, stswi, stswx */ | |
3346 | as_bad (_("`%s' invalid when little-endian"), str); | |
3347 | ppc_clear_labels (); | |
3348 | return; | |
3349 | } | |
252b5132 RH |
3350 | |
3351 | str = s; | |
3882b010 | 3352 | while (ISSPACE (*str)) |
252b5132 RH |
3353 | ++str; |
3354 | ||
4a403be0 CC |
3355 | #ifdef OBJ_XCOFF |
3356 | /* AIX often generates addis instructions using "addis RT, D(RA)" | |
3357 | format instead of the classic "addis RT, RA, SI" one. | |
3358 | Restore it to the default format as it's the one encoded | |
3359 | in ppc opcodes. */ | |
3360 | if (!strcmp (opcode->name, "addis")) | |
3361 | { | |
3362 | char *rt_e = strchr (str, ','); | |
3363 | if (rt_e != NULL | |
3364 | && strchr (rt_e + 1, ',') == NULL) | |
3365 | { | |
3366 | char *d_e = strchr (rt_e + 1, '('); | |
3367 | if (d_e != NULL && d_e != rt_e + 1) | |
3368 | { | |
3369 | char *ra_e = strrchr (d_e + 1, ')'); | |
3370 | if (ra_e != NULL && ra_e != d_e + 1) | |
3371 | ppc_xcoff_fixup_addis (rt_e, d_e, ra_e); | |
3372 | } | |
3373 | } | |
3374 | } | |
3375 | #endif | |
3376 | ||
252b5132 | 3377 | /* PowerPC operands are just expressions. The only real issue is |
9cf7e568 AM |
3378 | that a few operand types are optional. If an instruction has |
3379 | multiple optional operands and one is omitted, then all optional | |
3380 | operands past the first omitted one must also be omitted. */ | |
3381 | int num_optional_operands = 0; | |
3382 | int num_optional_provided = 0; | |
252b5132 RH |
3383 | |
3384 | /* Gather the operands. */ | |
3385 | need_paren = 0; | |
3386 | next_opindex = 0; | |
3387 | fc = 0; | |
3388 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
3389 | { | |
3390 | const struct powerpc_operand *operand; | |
3391 | const char *errmsg; | |
3392 | char *hold; | |
3393 | expressionS ex; | |
3394 | char endc; | |
3395 | ||
3396 | if (next_opindex == 0) | |
3397 | operand = &powerpc_operands[*opindex_ptr]; | |
3398 | else | |
3399 | { | |
3400 | operand = &powerpc_operands[next_opindex]; | |
3401 | next_opindex = 0; | |
3402 | } | |
252b5132 RH |
3403 | errmsg = NULL; |
3404 | ||
252b5132 | 3405 | /* If this is an optional operand, and we are skipping it, just |
9cf7e568 | 3406 | insert the default value, usually a zero. */ |
252b5132 | 3407 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 |
9cf7e568 | 3408 | && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)) |
252b5132 | 3409 | { |
9cf7e568 AM |
3410 | if (num_optional_operands == 0) |
3411 | { | |
8e5eb8e1 | 3412 | const ppc_opindex_t *optr; |
9cf7e568 AM |
3413 | int total = 0; |
3414 | int provided = 0; | |
3415 | int omitted; | |
3416 | ||
3417 | s = str; | |
3418 | for (optr = opindex_ptr; *optr != 0; optr++) | |
3419 | { | |
3420 | const struct powerpc_operand *op; | |
3421 | op = &powerpc_operands[*optr]; | |
3422 | ||
3423 | ++total; | |
3424 | ||
3425 | if ((op->flags & PPC_OPERAND_OPTIONAL) != 0 | |
3426 | && !((op->flags & PPC_OPERAND_OPTIONAL32) != 0 | |
3427 | && ppc_obj64)) | |
3428 | ++num_optional_operands; | |
3429 | ||
3430 | if (s != NULL && *s != '\0') | |
3431 | { | |
3432 | ++provided; | |
3433 | ||
3434 | /* Look for the start of the next operand. */ | |
3435 | if ((op->flags & PPC_OPERAND_PARENS) != 0) | |
3436 | s = strpbrk (s, "(,"); | |
3437 | else | |
3438 | s = strchr (s, ','); | |
3439 | ||
3440 | if (s != NULL) | |
3441 | ++s; | |
3442 | } | |
3443 | } | |
3444 | omitted = total - provided; | |
3445 | num_optional_provided = num_optional_operands - omitted; | |
3446 | } | |
3447 | if (--num_optional_provided < 0) | |
252b5132 | 3448 | { |
32d71569 AM |
3449 | uint64_t val = ppc_optional_operand_value (operand, insn, ppc_cpu, |
3450 | num_optional_provided); | |
9cf7e568 AM |
3451 | if (operand->insert) |
3452 | { | |
3453 | insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); | |
3454 | if (errmsg != (const char *) NULL) | |
3455 | as_bad ("%s", errmsg); | |
3456 | } | |
3457 | else if (operand->shift >= 0) | |
3458 | insn |= (val & operand->bitm) << operand->shift; | |
3459 | else | |
3460 | insn |= (val & operand->bitm) >> -operand->shift; | |
3461 | ||
3462 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
3463 | next_opindex = *opindex_ptr + 1; | |
3464 | continue; | |
252b5132 | 3465 | } |
252b5132 RH |
3466 | } |
3467 | ||
3468 | /* Gather the operand. */ | |
3469 | hold = input_line_pointer; | |
3470 | input_line_pointer = str; | |
00b37cc4 AM |
3471 | cr_operand = ((operand->flags & PPC_OPERAND_CR_BIT) != 0 |
3472 | || (operand->flags & PPC_OPERAND_CR_REG) != 0); | |
3473 | expression (&ex); | |
3474 | cr_operand = false; | |
252b5132 RH |
3475 | str = input_line_pointer; |
3476 | input_line_pointer = hold; | |
3477 | ||
3478 | if (ex.X_op == O_illegal) | |
3479 | as_bad (_("illegal operand")); | |
3480 | else if (ex.X_op == O_absent) | |
3481 | as_bad (_("missing operand")); | |
3482 | else if (ex.X_op == O_register) | |
3483 | { | |
7e0de605 AM |
3484 | if ((ex.X_md |
3485 | & ~operand->flags | |
3486 | & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR | |
3487 | | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG | |
79e24d0a PB |
3488 | | PPC_OPERAND_SPR | PPC_OPERAND_GQR | PPC_OPERAND_ACC |
3489 | | PPC_OPERAND_DMR)) != 0 | |
7e0de605 AM |
3490 | && !((ex.X_md & PPC_OPERAND_GPR) != 0 |
3491 | && ex.X_add_number != 0 | |
3492 | && (operand->flags & PPC_OPERAND_GPR_0) != 0)) | |
ece5dcc1 | 3493 | as_warn (_("invalid register expression")); |
4b1c0f7e | 3494 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 3495 | ppc_cpu, (char *) NULL, 0); |
252b5132 | 3496 | } |
32d71569 AM |
3497 | else if (ex.X_op == O_constant |
3498 | || (ex.X_op == O_big && ex.X_add_number > 0)) | |
252b5132 | 3499 | { |
32d71569 AM |
3500 | uint64_t val; |
3501 | if (ex.X_op == O_constant) | |
3502 | { | |
3503 | val = ex.X_add_number; | |
3504 | if (sizeof (ex.X_add_number) < sizeof (val) | |
3505 | && (ex.X_add_number < 0) != ex.X_extrabit) | |
3506 | val = val ^ ((addressT) -1 ^ (uint64_t) -1); | |
3507 | } | |
3508 | else | |
3509 | val = generic_bignum_to_int64 (); | |
252b5132 | 3510 | #ifdef OBJ_ELF |
81d4177b | 3511 | /* Allow @HA, @L, @H on constants. */ |
252b5132 | 3512 | char *orig_str = str; |
32d71569 | 3513 | bfd_reloc_code_real_type reloc = ppc_elf_suffix (&str, &ex); |
252b5132 | 3514 | |
32d71569 AM |
3515 | if (ex.X_op == O_constant) |
3516 | { | |
3517 | val = ex.X_add_number; | |
3518 | if (sizeof (ex.X_add_number) < sizeof (val) | |
3519 | && (ex.X_add_number < 0) != ex.X_extrabit) | |
3520 | val = val ^ ((addressT) -1 ^ (uint64_t) -1); | |
3521 | } | |
3522 | if (reloc != BFD_RELOC_NONE) | |
252b5132 RH |
3523 | switch (reloc) |
3524 | { | |
3525 | default: | |
3526 | str = orig_str; | |
3527 | break; | |
3528 | ||
3529 | case BFD_RELOC_LO16: | |
32d71569 | 3530 | val &= 0xffff; |
f9c6b907 | 3531 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3532 | val = SEX16 (val); |
252b5132 RH |
3533 | break; |
3534 | ||
3535 | case BFD_RELOC_HI16: | |
f9c6b907 AM |
3536 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
3537 | { | |
3538 | /* PowerPC64 @h is tested for overflow. */ | |
32d71569 | 3539 | val = val >> 16; |
f9c6b907 AM |
3540 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
3541 | { | |
32d71569 AM |
3542 | uint64_t sign = (((uint64_t) -1 >> 16) + 1) >> 1; |
3543 | val = (val ^ sign) - sign; | |
f9c6b907 AM |
3544 | } |
3545 | break; | |
3546 | } | |
2b0f3761 | 3547 | /* Fallthru */ |
f9c6b907 AM |
3548 | |
3549 | case BFD_RELOC_PPC64_ADDR16_HIGH: | |
32d71569 | 3550 | val = PPC_HI (val); |
f9c6b907 | 3551 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3552 | val = SEX16 (val); |
252b5132 RH |
3553 | break; |
3554 | ||
3555 | case BFD_RELOC_HI16_S: | |
f9c6b907 AM |
3556 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
3557 | { | |
3558 | /* PowerPC64 @ha is tested for overflow. */ | |
32d71569 | 3559 | val = (val + 0x8000) >> 16; |
f9c6b907 AM |
3560 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
3561 | { | |
32d71569 AM |
3562 | uint64_t sign = (((uint64_t) -1 >> 16) + 1) >> 1; |
3563 | val = (val ^ sign) - sign; | |
f9c6b907 AM |
3564 | } |
3565 | break; | |
3566 | } | |
2b0f3761 | 3567 | /* Fallthru */ |
f9c6b907 AM |
3568 | |
3569 | case BFD_RELOC_PPC64_ADDR16_HIGHA: | |
32d71569 | 3570 | val = PPC_HA (val); |
f9c6b907 | 3571 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3572 | val = SEX16 (val); |
0baf16f2 AM |
3573 | break; |
3574 | ||
0baf16f2 | 3575 | case BFD_RELOC_PPC64_HIGHER: |
32d71569 | 3576 | val = PPC_HIGHER (val); |
f9c6b907 | 3577 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3578 | val = SEX16 (val); |
0baf16f2 AM |
3579 | break; |
3580 | ||
3581 | case BFD_RELOC_PPC64_HIGHER_S: | |
32d71569 | 3582 | val = PPC_HIGHERA (val); |
f9c6b907 | 3583 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3584 | val = SEX16 (val); |
252b5132 | 3585 | break; |
0baf16f2 AM |
3586 | |
3587 | case BFD_RELOC_PPC64_HIGHEST: | |
32d71569 | 3588 | val = PPC_HIGHEST (val); |
f9c6b907 | 3589 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3590 | val = SEX16 (val); |
0baf16f2 AM |
3591 | break; |
3592 | ||
3593 | case BFD_RELOC_PPC64_HIGHEST_S: | |
32d71569 | 3594 | val = PPC_HIGHESTA (val); |
f9c6b907 | 3595 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) |
32d71569 | 3596 | val = SEX16 (val); |
0baf16f2 | 3597 | break; |
252b5132 | 3598 | } |
0baf16f2 | 3599 | #endif /* OBJ_ELF */ |
32d71569 | 3600 | insn = ppc_insert_operand (insn, operand, val, ppc_cpu, NULL, 0); |
252b5132 | 3601 | } |
727fc41e | 3602 | else |
252b5132 | 3603 | { |
62ebcb5c | 3604 | bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; |
3b8b57a9 | 3605 | #ifdef OBJ_ELF |
160eba93 AM |
3606 | /* Look for a __tls_get_addr arg using the insane old syntax. */ |
3607 | if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS | |
3608 | && parse_tls_arg (&str, &ex, &fixups[fc])) | |
cdba85ec | 3609 | { |
160eba93 AM |
3610 | fixups[fc].opindex = *opindex_ptr; |
3611 | ++fc; | |
252b5132 RH |
3612 | } |
3613 | ||
62ebcb5c | 3614 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) |
0baf16f2 | 3615 | { |
b9c361e0 JL |
3616 | /* If VLE-mode convert LO/HI/HA relocations. */ |
3617 | if (opcode->flags & PPC_OPCODE_VLE) | |
3618 | { | |
0f873fd5 | 3619 | uint64_t tmp_insn = insn & opcode->mask; |
3739860c | 3620 | |
08dc996f | 3621 | int use_a_reloc = (tmp_insn == E_OR2I_INSN |
b9c361e0 JL |
3622 | || tmp_insn == E_AND2I_DOT_INSN |
3623 | || tmp_insn == E_OR2IS_INSN | |
bb6bf75e | 3624 | || tmp_insn == E_LI_INSN |
b9c361e0 JL |
3625 | || tmp_insn == E_LIS_INSN |
3626 | || tmp_insn == E_AND2IS_DOT_INSN); | |
3627 | ||
3628 | ||
08dc996f | 3629 | int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN |
b9c361e0 JL |
3630 | || tmp_insn == E_ADD2IS_INSN |
3631 | || tmp_insn == E_CMP16I_INSN | |
3632 | || tmp_insn == E_MULL2I_INSN | |
3633 | || tmp_insn == E_CMPL16I_INSN | |
3634 | || tmp_insn == E_CMPH16I_INSN | |
3635 | || tmp_insn == E_CMPHL16I_INSN); | |
3636 | ||
3637 | switch (reloc) | |
3638 | { | |
3639 | default: | |
3640 | break; | |
3641 | ||
3642 | case BFD_RELOC_PPC_EMB_SDA21: | |
3643 | reloc = BFD_RELOC_PPC_VLE_SDA21; | |
3644 | break; | |
3645 | ||
3646 | case BFD_RELOC_LO16: | |
3647 | if (use_d_reloc) | |
3648 | reloc = BFD_RELOC_PPC_VLE_LO16D; | |
3649 | else if (use_a_reloc) | |
3650 | reloc = BFD_RELOC_PPC_VLE_LO16A; | |
3651 | break; | |
3652 | ||
3653 | case BFD_RELOC_HI16: | |
3654 | if (use_d_reloc) | |
3655 | reloc = BFD_RELOC_PPC_VLE_HI16D; | |
3656 | else if (use_a_reloc) | |
3657 | reloc = BFD_RELOC_PPC_VLE_HI16A; | |
3658 | break; | |
3739860c | 3659 | |
b9c361e0 JL |
3660 | case BFD_RELOC_HI16_S: |
3661 | if (use_d_reloc) | |
3662 | reloc = BFD_RELOC_PPC_VLE_HA16D; | |
3663 | else if (use_a_reloc) | |
3664 | reloc = BFD_RELOC_PPC_VLE_HA16A; | |
3665 | break; | |
3666 | ||
3667 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
3668 | if (use_d_reloc) | |
3669 | reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; | |
3670 | break; | |
3671 | ||
3672 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3673 | if (use_d_reloc) | |
3674 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; | |
3675 | break; | |
3676 | ||
3677 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3678 | if (use_d_reloc) | |
3679 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; | |
3680 | break; | |
3681 | } | |
3682 | } | |
bb6bf75e AM |
3683 | |
3684 | /* TLS and other tweaks. */ | |
3685 | switch (reloc) | |
3686 | { | |
3687 | default: | |
3688 | break; | |
3689 | ||
3690 | case BFD_RELOC_PPC_TLS: | |
c213164a | 3691 | case BFD_RELOC_PPC64_TLS_PCREL: |
bb6bf75e AM |
3692 | if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) |
3693 | as_bad (_("@tls may not be used with \"%s\" operands"), | |
3694 | opcode->name); | |
3695 | else if (operand->shift != 11) | |
3696 | as_bad (_("@tls may only be used in last operand")); | |
3697 | else | |
3698 | insn = ppc_insert_operand (insn, operand, | |
3699 | ppc_obj64 ? 13 : 2, | |
3700 | ppc_cpu, (char *) NULL, 0); | |
3701 | break; | |
3702 | ||
3703 | /* We'll only use the 32 (or 64) bit form of these relocations | |
c213164a | 3704 | in constants. Instructions get the 16 or 34 bit form. */ |
bb6bf75e | 3705 | case BFD_RELOC_PPC_DTPREL: |
c213164a AM |
3706 | if (operand->bitm == 0x3ffffffffULL) |
3707 | reloc = BFD_RELOC_PPC64_DTPREL34; | |
3708 | else | |
3709 | reloc = BFD_RELOC_PPC_DTPREL16; | |
bb6bf75e AM |
3710 | break; |
3711 | ||
3712 | case BFD_RELOC_PPC_TPREL: | |
c213164a AM |
3713 | if (operand->bitm == 0x3ffffffffULL) |
3714 | reloc = BFD_RELOC_PPC64_TPREL34; | |
3715 | else | |
3716 | reloc = BFD_RELOC_PPC_TPREL16; | |
bb6bf75e AM |
3717 | break; |
3718 | ||
5663e321 AM |
3719 | case BFD_RELOC_PPC64_PCREL34: |
3720 | if (operand->bitm == 0xfffffffULL) | |
3721 | { | |
3722 | reloc = BFD_RELOC_PPC64_PCREL28; | |
3723 | break; | |
3724 | } | |
3725 | /* Fall through. */ | |
3726 | case BFD_RELOC_PPC64_GOT_PCREL34: | |
3727 | case BFD_RELOC_PPC64_PLT_PCREL34: | |
87c69f97 AM |
3728 | case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: |
3729 | case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: | |
3730 | case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: | |
3731 | case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: | |
5663e321 | 3732 | if (operand->bitm != 0x3ffffffffULL |
bb6bf75e | 3733 | || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
5663e321 AM |
3734 | as_warn (_("%s unsupported on this instruction"), "@pcrel"); |
3735 | break; | |
3736 | ||
3737 | case BFD_RELOC_LO16: | |
3738 | if (operand->bitm == 0x3ffffffffULL | |
3739 | && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) | |
3740 | reloc = BFD_RELOC_PPC64_D34_LO; | |
3741 | else if ((operand->bitm | 0xf) != 0xffff | |
3742 | || operand->shift != 0 | |
3743 | || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) | |
bb6bf75e AM |
3744 | as_warn (_("%s unsupported on this instruction"), "@l"); |
3745 | break; | |
3746 | ||
3747 | case BFD_RELOC_HI16: | |
5663e321 AM |
3748 | if (operand->bitm == 0x3ffffffffULL |
3749 | && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) | |
3750 | reloc = BFD_RELOC_PPC64_D34_HI30; | |
3751 | else if (operand->bitm != 0xffff | |
3752 | || operand->shift != 0 | |
3753 | || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) | |
bb6bf75e AM |
3754 | as_warn (_("%s unsupported on this instruction"), "@h"); |
3755 | break; | |
3756 | ||
3757 | case BFD_RELOC_HI16_S: | |
5663e321 AM |
3758 | if (operand->bitm == 0x3ffffffffULL |
3759 | && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) | |
3760 | reloc = BFD_RELOC_PPC64_D34_HA30; | |
3761 | else if (operand->bitm == 0xffff | |
3762 | && operand->shift == (int) PPC_OPSHIFT_INV | |
3763 | && opcode->opcode == (19 << 26) + (2 << 1)) | |
bb6bf75e AM |
3764 | /* addpcis. */ |
3765 | reloc = BFD_RELOC_PPC_16DX_HA; | |
3766 | else if (operand->bitm != 0xffff | |
3767 | || operand->shift != 0 | |
3768 | || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) | |
3769 | as_warn (_("%s unsupported on this instruction"), "@ha"); | |
3770 | } | |
0baf16f2 | 3771 | } |
3b8b57a9 | 3772 | #endif /* OBJ_ELF */ |
4a403be0 CC |
3773 | #ifdef OBJ_XCOFF |
3774 | reloc = ppc_xcoff_suffix (&str); | |
3775 | #endif /* OBJ_XCOFF */ | |
3b8b57a9 | 3776 | |
62ebcb5c | 3777 | if (reloc != BFD_RELOC_NONE) |
3b8b57a9 AM |
3778 | ; |
3779 | /* Determine a BFD reloc value based on the operand information. | |
3780 | We are only prepared to turn a few of the operands into | |
3781 | relocs. */ | |
a0593ad9 AM |
3782 | else if ((operand->flags & (PPC_OPERAND_RELATIVE |
3783 | | PPC_OPERAND_ABSOLUTE)) != 0 | |
3b8b57a9 AM |
3784 | && operand->bitm == 0x3fffffc |
3785 | && operand->shift == 0) | |
3786 | reloc = BFD_RELOC_PPC_B26; | |
a0593ad9 AM |
3787 | else if ((operand->flags & (PPC_OPERAND_RELATIVE |
3788 | | PPC_OPERAND_ABSOLUTE)) != 0 | |
3b8b57a9 AM |
3789 | && operand->bitm == 0xfffc |
3790 | && operand->shift == 0) | |
3791 | reloc = BFD_RELOC_PPC_B16; | |
3792 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3793 | && operand->bitm == 0x1fe | |
3794 | && operand->shift == -1) | |
3795 | reloc = BFD_RELOC_PPC_VLE_REL8; | |
3796 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3797 | && operand->bitm == 0xfffe | |
3798 | && operand->shift == 0) | |
3799 | reloc = BFD_RELOC_PPC_VLE_REL15; | |
3800 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3801 | && operand->bitm == 0x1fffffe | |
3802 | && operand->shift == 0) | |
3803 | reloc = BFD_RELOC_PPC_VLE_REL24; | |
a0593ad9 | 3804 | else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 |
3b8b57a9 AM |
3805 | && (operand->bitm & 0xfff0) == 0xfff0 |
3806 | && operand->shift == 0) | |
3807 | { | |
f50c47f1 | 3808 | reloc = BFD_RELOC_16; |
3e60bf4d | 3809 | #if defined OBJ_XCOFF || defined OBJ_ELF |
f50c47f1 | 3810 | /* Note: the symbol may be not yet defined. */ |
a0593ad9 AM |
3811 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
3812 | && ppc_is_toc_sym (ex.X_add_symbol)) | |
3e60bf4d AM |
3813 | { |
3814 | reloc = BFD_RELOC_PPC_TOC16; | |
3815 | #ifdef OBJ_ELF | |
3816 | as_warn (_("assuming %s on symbol"), | |
3817 | ppc_obj64 ? "@toc" : "@xgot"); | |
3818 | #endif | |
3819 | } | |
3b8b57a9 | 3820 | #endif |
3b8b57a9 | 3821 | } |
5663e321 AM |
3822 | else if (operand->bitm == 0x3ffffffffULL) |
3823 | reloc = BFD_RELOC_PPC64_D34; | |
3824 | else if (operand->bitm == 0xfffffffULL) | |
3825 | reloc = BFD_RELOC_PPC64_D28; | |
a0593ad9 AM |
3826 | |
3827 | /* For the absolute forms of branches, convert the PC | |
3828 | relative form back into the absolute. */ | |
3829 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) | |
3830 | { | |
3831 | switch (reloc) | |
3832 | { | |
3833 | case BFD_RELOC_PPC_B26: | |
3834 | reloc = BFD_RELOC_PPC_BA26; | |
3835 | break; | |
3836 | case BFD_RELOC_PPC_B16: | |
3837 | reloc = BFD_RELOC_PPC_BA16; | |
3838 | break; | |
3839 | #ifdef OBJ_ELF | |
3840 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3841 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
3842 | break; | |
3843 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3844 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
3845 | break; | |
3846 | #endif | |
3847 | default: | |
3848 | break; | |
3849 | } | |
3850 | } | |
3851 | ||
3852 | #ifdef OBJ_ELF | |
3853 | switch (reloc) | |
3854 | { | |
3855 | case BFD_RELOC_PPC_TOC16: | |
3856 | toc_reloc_types |= has_small_toc_reloc; | |
3857 | break; | |
3858 | case BFD_RELOC_PPC64_TOC16_LO: | |
3859 | case BFD_RELOC_PPC64_TOC16_HI: | |
3860 | case BFD_RELOC_PPC64_TOC16_HA: | |
3861 | toc_reloc_types |= has_large_toc_reloc; | |
3862 | break; | |
3863 | default: | |
3864 | break; | |
3865 | } | |
3866 | ||
3867 | if (ppc_obj64 | |
3868 | && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) | |
3869 | { | |
3870 | switch (reloc) | |
3871 | { | |
3872 | case BFD_RELOC_16: | |
3873 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3874 | break; | |
5663e321 | 3875 | |
a0593ad9 AM |
3876 | case BFD_RELOC_LO16: |
3877 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
3878 | break; | |
5663e321 | 3879 | |
a0593ad9 AM |
3880 | case BFD_RELOC_16_GOTOFF: |
3881 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
3882 | break; | |
5663e321 | 3883 | |
a0593ad9 AM |
3884 | case BFD_RELOC_LO16_GOTOFF: |
3885 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
3886 | break; | |
5663e321 | 3887 | |
a0593ad9 AM |
3888 | case BFD_RELOC_LO16_PLTOFF: |
3889 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
3890 | break; | |
5663e321 | 3891 | |
a0593ad9 AM |
3892 | case BFD_RELOC_16_BASEREL: |
3893 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; | |
3894 | break; | |
5663e321 | 3895 | |
a0593ad9 AM |
3896 | case BFD_RELOC_LO16_BASEREL: |
3897 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
3898 | break; | |
5663e321 | 3899 | |
a0593ad9 AM |
3900 | case BFD_RELOC_PPC_TOC16: |
3901 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3902 | break; | |
5663e321 | 3903 | |
a0593ad9 AM |
3904 | case BFD_RELOC_PPC64_TOC16_LO: |
3905 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
3906 | break; | |
5663e321 | 3907 | |
a0593ad9 AM |
3908 | case BFD_RELOC_PPC64_PLTGOT16: |
3909 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
3910 | break; | |
5663e321 | 3911 | |
a0593ad9 AM |
3912 | case BFD_RELOC_PPC64_PLTGOT16_LO: |
3913 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
3914 | break; | |
5663e321 | 3915 | |
a0593ad9 AM |
3916 | case BFD_RELOC_PPC_DTPREL16: |
3917 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
3918 | break; | |
5663e321 | 3919 | |
a0593ad9 AM |
3920 | case BFD_RELOC_PPC_DTPREL16_LO: |
3921 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
3922 | break; | |
5663e321 | 3923 | |
a0593ad9 AM |
3924 | case BFD_RELOC_PPC_TPREL16: |
3925 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
3926 | break; | |
5663e321 | 3927 | |
a0593ad9 AM |
3928 | case BFD_RELOC_PPC_TPREL16_LO: |
3929 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
3930 | break; | |
5663e321 | 3931 | |
a0593ad9 AM |
3932 | case BFD_RELOC_PPC_GOT_DTPREL16: |
3933 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3934 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3935 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3936 | break; | |
5663e321 | 3937 | |
a0593ad9 AM |
3938 | default: |
3939 | as_bad (_("unsupported relocation for DS offset field")); | |
3940 | break; | |
3941 | } | |
3942 | } | |
160eba93 AM |
3943 | |
3944 | /* Look for a __tls_get_addr arg after any __tls_get_addr | |
3945 | modifiers like @plt. This fixup must be emitted before | |
3946 | the usual call fixup. */ | |
3947 | if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS | |
3948 | && parse_tls_arg (&str, &ex, &fixups[fc])) | |
3949 | { | |
3950 | fixups[fc].opindex = *opindex_ptr; | |
3951 | ++fc; | |
3952 | } | |
a0593ad9 | 3953 | #endif |
0baf16f2 | 3954 | |
252b5132 RH |
3955 | /* We need to generate a fixup for this expression. */ |
3956 | if (fc >= MAX_INSN_FIXUPS) | |
3957 | as_fatal (_("too many fixups")); | |
3958 | fixups[fc].exp = ex; | |
727fc41e | 3959 | fixups[fc].opindex = *opindex_ptr; |
252b5132 RH |
3960 | fixups[fc].reloc = reloc; |
3961 | ++fc; | |
3962 | } | |
252b5132 RH |
3963 | |
3964 | if (need_paren) | |
3965 | { | |
3966 | endc = ')'; | |
3967 | need_paren = 0; | |
c3d65c1c BE |
3968 | /* If expecting more operands, then we want to see "),". */ |
3969 | if (*str == endc && opindex_ptr[1] != 0) | |
3970 | { | |
3971 | do | |
3972 | ++str; | |
3973 | while (ISSPACE (*str)); | |
3974 | endc = ','; | |
3975 | } | |
252b5132 RH |
3976 | } |
3977 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
9cf7e568 | 3978 | endc = '('; |
252b5132 RH |
3979 | else |
3980 | endc = ','; | |
3981 | ||
3982 | /* The call to expression should have advanced str past any | |
3983 | whitespace. */ | |
9cf7e568 | 3984 | if (*str == endc) |
252b5132 | 3985 | { |
9cf7e568 AM |
3986 | ++str; |
3987 | if (endc == '(') | |
3988 | need_paren = 1; | |
3989 | } | |
3990 | else if (*str != '\0') | |
3991 | { | |
3992 | as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); | |
3993 | break; | |
3994 | } | |
3995 | else if (endc == ')') | |
3996 | { | |
3997 | as_bad (_("syntax error; end of line, expected `%c'"), endc); | |
252b5132 RH |
3998 | break; |
3999 | } | |
252b5132 RH |
4000 | } |
4001 | ||
3882b010 | 4002 | while (ISSPACE (*str)) |
252b5132 RH |
4003 | ++str; |
4004 | ||
4005 | if (*str != '\0') | |
4006 | as_bad (_("junk at end of line: `%s'"), str); | |
4007 | ||
dc1d03fc | 4008 | #ifdef OBJ_ELF |
b9c361e0 | 4009 | /* Do we need/want an APUinfo section? */ |
4faf939a JM |
4010 | if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 |
4011 | && !ppc_obj64) | |
6a0c61b7 EZ |
4012 | { |
4013 | /* These are all version "1". */ | |
4014 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 4015 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 4016 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 4017 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 4018 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 4019 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 4020 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 4021 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 4022 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 4023 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 4024 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 4025 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 4026 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 4027 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
fbd94057 MR |
4028 | /* Only set the VLE flag if the instruction has been pulled via |
4029 | the VLE instruction set. This way the flag is guaranteed to | |
4030 | be set for VLE-only instructions or for VLE-only processors, | |
4031 | however it'll remain clear for dual-mode instructions on | |
4032 | dual-mode and, more importantly, standard-mode processors. */ | |
45685a2f | 4033 | if (ppc_cpu & opcode->flags & PPC_OPCODE_VLE) |
f7d69005 AM |
4034 | { |
4035 | ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); | |
4036 | if (elf_section_data (now_seg) != NULL) | |
4037 | elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE; | |
4038 | } | |
6a0c61b7 | 4039 | } |
dc1d03fc | 4040 | #endif |
6a0c61b7 | 4041 | |
252b5132 | 4042 | /* Write out the instruction. */ |
a9479dc0 AM |
4043 | |
4044 | addr_mask = 3; | |
f7d69005 | 4045 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
a9479dc0 AM |
4046 | /* All instructions can start on a 2 byte boundary for VLE. */ |
4047 | addr_mask = 1; | |
4048 | ||
4049 | if (frag_now->insn_addr != addr_mask) | |
b9c361e0 | 4050 | { |
a9479dc0 AM |
4051 | /* Don't emit instructions to a frag started for data, or for a |
4052 | CPU differing in VLE mode. Data is allowed to be misaligned, | |
4053 | and it's possible to start a new frag in the middle of | |
4054 | misaligned data. */ | |
4055 | frag_wane (frag_now); | |
4056 | frag_new (0); | |
b9c361e0 | 4057 | } |
a9479dc0 AM |
4058 | |
4059 | /* Check that insns within the frag are aligned. ppc_frag_check | |
4060 | will ensure that the frag start address is aligned. */ | |
4061 | if ((frag_now_fix () & addr_mask) != 0) | |
4062 | as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1); | |
4063 | ||
dd7efa79 | 4064 | /* Differentiate between two, four, and eight byte insns. */ |
a9479dc0 AM |
4065 | insn_length = 4; |
4066 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn)) | |
4067 | insn_length = 2; | |
bb98553c | 4068 | else if (PPC_PREFIX_P (insn)) |
dd7efa79 PB |
4069 | { |
4070 | struct insn_label_list *l; | |
4071 | ||
4072 | insn_length = 8; | |
4073 | ||
4074 | /* 8-byte prefix instructions are not allowed to cross 64-byte | |
4075 | boundaries. */ | |
4076 | frag_align_code (6, 4); | |
4077 | record_alignment (now_seg, 6); | |
1daf786b CC |
4078 | #ifdef OBJ_XCOFF |
4079 | /* Update alignment of the containing csect. */ | |
4080 | if (symbol_get_tc (ppc_current_csect)->align < 6) | |
4081 | symbol_get_tc (ppc_current_csect)->align = 6; | |
4082 | #endif | |
dd7efa79 PB |
4083 | |
4084 | /* Update "dot" in any expressions used by this instruction, and | |
4085 | a label attached to the instruction. By "attached" we mean | |
4086 | on the same source line as the instruction and without any | |
4087 | intervening semicolons. */ | |
4088 | dot_value = frag_now_fix (); | |
4089 | dot_frag = frag_now; | |
4090 | for (l = insn_labels; l != NULL; l = l->next) | |
4091 | { | |
4092 | symbol_set_frag (l->label, dot_frag); | |
4093 | S_SET_VALUE (l->label, dot_value); | |
4094 | } | |
4095 | } | |
4096 | ||
4097 | ppc_clear_labels (); | |
a9479dc0 | 4098 | |
b9c361e0 | 4099 | f = frag_more (insn_length); |
a9479dc0 | 4100 | frag_now->insn_addr = addr_mask; |
dd7efa79 PB |
4101 | |
4102 | /* The prefix part of an 8-byte instruction always occupies the lower | |
4103 | addressed word in a doubleword, regardless of endianness. */ | |
15a32af5 AM |
4104 | if (insn_length == 8 |
4105 | && (sizeof (insn) > sizeof (valueT) || !target_big_endian)) | |
dd7efa79 PB |
4106 | { |
4107 | md_number_to_chars (f, PPC_GET_PREFIX (insn), 4); | |
4108 | md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4); | |
4109 | } | |
4110 | else | |
4111 | md_number_to_chars (f, insn, insn_length); | |
4112 | ||
bf7279d5 AM |
4113 | last_insn = insn; |
4114 | last_seg = now_seg; | |
4115 | last_subseg = now_subseg; | |
252b5132 | 4116 | |
5d6f4f16 | 4117 | #ifdef OBJ_ELF |
b9c361e0 | 4118 | dwarf2_emit_insn (insn_length); |
5d6f4f16 GK |
4119 | #endif |
4120 | ||
3b8b57a9 | 4121 | /* Create any fixups. */ |
252b5132 RH |
4122 | for (i = 0; i < fc; i++) |
4123 | { | |
3b8b57a9 | 4124 | fixS *fixP; |
62ebcb5c | 4125 | if (fixups[i].reloc != BFD_RELOC_NONE) |
252b5132 | 4126 | { |
5b7c81bd | 4127 | bool pcrel; |
0e2779e9 AM |
4128 | unsigned int size = fixup_size (fixups[i].reloc, &pcrel); |
4129 | int offset = target_big_endian ? (insn_length - size) : 0; | |
252b5132 | 4130 | |
99a814a1 AM |
4131 | fixP = fix_new_exp (frag_now, |
4132 | f - frag_now->fr_literal + offset, | |
4133 | size, | |
4134 | &fixups[i].exp, | |
0e2779e9 | 4135 | pcrel, |
252b5132 | 4136 | fixups[i].reloc); |
252b5132 RH |
4137 | } |
4138 | else | |
727fc41e AM |
4139 | { |
4140 | const struct powerpc_operand *operand; | |
4141 | ||
4142 | operand = &powerpc_operands[fixups[i].opindex]; | |
3b8b57a9 AM |
4143 | fixP = fix_new_exp (frag_now, |
4144 | f - frag_now->fr_literal, | |
4145 | insn_length, | |
4146 | &fixups[i].exp, | |
4147 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
62ebcb5c | 4148 | BFD_RELOC_NONE); |
727fc41e | 4149 | } |
3b8b57a9 | 4150 | fixP->fx_pcrel_adjust = fixups[i].opindex; |
252b5132 RH |
4151 | } |
4152 | } | |
252b5132 RH |
4153 | \f |
4154 | #ifdef OBJ_ELF | |
18ae9cc1 | 4155 | /* For ELF, add support for SHT_ORDERED. */ |
252b5132 RH |
4156 | |
4157 | int | |
98027b10 | 4158 | ppc_section_type (char *str, size_t len) |
252b5132 | 4159 | { |
d34049e8 | 4160 | if (len == 7 && startswith (str, "ordered")) |
9de8d8f1 | 4161 | return SHT_ORDERED; |
252b5132 | 4162 | |
9de8d8f1 | 4163 | return -1; |
252b5132 RH |
4164 | } |
4165 | ||
4166 | int | |
1239de13 | 4167 | ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) |
252b5132 RH |
4168 | { |
4169 | if (type == SHT_ORDERED) | |
4170 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
4171 | ||
252b5132 RH |
4172 | return flags; |
4173 | } | |
83eef883 AFB |
4174 | |
4175 | bfd_vma | |
4176 | ppc_elf_section_letter (int letter, const char **ptrmsg) | |
4177 | { | |
4178 | if (letter == 'v') | |
4179 | return SHF_PPC_VLE; | |
4180 | ||
4181 | *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string"); | |
4182 | return -1; | |
4183 | } | |
252b5132 RH |
4184 | #endif /* OBJ_ELF */ |
4185 | ||
4186 | \f | |
4187 | /* Pseudo-op handling. */ | |
4188 | ||
4189 | /* The .byte pseudo-op. This is similar to the normal .byte | |
4190 | pseudo-op, but it can also take a single ASCII string. */ | |
4191 | ||
4192 | static void | |
98027b10 | 4193 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4194 | { |
bf7279d5 AM |
4195 | int count = 0; |
4196 | ||
252b5132 RH |
4197 | if (*input_line_pointer != '\"') |
4198 | { | |
4199 | cons (1); | |
4200 | return; | |
4201 | } | |
4202 | ||
4203 | /* Gather characters. A real double quote is doubled. Unusual | |
4204 | characters are not permitted. */ | |
4205 | ++input_line_pointer; | |
4206 | while (1) | |
4207 | { | |
4208 | char c; | |
4209 | ||
4210 | c = *input_line_pointer++; | |
4211 | ||
4212 | if (c == '\"') | |
4213 | { | |
4214 | if (*input_line_pointer != '\"') | |
4215 | break; | |
4216 | ++input_line_pointer; | |
4217 | } | |
4218 | ||
4219 | FRAG_APPEND_1_CHAR (c); | |
bf7279d5 | 4220 | ++count; |
252b5132 RH |
4221 | } |
4222 | ||
bf7279d5 AM |
4223 | if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) |
4224 | as_warn (_("data in executable section")); | |
252b5132 RH |
4225 | demand_empty_rest_of_line (); |
4226 | } | |
4227 | \f | |
4228 | #ifdef OBJ_XCOFF | |
4229 | ||
4230 | /* XCOFF specific pseudo-op handling. */ | |
4231 | ||
4232 | /* This is set if we are creating a .stabx symbol, since we don't want | |
4233 | to handle symbol suffixes for such symbols. */ | |
5b7c81bd | 4234 | static bool ppc_stab_symbol; |
252b5132 | 4235 | |
add588a8 CC |
4236 | /* Retrieve the visiblity input for pseudo-ops having ones. */ |
4237 | static unsigned short | |
4238 | ppc_xcoff_get_visibility (void) { | |
4239 | SKIP_WHITESPACE(); | |
4240 | ||
4241 | if (startswith (input_line_pointer, "exported")) | |
4242 | { | |
4243 | input_line_pointer += 8; | |
4244 | return SYM_V_EXPORTED; | |
4245 | } | |
4246 | ||
4247 | if (startswith (input_line_pointer, "hidden")) | |
4248 | { | |
4249 | input_line_pointer += 6; | |
4250 | return SYM_V_HIDDEN; | |
4251 | } | |
4252 | ||
4253 | if (startswith (input_line_pointer, "internal")) | |
4254 | { | |
4255 | input_line_pointer += 8; | |
4256 | return SYM_V_INTERNAL; | |
4257 | } | |
4258 | ||
4259 | if (startswith (input_line_pointer, "protected")) | |
4260 | { | |
4261 | input_line_pointer += 9; | |
4262 | return SYM_V_PROTECTED; | |
4263 | } | |
4264 | ||
4265 | return 0; | |
4266 | } | |
4267 | ||
09d4578f CC |
4268 | /* Retrieve visiblity using GNU syntax. */ |
4269 | static void ppc_GNU_visibility (int visibility) { | |
4270 | int c; | |
4271 | char *name; | |
4272 | symbolS *symbolP; | |
4273 | coff_symbol_type *coffsym; | |
4274 | ||
4275 | do | |
4276 | { | |
4277 | if ((name = read_symbol_name ()) == NULL) | |
4278 | break; | |
4279 | symbolP = symbol_find_or_make (name); | |
9f6e5897 | 4280 | free (name); |
09d4578f CC |
4281 | coffsym = coffsymbol (symbol_get_bfdsym (symbolP)); |
4282 | ||
4283 | coffsym->native->u.syment.n_type &= ~SYM_V_MASK; | |
4284 | coffsym->native->u.syment.n_type |= visibility; | |
4285 | ||
4286 | c = *input_line_pointer; | |
4287 | if (c == ',') | |
4288 | { | |
4289 | input_line_pointer ++; | |
4290 | ||
4291 | SKIP_WHITESPACE (); | |
4292 | ||
4293 | if (*input_line_pointer == '\n') | |
4294 | c = '\n'; | |
4295 | } | |
4296 | } | |
4297 | while (c == ','); | |
4298 | ||
4299 | demand_empty_rest_of_line (); | |
4300 | } | |
add588a8 | 4301 | |
252b5132 RH |
4302 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common |
4303 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 4304 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1b2cb8e2 CC |
4305 | aligns .comm and .lcomm to 4 bytes. |
4306 | Symbols having a XMC_UL storage class are uninialized thread-local | |
4307 | data. */ | |
252b5132 RH |
4308 | |
4309 | static void | |
98027b10 | 4310 | ppc_comm (int lcomm) |
252b5132 RH |
4311 | { |
4312 | asection *current_seg = now_seg; | |
4313 | subsegT current_subseg = now_subseg; | |
4314 | char *name; | |
4315 | char endc; | |
4316 | char *end_name; | |
4317 | offsetT size; | |
4318 | offsetT align; | |
4319 | symbolS *lcomm_sym = NULL; | |
4320 | symbolS *sym; | |
4321 | char *pfrag; | |
1ffce3f8 | 4322 | unsigned short visibility = 0; |
1b2cb8e2 | 4323 | struct ppc_xcoff_section *section; |
252b5132 | 4324 | |
d02603dc | 4325 | endc = get_symbol_name (&name); |
252b5132 | 4326 | end_name = input_line_pointer; |
d02603dc | 4327 | (void) restore_line_pointer (endc); |
252b5132 RH |
4328 | |
4329 | if (*input_line_pointer != ',') | |
4330 | { | |
4331 | as_bad (_("missing size")); | |
4332 | ignore_rest_of_line (); | |
4333 | return; | |
4334 | } | |
4335 | ++input_line_pointer; | |
4336 | ||
4337 | size = get_absolute_expression (); | |
4338 | if (size < 0) | |
4339 | { | |
4340 | as_bad (_("negative size")); | |
4341 | ignore_rest_of_line (); | |
4342 | return; | |
4343 | } | |
4344 | ||
4345 | if (! lcomm) | |
4346 | { | |
4347 | /* The third argument to .comm is the alignment. */ | |
4348 | if (*input_line_pointer != ',') | |
1ad63b2f | 4349 | align = 2; |
252b5132 RH |
4350 | else |
4351 | { | |
4352 | ++input_line_pointer; | |
4353 | align = get_absolute_expression (); | |
4354 | if (align <= 0) | |
4355 | { | |
4356 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 4357 | align = 2; |
252b5132 | 4358 | } |
add588a8 CC |
4359 | |
4360 | /* The fourth argument to .comm is the visibility. */ | |
4361 | if (*input_line_pointer == ',') | |
4362 | { | |
4363 | input_line_pointer++; | |
4364 | visibility = ppc_xcoff_get_visibility (); | |
4365 | if (!visibility) | |
4366 | { | |
4367 | as_bad (_("Unknown visibility field in .comm")); | |
4368 | ignore_rest_of_line (); | |
4369 | return; | |
4370 | } | |
4371 | } | |
252b5132 RH |
4372 | } |
4373 | } | |
4374 | else | |
4375 | { | |
4376 | char *lcomm_name; | |
4377 | char lcomm_endc; | |
4378 | ||
252b5132 RH |
4379 | /* The third argument to .lcomm appears to be the real local |
4380 | common symbol to create. References to the symbol named in | |
4381 | the first argument are turned into references to the third | |
4382 | argument. */ | |
4383 | if (*input_line_pointer != ',') | |
4384 | { | |
4385 | as_bad (_("missing real symbol name")); | |
4386 | ignore_rest_of_line (); | |
4387 | return; | |
4388 | } | |
4389 | ++input_line_pointer; | |
4390 | ||
d02603dc | 4391 | lcomm_endc = get_symbol_name (&lcomm_name); |
81d4177b | 4392 | |
252b5132 RH |
4393 | lcomm_sym = symbol_find_or_make (lcomm_name); |
4394 | ||
d02603dc | 4395 | (void) restore_line_pointer (lcomm_endc); |
3c02c47f DE |
4396 | |
4397 | /* The fourth argument to .lcomm is the alignment. */ | |
4398 | if (*input_line_pointer != ',') | |
4399 | { | |
4400 | if (size <= 4) | |
4401 | align = 2; | |
4402 | else | |
4403 | align = 3; | |
4404 | } | |
4405 | else | |
4406 | { | |
4407 | ++input_line_pointer; | |
4408 | align = get_absolute_expression (); | |
4409 | if (align <= 0) | |
4410 | { | |
4411 | as_warn (_("ignoring bad alignment")); | |
4412 | align = 2; | |
4413 | } | |
4414 | } | |
252b5132 RH |
4415 | } |
4416 | ||
4417 | *end_name = '\0'; | |
4418 | sym = symbol_find_or_make (name); | |
4419 | *end_name = endc; | |
4420 | ||
4421 | if (S_IS_DEFINED (sym) | |
4422 | || S_GET_VALUE (sym) != 0) | |
4423 | { | |
4424 | as_bad (_("attempt to redefine symbol")); | |
4425 | ignore_rest_of_line (); | |
4426 | return; | |
4427 | } | |
81d4177b | 4428 | |
1b2cb8e2 CC |
4429 | if (symbol_get_tc (sym)->symbol_class == XMC_UL |
4430 | || (lcomm && symbol_get_tc (lcomm_sym)->symbol_class == XMC_UL)) | |
4431 | { | |
4432 | section = &ppc_xcoff_tbss_section; | |
4433 | if (!ppc_xcoff_section_is_initialized (section)) | |
4434 | { | |
934cb849 | 4435 | ppc_init_xcoff_section (section, subseg_new (".tbss", 0)); |
1b2cb8e2 CC |
4436 | bfd_set_section_flags (section->segment, |
4437 | SEC_ALLOC | SEC_THREAD_LOCAL); | |
4438 | seg_info (section->segment)->bss = 1; | |
4439 | } | |
4440 | } | |
4441 | else | |
4442 | section = &ppc_xcoff_bss_section; | |
4443 | ||
4444 | record_alignment (section->segment, align); | |
81d4177b | 4445 | |
252b5132 RH |
4446 | if (! lcomm |
4447 | || ! S_IS_DEFINED (lcomm_sym)) | |
4448 | { | |
4449 | symbolS *def_sym; | |
4450 | offsetT def_size; | |
4451 | ||
4452 | if (! lcomm) | |
4453 | { | |
4454 | def_sym = sym; | |
4455 | def_size = size; | |
4456 | S_SET_EXTERNAL (sym); | |
4457 | } | |
4458 | else | |
4459 | { | |
809ffe0d | 4460 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
4461 | def_sym = lcomm_sym; |
4462 | def_size = 0; | |
4463 | } | |
4464 | ||
1b2cb8e2 | 4465 | subseg_set (section->segment, 1); |
252b5132 | 4466 | frag_align (align, 0, 0); |
81d4177b | 4467 | |
809ffe0d | 4468 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
4469 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
4470 | def_size, (char *) NULL); | |
4471 | *pfrag = 0; | |
1b2cb8e2 | 4472 | S_SET_SEGMENT (def_sym, section->segment); |
809ffe0d | 4473 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
4474 | } |
4475 | else if (lcomm) | |
4476 | { | |
4477 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
4478 | symbol_get_frag (lcomm_sym)->fr_offset = |
4479 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 4480 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
4481 | if (align > symbol_get_tc (lcomm_sym)->align) |
4482 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
4483 | } |
4484 | ||
4485 | if (lcomm) | |
4486 | { | |
4487 | /* Make sym an offset from lcomm_sym. */ | |
1b2cb8e2 | 4488 | S_SET_SEGMENT (sym, section->segment); |
809ffe0d ILT |
4489 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
4490 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
4491 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
4492 | } |
4493 | ||
add588a8 CC |
4494 | if (!lcomm && visibility) |
4495 | { | |
4496 | /* Add visibility to .comm symbol. */ | |
4497 | coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); | |
4498 | coffsym->native->u.syment.n_type &= ~SYM_V_MASK; | |
4499 | coffsym->native->u.syment.n_type |= visibility; | |
4500 | } | |
4501 | ||
252b5132 RH |
4502 | subseg_set (current_seg, current_subseg); |
4503 | ||
4504 | demand_empty_rest_of_line (); | |
4505 | } | |
4506 | ||
4507 | /* The .csect pseudo-op. This switches us into a different | |
4508 | subsegment. The first argument is a symbol whose value is the | |
4509 | start of the .csect. In COFF, csect symbols get special aux | |
4510 | entries defined by the x_csect field of union internal_auxent. The | |
4511 | optional second argument is the alignment (the default is 2). */ | |
4512 | ||
4513 | static void | |
98027b10 | 4514 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4515 | { |
4516 | char *name; | |
4517 | char endc; | |
4518 | symbolS *sym; | |
931e13a6 | 4519 | offsetT align; |
252b5132 | 4520 | |
d02603dc | 4521 | endc = get_symbol_name (&name); |
81d4177b | 4522 | |
252b5132 RH |
4523 | sym = symbol_find_or_make (name); |
4524 | ||
d02603dc | 4525 | (void) restore_line_pointer (endc); |
252b5132 RH |
4526 | |
4527 | if (S_GET_NAME (sym)[0] == '\0') | |
4528 | { | |
4529 | /* An unnamed csect is assumed to be [PR]. */ | |
96d56e9f | 4530 | symbol_get_tc (sym)->symbol_class = XMC_PR; |
252b5132 RH |
4531 | } |
4532 | ||
931e13a6 | 4533 | align = 2; |
252b5132 RH |
4534 | if (*input_line_pointer == ',') |
4535 | { | |
4536 | ++input_line_pointer; | |
931e13a6 | 4537 | align = get_absolute_expression (); |
252b5132 RH |
4538 | } |
4539 | ||
931e13a6 AM |
4540 | ppc_change_csect (sym, align); |
4541 | ||
252b5132 RH |
4542 | demand_empty_rest_of_line (); |
4543 | } | |
4544 | ||
4545 | /* Change to a different csect. */ | |
4546 | ||
4547 | static void | |
98027b10 | 4548 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
4549 | { |
4550 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 4551 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
4552 | else |
4553 | { | |
1b2cb8e2 | 4554 | struct ppc_xcoff_section *section; |
252b5132 RH |
4555 | int after_toc; |
4556 | int hold_chunksize; | |
4557 | symbolS *list; | |
931e13a6 AM |
4558 | int is_code; |
4559 | segT sec; | |
252b5132 RH |
4560 | |
4561 | /* This is a new csect. We need to look at the symbol class to | |
4562 | figure out whether it should go in the text section or the | |
4563 | data section. */ | |
4564 | after_toc = 0; | |
931e13a6 | 4565 | is_code = 0; |
96d56e9f | 4566 | switch (symbol_get_tc (sym)->symbol_class) |
252b5132 RH |
4567 | { |
4568 | case XMC_PR: | |
4569 | case XMC_RO: | |
4570 | case XMC_DB: | |
4571 | case XMC_GL: | |
4572 | case XMC_XO: | |
4573 | case XMC_SV: | |
4574 | case XMC_TI: | |
4575 | case XMC_TB: | |
1b2cb8e2 | 4576 | section = &ppc_xcoff_text_section; |
931e13a6 | 4577 | is_code = 1; |
252b5132 RH |
4578 | break; |
4579 | case XMC_RW: | |
4580 | case XMC_TC0: | |
4581 | case XMC_TC: | |
4a403be0 | 4582 | case XMC_TE: |
252b5132 RH |
4583 | case XMC_DS: |
4584 | case XMC_UA: | |
252b5132 | 4585 | case XMC_UC: |
1b2cb8e2 | 4586 | section = &ppc_xcoff_data_section; |
252b5132 | 4587 | if (ppc_toc_csect != NULL |
809ffe0d | 4588 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
1b2cb8e2 | 4589 | == section->next_subsegment)) |
252b5132 | 4590 | after_toc = 1; |
1b2cb8e2 CC |
4591 | break; |
4592 | case XMC_BS: | |
4593 | section = &ppc_xcoff_bss_section; | |
4594 | break; | |
4595 | case XMC_TL: | |
4596 | section = &ppc_xcoff_tdata_section; | |
4597 | /* Create .tdata section if not yet done. */ | |
4598 | if (!ppc_xcoff_section_is_initialized (section)) | |
4599 | { | |
934cb849 | 4600 | ppc_init_xcoff_section (section, subseg_new (".tdata", 0)); |
1b2cb8e2 CC |
4601 | bfd_set_section_flags (section->segment, SEC_ALLOC |
4602 | | SEC_LOAD | SEC_RELOC | SEC_DATA | |
4603 | | SEC_THREAD_LOCAL); | |
4604 | } | |
4605 | break; | |
4606 | case XMC_UL: | |
4607 | section = &ppc_xcoff_tbss_section; | |
4608 | /* Create .tbss section if not yet done. */ | |
4609 | if (!ppc_xcoff_section_is_initialized (section)) | |
4610 | { | |
934cb849 | 4611 | ppc_init_xcoff_section (section, subseg_new (".tbss", 0)); |
1b2cb8e2 CC |
4612 | bfd_set_section_flags (section->segment, SEC_ALLOC | |
4613 | SEC_THREAD_LOCAL); | |
4614 | seg_info (section->segment)->bss = 1; | |
4615 | } | |
252b5132 RH |
4616 | break; |
4617 | default: | |
4618 | abort (); | |
4619 | } | |
4620 | ||
1b2cb8e2 CC |
4621 | S_SET_SEGMENT (sym, section->segment); |
4622 | symbol_get_tc (sym)->subseg = section->next_subsegment; | |
4623 | ++section->next_subsegment; | |
4624 | ||
252b5132 | 4625 | /* We set the obstack chunk size to a small value before |
99a814a1 AM |
4626 | changing subsegments, so that we don't use a lot of memory |
4627 | space for what may be a small section. */ | |
252b5132 RH |
4628 | hold_chunksize = chunksize; |
4629 | chunksize = 64; | |
4630 | ||
931e13a6 AM |
4631 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
4632 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
4633 | |
4634 | chunksize = hold_chunksize; | |
4635 | ||
4636 | if (after_toc) | |
4637 | ppc_after_toc_frag = frag_now; | |
4638 | ||
931e13a6 AM |
4639 | record_alignment (sec, align); |
4640 | if (is_code) | |
4641 | frag_align_code (align, 0); | |
4642 | else | |
4643 | frag_align (align, 0, 0); | |
4644 | ||
809ffe0d | 4645 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4646 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
4647 | ||
931e13a6 | 4648 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
4649 | symbol_get_tc (sym)->output = 1; |
4650 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 4651 | |
1b2cb8e2 | 4652 | for (list = section->csects; |
809ffe0d ILT |
4653 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4654 | list = symbol_get_tc (list)->next) | |
252b5132 | 4655 | ; |
809ffe0d | 4656 | symbol_get_tc (list)->next = sym; |
81d4177b | 4657 | |
252b5132 | 4658 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
4659 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4660 | &symbol_lastP); | |
252b5132 RH |
4661 | } |
4662 | ||
4663 | ppc_current_csect = sym; | |
4664 | } | |
4665 | ||
85645aed TG |
4666 | static void |
4667 | ppc_change_debug_section (unsigned int idx, subsegT subseg) | |
4668 | { | |
4669 | segT sec; | |
4670 | flagword oldflags; | |
4671 | const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; | |
4672 | ||
51d29b8c | 4673 | sec = subseg_new (dw->xcoff_name, subseg); |
fd361982 | 4674 | oldflags = bfd_section_flags (sec); |
85645aed TG |
4675 | if (oldflags == SEC_NO_FLAGS) |
4676 | { | |
4677 | /* Just created section. */ | |
4678 | gas_assert (dw_sections[idx].sect == NULL); | |
4679 | ||
fd361982 AM |
4680 | bfd_set_section_flags (sec, SEC_DEBUGGING); |
4681 | bfd_set_section_alignment (sec, 0); | |
85645aed TG |
4682 | dw_sections[idx].sect = sec; |
4683 | } | |
4684 | ||
4685 | /* Not anymore in a csect. */ | |
4686 | ppc_current_csect = NULL; | |
4687 | } | |
4688 | ||
4689 | /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: | |
4690 | .dwsect flag [, opt-label ] | |
4691 | */ | |
4692 | ||
4693 | static void | |
4694 | ppc_dwsect (int ignore ATTRIBUTE_UNUSED) | |
4695 | { | |
16de26a6 | 4696 | valueT flag; |
85645aed TG |
4697 | symbolS *opt_label; |
4698 | const struct xcoff_dwsect_name *dw; | |
4699 | struct dw_subsection *subseg; | |
4700 | struct dw_section *dws; | |
4701 | int i; | |
4702 | ||
4703 | /* Find section. */ | |
4704 | flag = get_absolute_expression (); | |
4705 | dw = NULL; | |
4706 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
4707 | if (xcoff_dwsect_names[i].flag == flag) | |
4708 | { | |
4709 | dw = &xcoff_dwsect_names[i]; | |
4710 | break; | |
4711 | } | |
4712 | ||
4713 | /* Parse opt-label. */ | |
4714 | if (*input_line_pointer == ',') | |
4715 | { | |
d02603dc | 4716 | char *label; |
85645aed TG |
4717 | char c; |
4718 | ||
4719 | ++input_line_pointer; | |
4720 | ||
d02603dc | 4721 | c = get_symbol_name (&label); |
85645aed | 4722 | opt_label = symbol_find_or_make (label); |
d02603dc | 4723 | (void) restore_line_pointer (c); |
85645aed TG |
4724 | } |
4725 | else | |
4726 | opt_label = NULL; | |
4727 | ||
4728 | demand_empty_rest_of_line (); | |
4729 | ||
4730 | /* Return now in case of unknown subsection. */ | |
4731 | if (dw == NULL) | |
4732 | { | |
d6ed37ed | 4733 | as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), |
85645aed TG |
4734 | (unsigned)flag); |
4735 | return; | |
4736 | } | |
4737 | ||
4738 | /* Find the subsection. */ | |
4739 | dws = &dw_sections[i]; | |
4740 | subseg = NULL; | |
4741 | if (opt_label != NULL && S_IS_DEFINED (opt_label)) | |
4742 | { | |
4743 | /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ | |
4744 | if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) | |
4745 | { | |
4746 | as_bad (_("label %s was not defined in this dwarf section"), | |
4747 | S_GET_NAME (opt_label)); | |
4748 | subseg = dws->anon_subseg; | |
4749 | opt_label = NULL; | |
4750 | } | |
4751 | else | |
4752 | subseg = symbol_get_tc (opt_label)->u.dw; | |
4753 | } | |
4754 | ||
4755 | if (subseg != NULL) | |
4756 | { | |
4757 | /* Switch to the subsection. */ | |
4758 | ppc_change_debug_section (i, subseg->subseg); | |
4759 | } | |
4760 | else | |
4761 | { | |
4762 | /* Create a new dw subsection. */ | |
f681e586 | 4763 | subseg = XCNEW (struct dw_subsection); |
85645aed TG |
4764 | |
4765 | if (opt_label == NULL) | |
4766 | { | |
4767 | /* The anonymous one. */ | |
4768 | subseg->subseg = 0; | |
4769 | subseg->link = NULL; | |
4770 | dws->anon_subseg = subseg; | |
4771 | } | |
4772 | else | |
4773 | { | |
4774 | /* A named one. */ | |
4775 | if (dws->list_subseg != NULL) | |
4776 | subseg->subseg = dws->list_subseg->subseg + 1; | |
4777 | else | |
4778 | subseg->subseg = 1; | |
4779 | ||
4780 | subseg->link = dws->list_subseg; | |
4781 | dws->list_subseg = subseg; | |
4782 | symbol_get_tc (opt_label)->u.dw = subseg; | |
4783 | } | |
4784 | ||
4785 | ppc_change_debug_section (i, subseg->subseg); | |
4786 | ||
4787 | if (dw->def_size) | |
4788 | { | |
4789 | /* Add the length field. */ | |
4790 | expressionS *exp = &subseg->end_exp; | |
4791 | int sz; | |
4792 | ||
4793 | if (opt_label != NULL) | |
4794 | symbol_set_value_now (opt_label); | |
4795 | ||
4796 | /* Add the length field. Note that according to the AIX assembler | |
4797 | manual, the size of the length field is 4 for powerpc32 but | |
4798 | 12 for powerpc64. */ | |
4799 | if (ppc_obj64) | |
4800 | { | |
4801 | /* Write the 64bit marker. */ | |
4802 | md_number_to_chars (frag_more (4), -1, 4); | |
4803 | } | |
4804 | ||
4805 | exp->X_op = O_subtract; | |
4806 | exp->X_op_symbol = symbol_temp_new_now (); | |
4807 | exp->X_add_symbol = symbol_temp_make (); | |
4808 | ||
4809 | sz = ppc_obj64 ? 8 : 4; | |
4810 | exp->X_add_number = -sz; | |
4811 | emit_expr (exp, sz); | |
4812 | } | |
4813 | } | |
4814 | } | |
4815 | ||
252b5132 RH |
4816 | /* This function handles the .text and .data pseudo-ops. These |
4817 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
4818 | convenience of people who aren't used to XCOFF. */ | |
4819 | ||
4820 | static void | |
98027b10 | 4821 | ppc_section (int type) |
252b5132 RH |
4822 | { |
4823 | const char *name; | |
4824 | symbolS *sym; | |
4825 | ||
4826 | if (type == 't') | |
4827 | name = ".text[PR]"; | |
4828 | else if (type == 'd') | |
4829 | name = ".data[RW]"; | |
4830 | else | |
4831 | abort (); | |
4832 | ||
4833 | sym = symbol_find_or_make (name); | |
4834 | ||
931e13a6 | 4835 | ppc_change_csect (sym, 2); |
252b5132 RH |
4836 | |
4837 | demand_empty_rest_of_line (); | |
4838 | } | |
4839 | ||
4840 | /* This function handles the .section pseudo-op. This is mostly to | |
4841 | give an error, since XCOFF only supports .text, .data and .bss, but | |
4842 | we do permit the user to name the text or data section. */ | |
4843 | ||
4844 | static void | |
98027b10 | 4845 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4846 | { |
4847 | char *user_name; | |
4848 | const char *real_name; | |
4849 | char c; | |
4850 | symbolS *sym; | |
4851 | ||
d02603dc | 4852 | c = get_symbol_name (&user_name); |
252b5132 RH |
4853 | |
4854 | if (strcmp (user_name, ".text") == 0) | |
4855 | real_name = ".text[PR]"; | |
4856 | else if (strcmp (user_name, ".data") == 0) | |
4857 | real_name = ".data[RW]"; | |
4858 | else | |
4859 | { | |
d6ed37ed | 4860 | as_bad (_("the XCOFF file format does not support arbitrary sections")); |
d02603dc | 4861 | (void) restore_line_pointer (c); |
252b5132 RH |
4862 | ignore_rest_of_line (); |
4863 | return; | |
4864 | } | |
4865 | ||
d02603dc | 4866 | (void) restore_line_pointer (c); |
252b5132 RH |
4867 | |
4868 | sym = symbol_find_or_make (real_name); | |
4869 | ||
931e13a6 | 4870 | ppc_change_csect (sym, 2); |
252b5132 RH |
4871 | |
4872 | demand_empty_rest_of_line (); | |
4873 | } | |
4874 | ||
4875 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
4876 | ||
4877 | static void | |
98027b10 | 4878 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4879 | { |
4880 | char *name; | |
add588a8 | 4881 | symbolS *sym; |
252b5132 | 4882 | |
add588a8 CC |
4883 | if ((name = read_symbol_name ()) == NULL) |
4884 | return; | |
252b5132 | 4885 | |
add588a8 | 4886 | sym = symbol_find_or_make (name); |
9f6e5897 | 4887 | free (name); |
252b5132 | 4888 | |
add588a8 CC |
4889 | if (*input_line_pointer == ',') |
4890 | { | |
4891 | unsigned short visibility; | |
4892 | coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); | |
4893 | ||
4894 | input_line_pointer++; | |
4895 | visibility = ppc_xcoff_get_visibility (); | |
4896 | if (!visibility) | |
4897 | { | |
4898 | as_bad (_("Unknown visibility field in .extern")); | |
4899 | ignore_rest_of_line (); | |
4900 | return; | |
4901 | } | |
4902 | ||
4903 | coffsym->native->u.syment.n_type &= ~SYM_V_MASK; | |
4904 | coffsym->native->u.syment.n_type |= visibility; | |
4905 | } | |
4906 | ||
4907 | demand_empty_rest_of_line (); | |
4908 | } | |
4909 | ||
4910 | /* XCOFF semantic for .globl says that the second parameter is | |
4911 | the symbol visibility. */ | |
4912 | ||
4913 | static void | |
4914 | ppc_globl (int ignore ATTRIBUTE_UNUSED) | |
4915 | { | |
4916 | char *name; | |
4917 | symbolS *sym; | |
4918 | ||
4919 | if ((name = read_symbol_name ()) == NULL) | |
4920 | return; | |
4921 | ||
4922 | sym = symbol_find_or_make (name); | |
9f6e5897 | 4923 | free (name); |
add588a8 CC |
4924 | S_SET_EXTERNAL (sym); |
4925 | ||
4926 | if (*input_line_pointer == ',') | |
4927 | { | |
4928 | unsigned short visibility; | |
4929 | coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); | |
4930 | ||
4931 | input_line_pointer++; | |
4932 | visibility = ppc_xcoff_get_visibility (); | |
4933 | if (!visibility) | |
4934 | { | |
4935 | as_bad (_("Unknown visibility field in .globl")); | |
4936 | ignore_rest_of_line (); | |
4937 | return; | |
4938 | } | |
4939 | ||
4940 | coffsym->native->u.syment.n_type &= ~SYM_V_MASK; | |
4941 | coffsym->native->u.syment.n_type |= visibility; | |
4942 | } | |
4943 | ||
4944 | demand_empty_rest_of_line (); | |
4945 | } | |
4946 | ||
4947 | /* XCOFF semantic for .weak says that the second parameter is | |
4948 | the symbol visibility. */ | |
4949 | ||
4950 | static void | |
4951 | ppc_weak (int ignore ATTRIBUTE_UNUSED) | |
4952 | { | |
4953 | char *name; | |
4954 | symbolS *sym; | |
4955 | ||
4956 | if ((name = read_symbol_name ()) == NULL) | |
4957 | return; | |
4958 | ||
4959 | sym = symbol_find_or_make (name); | |
9f6e5897 | 4960 | free (name); |
add588a8 CC |
4961 | S_SET_WEAK (sym); |
4962 | ||
4963 | if (*input_line_pointer == ',') | |
4964 | { | |
4965 | unsigned short visibility; | |
4966 | coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); | |
4967 | ||
4968 | input_line_pointer++; | |
4969 | visibility = ppc_xcoff_get_visibility (); | |
4970 | if (!visibility) | |
4971 | { | |
4972 | as_bad (_("Unknown visibility field in .weak")); | |
4973 | ignore_rest_of_line (); | |
4974 | return; | |
4975 | } | |
4976 | ||
4977 | coffsym->native->u.syment.n_type &= ~SYM_V_MASK; | |
4978 | coffsym->native->u.syment.n_type |= visibility; | |
4979 | } | |
252b5132 RH |
4980 | |
4981 | demand_empty_rest_of_line (); | |
4982 | } | |
4983 | ||
4984 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
4985 | ||
4986 | static void | |
98027b10 | 4987 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4988 | { |
4989 | char *name; | |
4990 | char endc; | |
4991 | symbolS *sym; | |
4992 | ||
d02603dc | 4993 | endc = get_symbol_name (&name); |
252b5132 RH |
4994 | |
4995 | sym = symbol_find_or_make (name); | |
4996 | ||
d02603dc | 4997 | (void) restore_line_pointer (endc); |
252b5132 | 4998 | |
809ffe0d | 4999 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5000 | |
5001 | demand_empty_rest_of_line (); | |
5002 | } | |
5003 | ||
c865e45b RS |
5004 | /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF |
5005 | relocations at the beginning of the current csect. | |
5006 | ||
5007 | (In principle, there's no reason why the relocations _have_ to be at | |
5008 | the beginning. Anywhere in the csect would do. However, inserting | |
33eaf5de | 5009 | at the beginning is what the native assembler does, and it helps to |
c865e45b RS |
5010 | deal with cases where the .ref statements follow the section contents.) |
5011 | ||
5012 | ??? .refs don't work for empty .csects. However, the native assembler | |
5013 | doesn't report an error in this case, and neither yet do we. */ | |
5014 | ||
5015 | static void | |
5016 | ppc_ref (int ignore ATTRIBUTE_UNUSED) | |
5017 | { | |
5018 | char *name; | |
5019 | char c; | |
5020 | ||
5021 | if (ppc_current_csect == NULL) | |
5022 | { | |
5023 | as_bad (_(".ref outside .csect")); | |
5024 | ignore_rest_of_line (); | |
5025 | return; | |
5026 | } | |
5027 | ||
5028 | do | |
5029 | { | |
d02603dc | 5030 | c = get_symbol_name (&name); |
c865e45b RS |
5031 | |
5032 | fix_at_start (symbol_get_frag (ppc_current_csect), 0, | |
5b7c81bd | 5033 | symbol_find_or_make (name), 0, false, BFD_RELOC_NONE); |
c865e45b RS |
5034 | |
5035 | *input_line_pointer = c; | |
d02603dc | 5036 | SKIP_WHITESPACE_AFTER_NAME (); |
c865e45b RS |
5037 | c = *input_line_pointer; |
5038 | if (c == ',') | |
5039 | { | |
5040 | input_line_pointer++; | |
5041 | SKIP_WHITESPACE (); | |
5042 | if (is_end_of_line[(unsigned char) *input_line_pointer]) | |
5043 | { | |
5044 | as_bad (_("missing symbol name")); | |
5045 | ignore_rest_of_line (); | |
5046 | return; | |
5047 | } | |
5048 | } | |
5049 | } | |
5050 | while (c == ','); | |
5051 | ||
5052 | demand_empty_rest_of_line (); | |
5053 | } | |
5054 | ||
252b5132 RH |
5055 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, |
5056 | although I don't know why it bothers. */ | |
5057 | ||
5058 | static void | |
98027b10 | 5059 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5060 | { |
5061 | char *name; | |
5062 | char endc; | |
5063 | symbolS *sym; | |
5064 | int len; | |
5065 | ||
d02603dc | 5066 | endc = get_symbol_name (&name); |
252b5132 RH |
5067 | |
5068 | sym = symbol_find_or_make (name); | |
5069 | ||
d02603dc | 5070 | (void) restore_line_pointer (endc); |
252b5132 RH |
5071 | |
5072 | if (*input_line_pointer != ',') | |
5073 | { | |
5074 | as_bad (_("missing rename string")); | |
5075 | ignore_rest_of_line (); | |
5076 | return; | |
5077 | } | |
5078 | ++input_line_pointer; | |
5079 | ||
809ffe0d | 5080 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
5081 | |
5082 | demand_empty_rest_of_line (); | |
5083 | } | |
5084 | ||
5085 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
5086 | pseudo-op, but slightly different. A sample is | |
5087 | .stabx "main:F-1",.main,142,0 | |
5088 | The first argument is the symbol name to create. The second is the | |
5089 | value, and the third is the storage class. The fourth seems to be | |
5090 | always zero, and I am assuming it is the type. */ | |
5091 | ||
5092 | static void | |
98027b10 | 5093 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5094 | { |
5095 | char *name; | |
5096 | int len; | |
5097 | symbolS *sym; | |
5098 | expressionS exp; | |
5099 | ||
5100 | name = demand_copy_C_string (&len); | |
5101 | ||
5102 | if (*input_line_pointer != ',') | |
5103 | { | |
5104 | as_bad (_("missing value")); | |
5105 | return; | |
5106 | } | |
5107 | ++input_line_pointer; | |
5108 | ||
5b7c81bd | 5109 | ppc_stab_symbol = true; |
252b5132 | 5110 | sym = symbol_make (name); |
5b7c81bd | 5111 | ppc_stab_symbol = false; |
252b5132 | 5112 | |
809ffe0d | 5113 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
5114 | |
5115 | (void) expression (&exp); | |
5116 | ||
5117 | switch (exp.X_op) | |
5118 | { | |
5119 | case O_illegal: | |
5120 | case O_absent: | |
5121 | case O_big: | |
5122 | as_bad (_("illegal .stabx expression; zero assumed")); | |
5123 | exp.X_add_number = 0; | |
5124 | /* Fall through. */ | |
5125 | case O_constant: | |
5126 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 5127 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
5128 | break; |
5129 | ||
5130 | case O_symbol: | |
5131 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 5132 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
5133 | else |
5134 | { | |
5135 | S_SET_VALUE (sym, | |
5136 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 5137 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
5138 | } |
5139 | break; | |
5140 | ||
5141 | default: | |
5142 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
5143 | fail at some later point, but this is probably the right |
5144 | thing to do here. */ | |
809ffe0d | 5145 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
5146 | break; |
5147 | } | |
5148 | ||
5149 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 5150 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
5151 | |
5152 | if (*input_line_pointer != ',') | |
5153 | { | |
5154 | as_bad (_("missing class")); | |
5155 | return; | |
5156 | } | |
5157 | ++input_line_pointer; | |
5158 | ||
5159 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
5160 | ||
5161 | if (*input_line_pointer != ',') | |
5162 | { | |
5163 | as_bad (_("missing type")); | |
5164 | return; | |
5165 | } | |
5166 | ++input_line_pointer; | |
5167 | ||
5168 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
5169 | ||
809ffe0d | 5170 | symbol_get_tc (sym)->output = 1; |
252b5132 | 5171 | |
c734e7e3 TG |
5172 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) |
5173 | { | |
5174 | /* In this case : | |
252b5132 | 5175 | |
c734e7e3 TG |
5176 | .bs name |
5177 | .stabx "z",arrays_,133,0 | |
5178 | .es | |
99a814a1 | 5179 | |
c734e7e3 | 5180 | .comm arrays_,13768,3 |
99a814a1 | 5181 | |
c734e7e3 TG |
5182 | resolve_symbol_value will copy the exp's "within" into sym's when the |
5183 | offset is 0. Since this seems to be corner case problem, | |
5184 | only do the correction for storage class C_STSYM. A better solution | |
5185 | would be to have the tc field updated in ppc_symbol_new_hook. */ | |
99a814a1 | 5186 | |
c734e7e3 TG |
5187 | if (exp.X_op == O_symbol) |
5188 | { | |
5189 | if (ppc_current_block == NULL) | |
5190 | as_bad (_(".stabx of storage class stsym must be within .bs/.es")); | |
99a814a1 | 5191 | |
c734e7e3 | 5192 | symbol_get_tc (sym)->within = ppc_current_block; |
c734e7e3 TG |
5193 | } |
5194 | } | |
99a814a1 | 5195 | |
252b5132 RH |
5196 | if (exp.X_op != O_symbol |
5197 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
5198 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
5199 | ppc_frob_label (sym); | |
5200 | else | |
5201 | { | |
5202 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
5203 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5204 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
5205 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
5206 | } |
5207 | ||
5208 | demand_empty_rest_of_line (); | |
5209 | } | |
5210 | ||
e86fc4a5 CC |
5211 | /* The .file pseudo-op. On XCOFF, .file can have several parameters |
5212 | which are being added to the symbol table to provide additional | |
5213 | information. */ | |
5214 | ||
5215 | static void | |
5216 | ppc_file (int ignore ATTRIBUTE_UNUSED) | |
5217 | { | |
5218 | char *sfname, *s1 = NULL, *s2 = NULL, *s3 = NULL; | |
5219 | int length, auxnb = 1; | |
5220 | ||
5221 | /* Some assemblers tolerate immediately following '"'. */ | |
5222 | if ((sfname = demand_copy_string (&length)) != 0) | |
5223 | { | |
5224 | coff_symbol_type *coffsym; | |
5225 | if (*input_line_pointer == ',') | |
5226 | { | |
5227 | ++input_line_pointer; | |
5228 | s1 = demand_copy_string (&length); | |
5229 | auxnb++; | |
5230 | ||
5231 | if (*input_line_pointer == ',') | |
5232 | { | |
5233 | ++input_line_pointer; | |
5234 | s2 = demand_copy_string (&length); | |
5235 | auxnb++; | |
5236 | ||
5237 | if (*input_line_pointer == ',') | |
5238 | { | |
5239 | ++input_line_pointer; | |
5240 | s3 = demand_copy_string (&length); | |
5241 | auxnb++; | |
5242 | } | |
5243 | } | |
5244 | } | |
5245 | ||
5246 | /* Use coff dot_file creation and adjust auxiliary entries. */ | |
c39e89c3 | 5247 | c_dot_file_symbol (sfname); |
e86fc4a5 CC |
5248 | S_SET_NUMBER_AUXILIARY (symbol_rootP, auxnb); |
5249 | coffsym = coffsymbol (symbol_get_bfdsym (symbol_rootP)); | |
5250 | coffsym->native[1].u.auxent.x_file.x_ftype = XFT_FN; | |
5251 | ||
5252 | if (s1) | |
5253 | { | |
5254 | coffsym->native[2].u.auxent.x_file.x_ftype = XFT_CT; | |
5255 | coffsym->native[2].extrap = s1; | |
5256 | } | |
5257 | if (s2) | |
5258 | { | |
5259 | coffsym->native[3].u.auxent.x_file.x_ftype = XFT_CV; | |
5260 | coffsym->native[3].extrap = s2; | |
5261 | } | |
5262 | if (s3) | |
5263 | { | |
5264 | coffsym->native[4].u.auxent.x_file.x_ftype = XFT_CD; | |
5265 | coffsym->native[4].extrap = s3; | |
5266 | } | |
5267 | ||
5268 | demand_empty_rest_of_line (); | |
5269 | } | |
5270 | } | |
5271 | ||
252b5132 RH |
5272 | /* The .function pseudo-op. This takes several arguments. The first |
5273 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 5274 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
5275 | uses the same name for both. I have no idea what the third and |
5276 | fourth arguments are meant to be. The optional fifth argument is | |
5277 | an expression for the size of the function. In COFF this symbol | |
5278 | gets an aux entry like that used for a csect. */ | |
5279 | ||
5280 | static void | |
98027b10 | 5281 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5282 | { |
5283 | char *name; | |
5284 | char endc; | |
5285 | char *s; | |
5286 | symbolS *ext_sym; | |
5287 | symbolS *lab_sym; | |
5288 | ||
d02603dc | 5289 | endc = get_symbol_name (&name); |
252b5132 RH |
5290 | |
5291 | /* Ignore any [PR] suffix. */ | |
5292 | name = ppc_canonicalize_symbol_name (name); | |
5293 | s = strchr (name, '['); | |
5294 | if (s != (char *) NULL | |
5295 | && strcmp (s + 1, "PR]") == 0) | |
5296 | *s = '\0'; | |
5297 | ||
5298 | ext_sym = symbol_find_or_make (name); | |
5299 | ||
d02603dc | 5300 | (void) restore_line_pointer (endc); |
252b5132 RH |
5301 | |
5302 | if (*input_line_pointer != ',') | |
5303 | { | |
5304 | as_bad (_("missing symbol name")); | |
5305 | ignore_rest_of_line (); | |
5306 | return; | |
5307 | } | |
5308 | ++input_line_pointer; | |
5309 | ||
d02603dc | 5310 | endc = get_symbol_name (&name); |
252b5132 RH |
5311 | |
5312 | lab_sym = symbol_find_or_make (name); | |
5313 | ||
d02603dc | 5314 | (void) restore_line_pointer (endc); |
252b5132 RH |
5315 | |
5316 | if (ext_sym != lab_sym) | |
5317 | { | |
809ffe0d ILT |
5318 | expressionS exp; |
5319 | ||
5320 | exp.X_op = O_symbol; | |
5321 | exp.X_add_symbol = lab_sym; | |
5322 | exp.X_op_symbol = NULL; | |
5323 | exp.X_add_number = 0; | |
5324 | exp.X_unsigned = 0; | |
5325 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
5326 | } |
5327 | ||
96d56e9f NC |
5328 | if (symbol_get_tc (ext_sym)->symbol_class == -1) |
5329 | symbol_get_tc (ext_sym)->symbol_class = XMC_PR; | |
809ffe0d | 5330 | symbol_get_tc (ext_sym)->output = 1; |
252b5132 RH |
5331 | |
5332 | if (*input_line_pointer == ',') | |
5333 | { | |
91d6fa6a | 5334 | expressionS exp; |
252b5132 RH |
5335 | |
5336 | /* Ignore the third argument. */ | |
5337 | ++input_line_pointer; | |
91d6fa6a | 5338 | expression (& exp); |
252b5132 RH |
5339 | if (*input_line_pointer == ',') |
5340 | { | |
5341 | /* Ignore the fourth argument. */ | |
5342 | ++input_line_pointer; | |
91d6fa6a | 5343 | expression (& exp); |
252b5132 RH |
5344 | if (*input_line_pointer == ',') |
5345 | { | |
97834047 CC |
5346 | /* The fifth argument is the function size. |
5347 | If it's omitted, the size will be the containing csect. | |
5348 | This will be donce during ppc_frob_symtab. */ | |
252b5132 | 5349 | ++input_line_pointer; |
e01e1cee AM |
5350 | symbol_get_tc (ext_sym)->u.size |
5351 | = symbol_new ("L0\001", absolute_section, | |
5352 | &zero_address_frag, 0); | |
85645aed | 5353 | pseudo_set (symbol_get_tc (ext_sym)->u.size); |
252b5132 RH |
5354 | } |
5355 | } | |
5356 | } | |
5357 | ||
5358 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
5359 | SF_SET_FUNCTION (ext_sym); | |
5360 | SF_SET_PROCESS (ext_sym); | |
5361 | coff_add_linesym (ext_sym); | |
5362 | ||
5363 | demand_empty_rest_of_line (); | |
5364 | } | |
5365 | ||
5366 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
5367 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
5368 | with the correct line number */ | |
5d6255fe | 5369 | |
8642cce8 | 5370 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
5371 | |
5372 | static void | |
98027b10 | 5373 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5374 | { |
5375 | symbolS *sym; | |
5376 | ||
5377 | sym = symbol_make (".bf"); | |
5378 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 5379 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
5380 | S_SET_VALUE (sym, frag_now_fix ()); |
5381 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
5382 | ||
5383 | coff_line_base = get_absolute_expression (); | |
5384 | ||
5385 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
5386 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
5387 | ||
8642cce8 | 5388 | /* Line number for bi. */ |
5d6255fe | 5389 | if (saved_bi_sym) |
8642cce8 TR |
5390 | { |
5391 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
5392 | saved_bi_sym = 0; | |
5393 | } | |
5d6255fe | 5394 | |
8642cce8 | 5395 | |
809ffe0d | 5396 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5397 | |
5398 | ppc_frob_label (sym); | |
5399 | ||
5400 | demand_empty_rest_of_line (); | |
5401 | } | |
5402 | ||
5403 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
5404 | ".ef", except that the line number is absolute, not relative to the | |
5405 | most recent ".bf" symbol. */ | |
5406 | ||
5407 | static void | |
98027b10 | 5408 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5409 | { |
5410 | symbolS *sym; | |
5411 | ||
5412 | sym = symbol_make (".ef"); | |
5413 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 5414 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
5415 | S_SET_VALUE (sym, frag_now_fix ()); |
5416 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
5417 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
5418 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 5419 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5420 | |
5421 | ppc_frob_label (sym); | |
5422 | ||
5423 | demand_empty_rest_of_line (); | |
5424 | } | |
5425 | ||
5426 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
5427 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
5428 | the symbol list. The value of .bi will be know when the next .bf |
5429 | is encountered. */ | |
252b5132 RH |
5430 | |
5431 | static void | |
98027b10 | 5432 | ppc_biei (int ei) |
252b5132 RH |
5433 | { |
5434 | static symbolS *last_biei; | |
5435 | ||
5436 | char *name; | |
5437 | int len; | |
5438 | symbolS *sym; | |
5439 | symbolS *look; | |
5440 | ||
5441 | name = demand_copy_C_string (&len); | |
5442 | ||
5443 | /* The value of these symbols is actually file offset. Here we set | |
5444 | the value to the index into the line number entries. In | |
5445 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
5446 | to do the right thing. */ | |
5447 | ||
5448 | sym = symbol_make (name); | |
5449 | /* obj-coff.c currently only handles line numbers correctly in the | |
5450 | .text section. */ | |
5451 | S_SET_SEGMENT (sym, text_section); | |
5452 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 5453 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
5454 | |
5455 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 5456 | symbol_get_tc (sym)->output = 1; |
81d4177b | 5457 | |
8642cce8 | 5458 | /* Save bi. */ |
5d6255fe | 5459 | if (ei) |
8642cce8 TR |
5460 | saved_bi_sym = 0; |
5461 | else | |
5462 | saved_bi_sym = sym; | |
5463 | ||
252b5132 RH |
5464 | for (look = last_biei ? last_biei : symbol_rootP; |
5465 | (look != (symbolS *) NULL | |
5466 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
5467 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
5468 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
5469 | look = symbol_next (look)) | |
5470 | ; | |
5471 | if (look != (symbolS *) NULL) | |
5472 | { | |
5473 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
5474 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
5475 | last_biei = sym; | |
5476 | } | |
5477 | ||
5478 | demand_empty_rest_of_line (); | |
5479 | } | |
5480 | ||
5481 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
5482 | There is one argument, which is a csect symbol. The value of the | |
5483 | .bs symbol is the index of this csect symbol. */ | |
5484 | ||
5485 | static void | |
98027b10 | 5486 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5487 | { |
5488 | char *name; | |
5489 | char endc; | |
5490 | symbolS *csect; | |
5491 | symbolS *sym; | |
5492 | ||
5493 | if (ppc_current_block != NULL) | |
5494 | as_bad (_("nested .bs blocks")); | |
5495 | ||
d02603dc | 5496 | endc = get_symbol_name (&name); |
252b5132 RH |
5497 | |
5498 | csect = symbol_find_or_make (name); | |
5499 | ||
d02603dc | 5500 | (void) restore_line_pointer (endc); |
252b5132 RH |
5501 | |
5502 | sym = symbol_make (".bs"); | |
5503 | S_SET_SEGMENT (sym, now_seg); | |
5504 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
5505 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
5506 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 5507 | |
809ffe0d | 5508 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
5509 | |
5510 | ppc_frob_label (sym); | |
5511 | ||
5512 | ppc_current_block = sym; | |
5513 | ||
5514 | demand_empty_rest_of_line (); | |
5515 | } | |
5516 | ||
5517 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
5518 | ||
5519 | static void | |
98027b10 | 5520 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5521 | { |
5522 | symbolS *sym; | |
5523 | ||
5524 | if (ppc_current_block == NULL) | |
5525 | as_bad (_(".es without preceding .bs")); | |
5526 | ||
5527 | sym = symbol_make (".es"); | |
5528 | S_SET_SEGMENT (sym, now_seg); | |
5529 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
5530 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
5531 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
5532 | |
5533 | ppc_frob_label (sym); | |
5534 | ||
5535 | ppc_current_block = NULL; | |
5536 | ||
5537 | demand_empty_rest_of_line (); | |
5538 | } | |
5539 | ||
5540 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
5541 | line number. */ | |
5542 | ||
5543 | static void | |
98027b10 | 5544 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5545 | { |
5546 | symbolS *sym; | |
5547 | ||
5548 | sym = symbol_make (".bb"); | |
5549 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 5550 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
5551 | S_SET_VALUE (sym, frag_now_fix ()); |
5552 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
5553 | ||
5554 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
5555 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
5556 | ||
809ffe0d | 5557 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5558 | |
5559 | SF_SET_PROCESS (sym); | |
5560 | ||
5561 | ppc_frob_label (sym); | |
5562 | ||
5563 | demand_empty_rest_of_line (); | |
5564 | } | |
5565 | ||
5566 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
5567 | line number. */ | |
5568 | ||
5569 | static void | |
98027b10 | 5570 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5571 | { |
5572 | symbolS *sym; | |
5573 | ||
5574 | sym = symbol_make (".eb"); | |
5575 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 5576 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
5577 | S_SET_VALUE (sym, frag_now_fix ()); |
5578 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
5579 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
5580 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 5581 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5582 | |
5583 | SF_SET_PROCESS (sym); | |
5584 | ||
5585 | ppc_frob_label (sym); | |
5586 | ||
5587 | demand_empty_rest_of_line (); | |
5588 | } | |
5589 | ||
5590 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
5591 | specified name. */ | |
5592 | ||
5593 | static void | |
98027b10 | 5594 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5595 | { |
5596 | char *name; | |
5597 | int len; | |
5598 | symbolS *sym; | |
5599 | ||
5600 | name = demand_copy_C_string (&len); | |
5601 | sym = symbol_make (name); | |
5602 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 5603 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
5604 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
5605 | S_SET_VALUE (sym, 0); | |
809ffe0d | 5606 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5607 | |
5608 | ppc_frob_label (sym); | |
5609 | ||
5610 | demand_empty_rest_of_line (); | |
5611 | } | |
5612 | ||
5613 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
5614 | ||
5615 | static void | |
98027b10 | 5616 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5617 | { |
5618 | symbolS *sym; | |
5619 | ||
5620 | sym = symbol_make (".ec"); | |
5621 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 5622 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
5623 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
5624 | S_SET_VALUE (sym, 0); | |
809ffe0d | 5625 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5626 | |
5627 | ppc_frob_label (sym); | |
5628 | ||
5629 | demand_empty_rest_of_line (); | |
5630 | } | |
5631 | ||
5632 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
5633 | ||
5634 | static void | |
98027b10 | 5635 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5636 | { |
5637 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 5638 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
5639 | else |
5640 | { | |
5641 | subsegT subseg; | |
5642 | symbolS *sym; | |
5643 | symbolS *list; | |
81d4177b | 5644 | |
1b2cb8e2 CC |
5645 | subseg = ppc_xcoff_data_section.next_subsegment; |
5646 | ++ppc_xcoff_data_section.next_subsegment; | |
252b5132 RH |
5647 | |
5648 | subseg_new (segment_name (data_section), subseg); | |
5649 | ppc_toc_frag = frag_now; | |
5650 | ||
5651 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 5652 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
5653 | S_SET_SEGMENT (sym, data_section); |
5654 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
5655 | symbol_get_tc (sym)->subseg = subseg; |
5656 | symbol_get_tc (sym)->output = 1; | |
5657 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
5658 | |
5659 | ppc_toc_csect = sym; | |
81d4177b | 5660 | |
1b2cb8e2 | 5661 | for (list = ppc_xcoff_data_section.csects; |
809ffe0d ILT |
5662 | symbol_get_tc (list)->next != (symbolS *) NULL; |
5663 | list = symbol_get_tc (list)->next) | |
252b5132 | 5664 | ; |
809ffe0d | 5665 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
5666 | |
5667 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5668 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
5669 | &symbol_lastP); | |
252b5132 RH |
5670 | } |
5671 | ||
5672 | ppc_current_csect = ppc_toc_csect; | |
5673 | ||
5674 | demand_empty_rest_of_line (); | |
5675 | } | |
5676 | ||
5677 | /* The AIX assembler automatically aligns the operands of a .long or | |
5678 | .short pseudo-op, and we want to be compatible. */ | |
5679 | ||
5680 | static void | |
98027b10 | 5681 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
5682 | { |
5683 | frag_align (log_size, 0, 0); | |
5684 | record_alignment (now_seg, log_size); | |
5685 | cons (1 << log_size); | |
5686 | } | |
5687 | ||
5688 | static void | |
98027b10 | 5689 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
5690 | { |
5691 | expressionS exp; | |
5692 | int byte_count; | |
5693 | ||
5694 | (void) expression (&exp); | |
5695 | ||
5696 | if (exp.X_op != O_constant) | |
5697 | { | |
5698 | as_bad (_("non-constant byte count")); | |
5699 | return; | |
5700 | } | |
5701 | ||
5702 | byte_count = exp.X_add_number; | |
5703 | ||
5704 | if (*input_line_pointer != ',') | |
5705 | { | |
5706 | as_bad (_("missing value")); | |
5707 | return; | |
5708 | } | |
5709 | ||
5710 | ++input_line_pointer; | |
5711 | cons (byte_count); | |
5712 | } | |
5713 | ||
85645aed | 5714 | void |
ed2917de | 5715 | ppc_xcoff_md_finish (void) |
85645aed TG |
5716 | { |
5717 | int i; | |
5718 | ||
5719 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
5720 | { | |
5721 | struct dw_section *dws = &dw_sections[i]; | |
5722 | struct dw_subsection *dwss; | |
5723 | ||
5724 | if (dws->anon_subseg) | |
5725 | { | |
5726 | dwss = dws->anon_subseg; | |
5727 | dwss->link = dws->list_subseg; | |
5728 | } | |
5729 | else | |
5730 | dwss = dws->list_subseg; | |
5731 | ||
5732 | for (; dwss != NULL; dwss = dwss->link) | |
5733 | if (dwss->end_exp.X_add_symbol != NULL) | |
5734 | { | |
5735 | subseg_set (dws->sect, dwss->subseg); | |
5736 | symbol_set_value_now (dwss->end_exp.X_add_symbol); | |
5737 | } | |
5738 | } | |
22f72c48 | 5739 | ppc_cpu = 0; |
85645aed TG |
5740 | } |
5741 | ||
252b5132 | 5742 | #endif /* OBJ_XCOFF */ |
0baf16f2 | 5743 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
5744 | \f |
5745 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
5746 | ELF. This takes two or more arguments. | |
5747 | ||
5748 | When generating XCOFF output, the first argument is the name to | |
5749 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 5750 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 5751 | this location in the TOC; often there is just one more argument, a |
1049f94e | 5752 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
5753 | depends on target word size. A 32-bit target uses 4-byte values, a |
5754 | 64-bit target uses 8-byte values. | |
252b5132 RH |
5755 | |
5756 | When not generating XCOFF output, the arguments are the same, but | |
5757 | the first argument is simply ignored. */ | |
5758 | ||
5759 | static void | |
98027b10 | 5760 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5761 | { |
5762 | #ifdef OBJ_XCOFF | |
5763 | ||
5764 | /* Define the TOC symbol name. */ | |
5765 | { | |
5766 | char *name; | |
5767 | char endc; | |
5768 | symbolS *sym; | |
5769 | ||
5770 | if (ppc_toc_csect == (symbolS *) NULL | |
5771 | || ppc_toc_csect != ppc_current_csect) | |
5772 | { | |
5773 | as_bad (_(".tc not in .toc section")); | |
5774 | ignore_rest_of_line (); | |
5775 | return; | |
5776 | } | |
5777 | ||
d02603dc | 5778 | endc = get_symbol_name (&name); |
252b5132 RH |
5779 | |
5780 | sym = symbol_find_or_make (name); | |
5781 | ||
d02603dc | 5782 | (void) restore_line_pointer (endc); |
252b5132 RH |
5783 | |
5784 | if (S_IS_DEFINED (sym)) | |
5785 | { | |
5786 | symbolS *label; | |
5787 | ||
809ffe0d | 5788 | label = symbol_get_tc (ppc_current_csect)->within; |
96d56e9f | 5789 | if (symbol_get_tc (label)->symbol_class != XMC_TC0) |
252b5132 RH |
5790 | { |
5791 | as_bad (_(".tc with no label")); | |
5792 | ignore_rest_of_line (); | |
5793 | return; | |
5794 | } | |
5795 | ||
5796 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 5797 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
5798 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
5799 | ||
5800 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
5801 | ++input_line_pointer; | |
5802 | ||
5803 | return; | |
5804 | } | |
5805 | ||
5806 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 5807 | symbol_set_frag (sym, frag_now); |
252b5132 | 5808 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
4a403be0 CC |
5809 | |
5810 | /* AIX assembler seems to allow any storage class to be set in .tc. | |
5811 | But for now, only XMC_TC and XMC_TE are supported by us. */ | |
5812 | switch (symbol_get_tc (sym)->symbol_class) | |
5813 | { | |
5814 | case XMC_TC: | |
5815 | case XMC_TE: | |
5816 | break; | |
5817 | ||
5818 | default: | |
5819 | as_bad (_(".tc with storage class %d not yet supported"), | |
5820 | symbol_get_tc (sym)->symbol_class); | |
5821 | ignore_rest_of_line (); | |
5822 | return; | |
5823 | } | |
809ffe0d | 5824 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
5825 | |
5826 | ppc_frob_label (sym); | |
5827 | } | |
5828 | ||
0baf16f2 AM |
5829 | #endif /* OBJ_XCOFF */ |
5830 | #ifdef OBJ_ELF | |
9c7977b3 | 5831 | int align; |
252b5132 RH |
5832 | |
5833 | /* Skip the TOC symbol name. */ | |
5834 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 5835 | || *input_line_pointer == ' ' |
252b5132 RH |
5836 | || *input_line_pointer == '[' |
5837 | || *input_line_pointer == ']' | |
5838 | || *input_line_pointer == '{' | |
5839 | || *input_line_pointer == '}') | |
5840 | ++input_line_pointer; | |
5841 | ||
0baf16f2 | 5842 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 5843 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
5844 | frag_align (align, 0, 0); |
5845 | record_alignment (now_seg, align); | |
0baf16f2 | 5846 | #endif /* OBJ_ELF */ |
252b5132 RH |
5847 | |
5848 | if (*input_line_pointer != ',') | |
5849 | demand_empty_rest_of_line (); | |
5850 | else | |
5851 | { | |
5852 | ++input_line_pointer; | |
2b3c4602 | 5853 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
5854 | } |
5855 | } | |
0baf16f2 AM |
5856 | |
5857 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
5858 | |
5859 | static void | |
98027b10 | 5860 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 5861 | { |
d02603dc | 5862 | char c; |
69c040df AM |
5863 | char *cpu_string; |
5864 | #define MAX_HISTORY 100 | |
fa452fa6 | 5865 | static ppc_cpu_t *cpu_history; |
69c040df AM |
5866 | static int curr_hist; |
5867 | ||
5868 | SKIP_WHITESPACE (); | |
5869 | ||
d02603dc NC |
5870 | c = get_symbol_name (&cpu_string); |
5871 | cpu_string = xstrdup (cpu_string); | |
5872 | (void) restore_line_pointer (c); | |
69c040df AM |
5873 | |
5874 | if (cpu_string != NULL) | |
5875 | { | |
fa452fa6 | 5876 | ppc_cpu_t old_cpu = ppc_cpu; |
69c040df AM |
5877 | char *p; |
5878 | ||
5879 | for (p = cpu_string; *p != 0; p++) | |
5880 | *p = TOLOWER (*p); | |
5881 | ||
5882 | if (strcmp (cpu_string, "push") == 0) | |
5883 | { | |
5884 | if (cpu_history == NULL) | |
325801bd | 5885 | cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY); |
69c040df AM |
5886 | |
5887 | if (curr_hist >= MAX_HISTORY) | |
5888 | as_bad (_(".machine stack overflow")); | |
5889 | else | |
5890 | cpu_history[curr_hist++] = ppc_cpu; | |
5891 | } | |
5892 | else if (strcmp (cpu_string, "pop") == 0) | |
5893 | { | |
5894 | if (curr_hist <= 0) | |
5895 | as_bad (_(".machine stack underflow")); | |
5896 | else | |
5897 | ppc_cpu = cpu_history[--curr_hist]; | |
5898 | } | |
69c040df | 5899 | else |
b25f942e AM |
5900 | { |
5901 | ppc_cpu_t new_cpu; | |
5902 | /* Not using the global "sticky" variable here results in | |
5903 | none of the extra functional unit command line options, | |
5904 | -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in | |
5905 | force after selecting a new cpu with .machine. | |
5906 | ".machine altivec" and other extra functional unit | |
5907 | options do not count as a new machine, instead they add | |
5908 | to currently selected opcodes. */ | |
5909 | ppc_cpu_t machine_sticky = 0; | |
cebc89b9 AM |
5910 | /* Unfortunately, some versions of gcc emit a .machine |
5911 | directive very near the start of the compiler's assembly | |
5912 | output file. This is bad because it overrides user -Wa | |
5913 | cpu selection. Worse, there are versions of gcc that | |
5914 | emit the *wrong* cpu, not even respecting the -mcpu given | |
5915 | to gcc. See gcc pr101393. And to compound the problem, | |
5916 | as of 20220222 gcc doesn't pass the correct cpu option to | |
5917 | gas on the command line. See gcc pr59828. Hack around | |
5918 | this by keeping sticky options for an early .machine. */ | |
5919 | asection *sec; | |
5920 | for (sec = stdoutput->sections; sec != NULL; sec = sec->next) | |
5921 | { | |
5922 | segment_info_type *info = seg_info (sec); | |
5923 | /* Are the frags for this section perturbed from their | |
5924 | initial state? Even .align will count here. */ | |
5925 | if (info != NULL | |
5926 | && (info->frchainP->frch_root != info->frchainP->frch_last | |
5927 | || info->frchainP->frch_root->fr_type != rs_fill | |
5928 | || info->frchainP->frch_root->fr_fix != 0)) | |
5929 | break; | |
5930 | } | |
5931 | new_cpu = ppc_parse_cpu (ppc_cpu, | |
5932 | sec == NULL ? &sticky : &machine_sticky, | |
5933 | cpu_string); | |
b25f942e AM |
5934 | if (new_cpu != 0) |
5935 | ppc_cpu = new_cpu; | |
5936 | else | |
5937 | as_bad (_("invalid machine `%s'"), cpu_string); | |
5938 | } | |
69c040df AM |
5939 | |
5940 | if (ppc_cpu != old_cpu) | |
5941 | ppc_setup_opcodes (); | |
5942 | } | |
5943 | ||
5944 | demand_empty_rest_of_line (); | |
0baf16f2 | 5945 | } |
0baf16f2 | 5946 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
252b5132 | 5947 | \f |
252b5132 RH |
5948 | #ifdef OBJ_XCOFF |
5949 | ||
5950 | /* XCOFF specific symbol and file handling. */ | |
5951 | ||
5952 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
5953 | any, to use square brackets, and to be in upper case. */ | |
5954 | ||
5955 | char * | |
98027b10 | 5956 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5957 | { |
5958 | char *s; | |
5959 | ||
5960 | if (ppc_stab_symbol) | |
5961 | return name; | |
5962 | ||
5963 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5964 | ; | |
5965 | if (*s != '\0') | |
5966 | { | |
5967 | char brac; | |
5968 | ||
5969 | if (*s == '[') | |
5970 | brac = ']'; | |
5971 | else | |
5972 | { | |
5973 | *s = '['; | |
5974 | brac = '}'; | |
5975 | } | |
5976 | ||
5977 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5978 | *s = TOUPPER (*s); |
252b5132 RH |
5979 | |
5980 | if (*s == '\0' || s[1] != '\0') | |
5981 | as_bad (_("bad symbol suffix")); | |
5982 | ||
5983 | *s = ']'; | |
5984 | } | |
5985 | ||
5986 | return name; | |
5987 | } | |
5988 | ||
5989 | /* Set the class of a symbol based on the suffix, if any. This is | |
5990 | called whenever a new symbol is created. */ | |
5991 | ||
5992 | void | |
98027b10 | 5993 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5994 | { |
809ffe0d | 5995 | struct ppc_tc_sy *tc; |
252b5132 RH |
5996 | const char *s; |
5997 | ||
809ffe0d ILT |
5998 | tc = symbol_get_tc (sym); |
5999 | tc->next = NULL; | |
6000 | tc->output = 0; | |
96d56e9f | 6001 | tc->symbol_class = -1; |
809ffe0d ILT |
6002 | tc->real_name = NULL; |
6003 | tc->subseg = 0; | |
6004 | tc->align = 0; | |
85645aed TG |
6005 | tc->u.size = NULL; |
6006 | tc->u.dw = NULL; | |
809ffe0d | 6007 | tc->within = NULL; |
252b5132 RH |
6008 | |
6009 | if (ppc_stab_symbol) | |
6010 | return; | |
6011 | ||
6012 | s = strchr (S_GET_NAME (sym), '['); | |
6013 | if (s == (const char *) NULL) | |
6014 | { | |
6015 | /* There is no suffix. */ | |
6016 | return; | |
6017 | } | |
6018 | ||
6019 | ++s; | |
6020 | ||
6021 | switch (s[0]) | |
6022 | { | |
6023 | case 'B': | |
6024 | if (strcmp (s, "BS]") == 0) | |
96d56e9f | 6025 | tc->symbol_class = XMC_BS; |
252b5132 RH |
6026 | break; |
6027 | case 'D': | |
6028 | if (strcmp (s, "DB]") == 0) | |
96d56e9f | 6029 | tc->symbol_class = XMC_DB; |
252b5132 | 6030 | else if (strcmp (s, "DS]") == 0) |
96d56e9f | 6031 | tc->symbol_class = XMC_DS; |
252b5132 RH |
6032 | break; |
6033 | case 'G': | |
6034 | if (strcmp (s, "GL]") == 0) | |
96d56e9f | 6035 | tc->symbol_class = XMC_GL; |
252b5132 RH |
6036 | break; |
6037 | case 'P': | |
6038 | if (strcmp (s, "PR]") == 0) | |
96d56e9f | 6039 | tc->symbol_class = XMC_PR; |
252b5132 RH |
6040 | break; |
6041 | case 'R': | |
6042 | if (strcmp (s, "RO]") == 0) | |
96d56e9f | 6043 | tc->symbol_class = XMC_RO; |
252b5132 | 6044 | else if (strcmp (s, "RW]") == 0) |
96d56e9f | 6045 | tc->symbol_class = XMC_RW; |
252b5132 RH |
6046 | break; |
6047 | case 'S': | |
6048 | if (strcmp (s, "SV]") == 0) | |
96d56e9f | 6049 | tc->symbol_class = XMC_SV; |
252b5132 RH |
6050 | break; |
6051 | case 'T': | |
6052 | if (strcmp (s, "TC]") == 0) | |
96d56e9f | 6053 | tc->symbol_class = XMC_TC; |
252b5132 | 6054 | else if (strcmp (s, "TI]") == 0) |
96d56e9f | 6055 | tc->symbol_class = XMC_TI; |
252b5132 | 6056 | else if (strcmp (s, "TB]") == 0) |
96d56e9f | 6057 | tc->symbol_class = XMC_TB; |
252b5132 | 6058 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
96d56e9f | 6059 | tc->symbol_class = XMC_TC0; |
4a403be0 CC |
6060 | else if (strcmp (s, "TE]") == 0) |
6061 | tc->symbol_class = XMC_TE; | |
1b2cb8e2 CC |
6062 | else if (strcmp (s, "TL]") == 0) |
6063 | tc->symbol_class = XMC_TL; | |
252b5132 RH |
6064 | break; |
6065 | case 'U': | |
6066 | if (strcmp (s, "UA]") == 0) | |
96d56e9f | 6067 | tc->symbol_class = XMC_UA; |
252b5132 | 6068 | else if (strcmp (s, "UC]") == 0) |
96d56e9f | 6069 | tc->symbol_class = XMC_UC; |
1b2cb8e2 CC |
6070 | else if (strcmp (s, "UL]") == 0) |
6071 | tc->symbol_class = XMC_UL; | |
252b5132 RH |
6072 | break; |
6073 | case 'X': | |
6074 | if (strcmp (s, "XO]") == 0) | |
96d56e9f | 6075 | tc->symbol_class = XMC_XO; |
252b5132 RH |
6076 | break; |
6077 | } | |
6078 | ||
96d56e9f | 6079 | if (tc->symbol_class == -1) |
d6ed37ed | 6080 | as_bad (_("unrecognized symbol suffix")); |
252b5132 RH |
6081 | } |
6082 | ||
252b5132 RH |
6083 | /* This variable is set by ppc_frob_symbol if any absolute symbols are |
6084 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
6085 | the symbols. */ | |
6086 | ||
5b7c81bd | 6087 | static bool ppc_saw_abs; |
252b5132 RH |
6088 | |
6089 | /* Change the name of a symbol just before writing it out. Set the | |
6090 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
6091 | class suffix. Return 1 if the symbol should not be included in the | |
6092 | symbol table. */ | |
6093 | ||
6094 | int | |
98027b10 | 6095 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
6096 | { |
6097 | static symbolS *ppc_last_function; | |
6098 | static symbolS *set_end; | |
6099 | ||
6100 | /* Discard symbols that should not be included in the output symbol | |
6101 | table. */ | |
809ffe0d | 6102 | if (! symbol_used_in_reloc_p (sym) |
97834047 | 6103 | && S_GET_STORAGE_CLASS (sym) != C_DWARF |
809ffe0d | 6104 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 |
670ec21d | 6105 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 6106 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
6107 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
6108 | return 1; | |
6109 | ||
a161fe53 AM |
6110 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
6111 | if (sym == abs_section_sym) | |
6112 | return 1; | |
6113 | ||
809ffe0d ILT |
6114 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
6115 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
6116 | else |
6117 | { | |
6118 | const char *name; | |
6119 | const char *s; | |
6120 | ||
6121 | name = S_GET_NAME (sym); | |
6122 | s = strchr (name, '['); | |
6123 | if (s != (char *) NULL) | |
6124 | { | |
6125 | unsigned int len; | |
6126 | char *snew; | |
6127 | ||
6128 | len = s - name; | |
a44e2901 | 6129 | snew = xstrndup (name, len); |
252b5132 RH |
6130 | |
6131 | S_SET_NAME (sym, snew); | |
6132 | } | |
6133 | } | |
6134 | ||
6135 | if (set_end != (symbolS *) NULL) | |
6136 | { | |
6137 | SA_SET_SYM_ENDNDX (set_end, sym); | |
6138 | set_end = NULL; | |
6139 | } | |
6140 | ||
6141 | if (SF_GET_FUNCTION (sym)) | |
6142 | { | |
97834047 CC |
6143 | /* Make sure coff_last_function is reset. Otherwise, we won't create |
6144 | the auxent for the next function. */ | |
6145 | coff_last_function = 0; | |
252b5132 | 6146 | ppc_last_function = sym; |
85645aed | 6147 | if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) |
252b5132 | 6148 | { |
85645aed | 6149 | resolve_symbol_value (symbol_get_tc (sym)->u.size); |
809ffe0d | 6150 | SA_SET_SYM_FSIZE (sym, |
85645aed | 6151 | (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); |
252b5132 | 6152 | } |
97834047 CC |
6153 | else |
6154 | { | |
6155 | /* Size of containing csect. */ | |
6156 | symbolS* within = symbol_get_tc (sym)->within; | |
94352775 AM |
6157 | coff_symbol_type *csect = coffsymbol (symbol_get_bfdsym (within)); |
6158 | combined_entry_type *csectaux | |
6159 | = &csect->native[S_GET_NUMBER_AUXILIARY(within)]; | |
97834047 | 6160 | |
94352775 | 6161 | SA_SET_SYM_FSIZE (sym, csectaux->u.auxent.x_csect.x_scnlen.u64); |
97834047 | 6162 | } |
252b5132 RH |
6163 | } |
6164 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
6165 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
6166 | { | |
6167 | if (ppc_last_function == (symbolS *) NULL) | |
6168 | as_bad (_(".ef with no preceding .function")); | |
6169 | else | |
6170 | { | |
6171 | set_end = ppc_last_function; | |
6172 | ppc_last_function = NULL; | |
6173 | ||
6174 | /* We don't have a C_EFCN symbol, but we need to force the | |
6175 | COFF backend to believe that it has seen one. */ | |
6176 | coff_last_function = NULL; | |
6177 | } | |
6178 | } | |
6179 | ||
670ec21d | 6180 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 6181 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
6182 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
6183 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
6184 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
6185 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
6186 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
6187 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
6188 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
6189 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
6190 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
6191 | ||
6192 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
8602d4fe | 6193 | || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT |
252b5132 RH |
6194 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) |
6195 | { | |
6196 | int i; | |
94352775 | 6197 | combined_entry_type *a; |
252b5132 RH |
6198 | |
6199 | /* Create a csect aux. */ | |
6200 | i = S_GET_NUMBER_AUXILIARY (sym); | |
6201 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
94352775 | 6202 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1]; |
96d56e9f | 6203 | if (symbol_get_tc (sym)->symbol_class == XMC_TC0) |
252b5132 RH |
6204 | { |
6205 | /* This is the TOC table. */ | |
6206 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
94352775 AM |
6207 | a->u.auxent.x_csect.x_scnlen.u64 = 0; |
6208 | a->u.auxent.x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
252b5132 | 6209 | } |
809ffe0d | 6210 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
6211 | { |
6212 | /* This is a csect symbol. x_scnlen is the size of the | |
6213 | csect. */ | |
809ffe0d | 6214 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
94352775 | 6215 | a->u.auxent.x_csect.x_scnlen.u64 |
a2c7ca15 | 6216 | = bfd_section_size (S_GET_SEGMENT (sym)) - S_GET_VALUE (sym); |
252b5132 RH |
6217 | else |
6218 | { | |
6386f3a7 | 6219 | resolve_symbol_value (symbol_get_tc (sym)->next); |
94352775 | 6220 | a->u.auxent.x_csect.x_scnlen.u64 |
a2c7ca15 | 6221 | = S_GET_VALUE (symbol_get_tc (sym)->next) - S_GET_VALUE (sym); |
252b5132 | 6222 | } |
a83ef1c7 CC |
6223 | if (symbol_get_tc (sym)->symbol_class == XMC_BS |
6224 | || symbol_get_tc (sym)->symbol_class == XMC_UL) | |
94352775 AM |
6225 | a->u.auxent.x_csect.x_smtyp |
6226 | = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
bcf84703 | 6227 | else |
94352775 AM |
6228 | a->u.auxent.x_csect.x_smtyp |
6229 | = (symbol_get_tc (sym)->align << 3) | XTY_SD; | |
252b5132 | 6230 | } |
1b2cb8e2 CC |
6231 | else if (S_GET_SEGMENT (sym) == bss_section |
6232 | || S_GET_SEGMENT (sym) == ppc_xcoff_tbss_section.segment) | |
252b5132 RH |
6233 | { |
6234 | /* This is a common symbol. */ | |
94352775 AM |
6235 | a->u.auxent.x_csect.x_scnlen.u64 = symbol_get_frag (sym)->fr_offset; |
6236 | a->u.auxent.x_csect.x_smtyp | |
6237 | = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
1b2cb8e2 CC |
6238 | if (S_GET_SEGMENT (sym) == ppc_xcoff_tbss_section.segment) |
6239 | symbol_get_tc (sym)->symbol_class = XMC_UL; | |
6240 | else if (S_IS_EXTERNAL (sym)) | |
96d56e9f | 6241 | symbol_get_tc (sym)->symbol_class = XMC_RW; |
252b5132 | 6242 | else |
96d56e9f | 6243 | symbol_get_tc (sym)->symbol_class = XMC_BS; |
252b5132 RH |
6244 | } |
6245 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
6246 | { | |
6247 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 6248 | ppc_adjust_symtab. */ |
5b7c81bd | 6249 | ppc_saw_abs = true; |
94352775 | 6250 | a->u.auxent.x_csect.x_smtyp = XTY_LD; |
96d56e9f NC |
6251 | if (symbol_get_tc (sym)->symbol_class == -1) |
6252 | symbol_get_tc (sym)->symbol_class = XMC_XO; | |
252b5132 RH |
6253 | } |
6254 | else if (! S_IS_DEFINED (sym)) | |
6255 | { | |
6256 | /* This is an external symbol. */ | |
94352775 AM |
6257 | a->u.auxent.x_csect.x_scnlen.u64 = 0; |
6258 | a->u.auxent.x_csect.x_smtyp = XTY_ER; | |
252b5132 | 6259 | } |
4a403be0 | 6260 | else if (ppc_is_toc_sym (sym)) |
252b5132 RH |
6261 | { |
6262 | symbolS *next; | |
6263 | ||
6264 | /* This is a TOC definition. x_scnlen is the size of the | |
6265 | TOC entry. */ | |
6266 | next = symbol_next (sym); | |
96d56e9f | 6267 | while (symbol_get_tc (next)->symbol_class == XMC_TC0) |
252b5132 RH |
6268 | next = symbol_next (next); |
6269 | if (next == (symbolS *) NULL | |
4a403be0 | 6270 | || (!ppc_is_toc_sym (next))) |
252b5132 RH |
6271 | { |
6272 | if (ppc_after_toc_frag == (fragS *) NULL) | |
94352775 | 6273 | a->u.auxent.x_csect.x_scnlen.u64 |
a2c7ca15 | 6274 | = bfd_section_size (data_section) - S_GET_VALUE (sym); |
252b5132 | 6275 | else |
94352775 | 6276 | a->u.auxent.x_csect.x_scnlen.u64 |
a2c7ca15 | 6277 | = ppc_after_toc_frag->fr_address - S_GET_VALUE (sym); |
252b5132 RH |
6278 | } |
6279 | else | |
6280 | { | |
6386f3a7 | 6281 | resolve_symbol_value (next); |
94352775 | 6282 | a->u.auxent.x_csect.x_scnlen.u64 |
a2c7ca15 | 6283 | = S_GET_VALUE (next) - S_GET_VALUE (sym); |
252b5132 | 6284 | } |
94352775 | 6285 | a->u.auxent.x_csect.x_smtyp = (2 << 3) | XTY_SD; |
252b5132 RH |
6286 | } |
6287 | else | |
6288 | { | |
6289 | symbolS *csect; | |
6290 | ||
6291 | /* This is a normal symbol definition. x_scnlen is the | |
6292 | symbol index of the containing csect. */ | |
6293 | if (S_GET_SEGMENT (sym) == text_section) | |
1b2cb8e2 | 6294 | csect = ppc_xcoff_text_section.csects; |
252b5132 | 6295 | else if (S_GET_SEGMENT (sym) == data_section) |
1b2cb8e2 CC |
6296 | csect = ppc_xcoff_data_section.csects; |
6297 | else if (S_GET_SEGMENT (sym) == ppc_xcoff_tdata_section.segment) | |
6298 | csect = ppc_xcoff_tdata_section.csects; | |
252b5132 RH |
6299 | else |
6300 | abort (); | |
6301 | ||
6302 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 6303 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
6304 | |
6305 | if (csect == (symbolS *) NULL) | |
6306 | { | |
6307 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
94352775 | 6308 | a->u.auxent.x_csect.x_scnlen.u64 = 0; |
252b5132 RH |
6309 | } |
6310 | else | |
6311 | { | |
809ffe0d | 6312 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 6313 | { |
6386f3a7 | 6314 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
6315 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
6316 | > S_GET_VALUE (sym)) | |
252b5132 | 6317 | break; |
809ffe0d | 6318 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
6319 | } |
6320 | ||
94352775 AM |
6321 | a->u.auxent.x_csect.x_scnlen.p |
6322 | = coffsymbol (symbol_get_bfdsym (csect))->native; | |
6323 | a->fix_scnlen = 1; | |
252b5132 | 6324 | } |
94352775 | 6325 | a->u.auxent.x_csect.x_smtyp = XTY_LD; |
252b5132 | 6326 | } |
81d4177b | 6327 | |
94352775 AM |
6328 | a->u.auxent.x_csect.x_parmhash = 0; |
6329 | a->u.auxent.x_csect.x_snhash = 0; | |
96d56e9f | 6330 | if (symbol_get_tc (sym)->symbol_class == -1) |
94352775 | 6331 | a->u.auxent.x_csect.x_smclas = XMC_PR; |
252b5132 | 6332 | else |
94352775 AM |
6333 | a->u.auxent.x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; |
6334 | a->u.auxent.x_csect.x_stab = 0; | |
6335 | a->u.auxent.x_csect.x_snstab = 0; | |
252b5132 RH |
6336 | |
6337 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 6338 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
6339 | } |
6340 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
6341 | { | |
6342 | /* We want the value to be the symbol index of the referenced | |
6343 | csect symbol. BFD will do that for us if we set the right | |
6344 | flags. */ | |
b782de16 AM |
6345 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
6346 | combined_entry_type *c = coffsymbol (bsym)->native; | |
6347 | ||
6348 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 6349 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
6350 | } |
6351 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
6352 | { | |
6353 | symbolS *block; | |
c734e7e3 | 6354 | valueT base; |
252b5132 | 6355 | |
809ffe0d | 6356 | block = symbol_get_tc (sym)->within; |
c734e7e3 TG |
6357 | if (block) |
6358 | { | |
6359 | /* The value is the offset from the enclosing csect. */ | |
6360 | symbolS *csect; | |
6361 | ||
6362 | csect = symbol_get_tc (block)->within; | |
6363 | resolve_symbol_value (csect); | |
6364 | base = S_GET_VALUE (csect); | |
6365 | } | |
6366 | else | |
6367 | base = 0; | |
6368 | ||
6369 | S_SET_VALUE (sym, S_GET_VALUE (sym) - base); | |
252b5132 RH |
6370 | } |
6371 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
6372 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
6373 | { | |
6374 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
6375 | BFD will do that for us if we set the right flags. We have |
6376 | already set the value correctly. */ | |
809ffe0d | 6377 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
6378 | } |
6379 | ||
6380 | return 0; | |
6381 | } | |
6382 | ||
97834047 | 6383 | /* Adjust the symbol table. */ |
252b5132 RH |
6384 | |
6385 | void | |
98027b10 | 6386 | ppc_adjust_symtab (void) |
252b5132 RH |
6387 | { |
6388 | symbolS *sym; | |
97834047 CC |
6389 | symbolS *anchorSym; |
6390 | ||
6391 | /* Make sure C_DWARF symbols come right after C_FILE. | |
6392 | As the C_FILE might not be defined yet and as C_DWARF | |
6393 | might already be ordered, we insert them before the | |
6394 | first symbol which isn't a C_FILE or a C_DWARF. */ | |
6395 | for (anchorSym = symbol_rootP; anchorSym != NULL; | |
6396 | anchorSym = symbol_next (anchorSym)) | |
6397 | { | |
6398 | if (S_GET_STORAGE_CLASS (anchorSym) != C_FILE | |
6399 | && S_GET_STORAGE_CLASS (anchorSym) != C_DWARF) | |
6400 | break; | |
6401 | } | |
6402 | ||
6403 | sym = anchorSym; | |
6404 | while (sym != NULL) | |
6405 | { | |
6406 | if (S_GET_STORAGE_CLASS (sym) != C_DWARF) | |
6407 | { | |
6408 | sym = symbol_next (sym); | |
6409 | continue; | |
6410 | } | |
6411 | ||
6412 | symbolS* tsym = sym; | |
6413 | sym = symbol_next (sym); | |
6414 | ||
6415 | symbol_remove (tsym, &symbol_rootP, &symbol_lastP); | |
6416 | symbol_insert (tsym, anchorSym, &symbol_rootP, &symbol_lastP); | |
6417 | } | |
6418 | ||
6419 | /* Create csect symbols for all absolute symbols. */ | |
252b5132 RH |
6420 | |
6421 | if (! ppc_saw_abs) | |
6422 | return; | |
6423 | ||
6424 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
6425 | { | |
6426 | symbolS *csect; | |
6427 | int i; | |
94352775 | 6428 | combined_entry_type *a; |
252b5132 RH |
6429 | |
6430 | if (S_GET_SEGMENT (sym) != absolute_section) | |
6431 | continue; | |
6432 | ||
6433 | csect = symbol_create (".abs[XO]", absolute_section, | |
e01e1cee | 6434 | &zero_address_frag, S_GET_VALUE (sym)); |
809ffe0d | 6435 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
6436 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
6437 | i = S_GET_NUMBER_AUXILIARY (csect); | |
6438 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
94352775 AM |
6439 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1]; |
6440 | a->u.auxent.x_csect.x_scnlen.u64 = 0; | |
6441 | a->u.auxent.x_csect.x_smtyp = XTY_SD; | |
6442 | a->u.auxent.x_csect.x_parmhash = 0; | |
6443 | a->u.auxent.x_csect.x_snhash = 0; | |
6444 | a->u.auxent.x_csect.x_smclas = XMC_XO; | |
6445 | a->u.auxent.x_csect.x_stab = 0; | |
6446 | a->u.auxent.x_csect.x_snstab = 0; | |
252b5132 RH |
6447 | |
6448 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
6449 | ||
6450 | i = S_GET_NUMBER_AUXILIARY (sym); | |
94352775 AM |
6451 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i]; |
6452 | a->u.auxent.x_csect.x_scnlen.p | |
6453 | = coffsymbol (symbol_get_bfdsym (csect))->native; | |
6454 | a->fix_scnlen = 1; | |
252b5132 RH |
6455 | } |
6456 | ||
5b7c81bd | 6457 | ppc_saw_abs = false; |
252b5132 RH |
6458 | } |
6459 | ||
6460 | /* Set the VMA for a section. This is called on all the sections in | |
6461 | turn. */ | |
6462 | ||
6463 | void | |
98027b10 | 6464 | ppc_frob_section (asection *sec) |
252b5132 | 6465 | { |
931e13a6 | 6466 | static bfd_vma vma = 0; |
252b5132 | 6467 | |
85645aed | 6468 | /* Dwarf sections start at 0. */ |
fd361982 | 6469 | if (bfd_section_flags (sec) & SEC_DEBUGGING) |
85645aed TG |
6470 | return; |
6471 | ||
931e13a6 | 6472 | vma = md_section_align (sec, vma); |
fd361982 AM |
6473 | bfd_set_section_vma (sec, vma); |
6474 | vma += bfd_section_size (sec); | |
252b5132 RH |
6475 | } |
6476 | ||
6477 | #endif /* OBJ_XCOFF */ | |
6478 | \f | |
6d4af3c2 | 6479 | const char * |
98027b10 | 6480 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 6481 | { |
499ac353 | 6482 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
6483 | } |
6484 | ||
6485 | /* Write a value out to the object file, using the appropriate | |
6486 | endianness. */ | |
6487 | ||
6488 | void | |
98027b10 | 6489 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
6490 | { |
6491 | if (target_big_endian) | |
6492 | number_to_chars_bigendian (buf, val, n); | |
6493 | else | |
6494 | number_to_chars_littleendian (buf, val, n); | |
6495 | } | |
6496 | ||
6497 | /* Align a section (I don't know why this is machine dependent). */ | |
6498 | ||
6499 | valueT | |
3aeeedbb | 6500 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 6501 | { |
3aeeedbb AM |
6502 | #ifdef OBJ_ELF |
6503 | return addr; | |
6504 | #else | |
fd361982 | 6505 | int align = bfd_section_alignment (seg); |
252b5132 | 6506 | |
8d3842cd | 6507 | return ((addr + (1 << align) - 1) & -(1 << align)); |
3aeeedbb | 6508 | #endif |
252b5132 RH |
6509 | } |
6510 | ||
6511 | /* We don't have any form of relaxing. */ | |
6512 | ||
6513 | int | |
98027b10 AM |
6514 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
6515 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
6516 | { |
6517 | abort (); | |
6518 | return 0; | |
6519 | } | |
6520 | ||
6521 | /* Convert a machine dependent frag. We never generate these. */ | |
6522 | ||
6523 | void | |
98027b10 AM |
6524 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
6525 | asection *sec ATTRIBUTE_UNUSED, | |
6526 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
6527 | { |
6528 | abort (); | |
6529 | } | |
6530 | ||
6531 | /* We have no need to default values of symbols. */ | |
6532 | ||
252b5132 | 6533 | symbolS * |
98027b10 | 6534 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
6535 | { |
6536 | return 0; | |
6537 | } | |
6538 | \f | |
6539 | /* Functions concerning relocs. */ | |
6540 | ||
6541 | /* The location from which a PC relative jump should be calculated, | |
6542 | given a PC relative reloc. */ | |
6543 | ||
6544 | long | |
98027b10 | 6545 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
6546 | { |
6547 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
6548 | } | |
6549 | ||
6550 | #ifdef OBJ_XCOFF | |
6551 | ||
c5df7e44 CC |
6552 | /* Return the surrending csect for sym when possible. */ |
6553 | ||
6554 | static symbolS* | |
6555 | ppc_get_csect_to_adjust (symbolS *sym) | |
6556 | { | |
6557 | if (sym == NULL) | |
6558 | return NULL; | |
6559 | ||
6560 | valueT val = resolve_symbol_value (sym); | |
6561 | TC_SYMFIELD_TYPE *tc = symbol_get_tc (sym); | |
6562 | segT symseg = S_GET_SEGMENT (sym); | |
6563 | ||
6564 | if (tc->subseg == 0 | |
6565 | && tc->symbol_class != XMC_TC0 | |
6566 | && tc->symbol_class != XMC_TC | |
6567 | && tc->symbol_class != XMC_TE | |
6568 | && symseg != bss_section | |
6569 | && symseg != ppc_xcoff_tbss_section.segment | |
6570 | /* Don't adjust if this is a reloc in the toc section. */ | |
6571 | && (symseg != data_section | |
6572 | || ppc_toc_csect == NULL | |
6573 | || val < ppc_toc_frag->fr_address | |
6574 | || (ppc_after_toc_frag != NULL | |
6575 | && val >= ppc_after_toc_frag->fr_address))) | |
6576 | { | |
6577 | symbolS* csect = tc->within; | |
6578 | ||
6579 | /* If the symbol was not declared by a label (eg: a section symbol), | |
6580 | use the section instead of the csect. This doesn't happen in | |
6581 | normal AIX assembly code. */ | |
6582 | if (csect == NULL) | |
6583 | csect = seg_info (symseg)->sym; | |
6584 | ||
6585 | return csect; | |
6586 | } | |
6587 | ||
6588 | return NULL; | |
6589 | } | |
6590 | ||
252b5132 RH |
6591 | /* This is called to see whether a fixup should be adjusted to use a |
6592 | section symbol. We take the opportunity to change a fixup against | |
6593 | a symbol in the TOC subsegment into a reloc against the | |
6594 | corresponding .tc symbol. */ | |
6595 | ||
6596 | int | |
98027b10 | 6597 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6598 | { |
b782de16 AM |
6599 | valueT val = resolve_symbol_value (fix->fx_addsy); |
6600 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
c5df7e44 | 6601 | symbolS* csect; |
b782de16 AM |
6602 | |
6603 | if (symseg == absolute_section) | |
6604 | return 0; | |
252b5132 | 6605 | |
85645aed | 6606 | /* Always adjust symbols in debugging sections. */ |
fd361982 | 6607 | if (bfd_section_flags (symseg) & SEC_DEBUGGING) |
85645aed TG |
6608 | return 1; |
6609 | ||
252b5132 | 6610 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 6611 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 6612 | && symseg == data_section |
252b5132 RH |
6613 | && val >= ppc_toc_frag->fr_address |
6614 | && (ppc_after_toc_frag == (fragS *) NULL | |
6615 | || val < ppc_after_toc_frag->fr_address)) | |
6616 | { | |
6617 | symbolS *sy; | |
6618 | ||
6619 | for (sy = symbol_next (ppc_toc_csect); | |
6620 | sy != (symbolS *) NULL; | |
6621 | sy = symbol_next (sy)) | |
6622 | { | |
b782de16 AM |
6623 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
6624 | ||
96d56e9f | 6625 | if (sy_tc->symbol_class == XMC_TC0) |
252b5132 | 6626 | continue; |
4a403be0 CC |
6627 | if (sy_tc->symbol_class != XMC_TC |
6628 | && sy_tc->symbol_class != XMC_TE) | |
252b5132 | 6629 | break; |
b782de16 | 6630 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
6631 | { |
6632 | fix->fx_addsy = sy; | |
6633 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
6634 | return 0; | |
6635 | } | |
6636 | } | |
6637 | ||
6638 | as_bad_where (fix->fx_file, fix->fx_line, | |
6639 | _("symbol in .toc does not match any .tc")); | |
6640 | } | |
6641 | ||
6642 | /* Possibly adjust the reloc to be against the csect. */ | |
c5df7e44 | 6643 | if ((csect = ppc_get_csect_to_adjust (fix->fx_addsy)) != NULL) |
252b5132 | 6644 | { |
2fb4b302 TG |
6645 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
6646 | fix->fx_addsy = csect; | |
c5df7e44 | 6647 | } |
252b5132 | 6648 | |
c5df7e44 CC |
6649 | if ((csect = ppc_get_csect_to_adjust (fix->fx_subsy)) != NULL) |
6650 | { | |
6651 | fix->fx_offset -= resolve_symbol_value (fix->fx_subsy) | |
6652 | - symbol_get_frag (csect)->fr_address; | |
6653 | fix->fx_subsy = csect; | |
252b5132 RH |
6654 | } |
6655 | ||
6656 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
6657 | .lcomm. */ | |
b782de16 | 6658 | if (symseg == bss_section |
bcf84703 CC |
6659 | && ! S_IS_EXTERNAL (fix->fx_addsy) |
6660 | && symbol_get_tc (fix->fx_addsy)->subseg == 0) | |
252b5132 | 6661 | { |
b782de16 AM |
6662 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
6663 | ||
6664 | fix->fx_offset += val - resolve_symbol_value (sy); | |
6665 | fix->fx_addsy = sy; | |
252b5132 RH |
6666 | } |
6667 | ||
6668 | return 0; | |
6669 | } | |
6670 | ||
6671 | /* A reloc from one csect to another must be kept. The assembler | |
6672 | will, of course, keep relocs between sections, and it will keep | |
6673 | absolute relocs, but we need to force it to keep PC relative relocs | |
6674 | between two csects in the same section. */ | |
6675 | ||
6676 | int | |
98027b10 | 6677 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
6678 | { |
6679 | /* At this point fix->fx_addsy should already have been converted to | |
6680 | a csect symbol. If the csect does not include the fragment, then | |
6681 | we need to force the relocation. */ | |
6682 | if (fix->fx_pcrel | |
6683 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
6684 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
6685 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
6686 | > fix->fx_frag->fr_address) | |
6687 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
6688 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
6689 | <= fix->fx_frag->fr_address)))) |
6690 | return 1; | |
6691 | ||
ae6063d4 | 6692 | return generic_force_reloc (fix); |
252b5132 | 6693 | } |
252b5132 RH |
6694 | #endif /* OBJ_XCOFF */ |
6695 | ||
0baf16f2 | 6696 | #ifdef OBJ_ELF |
a161fe53 AM |
6697 | /* If this function returns non-zero, it guarantees that a relocation |
6698 | will be emitted for a fixup. */ | |
6699 | ||
6700 | int | |
98027b10 | 6701 | ppc_force_relocation (fixS *fix) |
a161fe53 | 6702 | { |
a161fe53 AM |
6703 | switch (fix->fx_r_type) |
6704 | { | |
6705 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6706 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6707 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6708 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 6709 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 6710 | case BFD_RELOC_PPC64_TOC: |
8b168f1a AM |
6711 | case BFD_RELOC_16_GOTOFF: |
6712 | case BFD_RELOC_LO16_GOTOFF: | |
6713 | case BFD_RELOC_HI16_GOTOFF: | |
6714 | case BFD_RELOC_HI16_S_GOTOFF: | |
6715 | case BFD_RELOC_LO16_PLTOFF: | |
6716 | case BFD_RELOC_HI16_PLTOFF: | |
6717 | case BFD_RELOC_HI16_S_PLTOFF: | |
6718 | case BFD_RELOC_GPREL16: | |
6719 | case BFD_RELOC_16_BASEREL: | |
6720 | case BFD_RELOC_LO16_BASEREL: | |
6721 | case BFD_RELOC_HI16_BASEREL: | |
6722 | case BFD_RELOC_HI16_S_BASEREL: | |
6723 | case BFD_RELOC_PPC_TOC16: | |
6724 | case BFD_RELOC_PPC64_TOC16_LO: | |
6725 | case BFD_RELOC_PPC64_TOC16_HI: | |
6726 | case BFD_RELOC_PPC64_TOC16_HA: | |
6727 | case BFD_RELOC_PPC64_PLTGOT16: | |
6728 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
6729 | case BFD_RELOC_PPC64_PLTGOT16_HI: | |
6730 | case BFD_RELOC_PPC64_PLTGOT16_HA: | |
6731 | case BFD_RELOC_PPC64_GOT16_DS: | |
6732 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6733 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6734 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6735 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6736 | case BFD_RELOC_PPC64_TOC16_DS: | |
6737 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6738 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6739 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
6740 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6741 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6742 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6743 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6744 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6745 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6746 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6747 | case BFD_RELOC_PPC_EMB_SDA21: | |
6748 | case BFD_RELOC_PPC_EMB_MRKREF: | |
6749 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6750 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6751 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6752 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6753 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6754 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6755 | case BFD_RELOC_PPC_VLE_SDA21: | |
6756 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6757 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6758 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
6759 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6760 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
6761 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6762 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
49c3ed08 AM |
6763 | case BFD_RELOC_PPC64_PLT_PCREL34: |
6764 | case BFD_RELOC_PPC64_GOT_PCREL34: | |
a161fe53 | 6765 | return 1; |
6911b7dc AM |
6766 | case BFD_RELOC_PPC_B26: |
6767 | case BFD_RELOC_PPC_BA26: | |
6768 | case BFD_RELOC_PPC_B16: | |
6769 | case BFD_RELOC_PPC_BA16: | |
05d0e962 | 6770 | case BFD_RELOC_PPC64_REL24_NOTOC: |
7aba54da | 6771 | case BFD_RELOC_PPC64_REL24_P9NOTOC: |
6911b7dc AM |
6772 | /* All branch fixups targeting a localentry symbol must |
6773 | force a relocation. */ | |
6774 | if (fix->fx_addsy) | |
6775 | { | |
6776 | asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); | |
c1229f84 | 6777 | elf_symbol_type *elfsym = elf_symbol_from (bfdsym); |
6911b7dc AM |
6778 | gas_assert (elfsym); |
6779 | if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) | |
6780 | return 1; | |
6781 | } | |
6782 | break; | |
a161fe53 AM |
6783 | default: |
6784 | break; | |
6785 | } | |
6786 | ||
cdba85ec | 6787 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
c213164a | 6788 | && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL) |
cdba85ec AM |
6789 | return 1; |
6790 | ||
ae6063d4 | 6791 | return generic_force_reloc (fix); |
a161fe53 AM |
6792 | } |
6793 | ||
0baf16f2 | 6794 | int |
98027b10 | 6795 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6796 | { |
6911b7dc AM |
6797 | switch (fix->fx_r_type) |
6798 | { | |
6799 | /* All branch fixups targeting a localentry symbol must | |
6800 | continue using the symbol. */ | |
6801 | case BFD_RELOC_PPC_B26: | |
6802 | case BFD_RELOC_PPC_BA26: | |
6803 | case BFD_RELOC_PPC_B16: | |
6804 | case BFD_RELOC_PPC_BA16: | |
6805 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6806 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6807 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6808 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
05d0e962 | 6809 | case BFD_RELOC_PPC64_REL24_NOTOC: |
7aba54da | 6810 | case BFD_RELOC_PPC64_REL24_P9NOTOC: |
6911b7dc AM |
6811 | if (fix->fx_addsy) |
6812 | { | |
6813 | asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); | |
c1229f84 | 6814 | elf_symbol_type *elfsym = elf_symbol_from (bfdsym); |
6911b7dc AM |
6815 | gas_assert (elfsym); |
6816 | if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) | |
6817 | return 0; | |
6818 | } | |
6819 | break; | |
6820 | default: | |
6821 | break; | |
6822 | } | |
6823 | ||
0baf16f2 AM |
6824 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
6825 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
6826 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
6827 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
cc9edbf3 AM |
6828 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS |
6829 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS | |
5663e321 | 6830 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT_PCREL34 |
334d91b9 AM |
6831 | && fix->fx_r_type != BFD_RELOC_24_PLT_PCREL |
6832 | && fix->fx_r_type != BFD_RELOC_32_PLTOFF | |
6833 | && fix->fx_r_type != BFD_RELOC_32_PLT_PCREL | |
6834 | && fix->fx_r_type != BFD_RELOC_LO16_PLTOFF | |
6835 | && fix->fx_r_type != BFD_RELOC_HI16_PLTOFF | |
6836 | && fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF | |
6837 | && fix->fx_r_type != BFD_RELOC_64_PLTOFF | |
6838 | && fix->fx_r_type != BFD_RELOC_64_PLT_PCREL | |
6839 | && fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS | |
5663e321 | 6840 | && fix->fx_r_type != BFD_RELOC_PPC64_PLT_PCREL34 |
334d91b9 AM |
6841 | && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16 |
6842 | && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO | |
6843 | && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI | |
6844 | && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA | |
6845 | && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS | |
6846 | && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS | |
0baf16f2 | 6847 | && fix->fx_r_type != BFD_RELOC_GPREL16 |
334d91b9 AM |
6848 | && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A |
6849 | && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A | |
6850 | && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A | |
0baf16f2 AM |
6851 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT |
6852 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 6853 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
c213164a | 6854 | && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL)); |
252b5132 | 6855 | } |
0baf16f2 | 6856 | #endif |
252b5132 | 6857 | |
b9c361e0 JL |
6858 | void |
6859 | ppc_frag_check (struct frag *fragP) | |
6860 | { | |
a9479dc0 AM |
6861 | if ((fragP->fr_address & fragP->insn_addr) != 0) |
6862 | as_bad_where (fragP->fr_file, fragP->fr_line, | |
6863 | _("instruction address is not a multiple of %d"), | |
6864 | fragP->insn_addr + 1); | |
b9c361e0 JL |
6865 | } |
6866 | ||
22f72c48 AM |
6867 | /* rs_align_code frag handling. */ |
6868 | ||
6869 | enum ppc_nop_encoding_for_rs_align_code | |
6870 | { | |
6871 | PPC_NOP_VANILLA, | |
6872 | PPC_NOP_VLE, | |
6873 | PPC_NOP_GROUP_P6, | |
6874 | PPC_NOP_GROUP_P7 | |
6875 | }; | |
6876 | ||
6877 | unsigned int | |
6878 | ppc_nop_select (void) | |
6879 | { | |
6880 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) | |
6881 | return PPC_NOP_VLE; | |
6882 | if ((ppc_cpu & (PPC_OPCODE_POWER9 | PPC_OPCODE_E500MC)) == 0) | |
6883 | { | |
6884 | if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) | |
6885 | return PPC_NOP_GROUP_P7; | |
6886 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0) | |
6887 | return PPC_NOP_GROUP_P6; | |
6888 | } | |
6889 | return PPC_NOP_VANILLA; | |
6890 | } | |
3aeeedbb AM |
6891 | |
6892 | void | |
6893 | ppc_handle_align (struct frag *fragP) | |
6894 | { | |
6895 | valueT count = (fragP->fr_next->fr_address | |
6896 | - (fragP->fr_address + fragP->fr_fix)); | |
22f72c48 AM |
6897 | char *dest = fragP->fr_literal + fragP->fr_fix; |
6898 | enum ppc_nop_encoding_for_rs_align_code nop_select = *dest & 0xff; | |
6899 | ||
6900 | /* Pad with zeros if not inserting a whole number of instructions. | |
6901 | We could pad with zeros up to an instruction boundary then follow | |
6902 | with nops but odd counts indicate data in an executable section | |
6903 | so padding with zeros is most appropriate. */ | |
6904 | if (count == 0 | |
de626965 | 6905 | || (nop_select == PPC_NOP_VLE ? (count & 1) != 0 : (count & 3) != 0)) |
22f72c48 AM |
6906 | { |
6907 | *dest = 0; | |
6908 | return; | |
6909 | } | |
3aeeedbb | 6910 | |
22f72c48 | 6911 | if (nop_select == PPC_NOP_VLE) |
b9c361e0 | 6912 | { |
b9c361e0 JL |
6913 | |
6914 | fragP->fr_var = 2; | |
6915 | md_number_to_chars (dest, 0x4400, 2); | |
6916 | } | |
22f72c48 | 6917 | else |
3aeeedbb | 6918 | { |
3aeeedbb | 6919 | fragP->fr_var = 4; |
cef4f754 AM |
6920 | |
6921 | if (count > 4 * nop_limit && count < 0x2000000) | |
6922 | { | |
6923 | struct frag *rest; | |
6924 | ||
6925 | /* Make a branch, then follow with nops. Insert another | |
6926 | frag to handle the nops. */ | |
6927 | md_number_to_chars (dest, 0x48000000 + count, 4); | |
6928 | count -= 4; | |
6929 | if (count == 0) | |
6930 | return; | |
6931 | ||
6932 | rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6933 | memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); | |
6934 | fragP->fr_next = rest; | |
6935 | fragP = rest; | |
6936 | rest->fr_address += rest->fr_fix + 4; | |
6937 | rest->fr_fix = 0; | |
6938 | /* If we leave the next frag as rs_align_code we'll come here | |
6939 | again, resulting in a bunch of branches rather than a | |
6940 | branch followed by nops. */ | |
6941 | rest->fr_type = rs_align; | |
6942 | dest = rest->fr_literal; | |
6943 | } | |
6944 | ||
3aeeedbb AM |
6945 | md_number_to_chars (dest, 0x60000000, 4); |
6946 | ||
22f72c48 | 6947 | if (nop_select >= PPC_NOP_GROUP_P6) |
3aeeedbb | 6948 | { |
3fea0c3b AM |
6949 | /* For power6, power7, and power8, we want the last nop to |
6950 | be a group terminating one. Do this by inserting an | |
6951 | rs_fill frag immediately after this one, with its address | |
6952 | set to the last nop location. This will automatically | |
6953 | reduce the number of nops in the current frag by one. */ | |
3aeeedbb AM |
6954 | if (count > 4) |
6955 | { | |
6956 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6957 | ||
6958 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
6959 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
6960 | group_nop->fr_fix = 0; | |
6961 | group_nop->fr_offset = 1; | |
6962 | group_nop->fr_type = rs_fill; | |
6963 | fragP->fr_next = group_nop; | |
6964 | dest = group_nop->fr_literal; | |
6965 | } | |
6966 | ||
22f72c48 | 6967 | if (nop_select == PPC_NOP_GROUP_P6) |
42240548 PB |
6968 | /* power6 group terminating nop: "ori 1,1,0". */ |
6969 | md_number_to_chars (dest, 0x60210000, 4); | |
22f72c48 AM |
6970 | else |
6971 | /* power7/power8 group terminating nop: "ori 2,2,0". */ | |
6972 | md_number_to_chars (dest, 0x60420000, 4); | |
3aeeedbb AM |
6973 | } |
6974 | } | |
6975 | } | |
6976 | ||
252b5132 | 6977 | /* Apply a fixup to the object code. This is called for all the |
3b8b57a9 | 6978 | fixups we generated by the calls to fix_new_exp, above. */ |
252b5132 | 6979 | |
94f592af | 6980 | void |
62ebcb5c | 6981 | md_apply_fix (fixS *fixP, valueT *valP, segT seg) |
252b5132 | 6982 | { |
94f592af | 6983 | valueT value = * valP; |
5656a981 AM |
6984 | offsetT fieldval; |
6985 | const struct powerpc_operand *operand; | |
252b5132 RH |
6986 | |
6987 | #ifdef OBJ_ELF | |
94f592af | 6988 | if (fixP->fx_addsy != NULL) |
252b5132 | 6989 | { |
a161fe53 | 6990 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
6991 | if (fixP->fx_pcrel) |
6992 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
a680de9a PB |
6993 | |
6994 | if (fixP->fx_addsy == abs_section_sym) | |
6995 | fixP->fx_done = 1; | |
252b5132 RH |
6996 | } |
6997 | else | |
94f592af | 6998 | fixP->fx_done = 1; |
252b5132 | 6999 | #else |
a161fe53 | 7000 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
7001 | the symbol values. If we are doing this relocation the code in |
7002 | write.c is going to call bfd_install_relocation, which is also | |
7003 | going to use the symbol value. That means that if the reloc is | |
7004 | fully resolved we want to use *valP since bfd_install_relocation is | |
7005 | not being used. | |
9f0eb232 RS |
7006 | However, if the reloc is not fully resolved we do not want to |
7007 | use *valP, and must use fx_offset instead. If the relocation | |
7008 | is PC-relative, we then need to re-apply md_pcrel_from_section | |
7009 | to this new relocation value. */ | |
94f592af NC |
7010 | if (fixP->fx_addsy == (symbolS *) NULL) |
7011 | fixP->fx_done = 1; | |
7012 | ||
252b5132 | 7013 | else |
9f0eb232 RS |
7014 | { |
7015 | value = fixP->fx_offset; | |
7016 | if (fixP->fx_pcrel) | |
7017 | value -= md_pcrel_from_section (fixP, seg); | |
7018 | } | |
a161fe53 AM |
7019 | #endif |
7020 | ||
7ba71655 AM |
7021 | /* We are only able to convert some relocs to pc-relative. */ |
7022 | if (fixP->fx_pcrel) | |
7023 | { | |
7024 | switch (fixP->fx_r_type) | |
7025 | { | |
4a969973 AM |
7026 | case BFD_RELOC_64: |
7027 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
7028 | break; | |
7029 | ||
7030 | case BFD_RELOC_32: | |
7031 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
7032 | break; | |
7033 | ||
7034 | case BFD_RELOC_16: | |
7035 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
7036 | break; | |
7037 | ||
7ba71655 AM |
7038 | case BFD_RELOC_LO16: |
7039 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
7040 | break; | |
7041 | ||
7042 | case BFD_RELOC_HI16: | |
7043 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; | |
7044 | break; | |
7045 | ||
7046 | case BFD_RELOC_HI16_S: | |
7047 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; | |
7048 | break; | |
7049 | ||
4a969973 AM |
7050 | case BFD_RELOC_PPC64_ADDR16_HIGH: |
7051 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGH; | |
7ba71655 AM |
7052 | break; |
7053 | ||
4a969973 AM |
7054 | case BFD_RELOC_PPC64_ADDR16_HIGHA: |
7055 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHA; | |
7ba71655 AM |
7056 | break; |
7057 | ||
4a969973 AM |
7058 | case BFD_RELOC_PPC64_HIGHER: |
7059 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER; | |
7060 | break; | |
7061 | ||
7062 | case BFD_RELOC_PPC64_HIGHER_S: | |
7063 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA; | |
7064 | break; | |
7065 | ||
7066 | case BFD_RELOC_PPC64_HIGHEST: | |
7067 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST; | |
7068 | break; | |
7069 | ||
7070 | case BFD_RELOC_PPC64_HIGHEST_S: | |
7071 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA; | |
7ba71655 AM |
7072 | break; |
7073 | ||
5663e321 AM |
7074 | case BFD_RELOC_PPC64_ADDR16_HIGHER34: |
7075 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER34; | |
7076 | break; | |
7077 | ||
7078 | case BFD_RELOC_PPC64_ADDR16_HIGHERA34: | |
7079 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA34; | |
7080 | break; | |
7081 | ||
7082 | case BFD_RELOC_PPC64_ADDR16_HIGHEST34: | |
7083 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST34; | |
7084 | break; | |
7085 | ||
7086 | case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: | |
7087 | fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA34; | |
7088 | break; | |
7089 | ||
7ba71655 AM |
7090 | case BFD_RELOC_PPC_16DX_HA: |
7091 | fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; | |
7092 | break; | |
7093 | ||
5663e321 AM |
7094 | case BFD_RELOC_PPC64_D34: |
7095 | fixP->fx_r_type = BFD_RELOC_PPC64_PCREL34; | |
7096 | break; | |
7097 | ||
7098 | case BFD_RELOC_PPC64_D28: | |
7099 | fixP->fx_r_type = BFD_RELOC_PPC64_PCREL28; | |
7100 | break; | |
7101 | ||
7ba71655 AM |
7102 | default: |
7103 | break; | |
7104 | } | |
7105 | } | |
7106 | else if (!fixP->fx_done | |
7107 | && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA) | |
252b5132 | 7108 | { |
7ba71655 AM |
7109 | /* addpcis is relative to next insn address. */ |
7110 | value -= 4; | |
7111 | fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; | |
7112 | fixP->fx_pcrel = 1; | |
252b5132 | 7113 | } |
252b5132 | 7114 | |
5656a981 | 7115 | operand = NULL; |
3b8b57a9 | 7116 | if (fixP->fx_pcrel_adjust != 0) |
252b5132 | 7117 | { |
5656a981 | 7118 | /* This is a fixup on an instruction. */ |
8e5eb8e1 | 7119 | ppc_opindex_t opindex = fixP->fx_pcrel_adjust & PPC_OPINDEX_MAX; |
252b5132 | 7120 | |
5656a981 | 7121 | operand = &powerpc_operands[opindex]; |
252b5132 | 7122 | #ifdef OBJ_XCOFF |
0baf16f2 AM |
7123 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
7124 | does not generate a reloc. It uses the offset of `sym' within its | |
7125 | csect. Other usages, such as `.long sym', generate relocs. This | |
7126 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 7127 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 7128 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 7129 | && operand->shift == 0 |
2b3c4602 | 7130 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
7131 | && fixP->fx_addsy != NULL |
7132 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
4a403be0 | 7133 | && !ppc_is_toc_sym (fixP->fx_addsy) |
94f592af | 7134 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) |
252b5132 | 7135 | { |
94f592af NC |
7136 | value = fixP->fx_offset; |
7137 | fixP->fx_done = 1; | |
252b5132 | 7138 | } |
ac21e7da TG |
7139 | |
7140 | /* During parsing of instructions, a TOC16 reloc is generated for | |
7141 | instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined | |
7142 | in the toc. But at parse time, SYM may be not yet defined, so | |
7143 | check again here. */ | |
7144 | if (fixP->fx_r_type == BFD_RELOC_16 | |
7145 | && fixP->fx_addsy != NULL | |
7146 | && ppc_is_toc_sym (fixP->fx_addsy)) | |
4a403be0 | 7147 | fixP->fx_r_type = BFD_RELOC_PPC_TOC16; |
252b5132 | 7148 | #endif |
5656a981 AM |
7149 | } |
7150 | ||
7151 | /* Calculate value to be stored in field. */ | |
7152 | fieldval = value; | |
7153 | switch (fixP->fx_r_type) | |
7154 | { | |
1ec2d25e | 7155 | #ifdef OBJ_ELF |
5656a981 AM |
7156 | case BFD_RELOC_PPC64_ADDR16_LO_DS: |
7157 | case BFD_RELOC_PPC_VLE_LO16A: | |
7158 | case BFD_RELOC_PPC_VLE_LO16D: | |
1ec2d25e | 7159 | #endif |
5656a981 AM |
7160 | case BFD_RELOC_LO16: |
7161 | case BFD_RELOC_LO16_PCREL: | |
7162 | fieldval = value & 0xffff; | |
7163 | sign_extend_16: | |
7164 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
f9c6b907 | 7165 | fieldval = SEX16 (fieldval); |
5656a981 AM |
7166 | fixP->fx_no_overflow = 1; |
7167 | break; | |
3c9d25f4 | 7168 | |
f9c6b907 AM |
7169 | case BFD_RELOC_HI16: |
7170 | case BFD_RELOC_HI16_PCREL: | |
5656a981 | 7171 | #ifdef OBJ_ELF |
f9c6b907 AM |
7172 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
7173 | { | |
7174 | fieldval = value >> 16; | |
7175 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
7176 | { | |
7177 | valueT sign = (((valueT) -1 >> 16) + 1) >> 1; | |
7178 | fieldval = ((valueT) fieldval ^ sign) - sign; | |
7179 | } | |
7180 | break; | |
7181 | } | |
2b0f3761 | 7182 | /* Fallthru */ |
f9c6b907 | 7183 | |
5656a981 AM |
7184 | case BFD_RELOC_PPC_VLE_HI16A: |
7185 | case BFD_RELOC_PPC_VLE_HI16D: | |
f9c6b907 | 7186 | case BFD_RELOC_PPC64_ADDR16_HIGH: |
5656a981 | 7187 | #endif |
5656a981 AM |
7188 | fieldval = PPC_HI (value); |
7189 | goto sign_extend_16; | |
0baf16f2 | 7190 | |
f9c6b907 AM |
7191 | case BFD_RELOC_HI16_S: |
7192 | case BFD_RELOC_HI16_S_PCREL: | |
7ba71655 | 7193 | case BFD_RELOC_PPC_16DX_HA: |
a680de9a | 7194 | case BFD_RELOC_PPC_REL16DX_HA: |
5656a981 | 7195 | #ifdef OBJ_ELF |
f9c6b907 AM |
7196 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
7197 | { | |
7198 | fieldval = (value + 0x8000) >> 16; | |
7199 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
7200 | { | |
7201 | valueT sign = (((valueT) -1 >> 16) + 1) >> 1; | |
7202 | fieldval = ((valueT) fieldval ^ sign) - sign; | |
7203 | } | |
7204 | break; | |
7205 | } | |
2b0f3761 | 7206 | /* Fallthru */ |
f9c6b907 | 7207 | |
5656a981 AM |
7208 | case BFD_RELOC_PPC_VLE_HA16A: |
7209 | case BFD_RELOC_PPC_VLE_HA16D: | |
f9c6b907 | 7210 | case BFD_RELOC_PPC64_ADDR16_HIGHA: |
5656a981 | 7211 | #endif |
5656a981 AM |
7212 | fieldval = PPC_HA (value); |
7213 | goto sign_extend_16; | |
0baf16f2 | 7214 | |
3b8b57a9 | 7215 | #ifdef OBJ_ELF |
5656a981 AM |
7216 | case BFD_RELOC_PPC64_HIGHER: |
7217 | fieldval = PPC_HIGHER (value); | |
7218 | goto sign_extend_16; | |
252b5132 | 7219 | |
5656a981 AM |
7220 | case BFD_RELOC_PPC64_HIGHER_S: |
7221 | fieldval = PPC_HIGHERA (value); | |
7222 | goto sign_extend_16; | |
0baf16f2 | 7223 | |
5656a981 AM |
7224 | case BFD_RELOC_PPC64_HIGHEST: |
7225 | fieldval = PPC_HIGHEST (value); | |
7226 | goto sign_extend_16; | |
0baf16f2 | 7227 | |
5656a981 AM |
7228 | case BFD_RELOC_PPC64_HIGHEST_S: |
7229 | fieldval = PPC_HIGHESTA (value); | |
7230 | goto sign_extend_16; | |
7231 | #endif | |
7232 | ||
7233 | default: | |
7234 | break; | |
7235 | } | |
7236 | ||
7237 | if (operand != NULL) | |
7238 | { | |
7239 | /* Handle relocs in an insn. */ | |
5656a981 AM |
7240 | switch (fixP->fx_r_type) |
7241 | { | |
7fa9fcb6 | 7242 | #ifdef OBJ_ELF |
3b8b57a9 AM |
7243 | /* The following relocs can't be calculated by the assembler. |
7244 | Leave the field zero. */ | |
cdba85ec AM |
7245 | case BFD_RELOC_PPC_TPREL16: |
7246 | case BFD_RELOC_PPC_TPREL16_LO: | |
7247 | case BFD_RELOC_PPC_TPREL16_HI: | |
7248 | case BFD_RELOC_PPC_TPREL16_HA: | |
cdba85ec AM |
7249 | case BFD_RELOC_PPC_DTPREL16: |
7250 | case BFD_RELOC_PPC_DTPREL16_LO: | |
7251 | case BFD_RELOC_PPC_DTPREL16_HI: | |
7252 | case BFD_RELOC_PPC_DTPREL16_HA: | |
cdba85ec AM |
7253 | case BFD_RELOC_PPC_GOT_TLSGD16: |
7254 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
7255 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
7256 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
7257 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
7258 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
7259 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
7260 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
7261 | case BFD_RELOC_PPC_GOT_TPREL16: | |
7262 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
7263 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
7264 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
7265 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
7266 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
7267 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
7268 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
7269 | case BFD_RELOC_PPC64_TPREL16_DS: | |
7270 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
f9c6b907 AM |
7271 | case BFD_RELOC_PPC64_TPREL16_HIGH: |
7272 | case BFD_RELOC_PPC64_TPREL16_HIGHA: | |
cdba85ec AM |
7273 | case BFD_RELOC_PPC64_TPREL16_HIGHER: |
7274 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
7275 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
7276 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
f9c6b907 AM |
7277 | case BFD_RELOC_PPC64_DTPREL16_HIGH: |
7278 | case BFD_RELOC_PPC64_DTPREL16_HIGHA: | |
cdba85ec AM |
7279 | case BFD_RELOC_PPC64_DTPREL16_DS: |
7280 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
7281 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
7282 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
7283 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
7284 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
c213164a AM |
7285 | case BFD_RELOC_PPC64_TPREL34: |
7286 | case BFD_RELOC_PPC64_DTPREL34: | |
87c69f97 AM |
7287 | case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: |
7288 | case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: | |
7289 | case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: | |
7290 | case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: | |
3b8b57a9 | 7291 | gas_assert (fixP->fx_addsy != NULL); |
7c1d0959 | 7292 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3b8b57a9 | 7293 | fieldval = 0; |
cdba85ec | 7294 | break; |
3b8b57a9 AM |
7295 | |
7296 | /* These also should leave the field zero for the same | |
7297 | reason. Note that older versions of gas wrote values | |
7298 | here. If we want to go back to the old behaviour, then | |
7299 | all _LO and _LO_DS cases will need to be treated like | |
7300 | BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ | |
7301 | case BFD_RELOC_16_GOTOFF: | |
7302 | case BFD_RELOC_LO16_GOTOFF: | |
7303 | case BFD_RELOC_HI16_GOTOFF: | |
7304 | case BFD_RELOC_HI16_S_GOTOFF: | |
7305 | case BFD_RELOC_LO16_PLTOFF: | |
7306 | case BFD_RELOC_HI16_PLTOFF: | |
7307 | case BFD_RELOC_HI16_S_PLTOFF: | |
7308 | case BFD_RELOC_GPREL16: | |
7309 | case BFD_RELOC_16_BASEREL: | |
7310 | case BFD_RELOC_LO16_BASEREL: | |
7311 | case BFD_RELOC_HI16_BASEREL: | |
7312 | case BFD_RELOC_HI16_S_BASEREL: | |
7313 | case BFD_RELOC_PPC_TOC16: | |
7314 | case BFD_RELOC_PPC64_TOC16_LO: | |
7315 | case BFD_RELOC_PPC64_TOC16_HI: | |
7316 | case BFD_RELOC_PPC64_TOC16_HA: | |
7317 | case BFD_RELOC_PPC64_PLTGOT16: | |
7318 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
7319 | case BFD_RELOC_PPC64_PLTGOT16_HI: | |
7320 | case BFD_RELOC_PPC64_PLTGOT16_HA: | |
7321 | case BFD_RELOC_PPC64_GOT16_DS: | |
7322 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
7323 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
7324 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
7325 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
7326 | case BFD_RELOC_PPC64_TOC16_DS: | |
7327 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
7328 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
7329 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
7330 | case BFD_RELOC_PPC_EMB_NADDR16: | |
7331 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
7332 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
7333 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
7334 | case BFD_RELOC_PPC_EMB_SDAI16: | |
7335 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
7336 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
252b5132 | 7337 | case BFD_RELOC_PPC_EMB_SDA21: |
3b8b57a9 AM |
7338 | case BFD_RELOC_PPC_EMB_MRKREF: |
7339 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
7340 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
7341 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
7342 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
7343 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
7344 | case BFD_RELOC_PPC_EMB_RELSDA: | |
7345 | case BFD_RELOC_PPC_VLE_SDA21: | |
7346 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
7347 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
7348 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
7349 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
7350 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
7351 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
7352 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
5663e321 AM |
7353 | case BFD_RELOC_PPC64_GOT_PCREL34: |
7354 | case BFD_RELOC_PPC64_PLT_PCREL34: | |
3b8b57a9 | 7355 | gas_assert (fixP->fx_addsy != NULL); |
2b0f3761 | 7356 | /* Fallthru */ |
3b8b57a9 AM |
7357 | |
7358 | case BFD_RELOC_PPC_TLS: | |
7359 | case BFD_RELOC_PPC_TLSGD: | |
7360 | case BFD_RELOC_PPC_TLSLD: | |
c213164a | 7361 | case BFD_RELOC_PPC64_TLS_PCREL: |
3b8b57a9 | 7362 | fieldval = 0; |
3b8b57a9 | 7363 | break; |
7fa9fcb6 TG |
7364 | #endif |
7365 | ||
7366 | #ifdef OBJ_XCOFF | |
7367 | case BFD_RELOC_PPC_B16: | |
7368 | /* Adjust the offset to the instruction boundary. */ | |
7369 | fieldval += 2; | |
7370 | break; | |
7371 | #endif | |
252b5132 | 7372 | |
f728387b AM |
7373 | case BFD_RELOC_VTABLE_INHERIT: |
7374 | case BFD_RELOC_VTABLE_ENTRY: | |
7375 | case BFD_RELOC_PPC_DTPMOD: | |
7376 | case BFD_RELOC_PPC_TPREL: | |
7377 | case BFD_RELOC_PPC_DTPREL: | |
7378 | case BFD_RELOC_PPC_COPY: | |
7379 | case BFD_RELOC_PPC_GLOB_DAT: | |
7380 | case BFD_RELOC_32_PLT_PCREL: | |
7381 | case BFD_RELOC_PPC_EMB_NADDR32: | |
7382 | case BFD_RELOC_PPC64_TOC: | |
7383 | case BFD_RELOC_CTOR: | |
7384 | case BFD_RELOC_32: | |
7385 | case BFD_RELOC_32_PCREL: | |
7386 | case BFD_RELOC_RVA: | |
7387 | case BFD_RELOC_64: | |
7388 | case BFD_RELOC_64_PCREL: | |
7389 | case BFD_RELOC_PPC64_ADDR64_LOCAL: | |
7390 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
7391 | _("%s unsupported as instruction fixup"), | |
7392 | bfd_get_reloc_code_name (fixP->fx_r_type)); | |
7393 | fixP->fx_done = 1; | |
7394 | return; | |
7395 | ||
3b8b57a9 | 7396 | default: |
252b5132 | 7397 | break; |
3b8b57a9 | 7398 | } |
252b5132 | 7399 | |
3b8b57a9 AM |
7400 | #ifdef OBJ_ELF |
7401 | /* powerpc uses RELA style relocs, so if emitting a reloc the field | |
7402 | contents can stay at zero. */ | |
7403 | #define APPLY_RELOC fixP->fx_done | |
7404 | #else | |
7405 | #define APPLY_RELOC 1 | |
7406 | #endif | |
5663e321 AM |
7407 | /* We need to call the insert function even when fieldval is |
7408 | zero if the insert function would translate that zero to a | |
7409 | bit pattern other than all zeros. */ | |
3b8b57a9 AM |
7410 | if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) |
7411 | { | |
5663e321 | 7412 | uint64_t insn; |
487b24d8 AM |
7413 | unsigned char *where; |
7414 | ||
3b8b57a9 AM |
7415 | /* Fetch the instruction, insert the fully resolved operand |
7416 | value, and stuff the instruction back again. */ | |
487b24d8 | 7417 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
3b8b57a9 | 7418 | if (target_big_endian) |
31a91399 | 7419 | { |
5663e321 | 7420 | if (fixP->fx_size < 4) |
487b24d8 | 7421 | insn = bfd_getb16 (where); |
5663e321 AM |
7422 | else |
7423 | { | |
7424 | insn = bfd_getb32 (where); | |
7425 | if (fixP->fx_size > 4) | |
7426 | insn = insn << 32 | bfd_getb32 (where + 4); | |
7427 | } | |
31a91399 NC |
7428 | } |
7429 | else | |
3b8b57a9 | 7430 | { |
5663e321 | 7431 | if (fixP->fx_size < 4) |
487b24d8 | 7432 | insn = bfd_getl16 (where); |
5663e321 AM |
7433 | else |
7434 | { | |
7435 | insn = bfd_getl32 (where); | |
7436 | if (fixP->fx_size > 4) | |
7437 | insn = insn << 32 | bfd_getl32 (where + 4); | |
7438 | } | |
3b8b57a9 AM |
7439 | } |
7440 | insn = ppc_insert_operand (insn, operand, fieldval, | |
7441 | fixP->tc_fix_data.ppc_cpu, | |
7442 | fixP->fx_file, fixP->fx_line); | |
7443 | if (target_big_endian) | |
7444 | { | |
5663e321 | 7445 | if (fixP->fx_size < 4) |
487b24d8 | 7446 | bfd_putb16 (insn, where); |
5663e321 AM |
7447 | else |
7448 | { | |
7449 | if (fixP->fx_size > 4) | |
7450 | { | |
7451 | bfd_putb32 (insn, where + 4); | |
7452 | insn >>= 32; | |
7453 | } | |
7454 | bfd_putb32 (insn, where); | |
7455 | } | |
3b8b57a9 AM |
7456 | } |
7457 | else | |
7458 | { | |
5663e321 | 7459 | if (fixP->fx_size < 4) |
487b24d8 | 7460 | bfd_putl16 (insn, where); |
5663e321 AM |
7461 | else |
7462 | { | |
7463 | if (fixP->fx_size > 4) | |
7464 | { | |
7465 | bfd_putl32 (insn, where + 4); | |
7466 | insn >>= 32; | |
7467 | } | |
7468 | bfd_putl32 (insn, where); | |
7469 | } | |
3b8b57a9 AM |
7470 | } |
7471 | } | |
7472 | ||
7473 | if (fixP->fx_done) | |
7474 | /* Nothing else to do here. */ | |
7475 | return; | |
7476 | ||
7477 | gas_assert (fixP->fx_addsy != NULL); | |
62ebcb5c | 7478 | if (fixP->fx_r_type == BFD_RELOC_NONE) |
3b8b57a9 | 7479 | { |
3b4dbbbf | 7480 | const char *sfile; |
3b8b57a9 AM |
7481 | unsigned int sline; |
7482 | ||
7483 | /* Use expr_symbol_where to see if this is an expression | |
7484 | symbol. */ | |
7485 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
7486 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
7487 | _("unresolved expression that must be resolved")); | |
7488 | else | |
7489 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
7490 | _("unsupported relocation against %s"), | |
7491 | S_GET_NAME (fixP->fx_addsy)); | |
7492 | fixP->fx_done = 1; | |
7493 | return; | |
7494 | } | |
7495 | } | |
7496 | else | |
7497 | { | |
7498 | /* Handle relocs in data. */ | |
7499 | switch (fixP->fx_r_type) | |
7500 | { | |
252b5132 | 7501 | case BFD_RELOC_VTABLE_INHERIT: |
94f592af NC |
7502 | if (fixP->fx_addsy |
7503 | && !S_IS_DEFINED (fixP->fx_addsy) | |
7504 | && !S_IS_WEAK (fixP->fx_addsy)) | |
7505 | S_SET_WEAK (fixP->fx_addsy); | |
2b0f3761 | 7506 | /* Fallthru */ |
252b5132 RH |
7507 | |
7508 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 7509 | fixP->fx_done = 0; |
252b5132 RH |
7510 | break; |
7511 | ||
0baf16f2 | 7512 | #ifdef OBJ_ELF |
3b8b57a9 AM |
7513 | /* These can appear with @l etc. in data. */ |
7514 | case BFD_RELOC_LO16: | |
3b8b57a9 | 7515 | case BFD_RELOC_LO16_PCREL: |
3b8b57a9 | 7516 | case BFD_RELOC_HI16: |
3b8b57a9 | 7517 | case BFD_RELOC_HI16_PCREL: |
3b8b57a9 | 7518 | case BFD_RELOC_HI16_S: |
3b8b57a9 | 7519 | case BFD_RELOC_HI16_S_PCREL: |
3b8b57a9 | 7520 | case BFD_RELOC_PPC64_HIGHER: |
3b8b57a9 | 7521 | case BFD_RELOC_PPC64_HIGHER_S: |
3b8b57a9 | 7522 | case BFD_RELOC_PPC64_HIGHEST: |
3b8b57a9 | 7523 | case BFD_RELOC_PPC64_HIGHEST_S: |
f9c6b907 AM |
7524 | case BFD_RELOC_PPC64_ADDR16_HIGH: |
7525 | case BFD_RELOC_PPC64_ADDR16_HIGHA: | |
45965137 | 7526 | case BFD_RELOC_PPC64_ADDR64_LOCAL: |
3b8b57a9 AM |
7527 | break; |
7528 | ||
7529 | case BFD_RELOC_PPC_DTPMOD: | |
7530 | case BFD_RELOC_PPC_TPREL: | |
7531 | case BFD_RELOC_PPC_DTPREL: | |
7532 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
7533 | break; | |
7534 | ||
7535 | /* Just punt all of these to the linker. */ | |
7536 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
7537 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
7538 | case BFD_RELOC_16_GOTOFF: | |
7539 | case BFD_RELOC_LO16_GOTOFF: | |
7540 | case BFD_RELOC_HI16_GOTOFF: | |
7541 | case BFD_RELOC_HI16_S_GOTOFF: | |
7542 | case BFD_RELOC_LO16_PLTOFF: | |
7543 | case BFD_RELOC_HI16_PLTOFF: | |
7544 | case BFD_RELOC_HI16_S_PLTOFF: | |
7545 | case BFD_RELOC_PPC_COPY: | |
7546 | case BFD_RELOC_PPC_GLOB_DAT: | |
7547 | case BFD_RELOC_16_BASEREL: | |
7548 | case BFD_RELOC_LO16_BASEREL: | |
7549 | case BFD_RELOC_HI16_BASEREL: | |
7550 | case BFD_RELOC_HI16_S_BASEREL: | |
7551 | case BFD_RELOC_PPC_TLS: | |
7552 | case BFD_RELOC_PPC_DTPREL16_LO: | |
7553 | case BFD_RELOC_PPC_DTPREL16_HI: | |
7554 | case BFD_RELOC_PPC_DTPREL16_HA: | |
7555 | case BFD_RELOC_PPC_TPREL16_LO: | |
7556 | case BFD_RELOC_PPC_TPREL16_HI: | |
7557 | case BFD_RELOC_PPC_TPREL16_HA: | |
7558 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
7559 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
7560 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
7561 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
7562 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
7563 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
7564 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
7565 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
7566 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
7567 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
7568 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
7569 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
7570 | case BFD_RELOC_PPC_GOT_TPREL16: | |
7571 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
7572 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
7573 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
7574 | case BFD_RELOC_24_PLT_PCREL: | |
7575 | case BFD_RELOC_PPC_LOCAL24PC: | |
7576 | case BFD_RELOC_32_PLT_PCREL: | |
7577 | case BFD_RELOC_GPREL16: | |
7578 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
7579 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
7580 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
7581 | case BFD_RELOC_PPC_EMB_NADDR32: | |
7582 | case BFD_RELOC_PPC_EMB_NADDR16: | |
7583 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
7584 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
7585 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
7586 | case BFD_RELOC_PPC_EMB_SDAI16: | |
7587 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
7588 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
7589 | case BFD_RELOC_PPC_EMB_SDA21: | |
7590 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
7591 | case BFD_RELOC_PPC_EMB_MRKREF: | |
7592 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
7593 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
7594 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
7595 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
7596 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
7597 | case BFD_RELOC_PPC_EMB_RELSDA: | |
0baf16f2 | 7598 | case BFD_RELOC_PPC64_TOC: |
3b8b57a9 | 7599 | case BFD_RELOC_PPC_TOC16: |
4a403be0 CC |
7600 | case BFD_RELOC_PPC_TOC16_LO: |
7601 | case BFD_RELOC_PPC_TOC16_HI: | |
3b8b57a9 AM |
7602 | case BFD_RELOC_PPC64_TOC16_LO: |
7603 | case BFD_RELOC_PPC64_TOC16_HI: | |
7604 | case BFD_RELOC_PPC64_TOC16_HA: | |
f9c6b907 AM |
7605 | case BFD_RELOC_PPC64_DTPREL16_HIGH: |
7606 | case BFD_RELOC_PPC64_DTPREL16_HIGHA: | |
3b8b57a9 AM |
7607 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: |
7608 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
7609 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
7610 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
f9c6b907 AM |
7611 | case BFD_RELOC_PPC64_TPREL16_HIGH: |
7612 | case BFD_RELOC_PPC64_TPREL16_HIGHA: | |
3b8b57a9 AM |
7613 | case BFD_RELOC_PPC64_TPREL16_HIGHER: |
7614 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
7615 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
7616 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
c213164a | 7617 | case BFD_RELOC_PPC64_TLS_PCREL: |
94f592af | 7618 | fixP->fx_done = 0; |
0baf16f2 | 7619 | break; |
0baf16f2 | 7620 | #endif |
3b8b57a9 AM |
7621 | |
7622 | #ifdef OBJ_XCOFF | |
1b2cb8e2 CC |
7623 | case BFD_RELOC_PPC_TLSGD: |
7624 | case BFD_RELOC_PPC_TLSLD: | |
7625 | case BFD_RELOC_PPC_TLSLE: | |
7626 | case BFD_RELOC_PPC_TLSIE: | |
7627 | case BFD_RELOC_PPC_TLSM: | |
7628 | case BFD_RELOC_PPC64_TLSGD: | |
7629 | case BFD_RELOC_PPC64_TLSLD: | |
7630 | case BFD_RELOC_PPC64_TLSLE: | |
7631 | case BFD_RELOC_PPC64_TLSIE: | |
7632 | case BFD_RELOC_PPC64_TLSM: | |
7633 | gas_assert (fixP->fx_addsy != NULL); | |
7634 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
1b2cb8e2 CC |
7635 | break; |
7636 | ||
3c503824 CC |
7637 | /* Officially, R_TLSML relocations must be from a TOC entry |
7638 | targeting itself. In practice, this TOC entry is always | |
7639 | named (or .rename) "_$TLSML". | |
7640 | Thus, as it doesn't seem possible to retrieve the symbol | |
7641 | being relocated here, we simply check that the symbol | |
7642 | targeted by R_TLSML is indeed a TOC entry named "_$TLSML". | |
7643 | FIXME: Find a way to correctly check R_TLSML relocations | |
7644 | as described above. */ | |
1b2cb8e2 CC |
7645 | case BFD_RELOC_PPC_TLSML: |
7646 | case BFD_RELOC_PPC64_TLSML: | |
7647 | gas_assert (fixP->fx_addsy != NULL); | |
3c503824 CC |
7648 | if ((symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC |
7649 | || symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TE) | |
7650 | && strcmp (symbol_get_tc (fixP->fx_addsy)->real_name, "_$TLSML") != 0) | |
7651 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
7652 | _("R_TLSML relocation doesn't target a " | |
7653 | "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP->fx_addsy)); | |
1b2cb8e2 CC |
7654 | fieldval = 0; |
7655 | break; | |
7656 | ||
3b8b57a9 | 7657 | case BFD_RELOC_NONE: |
3b8b57a9 | 7658 | #endif |
5656a981 AM |
7659 | case BFD_RELOC_CTOR: |
7660 | case BFD_RELOC_32: | |
7661 | case BFD_RELOC_32_PCREL: | |
7662 | case BFD_RELOC_RVA: | |
7663 | case BFD_RELOC_64: | |
7664 | case BFD_RELOC_64_PCREL: | |
7665 | case BFD_RELOC_16: | |
7666 | case BFD_RELOC_16_PCREL: | |
7667 | case BFD_RELOC_8: | |
7668 | break; | |
3b8b57a9 | 7669 | |
252b5132 | 7670 | default: |
bc805888 | 7671 | fprintf (stderr, |
94f592af | 7672 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 7673 | fflush (stderr); |
252b5132 RH |
7674 | abort (); |
7675 | } | |
46b596ff | 7676 | |
5656a981 | 7677 | if (fixP->fx_size && APPLY_RELOC) |
46b596ff | 7678 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
5656a981 | 7679 | fieldval, fixP->fx_size); |
bf7279d5 AM |
7680 | if (warn_476 |
7681 | && (seg->flags & SEC_CODE) != 0 | |
7682 | && fixP->fx_size == 4 | |
7683 | && fixP->fx_done | |
7684 | && !fixP->fx_tcbit | |
7685 | && (fixP->fx_r_type == BFD_RELOC_32 | |
7686 | || fixP->fx_r_type == BFD_RELOC_CTOR | |
7687 | || fixP->fx_r_type == BFD_RELOC_32_PCREL)) | |
7688 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
7689 | _("data in executable section")); | |
5656a981 AM |
7690 | } |
7691 | ||
252b5132 | 7692 | #ifdef OBJ_ELF |
3b8b57a9 | 7693 | ppc_elf_validate_fix (fixP, seg); |
94f592af | 7694 | fixP->fx_addnumber = value; |
4e6935a6 AM |
7695 | |
7696 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
7697 | from the section contents. If we are going to be emitting a reloc | |
7698 | then the section contents are immaterial, so don't warn if they | |
7699 | happen to overflow. Leave such warnings to ld. */ | |
7700 | if (!fixP->fx_done) | |
a38a07e0 AM |
7701 | { |
7702 | fixP->fx_no_overflow = 1; | |
7703 | ||
7704 | /* Arrange to emit .TOC. as a normal symbol if used in anything | |
7705 | but .TOC.@tocbase. */ | |
7706 | if (ppc_obj64 | |
7707 | && fixP->fx_r_type != BFD_RELOC_PPC64_TOC | |
7708 | && fixP->fx_addsy != NULL | |
7709 | && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) | |
7710 | symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; | |
7711 | } | |
252b5132 | 7712 | #else |
3478a63d CC |
7713 | if (fixP->fx_r_type == BFD_RELOC_PPC_TOC16 |
7714 | || fixP->fx_r_type == BFD_RELOC_PPC_TOC16_HI | |
7715 | || fixP->fx_r_type == BFD_RELOC_PPC_TOC16_LO) | |
252b5132 | 7716 | { |
8edcbfcd TG |
7717 | /* We want to use the offset within the toc, not the actual VMA |
7718 | of the symbol. */ | |
fd361982 AM |
7719 | fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) |
7720 | - S_GET_VALUE (ppc_toc_csect)); | |
4a403be0 CC |
7721 | |
7722 | /* The high bits must be adjusted for the low bits being signed. */ | |
7723 | if (fixP->fx_r_type == BFD_RELOC_PPC_TOC16_HI) { | |
7724 | fixP->fx_addnumber += 0x8000; | |
7725 | } | |
7726 | ||
ac21e7da TG |
7727 | /* Set *valP to avoid errors. */ |
7728 | *valP = value; | |
252b5132 | 7729 | } |
3478a63d | 7730 | else if (fixP->fx_r_type == BFD_RELOC_PPC_TLSM |
3c503824 CC |
7731 | || fixP->fx_r_type == BFD_RELOC_PPC64_TLSM |
7732 | || fixP->fx_r_type == BFD_RELOC_PPC_TLSML | |
7733 | || fixP->fx_r_type == BFD_RELOC_PPC64_TLSML) | |
3478a63d CC |
7734 | /* AIX ld expects the section contents for these relocations |
7735 | to be zero. Arrange for that to occur when | |
7736 | bfd_install_relocation is called. */ | |
7737 | fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) | |
3c503824 CC |
7738 | - S_GET_VALUE (fixP->fx_addsy) |
7739 | - fieldval); | |
3478a63d CC |
7740 | else |
7741 | fixP->fx_addnumber = 0; | |
252b5132 | 7742 | #endif |
252b5132 RH |
7743 | } |
7744 | ||
7745 | /* Generate a reloc for a fixup. */ | |
7746 | ||
c5df7e44 | 7747 | arelent ** |
98027b10 | 7748 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 | 7749 | { |
c5df7e44 | 7750 | static arelent *relocs[3]; |
252b5132 RH |
7751 | arelent *reloc; |
7752 | ||
c5df7e44 CC |
7753 | relocs[0] = reloc = XNEW (arelent); |
7754 | relocs[1] = NULL; | |
252b5132 | 7755 | |
325801bd | 7756 | reloc->sym_ptr_ptr = XNEW (asymbol *); |
49309057 | 7757 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 | 7758 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
c213164a AM |
7759 | /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */ |
7760 | if (fixp->fx_r_type == BFD_RELOC_PPC64_TLS_PCREL) | |
7761 | reloc->address++; | |
252b5132 RH |
7762 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); |
7763 | if (reloc->howto == (reloc_howto_type *) NULL) | |
7764 | { | |
7765 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
7766 | _("reloc %d not supported by object file format"), |
7767 | (int) fixp->fx_r_type); | |
c5df7e44 | 7768 | relocs[0] = NULL; |
252b5132 RH |
7769 | } |
7770 | reloc->addend = fixp->fx_addnumber; | |
7771 | ||
4bf09429 | 7772 | if (fixp->fx_subsy != NULL) |
c5df7e44 CC |
7773 | { |
7774 | relocs[1] = reloc = XNEW (arelent); | |
7775 | relocs[2] = NULL; | |
7776 | ||
7777 | reloc->sym_ptr_ptr = XNEW (asymbol *); | |
7778 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); | |
7779 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
7780 | ||
7781 | reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_PPC_NEG); | |
7782 | reloc->addend = fixp->fx_addnumber; | |
7783 | ||
7784 | if (reloc->howto == (reloc_howto_type *) NULL) | |
7785 | { | |
4bf09429 AM |
7786 | as_bad_subtract (fixp); |
7787 | free (relocs[1]->sym_ptr_ptr); | |
7788 | free (relocs[1]); | |
7789 | free (relocs[0]->sym_ptr_ptr); | |
7790 | free (relocs[0]); | |
c5df7e44 CC |
7791 | relocs[0] = NULL; |
7792 | } | |
7793 | } | |
7794 | ||
7795 | ||
7796 | return relocs; | |
252b5132 | 7797 | } |
75e21f08 JJ |
7798 | |
7799 | void | |
98027b10 | 7800 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
7801 | { |
7802 | cfi_add_CFA_def_cfa (1, 0); | |
7803 | } | |
7804 | ||
7805 | int | |
1df69f4f | 7806 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
7807 | { |
7808 | unsigned int regnum = -1; | |
7809 | unsigned int i; | |
7810 | const char *p; | |
7811 | char *q; | |
e0471c16 | 7812 | static struct { const char *name; int dw2regnum; } regnames[] = |
75e21f08 JJ |
7813 | { |
7814 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
7815 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 7816 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
7817 | { "spe_acc", 111 }, { "spefscr", 112 } |
7818 | }; | |
7819 | ||
7820 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
7821 | if (strcmp (regnames[i].name, regname) == 0) | |
7822 | return regnames[i].dw2regnum; | |
7823 | ||
7824 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
7825 | { | |
7826 | p = regname + 1 + (regname[1] == '.'); | |
7827 | regnum = strtoul (p, &q, 10); | |
7828 | if (p == q || *q || regnum >= 32) | |
7829 | return -1; | |
7830 | if (regname[0] == 'f') | |
b7d7dc63 | 7831 | regnum += 32; |
75e21f08 | 7832 | else if (regname[0] == 'v') |
b7d7dc63 | 7833 | regnum += 77; |
75e21f08 JJ |
7834 | } |
7835 | else if (regname[0] == 'c' && regname[1] == 'r') | |
7836 | { | |
7837 | p = regname + 2 + (regname[2] == '.'); | |
7838 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 7839 | return -1; |
75e21f08 JJ |
7840 | regnum = p[0] - '0' + 68; |
7841 | } | |
7842 | return regnum; | |
7843 | } |