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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
252b5132
RH		 181\f
182/* The target specific pseudo-ops which we support. */
183
184const pseudo_typeS md_pseudo_table[] =
185{
186 /* Pseudo-ops which must be overridden. */
187 { "byte", ppc_byte, 0 },
188
189#ifdef OBJ_XCOFF
190 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
191 legitimately belong in the obj-*.c file. However, XCOFF is based
192 on COFF, and is only implemented for the RS/6000. We just use
193 obj-coff.c, and add what we need here. */
194 { "comm", ppc_comm, 0 },
195 { "lcomm", ppc_comm, 1 },
196 { "bb", ppc_bb, 0 },
197 { "bc", ppc_bc, 0 },
198 { "bf", ppc_bf, 0 },
199 { "bi", ppc_biei, 0 },
200 { "bs", ppc_bs, 0 },
201 { "csect", ppc_csect, 0 },
202 { "data", ppc_section, 'd' },
203 { "eb", ppc_eb, 0 },
204 { "ec", ppc_ec, 0 },
205 { "ef", ppc_ef, 0 },
206 { "ei", ppc_biei, 1 },
207 { "es", ppc_es, 0 },
208 { "extern", ppc_extern, 0 },
209 { "function", ppc_function, 0 },
210 { "lglobl", ppc_lglobl, 0 },
211 { "rename", ppc_rename, 0 },
212 { "section", ppc_named_section, 0 },
213 { "stabx", ppc_stabx, 0 },
214 { "text", ppc_section, 't' },
215 { "toc", ppc_toc, 0 },
216 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 217 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 218 { "word", ppc_xcoff_cons, 1 },
219 { "short", ppc_xcoff_cons, 1 },
220 { "vbyte", ppc_vbyte, 0 },
221#endif
222
223#ifdef OBJ_ELF
0baf16f2
AM		 224 { "llong", ppc_elf_cons, 8 },
225 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 226 { "long", ppc_elf_cons, 4 },
227 { "word", ppc_elf_cons, 2 },
228 { "short", ppc_elf_cons, 2 },
229 { "rdata", ppc_elf_rdata, 0 },
230 { "rodata", ppc_elf_rdata, 0 },
231 { "lcomm", ppc_elf_lcomm, 0 },
232#endif
233
234#ifdef TE_PE
99a814a1 235 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 236 { "previous", ppc_previous, 0 },
237 { "pdata", ppc_pdata, 0 },
238 { "ydata", ppc_ydata, 0 },
239 { "reldata", ppc_reldata, 0 },
240 { "rdata", ppc_rdata, 0 },
241 { "ualong", ppc_ualong, 0 },
242 { "znop", ppc_znop, 0 },
243 { "comm", ppc_pe_comm, 0 },
244 { "lcomm", ppc_pe_comm, 1 },
245 { "section", ppc_pe_section, 0 },
246 { "function", ppc_pe_function,0 },
247 { "tocd", ppc_pe_tocd, 0 },
248#endif
249
0baf16f2 250#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 251 { "tc", ppc_tc, 0 },
0baf16f2
AM		 252 { "machine", ppc_machine, 0 },
253#endif
252b5132
RH		 254
255 { NULL, NULL, 0 }
256};
257
258\f
99a814a1
AM		 259/* Predefined register names if -mregnames (or default for Windows NT).
260 In general, there are lots of them, in an attempt to be compatible
261 with a number of other Windows NT assemblers. */
252b5132
RH		 262
263/* Structure to hold information about predefined registers. */
264struct pd_reg
265 {
266 char *name;
267 int value;
268 };
269
270/* List of registers that are pre-defined:
271
272 Each general register has predefined names of the form:
273 1. r<reg_num> which has the value <reg_num>.
274 2. r.<reg_num> which has the value <reg_num>.
275
252b5132
RH		 276 Each floating point register has predefined names of the form:
277 1. f<reg_num> which has the value <reg_num>.
278 2. f.<reg_num> which has the value <reg_num>.
279
7a899fff
C		 280 Each vector unit register has predefined names of the form:
281 1. v<reg_num> which has the value <reg_num>.
282 2. v.<reg_num> which has the value <reg_num>.
283
252b5132
RH		 284 Each condition register has predefined names of the form:
285 1. cr<reg_num> which has the value <reg_num>.
286 2. cr.<reg_num> which has the value <reg_num>.
287
288 There are individual registers as well:
289 sp or r.sp has the value 1
290 rtoc or r.toc has the value 2
291 fpscr has the value 0
292 xer has the value 1
293 lr has the value 8
294 ctr has the value 9
295 pmr has the value 0
296 dar has the value 19
297 dsisr has the value 18
298 dec has the value 22
299 sdr1 has the value 25
300 srr0 has the value 26
301 srr1 has the value 27
302
81d4177b 303 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 304
305static const struct pd_reg pre_defined_registers[] =
306{
307 { "cr.0", 0 }, /* Condition Registers */
308 { "cr.1", 1 },
309 { "cr.2", 2 },
310 { "cr.3", 3 },
311 { "cr.4", 4 },
312 { "cr.5", 5 },
313 { "cr.6", 6 },
314 { "cr.7", 7 },
315
316 { "cr0", 0 },
317 { "cr1", 1 },
318 { "cr2", 2 },
319 { "cr3", 3 },
320 { "cr4", 4 },
321 { "cr5", 5 },
322 { "cr6", 6 },
323 { "cr7", 7 },
324
325 { "ctr", 9 },
326
327 { "dar", 19 }, /* Data Access Register */
328 { "dec", 22 }, /* Decrementer */
329 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
330
331 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 332 { "f.1", 1 },
333 { "f.10", 10 },
334 { "f.11", 11 },
335 { "f.12", 12 },
336 { "f.13", 13 },
337 { "f.14", 14 },
338 { "f.15", 15 },
339 { "f.16", 16 },
340 { "f.17", 17 },
341 { "f.18", 18 },
342 { "f.19", 19 },
343 { "f.2", 2 },
344 { "f.20", 20 },
345 { "f.21", 21 },
346 { "f.22", 22 },
347 { "f.23", 23 },
348 { "f.24", 24 },
349 { "f.25", 25 },
350 { "f.26", 26 },
351 { "f.27", 27 },
352 { "f.28", 28 },
353 { "f.29", 29 },
354 { "f.3", 3 },
252b5132
RH		 355 { "f.30", 30 },
356 { "f.31", 31 },
81d4177b
KH		 357 { "f.4", 4 },
358 { "f.5", 5 },
359 { "f.6", 6 },
360 { "f.7", 7 },
361 { "f.8", 8 },
362 { "f.9", 9 },
363
364 { "f0", 0 },
365 { "f1", 1 },
366 { "f10", 10 },
367 { "f11", 11 },
368 { "f12", 12 },
369 { "f13", 13 },
370 { "f14", 14 },
371 { "f15", 15 },
372 { "f16", 16 },
373 { "f17", 17 },
374 { "f18", 18 },
375 { "f19", 19 },
376 { "f2", 2 },
377 { "f20", 20 },
378 { "f21", 21 },
379 { "f22", 22 },
380 { "f23", 23 },
381 { "f24", 24 },
382 { "f25", 25 },
383 { "f26", 26 },
384 { "f27", 27 },
385 { "f28", 28 },
386 { "f29", 29 },
387 { "f3", 3 },
252b5132
RH		 388 { "f30", 30 },
389 { "f31", 31 },
81d4177b
KH		 390 { "f4", 4 },
391 { "f5", 5 },
392 { "f6", 6 },
393 { "f7", 7 },
394 { "f8", 8 },
395 { "f9", 9 },
252b5132
RH		 396
397 { "fpscr", 0 },
398
c3d65c1c
BE		 399 /* Quantization registers used with pair single instructions. */
400 { "gqr.0", 0 },
401 { "gqr.1", 1 },
402 { "gqr.2", 2 },
403 { "gqr.3", 3 },
404 { "gqr.4", 4 },
405 { "gqr.5", 5 },
406 { "gqr.6", 6 },
407 { "gqr.7", 7 },
408 { "gqr0", 0 },
409 { "gqr1", 1 },
410 { "gqr2", 2 },
411 { "gqr3", 3 },
412 { "gqr4", 4 },
413 { "gqr5", 5 },
414 { "gqr6", 6 },
415 { "gqr7", 7 },
416
252b5132
RH		 417 { "lr", 8 }, /* Link Register */
418
419 { "pmr", 0 },
420
421 { "r.0", 0 }, /* General Purpose Registers */
422 { "r.1", 1 },
423 { "r.10", 10 },
424 { "r.11", 11 },
425 { "r.12", 12 },
426 { "r.13", 13 },
427 { "r.14", 14 },
428 { "r.15", 15 },
429 { "r.16", 16 },
430 { "r.17", 17 },
431 { "r.18", 18 },
432 { "r.19", 19 },
433 { "r.2", 2 },
434 { "r.20", 20 },
435 { "r.21", 21 },
436 { "r.22", 22 },
437 { "r.23", 23 },
438 { "r.24", 24 },
439 { "r.25", 25 },
440 { "r.26", 26 },
441 { "r.27", 27 },
442 { "r.28", 28 },
443 { "r.29", 29 },
444 { "r.3", 3 },
445 { "r.30", 30 },
446 { "r.31", 31 },
447 { "r.4", 4 },
448 { "r.5", 5 },
449 { "r.6", 6 },
450 { "r.7", 7 },
451 { "r.8", 8 },
452 { "r.9", 9 },
453
454 { "r.sp", 1 }, /* Stack Pointer */
455
456 { "r.toc", 2 }, /* Pointer to the table of contents */
457
458 { "r0", 0 }, /* More general purpose registers */
459 { "r1", 1 },
460 { "r10", 10 },
461 { "r11", 11 },
462 { "r12", 12 },
463 { "r13", 13 },
464 { "r14", 14 },
465 { "r15", 15 },
466 { "r16", 16 },
467 { "r17", 17 },
468 { "r18", 18 },
469 { "r19", 19 },
470 { "r2", 2 },
471 { "r20", 20 },
472 { "r21", 21 },
473 { "r22", 22 },
474 { "r23", 23 },
475 { "r24", 24 },
476 { "r25", 25 },
477 { "r26", 26 },
478 { "r27", 27 },
479 { "r28", 28 },
480 { "r29", 29 },
481 { "r3", 3 },
482 { "r30", 30 },
483 { "r31", 31 },
484 { "r4", 4 },
485 { "r5", 5 },
486 { "r6", 6 },
487 { "r7", 7 },
488 { "r8", 8 },
489 { "r9", 9 },
490
491 { "rtoc", 2 }, /* Table of contents */
492
493 { "sdr1", 25 }, /* Storage Description Register 1 */
494
495 { "sp", 1 },
496
497 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
498 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 499
7a899fff 500 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 501 { "v.1", 1 },
502 { "v.10", 10 },
503 { "v.11", 11 },
504 { "v.12", 12 },
505 { "v.13", 13 },
506 { "v.14", 14 },
507 { "v.15", 15 },
508 { "v.16", 16 },
509 { "v.17", 17 },
510 { "v.18", 18 },
511 { "v.19", 19 },
512 { "v.2", 2 },
513 { "v.20", 20 },
514 { "v.21", 21 },
515 { "v.22", 22 },
516 { "v.23", 23 },
517 { "v.24", 24 },
518 { "v.25", 25 },
519 { "v.26", 26 },
520 { "v.27", 27 },
521 { "v.28", 28 },
522 { "v.29", 29 },
523 { "v.3", 3 },
7a899fff
C		 524 { "v.30", 30 },
525 { "v.31", 31 },
81d4177b
KH		 526 { "v.4", 4 },
527 { "v.5", 5 },
528 { "v.6", 6 },
529 { "v.7", 7 },
530 { "v.8", 8 },
531 { "v.9", 9 },
7a899fff
C		 532
533 { "v0", 0 },
81d4177b
KH		 534 { "v1", 1 },
535 { "v10", 10 },
536 { "v11", 11 },
537 { "v12", 12 },
538 { "v13", 13 },
539 { "v14", 14 },
540 { "v15", 15 },
541 { "v16", 16 },
542 { "v17", 17 },
543 { "v18", 18 },
544 { "v19", 19 },
545 { "v2", 2 },
546 { "v20", 20 },
547 { "v21", 21 },
548 { "v22", 22 },
549 { "v23", 23 },
550 { "v24", 24 },
551 { "v25", 25 },
552 { "v26", 26 },
553 { "v27", 27 },
554 { "v28", 28 },
555 { "v29", 29 },
556 { "v3", 3 },
7a899fff
C		 557 { "v30", 30 },
558 { "v31", 31 },
81d4177b
KH		 559 { "v4", 4 },
560 { "v5", 5 },
561 { "v6", 6 },
562 { "v7", 7 },
563 { "v8", 8 },
7a899fff 564 { "v9", 9 },
252b5132
RH		 565
566 { "xer", 1 },
567
568};
569
bc805888 570#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 571
572/* Given NAME, find the register number associated with that name, return
573 the integer value associated with the given name or -1 on failure. */
574
252b5132 575static int
98027b10 576reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 577{
578 int middle, low, high;
579 int cmp;
580
581 low = 0;
582 high = regcount - 1;
583
584 do
585 {
586 middle = (low + high) / 2;
587 cmp = strcasecmp (name, regs[middle].name);
588 if (cmp < 0)
589 high = middle - 1;
590 else if (cmp > 0)
591 low = middle + 1;
592 else
593 return regs[middle].value;
594 }
595 while (low <= high);
596
597 return -1;
598}
599
600/*
99a814a1 601 * Summary of register_name.
252b5132
RH		 602 *
603 * in: Input_line_pointer points to 1st char of operand.
604 *
605 * out: A expressionS.
606 * The operand may have been a register: in this case, X_op == O_register,
607 * X_add_number is set to the register number, and truth is returned.
608 * Input_line_pointer->(next non-blank) char after operand, or is in its
609 * original state.
610 */
611
b34976b6 612static bfd_boolean
98027b10 613register_name (expressionS *expressionP)
252b5132
RH		 614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
98027b10 680ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 681{
682 int val;
683
684 if (! cr_operand)
685 return 0;
686
13abbae3
AM		 687 if (*name == '%')
688 ++name;
252b5132
RH		 689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 847 /* Do all PPC750s have paired single ops? */
848 else if (strcmp (arg, "750cl") == 0)
849 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM		 850 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
851 else if (strcmp (arg, "403") == 0
852 || strcmp (arg, "405") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
854 | PPC_OPCODE_403 | PPC_OPCODE_32);
855 else if (strcmp (arg, "440") == 0)
856 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
857 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
858 else if (strcmp (arg, "7400") == 0
859 || strcmp (arg, "7410") == 0
860 || strcmp (arg, "7450") == 0
861 || strcmp (arg, "7455") == 0)
862 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
863 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 864 else if (strcmp (arg, "e300") == 0)
865 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
866 | PPC_OPCODE_E300);
69c040df
AM		 867 else if (strcmp (arg, "altivec") == 0)
868 {
869 if (ppc_cpu == 0)
870 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
871 else
872 ppc_cpu |= PPC_OPCODE_ALTIVEC;
873 }
874 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
875 {
876 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
877 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
878 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
879 | PPC_OPCODE_RFMCI);
880 }
881 else if (strcmp (arg, "spe") == 0)
882 {
883 if (ppc_cpu == 0)
884 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
885 else
886 ppc_cpu |= PPC_OPCODE_SPE;
887 }
888 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
889 620. */
890 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
891 {
892 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
893 }
894 else if (strcmp (arg, "ppc64bridge") == 0)
895 {
896 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
897 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
898 }
899 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
900 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
901 {
902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
903 }
904 /* -mbooke64 means enable 64-bit BookE support. */
905 else if (strcmp (arg, "booke64") == 0)
906 {
907 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
908 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
909 }
910 else if (strcmp (arg, "power4") == 0)
911 {
912 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
913 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
914 }
b0648eec
AM		 915 else if (strcmp (arg, "power5") == 0)
916 {
917 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
918 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
919 | PPC_OPCODE_POWER5);
920 }
9622b051
AM		 921 else if (strcmp (arg, "power6") == 0)
922 {
923 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
924 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
925 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
926 }
ede602d7
AM		 927 else if (strcmp (arg, "cell") == 0)
928 {
929 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
930 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
931 | PPC_OPCODE_CELL);
932 }
69c040df
AM		 933 /* -mcom means assemble for the common intersection between Power
934 and PowerPC. At present, we just allow the union, rather
935 than the intersection. */
936 else if (strcmp (arg, "com") == 0)
937 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
938 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
939 else if (strcmp (arg, "any") == 0)
940 ppc_cpu |= PPC_OPCODE_ANY;
941 else
942 return 0;
943
944 return 1;
945}
946
252b5132 947int
98027b10 948md_parse_option (int c, char *arg)
252b5132
RH		 949{
950 switch (c)
951 {
952 case 'u':
953 /* -u means that any undefined symbols should be treated as
954 external, which is the default for gas anyhow. */
955 break;
956
957#ifdef OBJ_ELF
958 case 'l':
959 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 960 sake, recognize -be also. */
252b5132
RH		 961 if (strcmp (arg, "e") == 0)
962 {
963 target_big_endian = 0;
964 set_target_endian = 1;
965 }
966 else
967 return 0;
968
969 break;
970
971 case 'b':
972 if (strcmp (arg, "e") == 0)
973 {
974 target_big_endian = 1;
975 set_target_endian = 1;
976 }
977 else
978 return 0;
979
980 break;
981
982 case 'K':
99a814a1 983 /* Recognize -K PIC. */
252b5132
RH		 984 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
985 {
986 shlib = SHLIB_PIC;
987 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
988 }
989 else
990 return 0;
991
992 break;
993#endif
994
7f6d05e8
CP		 995 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
996 case 'a':
997 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 998 {
999#ifdef BFD64
1000 ppc_obj64 = 1;
1001#else
1002 as_fatal (_("%s unsupported"), "-a64");
1003#endif
1004 }
7f6d05e8 1005 else if (strcmp (arg, "32") == 0)
2b3c4602 1006 ppc_obj64 = 0;
7f6d05e8
CP		 1007 else
1008 return 0;
1009 break;
81d4177b 1010
252b5132 1011 case 'm':
69c040df
AM		 1012 if (parse_cpu (arg))
1013 ;
252b5132
RH		 1014
1015 else if (strcmp (arg, "regnames") == 0)
b34976b6 1016 reg_names_p = TRUE;
252b5132
RH		 1017
1018 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1019 reg_names_p = FALSE;
252b5132
RH		 1020
1021#ifdef OBJ_ELF
99a814a1
AM		 1022 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1023 that require relocation. */
252b5132
RH		 1024 else if (strcmp (arg, "relocatable") == 0)
1025 {
5d6f4f16 1026 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1027 ppc_flags |= EF_PPC_RELOCATABLE;
1028 }
1029
1030 else if (strcmp (arg, "relocatable-lib") == 0)
1031 {
5d6f4f16 1032 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1033 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1034 }
1035
99a814a1 1036 /* -memb, set embedded bit. */
252b5132
RH		 1037 else if (strcmp (arg, "emb") == 0)
1038 ppc_flags |= EF_PPC_EMB;
1039
99a814a1
AM		 1040 /* -mlittle/-mbig set the endianess. */
1041 else if (strcmp (arg, "little") == 0
1042 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1043 {
1044 target_big_endian = 0;
1045 set_target_endian = 1;
1046 }
1047
1048 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1049 {
1050 target_big_endian = 1;
1051 set_target_endian = 1;
1052 }
1053
1054 else if (strcmp (arg, "solaris") == 0)
1055 {
b34976b6 1056 msolaris = TRUE;
252b5132
RH		 1057 ppc_comment_chars = ppc_solaris_comment_chars;
1058 }
1059
1060 else if (strcmp (arg, "no-solaris") == 0)
1061 {
b34976b6 1062 msolaris = FALSE;
252b5132
RH		 1063 ppc_comment_chars = ppc_eabi_comment_chars;
1064 }
1065#endif
1066 else
1067 {
1068 as_bad (_("invalid switch -m%s"), arg);
1069 return 0;
1070 }
1071 break;
1072
1073#ifdef OBJ_ELF
1074 /* -V: SVR4 argument to print version ID. */
1075 case 'V':
1076 print_version_id ();
1077 break;
1078
1079 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1080 should be emitted or not. FIXME: Not implemented. */
1081 case 'Q':
1082 break;
1083
1084 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1085 rather than .stabs.excl, which is ignored by the linker.
1086 FIXME: Not implemented. */
1087 case 's':
1088 if (arg)
1089 return 0;
1090
1091 break;
1092#endif
1093
1094 default:
1095 return 0;
1096 }
1097
1098 return 1;
1099}
1100
1101void
98027b10 1102md_show_usage (FILE *stream)
252b5132 1103{
bc805888 1104 fprintf (stream, _("\
252b5132 1105PowerPC options:\n\
df12615d
AM		 1106-a32 generate ELF32/XCOFF32\n\
1107-a64 generate ELF64/XCOFF64\n\
252b5132 1108-u ignored\n\
23e1d84c
AM		 1109-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1110-mpwr generate code for POWER (RIOS1)\n\
1111-m601 generate code for PowerPC 601\n\
418c1742 1112-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1113 generate code for PowerPC 603/604\n\
df12615d 1114-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1115-m440 generate code for PowerPC 440\n\
f5c120c5 1116-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1117 generate code for PowerPC 7400/7410/7450/7455\n\
1118-m750cl generate code for PowerPC 750cl\n"));
df12615d 1119 fprintf (stream, _("\
23e1d84c 1120-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1121-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1122-mbooke64 generate code for 64-bit PowerPC BookE\n\
1123-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1124-mpower4 generate code for Power4 architecture\n\
b0648eec 1125-mpower5 generate code for Power5 architecture\n\
9622b051 1126-mpower6 generate code for Power6 architecture\n\
ede602d7 1127-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1128-mcom generate code Power/PowerPC common instructions\n\
df12615d 1129-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1130 fprintf (stream, _("\
df12615d 1131-maltivec generate code for AltiVec\n\
36ae0db3 1132-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1133-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1134-mspe generate code for Motorola SPE instructions\n\
1135-mregnames Allow symbolic names for registers\n\
1136-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1137#ifdef OBJ_ELF
bc805888 1138 fprintf (stream, _("\
252b5132
RH		 1139-mrelocatable support for GCC's -mrelocatble option\n\
1140-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1141-memb set PPC_EMB bit in ELF flags\n\
df12615d 1142-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1143 generate code for a little endian machine\n\
df12615d
AM		 1144-mbig, -mbig-endian, -b, -be\n\
1145 generate code for a big endian machine\n\
252b5132
RH		 1146-msolaris generate code for Solaris\n\
1147-mno-solaris do not generate code for Solaris\n\
1148-V print assembler version number\n\
1149-Qy, -Qn ignored\n"));
1150#endif
1151}
1152\f
1153/* Set ppc_cpu if it is not already set. */
1154
1155static void
98027b10 1156ppc_set_cpu (void)
252b5132
RH		 1157{
1158 const char *default_os = TARGET_OS;
1159 const char *default_cpu = TARGET_CPU;
1160
3c9030c1 1161 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1162 {
2a98c3a6 1163 if (ppc_obj64)
3c9030c1 1164 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1165 else if (strncmp (default_os, "aix", 3) == 0
1166 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1168 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1170 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1171 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1172 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1173 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1174 else
99a814a1
AM		 1175 as_fatal (_("Unknown default cpu = %s, os = %s"),
1176 default_cpu, default_os);
252b5132
RH		 1177 }
1178}
1179
9232bbb0
AM		 1180/* Figure out the BFD architecture to use. This function and ppc_mach
1181 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1182
1183enum bfd_architecture
98027b10 1184ppc_arch (void)
252b5132
RH		 1185{
1186 const char *default_cpu = TARGET_CPU;
1187 ppc_set_cpu ();
1188
1189 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1190 return bfd_arch_powerpc;
1191 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1192 return bfd_arch_rs6000;
1193 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1194 {
1195 if (strcmp (default_cpu, "rs6000") == 0)
1196 return bfd_arch_rs6000;
0baf16f2 1197 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1198 return bfd_arch_powerpc;
1199 }
1200
1201 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1202 return bfd_arch_unknown;
1203}
1204
7f6d05e8 1205unsigned long
98027b10 1206ppc_mach (void)
7f6d05e8 1207{
2a98c3a6
AM		 1208 if (ppc_obj64)
1209 return bfd_mach_ppc64;
1210 else if (ppc_arch () == bfd_arch_rs6000)
1211 return bfd_mach_rs6k;
1212 else
1213 return bfd_mach_ppc;
7f6d05e8
CP		 1214}
1215
81d4177b 1216extern char*
98027b10 1217ppc_target_format (void)
7f6d05e8
CP		 1218{
1219#ifdef OBJ_COFF
1220#ifdef TE_PE
99a814a1 1221 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1222#elif TE_POWERMAC
0baf16f2 1223 return "xcoff-powermac";
7f6d05e8 1224#else
eb1e0e80 1225# ifdef TE_AIX5
2b3c4602 1226 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# else
2b3c4602 1228 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1229# endif
7f6d05e8 1230#endif
7f6d05e8
CP		 1231#endif
1232#ifdef OBJ_ELF
9d8504b1
PB		 1233# ifdef TE_VXWORKS
1234 return "elf32-powerpc-vxworks";
1235# else
0baf16f2 1236 return (target_big_endian
2b3c4602
AM		 1237 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1238 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1239# endif
7f6d05e8
CP		 1240#endif
1241}
1242
69c040df
AM		 1243/* Insert opcodes and macros into hash tables. Called at startup and
1244 for .cpu pseudo. */
252b5132 1245
69c040df
AM		 1246static void
1247ppc_setup_opcodes (void)
252b5132 1248{
98027b10 1249 const struct powerpc_opcode *op;
252b5132
RH		 1250 const struct powerpc_opcode *op_end;
1251 const struct powerpc_macro *macro;
1252 const struct powerpc_macro *macro_end;
b84bf58a 1253 bfd_boolean bad_insn = FALSE;
8dbcd839 1254 unsigned long prev_opcode = 0;
252b5132 1255
69c040df
AM		 1256 if (ppc_hash != NULL)
1257 hash_die (ppc_hash);
1258 if (ppc_macro_hash != NULL)
1259 hash_die (ppc_macro_hash);
252b5132
RH		 1260
1261 /* Insert the opcodes into a hash table. */
1262 ppc_hash = hash_new ();
1263
c43a438d 1264 if (ENABLE_CHECKING)
b84bf58a 1265 {
c43a438d 1266 unsigned int i;
b84bf58a 1267
c43a438d
AM		 1268 /* Check operand masks. Code here and in the disassembler assumes
1269 all the 1's in the mask are contiguous. */
1270 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1271 {
c43a438d
AM		 1272 unsigned long mask = powerpc_operands[i].bitm;
1273 unsigned long right_bit;
1274 unsigned int j;
1275
1276 right_bit = mask & -mask;
1277 mask += right_bit;
1278 right_bit = mask & -mask;
1279 if (mask != right_bit)
1280 {
1281 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1282 bad_insn = TRUE;
1283 }
1284 for (j = i + 1; j < num_powerpc_operands; ++j)
1285 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1286 sizeof (powerpc_operands[0])) == 0)
1287 {
1288 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1289 j, i);
1290 bad_insn = TRUE;
1291 }
b84bf58a
AM		 1292 }
1293 }
1294
252b5132
RH		 1295 op_end = powerpc_opcodes + powerpc_num_opcodes;
1296 for (op = powerpc_opcodes; op < op_end; op++)
1297 {
c43a438d 1298 if (ENABLE_CHECKING)
b84bf58a 1299 {
c43a438d
AM		 1300 const unsigned char *o;
1301 unsigned long omask = op->mask;
8dbcd839
PB		 1302 unsigned long major_opcode = PPC_OP (op->opcode);
1303
1304 /* The major opcodes had better be sorted. Code in the disassembler
1305 assumes the insns are sorted according to major opcode. */
1306 if (major_opcode < prev_opcode)
1307 {
1308 as_bad (_("major opcode is not sorted for %s"),
1309 op->name);
1310 bad_insn = TRUE;
1311 }
1312 prev_opcode = major_opcode;
c43a438d
AM		 1313
1314 /* The mask had better not trim off opcode bits. */
1315 if ((op->opcode & omask) != op->opcode)
1316 {
1317 as_bad (_("mask trims opcode bits for %s"),
1318 op->name);
1319 bad_insn = TRUE;
1320 }
1321
1322 /* The operands must not overlap the opcode or each other. */
1323 for (o = op->operands; *o; ++o)
1324 if (*o >= num_powerpc_operands)
1325 {
1326 as_bad (_("operand index error for %s"),
1327 op->name);
1328 bad_insn = TRUE;
1329 }
1330 else
b84bf58a 1331 {
c43a438d
AM		 1332 const struct powerpc_operand *operand = &powerpc_operands[*o];
1333 if (operand->shift >= 0)
b84bf58a 1334 {
c43a438d
AM		 1335 unsigned long mask = operand->bitm << operand->shift;
1336 if (omask & mask)
1337 {
1338 as_bad (_("operand %d overlap in %s"),
1339 (int) (o - op->operands), op->name);
1340 bad_insn = TRUE;
1341 }
1342 omask |= mask;
b84bf58a 1343 }
b84bf58a 1344 }
c43a438d 1345 }
252b5132 1346
2b3c4602 1347 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1348 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1349 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1350 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1351 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1352 /* Certain instructions (eg: extsw) do not exist in the
1353 32-bit BookE instruction set, but they do exist in the
1354 64-bit BookE instruction set, and other PPC instruction
1355 sets. Check to see if the opcode has the BOOKE64 flag set.
1356 If it does make sure that the target CPU is not the BookE32. */
1357 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1358 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1359 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1360 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1361 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1362 == (ppc_cpu & PPC_OPCODE_POWER4)))
1363 && ((op->flags & PPC_OPCODE_POWER5) == 0
1364 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1365 == (ppc_cpu & PPC_OPCODE_POWER5)))
1366 && ((op->flags & PPC_OPCODE_POWER6) == 0
1367 || ((op->flags & PPC_OPCODE_POWER6)
1368 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1369 {
1370 const char *retval;
1371
98027b10 1372 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1373 if (retval != NULL)
252b5132 1374 {
99a814a1 1375 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1376 if ((ppc_cpu & PPC_OPCODE_601) != 0
1377 && (op->flags & PPC_OPCODE_POWER) != 0)
1378 continue;
1379
b84bf58a 1380 as_bad (_("duplicate instruction %s"),
99a814a1 1381 op->name);
b84bf58a 1382 bad_insn = TRUE;
252b5132
RH		 1383 }
1384 }
1385 }
1386
3c9030c1
AM		 1387 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1388 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1389 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1390
252b5132
RH		 1391 /* Insert the macros into a hash table. */
1392 ppc_macro_hash = hash_new ();
1393
1394 macro_end = powerpc_macros + powerpc_num_macros;
1395 for (macro = powerpc_macros; macro < macro_end; macro++)
1396 {
1397 if ((macro->flags & ppc_cpu) != 0)
1398 {
1399 const char *retval;
1400
98027b10 1401 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1402 if (retval != (const char *) NULL)
1403 {
b84bf58a
AM		 1404 as_bad (_("duplicate macro %s"), macro->name);
1405 bad_insn = TRUE;
252b5132
RH		 1406 }
1407 }
1408 }
1409
b84bf58a 1410 if (bad_insn)
252b5132 1411 abort ();
69c040df
AM		 1412}
1413
1414/* This function is called when the assembler starts up. It is called
1415 after the options have been parsed and the output file has been
1416 opened. */
1417
1418void
98027b10 1419md_begin (void)
69c040df
AM		 1420{
1421 ppc_set_cpu ();
1422
1423 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1424
1425#ifdef OBJ_ELF
1426 /* Set the ELF flags if desired. */
1427 if (ppc_flags && !msolaris)
1428 bfd_set_private_flags (stdoutput, ppc_flags);
1429#endif
1430
1431 ppc_setup_opcodes ();
252b5132 1432
67c1ffbe 1433 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1434 by the user. */
252b5132
RH		 1435 if (!set_target_endian)
1436 {
1437 set_target_endian = 1;
1438 target_big_endian = PPC_BIG_ENDIAN;
1439 }
1440
1441#ifdef OBJ_XCOFF
1442 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1443
1444 /* Create dummy symbols to serve as initial csects. This forces the
1445 text csects to precede the data csects. These symbols will not
1446 be output. */
1447 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1448 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1449 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1450 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1451#endif
1452
1453#ifdef TE_PE
1454
1455 ppc_current_section = text_section;
81d4177b 1456 ppc_previous_section = 0;
252b5132
RH		 1457
1458#endif
1459}
1460
6a0c61b7 1461void
98027b10 1462ppc_cleanup (void)
6a0c61b7 1463{
dc1d03fc 1464#ifdef OBJ_ELF
6a0c61b7
EZ		 1465 if (ppc_apuinfo_list == NULL)
1466 return;
1467
1468 /* Ok, so write the section info out. We have this layout:
1469
1470 byte data what
1471 ---- ---- ----
1472 0 8 length of "APUinfo\0"
1473 4 (n*4) number of APU's (4 bytes each)
1474 8 2 note type 2
1475 12 "APUinfo\0" name
1476 20 APU#1 first APU's info
1477 24 APU#2 second APU's info
1478 ... ...
1479 */
1480 {
1481 char *p;
1482 asection *seg = now_seg;
1483 subsegT subseg = now_subseg;
1484 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1485 unsigned int i;
6a0c61b7
EZ		 1486
1487 /* Create the .PPC.EMB.apuinfo section. */
1488 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1489 bfd_set_section_flags (stdoutput,
1490 apuinfo_secp,
e1a9cb8e 1491 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1492
1493 p = frag_more (4);
1494 md_number_to_chars (p, (valueT) 8, 4);
1495
1496 p = frag_more (4);
e98d298c 1497 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1498
1499 p = frag_more (4);
1500 md_number_to_chars (p, (valueT) 2, 4);
1501
1502 p = frag_more (8);
1503 strcpy (p, "APUinfo");
1504
1505 for (i = 0; i < ppc_apuinfo_num; i++)
1506 {
b34976b6
AM		 1507 p = frag_more (4);
1508 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1509 }
1510
1511 frag_align (2, 0, 0);
1512
1513 /* We probably can't restore the current segment, for there likely
1514 isn't one yet... */
1515 if (seg && subseg)
1516 subseg_set (seg, subseg);
1517 }
dc1d03fc 1518#endif
6a0c61b7
EZ		 1519}
1520
252b5132
RH		 1521/* Insert an operand value into an instruction. */
1522
1523static unsigned long
a1867a27
AM		 1524ppc_insert_operand (unsigned long insn,
1525 const struct powerpc_operand *operand,
1526 offsetT val,
1527 char *file,
1528 unsigned int line)
252b5132 1529{
b84bf58a 1530 long min, max, right;
eb42fac1 1531
b84bf58a
AM		 1532 max = operand->bitm;
1533 right = max & -max;
1534 min = 0;
1535
1536 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1537 {
b84bf58a 1538 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1539 max = (max >> 1) & -right;
1540 min = ~max & -right;
b84bf58a 1541 }
252b5132 1542
b84bf58a 1543 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1544 max++;
252b5132 1545
b84bf58a 1546 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1547 {
1548 long tmp = min;
1549 min = -max;
1550 max = -tmp;
1551 }
b84bf58a 1552
a1867a27
AM		 1553 if (min <= max)
1554 {
1555 /* Some people write constants with the sign extension done by
1556 hand but only up to 32 bits. This shouldn't really be valid,
1557 but, to permit this code to assemble on a 64-bit host, we
1558 sign extend the 32-bit value to 64 bits if so doing makes the
1559 value valid. */
1560 if (val > max
1561 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1562 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1563 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1564 val = val - 0x80000000 - 0x80000000;
1565
1566 /* Similarly, people write expressions like ~(1<<15), and expect
1567 this to be OK for a 32-bit unsigned value. */
1568 else if (val < min
1569 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1570 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1571 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1572 val = val + 0x80000000 + 0x80000000;
1573
1574 else if (val < min
1575 || val > max
1576 || (val & (right - 1)) != 0)
1577 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1578 }
b84bf58a 1579
252b5132
RH		 1580 if (operand->insert)
1581 {
1582 const char *errmsg;
1583
1584 errmsg = NULL;
2b3c4602 1585 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1586 if (errmsg != (const char *) NULL)
0baf16f2 1587 as_bad_where (file, line, errmsg);
252b5132
RH		 1588 }
1589 else
b84bf58a 1590 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1591
1592 return insn;
1593}
1594
1595\f
1596#ifdef OBJ_ELF
1597/* Parse @got, etc. and return the desired relocation. */
1598static bfd_reloc_code_real_type
98027b10 1599ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1600{
1601 struct map_bfd {
1602 char *string;
b7d7dc63
AM		 1603 unsigned int length : 8;
1604 unsigned int valid32 : 1;
1605 unsigned int valid64 : 1;
1606 unsigned int reloc;
252b5132
RH		 1607 };
1608
1609 char ident[20];
1610 char *str = *str_p;
1611 char *str2;
1612 int ch;
1613 int len;
15c1449b 1614 const struct map_bfd *ptr;
252b5132 1615
b7d7dc63
AM		 1616#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1617#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1618#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1619
15c1449b 1620 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1621 MAP ("l", BFD_RELOC_LO16),
1622 MAP ("h", BFD_RELOC_HI16),
1623 MAP ("ha", BFD_RELOC_HI16_S),
1624 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1625 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1626 MAP ("got", BFD_RELOC_16_GOTOFF),
1627 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1628 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1629 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1630 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1631 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1632 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1633 MAP ("copy", BFD_RELOC_PPC_COPY),
1634 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1635 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1636 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1637 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1638 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1639 MAP ("tls", BFD_RELOC_PPC_TLS),
1640 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1641 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1642 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1643 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1644 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1645 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1646 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1647 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1648 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1649 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1650 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1651 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1652 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1653 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1654 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1655 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1656 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1657 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1658 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1659 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1660 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1661 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1662 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1663 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1664 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1665 MAP32 ("fixup", BFD_RELOC_CTOR),
1666 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1667 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1668 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1669 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1670 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1671 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1672 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1673 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1674 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1675 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1676 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1677 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1678 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1679 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1680 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1681 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1682 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1683 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1684 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1685 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1686 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1687 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1688 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1689 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1690 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1691 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1692 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1693 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1694 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1695 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1696 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1697 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1698 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1699 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1700 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1701 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1702 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1703 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1704 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1705 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1706 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1707 };
1708
1709 if (*str++ != '@')
1710 return BFD_RELOC_UNUSED;
1711
1712 for (ch = *str, str2 = ident;
1713 (str2 < ident + sizeof (ident) - 1
3882b010 1714 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1715 ch = *++str)
1716 {
3882b010 1717 *str2++ = TOLOWER (ch);
252b5132
RH		 1718 }
1719
1720 *str2 = '\0';
1721 len = str2 - ident;
1722
1723 ch = ident[0];
1724 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1725 if (ch == ptr->string[0]
1726 && len == ptr->length
b7d7dc63
AM		 1727 && memcmp (ident, ptr->string, ptr->length) == 0
1728 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1729 {
15c1449b
AM		 1730 int reloc = ptr->reloc;
1731
cdba85ec 1732 if (!ppc_obj64)
5f6db75a
AM		 1733 if (exp_p->X_add_number != 0
1734 && (reloc == (int) BFD_RELOC_16_GOTOFF
1735 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1736 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1737 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1738 as_warn (_("identifier+constant@got means identifier@got+constant"));
1739
1740 /* Now check for identifier@suffix+constant. */
1741 if (*str == '-' || *str == '+')
252b5132 1742 {
5f6db75a
AM		 1743 char *orig_line = input_line_pointer;
1744 expressionS new_exp;
1745
1746 input_line_pointer = str;
1747 expression (&new_exp);
1748 if (new_exp.X_op == O_constant)
252b5132 1749 {
5f6db75a
AM		 1750 exp_p->X_add_number += new_exp.X_add_number;
1751 str = input_line_pointer;
252b5132 1752 }
5f6db75a
AM		 1753
1754 if (&input_line_pointer != str_p)
1755 input_line_pointer = orig_line;
252b5132 1756 }
252b5132 1757 *str_p = str;
0baf16f2 1758
2b3c4602 1759 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1760 && exp_p->X_op == O_symbol
1761 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1762 {
9f2b53d7
AM		 1763 /* Change the symbol so that the dummy .TOC. symbol can be
1764 omitted from the object file. */
0baf16f2
AM		 1765 exp_p->X_add_symbol = &abs_symbol;
1766 }
1767
15c1449b 1768 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1769 }
1770
1771 return BFD_RELOC_UNUSED;
1772}
1773
99a814a1
AM		 1774/* Like normal .long/.short/.word, except support @got, etc.
1775 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1776static void
98027b10 1777ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1778{
1779 expressionS exp;
1780 bfd_reloc_code_real_type reloc;
1781
1782 if (is_it_end_of_statement ())
1783 {
1784 demand_empty_rest_of_line ();
1785 return;
1786 }
1787
1788 do
1789 {
1790 expression (&exp);
1791 if (exp.X_op == O_symbol
1792 && *input_line_pointer == '@'
99a814a1
AM		 1793 && (reloc = ppc_elf_suffix (&input_line_pointer,
1794 &exp)) != BFD_RELOC_UNUSED)
252b5132 1795 {
99a814a1
AM		 1796 reloc_howto_type *reloc_howto;
1797 int size;
1798
1799 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1800 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1801
1802 if (size > nbytes)
0baf16f2
AM		 1803 {
1804 as_bad (_("%s relocations do not fit in %d bytes\n"),
1805 reloc_howto->name, nbytes);
1806 }
252b5132
RH		 1807 else
1808 {
0baf16f2
AM		 1809 char *p;
1810 int offset;
252b5132 1811
0baf16f2
AM		 1812 p = frag_more (nbytes);
1813 offset = 0;
1814 if (target_big_endian)
1815 offset = nbytes - size;
99a814a1
AM		 1816 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1817 &exp, 0, reloc);
252b5132
RH		 1818 }
1819 }
1820 else
1821 emit_expr (&exp, (unsigned int) nbytes);
1822 }
1823 while (*input_line_pointer++ == ',');
1824
99a814a1
AM		 1825 /* Put terminator back into stream. */
1826 input_line_pointer--;
252b5132
RH		 1827 demand_empty_rest_of_line ();
1828}
1829
1830/* Solaris pseduo op to change to the .rodata section. */
1831static void
98027b10 1832ppc_elf_rdata (int xxx)
252b5132
RH		 1833{
1834 char *save_line = input_line_pointer;
1835 static char section[] = ".rodata\n";
1836
99a814a1 1837 /* Just pretend this is .section .rodata */
252b5132
RH		 1838 input_line_pointer = section;
1839 obj_elf_section (xxx);
1840
1841 input_line_pointer = save_line;
1842}
1843
99a814a1 1844/* Pseudo op to make file scope bss items. */
252b5132 1845static void
98027b10 1846ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1847{
98027b10
AM		 1848 char *name;
1849 char c;
1850 char *p;
252b5132 1851 offsetT size;
98027b10 1852 symbolS *symbolP;
252b5132
RH		 1853 offsetT align;
1854 segT old_sec;
1855 int old_subsec;
1856 char *pfrag;
1857 int align2;
1858
1859 name = input_line_pointer;
1860 c = get_symbol_end ();
1861
99a814a1 1862 /* just after name is now '\0'. */
252b5132
RH		 1863 p = input_line_pointer;
1864 *p = c;
1865 SKIP_WHITESPACE ();
1866 if (*input_line_pointer != ',')
1867 {
1868 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1869 ignore_rest_of_line ();
1870 return;
1871 }
1872
1873 input_line_pointer++; /* skip ',' */
1874 if ((size = get_absolute_expression ()) < 0)
1875 {
1876 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1877 ignore_rest_of_line ();
1878 return;
1879 }
1880
1881 /* The third argument to .lcomm is the alignment. */
1882 if (*input_line_pointer != ',')
1883 align = 8;
1884 else
1885 {
1886 ++input_line_pointer;
1887 align = get_absolute_expression ();
1888 if (align <= 0)
1889 {
1890 as_warn (_("ignoring bad alignment"));
1891 align = 8;
1892 }
1893 }
1894
1895 *p = 0;
1896 symbolP = symbol_find_or_make (name);
1897 *p = c;
1898
1899 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1900 {
1901 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1902 S_GET_NAME (symbolP));
1903 ignore_rest_of_line ();
1904 return;
1905 }
1906
1907 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1908 {
1909 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1910 S_GET_NAME (symbolP),
1911 (long) S_GET_VALUE (symbolP),
1912 (long) size);
1913
1914 ignore_rest_of_line ();
1915 return;
1916 }
1917
99a814a1 1918 /* Allocate_bss. */
252b5132
RH		 1919 old_sec = now_seg;
1920 old_subsec = now_subseg;
1921 if (align)
1922 {
99a814a1 1923 /* Convert to a power of 2 alignment. */
252b5132
RH		 1924 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1925 if (align != 1)
1926 {
1927 as_bad (_("Common alignment not a power of 2"));
1928 ignore_rest_of_line ();
1929 return;
1930 }
1931 }
1932 else
1933 align2 = 0;
1934
1935 record_alignment (bss_section, align2);
1936 subseg_set (bss_section, 0);
1937 if (align2)
1938 frag_align (align2, 0, 0);
1939 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1940 symbol_get_frag (symbolP)->fr_symbol = 0;
1941 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1942 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1943 (char *) 0);
1944 *pfrag = 0;
1945 S_SET_SIZE (symbolP, size);
1946 S_SET_SEGMENT (symbolP, bss_section);
1947 subseg_set (old_sec, old_subsec);
1948 demand_empty_rest_of_line ();
1949}
1950
1951/* Validate any relocations emitted for -mrelocatable, possibly adding
1952 fixups for word relocations in writable segments, so we can adjust
1953 them at runtime. */
1954static void
98027b10 1955ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 1956{
1957 if (fixp->fx_done || fixp->fx_pcrel)
1958 return;
1959
1960 switch (shlib)
1961 {
1962 case SHLIB_NONE:
1963 case SHLIB_PIC:
1964 return;
1965
5d6f4f16 1966 case SHLIB_MRELOCATABLE:
252b5132
RH		 1967 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1968 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1969 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1970 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1971 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1972 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1973 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1974 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1975 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1976 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1977 && strcmp (segment_name (seg), ".got2") != 0
1978 && strcmp (segment_name (seg), ".dtors") != 0
1979 && strcmp (segment_name (seg), ".ctors") != 0
1980 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1981 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1982 && strcmp (segment_name (seg), ".eh_frame") != 0
1983 && strcmp (segment_name (seg), ".ex_shared") != 0)
1984 {
1985 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1986 || fixp->fx_r_type != BFD_RELOC_CTOR)
1987 {
1988 as_bad_where (fixp->fx_file, fixp->fx_line,
1989 _("Relocation cannot be done when using -mrelocatable"));
1990 }
1991 }
1992 return;
1993 }
1994}
0baf16f2 1995
7e8d4ab4
AM		 1996/* Prevent elf_frob_file_before_adjust removing a weak undefined
1997 function descriptor sym if the corresponding code sym is used. */
1998
1999void
98027b10 2000ppc_frob_file_before_adjust (void)
0baf16f2 2001{
7e8d4ab4 2002 symbolS *symp;
9232bbb0 2003 asection *toc;
0baf16f2 2004
7e8d4ab4
AM		 2005 if (!ppc_obj64)
2006 return;
2007
2008 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2009 {
7e8d4ab4
AM		 2010 const char *name;
2011 char *dotname;
2012 symbolS *dotsym;
2013 size_t len;
2014
2015 name = S_GET_NAME (symp);
2016 if (name[0] == '.')
2017 continue;
2018
2019 if (! S_IS_WEAK (symp)
2020 || S_IS_DEFINED (symp))
2021 continue;
2022
2023 len = strlen (name) + 1;
2024 dotname = xmalloc (len + 1);
2025 dotname[0] = '.';
2026 memcpy (dotname + 1, name, len);
461b725f 2027 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2028 free (dotname);
2029 if (dotsym != NULL && (symbol_used_p (dotsym)
2030 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2031 symbol_mark_used (symp);
2032
0baf16f2
AM		 2033 }
2034
9232bbb0
AM		 2035 toc = bfd_get_section_by_name (stdoutput, ".toc");
2036 if (toc != NULL
2037 && bfd_section_size (stdoutput, toc) > 0x10000)
2038 as_warn (_("TOC section size exceeds 64k"));
2039
7e8d4ab4
AM		 2040 /* Don't emit .TOC. symbol. */
2041 symp = symbol_find (".TOC.");
2042 if (symp != NULL)
2043 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2044}
252b5132
RH		 2045#endif /* OBJ_ELF */
2046\f
2047#ifdef TE_PE
2048
2049/*
99a814a1 2050 * Summary of parse_toc_entry.
252b5132
RH		 2051 *
2052 * in: Input_line_pointer points to the '[' in one of:
2053 *
2054 * [toc] [tocv] [toc32] [toc64]
2055 *
2056 * Anything else is an error of one kind or another.
2057 *
81d4177b 2058 * out:
252b5132
RH		 2059 * return value: success or failure
2060 * toc_kind: kind of toc reference
2061 * input_line_pointer:
2062 * success: first char after the ']'
2063 * failure: unchanged
2064 *
2065 * settings:
2066 *
2067 * [toc] - rv == success, toc_kind = default_toc
2068 * [tocv] - rv == success, toc_kind = data_in_toc
2069 * [toc32] - rv == success, toc_kind = must_be_32
2070 * [toc64] - rv == success, toc_kind = must_be_64
2071 *
2072 */
2073
81d4177b
KH		 2074enum toc_size_qualifier
2075{
252b5132
RH		 2076 default_toc, /* The toc cell constructed should be the system default size */
2077 data_in_toc, /* This is a direct reference to a toc cell */
2078 must_be_32, /* The toc cell constructed must be 32 bits wide */
2079 must_be_64 /* The toc cell constructed must be 64 bits wide */
2080};
2081
2082static int
98027b10 2083parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2084{
2085 char *start;
2086 char *toc_spec;
2087 char c;
2088 enum toc_size_qualifier t;
2089
99a814a1 2090 /* Save the input_line_pointer. */
252b5132
RH		 2091 start = input_line_pointer;
2092
99a814a1 2093 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2094 ++input_line_pointer;
2095 SKIP_WHITESPACE ();
81d4177b 2096
99a814a1 2097 /* Find the spelling of the operand. */
252b5132
RH		 2098 toc_spec = input_line_pointer;
2099 c = get_symbol_end ();
2100
99a814a1 2101 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2102 {
2103 t = default_toc;
2104 }
99a814a1 2105 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2106 {
2107 t = data_in_toc;
2108 }
99a814a1 2109 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2110 {
2111 t = must_be_32;
2112 }
99a814a1 2113 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2114 {
2115 t = must_be_64;
2116 }
2117 else
2118 {
2119 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2120 *input_line_pointer = c;
2121 input_line_pointer = start;
252b5132
RH		 2122 return 0;
2123 }
2124
99a814a1
AM		 2125 /* Now find the ']'. */
2126 *input_line_pointer = c;
252b5132 2127
81d4177b
KH		 2128 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2129 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2130
2131 if (c != ']')
2132 {
2133 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2134 input_line_pointer = start;
252b5132
RH		 2135 return 0;
2136 }
2137
99a814a1 2138 *toc_kind = t;
252b5132
RH		 2139 return 1;
2140}
2141#endif
2142\f
2143
dc1d03fc 2144#ifdef OBJ_ELF
6a0c61b7
EZ		 2145#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2146static void
98027b10 2147ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2148{
2149 unsigned int i;
2150
2151 /* Check we don't already exist. */
2152 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2153 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2154 return;
b34976b6 2155
6a0c61b7
EZ		 2156 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2157 {
2158 if (ppc_apuinfo_num_alloc == 0)
2159 {
2160 ppc_apuinfo_num_alloc = 4;
2161 ppc_apuinfo_list = (unsigned long *)
2162 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2163 }
2164 else
2165 {
2166 ppc_apuinfo_num_alloc += 4;
2167 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2168 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2169 }
2170 }
dc1d03fc 2171 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2172}
2173#undef APUID
dc1d03fc 2174#endif
6a0c61b7
EZ		 2175\f
2176
252b5132
RH		 2177/* We need to keep a list of fixups. We can't simply generate them as
2178 we go, because that would require us to first create the frag, and
2179 that would screw up references to ``.''. */
2180
2181struct ppc_fixup
2182{
2183 expressionS exp;
2184 int opindex;
2185 bfd_reloc_code_real_type reloc;
2186};
2187
2188#define MAX_INSN_FIXUPS (5)
2189
2190/* This routine is called for each instruction to be assembled. */
2191
2192void
98027b10 2193md_assemble (char *str)
252b5132
RH		 2194{
2195 char *s;
2196 const struct powerpc_opcode *opcode;
2197 unsigned long insn;
2198 const unsigned char *opindex_ptr;
2199 int skip_optional;
2200 int need_paren;
2201 int next_opindex;
2202 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2203 int fc;
2204 char *f;
09b935ac 2205 int addr_mod;
252b5132
RH		 2206 int i;
2207#ifdef OBJ_ELF
2208 bfd_reloc_code_real_type reloc;
2209#endif
2210
2211 /* Get the opcode. */
3882b010 2212 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2213 ;
2214 if (*s != '\0')
2215 *s++ = '\0';
2216
2217 /* Look up the opcode in the hash table. */
2218 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2219 if (opcode == (const struct powerpc_opcode *) NULL)
2220 {
2221 const struct powerpc_macro *macro;
2222
2223 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2224 if (macro == (const struct powerpc_macro *) NULL)
2225 as_bad (_("Unrecognized opcode: `%s'"), str);
2226 else
2227 ppc_macro (s, macro);
2228
2229 return;
2230 }
2231
2232 insn = opcode->opcode;
2233
2234 str = s;
3882b010 2235 while (ISSPACE (*str))
252b5132
RH		 2236 ++str;
2237
2238 /* PowerPC operands are just expressions. The only real issue is
2239 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2240 an optional operand separate the operands only with commas (in some
2241 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2242 have optional operands). Most instructions with optional operands
2243 have only one. Those that have more than one optional operand can
2244 take either all their operands or none. So, before we start seriously
2245 parsing the operands, we check to see if we have optional operands,
2246 and if we do, we count the number of commas to see which operands
2247 have been omitted. */
252b5132
RH		 2248 skip_optional = 0;
2249 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2250 {
2251 const struct powerpc_operand *operand;
2252
2253 operand = &powerpc_operands[*opindex_ptr];
2254 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2255 {
2256 unsigned int opcount;
7fe9cf6b
NC		 2257 unsigned int num_operands_expected;
2258 unsigned int i;
252b5132
RH		 2259
2260 /* There is an optional operand. Count the number of
2261 commas in the input line. */
2262 if (*str == '\0')
2263 opcount = 0;
2264 else
2265 {
2266 opcount = 1;
2267 s = str;
2268 while ((s = strchr (s, ',')) != (char *) NULL)
2269 {
2270 ++opcount;
2271 ++s;
2272 }
2273 }
2274
7fe9cf6b
NC		 2275 /* Compute the number of expected operands.
2276 Do not count fake operands. */
2277 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2278 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2279 ++ num_operands_expected;
2280
252b5132
RH		 2281 /* If there are fewer operands in the line then are called
2282 for by the instruction, we want to skip the optional
1f6c9eb0 2283 operands. */
7fe9cf6b 2284 if (opcount < num_operands_expected)
252b5132
RH		 2285 skip_optional = 1;
2286
2287 break;
2288 }
2289 }
2290
2291 /* Gather the operands. */
2292 need_paren = 0;
2293 next_opindex = 0;
2294 fc = 0;
2295 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2296 {
2297 const struct powerpc_operand *operand;
2298 const char *errmsg;
2299 char *hold;
2300 expressionS ex;
2301 char endc;
2302
2303 if (next_opindex == 0)
2304 operand = &powerpc_operands[*opindex_ptr];
2305 else
2306 {
2307 operand = &powerpc_operands[next_opindex];
2308 next_opindex = 0;
2309 }
252b5132
RH		 2310 errmsg = NULL;
2311
2312 /* If this is a fake operand, then we do not expect anything
2313 from the input. */
2314 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2315 {
2b3c4602 2316 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2317 if (errmsg != (const char *) NULL)
2318 as_bad (errmsg);
2319 continue;
2320 }
2321
2322 /* If this is an optional operand, and we are skipping it, just
2323 insert a zero. */
2324 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2325 && skip_optional)
2326 {
2327 if (operand->insert)
2328 {
2b3c4602 2329 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2330 if (errmsg != (const char *) NULL)
2331 as_bad (errmsg);
2332 }
2333 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2334 next_opindex = *opindex_ptr + 1;
2335 continue;
2336 }
2337
2338 /* Gather the operand. */
2339 hold = input_line_pointer;
2340 input_line_pointer = str;
2341
2342#ifdef TE_PE
81d4177b 2343 if (*input_line_pointer == '[')
252b5132
RH		 2344 {
2345 /* We are expecting something like the second argument here:
99a814a1
AM		 2346 *
2347 * lwz r4,[toc].GS.0.static_int(rtoc)
2348 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2349 * The argument following the `]' must be a symbol name, and the
2350 * register must be the toc register: 'rtoc' or '2'
2351 *
2352 * The effect is to 0 as the displacement field
2353 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2354 * the appropriate variation) reloc against it based on the symbol.
2355 * The linker will build the toc, and insert the resolved toc offset.
2356 *
2357 * Note:
2358 * o The size of the toc entry is currently assumed to be
2359 * 32 bits. This should not be assumed to be a hard coded
2360 * number.
2361 * o In an effort to cope with a change from 32 to 64 bits,
2362 * there are also toc entries that are specified to be
2363 * either 32 or 64 bits:
2364 * lwz r4,[toc32].GS.0.static_int(rtoc)
2365 * lwz r4,[toc64].GS.0.static_int(rtoc)
2366 * These demand toc entries of the specified size, and the
2367 * instruction probably requires it.
2368 */
252b5132
RH		 2369
2370 int valid_toc;
2371 enum toc_size_qualifier toc_kind;
2372 bfd_reloc_code_real_type toc_reloc;
2373
99a814a1
AM		 2374 /* Go parse off the [tocXX] part. */
2375 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2376
81d4177b 2377 if (!valid_toc)
252b5132 2378 {
99a814a1
AM		 2379 /* Note: message has already been issued.
2380 FIXME: what sort of recovery should we do?
2381 demand_rest_of_line (); return; ? */
252b5132
RH		 2382 }
2383
99a814a1
AM		 2384 /* Now get the symbol following the ']'. */
2385 expression (&ex);
252b5132
RH		 2386
2387 switch (toc_kind)
2388 {
2389 case default_toc:
99a814a1
AM		 2390 /* In this case, we may not have seen the symbol yet,
2391 since it is allowed to appear on a .extern or .globl
2392 or just be a label in the .data section. */
252b5132
RH		 2393 toc_reloc = BFD_RELOC_PPC_TOC16;
2394 break;
2395 case data_in_toc:
99a814a1
AM		 2396 /* 1. The symbol must be defined and either in the toc
2397 section, or a global.
2398 2. The reloc generated must have the TOCDEFN flag set
2399 in upper bit mess of the reloc type.
2400 FIXME: It's a little confusing what the tocv
2401 qualifier can be used for. At the very least, I've
2402 seen three uses, only one of which I'm sure I can
2403 explain. */
81d4177b
KH		 2404 if (ex.X_op == O_symbol)
2405 {
252b5132 2406 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2407 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2408 != tocdata_section)
252b5132 2409 {
99a814a1 2410 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2411 }
2412 }
2413
2414 toc_reloc = BFD_RELOC_PPC_TOC16;
2415 break;
2416 case must_be_32:
99a814a1
AM		 2417 /* FIXME: these next two specifically specify 32/64 bit
2418 toc entries. We don't support them today. Is this
2419 the right way to say that? */
252b5132
RH		 2420 toc_reloc = BFD_RELOC_UNUSED;
2421 as_bad (_("Unimplemented toc32 expression modifier"));
2422 break;
2423 case must_be_64:
99a814a1 2424 /* FIXME: see above. */
252b5132
RH		 2425 toc_reloc = BFD_RELOC_UNUSED;
2426 as_bad (_("Unimplemented toc64 expression modifier"));
2427 break;
2428 default:
bc805888 2429 fprintf (stderr,
99a814a1
AM		 2430 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2431 toc_kind);
bc805888 2432 abort ();
252b5132
RH		 2433 break;
2434 }
2435
2436 /* We need to generate a fixup for this expression. */
2437 if (fc >= MAX_INSN_FIXUPS)
2438 as_fatal (_("too many fixups"));
2439
2440 fixups[fc].reloc = toc_reloc;
2441 fixups[fc].exp = ex;
2442 fixups[fc].opindex = *opindex_ptr;
2443 ++fc;
2444
99a814a1
AM		 2445 /* Ok. We've set up the fixup for the instruction. Now make it
2446 look like the constant 0 was found here. */
252b5132
RH		 2447 ex.X_unsigned = 1;
2448 ex.X_op = O_constant;
2449 ex.X_add_number = 0;
2450 ex.X_add_symbol = NULL;
2451 ex.X_op_symbol = NULL;
2452 }
2453
2454 else
2455#endif /* TE_PE */
2456 {
2457 if (! register_name (&ex))
2458 {
13abbae3
AM		 2459 char save_lex = lex_type['%'];
2460
252b5132 2461 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2462 {
2463 cr_operand = TRUE;
2464 lex_type['%'] |= LEX_BEGIN_NAME;
2465 }
252b5132 2466 expression (&ex);
b34976b6 2467 cr_operand = FALSE;
13abbae3 2468 lex_type['%'] = save_lex;
252b5132
RH		 2469 }
2470 }
2471
2472 str = input_line_pointer;
2473 input_line_pointer = hold;
2474
2475 if (ex.X_op == O_illegal)
2476 as_bad (_("illegal operand"));
2477 else if (ex.X_op == O_absent)
2478 as_bad (_("missing operand"));
2479 else if (ex.X_op == O_register)
2480 {
2481 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2482 (char *) NULL, 0);
2483 }
2484 else if (ex.X_op == O_constant)
2485 {
2486#ifdef OBJ_ELF
81d4177b 2487 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2488 char *orig_str = str;
2489
2490 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2491 switch (reloc)
2492 {
2493 default:
2494 str = orig_str;
2495 break;
2496
2497 case BFD_RELOC_LO16:
2498 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2499 something which cleared it, we always produce a
2500 signed value. */
2501 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2502 ex.X_add_number &= 0xffff;
2503 else
0baf16f2 2504 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2505 break;
2506
2507 case BFD_RELOC_HI16:
0baf16f2
AM		 2508 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2509 ex.X_add_number = PPC_HI (ex.X_add_number);
2510 else
2511 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2512 break;
2513
2514 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2515 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2516 ex.X_add_number = PPC_HA (ex.X_add_number);
2517 else
2518 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2519 break;
2520
0baf16f2
AM		 2521 case BFD_RELOC_PPC64_HIGHER:
2522 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2523 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2524 else
2525 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2526 break;
2527
2528 case BFD_RELOC_PPC64_HIGHER_S:
2529 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2530 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2531 else
2532 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2533 break;
0baf16f2
AM		 2534
2535 case BFD_RELOC_PPC64_HIGHEST:
2536 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2537 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2538 else
2539 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2540 break;
2541
2542 case BFD_RELOC_PPC64_HIGHEST_S:
2543 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2544 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2545 else
2546 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2547 break;
252b5132 2548 }
0baf16f2 2549#endif /* OBJ_ELF */
252b5132
RH		 2550 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2551 (char *) NULL, 0);
2552 }
2553#ifdef OBJ_ELF
2554 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2555 {
cdba85ec
AM		 2556 /* Some TLS tweaks. */
2557 switch (reloc)
2558 {
2559 default:
2560 break;
2561 case BFD_RELOC_PPC_TLS:
2562 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2563 (char *) NULL, 0);
2564 break;
2565 /* We'll only use the 32 (or 64) bit form of these relocations
2566 in constants. Instructions get the 16 bit form. */
2567 case BFD_RELOC_PPC_DTPREL:
2568 reloc = BFD_RELOC_PPC_DTPREL16;
2569 break;
2570 case BFD_RELOC_PPC_TPREL:
2571 reloc = BFD_RELOC_PPC_TPREL16;
2572 break;
2573 }
2574
99a814a1
AM		 2575 /* For the absolute forms of branches, convert the PC
2576 relative form back into the absolute. */
252b5132
RH		 2577 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2578 {
2579 switch (reloc)
2580 {
2581 case BFD_RELOC_PPC_B26:
2582 reloc = BFD_RELOC_PPC_BA26;
2583 break;
2584 case BFD_RELOC_PPC_B16:
2585 reloc = BFD_RELOC_PPC_BA16;
2586 break;
2587 case BFD_RELOC_PPC_B16_BRTAKEN:
2588 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2589 break;
2590 case BFD_RELOC_PPC_B16_BRNTAKEN:
2591 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2592 break;
2593 default:
2594 break;
2595 }
2596 }
2597
2b3c4602 2598 if (ppc_obj64
adadcc0c 2599 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2600 {
2601 switch (reloc)
2602 {
2603 case BFD_RELOC_16:
2604 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2605 break;
2606 case BFD_RELOC_LO16:
2607 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2608 break;
2609 case BFD_RELOC_16_GOTOFF:
2610 reloc = BFD_RELOC_PPC64_GOT16_DS;
2611 break;
2612 case BFD_RELOC_LO16_GOTOFF:
2613 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2614 break;
2615 case BFD_RELOC_LO16_PLTOFF:
2616 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2617 break;
1cfc59d5 2618 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2619 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2620 break;
2621 case BFD_RELOC_LO16_BASEREL:
2622 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2623 break;
2624 case BFD_RELOC_PPC_TOC16:
2625 reloc = BFD_RELOC_PPC64_TOC16_DS;
2626 break;
2627 case BFD_RELOC_PPC64_TOC16_LO:
2628 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2629 break;
2630 case BFD_RELOC_PPC64_PLTGOT16:
2631 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2632 break;
2633 case BFD_RELOC_PPC64_PLTGOT16_LO:
2634 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2635 break;
cdba85ec
AM		 2636 case BFD_RELOC_PPC_DTPREL16:
2637 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2638 break;
2639 case BFD_RELOC_PPC_DTPREL16_LO:
2640 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2641 break;
2642 case BFD_RELOC_PPC_TPREL16:
2643 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2644 break;
2645 case BFD_RELOC_PPC_TPREL16_LO:
2646 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2647 break;
2648 case BFD_RELOC_PPC_GOT_DTPREL16:
2649 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2650 case BFD_RELOC_PPC_GOT_TPREL16:
2651 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2652 break;
0baf16f2
AM		 2653 default:
2654 as_bad (_("unsupported relocation for DS offset field"));
2655 break;
2656 }
2657 }
2658
252b5132
RH		 2659 /* We need to generate a fixup for this expression. */
2660 if (fc >= MAX_INSN_FIXUPS)
2661 as_fatal (_("too many fixups"));
2662 fixups[fc].exp = ex;
2663 fixups[fc].opindex = 0;
2664 fixups[fc].reloc = reloc;
2665 ++fc;
2666 }
2667#endif /* OBJ_ELF */
2668
2669 else
2670 {
2671 /* We need to generate a fixup for this expression. */
2672 if (fc >= MAX_INSN_FIXUPS)
2673 as_fatal (_("too many fixups"));
2674 fixups[fc].exp = ex;
2675 fixups[fc].opindex = *opindex_ptr;
2676 fixups[fc].reloc = BFD_RELOC_UNUSED;
2677 ++fc;
2678 }
2679
2680 if (need_paren)
2681 {
2682 endc = ')';
2683 need_paren = 0;
c3d65c1c
BE		 2684 /* If expecting more operands, then we want to see "),". */
2685 if (*str == endc && opindex_ptr[1] != 0)
2686 {
2687 do
2688 ++str;
2689 while (ISSPACE (*str));
2690 endc = ',';
2691 }
252b5132
RH		 2692 }
2693 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2694 {
2695 endc = '(';
2696 need_paren = 1;
2697 }
2698 else
2699 endc = ',';
2700
2701 /* The call to expression should have advanced str past any
2702 whitespace. */
2703 if (*str != endc
2704 && (endc != ',' || *str != '\0'))
2705 {
2706 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2707 break;
2708 }
2709
2710 if (*str != '\0')
2711 ++str;
2712 }
2713
3882b010 2714 while (ISSPACE (*str))
252b5132
RH		 2715 ++str;
2716
2717 if (*str != '\0')
2718 as_bad (_("junk at end of line: `%s'"), str);
2719
dc1d03fc 2720#ifdef OBJ_ELF
6a0c61b7
EZ		 2721 /* Do we need/want a APUinfo section? */
2722 if (ppc_cpu & (PPC_OPCODE_SPE
2723 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2724 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2725 | PPC_OPCODE_RFMCI))
2726 {
2727 /* These are all version "1". */
2728 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2729 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2730 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2731 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2732 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2733 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2734 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2735 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2736 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2737 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2738 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2739 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2740 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2741 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2742 }
dc1d03fc 2743#endif
6a0c61b7 2744
252b5132
RH		 2745 /* Write out the instruction. */
2746 f = frag_more (4);
09b935ac
AM		 2747 addr_mod = frag_now_fix () & 3;
2748 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2749 as_bad (_("instruction address is not a multiple of 4"));
2750 frag_now->insn_addr = addr_mod;
2751 frag_now->has_code = 1;
252b5132
RH		 2752 md_number_to_chars (f, insn, 4);
2753
5d6f4f16
GK		 2754#ifdef OBJ_ELF
2755 dwarf2_emit_insn (4);
2756#endif
2757
252b5132
RH		 2758 /* Create any fixups. At this point we do not use a
2759 bfd_reloc_code_real_type, but instead just use the
2760 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2761 handle fixups for any operand type, although that is admittedly
2762 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2763 md_apply_fix. */
252b5132
RH		 2764 for (i = 0; i < fc; i++)
2765 {
2766 const struct powerpc_operand *operand;
2767
2768 operand = &powerpc_operands[fixups[i].opindex];
2769 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2770 {
99a814a1 2771 reloc_howto_type *reloc_howto;
252b5132
RH		 2772 int size;
2773 int offset;
2774 fixS *fixP;
2775
99a814a1 2776 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2777 if (!reloc_howto)
2778 abort ();
2779
2780 size = bfd_get_reloc_size (reloc_howto);
2781 offset = target_big_endian ? (4 - size) : 0;
2782
2783 if (size < 1 || size > 4)
bc805888 2784 abort ();
252b5132 2785
99a814a1
AM		 2786 fixP = fix_new_exp (frag_now,
2787 f - frag_now->fr_literal + offset,
2788 size,
2789 &fixups[i].exp,
2790 reloc_howto->pc_relative,
252b5132
RH		 2791 fixups[i].reloc);
2792
2793 /* Turn off complaints that the addend is too large for things like
2794 foo+100000@ha. */
2795 switch (fixups[i].reloc)
2796 {
2797 case BFD_RELOC_16_GOTOFF:
2798 case BFD_RELOC_PPC_TOC16:
2799 case BFD_RELOC_LO16:
2800 case BFD_RELOC_HI16:
2801 case BFD_RELOC_HI16_S:
0baf16f2 2802#ifdef OBJ_ELF
0baf16f2
AM		 2803 case BFD_RELOC_PPC64_HIGHER:
2804 case BFD_RELOC_PPC64_HIGHER_S:
2805 case BFD_RELOC_PPC64_HIGHEST:
2806 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2807#endif
252b5132
RH		 2808 fixP->fx_no_overflow = 1;
2809 break;
2810 default:
2811 break;
2812 }
2813 }
2814 else
99a814a1
AM		 2815 fix_new_exp (frag_now,
2816 f - frag_now->fr_literal,
2817 4,
252b5132
RH		 2818 &fixups[i].exp,
2819 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2820 ((bfd_reloc_code_real_type)
99a814a1 2821 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2822 }
2823}
2824
2825/* Handle a macro. Gather all the operands, transform them as
2826 described by the macro, and call md_assemble recursively. All the
2827 operands are separated by commas; we don't accept parentheses
2828 around operands here. */
2829
2830static void
98027b10 2831ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2832{
2833 char *operands[10];
2834 unsigned int count;
2835 char *s;
2836 unsigned int len;
2837 const char *format;
db557034 2838 unsigned int arg;
252b5132
RH		 2839 char *send;
2840 char *complete;
2841
2842 /* Gather the users operands into the operands array. */
2843 count = 0;
2844 s = str;
2845 while (1)
2846 {
2847 if (count >= sizeof operands / sizeof operands[0])
2848 break;
2849 operands[count++] = s;
2850 s = strchr (s, ',');
2851 if (s == (char *) NULL)
2852 break;
2853 *s++ = '\0';
81d4177b 2854 }
252b5132
RH		 2855
2856 if (count != macro->operands)
2857 {
2858 as_bad (_("wrong number of operands"));
2859 return;
2860 }
2861
2862 /* Work out how large the string must be (the size is unbounded
2863 because it includes user input). */
2864 len = 0;
2865 format = macro->format;
2866 while (*format != '\0')
2867 {
2868 if (*format != '%')
2869 {
2870 ++len;
2871 ++format;
2872 }
2873 else
2874 {
2875 arg = strtol (format + 1, &send, 10);
db557034 2876 know (send != format && arg < count);
252b5132
RH		 2877 len += strlen (operands[arg]);
2878 format = send;
2879 }
2880 }
2881
2882 /* Put the string together. */
2883 complete = s = (char *) alloca (len + 1);
2884 format = macro->format;
2885 while (*format != '\0')
2886 {
2887 if (*format != '%')
2888 *s++ = *format++;
2889 else
2890 {
2891 arg = strtol (format + 1, &send, 10);
2892 strcpy (s, operands[arg]);
2893 s += strlen (s);
2894 format = send;
2895 }
2896 }
2897 *s = '\0';
2898
2899 /* Assemble the constructed instruction. */
2900 md_assemble (complete);
81d4177b 2901}
252b5132
RH		 2902\f
2903#ifdef OBJ_ELF
99a814a1 2904/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2905
2906int
98027b10 2907ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2908{
2909 if (letter == 'e')
2910 return SHF_EXCLUDE;
2911
13ae64f3 2912 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2913 return -1;
252b5132
RH		 2914}
2915
2916int
98027b10 2917ppc_section_word (char *str, size_t len)
252b5132 2918{
9de8d8f1
RH		 2919 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2920 return SHF_EXCLUDE;
252b5132 2921
9de8d8f1 2922 return -1;
252b5132
RH		 2923}
2924
2925int
98027b10 2926ppc_section_type (char *str, size_t len)
252b5132 2927{
9de8d8f1
RH		 2928 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2929 return SHT_ORDERED;
252b5132 2930
9de8d8f1 2931 return -1;
252b5132
RH		 2932}
2933
2934int
98027b10 2935ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2936{
2937 if (type == SHT_ORDERED)
2938 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2939
2940 if (attr & SHF_EXCLUDE)
2941 flags |= SEC_EXCLUDE;
2942
2943 return flags;
2944}
2945#endif /* OBJ_ELF */
2946
2947\f
2948/* Pseudo-op handling. */
2949
2950/* The .byte pseudo-op. This is similar to the normal .byte
2951 pseudo-op, but it can also take a single ASCII string. */
2952
2953static void
98027b10 2954ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 2955{
2956 if (*input_line_pointer != '\"')
2957 {
2958 cons (1);
2959 return;
2960 }
2961
2962 /* Gather characters. A real double quote is doubled. Unusual
2963 characters are not permitted. */
2964 ++input_line_pointer;
2965 while (1)
2966 {
2967 char c;
2968
2969 c = *input_line_pointer++;
2970
2971 if (c == '\"')
2972 {
2973 if (*input_line_pointer != '\"')
2974 break;
2975 ++input_line_pointer;
2976 }
2977
2978 FRAG_APPEND_1_CHAR (c);
2979 }
2980
2981 demand_empty_rest_of_line ();
2982}
2983\f
2984#ifdef OBJ_XCOFF
2985
2986/* XCOFF specific pseudo-op handling. */
2987
2988/* This is set if we are creating a .stabx symbol, since we don't want
2989 to handle symbol suffixes for such symbols. */
b34976b6 2990static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2991
2992/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2993 symbols in the .bss segment as though they were local common
67c1ffbe 2994 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2995 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2996
2997static void
98027b10 2998ppc_comm (int lcomm)
252b5132
RH		 2999{
3000 asection *current_seg = now_seg;
3001 subsegT current_subseg = now_subseg;
3002 char *name;
3003 char endc;
3004 char *end_name;
3005 offsetT size;
3006 offsetT align;
3007 symbolS *lcomm_sym = NULL;
3008 symbolS *sym;
3009 char *pfrag;
3010
3011 name = input_line_pointer;
3012 endc = get_symbol_end ();
3013 end_name = input_line_pointer;
3014 *end_name = endc;
3015
3016 if (*input_line_pointer != ',')
3017 {
3018 as_bad (_("missing size"));
3019 ignore_rest_of_line ();
3020 return;
3021 }
3022 ++input_line_pointer;
3023
3024 size = get_absolute_expression ();
3025 if (size < 0)
3026 {
3027 as_bad (_("negative size"));
3028 ignore_rest_of_line ();
3029 return;
3030 }
3031
3032 if (! lcomm)
3033 {
3034 /* The third argument to .comm is the alignment. */
3035 if (*input_line_pointer != ',')
1ad63b2f 3036 align = 2;
252b5132
RH		 3037 else
3038 {
3039 ++input_line_pointer;
3040 align = get_absolute_expression ();
3041 if (align <= 0)
3042 {
3043 as_warn (_("ignoring bad alignment"));
1ad63b2f 3044 align = 2;
252b5132
RH		 3045 }
3046 }
3047 }
3048 else
3049 {
3050 char *lcomm_name;
3051 char lcomm_endc;
3052
1ad63b2f 3053 if (size <= 4)
252b5132
RH		 3054 align = 2;
3055 else
3056 align = 3;
3057
3058 /* The third argument to .lcomm appears to be the real local
3059 common symbol to create. References to the symbol named in
3060 the first argument are turned into references to the third
3061 argument. */
3062 if (*input_line_pointer != ',')
3063 {
3064 as_bad (_("missing real symbol name"));
3065 ignore_rest_of_line ();
3066 return;
3067 }
3068 ++input_line_pointer;
3069
3070 lcomm_name = input_line_pointer;
3071 lcomm_endc = get_symbol_end ();
81d4177b 3072
252b5132
RH		 3073 lcomm_sym = symbol_find_or_make (lcomm_name);
3074
3075 *input_line_pointer = lcomm_endc;
3076 }
3077
3078 *end_name = '\0';
3079 sym = symbol_find_or_make (name);
3080 *end_name = endc;
3081
3082 if (S_IS_DEFINED (sym)
3083 || S_GET_VALUE (sym) != 0)
3084 {
3085 as_bad (_("attempt to redefine symbol"));
3086 ignore_rest_of_line ();
3087 return;
3088 }
81d4177b 3089
252b5132 3090 record_alignment (bss_section, align);
81d4177b 3091
252b5132
RH		 3092 if (! lcomm
3093 || ! S_IS_DEFINED (lcomm_sym))
3094 {
3095 symbolS *def_sym;
3096 offsetT def_size;
3097
3098 if (! lcomm)
3099 {
3100 def_sym = sym;
3101 def_size = size;
3102 S_SET_EXTERNAL (sym);
3103 }
3104 else
3105 {
809ffe0d 3106 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3107 def_sym = lcomm_sym;
3108 def_size = 0;
3109 }
3110
3111 subseg_set (bss_section, 1);
3112 frag_align (align, 0, 0);
81d4177b 3113
809ffe0d 3114 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3115 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3116 def_size, (char *) NULL);
3117 *pfrag = 0;
3118 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3119 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3120 }
3121 else if (lcomm)
3122 {
3123 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3124 symbol_get_frag (lcomm_sym)->fr_offset =
3125 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3126 &~ ((1 << align) - 1));
809ffe0d
ILT		 3127 if (align > symbol_get_tc (lcomm_sym)->align)
3128 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3129 }
3130
3131 if (lcomm)
3132 {
3133 /* Make sym an offset from lcomm_sym. */
3134 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3135 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3136 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3137 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3138 }
3139
3140 subseg_set (current_seg, current_subseg);
3141
3142 demand_empty_rest_of_line ();
3143}
3144
3145/* The .csect pseudo-op. This switches us into a different
3146 subsegment. The first argument is a symbol whose value is the
3147 start of the .csect. In COFF, csect symbols get special aux
3148 entries defined by the x_csect field of union internal_auxent. The
3149 optional second argument is the alignment (the default is 2). */
3150
3151static void
98027b10 3152ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3153{
3154 char *name;
3155 char endc;
3156 symbolS *sym;
931e13a6 3157 offsetT align;
252b5132
RH		 3158
3159 name = input_line_pointer;
3160 endc = get_symbol_end ();
81d4177b 3161
252b5132
RH		 3162 sym = symbol_find_or_make (name);
3163
3164 *input_line_pointer = endc;
3165
3166 if (S_GET_NAME (sym)[0] == '\0')
3167 {
3168 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3169 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3170 }
3171
931e13a6 3172 align = 2;
252b5132
RH		 3173 if (*input_line_pointer == ',')
3174 {
3175 ++input_line_pointer;
931e13a6 3176 align = get_absolute_expression ();
252b5132
RH		 3177 }
3178
931e13a6
AM		 3179 ppc_change_csect (sym, align);
3180
252b5132
RH		 3181 demand_empty_rest_of_line ();
3182}
3183
3184/* Change to a different csect. */
3185
3186static void
98027b10 3187ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3188{
3189 if (S_IS_DEFINED (sym))
809ffe0d 3190 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3191 else
3192 {
3193 symbolS **list_ptr;
3194 int after_toc;
3195 int hold_chunksize;
3196 symbolS *list;
931e13a6
AM		 3197 int is_code;
3198 segT sec;
252b5132
RH		 3199
3200 /* This is a new csect. We need to look at the symbol class to
3201 figure out whether it should go in the text section or the
3202 data section. */
3203 after_toc = 0;
931e13a6 3204 is_code = 0;
809ffe0d 3205 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3206 {
3207 case XMC_PR:
3208 case XMC_RO:
3209 case XMC_DB:
3210 case XMC_GL:
3211 case XMC_XO:
3212 case XMC_SV:
3213 case XMC_TI:
3214 case XMC_TB:
3215 S_SET_SEGMENT (sym, text_section);
809ffe0d 3216 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3217 ++ppc_text_subsegment;
3218 list_ptr = &ppc_text_csects;
931e13a6 3219 is_code = 1;
252b5132
RH		 3220 break;
3221 case XMC_RW:
3222 case XMC_TC0:
3223 case XMC_TC:
3224 case XMC_DS:
3225 case XMC_UA:
3226 case XMC_BS:
3227 case XMC_UC:
3228 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3229 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3230 == ppc_data_subsegment))
252b5132
RH		 3231 after_toc = 1;
3232 S_SET_SEGMENT (sym, data_section);
809ffe0d 3233 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3234 ++ppc_data_subsegment;
3235 list_ptr = &ppc_data_csects;
3236 break;
3237 default:
3238 abort ();
3239 }
3240
3241 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3242 changing subsegments, so that we don't use a lot of memory
3243 space for what may be a small section. */
252b5132
RH		 3244 hold_chunksize = chunksize;
3245 chunksize = 64;
3246
931e13a6
AM		 3247 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3248 symbol_get_tc (sym)->subseg);
252b5132
RH		 3249
3250 chunksize = hold_chunksize;
3251
3252 if (after_toc)
3253 ppc_after_toc_frag = frag_now;
3254
931e13a6
AM		 3255 record_alignment (sec, align);
3256 if (is_code)
3257 frag_align_code (align, 0);
3258 else
3259 frag_align (align, 0, 0);
3260
809ffe0d 3261 symbol_set_frag (sym, frag_now);
252b5132
RH		 3262 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3263
931e13a6 3264 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3265 symbol_get_tc (sym)->output = 1;
3266 symbol_get_tc (sym)->within = sym;
81d4177b 3267
252b5132 3268 for (list = *list_ptr;
809ffe0d
ILT		 3269 symbol_get_tc (list)->next != (symbolS *) NULL;
3270 list = symbol_get_tc (list)->next)
252b5132 3271 ;
809ffe0d 3272 symbol_get_tc (list)->next = sym;
81d4177b 3273
252b5132 3274 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3275 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3276 &symbol_lastP);
252b5132
RH		 3277 }
3278
3279 ppc_current_csect = sym;
3280}
3281
3282/* This function handles the .text and .data pseudo-ops. These
3283 pseudo-ops aren't really used by XCOFF; we implement them for the
3284 convenience of people who aren't used to XCOFF. */
3285
3286static void
98027b10 3287ppc_section (int type)
252b5132
RH		 3288{
3289 const char *name;
3290 symbolS *sym;
3291
3292 if (type == 't')
3293 name = ".text[PR]";
3294 else if (type == 'd')
3295 name = ".data[RW]";
3296 else
3297 abort ();
3298
3299 sym = symbol_find_or_make (name);
3300
931e13a6 3301 ppc_change_csect (sym, 2);
252b5132
RH		 3302
3303 demand_empty_rest_of_line ();
3304}
3305
3306/* This function handles the .section pseudo-op. This is mostly to
3307 give an error, since XCOFF only supports .text, .data and .bss, but
3308 we do permit the user to name the text or data section. */
3309
3310static void
98027b10 3311ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3312{
3313 char *user_name;
3314 const char *real_name;
3315 char c;
3316 symbolS *sym;
3317
3318 user_name = input_line_pointer;
3319 c = get_symbol_end ();
3320
3321 if (strcmp (user_name, ".text") == 0)
3322 real_name = ".text[PR]";
3323 else if (strcmp (user_name, ".data") == 0)
3324 real_name = ".data[RW]";
3325 else
3326 {
3327 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3328 *input_line_pointer = c;
3329 ignore_rest_of_line ();
3330 return;
3331 }
3332
3333 *input_line_pointer = c;
3334
3335 sym = symbol_find_or_make (real_name);
3336
931e13a6 3337 ppc_change_csect (sym, 2);
252b5132
RH		 3338
3339 demand_empty_rest_of_line ();
3340}
3341
3342/* The .extern pseudo-op. We create an undefined symbol. */
3343
3344static void
98027b10 3345ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3346{
3347 char *name;
3348 char endc;
3349
3350 name = input_line_pointer;
3351 endc = get_symbol_end ();
3352
3353 (void) symbol_find_or_make (name);
3354
3355 *input_line_pointer = endc;
3356
3357 demand_empty_rest_of_line ();
3358}
3359
3360/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3361
3362static void
98027b10 3363ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3364{
3365 char *name;
3366 char endc;
3367 symbolS *sym;
3368
3369 name = input_line_pointer;
3370 endc = get_symbol_end ();
3371
3372 sym = symbol_find_or_make (name);
3373
3374 *input_line_pointer = endc;
3375
809ffe0d 3376 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3377
3378 demand_empty_rest_of_line ();
3379}
3380
3381/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3382 although I don't know why it bothers. */
3383
3384static void
98027b10 3385ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3386{
3387 char *name;
3388 char endc;
3389 symbolS *sym;
3390 int len;
3391
3392 name = input_line_pointer;
3393 endc = get_symbol_end ();
3394
3395 sym = symbol_find_or_make (name);
3396
3397 *input_line_pointer = endc;
3398
3399 if (*input_line_pointer != ',')
3400 {
3401 as_bad (_("missing rename string"));
3402 ignore_rest_of_line ();
3403 return;
3404 }
3405 ++input_line_pointer;
3406
809ffe0d 3407 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3408
3409 demand_empty_rest_of_line ();
3410}
3411
3412/* The .stabx pseudo-op. This is similar to a normal .stabs
3413 pseudo-op, but slightly different. A sample is
3414 .stabx "main:F-1",.main,142,0
3415 The first argument is the symbol name to create. The second is the
3416 value, and the third is the storage class. The fourth seems to be
3417 always zero, and I am assuming it is the type. */
3418
3419static void
98027b10 3420ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3421{
3422 char *name;
3423 int len;
3424 symbolS *sym;
3425 expressionS exp;
3426
3427 name = demand_copy_C_string (&len);
3428
3429 if (*input_line_pointer != ',')
3430 {
3431 as_bad (_("missing value"));
3432 return;
3433 }
3434 ++input_line_pointer;
3435
b34976b6 3436 ppc_stab_symbol = TRUE;
252b5132 3437 sym = symbol_make (name);
b34976b6 3438 ppc_stab_symbol = FALSE;
252b5132 3439
809ffe0d 3440 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3441
3442 (void) expression (&exp);
3443
3444 switch (exp.X_op)
3445 {
3446 case O_illegal:
3447 case O_absent:
3448 case O_big:
3449 as_bad (_("illegal .stabx expression; zero assumed"));
3450 exp.X_add_number = 0;
3451 /* Fall through. */
3452 case O_constant:
3453 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3454 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3455 break;
3456
3457 case O_symbol:
3458 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3459 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3460 else
3461 {
3462 S_SET_VALUE (sym,
3463 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3464 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3465 }
3466 break;
3467
3468 default:
3469 /* The value is some complex expression. This will probably
99a814a1
AM		 3470 fail at some later point, but this is probably the right
3471 thing to do here. */
809ffe0d 3472 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3473 break;
3474 }
3475
3476 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3477 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3478
3479 if (*input_line_pointer != ',')
3480 {
3481 as_bad (_("missing class"));
3482 return;
3483 }
3484 ++input_line_pointer;
3485
3486 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3487
3488 if (*input_line_pointer != ',')
3489 {
3490 as_bad (_("missing type"));
3491 return;
3492 }
3493 ++input_line_pointer;
3494
3495 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3496
809ffe0d 3497 symbol_get_tc (sym)->output = 1;
252b5132 3498
6877bb43 3499 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3500
809ffe0d 3501 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3502
41ea10b1 3503 /* In this case :
99a814a1 3504
41ea10b1
TR		 3505 .bs name
3506 .stabx "z",arrays_,133,0
3507 .es
99a814a1 3508
41ea10b1 3509 .comm arrays_,13768,3
99a814a1 3510
41ea10b1
TR		 3511 resolve_symbol_value will copy the exp's "within" into sym's when the
3512 offset is 0. Since this seems to be corner case problem,
3513 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3514 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3515
3516 if (exp.X_op == O_symbol)
41ea10b1
TR		 3517 {
3518 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3519 }
6877bb43 3520 }
99a814a1 3521
252b5132
RH		 3522 if (exp.X_op != O_symbol
3523 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3524 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3525 ppc_frob_label (sym);
3526 else
3527 {
3528 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3529 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3530 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3531 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3532 }
3533
3534 demand_empty_rest_of_line ();
3535}
3536
3537/* The .function pseudo-op. This takes several arguments. The first
3538 argument seems to be the external name of the symbol. The second
67c1ffbe 3539 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3540 uses the same name for both. I have no idea what the third and
3541 fourth arguments are meant to be. The optional fifth argument is
3542 an expression for the size of the function. In COFF this symbol
3543 gets an aux entry like that used for a csect. */
3544
3545static void
98027b10 3546ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3547{
3548 char *name;
3549 char endc;
3550 char *s;
3551 symbolS *ext_sym;
3552 symbolS *lab_sym;
3553
3554 name = input_line_pointer;
3555 endc = get_symbol_end ();
3556
3557 /* Ignore any [PR] suffix. */
3558 name = ppc_canonicalize_symbol_name (name);
3559 s = strchr (name, '[');
3560 if (s != (char *) NULL
3561 && strcmp (s + 1, "PR]") == 0)
3562 *s = '\0';
3563
3564 ext_sym = symbol_find_or_make (name);
3565
3566 *input_line_pointer = endc;
3567
3568 if (*input_line_pointer != ',')
3569 {
3570 as_bad (_("missing symbol name"));
3571 ignore_rest_of_line ();
3572 return;
3573 }
3574 ++input_line_pointer;
3575
3576 name = input_line_pointer;
3577 endc = get_symbol_end ();
3578
3579 lab_sym = symbol_find_or_make (name);
3580
3581 *input_line_pointer = endc;
3582
3583 if (ext_sym != lab_sym)
3584 {
809ffe0d
ILT		 3585 expressionS exp;
3586
3587 exp.X_op = O_symbol;
3588 exp.X_add_symbol = lab_sym;
3589 exp.X_op_symbol = NULL;
3590 exp.X_add_number = 0;
3591 exp.X_unsigned = 0;
3592 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3593 }
3594
809ffe0d
ILT		 3595 if (symbol_get_tc (ext_sym)->class == -1)
3596 symbol_get_tc (ext_sym)->class = XMC_PR;
3597 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3598
3599 if (*input_line_pointer == ',')
3600 {
3601 expressionS ignore;
3602
3603 /* Ignore the third argument. */
3604 ++input_line_pointer;
3605 expression (&ignore);
3606 if (*input_line_pointer == ',')
3607 {
3608 /* Ignore the fourth argument. */
3609 ++input_line_pointer;
3610 expression (&ignore);
3611 if (*input_line_pointer == ',')
3612 {
3613 /* The fifth argument is the function size. */
3614 ++input_line_pointer;
809ffe0d
ILT		 3615 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3616 absolute_section,
3617 (valueT) 0,
3618 &zero_address_frag);
3619 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3620 }
3621 }
3622 }
3623
3624 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3625 SF_SET_FUNCTION (ext_sym);
3626 SF_SET_PROCESS (ext_sym);
3627 coff_add_linesym (ext_sym);
3628
3629 demand_empty_rest_of_line ();
3630}
3631
3632/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3633 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3634 with the correct line number */
5d6255fe 3635
8642cce8 3636static symbolS *saved_bi_sym = 0;
252b5132
RH		 3637
3638static void
98027b10 3639ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3640{
3641 symbolS *sym;
3642
3643 sym = symbol_make (".bf");
3644 S_SET_SEGMENT (sym, text_section);
809ffe0d 3645 symbol_set_frag (sym, frag_now);
252b5132
RH		 3646 S_SET_VALUE (sym, frag_now_fix ());
3647 S_SET_STORAGE_CLASS (sym, C_FCN);
3648
3649 coff_line_base = get_absolute_expression ();
3650
3651 S_SET_NUMBER_AUXILIARY (sym, 1);
3652 SA_SET_SYM_LNNO (sym, coff_line_base);
3653
8642cce8 3654 /* Line number for bi. */
5d6255fe 3655 if (saved_bi_sym)
8642cce8
TR		 3656 {
3657 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3658 saved_bi_sym = 0;
3659 }
5d6255fe 3660
8642cce8 3661
809ffe0d 3662 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3663
3664 ppc_frob_label (sym);
3665
3666 demand_empty_rest_of_line ();
3667}
3668
3669/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3670 ".ef", except that the line number is absolute, not relative to the
3671 most recent ".bf" symbol. */
3672
3673static void
98027b10 3674ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3675{
3676 symbolS *sym;
3677
3678 sym = symbol_make (".ef");
3679 S_SET_SEGMENT (sym, text_section);
809ffe0d 3680 symbol_set_frag (sym, frag_now);
252b5132
RH		 3681 S_SET_VALUE (sym, frag_now_fix ());
3682 S_SET_STORAGE_CLASS (sym, C_FCN);
3683 S_SET_NUMBER_AUXILIARY (sym, 1);
3684 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3685 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3686
3687 ppc_frob_label (sym);
3688
3689 demand_empty_rest_of_line ();
3690}
3691
3692/* The .bi and .ei pseudo-ops. These take a string argument and
3693 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3694 the symbol list. The value of .bi will be know when the next .bf
3695 is encountered. */
252b5132
RH		 3696
3697static void
98027b10 3698ppc_biei (int ei)
252b5132
RH		 3699{
3700 static symbolS *last_biei;
3701
3702 char *name;
3703 int len;
3704 symbolS *sym;
3705 symbolS *look;
3706
3707 name = demand_copy_C_string (&len);
3708
3709 /* The value of these symbols is actually file offset. Here we set
3710 the value to the index into the line number entries. In
3711 ppc_frob_symbols we set the fix_line field, which will cause BFD
3712 to do the right thing. */
3713
3714 sym = symbol_make (name);
3715 /* obj-coff.c currently only handles line numbers correctly in the
3716 .text section. */
3717 S_SET_SEGMENT (sym, text_section);
3718 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3719 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3720
3721 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3722 symbol_get_tc (sym)->output = 1;
81d4177b 3723
8642cce8 3724 /* Save bi. */
5d6255fe 3725 if (ei)
8642cce8
TR		 3726 saved_bi_sym = 0;
3727 else
3728 saved_bi_sym = sym;
3729
252b5132
RH		 3730 for (look = last_biei ? last_biei : symbol_rootP;
3731 (look != (symbolS *) NULL
3732 && (S_GET_STORAGE_CLASS (look) == C_FILE
3733 || S_GET_STORAGE_CLASS (look) == C_BINCL
3734 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3735 look = symbol_next (look))
3736 ;
3737 if (look != (symbolS *) NULL)
3738 {
3739 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3740 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3741 last_biei = sym;
3742 }
3743
3744 demand_empty_rest_of_line ();
3745}
3746
3747/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3748 There is one argument, which is a csect symbol. The value of the
3749 .bs symbol is the index of this csect symbol. */
3750
3751static void
98027b10 3752ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3753{
3754 char *name;
3755 char endc;
3756 symbolS *csect;
3757 symbolS *sym;
3758
3759 if (ppc_current_block != NULL)
3760 as_bad (_("nested .bs blocks"));
3761
3762 name = input_line_pointer;
3763 endc = get_symbol_end ();
3764
3765 csect = symbol_find_or_make (name);
3766
3767 *input_line_pointer = endc;
3768
3769 sym = symbol_make (".bs");
3770 S_SET_SEGMENT (sym, now_seg);
3771 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3772 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3773 symbol_get_tc (sym)->output = 1;
252b5132 3774
809ffe0d 3775 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3776
3777 ppc_frob_label (sym);
3778
3779 ppc_current_block = sym;
3780
3781 demand_empty_rest_of_line ();
3782}
3783
3784/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3785
3786static void
98027b10 3787ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3788{
3789 symbolS *sym;
3790
3791 if (ppc_current_block == NULL)
3792 as_bad (_(".es without preceding .bs"));
3793
3794 sym = symbol_make (".es");
3795 S_SET_SEGMENT (sym, now_seg);
3796 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3797 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3798 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3799
3800 ppc_frob_label (sym);
3801
3802 ppc_current_block = NULL;
3803
3804 demand_empty_rest_of_line ();
3805}
3806
3807/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3808 line number. */
3809
3810static void
98027b10 3811ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3812{
3813 symbolS *sym;
3814
3815 sym = symbol_make (".bb");
3816 S_SET_SEGMENT (sym, text_section);
809ffe0d 3817 symbol_set_frag (sym, frag_now);
252b5132
RH		 3818 S_SET_VALUE (sym, frag_now_fix ());
3819 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3820
3821 S_SET_NUMBER_AUXILIARY (sym, 1);
3822 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3823
809ffe0d 3824 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3825
3826 SF_SET_PROCESS (sym);
3827
3828 ppc_frob_label (sym);
3829
3830 demand_empty_rest_of_line ();
3831}
3832
3833/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3834 line number. */
3835
3836static void
98027b10 3837ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3838{
3839 symbolS *sym;
3840
3841 sym = symbol_make (".eb");
3842 S_SET_SEGMENT (sym, text_section);
809ffe0d 3843 symbol_set_frag (sym, frag_now);
252b5132
RH		 3844 S_SET_VALUE (sym, frag_now_fix ());
3845 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3846 S_SET_NUMBER_AUXILIARY (sym, 1);
3847 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3848 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3849
3850 SF_SET_PROCESS (sym);
3851
3852 ppc_frob_label (sym);
3853
3854 demand_empty_rest_of_line ();
3855}
3856
3857/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3858 specified name. */
3859
3860static void
98027b10 3861ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3862{
3863 char *name;
3864 int len;
3865 symbolS *sym;
3866
3867 name = demand_copy_C_string (&len);
3868 sym = symbol_make (name);
3869 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3870 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3871 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3872 S_SET_VALUE (sym, 0);
809ffe0d 3873 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3874
3875 ppc_frob_label (sym);
3876
3877 demand_empty_rest_of_line ();
3878}
3879
3880/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3881
3882static void
98027b10 3883ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3884{
3885 symbolS *sym;
3886
3887 sym = symbol_make (".ec");
3888 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3889 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3890 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3891 S_SET_VALUE (sym, 0);
809ffe0d 3892 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3893
3894 ppc_frob_label (sym);
3895
3896 demand_empty_rest_of_line ();
3897}
3898
3899/* The .toc pseudo-op. Switch to the .toc subsegment. */
3900
3901static void
98027b10 3902ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3903{
3904 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3905 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3906 else
3907 {
3908 subsegT subseg;
3909 symbolS *sym;
3910 symbolS *list;
81d4177b 3911
252b5132
RH		 3912 subseg = ppc_data_subsegment;
3913 ++ppc_data_subsegment;
3914
3915 subseg_new (segment_name (data_section), subseg);
3916 ppc_toc_frag = frag_now;
3917
3918 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3919 symbol_set_frag (sym, frag_now);
252b5132
RH		 3920 S_SET_SEGMENT (sym, data_section);
3921 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3922 symbol_get_tc (sym)->subseg = subseg;
3923 symbol_get_tc (sym)->output = 1;
3924 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3925
3926 ppc_toc_csect = sym;
81d4177b 3927
252b5132 3928 for (list = ppc_data_csects;
809ffe0d
ILT		 3929 symbol_get_tc (list)->next != (symbolS *) NULL;
3930 list = symbol_get_tc (list)->next)
252b5132 3931 ;
809ffe0d 3932 symbol_get_tc (list)->next = sym;
252b5132
RH		 3933
3934 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3935 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3936 &symbol_lastP);
252b5132
RH		 3937 }
3938
3939 ppc_current_csect = ppc_toc_csect;
3940
3941 demand_empty_rest_of_line ();
3942}
3943
3944/* The AIX assembler automatically aligns the operands of a .long or
3945 .short pseudo-op, and we want to be compatible. */
3946
3947static void
98027b10 3948ppc_xcoff_cons (int log_size)
252b5132
RH		 3949{
3950 frag_align (log_size, 0, 0);
3951 record_alignment (now_seg, log_size);
3952 cons (1 << log_size);
3953}
3954
3955static void
98027b10 3956ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 3957{
3958 expressionS exp;
3959 int byte_count;
3960
3961 (void) expression (&exp);
3962
3963 if (exp.X_op != O_constant)
3964 {
3965 as_bad (_("non-constant byte count"));
3966 return;
3967 }
3968
3969 byte_count = exp.X_add_number;
3970
3971 if (*input_line_pointer != ',')
3972 {
3973 as_bad (_("missing value"));
3974 return;
3975 }
3976
3977 ++input_line_pointer;
3978 cons (byte_count);
3979}
3980
3981#endif /* OBJ_XCOFF */
0baf16f2 3982#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3983\f
3984/* The .tc pseudo-op. This is used when generating either XCOFF or
3985 ELF. This takes two or more arguments.
3986
3987 When generating XCOFF output, the first argument is the name to
3988 give to this location in the toc; this will be a symbol with class
0baf16f2 3989 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3990 this location in the TOC; often there is just one more argument, a
1049f94e 3991 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3992 depends on target word size. A 32-bit target uses 4-byte values, a
3993 64-bit target uses 8-byte values.
252b5132
RH		 3994
3995 When not generating XCOFF output, the arguments are the same, but
3996 the first argument is simply ignored. */
3997
3998static void
98027b10 3999ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4000{
4001#ifdef OBJ_XCOFF
4002
4003 /* Define the TOC symbol name. */
4004 {
4005 char *name;
4006 char endc;
4007 symbolS *sym;
4008
4009 if (ppc_toc_csect == (symbolS *) NULL
4010 || ppc_toc_csect != ppc_current_csect)
4011 {
4012 as_bad (_(".tc not in .toc section"));
4013 ignore_rest_of_line ();
4014 return;
4015 }
4016
4017 name = input_line_pointer;
4018 endc = get_symbol_end ();
4019
4020 sym = symbol_find_or_make (name);
4021
4022 *input_line_pointer = endc;
4023
4024 if (S_IS_DEFINED (sym))
4025 {
4026 symbolS *label;
4027
809ffe0d
ILT		 4028 label = symbol_get_tc (ppc_current_csect)->within;
4029 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4030 {
4031 as_bad (_(".tc with no label"));
4032 ignore_rest_of_line ();
4033 return;
4034 }
4035
4036 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4037 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4038 S_SET_VALUE (label, S_GET_VALUE (sym));
4039
4040 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4041 ++input_line_pointer;
4042
4043 return;
4044 }
4045
4046 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4047 symbol_set_frag (sym, frag_now);
252b5132 4048 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4049 symbol_get_tc (sym)->class = XMC_TC;
4050 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4051
4052 ppc_frob_label (sym);
4053 }
4054
0baf16f2
AM		 4055#endif /* OBJ_XCOFF */
4056#ifdef OBJ_ELF
9c7977b3 4057 int align;
252b5132
RH		 4058
4059 /* Skip the TOC symbol name. */
4060 while (is_part_of_name (*input_line_pointer)
4061 || *input_line_pointer == '['
4062 || *input_line_pointer == ']'
4063 || *input_line_pointer == '{'
4064 || *input_line_pointer == '}')
4065 ++input_line_pointer;
4066
0baf16f2 4067 /* Align to a four/eight byte boundary. */
2b3c4602 4068 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4069 frag_align (align, 0, 0);
4070 record_alignment (now_seg, align);
0baf16f2 4071#endif /* OBJ_ELF */
252b5132
RH		 4072
4073 if (*input_line_pointer != ',')
4074 demand_empty_rest_of_line ();
4075 else
4076 {
4077 ++input_line_pointer;
2b3c4602 4078 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4079 }
4080}
0baf16f2
AM		 4081
4082/* Pseudo-op .machine. */
0baf16f2
AM		 4083
4084static void
98027b10 4085ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4086{
69c040df
AM		 4087 char *cpu_string;
4088#define MAX_HISTORY 100
4089 static unsigned long *cpu_history;
4090 static int curr_hist;
4091
4092 SKIP_WHITESPACE ();
4093
4094 if (*input_line_pointer == '"')
4095 {
4096 int len;
4097 cpu_string = demand_copy_C_string (&len);
4098 }
4099 else
4100 {
4101 char c;
4102 cpu_string = input_line_pointer;
4103 c = get_symbol_end ();
4104 cpu_string = xstrdup (cpu_string);
4105 *input_line_pointer = c;
4106 }
4107
4108 if (cpu_string != NULL)
4109 {
4110 unsigned long old_cpu = ppc_cpu;
4111 char *p;
4112
4113 for (p = cpu_string; *p != 0; p++)
4114 *p = TOLOWER (*p);
4115
4116 if (strcmp (cpu_string, "push") == 0)
4117 {
4118 if (cpu_history == NULL)
4119 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4120
4121 if (curr_hist >= MAX_HISTORY)
4122 as_bad (_(".machine stack overflow"));
4123 else
4124 cpu_history[curr_hist++] = ppc_cpu;
4125 }
4126 else if (strcmp (cpu_string, "pop") == 0)
4127 {
4128 if (curr_hist <= 0)
4129 as_bad (_(".machine stack underflow"));
4130 else
4131 ppc_cpu = cpu_history[--curr_hist];
4132 }
4133 else if (parse_cpu (cpu_string))
4134 ;
4135 else
4136 as_bad (_("invalid machine `%s'"), cpu_string);
4137
4138 if (ppc_cpu != old_cpu)
4139 ppc_setup_opcodes ();
4140 }
4141
4142 demand_empty_rest_of_line ();
0baf16f2
AM		 4143}
4144
4145/* See whether a symbol is in the TOC section. */
4146
4147static int
98027b10 4148ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4149{
4150#ifdef OBJ_XCOFF
4151 return symbol_get_tc (sym)->class == XMC_TC;
4152#endif
4153#ifdef OBJ_ELF
4154 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4155 if (ppc_obj64)
0baf16f2
AM		 4156 return strcmp (sname, ".toc") == 0;
4157 else
4158 return strcmp (sname, ".got") == 0;
4159#endif
4160}
4161#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4162\f
4163#ifdef TE_PE
4164
99a814a1 4165/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4166
4167/* Set the current section. */
4168static void
98027b10 4169ppc_set_current_section (segT new)
252b5132
RH		 4170{
4171 ppc_previous_section = ppc_current_section;
4172 ppc_current_section = new;
4173}
4174
4175/* pseudo-op: .previous
4176 behaviour: toggles the current section with the previous section.
4177 errors: None
99a814a1
AM		 4178 warnings: "No previous section" */
4179
252b5132 4180static void
98027b10 4181ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4182{
4183 symbolS *tmp;
4184
81d4177b 4185 if (ppc_previous_section == NULL)
252b5132 4186 {
99a814a1 4187 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4188 return;
4189 }
4190
99a814a1 4191 subseg_set (ppc_previous_section, 0);
252b5132 4192
99a814a1 4193 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4194}
4195
4196/* pseudo-op: .pdata
4197 behaviour: predefined read only data section
b34976b6 4198 double word aligned
252b5132
RH		 4199 errors: None
4200 warnings: None
4201 initial: .section .pdata "adr3"
b34976b6 4202 a - don't know -- maybe a misprint
252b5132
RH		 4203 d - initialized data
4204 r - readable
4205 3 - double word aligned (that would be 4 byte boundary)
4206
4207 commentary:
4208 Tag index tables (also known as the function table) for exception
99a814a1 4209 handling, debugging, etc. */
252b5132 4210
252b5132 4211static void
98027b10 4212ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4213{
81d4177b 4214 if (pdata_section == 0)
252b5132
RH		 4215 {
4216 pdata_section = subseg_new (".pdata", 0);
81d4177b 4217
252b5132
RH		 4218 bfd_set_section_flags (stdoutput, pdata_section,
4219 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4220 | SEC_READONLY | SEC_DATA ));
81d4177b 4221
252b5132
RH		 4222 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4223 }
4224 else
4225 {
99a814a1 4226 pdata_section = subseg_new (".pdata", 0);
252b5132 4227 }
99a814a1 4228 ppc_set_current_section (pdata_section);
252b5132
RH		 4229}
4230
4231/* pseudo-op: .ydata
4232 behaviour: predefined read only data section
b34976b6 4233 double word aligned
252b5132
RH		 4234 errors: None
4235 warnings: None
4236 initial: .section .ydata "drw3"
b34976b6 4237 a - don't know -- maybe a misprint
252b5132
RH		 4238 d - initialized data
4239 r - readable
4240 3 - double word aligned (that would be 4 byte boundary)
4241 commentary:
4242 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4243 debugging, etc. */
4244
252b5132 4245static void
98027b10 4246ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4247{
81d4177b 4248 if (ydata_section == 0)
252b5132
RH		 4249 {
4250 ydata_section = subseg_new (".ydata", 0);
4251 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4252 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4253 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4254
4255 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4256 }
4257 else
4258 {
4259 ydata_section = subseg_new (".ydata", 0);
4260 }
99a814a1 4261 ppc_set_current_section (ydata_section);
252b5132
RH		 4262}
4263
4264/* pseudo-op: .reldata
4265 behaviour: predefined read write data section
b34976b6 4266 double word aligned (4-byte)
252b5132
RH		 4267 FIXME: relocation is applied to it
4268 FIXME: what's the difference between this and .data?
4269 errors: None
4270 warnings: None
4271 initial: .section .reldata "drw3"
4272 d - initialized data
4273 r - readable
4274 w - writeable
4275 3 - double word aligned (that would be 8 byte boundary)
4276
4277 commentary:
4278 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4279 function descriptors, etc. */
4280
252b5132 4281static void
98027b10 4282ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4283{
4284 if (reldata_section == 0)
4285 {
4286 reldata_section = subseg_new (".reldata", 0);
4287
4288 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4289 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4290 | SEC_DATA));
252b5132
RH		 4291
4292 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4293 }
4294 else
4295 {
4296 reldata_section = subseg_new (".reldata", 0);
4297 }
99a814a1 4298 ppc_set_current_section (reldata_section);
252b5132
RH		 4299}
4300
4301/* pseudo-op: .rdata
4302 behaviour: predefined read only data section
b34976b6 4303 double word aligned
252b5132
RH		 4304 errors: None
4305 warnings: None
4306 initial: .section .rdata "dr3"
4307 d - initialized data
4308 r - readable
99a814a1
AM		 4309 3 - double word aligned (that would be 4 byte boundary) */
4310
252b5132 4311static void
98027b10 4312ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4313{
4314 if (rdata_section == 0)
4315 {
4316 rdata_section = subseg_new (".rdata", 0);
4317 bfd_set_section_flags (stdoutput, rdata_section,
4318 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4319 | SEC_READONLY | SEC_DATA ));
4320
4321 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4322 }
4323 else
4324 {
4325 rdata_section = subseg_new (".rdata", 0);
4326 }
99a814a1 4327 ppc_set_current_section (rdata_section);
252b5132
RH		 4328}
4329
4330/* pseudo-op: .ualong
81d4177b 4331 behaviour: much like .int, with the exception that no alignment is
b34976b6 4332 performed.
252b5132
RH		 4333 FIXME: test the alignment statement
4334 errors: None
99a814a1
AM		 4335 warnings: None */
4336
252b5132 4337static void
98027b10 4338ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4339{
99a814a1
AM		 4340 /* Try for long. */
4341 cons (4);
252b5132
RH		 4342}
4343
4344/* pseudo-op: .znop <symbol name>
4345 behaviour: Issue a nop instruction
b34976b6 4346 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4347 the supplied symbol name.
4348 errors: None
99a814a1
AM		 4349 warnings: Missing symbol name */
4350
252b5132 4351static void
98027b10 4352ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4353{
4354 unsigned long insn;
4355 const struct powerpc_opcode *opcode;
4356 expressionS ex;
4357 char *f;
252b5132 4358 symbolS *sym;
252b5132
RH		 4359 char *symbol_name;
4360 char c;
4361 char *name;
4362 unsigned int exp;
4363 flagword flags;
4364 asection *sec;
4365
99a814a1 4366 /* Strip out the symbol name. */
252b5132
RH		 4367 symbol_name = input_line_pointer;
4368 c = get_symbol_end ();
4369
4370 name = xmalloc (input_line_pointer - symbol_name + 1);
4371 strcpy (name, symbol_name);
4372
4373 sym = symbol_find_or_make (name);
4374
4375 *input_line_pointer = c;
4376
4377 SKIP_WHITESPACE ();
4378
4379 /* Look up the opcode in the hash table. */
4380 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4381
99a814a1 4382 /* Stick in the nop. */
252b5132
RH		 4383 insn = opcode->opcode;
4384
4385 /* Write out the instruction. */
4386 f = frag_more (4);
4387 md_number_to_chars (f, insn, 4);
4388 fix_new (frag_now,
4389 f - frag_now->fr_literal,
4390 4,
4391 sym,
4392 0,
4393 0,
4394 BFD_RELOC_16_GOT_PCREL);
4395
4396}
4397
81d4177b
KH		 4398/* pseudo-op:
4399 behaviour:
4400 errors:
99a814a1
AM		 4401 warnings: */
4402
252b5132 4403static void
98027b10 4404ppc_pe_comm (int lcomm)
252b5132 4405{
98027b10
AM		 4406 char *name;
4407 char c;
4408 char *p;
252b5132 4409 offsetT temp;
98027b10 4410 symbolS *symbolP;
252b5132
RH		 4411 offsetT align;
4412
4413 name = input_line_pointer;
4414 c = get_symbol_end ();
4415
99a814a1 4416 /* just after name is now '\0'. */
252b5132
RH		 4417 p = input_line_pointer;
4418 *p = c;
4419 SKIP_WHITESPACE ();
4420 if (*input_line_pointer != ',')
4421 {
4422 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4423 ignore_rest_of_line ();
4424 return;
4425 }
4426
4427 input_line_pointer++; /* skip ',' */
4428 if ((temp = get_absolute_expression ()) < 0)
4429 {
4430 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4431 ignore_rest_of_line ();
4432 return;
4433 }
4434
4435 if (! lcomm)
4436 {
4437 /* The third argument to .comm is the alignment. */
4438 if (*input_line_pointer != ',')
4439 align = 3;
4440 else
4441 {
4442 ++input_line_pointer;
4443 align = get_absolute_expression ();
4444 if (align <= 0)
4445 {
4446 as_warn (_("ignoring bad alignment"));
4447 align = 3;
4448 }
4449 }
4450 }
4451
4452 *p = 0;
4453 symbolP = symbol_find_or_make (name);
4454
4455 *p = c;
4456 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4457 {
4458 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4459 S_GET_NAME (symbolP));
4460 ignore_rest_of_line ();
4461 return;
4462 }
4463
4464 if (S_GET_VALUE (symbolP))
4465 {
4466 if (S_GET_VALUE (symbolP) != (valueT) temp)
4467 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4468 S_GET_NAME (symbolP),
4469 (long) S_GET_VALUE (symbolP),
4470 (long) temp);
4471 }
4472 else
4473 {
4474 S_SET_VALUE (symbolP, (valueT) temp);
4475 S_SET_EXTERNAL (symbolP);
86ebace2 4476 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4477 }
4478
4479 demand_empty_rest_of_line ();
4480}
4481
4482/*
4483 * implement the .section pseudo op:
4484 * .section name {, "flags"}
4485 * ^ ^
4486 * | +--- optional flags: 'b' for bss
4487 * | 'i' for info
4488 * +-- section name 'l' for lib
4489 * 'n' for noload
4490 * 'o' for over
4491 * 'w' for data
4492 * 'd' (apparently m88k for data)
4493 * 'x' for text
4494 * But if the argument is not a quoted string, treat it as a
4495 * subsegment number.
4496 *
4497 * FIXME: this is a copy of the section processing from obj-coff.c, with
4498 * additions/changes for the moto-pas assembler support. There are three
4499 * categories:
4500 *
81d4177b 4501 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4502 * setting bits that bfd probably neither understands or uses. The
4503 * correct approach (?) will have to incorporate extra fields attached
4504 * to the section to hold the system specific stuff. (krk)
4505 *
4506 * Section Contents:
4507 * 'a' - unknown - referred to in documentation, but no definition supplied
4508 * 'c' - section has code
4509 * 'd' - section has initialized data
4510 * 'u' - section has uninitialized data
4511 * 'i' - section contains directives (info)
4512 * 'n' - section can be discarded
4513 * 'R' - remove section at link time
4514 *
4515 * Section Protection:
4516 * 'r' - section is readable
4517 * 'w' - section is writeable
4518 * 'x' - section is executable
4519 * 's' - section is sharable
4520 *
4521 * Section Alignment:
4522 * '0' - align to byte boundary
4523 * '1' - align to halfword undary
4524 * '2' - align to word boundary
4525 * '3' - align to doubleword boundary
4526 * '4' - align to quadword boundary
4527 * '5' - align to 32 byte boundary
4528 * '6' - align to 64 byte boundary
4529 *
4530 */
4531
4532void
98027b10 4533ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4534{
99a814a1 4535 /* Strip out the section name. */
252b5132
RH		 4536 char *section_name;
4537 char c;
4538 char *name;
4539 unsigned int exp;
4540 flagword flags;
4541 segT sec;
4542 int align;
4543
4544 section_name = input_line_pointer;
4545 c = get_symbol_end ();
4546
4547 name = xmalloc (input_line_pointer - section_name + 1);
4548 strcpy (name, section_name);
4549
4550 *input_line_pointer = c;
4551
4552 SKIP_WHITESPACE ();
4553
4554 exp = 0;
4555 flags = SEC_NO_FLAGS;
4556
4557 if (strcmp (name, ".idata$2") == 0)
4558 {
4559 align = 0;
4560 }
4561 else if (strcmp (name, ".idata$3") == 0)
4562 {
4563 align = 0;
4564 }
4565 else if (strcmp (name, ".idata$4") == 0)
4566 {
4567 align = 2;
4568 }
4569 else if (strcmp (name, ".idata$5") == 0)
4570 {
4571 align = 2;
4572 }
4573 else if (strcmp (name, ".idata$6") == 0)
4574 {
4575 align = 1;
4576 }
4577 else
99a814a1
AM		 4578 /* Default alignment to 16 byte boundary. */
4579 align = 4;
252b5132
RH		 4580
4581 if (*input_line_pointer == ',')
4582 {
4583 ++input_line_pointer;
4584 SKIP_WHITESPACE ();
4585 if (*input_line_pointer != '"')
4586 exp = get_absolute_expression ();
4587 else
4588 {
4589 ++input_line_pointer;
4590 while (*input_line_pointer != '"'
4591 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4592 {
4593 switch (*input_line_pointer)
4594 {
4595 /* Section Contents */
4596 case 'a': /* unknown */
4597 as_bad (_("Unsupported section attribute -- 'a'"));
4598 break;
4599 case 'c': /* code section */
81d4177b 4600 flags |= SEC_CODE;
252b5132
RH		 4601 break;
4602 case 'd': /* section has initialized data */
4603 flags |= SEC_DATA;
4604 break;
4605 case 'u': /* section has uninitialized data */
4606 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4607 in winnt.h */
4608 flags |= SEC_ROM;
4609 break;
4610 case 'i': /* section contains directives (info) */
4611 /* FIXME: This is IMAGE_SCN_LNK_INFO
4612 in winnt.h */
4613 flags |= SEC_HAS_CONTENTS;
4614 break;
4615 case 'n': /* section can be discarded */
81d4177b 4616 flags &=~ SEC_LOAD;
252b5132
RH		 4617 break;
4618 case 'R': /* Remove section at link time */
4619 flags |= SEC_NEVER_LOAD;
4620 break;
8d452c78 4621#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4622 /* Section Protection */
4623 case 'r': /* section is readable */
4624 flags |= IMAGE_SCN_MEM_READ;
4625 break;
4626 case 'w': /* section is writeable */
4627 flags |= IMAGE_SCN_MEM_WRITE;
4628 break;
4629 case 'x': /* section is executable */
4630 flags |= IMAGE_SCN_MEM_EXECUTE;
4631 break;
4632 case 's': /* section is sharable */
4633 flags |= IMAGE_SCN_MEM_SHARED;
4634 break;
4635
4636 /* Section Alignment */
4637 case '0': /* align to byte boundary */
4638 flags |= IMAGE_SCN_ALIGN_1BYTES;
4639 align = 0;
4640 break;
4641 case '1': /* align to halfword boundary */
4642 flags |= IMAGE_SCN_ALIGN_2BYTES;
4643 align = 1;
4644 break;
4645 case '2': /* align to word boundary */
4646 flags |= IMAGE_SCN_ALIGN_4BYTES;
4647 align = 2;
4648 break;
4649 case '3': /* align to doubleword boundary */
4650 flags |= IMAGE_SCN_ALIGN_8BYTES;
4651 align = 3;
4652 break;
4653 case '4': /* align to quadword boundary */
4654 flags |= IMAGE_SCN_ALIGN_16BYTES;
4655 align = 4;
4656 break;
4657 case '5': /* align to 32 byte boundary */
4658 flags |= IMAGE_SCN_ALIGN_32BYTES;
4659 align = 5;
4660 break;
4661 case '6': /* align to 64 byte boundary */
4662 flags |= IMAGE_SCN_ALIGN_64BYTES;
4663 align = 6;
4664 break;
8d452c78 4665#endif
252b5132 4666 default:
99a814a1
AM		 4667 as_bad (_("unknown section attribute '%c'"),
4668 *input_line_pointer);
252b5132
RH		 4669 break;
4670 }
4671 ++input_line_pointer;
4672 }
4673 if (*input_line_pointer == '"')
4674 ++input_line_pointer;
4675 }
4676 }
4677
4678 sec = subseg_new (name, (subsegT) exp);
4679
99a814a1 4680 ppc_set_current_section (sec);
252b5132
RH		 4681
4682 if (flags != SEC_NO_FLAGS)
4683 {
4684 if (! bfd_set_section_flags (stdoutput, sec, flags))
4685 as_bad (_("error setting flags for \"%s\": %s"),
4686 bfd_section_name (stdoutput, sec),
4687 bfd_errmsg (bfd_get_error ()));
4688 }
4689
99a814a1 4690 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4691}
4692
4693static void
98027b10 4694ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4695{
4696 char *name;
4697 char endc;
4698 symbolS *ext_sym;
4699
4700 name = input_line_pointer;
4701 endc = get_symbol_end ();
4702
4703 ext_sym = symbol_find_or_make (name);
4704
4705 *input_line_pointer = endc;
4706
4707 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4708 SF_SET_FUNCTION (ext_sym);
4709 SF_SET_PROCESS (ext_sym);
4710 coff_add_linesym (ext_sym);
4711
4712 demand_empty_rest_of_line ();
4713}
4714
4715static void
98027b10 4716ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4717{
4718 if (tocdata_section == 0)
4719 {
4720 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4721 /* FIXME: section flags won't work. */
252b5132
RH		 4722 bfd_set_section_flags (stdoutput, tocdata_section,
4723 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4724 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4725
4726 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4727 }
4728 else
4729 {
4730 rdata_section = subseg_new (".tocd", 0);
4731 }
4732
99a814a1 4733 ppc_set_current_section (tocdata_section);
252b5132
RH		 4734
4735 demand_empty_rest_of_line ();
4736}
4737
4738/* Don't adjust TOC relocs to use the section symbol. */
4739
4740int
98027b10 4741ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4742{
4743 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4744}
4745
4746#endif
4747\f
4748#ifdef OBJ_XCOFF
4749
4750/* XCOFF specific symbol and file handling. */
4751
4752/* Canonicalize the symbol name. We use the to force the suffix, if
4753 any, to use square brackets, and to be in upper case. */
4754
4755char *
98027b10 4756ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4757{
4758 char *s;
4759
4760 if (ppc_stab_symbol)
4761 return name;
4762
4763 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4764 ;
4765 if (*s != '\0')
4766 {
4767 char brac;
4768
4769 if (*s == '[')
4770 brac = ']';
4771 else
4772 {
4773 *s = '[';
4774 brac = '}';
4775 }
4776
4777 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4778 *s = TOUPPER (*s);
252b5132
RH		 4779
4780 if (*s == '\0' || s[1] != '\0')
4781 as_bad (_("bad symbol suffix"));
4782
4783 *s = ']';
4784 }
4785
4786 return name;
4787}
4788
4789/* Set the class of a symbol based on the suffix, if any. This is
4790 called whenever a new symbol is created. */
4791
4792void
98027b10 4793ppc_symbol_new_hook (symbolS *sym)
252b5132 4794{
809ffe0d 4795 struct ppc_tc_sy *tc;
252b5132
RH		 4796 const char *s;
4797
809ffe0d
ILT		 4798 tc = symbol_get_tc (sym);
4799 tc->next = NULL;
4800 tc->output = 0;
4801 tc->class = -1;
4802 tc->real_name = NULL;
4803 tc->subseg = 0;
4804 tc->align = 0;
4805 tc->size = NULL;
4806 tc->within = NULL;
252b5132
RH		 4807
4808 if (ppc_stab_symbol)
4809 return;
4810
4811 s = strchr (S_GET_NAME (sym), '[');
4812 if (s == (const char *) NULL)
4813 {
4814 /* There is no suffix. */
4815 return;
4816 }
4817
4818 ++s;
4819
4820 switch (s[0])
4821 {
4822 case 'B':
4823 if (strcmp (s, "BS]") == 0)
809ffe0d 4824 tc->class = XMC_BS;
252b5132
RH		 4825 break;
4826 case 'D':
4827 if (strcmp (s, "DB]") == 0)
809ffe0d 4828 tc->class = XMC_DB;
252b5132 4829 else if (strcmp (s, "DS]") == 0)
809ffe0d 4830 tc->class = XMC_DS;
252b5132
RH		 4831 break;
4832 case 'G':
4833 if (strcmp (s, "GL]") == 0)
809ffe0d 4834 tc->class = XMC_GL;
252b5132
RH		 4835 break;
4836 case 'P':
4837 if (strcmp (s, "PR]") == 0)
809ffe0d 4838 tc->class = XMC_PR;
252b5132
RH		 4839 break;
4840 case 'R':
4841 if (strcmp (s, "RO]") == 0)
809ffe0d 4842 tc->class = XMC_RO;
252b5132 4843 else if (strcmp (s, "RW]") == 0)
809ffe0d 4844 tc->class = XMC_RW;
252b5132
RH		 4845 break;
4846 case 'S':
4847 if (strcmp (s, "SV]") == 0)
809ffe0d 4848 tc->class = XMC_SV;
252b5132
RH		 4849 break;
4850 case 'T':
4851 if (strcmp (s, "TC]") == 0)
809ffe0d 4852 tc->class = XMC_TC;
252b5132 4853 else if (strcmp (s, "TI]") == 0)
809ffe0d 4854 tc->class = XMC_TI;
252b5132 4855 else if (strcmp (s, "TB]") == 0)
809ffe0d 4856 tc->class = XMC_TB;
252b5132 4857 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4858 tc->class = XMC_TC0;
252b5132
RH		 4859 break;
4860 case 'U':
4861 if (strcmp (s, "UA]") == 0)
809ffe0d 4862 tc->class = XMC_UA;
252b5132 4863 else if (strcmp (s, "UC]") == 0)
809ffe0d 4864 tc->class = XMC_UC;
252b5132
RH		 4865 break;
4866 case 'X':
4867 if (strcmp (s, "XO]") == 0)
809ffe0d 4868 tc->class = XMC_XO;
252b5132
RH		 4869 break;
4870 }
4871
809ffe0d 4872 if (tc->class == -1)
252b5132
RH		 4873 as_bad (_("Unrecognized symbol suffix"));
4874}
4875
4876/* Set the class of a label based on where it is defined. This
4877 handles symbols without suffixes. Also, move the symbol so that it
4878 follows the csect symbol. */
4879
4880void
98027b10 4881ppc_frob_label (symbolS *sym)
252b5132
RH		 4882{
4883 if (ppc_current_csect != (symbolS *) NULL)
4884 {
809ffe0d
ILT		 4885 if (symbol_get_tc (sym)->class == -1)
4886 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4887
4888 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4889 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4890 &symbol_rootP, &symbol_lastP);
4891 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4892 }
07a53e5c
RH		 4893
4894#ifdef OBJ_ELF
4895 dwarf2_emit_label (sym);
4896#endif
252b5132
RH		 4897}
4898
4899/* This variable is set by ppc_frob_symbol if any absolute symbols are
4900 seen. It tells ppc_adjust_symtab whether it needs to look through
4901 the symbols. */
4902
b34976b6 4903static bfd_boolean ppc_saw_abs;
252b5132
RH		 4904
4905/* Change the name of a symbol just before writing it out. Set the
4906 real name if the .rename pseudo-op was used. Otherwise, remove any
4907 class suffix. Return 1 if the symbol should not be included in the
4908 symbol table. */
4909
4910int
98027b10 4911ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4912{
4913 static symbolS *ppc_last_function;
4914 static symbolS *set_end;
4915
4916 /* Discard symbols that should not be included in the output symbol
4917 table. */
809ffe0d
ILT		 4918 if (! symbol_used_in_reloc_p (sym)
4919 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4920 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4921 && ! symbol_get_tc (sym)->output
252b5132
RH		 4922 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4923 return 1;
4924
a161fe53
AM		 4925 /* This one will disappear anyway. Don't make a csect sym for it. */
4926 if (sym == abs_section_sym)
4927 return 1;
4928
809ffe0d
ILT		 4929 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4930 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4931 else
4932 {
4933 const char *name;
4934 const char *s;
4935
4936 name = S_GET_NAME (sym);
4937 s = strchr (name, '[');
4938 if (s != (char *) NULL)
4939 {
4940 unsigned int len;
4941 char *snew;
4942
4943 len = s - name;
4944 snew = xmalloc (len + 1);
4945 memcpy (snew, name, len);
4946 snew[len] = '\0';
4947
4948 S_SET_NAME (sym, snew);
4949 }
4950 }
4951
4952 if (set_end != (symbolS *) NULL)
4953 {
4954 SA_SET_SYM_ENDNDX (set_end, sym);
4955 set_end = NULL;
4956 }
4957
4958 if (SF_GET_FUNCTION (sym))
4959 {
4960 if (ppc_last_function != (symbolS *) NULL)
4961 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4962 ppc_last_function = sym;
809ffe0d 4963 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4964 {
6386f3a7 4965 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4966 SA_SET_SYM_FSIZE (sym,
4967 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4968 }
4969 }
4970 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4971 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4972 {
4973 if (ppc_last_function == (symbolS *) NULL)
4974 as_bad (_(".ef with no preceding .function"));
4975 else
4976 {
4977 set_end = ppc_last_function;
4978 ppc_last_function = NULL;
4979
4980 /* We don't have a C_EFCN symbol, but we need to force the
4981 COFF backend to believe that it has seen one. */
4982 coff_last_function = NULL;
4983 }
4984 }
4985
670ec21d 4986 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4987 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4988 && S_GET_STORAGE_CLASS (sym) != C_FILE
4989 && S_GET_STORAGE_CLASS (sym) != C_FCN
4990 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4991 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4992 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4993 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4994 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4995 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4996 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4997
4998 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4999 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5000 {
5001 int i;
5002 union internal_auxent *a;
5003
5004 /* Create a csect aux. */
5005 i = S_GET_NUMBER_AUXILIARY (sym);
5006 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5007 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5008 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5009 {
5010 /* This is the TOC table. */
5011 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5012 a->x_csect.x_scnlen.l = 0;
5013 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5014 }
809ffe0d 5015 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5016 {
5017 /* This is a csect symbol. x_scnlen is the size of the
5018 csect. */
809ffe0d 5019 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5020 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5021 S_GET_SEGMENT (sym))
5022 - S_GET_VALUE (sym));
5023 else
5024 {
6386f3a7 5025 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5026 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5027 - S_GET_VALUE (sym));
5028 }
809ffe0d 5029 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5030 }
5031 else if (S_GET_SEGMENT (sym) == bss_section)
5032 {
5033 /* This is a common symbol. */
809ffe0d
ILT		 5034 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5035 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5036 if (S_IS_EXTERNAL (sym))
809ffe0d 5037 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5038 else
809ffe0d 5039 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5040 }
5041 else if (S_GET_SEGMENT (sym) == absolute_section)
5042 {
5043 /* This is an absolute symbol. The csect will be created by
99a814a1 5044 ppc_adjust_symtab. */
b34976b6 5045 ppc_saw_abs = TRUE;
252b5132 5046 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5047 if (symbol_get_tc (sym)->class == -1)
5048 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5049 }
5050 else if (! S_IS_DEFINED (sym))
5051 {
5052 /* This is an external symbol. */
5053 a->x_csect.x_scnlen.l = 0;
5054 a->x_csect.x_smtyp = XTY_ER;
5055 }
809ffe0d 5056 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5057 {
5058 symbolS *next;
5059
5060 /* This is a TOC definition. x_scnlen is the size of the
5061 TOC entry. */
5062 next = symbol_next (sym);
809ffe0d 5063 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5064 next = symbol_next (next);
5065 if (next == (symbolS *) NULL
809ffe0d 5066 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5067 {
5068 if (ppc_after_toc_frag == (fragS *) NULL)
5069 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5070 data_section)
5071 - S_GET_VALUE (sym));
5072 else
5073 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5074 - S_GET_VALUE (sym));
5075 }
5076 else
5077 {
6386f3a7 5078 resolve_symbol_value (next);
252b5132
RH		 5079 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5080 - S_GET_VALUE (sym));
5081 }
5082 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5083 }
5084 else
5085 {
5086 symbolS *csect;
5087
5088 /* This is a normal symbol definition. x_scnlen is the
5089 symbol index of the containing csect. */
5090 if (S_GET_SEGMENT (sym) == text_section)
5091 csect = ppc_text_csects;
5092 else if (S_GET_SEGMENT (sym) == data_section)
5093 csect = ppc_data_csects;
5094 else
5095 abort ();
5096
5097 /* Skip the initial dummy symbol. */
809ffe0d 5098 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5099
5100 if (csect == (symbolS *) NULL)
5101 {
5102 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5103 a->x_csect.x_scnlen.l = 0;
5104 }
5105 else
5106 {
809ffe0d 5107 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5108 {
6386f3a7 5109 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5110 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5111 > S_GET_VALUE (sym))
252b5132 5112 break;
809ffe0d 5113 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5114 }
5115
809ffe0d
ILT		 5116 a->x_csect.x_scnlen.p =
5117 coffsymbol (symbol_get_bfdsym (csect))->native;
5118 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5119 1;
252b5132
RH		 5120 }
5121 a->x_csect.x_smtyp = XTY_LD;
5122 }
81d4177b 5123
252b5132
RH		 5124 a->x_csect.x_parmhash = 0;
5125 a->x_csect.x_snhash = 0;
809ffe0d 5126 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5127 a->x_csect.x_smclas = XMC_PR;
5128 else
809ffe0d 5129 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5130 a->x_csect.x_stab = 0;
5131 a->x_csect.x_snstab = 0;
5132
5133 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5134 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5135 }
5136 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5137 {
5138 /* We want the value to be the symbol index of the referenced
5139 csect symbol. BFD will do that for us if we set the right
5140 flags. */
b782de16
AM		 5141 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5142 combined_entry_type *c = coffsymbol (bsym)->native;
5143
5144 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5145 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5146 }
5147 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5148 {
5149 symbolS *block;
5150 symbolS *csect;
5151
5152 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5153 block = symbol_get_tc (sym)->within;
5154 csect = symbol_get_tc (block)->within;
6386f3a7 5155 resolve_symbol_value (csect);
252b5132
RH		 5156 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5157 }
5158 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5159 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5160 {
5161 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5162 BFD will do that for us if we set the right flags. We have
5163 already set the value correctly. */
809ffe0d 5164 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5165 }
5166
5167 return 0;
5168}
5169
5170/* Adjust the symbol table. This creates csect symbols for all
5171 absolute symbols. */
5172
5173void
98027b10 5174ppc_adjust_symtab (void)
252b5132
RH		 5175{
5176 symbolS *sym;
5177
5178 if (! ppc_saw_abs)
5179 return;
5180
5181 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5182 {
5183 symbolS *csect;
5184 int i;
5185 union internal_auxent *a;
5186
5187 if (S_GET_SEGMENT (sym) != absolute_section)
5188 continue;
5189
5190 csect = symbol_create (".abs[XO]", absolute_section,
5191 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5192 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5193 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5194 i = S_GET_NUMBER_AUXILIARY (csect);
5195 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5196 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5197 a->x_csect.x_scnlen.l = 0;
5198 a->x_csect.x_smtyp = XTY_SD;
5199 a->x_csect.x_parmhash = 0;
5200 a->x_csect.x_snhash = 0;
5201 a->x_csect.x_smclas = XMC_XO;
5202 a->x_csect.x_stab = 0;
5203 a->x_csect.x_snstab = 0;
5204
5205 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5206
5207 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5208 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5209 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5210 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5211 }
5212
b34976b6 5213 ppc_saw_abs = FALSE;
252b5132
RH		 5214}
5215
5216/* Set the VMA for a section. This is called on all the sections in
5217 turn. */
5218
5219void
98027b10 5220ppc_frob_section (asection *sec)
252b5132 5221{
931e13a6 5222 static bfd_vma vma = 0;
252b5132 5223
931e13a6 5224 vma = md_section_align (sec, vma);
252b5132
RH		 5225 bfd_set_section_vma (stdoutput, sec, vma);
5226 vma += bfd_section_size (stdoutput, sec);
5227}
5228
5229#endif /* OBJ_XCOFF */
5230\f
252b5132 5231char *
98027b10 5232md_atof (int type, char *litp, int *sizep)
252b5132 5233{
499ac353 5234 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5235}
5236
5237/* Write a value out to the object file, using the appropriate
5238 endianness. */
5239
5240void
98027b10 5241md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5242{
5243 if (target_big_endian)
5244 number_to_chars_bigendian (buf, val, n);
5245 else
5246 number_to_chars_littleendian (buf, val, n);
5247}
5248
5249/* Align a section (I don't know why this is machine dependent). */
5250
5251valueT
3aeeedbb 5252md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5253{
3aeeedbb
AM		 5254#ifdef OBJ_ELF
5255 return addr;
5256#else
252b5132
RH		 5257 int align = bfd_get_section_alignment (stdoutput, seg);
5258
5259 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5260#endif
252b5132
RH		 5261}
5262
5263/* We don't have any form of relaxing. */
5264
5265int
98027b10
AM		 5266md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5267 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5268{
5269 abort ();
5270 return 0;
5271}
5272
5273/* Convert a machine dependent frag. We never generate these. */
5274
5275void
98027b10
AM		 5276md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5277 asection *sec ATTRIBUTE_UNUSED,
5278 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5279{
5280 abort ();
5281}
5282
5283/* We have no need to default values of symbols. */
5284
252b5132 5285symbolS *
98027b10 5286md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5287{
5288 return 0;
5289}
5290\f
5291/* Functions concerning relocs. */
5292
5293/* The location from which a PC relative jump should be calculated,
5294 given a PC relative reloc. */
5295
5296long
98027b10 5297md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5298{
5299 return fixp->fx_frag->fr_address + fixp->fx_where;
5300}
5301
5302#ifdef OBJ_XCOFF
5303
5304/* This is called to see whether a fixup should be adjusted to use a
5305 section symbol. We take the opportunity to change a fixup against
5306 a symbol in the TOC subsegment into a reloc against the
5307 corresponding .tc symbol. */
5308
5309int
98027b10 5310ppc_fix_adjustable (fixS *fix)
252b5132 5311{
b782de16
AM		 5312 valueT val = resolve_symbol_value (fix->fx_addsy);
5313 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5314 TC_SYMFIELD_TYPE *tc;
5315
5316 if (symseg == absolute_section)
5317 return 0;
252b5132 5318
252b5132 5319 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5320 && fix->fx_addsy != ppc_toc_csect
b782de16 5321 && symseg == data_section
252b5132
RH		 5322 && val >= ppc_toc_frag->fr_address
5323 && (ppc_after_toc_frag == (fragS *) NULL
5324 || val < ppc_after_toc_frag->fr_address))
5325 {
5326 symbolS *sy;
5327
5328 for (sy = symbol_next (ppc_toc_csect);
5329 sy != (symbolS *) NULL;
5330 sy = symbol_next (sy))
5331 {
b782de16
AM		 5332 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5333
5334 if (sy_tc->class == XMC_TC0)
252b5132 5335 continue;
b782de16 5336 if (sy_tc->class != XMC_TC)
252b5132 5337 break;
b782de16 5338 if (val == resolve_symbol_value (sy))
252b5132
RH		 5339 {
5340 fix->fx_addsy = sy;
5341 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5342 return 0;
5343 }
5344 }
5345
5346 as_bad_where (fix->fx_file, fix->fx_line,
5347 _("symbol in .toc does not match any .tc"));
5348 }
5349
5350 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5351 tc = symbol_get_tc (fix->fx_addsy);
5352 if (tc->subseg == 0
5353 && tc->class != XMC_TC0
5354 && tc->class != XMC_TC
5355 && symseg != bss_section
252b5132 5356 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5357 && (symseg != data_section
252b5132
RH		 5358 || ppc_toc_csect == NULL
5359 || val < ppc_toc_frag->fr_address
5360 || (ppc_after_toc_frag != NULL
5361 && val >= ppc_after_toc_frag->fr_address)))
5362 {
5363 symbolS *csect;
b782de16 5364 symbolS *next_csect;
252b5132 5365
b782de16 5366 if (symseg == text_section)
252b5132 5367 csect = ppc_text_csects;
b782de16 5368 else if (symseg == data_section)
252b5132
RH		 5369 csect = ppc_data_csects;
5370 else
5371 abort ();
5372
5373 /* Skip the initial dummy symbol. */
809ffe0d 5374 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5375
5376 if (csect != (symbolS *) NULL)
5377 {
b782de16
AM		 5378 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5379 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5380 {
5381 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5382 have to look through the full symbol table to see
5383 whether this is the csect we want. Note that we will
5384 only get here if the csect has zero length. */
b782de16
AM		 5385 if (symbol_get_frag (csect)->fr_address == val
5386 && S_GET_VALUE (csect) == val)
252b5132
RH		 5387 {
5388 symbolS *scan;
5389
809ffe0d 5390 for (scan = symbol_next (csect);
252b5132 5391 scan != NULL;
809ffe0d 5392 scan = symbol_next (scan))
252b5132 5393 {
809ffe0d 5394 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5395 break;
5396 if (scan == fix->fx_addsy)
5397 break;
5398 }
5399
5400 /* If we found the symbol before the next csect
99a814a1 5401 symbol, then this is the csect we want. */
252b5132
RH		 5402 if (scan == fix->fx_addsy)
5403 break;
5404 }
5405
b782de16 5406 csect = next_csect;
252b5132
RH		 5407 }
5408
b782de16 5409 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5410 fix->fx_addsy = csect;
5411 }
b782de16 5412 return 0;
252b5132
RH		 5413 }
5414
5415 /* Adjust a reloc against a .lcomm symbol to be against the base
5416 .lcomm. */
b782de16 5417 if (symseg == bss_section
252b5132
RH		 5418 && ! S_IS_EXTERNAL (fix->fx_addsy))
5419 {
b782de16
AM		 5420 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5421
5422 fix->fx_offset += val - resolve_symbol_value (sy);
5423 fix->fx_addsy = sy;
252b5132
RH		 5424 }
5425
5426 return 0;
5427}
5428
5429/* A reloc from one csect to another must be kept. The assembler
5430 will, of course, keep relocs between sections, and it will keep
5431 absolute relocs, but we need to force it to keep PC relative relocs
5432 between two csects in the same section. */
5433
5434int
98027b10 5435ppc_force_relocation (fixS *fix)
252b5132
RH		 5436{
5437 /* At this point fix->fx_addsy should already have been converted to
5438 a csect symbol. If the csect does not include the fragment, then
5439 we need to force the relocation. */
5440 if (fix->fx_pcrel
5441 && fix->fx_addsy != NULL
809ffe0d
ILT		 5442 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5443 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5444 > fix->fx_frag->fr_address)
5445 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5446 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5447 <= fix->fx_frag->fr_address))))
5448 return 1;
5449
ae6063d4 5450 return generic_force_reloc (fix);
252b5132
RH		 5451}
5452
5453#endif /* OBJ_XCOFF */
5454
0baf16f2 5455#ifdef OBJ_ELF
a161fe53
AM		 5456/* If this function returns non-zero, it guarantees that a relocation
5457 will be emitted for a fixup. */
5458
5459int
98027b10 5460ppc_force_relocation (fixS *fix)
a161fe53
AM		 5461{
5462 /* Branch prediction relocations must force a relocation, as must
5463 the vtable description relocs. */
5464 switch (fix->fx_r_type)
5465 {
5466 case BFD_RELOC_PPC_B16_BRTAKEN:
5467 case BFD_RELOC_PPC_B16_BRNTAKEN:
5468 case BFD_RELOC_PPC_BA16_BRTAKEN:
5469 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5470 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5471 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5472 return 1;
5473 default:
5474 break;
5475 }
5476
cdba85ec
AM		 5477 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5478 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5479 return 1;
5480
ae6063d4 5481 return generic_force_reloc (fix);
a161fe53
AM		 5482}
5483
0baf16f2 5484int
98027b10 5485ppc_fix_adjustable (fixS *fix)
252b5132 5486{
0baf16f2
AM		 5487 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5488 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5489 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5490 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5491 && fix->fx_r_type != BFD_RELOC_GPREL16
5492 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5493 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5494 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5495 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5496}
0baf16f2 5497#endif
252b5132 5498
3aeeedbb
AM		 5499/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5500 rs_align_code frag. */
5501
5502void
5503ppc_handle_align (struct frag *fragP)
5504{
5505 valueT count = (fragP->fr_next->fr_address
5506 - (fragP->fr_address + fragP->fr_fix));
5507
5508 if (count != 0 && (count & 3) == 0)
5509 {
5510 char *dest = fragP->fr_literal + fragP->fr_fix;
5511
5512 fragP->fr_var = 4;
5513 md_number_to_chars (dest, 0x60000000, 4);
5514
5515 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5516 {
5517 /* For power6, we want the last nop to be a group terminating
5518 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5519 immediately after this one, with its address set to the last
5520 nop location. This will automatically reduce the number of
5521 nops in the current frag by one. */
5522 if (count > 4)
5523 {
5524 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5525
5526 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5527 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5528 group_nop->fr_fix = 0;
5529 group_nop->fr_offset = 1;
5530 group_nop->fr_type = rs_fill;
5531 fragP->fr_next = group_nop;
5532 dest = group_nop->fr_literal;
5533 }
5534
5535 md_number_to_chars (dest, 0x60210000, 4);
5536 }
5537 }
5538}
5539
252b5132
RH		 5540/* Apply a fixup to the object code. This is called for all the
5541 fixups we generated by the call to fix_new_exp, above. In the call
5542 above we used a reloc code which was the largest legal reloc code
5543 plus the operand index. Here we undo that to recover the operand
5544 index. At this point all symbol values should be fully resolved,
5545 and we attempt to completely resolve the reloc. If we can not do
5546 that, we determine the correct reloc code and put it back in the
5547 fixup. */
5548
94f592af 5549void
98027b10 5550md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5551{
94f592af 5552 valueT value = * valP;
252b5132
RH		 5553
5554#ifdef OBJ_ELF
94f592af 5555 if (fixP->fx_addsy != NULL)
252b5132 5556 {
a161fe53 5557 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5558 if (fixP->fx_pcrel)
5559 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5560 }
5561 else
94f592af 5562 fixP->fx_done = 1;
252b5132 5563#else
a161fe53 5564 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5565 the symbol values. If we are doing this relocation the code in
5566 write.c is going to call bfd_install_relocation, which is also
5567 going to use the symbol value. That means that if the reloc is
5568 fully resolved we want to use *valP since bfd_install_relocation is
5569 not being used.
252b5132 5570 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5571 *valP, and must use fx_offset instead. However, if the reloc
5572 is PC relative, we do want to use *valP since it includes the
252b5132 5573 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5574 if (fixP->fx_addsy == (symbolS *) NULL)
5575 fixP->fx_done = 1;
5576
5577 else if (fixP->fx_pcrel)
5578 ;
5579
252b5132 5580 else
a161fe53
AM		 5581 value = fixP->fx_offset;
5582#endif
5583
5584 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5585 {
a161fe53
AM		 5586 /* We can't actually support subtracting a symbol. */
5587 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5588 }
252b5132 5589
94f592af 5590 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5591 {
5592 int opindex;
5593 const struct powerpc_operand *operand;
5594 char *where;
5595 unsigned long insn;
5596
94f592af 5597 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5598
5599 operand = &powerpc_operands[opindex];
5600
5601#ifdef OBJ_XCOFF
0baf16f2
AM		 5602 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5603 does not generate a reloc. It uses the offset of `sym' within its
5604 csect. Other usages, such as `.long sym', generate relocs. This
5605 is the documented behaviour of non-TOC symbols. */
252b5132 5606 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5607 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5608 && operand->shift == 0
2b3c4602 5609 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5610 && fixP->fx_addsy != NULL
5611 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5612 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5613 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5614 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5615 {
94f592af
NC		 5616 value = fixP->fx_offset;
5617 fixP->fx_done = 1;
252b5132
RH		 5618 }
5619#endif
5620
5621 /* Fetch the instruction, insert the fully resolved operand
5622 value, and stuff the instruction back again. */
94f592af 5623 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5624 if (target_big_endian)
5625 insn = bfd_getb32 ((unsigned char *) where);
5626 else
5627 insn = bfd_getl32 ((unsigned char *) where);
5628 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5629 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5630 if (target_big_endian)
5631 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5632 else
5633 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5634
94f592af
NC		 5635 if (fixP->fx_done)
5636 /* Nothing else to do here. */
5637 return;
252b5132 5638
94f592af 5639 assert (fixP->fx_addsy != NULL);
0baf16f2 5640
252b5132
RH		 5641 /* Determine a BFD reloc value based on the operand information.
5642 We are only prepared to turn a few of the operands into
0baf16f2 5643 relocs. */
11b37b7b 5644 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5645 && operand->bitm == 0x3fffffc
11b37b7b 5646 && operand->shift == 0)
94f592af 5647 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5648 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5649 && operand->bitm == 0xfffc
11b37b7b 5650 && operand->shift == 0)
95210096
AM		 5651 {
5652 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5653#ifdef OBJ_XCOFF
5654 fixP->fx_size = 2;
5655 if (target_big_endian)
5656 fixP->fx_where += 2;
5657#endif
5658 }
11b37b7b 5659 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5660 && operand->bitm == 0x3fffffc
11b37b7b 5661 && operand->shift == 0)
94f592af 5662 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5663 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5664 && operand->bitm == 0xfffc
11b37b7b 5665 && operand->shift == 0)
95210096
AM		 5666 {
5667 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5668#ifdef OBJ_XCOFF
5669 fixP->fx_size = 2;
5670 if (target_big_endian)
5671 fixP->fx_where += 2;
5672#endif
5673 }
0baf16f2 5674#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5675 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5676 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5677 && operand->shift == 0)
11b37b7b 5678 {
a7fc733f
AM		 5679 if (ppc_is_toc_sym (fixP->fx_addsy))
5680 {
5681 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5682#ifdef OBJ_ELF
a7fc733f
AM		 5683 if (ppc_obj64
5684 && (operand->flags & PPC_OPERAND_DS) != 0)
5685 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5686#endif
5687 }
5688 else
5689 {
5690 fixP->fx_r_type = BFD_RELOC_16;
5691#ifdef OBJ_ELF
5692 if (ppc_obj64
5693 && (operand->flags & PPC_OPERAND_DS) != 0)
5694 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5695#endif
a7fc733f 5696 }
94f592af 5697 fixP->fx_size = 2;
11b37b7b 5698 if (target_big_endian)
94f592af 5699 fixP->fx_where += 2;
11b37b7b 5700 }
0baf16f2 5701#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5702 else
252b5132
RH		 5703 {
5704 char *sfile;
5705 unsigned int sline;
5706
5707 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5708 symbol. */
94f592af
NC		 5709 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5710 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5711 _("unresolved expression that must be resolved"));
5712 else
94f592af 5713 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5714 _("unsupported relocation against %s"),
94f592af
NC		 5715 S_GET_NAME (fixP->fx_addsy));
5716 fixP->fx_done = 1;
5717 return;
252b5132
RH		 5718 }
5719 }
5720 else
5721 {
5722#ifdef OBJ_ELF
94f592af 5723 ppc_elf_validate_fix (fixP, seg);
252b5132 5724#endif
94f592af 5725 switch (fixP->fx_r_type)
252b5132 5726 {
252b5132 5727 case BFD_RELOC_CTOR:
2b3c4602 5728 if (ppc_obj64)
9c7977b3
AM		 5729 goto ctor64;
5730 /* fall through */
5731
0baf16f2 5732 case BFD_RELOC_32:
94f592af
NC		 5733 if (fixP->fx_pcrel)
5734 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5735 /* fall through */
252b5132
RH		 5736
5737 case BFD_RELOC_RVA:
5738 case BFD_RELOC_32_PCREL:
252b5132 5739 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5740 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5741 value, 4);
5742 break;
5743
7f6d05e8 5744 case BFD_RELOC_64:
9c7977b3 5745 ctor64:
94f592af
NC		 5746 if (fixP->fx_pcrel)
5747 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5748 /* fall through */
0baf16f2 5749
7f6d05e8 5750 case BFD_RELOC_64_PCREL:
94f592af 5751 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5752 value, 8);
81d4177b 5753 break;
0baf16f2 5754
252b5132
RH		 5755 case BFD_RELOC_GPREL16:
5756 case BFD_RELOC_16_GOT_PCREL:
5757 case BFD_RELOC_16_GOTOFF:
5758 case BFD_RELOC_LO16_GOTOFF:
5759 case BFD_RELOC_HI16_GOTOFF:
5760 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5761 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5762 case BFD_RELOC_LO16_BASEREL:
5763 case BFD_RELOC_HI16_BASEREL:
5764 case BFD_RELOC_HI16_S_BASEREL:
5765 case BFD_RELOC_PPC_EMB_NADDR16:
5766 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5767 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5768 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5769 case BFD_RELOC_PPC_EMB_SDAI16:
5770 case BFD_RELOC_PPC_EMB_SDA2REL:
5771 case BFD_RELOC_PPC_EMB_SDA2I16:
5772 case BFD_RELOC_PPC_EMB_RELSEC16:
5773 case BFD_RELOC_PPC_EMB_RELST_LO:
5774 case BFD_RELOC_PPC_EMB_RELST_HI:
5775 case BFD_RELOC_PPC_EMB_RELST_HA:
5776 case BFD_RELOC_PPC_EMB_RELSDA:
5777 case BFD_RELOC_PPC_TOC16:
0baf16f2 5778#ifdef OBJ_ELF
0baf16f2
AM		 5779 case BFD_RELOC_PPC64_TOC16_LO:
5780 case BFD_RELOC_PPC64_TOC16_HI:
5781 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5782#endif
94f592af 5783 if (fixP->fx_pcrel)
252b5132 5784 {
94f592af
NC		 5785 if (fixP->fx_addsy != NULL)
5786 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5787 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5788 bfd_get_reloc_code_name (fixP->fx_r_type),
5789 S_GET_NAME (fixP->fx_addsy));
252b5132 5790 else
94f592af 5791 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5792 _("cannot emit PC relative %s relocation"),
94f592af 5793 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5794 }
5795
94f592af 5796 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5797 value, 2);
5798 break;
5799
3c9d25f4
AM		 5800 case BFD_RELOC_16:
5801 if (fixP->fx_pcrel)
5802 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5803 /* fall through */
5804
5805 case BFD_RELOC_16_PCREL:
5806 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5807 value, 2);
5808 break;
5809
5810 case BFD_RELOC_LO16:
5811 if (fixP->fx_pcrel)
5812 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5813 /* fall through */
5814
5815 case BFD_RELOC_LO16_PCREL:
5816 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5817 value, 2);
5818 break;
5819
252b5132
RH		 5820 /* This case happens when you write, for example,
5821 lis %r3,(L1-L2)@ha
5822 where L1 and L2 are defined later. */
5823 case BFD_RELOC_HI16:
94f592af 5824 if (fixP->fx_pcrel)
3c9d25f4
AM		 5825 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5826 /* fall through */
5827
5828 case BFD_RELOC_HI16_PCREL:
94f592af 5829 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5830 PPC_HI (value), 2);
252b5132 5831 break;
0baf16f2 5832
252b5132 5833 case BFD_RELOC_HI16_S:
94f592af 5834 if (fixP->fx_pcrel)
3c9d25f4
AM		 5835 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5836 /* fall through */
5837
5838 case BFD_RELOC_HI16_S_PCREL:
94f592af 5839 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5840 PPC_HA (value), 2);
5841 break;
5842
5843#ifdef OBJ_ELF
0baf16f2 5844 case BFD_RELOC_PPC64_HIGHER:
94f592af 5845 if (fixP->fx_pcrel)
0baf16f2 5846 abort ();
94f592af 5847 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5848 PPC_HIGHER (value), 2);
252b5132
RH		 5849 break;
5850
0baf16f2 5851 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5852 if (fixP->fx_pcrel)
0baf16f2 5853 abort ();
94f592af 5854 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5855 PPC_HIGHERA (value), 2);
5856 break;
5857
5858 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5859 if (fixP->fx_pcrel)
0baf16f2 5860 abort ();
94f592af 5861 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5862 PPC_HIGHEST (value), 2);
5863 break;
5864
5865 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5866 if (fixP->fx_pcrel)
0baf16f2 5867 abort ();
94f592af 5868 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5869 PPC_HIGHESTA (value), 2);
5870 break;
5871
5872 case BFD_RELOC_PPC64_ADDR16_DS:
5873 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5874 case BFD_RELOC_PPC64_GOT16_DS:
5875 case BFD_RELOC_PPC64_GOT16_LO_DS:
5876 case BFD_RELOC_PPC64_PLT16_LO_DS:
5877 case BFD_RELOC_PPC64_SECTOFF_DS:
5878 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5879 case BFD_RELOC_PPC64_TOC16_DS:
5880 case BFD_RELOC_PPC64_TOC16_LO_DS:
5881 case BFD_RELOC_PPC64_PLTGOT16_DS:
5882 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5883 if (fixP->fx_pcrel)
0baf16f2
AM		 5884 abort ();
5885 {
2132e3a3 5886 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5887 unsigned long val, mask;
0baf16f2
AM		 5888
5889 if (target_big_endian)
adadcc0c 5890 val = bfd_getb32 (where - 2);
0baf16f2 5891 else
adadcc0c
AM		 5892 val = bfd_getl32 (where);
5893 mask = 0xfffc;
5894 /* lq insns reserve the four lsbs. */
5895 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5896 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5897 mask = 0xfff0;
5898 val |= value & mask;
0baf16f2
AM		 5899 if (target_big_endian)
5900 bfd_putb16 ((bfd_vma) val, where);
5901 else
5902 bfd_putl16 ((bfd_vma) val, where);
5903 }
5904 break;
cdba85ec 5905
ba0b2174
AM		 5906 case BFD_RELOC_PPC_B16_BRTAKEN:
5907 case BFD_RELOC_PPC_B16_BRNTAKEN:
5908 case BFD_RELOC_PPC_BA16_BRTAKEN:
5909 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5910 break;
5911
cdba85ec 5912 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5913 break;
5914
cdba85ec
AM		 5915 case BFD_RELOC_PPC_DTPMOD:
5916 case BFD_RELOC_PPC_TPREL16:
5917 case BFD_RELOC_PPC_TPREL16_LO:
5918 case BFD_RELOC_PPC_TPREL16_HI:
5919 case BFD_RELOC_PPC_TPREL16_HA:
5920 case BFD_RELOC_PPC_TPREL:
5921 case BFD_RELOC_PPC_DTPREL16:
5922 case BFD_RELOC_PPC_DTPREL16_LO:
5923 case BFD_RELOC_PPC_DTPREL16_HI:
5924 case BFD_RELOC_PPC_DTPREL16_HA:
5925 case BFD_RELOC_PPC_DTPREL:
5926 case BFD_RELOC_PPC_GOT_TLSGD16:
5927 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5928 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5929 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5930 case BFD_RELOC_PPC_GOT_TLSLD16:
5931 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5932 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5933 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5934 case BFD_RELOC_PPC_GOT_TPREL16:
5935 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5936 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5937 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5938 case BFD_RELOC_PPC_GOT_DTPREL16:
5939 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5940 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5941 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5942 case BFD_RELOC_PPC64_TPREL16_DS:
5943 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5944 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5945 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5946 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5947 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5948 case BFD_RELOC_PPC64_DTPREL16_DS:
5949 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5950 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5951 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5952 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5953 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5954 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5955 break;
0baf16f2 5956#endif
252b5132 5957 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5958 bytes, rather than 2, so offset it here appropriately. */
252b5132 5959 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5960 if (fixP->fx_pcrel)
252b5132
RH		 5961 abort ();
5962
94f592af 5963 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5964 + ((target_big_endian) ? 2 : 0),
5965 value, 2);
5966 break;
5967
5968 case BFD_RELOC_8:
94f592af 5969 if (fixP->fx_pcrel)
31a91399
NC		 5970 {
5971 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5972 ".byte <undefined_symbol> - ." */
31a91399
NC		 5973 if (fixP->fx_addsy)
5974 as_bad (_("Unable to handle reference to symbol %s"),
5975 S_GET_NAME (fixP->fx_addsy));
5976 else
5977 as_bad (_("Unable to resolve expression"));
5978 fixP->fx_done = 1;
5979 }
5980 else
5981 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5982 value, 1);
252b5132
RH		 5983 break;
5984
5985 case BFD_RELOC_24_PLT_PCREL:
5986 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5987 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5988 abort ();
5989
94f592af 5990 if (fixP->fx_done)
99a814a1
AM		 5991 {
5992 char *where;
5993 unsigned long insn;
5994
5995 /* Fetch the instruction, insert the fully resolved operand
5996 value, and stuff the instruction back again. */
94f592af 5997 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5998 if (target_big_endian)
5999 insn = bfd_getb32 ((unsigned char *) where);
6000 else
6001 insn = bfd_getl32 ((unsigned char *) where);
6002 if ((value & 3) != 0)
94f592af 6003 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6004 _("must branch to an address a multiple of 4"));
6005 if ((offsetT) value < -0x40000000
6006 || (offsetT) value >= 0x40000000)
94f592af 6007 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6008 _("@local or @plt branch destination is too far away, %ld bytes"),
6009 (long) value);
6010 insn = insn | (value & 0x03fffffc);
6011 if (target_big_endian)
6012 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6013 else
6014 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6015 }
252b5132
RH		 6016 break;
6017
6018 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6019 fixP->fx_done = 0;
6020 if (fixP->fx_addsy
6021 && !S_IS_DEFINED (fixP->fx_addsy)
6022 && !S_IS_WEAK (fixP->fx_addsy))
6023 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6024 break;
6025
6026 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6027 fixP->fx_done = 0;
252b5132
RH		 6028 break;
6029
0baf16f2 6030#ifdef OBJ_ELF
0baf16f2
AM		 6031 /* Generated by reference to `sym@tocbase'. The sym is
6032 ignored by the linker. */
6033 case BFD_RELOC_PPC64_TOC:
94f592af 6034 fixP->fx_done = 0;
0baf16f2 6035 break;
0baf16f2 6036#endif
252b5132 6037 default:
bc805888 6038 fprintf (stderr,
94f592af 6039 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6040 fflush (stderr);
252b5132
RH		 6041 abort ();
6042 }
6043 }
6044
6045#ifdef OBJ_ELF
94f592af 6046 fixP->fx_addnumber = value;
4e6935a6
AM		 6047
6048 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6049 from the section contents. If we are going to be emitting a reloc
6050 then the section contents are immaterial, so don't warn if they
6051 happen to overflow. Leave such warnings to ld. */
6052 if (!fixP->fx_done)
6053 fixP->fx_no_overflow = 1;
252b5132 6054#else
94f592af
NC		 6055 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6056 fixP->fx_addnumber = 0;
252b5132
RH		 6057 else
6058 {
6059#ifdef TE_PE
94f592af 6060 fixP->fx_addnumber = 0;
252b5132
RH		 6061#else
6062 /* We want to use the offset within the data segment of the
6063 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6064 fixP->fx_addnumber =
6065 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6066#endif
6067 }
6068#endif
252b5132
RH		 6069}
6070
6071/* Generate a reloc for a fixup. */
6072
6073arelent *
98027b10 6074tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6075{
6076 arelent *reloc;
6077
6078 reloc = (arelent *) xmalloc (sizeof (arelent));
6079
49309057
ILT		 6080 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6081 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6082 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6083 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6084 if (reloc->howto == (reloc_howto_type *) NULL)
6085 {
6086 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6087 _("reloc %d not supported by object file format"),
6088 (int) fixp->fx_r_type);
252b5132
RH		 6089 return NULL;
6090 }
6091 reloc->addend = fixp->fx_addnumber;
6092
6093 return reloc;
6094}
75e21f08
JJ		 6095
6096void
98027b10 6097ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6098{
6099 cfi_add_CFA_def_cfa (1, 0);
6100}
6101
6102int
1df69f4f 6103tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6104{
6105 unsigned int regnum = -1;
6106 unsigned int i;
6107 const char *p;
6108 char *q;
6109 static struct { char *name; int dw2regnum; } regnames[] =
6110 {
6111 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6112 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6113 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6114 { "spe_acc", 111 }, { "spefscr", 112 }
6115 };
6116
6117 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6118 if (strcmp (regnames[i].name, regname) == 0)
6119 return regnames[i].dw2regnum;
6120
6121 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6122 {
6123 p = regname + 1 + (regname[1] == '.');
6124 regnum = strtoul (p, &q, 10);
6125 if (p == q || *q || regnum >= 32)
6126 return -1;
6127 if (regname[0] == 'f')
b7d7dc63 6128 regnum += 32;
75e21f08 6129 else if (regname[0] == 'v')
b7d7dc63 6130 regnum += 77;
75e21f08
JJ		 6131 }
6132 else if (regname[0] == 'c' && regname[1] == 'r')
6133 {
6134 p = regname + 2 + (regname[2] == '.');
6135 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6136 return -1;
75e21f08
JJ		 6137 regnum = p[0] - '0' + 68;
6138 }
6139 return regnum;
6140}
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