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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
ee67d69a 32#include "elf/ppc64.h"
5d6f4f16 33#include "dwarf2dbg.h"
252b5132
RH		 34#endif
35
36#ifdef TE_PE
37#include "coff/pe.h"
38#endif
39
85645aed
TG		 40#ifdef OBJ_XCOFF
41#include "coff/xcoff.h"
42#include "libxcoff.h"
43#endif
44
252b5132
RH		 45/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
46
47/* Tell the main code what the endianness is. */
48extern int target_big_endian;
49
50/* Whether or not, we've set target_big_endian. */
51static int set_target_endian = 0;
52
53/* Whether to use user friendly register names. */
54#ifndef TARGET_REG_NAMES_P
55#ifdef TE_PE
b34976b6 56#define TARGET_REG_NAMES_P TRUE
252b5132 57#else
b34976b6 58#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 59#endif
60#endif
61
0baf16f2
AM		 62/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 HIGHESTA. */
64
65/* #lo(value) denotes the least significant 16 bits of the indicated. */
66#define PPC_LO(v) ((v) & 0xffff)
67
68/* #hi(value) denotes bits 16 through 31 of the indicated value. */
69#define PPC_HI(v) (((v) >> 16) & 0xffff)
70
71/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
72 the indicated value, compensating for #lo() being treated as a
73 signed number. */
15c1449b 74#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 75
76/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 77#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 78
79/* #highera(value) denotes bits 32 through 47 of the indicated value,
80 compensating for #lo() being treated as a signed number. */
15c1449b 81#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 82
83/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 84#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 85
86/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 87 compensating for #lo being treated as a signed number. */
88#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 89
f9c6b907
AM		 90#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
91
92/* For the time being on ppc64, don't report overflow on @h and @ha
93 applied to constants. */
94#define REPORT_OVERFLOW_HI 0
0baf16f2 95
b34976b6 96static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 97
98027b10
AM		 98static void ppc_macro (char *, const struct powerpc_macro *);
99static void ppc_byte (int);
0baf16f2
AM		 100
101#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 102static void ppc_tc (int);
103static void ppc_machine (int);
0baf16f2 104#endif
252b5132
RH		 105
106#ifdef OBJ_XCOFF
98027b10
AM		 107static void ppc_comm (int);
108static void ppc_bb (int);
109static void ppc_bc (int);
110static void ppc_bf (int);
111static void ppc_biei (int);
112static void ppc_bs (int);
113static void ppc_eb (int);
114static void ppc_ec (int);
115static void ppc_ef (int);
116static void ppc_es (int);
117static void ppc_csect (int);
85645aed 118static void ppc_dwsect (int);
98027b10
AM		 119static void ppc_change_csect (symbolS *, offsetT);
120static void ppc_function (int);
121static void ppc_extern (int);
122static void ppc_lglobl (int);
c865e45b 123static void ppc_ref (int);
98027b10
AM		 124static void ppc_section (int);
125static void ppc_named_section (int);
126static void ppc_stabx (int);
127static void ppc_rename (int);
128static void ppc_toc (int);
129static void ppc_xcoff_cons (int);
130static void ppc_vbyte (int);
252b5132
RH		 131#endif
132
133#ifdef OBJ_ELF
98027b10
AM		 134static void ppc_elf_cons (int);
135static void ppc_elf_rdata (int);
136static void ppc_elf_lcomm (int);
6911b7dc 137static void ppc_elf_localentry (int);
ee67d69a 138static void ppc_elf_abiversion (int);
252b5132
RH		 139#endif
140
141#ifdef TE_PE
98027b10
AM		 142static void ppc_previous (int);
143static void ppc_pdata (int);
144static void ppc_ydata (int);
145static void ppc_reldata (int);
146static void ppc_rdata (int);
147static void ppc_ualong (int);
148static void ppc_znop (int);
149static void ppc_pe_comm (int);
150static void ppc_pe_section (int);
151static void ppc_pe_function (int);
152static void ppc_pe_tocd (int);
252b5132
RH		 153#endif
154\f
155/* Generic assembler global variables which must be defined by all
156 targets. */
157
158#ifdef OBJ_ELF
159/* This string holds the chars that always start a comment. If the
160 pre-processor is disabled, these aren't very useful. The macro
161 tc_comment_chars points to this. We use this, rather than the
162 usual comment_chars, so that we can switch for Solaris conventions. */
163static const char ppc_solaris_comment_chars[] = "#!";
164static const char ppc_eabi_comment_chars[] = "#";
165
166#ifdef TARGET_SOLARIS_COMMENT
167const char *ppc_comment_chars = ppc_solaris_comment_chars;
168#else
169const char *ppc_comment_chars = ppc_eabi_comment_chars;
170#endif
171#else
172const char comment_chars[] = "#";
173#endif
174
175/* Characters which start a comment at the beginning of a line. */
176const char line_comment_chars[] = "#";
177
178/* Characters which may be used to separate multiple commands on a
179 single line. */
180const char line_separator_chars[] = ";";
181
182/* Characters which are used to indicate an exponent in a floating
183 point number. */
184const char EXP_CHARS[] = "eE";
185
186/* Characters which mean that a number is a floating point constant,
187 as in 0d1.0. */
188const char FLT_CHARS[] = "dD";
5ce8663f 189
5e02f92e 190/* Anything that can start an operand needs to be mentioned here,
ac805826 191 to stop the input scrubber eating whitespace. */
5e02f92e 192const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 193
194/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
195int ppc_cie_data_alignment;
783de163 196
8fbf7334
JL		 197/* The dwarf2 minimum instruction length. */
198int ppc_dwarf2_line_min_insn_length;
199
cef4f754
AM		 200/* More than this number of nops in an alignment op gets a branch
201 instead. */
202unsigned long nop_limit = 4;
203
783de163
AM		 204/* The type of processor we are assembling for. This is one or more
205 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 206ppc_cpu_t ppc_cpu = 0;
776fc418 207ppc_cpu_t sticky = 0;
01efc3af 208
ee67d69a
AM		 209/* Value for ELF e_flags EF_PPC64_ABI. */
210unsigned int ppc_abiversion = 0;
211
01efc3af
AM		 212/* Flags set on encountering toc relocs. */
213enum {
214 has_large_toc_reloc = 1,
215 has_small_toc_reloc = 2
216} toc_reloc_types;
252b5132
RH		 217\f
218/* The target specific pseudo-ops which we support. */
219
220const pseudo_typeS md_pseudo_table[] =
221{
222 /* Pseudo-ops which must be overridden. */
223 { "byte", ppc_byte, 0 },
224
225#ifdef OBJ_XCOFF
226 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
227 legitimately belong in the obj-*.c file. However, XCOFF is based
228 on COFF, and is only implemented for the RS/6000. We just use
229 obj-coff.c, and add what we need here. */
230 { "comm", ppc_comm, 0 },
231 { "lcomm", ppc_comm, 1 },
232 { "bb", ppc_bb, 0 },
233 { "bc", ppc_bc, 0 },
234 { "bf", ppc_bf, 0 },
235 { "bi", ppc_biei, 0 },
236 { "bs", ppc_bs, 0 },
237 { "csect", ppc_csect, 0 },
85645aed 238 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 239 { "data", ppc_section, 'd' },
240 { "eb", ppc_eb, 0 },
241 { "ec", ppc_ec, 0 },
242 { "ef", ppc_ef, 0 },
243 { "ei", ppc_biei, 1 },
244 { "es", ppc_es, 0 },
245 { "extern", ppc_extern, 0 },
246 { "function", ppc_function, 0 },
247 { "lglobl", ppc_lglobl, 0 },
c865e45b 248 { "ref", ppc_ref, 0 },
252b5132
RH		 249 { "rename", ppc_rename, 0 },
250 { "section", ppc_named_section, 0 },
251 { "stabx", ppc_stabx, 0 },
252 { "text", ppc_section, 't' },
253 { "toc", ppc_toc, 0 },
254 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 255 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 256 { "word", ppc_xcoff_cons, 1 },
257 { "short", ppc_xcoff_cons, 1 },
258 { "vbyte", ppc_vbyte, 0 },
259#endif
260
261#ifdef OBJ_ELF
0baf16f2
AM		 262 { "llong", ppc_elf_cons, 8 },
263 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 264 { "long", ppc_elf_cons, 4 },
265 { "word", ppc_elf_cons, 2 },
266 { "short", ppc_elf_cons, 2 },
267 { "rdata", ppc_elf_rdata, 0 },
268 { "rodata", ppc_elf_rdata, 0 },
269 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 270 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 271 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 272#endif
273
274#ifdef TE_PE
99a814a1 275 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 276 { "previous", ppc_previous, 0 },
277 { "pdata", ppc_pdata, 0 },
278 { "ydata", ppc_ydata, 0 },
279 { "reldata", ppc_reldata, 0 },
280 { "rdata", ppc_rdata, 0 },
281 { "ualong", ppc_ualong, 0 },
282 { "znop", ppc_znop, 0 },
283 { "comm", ppc_pe_comm, 0 },
284 { "lcomm", ppc_pe_comm, 1 },
285 { "section", ppc_pe_section, 0 },
286 { "function", ppc_pe_function,0 },
287 { "tocd", ppc_pe_tocd, 0 },
288#endif
289
0baf16f2 290#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 291 { "tc", ppc_tc, 0 },
0baf16f2
AM		 292 { "machine", ppc_machine, 0 },
293#endif
252b5132
RH		 294
295 { NULL, NULL, 0 }
296};
297
298\f
99a814a1
AM		 299/* Predefined register names if -mregnames (or default for Windows NT).
300 In general, there are lots of them, in an attempt to be compatible
301 with a number of other Windows NT assemblers. */
252b5132
RH		 302
303/* Structure to hold information about predefined registers. */
304struct pd_reg
305 {
306 char *name;
307 int value;
308 };
309
310/* List of registers that are pre-defined:
311
312 Each general register has predefined names of the form:
313 1. r<reg_num> which has the value <reg_num>.
314 2. r.<reg_num> which has the value <reg_num>.
315
252b5132
RH		 316 Each floating point register has predefined names of the form:
317 1. f<reg_num> which has the value <reg_num>.
318 2. f.<reg_num> which has the value <reg_num>.
319
7a899fff
C		 320 Each vector unit register has predefined names of the form:
321 1. v<reg_num> which has the value <reg_num>.
322 2. v.<reg_num> which has the value <reg_num>.
323
252b5132
RH		 324 Each condition register has predefined names of the form:
325 1. cr<reg_num> which has the value <reg_num>.
326 2. cr.<reg_num> which has the value <reg_num>.
327
328 There are individual registers as well:
329 sp or r.sp has the value 1
330 rtoc or r.toc has the value 2
331 fpscr has the value 0
332 xer has the value 1
333 lr has the value 8
334 ctr has the value 9
335 pmr has the value 0
336 dar has the value 19
337 dsisr has the value 18
338 dec has the value 22
339 sdr1 has the value 25
340 srr0 has the value 26
341 srr1 has the value 27
342
81d4177b 343 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 344
345static const struct pd_reg pre_defined_registers[] =
346{
347 { "cr.0", 0 }, /* Condition Registers */
348 { "cr.1", 1 },
349 { "cr.2", 2 },
350 { "cr.3", 3 },
351 { "cr.4", 4 },
352 { "cr.5", 5 },
353 { "cr.6", 6 },
354 { "cr.7", 7 },
355
356 { "cr0", 0 },
357 { "cr1", 1 },
358 { "cr2", 2 },
359 { "cr3", 3 },
360 { "cr4", 4 },
361 { "cr5", 5 },
362 { "cr6", 6 },
363 { "cr7", 7 },
364
365 { "ctr", 9 },
366
367 { "dar", 19 }, /* Data Access Register */
368 { "dec", 22 }, /* Decrementer */
369 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
370
371 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 372 { "f.1", 1 },
373 { "f.10", 10 },
374 { "f.11", 11 },
375 { "f.12", 12 },
376 { "f.13", 13 },
377 { "f.14", 14 },
378 { "f.15", 15 },
379 { "f.16", 16 },
380 { "f.17", 17 },
381 { "f.18", 18 },
382 { "f.19", 19 },
383 { "f.2", 2 },
384 { "f.20", 20 },
385 { "f.21", 21 },
386 { "f.22", 22 },
387 { "f.23", 23 },
388 { "f.24", 24 },
389 { "f.25", 25 },
390 { "f.26", 26 },
391 { "f.27", 27 },
392 { "f.28", 28 },
393 { "f.29", 29 },
394 { "f.3", 3 },
252b5132
RH		 395 { "f.30", 30 },
396 { "f.31", 31 },
066be9f7
PB		 397
398 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
399 { "f.33", 33 },
400 { "f.34", 34 },
401 { "f.35", 35 },
402 { "f.36", 36 },
403 { "f.37", 37 },
404 { "f.38", 38 },
405 { "f.39", 39 },
81d4177b 406 { "f.4", 4 },
066be9f7
PB		 407 { "f.40", 40 },
408 { "f.41", 41 },
409 { "f.42", 42 },
410 { "f.43", 43 },
411 { "f.44", 44 },
412 { "f.45", 45 },
413 { "f.46", 46 },
414 { "f.47", 47 },
415 { "f.48", 48 },
416 { "f.49", 49 },
81d4177b 417 { "f.5", 5 },
066be9f7
PB		 418 { "f.50", 50 },
419 { "f.51", 51 },
420 { "f.52", 52 },
421 { "f.53", 53 },
422 { "f.54", 54 },
423 { "f.55", 55 },
424 { "f.56", 56 },
425 { "f.57", 57 },
426 { "f.58", 58 },
427 { "f.59", 59 },
81d4177b 428 { "f.6", 6 },
066be9f7
PB		 429 { "f.60", 60 },
430 { "f.61", 61 },
431 { "f.62", 62 },
432 { "f.63", 63 },
81d4177b
KH		 433 { "f.7", 7 },
434 { "f.8", 8 },
435 { "f.9", 9 },
436
437 { "f0", 0 },
438 { "f1", 1 },
439 { "f10", 10 },
440 { "f11", 11 },
441 { "f12", 12 },
442 { "f13", 13 },
443 { "f14", 14 },
444 { "f15", 15 },
445 { "f16", 16 },
446 { "f17", 17 },
447 { "f18", 18 },
448 { "f19", 19 },
449 { "f2", 2 },
450 { "f20", 20 },
451 { "f21", 21 },
452 { "f22", 22 },
453 { "f23", 23 },
454 { "f24", 24 },
455 { "f25", 25 },
456 { "f26", 26 },
457 { "f27", 27 },
458 { "f28", 28 },
459 { "f29", 29 },
460 { "f3", 3 },
252b5132
RH		 461 { "f30", 30 },
462 { "f31", 31 },
066be9f7
PB		 463
464 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
465 { "f33", 33 },
466 { "f34", 34 },
467 { "f35", 35 },
468 { "f36", 36 },
469 { "f37", 37 },
470 { "f38", 38 },
471 { "f39", 39 },
81d4177b 472 { "f4", 4 },
066be9f7
PB		 473 { "f40", 40 },
474 { "f41", 41 },
475 { "f42", 42 },
476 { "f43", 43 },
477 { "f44", 44 },
478 { "f45", 45 },
479 { "f46", 46 },
480 { "f47", 47 },
481 { "f48", 48 },
482 { "f49", 49 },
81d4177b 483 { "f5", 5 },
066be9f7
PB		 484 { "f50", 50 },
485 { "f51", 51 },
486 { "f52", 52 },
487 { "f53", 53 },
488 { "f54", 54 },
489 { "f55", 55 },
490 { "f56", 56 },
491 { "f57", 57 },
492 { "f58", 58 },
493 { "f59", 59 },
81d4177b 494 { "f6", 6 },
066be9f7
PB		 495 { "f60", 60 },
496 { "f61", 61 },
497 { "f62", 62 },
498 { "f63", 63 },
81d4177b
KH		 499 { "f7", 7 },
500 { "f8", 8 },
501 { "f9", 9 },
252b5132
RH		 502
503 { "fpscr", 0 },
504
c3d65c1c
BE		 505 /* Quantization registers used with pair single instructions. */
506 { "gqr.0", 0 },
507 { "gqr.1", 1 },
508 { "gqr.2", 2 },
509 { "gqr.3", 3 },
510 { "gqr.4", 4 },
511 { "gqr.5", 5 },
512 { "gqr.6", 6 },
513 { "gqr.7", 7 },
514 { "gqr0", 0 },
515 { "gqr1", 1 },
516 { "gqr2", 2 },
517 { "gqr3", 3 },
518 { "gqr4", 4 },
519 { "gqr5", 5 },
520 { "gqr6", 6 },
521 { "gqr7", 7 },
522
252b5132
RH		 523 { "lr", 8 }, /* Link Register */
524
525 { "pmr", 0 },
526
527 { "r.0", 0 }, /* General Purpose Registers */
528 { "r.1", 1 },
529 { "r.10", 10 },
530 { "r.11", 11 },
531 { "r.12", 12 },
532 { "r.13", 13 },
533 { "r.14", 14 },
534 { "r.15", 15 },
535 { "r.16", 16 },
536 { "r.17", 17 },
537 { "r.18", 18 },
538 { "r.19", 19 },
539 { "r.2", 2 },
540 { "r.20", 20 },
541 { "r.21", 21 },
542 { "r.22", 22 },
543 { "r.23", 23 },
544 { "r.24", 24 },
545 { "r.25", 25 },
546 { "r.26", 26 },
547 { "r.27", 27 },
548 { "r.28", 28 },
549 { "r.29", 29 },
550 { "r.3", 3 },
551 { "r.30", 30 },
552 { "r.31", 31 },
553 { "r.4", 4 },
554 { "r.5", 5 },
555 { "r.6", 6 },
556 { "r.7", 7 },
557 { "r.8", 8 },
558 { "r.9", 9 },
559
560 { "r.sp", 1 }, /* Stack Pointer */
561
562 { "r.toc", 2 }, /* Pointer to the table of contents */
563
564 { "r0", 0 }, /* More general purpose registers */
565 { "r1", 1 },
566 { "r10", 10 },
567 { "r11", 11 },
568 { "r12", 12 },
569 { "r13", 13 },
570 { "r14", 14 },
571 { "r15", 15 },
572 { "r16", 16 },
573 { "r17", 17 },
574 { "r18", 18 },
575 { "r19", 19 },
576 { "r2", 2 },
577 { "r20", 20 },
578 { "r21", 21 },
579 { "r22", 22 },
580 { "r23", 23 },
581 { "r24", 24 },
582 { "r25", 25 },
583 { "r26", 26 },
584 { "r27", 27 },
585 { "r28", 28 },
586 { "r29", 29 },
587 { "r3", 3 },
588 { "r30", 30 },
589 { "r31", 31 },
590 { "r4", 4 },
591 { "r5", 5 },
592 { "r6", 6 },
593 { "r7", 7 },
594 { "r8", 8 },
595 { "r9", 9 },
596
597 { "rtoc", 2 }, /* Table of contents */
598
599 { "sdr1", 25 }, /* Storage Description Register 1 */
600
601 { "sp", 1 },
602
603 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
604 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 605
066be9f7 606 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 607 { "v.1", 1 },
608 { "v.10", 10 },
609 { "v.11", 11 },
610 { "v.12", 12 },
611 { "v.13", 13 },
612 { "v.14", 14 },
613 { "v.15", 15 },
614 { "v.16", 16 },
615 { "v.17", 17 },
616 { "v.18", 18 },
617 { "v.19", 19 },
618 { "v.2", 2 },
619 { "v.20", 20 },
620 { "v.21", 21 },
621 { "v.22", 22 },
622 { "v.23", 23 },
623 { "v.24", 24 },
624 { "v.25", 25 },
625 { "v.26", 26 },
626 { "v.27", 27 },
627 { "v.28", 28 },
628 { "v.29", 29 },
629 { "v.3", 3 },
7a899fff
C		 630 { "v.30", 30 },
631 { "v.31", 31 },
81d4177b
KH		 632 { "v.4", 4 },
633 { "v.5", 5 },
634 { "v.6", 6 },
635 { "v.7", 7 },
636 { "v.8", 8 },
637 { "v.9", 9 },
7a899fff
C		 638
639 { "v0", 0 },
81d4177b
KH		 640 { "v1", 1 },
641 { "v10", 10 },
642 { "v11", 11 },
643 { "v12", 12 },
644 { "v13", 13 },
645 { "v14", 14 },
646 { "v15", 15 },
647 { "v16", 16 },
648 { "v17", 17 },
649 { "v18", 18 },
650 { "v19", 19 },
651 { "v2", 2 },
652 { "v20", 20 },
653 { "v21", 21 },
654 { "v22", 22 },
655 { "v23", 23 },
656 { "v24", 24 },
657 { "v25", 25 },
658 { "v26", 26 },
659 { "v27", 27 },
660 { "v28", 28 },
661 { "v29", 29 },
662 { "v3", 3 },
7a899fff
C		 663 { "v30", 30 },
664 { "v31", 31 },
81d4177b
KH		 665 { "v4", 4 },
666 { "v5", 5 },
667 { "v6", 6 },
668 { "v7", 7 },
669 { "v8", 8 },
7a899fff 670 { "v9", 9 },
252b5132 671
066be9f7
PB		 672 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
673 { "vs.1", 1 },
674 { "vs.10", 10 },
675 { "vs.11", 11 },
676 { "vs.12", 12 },
677 { "vs.13", 13 },
678 { "vs.14", 14 },
679 { "vs.15", 15 },
680 { "vs.16", 16 },
681 { "vs.17", 17 },
682 { "vs.18", 18 },
683 { "vs.19", 19 },
684 { "vs.2", 2 },
685 { "vs.20", 20 },
686 { "vs.21", 21 },
687 { "vs.22", 22 },
688 { "vs.23", 23 },
689 { "vs.24", 24 },
690 { "vs.25", 25 },
691 { "vs.26", 26 },
692 { "vs.27", 27 },
693 { "vs.28", 28 },
694 { "vs.29", 29 },
695 { "vs.3", 3 },
696 { "vs.30", 30 },
697 { "vs.31", 31 },
698 { "vs.32", 32 },
699 { "vs.33", 33 },
700 { "vs.34", 34 },
701 { "vs.35", 35 },
702 { "vs.36", 36 },
703 { "vs.37", 37 },
704 { "vs.38", 38 },
705 { "vs.39", 39 },
706 { "vs.4", 4 },
707 { "vs.40", 40 },
708 { "vs.41", 41 },
709 { "vs.42", 42 },
710 { "vs.43", 43 },
711 { "vs.44", 44 },
712 { "vs.45", 45 },
713 { "vs.46", 46 },
714 { "vs.47", 47 },
715 { "vs.48", 48 },
716 { "vs.49", 49 },
717 { "vs.5", 5 },
718 { "vs.50", 50 },
719 { "vs.51", 51 },
720 { "vs.52", 52 },
721 { "vs.53", 53 },
722 { "vs.54", 54 },
723 { "vs.55", 55 },
724 { "vs.56", 56 },
725 { "vs.57", 57 },
726 { "vs.58", 58 },
727 { "vs.59", 59 },
728 { "vs.6", 6 },
729 { "vs.60", 60 },
730 { "vs.61", 61 },
731 { "vs.62", 62 },
732 { "vs.63", 63 },
733 { "vs.7", 7 },
734 { "vs.8", 8 },
735 { "vs.9", 9 },
736
737 { "vs0", 0 },
738 { "vs1", 1 },
739 { "vs10", 10 },
740 { "vs11", 11 },
741 { "vs12", 12 },
742 { "vs13", 13 },
743 { "vs14", 14 },
744 { "vs15", 15 },
745 { "vs16", 16 },
746 { "vs17", 17 },
747 { "vs18", 18 },
748 { "vs19", 19 },
749 { "vs2", 2 },
750 { "vs20", 20 },
751 { "vs21", 21 },
752 { "vs22", 22 },
753 { "vs23", 23 },
754 { "vs24", 24 },
755 { "vs25", 25 },
756 { "vs26", 26 },
757 { "vs27", 27 },
758 { "vs28", 28 },
759 { "vs29", 29 },
760 { "vs3", 3 },
761 { "vs30", 30 },
762 { "vs31", 31 },
763 { "vs32", 32 },
764 { "vs33", 33 },
765 { "vs34", 34 },
766 { "vs35", 35 },
767 { "vs36", 36 },
768 { "vs37", 37 },
769 { "vs38", 38 },
770 { "vs39", 39 },
771 { "vs4", 4 },
772 { "vs40", 40 },
773 { "vs41", 41 },
774 { "vs42", 42 },
775 { "vs43", 43 },
776 { "vs44", 44 },
777 { "vs45", 45 },
778 { "vs46", 46 },
779 { "vs47", 47 },
780 { "vs48", 48 },
781 { "vs49", 49 },
782 { "vs5", 5 },
783 { "vs50", 50 },
784 { "vs51", 51 },
785 { "vs52", 52 },
786 { "vs53", 53 },
787 { "vs54", 54 },
788 { "vs55", 55 },
789 { "vs56", 56 },
790 { "vs57", 57 },
791 { "vs58", 58 },
792 { "vs59", 59 },
793 { "vs6", 6 },
794 { "vs60", 60 },
795 { "vs61", 61 },
796 { "vs62", 62 },
797 { "vs63", 63 },
798 { "vs7", 7 },
799 { "vs8", 8 },
800 { "vs9", 9 },
801
252b5132
RH		 802 { "xer", 1 },
803
804};
805
bc805888 806#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 807
808/* Given NAME, find the register number associated with that name, return
809 the integer value associated with the given name or -1 on failure. */
810
252b5132 811static int
98027b10 812reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 813{
814 int middle, low, high;
815 int cmp;
816
817 low = 0;
818 high = regcount - 1;
819
820 do
821 {
822 middle = (low + high) / 2;
823 cmp = strcasecmp (name, regs[middle].name);
824 if (cmp < 0)
825 high = middle - 1;
826 else if (cmp > 0)
827 low = middle + 1;
828 else
829 return regs[middle].value;
830 }
831 while (low <= high);
832
833 return -1;
834}
835
836/*
99a814a1 837 * Summary of register_name.
252b5132
RH		 838 *
839 * in: Input_line_pointer points to 1st char of operand.
840 *
841 * out: A expressionS.
842 * The operand may have been a register: in this case, X_op == O_register,
843 * X_add_number is set to the register number, and truth is returned.
844 * Input_line_pointer->(next non-blank) char after operand, or is in its
845 * original state.
846 */
847
b34976b6 848static bfd_boolean
98027b10 849register_name (expressionS *expressionP)
252b5132
RH		 850{
851 int reg_number;
852 char *name;
853 char *start;
854 char c;
855
99a814a1 856 /* Find the spelling of the operand. */
252b5132 857 start = name = input_line_pointer;
3882b010 858 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 859 name = ++input_line_pointer;
860
3882b010 861 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 862 return FALSE;
252b5132
RH		 863
864 c = get_symbol_end ();
865 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866
468cced8
AM		 867 /* Put back the delimiting char. */
868 *input_line_pointer = c;
869
99a814a1 870 /* Look to see if it's in the register table. */
81d4177b 871 if (reg_number >= 0)
252b5132
RH		 872 {
873 expressionP->X_op = O_register;
874 expressionP->X_add_number = reg_number;
81d4177b 875
99a814a1 876 /* Make the rest nice. */
252b5132
RH		 877 expressionP->X_add_symbol = NULL;
878 expressionP->X_op_symbol = NULL;
b34976b6 879 return TRUE;
252b5132 880 }
468cced8
AM		 881
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer = start;
b34976b6 884 return FALSE;
252b5132
RH		 885}
886\f
887/* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
890
891/* Whether to do the special parsing. */
b34976b6 892static bfd_boolean cr_operand;
252b5132
RH		 893
894/* Names to recognize in a condition code. This table is sorted. */
895static const struct pd_reg cr_names[] =
896{
897 { "cr0", 0 },
898 { "cr1", 1 },
899 { "cr2", 2 },
900 { "cr3", 3 },
901 { "cr4", 4 },
902 { "cr5", 5 },
903 { "cr6", 6 },
904 { "cr7", 7 },
905 { "eq", 2 },
906 { "gt", 1 },
907 { "lt", 0 },
908 { "so", 3 },
909 { "un", 3 }
910};
911
912/* Parsing function. This returns non-zero if it recognized an
913 expression. */
914
915int
91d6fa6a 916ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 917{
918 int val;
919
920 if (! cr_operand)
921 return 0;
922
13abbae3
AM		 923 if (*name == '%')
924 ++name;
252b5132
RH		 925 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
926 name);
927 if (val < 0)
928 return 0;
929
91d6fa6a
NC		 930 exp->X_op = O_constant;
931 exp->X_add_number = val;
252b5132
RH		 932
933 return 1;
934}
935\f
936/* Local variables. */
937
2b3c4602
AM		 938/* Whether to target xcoff64/elf64. */
939static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 940
252b5132
RH		 941/* Opcode hash table. */
942static struct hash_control *ppc_hash;
943
944/* Macro hash table. */
945static struct hash_control *ppc_macro_hash;
946
947#ifdef OBJ_ELF
99a814a1 948/* What type of shared library support to use. */
5d6f4f16 949static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 950
99a814a1 951/* Flags to set in the elf header. */
252b5132
RH		 952static flagword ppc_flags = 0;
953
954/* Whether this is Solaris or not. */
955#ifdef TARGET_SOLARIS_COMMENT
b34976b6 956#define SOLARIS_P TRUE
252b5132 957#else
b34976b6 958#define SOLARIS_P FALSE
252b5132
RH		 959#endif
960
b34976b6 961static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 962#endif
963
964#ifdef OBJ_XCOFF
965
966/* The RS/6000 assembler uses the .csect pseudo-op to generate code
967 using a bunch of different sections. These assembler sections,
968 however, are all encompassed within the .text or .data sections of
969 the final output file. We handle this by using different
970 subsegments within these main segments. */
971
972/* Next subsegment to allocate within the .text segment. */
973static subsegT ppc_text_subsegment = 2;
974
975/* Linked list of csects in the text section. */
976static symbolS *ppc_text_csects;
977
978/* Next subsegment to allocate within the .data segment. */
979static subsegT ppc_data_subsegment = 2;
980
981/* Linked list of csects in the data section. */
982static symbolS *ppc_data_csects;
983
984/* The current csect. */
985static symbolS *ppc_current_csect;
986
987/* The RS/6000 assembler uses a TOC which holds addresses of functions
988 and variables. Symbols are put in the TOC with the .tc pseudo-op.
989 A special relocation is used when accessing TOC entries. We handle
990 the TOC as a subsegment within the .data segment. We set it up if
991 we see a .toc pseudo-op, and save the csect symbol here. */
992static symbolS *ppc_toc_csect;
993
994/* The first frag in the TOC subsegment. */
995static fragS *ppc_toc_frag;
996
997/* The first frag in the first subsegment after the TOC in the .data
998 segment. NULL if there are no subsegments after the TOC. */
999static fragS *ppc_after_toc_frag;
1000
1001/* The current static block. */
1002static symbolS *ppc_current_block;
1003
1004/* The COFF debugging section; set by md_begin. This is not the
1005 .debug section, but is instead the secret BFD section which will
1006 cause BFD to set the section number of a symbol to N_DEBUG. */
1007static asection *ppc_coff_debug_section;
1008
85645aed
TG		 1009/* Structure to set the length field of the dwarf sections. */
1010struct dw_subsection {
1011 /* Subsections are simply linked. */
1012 struct dw_subsection *link;
1013
1014 /* The subsection number. */
1015 subsegT subseg;
1016
1017 /* Expression to compute the length of the section. */
1018 expressionS end_exp;
1019};
1020
1021static struct dw_section {
1022 /* Corresponding section. */
1023 segT sect;
1024
1025 /* Simply linked list of subsections with a label. */
1026 struct dw_subsection *list_subseg;
1027
1028 /* The anonymous subsection. */
1029 struct dw_subsection *anon_subseg;
1030} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1031#endif /* OBJ_XCOFF */
1032
1033#ifdef TE_PE
1034
1035/* Various sections that we need for PE coff support. */
1036static segT ydata_section;
1037static segT pdata_section;
1038static segT reldata_section;
1039static segT rdata_section;
1040static segT tocdata_section;
1041
81d4177b 1042/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1043static segT ppc_previous_section;
1044static segT ppc_current_section;
1045
1046#endif /* TE_PE */
1047
1048#ifdef OBJ_ELF
1049symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1050#define PPC_APUINFO_ISEL 0x40
1051#define PPC_APUINFO_PMR 0x41
1052#define PPC_APUINFO_RFMCI 0x42
1053#define PPC_APUINFO_CACHELCK 0x43
1054#define PPC_APUINFO_SPE 0x100
1055#define PPC_APUINFO_EFS 0x101
1056#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1057#define PPC_APUINFO_VLE 0x104
6a0c61b7 1058
b34976b6
AM		 1059/*
1060 * We keep a list of APUinfo
6a0c61b7
EZ		 1061 */
1062unsigned long *ppc_apuinfo_list;
1063unsigned int ppc_apuinfo_num;
1064unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1065#endif /* OBJ_ELF */
1066\f
1067#ifdef OBJ_ELF
15c1449b 1068const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1069#else
15c1449b 1070const char *const md_shortopts = "um:";
252b5132 1071#endif
cef4f754 1072#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1073const struct option md_longopts[] = {
cef4f754 1074 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1075 {NULL, no_argument, NULL, 0}
1076};
15c1449b 1077const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1078
1079int
98027b10 1080md_parse_option (int c, char *arg)
252b5132 1081{
69fe9ce5
AM		 1082 ppc_cpu_t new_cpu;
1083
252b5132
RH		 1084 switch (c)
1085 {
1086 case 'u':
1087 /* -u means that any undefined symbols should be treated as
1088 external, which is the default for gas anyhow. */
1089 break;
1090
1091#ifdef OBJ_ELF
1092 case 'l':
1093 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1094 sake, recognize -be also. */
252b5132
RH		 1095 if (strcmp (arg, "e") == 0)
1096 {
1097 target_big_endian = 0;
1098 set_target_endian = 1;
b9c361e0 1099 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1100 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1101 }
1102 else
1103 return 0;
1104
1105 break;
1106
1107 case 'b':
1108 if (strcmp (arg, "e") == 0)
1109 {
1110 target_big_endian = 1;
1111 set_target_endian = 1;
1112 }
1113 else
1114 return 0;
1115
1116 break;
1117
1118 case 'K':
99a814a1 1119 /* Recognize -K PIC. */
252b5132
RH		 1120 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1121 {
1122 shlib = SHLIB_PIC;
1123 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1124 }
1125 else
1126 return 0;
1127
1128 break;
1129#endif
1130
7f6d05e8
CP		 1131 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1132 case 'a':
1133 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1134 {
1135#ifdef BFD64
1136 ppc_obj64 = 1;
d6ed37ed
AM		 1137 if (ppc_cpu & PPC_OPCODE_VLE)
1138 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1139#else
1140 as_fatal (_("%s unsupported"), "-a64");
1141#endif
1142 }
7f6d05e8 1143 else if (strcmp (arg, "32") == 0)
2b3c4602 1144 ppc_obj64 = 0;
7f6d05e8
CP		 1145 else
1146 return 0;
1147 break;
81d4177b 1148
252b5132 1149 case 'm':
776fc418 1150 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1151 if (new_cpu != 0)
1152 {
1153 ppc_cpu = new_cpu;
d6ed37ed
AM		 1154 if (strcmp (arg, "vle") == 0)
1155 {
1156 if (set_target_endian && target_big_endian == 0)
1157 as_bad (_("the use of -mvle requires big endian."));
1158 if (ppc_obj64)
1159 as_bad (_("the use of -mvle requires -a32."));
1160 }
b9c361e0 1161 }
252b5132
RH		 1162
1163 else if (strcmp (arg, "regnames") == 0)
b34976b6 1164 reg_names_p = TRUE;
252b5132
RH		 1165
1166 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1167 reg_names_p = FALSE;
252b5132
RH		 1168
1169#ifdef OBJ_ELF
99a814a1
AM		 1170 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1171 that require relocation. */
252b5132
RH		 1172 else if (strcmp (arg, "relocatable") == 0)
1173 {
5d6f4f16 1174 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1175 ppc_flags |= EF_PPC_RELOCATABLE;
1176 }
1177
1178 else if (strcmp (arg, "relocatable-lib") == 0)
1179 {
5d6f4f16 1180 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1181 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1182 }
1183
99a814a1 1184 /* -memb, set embedded bit. */
252b5132
RH		 1185 else if (strcmp (arg, "emb") == 0)
1186 ppc_flags |= EF_PPC_EMB;
1187
cc643b88 1188 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1189 else if (strcmp (arg, "little") == 0
1190 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1191 {
1192 target_big_endian = 0;
1193 set_target_endian = 1;
b9c361e0 1194 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1195 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1196 }
1197
1198 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1199 {
1200 target_big_endian = 1;
1201 set_target_endian = 1;
1202 }
1203
1204 else if (strcmp (arg, "solaris") == 0)
1205 {
b34976b6 1206 msolaris = TRUE;
252b5132
RH		 1207 ppc_comment_chars = ppc_solaris_comment_chars;
1208 }
1209
1210 else if (strcmp (arg, "no-solaris") == 0)
1211 {
b34976b6 1212 msolaris = FALSE;
252b5132
RH		 1213 ppc_comment_chars = ppc_eabi_comment_chars;
1214 }
1215#endif
1216 else
1217 {
1218 as_bad (_("invalid switch -m%s"), arg);
1219 return 0;
1220 }
1221 break;
1222
1223#ifdef OBJ_ELF
1224 /* -V: SVR4 argument to print version ID. */
1225 case 'V':
1226 print_version_id ();
1227 break;
1228
1229 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1230 should be emitted or not. FIXME: Not implemented. */
1231 case 'Q':
1232 break;
1233
1234 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1235 rather than .stabs.excl, which is ignored by the linker.
1236 FIXME: Not implemented. */
1237 case 's':
1238 if (arg)
1239 return 0;
1240
1241 break;
1242#endif
1243
cef4f754
AM		 1244 case OPTION_NOPS:
1245 {
1246 char *end;
1247 nop_limit = strtoul (optarg, &end, 0);
1248 if (*end)
1249 as_bad (_("--nops needs a numeric argument"));
1250 }
1251 break;
85645aed 1252
252b5132
RH		 1253 default:
1254 return 0;
1255 }
1256
1257 return 1;
1258}
1259
1260void
98027b10 1261md_show_usage (FILE *stream)
252b5132 1262{
bc805888 1263 fprintf (stream, _("\
252b5132 1264PowerPC options:\n\
ce3d2015
AM		 1265-a32 generate ELF32/XCOFF32\n\
1266-a64 generate ELF64/XCOFF64\n\
1267-u ignored\n\
1268-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1269-mpwr generate code for POWER (RIOS1)\n\
1270-m601 generate code for PowerPC 601\n\
418c1742 1271-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1272 generate code for PowerPC 603/604\n\
1273-m403 generate code for PowerPC 403\n\
1274-m405 generate code for PowerPC 405\n\
1275-m440 generate code for PowerPC 440\n\
1276-m464 generate code for PowerPC 464\n\
1277-m476 generate code for PowerPC 476\n\
f5c120c5 1278-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1279 generate code for PowerPC 7400/7410/7450/7455\n\
1280-m750cl generate code for PowerPC 750cl\n"));
df12615d 1281 fprintf (stream, _("\
ce3d2015
AM		 1282-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1283-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1284-mbooke generate code for 32-bit PowerPC BookE\n\
1285-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1286-mpower4, -mpwr4 generate code for Power4 architecture\n\
1287-mpower5, -mpwr5, -mpwr5x\n\
1288 generate code for Power5 architecture\n\
1289-mpower6, -mpwr6 generate code for Power6 architecture\n\
1290-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1291-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1292-mcell generate code for Cell Broadband Engine architecture\n\
1293-mcom generate code Power/PowerPC common instructions\n\
1294-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1295 fprintf (stream, _("\
ce3d2015
AM		 1296-maltivec generate code for AltiVec\n\
1297-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1298-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1299-me300 generate code for PowerPC e300 family\n\
1300-me500, -me500x2 generate code for Motorola e500 core complex\n\
1301-me500mc, generate code for Freescale e500mc core complex\n\
1302-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1303-me5500, generate code for Freescale e5500 core complex\n\
1304-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1305-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1306-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1307-mtitan generate code for AppliedMicro Titan core complex\n\
1308-mregnames Allow symbolic names for registers\n\
1309-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1310#ifdef OBJ_ELF
bc805888 1311 fprintf (stream, _("\
ce3d2015
AM		 1312-mrelocatable support for GCC's -mrelocatble option\n\
1313-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1314-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1315-mlittle, -mlittle-endian, -le\n\
ce3d2015 1316 generate code for a little endian machine\n\
b8b738ac 1317-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1318 generate code for a big endian machine\n\
1319-msolaris generate code for Solaris\n\
1320-mno-solaris do not generate code for Solaris\n\
b8b738ac 1321-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1322-V print assembler version number\n\
1323-Qy, -Qn ignored\n"));
252b5132 1324#endif
cef4f754
AM		 1325 fprintf (stream, _("\
1326-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1327}
1328\f
1329/* Set ppc_cpu if it is not already set. */
1330
1331static void
98027b10 1332ppc_set_cpu (void)
252b5132
RH		 1333{
1334 const char *default_os = TARGET_OS;
1335 const char *default_cpu = TARGET_CPU;
1336
7102e95e 1337 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1338 {
2a98c3a6 1339 if (ppc_obj64)
bdc70b4a 1340 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1341 else if (strncmp (default_os, "aix", 3) == 0
1342 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1343 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1344 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1345 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1346 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1347 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1348 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1349 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1350 else
d6ed37ed 1351 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1352 default_cpu, default_os);
252b5132
RH		 1353 }
1354}
1355
9232bbb0
AM		 1356/* Figure out the BFD architecture to use. This function and ppc_mach
1357 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1358
1359enum bfd_architecture
98027b10 1360ppc_arch (void)
252b5132
RH		 1361{
1362 const char *default_cpu = TARGET_CPU;
1363 ppc_set_cpu ();
1364
1365 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1366 return bfd_arch_powerpc;
b9c361e0
JL		 1367 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1368 return bfd_arch_powerpc;
1369 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1370 return bfd_arch_rs6000;
b9c361e0 1371 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1372 {
1373 if (strcmp (default_cpu, "rs6000") == 0)
1374 return bfd_arch_rs6000;
0baf16f2 1375 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1376 return bfd_arch_powerpc;
1377 }
1378
d6ed37ed 1379 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1380 return bfd_arch_unknown;
1381}
1382
7f6d05e8 1383unsigned long
98027b10 1384ppc_mach (void)
7f6d05e8 1385{
2a98c3a6
AM		 1386 if (ppc_obj64)
1387 return bfd_mach_ppc64;
1388 else if (ppc_arch () == bfd_arch_rs6000)
1389 return bfd_mach_rs6k;
ce3d2015
AM		 1390 else if (ppc_cpu & PPC_OPCODE_TITAN)
1391 return bfd_mach_ppc_titan;
b9c361e0
JL		 1392 else if (ppc_cpu & PPC_OPCODE_VLE)
1393 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1394 else
1395 return bfd_mach_ppc;
7f6d05e8
CP		 1396}
1397
81d4177b 1398extern char*
98027b10 1399ppc_target_format (void)
7f6d05e8
CP		 1400{
1401#ifdef OBJ_COFF
1402#ifdef TE_PE
99a814a1 1403 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1404#elif TE_POWERMAC
0baf16f2 1405 return "xcoff-powermac";
7f6d05e8 1406#else
eb1e0e80 1407# ifdef TE_AIX5
edc1d652 1408 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1409# else
edc1d652 1410 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1411# endif
7f6d05e8 1412#endif
7f6d05e8
CP		 1413#endif
1414#ifdef OBJ_ELF
edc1d652
AM		 1415# ifdef TE_FreeBSD
1416 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1417# elif defined (TE_VXWORKS)
9d8504b1
PB		 1418 return "elf32-powerpc-vxworks";
1419# else
0baf16f2 1420 return (target_big_endian
2b3c4602
AM		 1421 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1422 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1423# endif
7f6d05e8
CP		 1424#endif
1425}
1426
b9c361e0
JL		 1427/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1428 Return TRUE if there's a problem, otherwise FALSE. */
1429
1430static bfd_boolean
1431insn_validate (const struct powerpc_opcode *op)
1432{
1433 const unsigned char *o;
1434 unsigned long omask = op->mask;
1435
1436 /* The mask had better not trim off opcode bits. */
1437 if ((op->opcode & omask) != op->opcode)
1438 {
1439 as_bad (_("mask trims opcode bits for %s"), op->name);
1440 return TRUE;
1441 }
1442
1443 /* The operands must not overlap the opcode or each other. */
1444 for (o = op->operands; *o; ++o)
1445 {
1446 if (*o >= num_powerpc_operands)
1447 {
1448 as_bad (_("operand index error for %s"), op->name);
1449 return TRUE;
1450 }
1451 else
1452 {
1453 const struct powerpc_operand *operand = &powerpc_operands[*o];
1454 if (operand->shift != PPC_OPSHIFT_INV)
1455 {
1456 unsigned long mask;
1457
1458 if (operand->shift >= 0)
1459 mask = operand->bitm << operand->shift;
1460 else
1461 mask = operand->bitm >> -operand->shift;
1462 if (omask & mask)
1463 {
1464 as_bad (_("operand %d overlap in %s"),
1465 (int) (o - op->operands), op->name);
1466 return TRUE;
1467 }
1468 omask |= mask;
1469 }
1470 }
1471 }
1472 return FALSE;
1473}
1474
69c040df 1475/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1476 for .machine pseudo. */
252b5132 1477
69c040df
AM		 1478static void
1479ppc_setup_opcodes (void)
252b5132 1480{
98027b10 1481 const struct powerpc_opcode *op;
252b5132
RH		 1482 const struct powerpc_opcode *op_end;
1483 const struct powerpc_macro *macro;
1484 const struct powerpc_macro *macro_end;
b84bf58a 1485 bfd_boolean bad_insn = FALSE;
252b5132 1486
69c040df
AM		 1487 if (ppc_hash != NULL)
1488 hash_die (ppc_hash);
1489 if (ppc_macro_hash != NULL)
1490 hash_die (ppc_macro_hash);
252b5132
RH		 1491
1492 /* Insert the opcodes into a hash table. */
1493 ppc_hash = hash_new ();
1494
c43a438d 1495 if (ENABLE_CHECKING)
b84bf58a 1496 {
c43a438d 1497 unsigned int i;
b84bf58a 1498
3b8b57a9
AM		 1499 /* An index into powerpc_operands is stored in struct fix
1500 fx_pcrel_adjust which is 8 bits wide. */
1501 gas_assert (num_powerpc_operands < 256);
1502
c43a438d
AM		 1503 /* Check operand masks. Code here and in the disassembler assumes
1504 all the 1's in the mask are contiguous. */
1505 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1506 {
c43a438d
AM		 1507 unsigned long mask = powerpc_operands[i].bitm;
1508 unsigned long right_bit;
1509 unsigned int j;
1510
1511 right_bit = mask & -mask;
1512 mask += right_bit;
1513 right_bit = mask & -mask;
1514 if (mask != right_bit)
1515 {
1516 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1517 bad_insn = TRUE;
1518 }
1519 for (j = i + 1; j < num_powerpc_operands; ++j)
1520 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1521 sizeof (powerpc_operands[0])) == 0)
1522 {
1523 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1524 j, i);
1525 bad_insn = TRUE;
1526 }
b84bf58a
AM		 1527 }
1528 }
1529
252b5132
RH		 1530 op_end = powerpc_opcodes + powerpc_num_opcodes;
1531 for (op = powerpc_opcodes; op < op_end; op++)
1532 {
c43a438d 1533 if (ENABLE_CHECKING)
b84bf58a 1534 {
d815f1a9 1535 if (op != powerpc_opcodes)
8dbcd839 1536 {
b9c361e0
JL		 1537 int old_opcode = PPC_OP (op[-1].opcode);
1538 int new_opcode = PPC_OP (op[0].opcode);
1539
1540#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1541 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1542 op->name, (unsigned int) (op - powerpc_opcodes),
1543 (unsigned int) new_opcode, (unsigned int) op->opcode,
1544 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1545#endif
1546
d815f1a9
AM		 1547 /* The major opcodes had better be sorted. Code in the
1548 disassembler assumes the insns are sorted according to
1549 major opcode. */
b9c361e0 1550 if (new_opcode < old_opcode)
d815f1a9
AM		 1551 {
1552 as_bad (_("major opcode is not sorted for %s"),
1553 op->name);
1554 bad_insn = TRUE;
1555 }
8dbcd839 1556 }
b9c361e0
JL		 1557 bad_insn |= insn_validate (op);
1558 }
c43a438d 1559
b9c361e0
JL		 1560 if ((ppc_cpu & op->flags) != 0
1561 && !(ppc_cpu & op->deprecated))
1562 {
1563 const char *retval;
1564
1565 retval = hash_insert (ppc_hash, op->name, (void *) op);
1566 if (retval != NULL)
c43a438d 1567 {
b9c361e0 1568 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1569 op->name);
1570 bad_insn = TRUE;
1571 }
b9c361e0
JL		 1572 }
1573 }
c43a438d 1574
b9c361e0
JL		 1575 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1576 for (op = powerpc_opcodes; op < op_end; op++)
1577 hash_insert (ppc_hash, op->name, (void *) op);
1578
1579 op_end = vle_opcodes + vle_num_opcodes;
1580 for (op = vle_opcodes; op < op_end; op++)
1581 {
1582 if (ENABLE_CHECKING)
1583 {
1584 if (op != vle_opcodes)
1585 {
1586 unsigned old_seg, new_seg;
1587
1588 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1589 old_seg = VLE_OP_TO_SEG (old_seg);
1590 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1591 new_seg = VLE_OP_TO_SEG (new_seg);
1592
1593#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1594 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1595 op->name, (unsigned int) (op - powerpc_opcodes),
1596 (unsigned int) new_seg, (unsigned int) op->opcode,
1597 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1598#endif
1599 /* The major opcodes had better be sorted. Code in the
1600 disassembler assumes the insns are sorted according to
1601 major opcode. */
1602 if (new_seg < old_seg)
1603 {
1604 as_bad (_("major opcode is not sorted for %s"),
1605 op->name);
1606 bad_insn = TRUE;
1607 }
1608 }
1609
1610 bad_insn |= insn_validate (op);
c43a438d 1611 }
252b5132 1612
bdc70b4a 1613 if ((ppc_cpu & op->flags) != 0
1cb0a767 1614 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1615 {
1616 const char *retval;
1617
98027b10 1618 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1619 if (retval != NULL)
252b5132 1620 {
b84bf58a 1621 as_bad (_("duplicate instruction %s"),
99a814a1 1622 op->name);
b84bf58a 1623 bad_insn = TRUE;
252b5132
RH		 1624 }
1625 }
1626 }
1627
b9c361e0
JL		 1628 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1629 for (op = vle_opcodes; op < op_end; op++)
98027b10 1630 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1631
252b5132
RH		 1632 /* Insert the macros into a hash table. */
1633 ppc_macro_hash = hash_new ();
1634
1635 macro_end = powerpc_macros + powerpc_num_macros;
1636 for (macro = powerpc_macros; macro < macro_end; macro++)
1637 {
33740db9 1638 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1639 {
1640 const char *retval;
1641
98027b10 1642 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1643 if (retval != (const char *) NULL)
1644 {
b84bf58a
AM		 1645 as_bad (_("duplicate macro %s"), macro->name);
1646 bad_insn = TRUE;
252b5132
RH		 1647 }
1648 }
1649 }
1650
b84bf58a 1651 if (bad_insn)
252b5132 1652 abort ();
69c040df
AM		 1653}
1654
1655/* This function is called when the assembler starts up. It is called
1656 after the options have been parsed and the output file has been
1657 opened. */
1658
1659void
98027b10 1660md_begin (void)
69c040df
AM		 1661{
1662 ppc_set_cpu ();
1663
1664 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1665 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1666
1667#ifdef OBJ_ELF
1668 /* Set the ELF flags if desired. */
1669 if (ppc_flags && !msolaris)
1670 bfd_set_private_flags (stdoutput, ppc_flags);
1671#endif
1672
1673 ppc_setup_opcodes ();
252b5132 1674
67c1ffbe 1675 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1676 by the user. */
252b5132
RH		 1677 if (!set_target_endian)
1678 {
1679 set_target_endian = 1;
1680 target_big_endian = PPC_BIG_ENDIAN;
1681 }
1682
1683#ifdef OBJ_XCOFF
1684 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1685
1686 /* Create dummy symbols to serve as initial csects. This forces the
1687 text csects to precede the data csects. These symbols will not
1688 be output. */
1689 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1690 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1691 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1692 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1693#endif
1694
1695#ifdef TE_PE
1696
1697 ppc_current_section = text_section;
81d4177b 1698 ppc_previous_section = 0;
252b5132
RH		 1699
1700#endif
1701}
1702
6a0c61b7 1703void
98027b10 1704ppc_cleanup (void)
6a0c61b7 1705{
dc1d03fc 1706#ifdef OBJ_ELF
6a0c61b7
EZ		 1707 if (ppc_apuinfo_list == NULL)
1708 return;
1709
1710 /* Ok, so write the section info out. We have this layout:
1711
1712 byte data what
1713 ---- ---- ----
1714 0 8 length of "APUinfo\0"
1715 4 (n*4) number of APU's (4 bytes each)
1716 8 2 note type 2
1717 12 "APUinfo\0" name
1718 20 APU#1 first APU's info
1719 24 APU#2 second APU's info
1720 ... ...
1721 */
1722 {
1723 char *p;
1724 asection *seg = now_seg;
1725 subsegT subseg = now_subseg;
1726 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1727 unsigned int i;
6a0c61b7
EZ		 1728
1729 /* Create the .PPC.EMB.apuinfo section. */
1730 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1731 bfd_set_section_flags (stdoutput,
1732 apuinfo_secp,
e1a9cb8e 1733 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1734
1735 p = frag_more (4);
1736 md_number_to_chars (p, (valueT) 8, 4);
1737
1738 p = frag_more (4);
e98d298c 1739 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1740
1741 p = frag_more (4);
1742 md_number_to_chars (p, (valueT) 2, 4);
1743
1744 p = frag_more (8);
1745 strcpy (p, "APUinfo");
1746
1747 for (i = 0; i < ppc_apuinfo_num; i++)
1748 {
b34976b6
AM		 1749 p = frag_more (4);
1750 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1751 }
1752
1753 frag_align (2, 0, 0);
1754
1755 /* We probably can't restore the current segment, for there likely
1756 isn't one yet... */
1757 if (seg && subseg)
1758 subseg_set (seg, subseg);
1759 }
dc1d03fc 1760#endif
6a0c61b7
EZ		 1761}
1762
252b5132
RH		 1763/* Insert an operand value into an instruction. */
1764
1765static unsigned long
a1867a27
AM		 1766ppc_insert_operand (unsigned long insn,
1767 const struct powerpc_operand *operand,
1768 offsetT val,
91d6fa6a 1769 ppc_cpu_t cpu,
a1867a27
AM		 1770 char *file,
1771 unsigned int line)
252b5132 1772{
b84bf58a 1773 long min, max, right;
eb42fac1 1774
b84bf58a
AM		 1775 max = operand->bitm;
1776 right = max & -max;
1777 min = 0;
1778
1779 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1780 {
b84bf58a 1781 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1782 max = (max >> 1) & -right;
1783 min = ~max & -right;
b84bf58a 1784 }
252b5132 1785
b84bf58a 1786 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1787 max++;
252b5132 1788
b84bf58a 1789 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1790 {
1791 long tmp = min;
1792 min = -max;
1793 max = -tmp;
1794 }
b84bf58a 1795
a1867a27
AM		 1796 if (min <= max)
1797 {
1798 /* Some people write constants with the sign extension done by
1799 hand but only up to 32 bits. This shouldn't really be valid,
1800 but, to permit this code to assemble on a 64-bit host, we
1801 sign extend the 32-bit value to 64 bits if so doing makes the
1802 value valid. */
1803 if (val > max
1804 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1805 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1806 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1807 val = val - 0x80000000 - 0x80000000;
1808
1809 /* Similarly, people write expressions like ~(1<<15), and expect
1810 this to be OK for a 32-bit unsigned value. */
1811 else if (val < min
1812 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1813 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1814 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1815 val = val + 0x80000000 + 0x80000000;
1816
1817 else if (val < min
1818 || val > max
1819 || (val & (right - 1)) != 0)
1820 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1821 }
b84bf58a 1822
252b5132
RH		 1823 if (operand->insert)
1824 {
1825 const char *errmsg;
1826
1827 errmsg = NULL;
91d6fa6a 1828 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1829 if (errmsg != (const char *) NULL)
ee2c9aa9 1830 as_bad_where (file, line, "%s", errmsg);
252b5132 1831 }
b9c361e0 1832 else if (operand->shift >= 0)
b84bf58a 1833 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1834 else
1835 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1836
1837 return insn;
1838}
1839
1840\f
1841#ifdef OBJ_ELF
1842/* Parse @got, etc. and return the desired relocation. */
1843static bfd_reloc_code_real_type
98027b10 1844ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1845{
1846 struct map_bfd {
1847 char *string;
b7d7dc63
AM		 1848 unsigned int length : 8;
1849 unsigned int valid32 : 1;
1850 unsigned int valid64 : 1;
1851 unsigned int reloc;
252b5132
RH		 1852 };
1853
1854 char ident[20];
1855 char *str = *str_p;
1856 char *str2;
1857 int ch;
1858 int len;
15c1449b 1859 const struct map_bfd *ptr;
252b5132 1860
b7d7dc63
AM		 1861#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1862#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1863#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1864
15c1449b 1865 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1866 MAP ("l", BFD_RELOC_LO16),
1867 MAP ("h", BFD_RELOC_HI16),
1868 MAP ("ha", BFD_RELOC_HI16_S),
1869 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1870 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1871 MAP ("got", BFD_RELOC_16_GOTOFF),
1872 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1873 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1874 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1875 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1876 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1877 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1878 MAP ("copy", BFD_RELOC_PPC_COPY),
1879 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1880 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1881 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1882 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1883 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1884 MAP ("tls", BFD_RELOC_PPC_TLS),
1885 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1886 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1887 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1888 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1889 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1890 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1891 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1892 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1893 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1894 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1895 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1896 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1897 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1898 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1899 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1900 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1901 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1902 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1903 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1904 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1905 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1906 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1907 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1908 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1909 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1910 MAP32 ("fixup", BFD_RELOC_CTOR),
1911 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1912 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1913 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1914 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1915 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1916 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1917 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1918 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1919 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1920 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1921 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1922 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1923 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1924 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1925 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1926 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1927 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1928 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1929 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1930 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1931 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1932 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1933 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1934 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1935 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1936 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1937 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1938 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1939 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1940 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1941 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1942 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1943 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1944 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1945 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1946 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1947 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1948 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1949 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1950 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1951 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1952 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1953 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1954 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
f9c6b907
AM		 1955 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1956 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1957 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1958 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1959 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1960 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1961 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1962 };
1963
1964 if (*str++ != '@')
1965 return BFD_RELOC_UNUSED;
1966
1967 for (ch = *str, str2 = ident;
1968 (str2 < ident + sizeof (ident) - 1
3882b010 1969 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1970 ch = *++str)
1971 {
3882b010 1972 *str2++ = TOLOWER (ch);
252b5132
RH		 1973 }
1974
1975 *str2 = '\0';
1976 len = str2 - ident;
1977
1978 ch = ident[0];
1979 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1980 if (ch == ptr->string[0]
1981 && len == ptr->length
b7d7dc63
AM		 1982 && memcmp (ident, ptr->string, ptr->length) == 0
1983 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1984 {
15c1449b
AM		 1985 int reloc = ptr->reloc;
1986
727fc41e
AM		 1987 if (!ppc_obj64 && exp_p->X_add_number != 0)
1988 {
1989 switch (reloc)
1990 {
1991 case BFD_RELOC_16_GOTOFF:
1992 case BFD_RELOC_LO16_GOTOFF:
1993 case BFD_RELOC_HI16_GOTOFF:
1994 case BFD_RELOC_HI16_S_GOTOFF:
1995 as_warn (_("identifier+constant@got means "
1996 "identifier@got+constant"));
1997 break;
1998
1999 case BFD_RELOC_PPC_GOT_TLSGD16:
2000 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2001 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2002 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2003 case BFD_RELOC_PPC_GOT_TLSLD16:
2004 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2005 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2006 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2007 case BFD_RELOC_PPC_GOT_DTPREL16:
2008 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2009 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2010 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2011 case BFD_RELOC_PPC_GOT_TPREL16:
2012 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2013 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2014 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2015 as_bad (_("symbol+offset not supported for got tls"));
2016 break;
2017 }
2018 }
5f6db75a
AM		 2019
2020 /* Now check for identifier@suffix+constant. */
2021 if (*str == '-' || *str == '+')
252b5132 2022 {
5f6db75a
AM		 2023 char *orig_line = input_line_pointer;
2024 expressionS new_exp;
2025
2026 input_line_pointer = str;
2027 expression (&new_exp);
2028 if (new_exp.X_op == O_constant)
252b5132 2029 {
5f6db75a
AM		 2030 exp_p->X_add_number += new_exp.X_add_number;
2031 str = input_line_pointer;
252b5132 2032 }
5f6db75a
AM		 2033
2034 if (&input_line_pointer != str_p)
2035 input_line_pointer = orig_line;
252b5132 2036 }
252b5132 2037 *str_p = str;
0baf16f2 2038
2b3c4602 2039 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2040 && exp_p->X_op == O_symbol
2041 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2042 {
9f2b53d7
AM		 2043 /* Change the symbol so that the dummy .TOC. symbol can be
2044 omitted from the object file. */
0baf16f2
AM		 2045 exp_p->X_add_symbol = &abs_symbol;
2046 }
2047
15c1449b 2048 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2049 }
2050
2051 return BFD_RELOC_UNUSED;
2052}
2053
99a814a1
AM		 2054/* Like normal .long/.short/.word, except support @got, etc.
2055 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2056static void
98027b10 2057ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2058{
2059 expressionS exp;
2060 bfd_reloc_code_real_type reloc;
2061
2062 if (is_it_end_of_statement ())
2063 {
2064 demand_empty_rest_of_line ();
2065 return;
2066 }
2067
2068 do
2069 {
2070 expression (&exp);
27285eed 2071 if (*input_line_pointer == '@'
99a814a1
AM		 2072 && (reloc = ppc_elf_suffix (&input_line_pointer,
2073 &exp)) != BFD_RELOC_UNUSED)
252b5132 2074 {
99a814a1
AM		 2075 reloc_howto_type *reloc_howto;
2076 int size;
2077
2078 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2079 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2080
2081 if (size > nbytes)
0baf16f2
AM		 2082 {
2083 as_bad (_("%s relocations do not fit in %d bytes\n"),
2084 reloc_howto->name, nbytes);
2085 }
252b5132
RH		 2086 else
2087 {
0baf16f2
AM		 2088 char *p;
2089 int offset;
252b5132 2090
0baf16f2 2091 p = frag_more (nbytes);
aa0c8c1a 2092 memset (p, 0, nbytes);
0baf16f2
AM		 2093 offset = 0;
2094 if (target_big_endian)
2095 offset = nbytes - size;
99a814a1
AM		 2096 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2097 &exp, 0, reloc);
252b5132
RH		 2098 }
2099 }
2100 else
2101 emit_expr (&exp, (unsigned int) nbytes);
2102 }
2103 while (*input_line_pointer++ == ',');
2104
99a814a1
AM		 2105 /* Put terminator back into stream. */
2106 input_line_pointer--;
252b5132
RH		 2107 demand_empty_rest_of_line ();
2108}
2109
2110/* Solaris pseduo op to change to the .rodata section. */
2111static void
98027b10 2112ppc_elf_rdata (int xxx)
252b5132
RH		 2113{
2114 char *save_line = input_line_pointer;
2115 static char section[] = ".rodata\n";
2116
99a814a1 2117 /* Just pretend this is .section .rodata */
252b5132
RH		 2118 input_line_pointer = section;
2119 obj_elf_section (xxx);
2120
2121 input_line_pointer = save_line;
2122}
2123
99a814a1 2124/* Pseudo op to make file scope bss items. */
252b5132 2125static void
98027b10 2126ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2127{
98027b10
AM		 2128 char *name;
2129 char c;
2130 char *p;
252b5132 2131 offsetT size;
98027b10 2132 symbolS *symbolP;
252b5132
RH		 2133 offsetT align;
2134 segT old_sec;
2135 int old_subsec;
2136 char *pfrag;
2137 int align2;
2138
2139 name = input_line_pointer;
2140 c = get_symbol_end ();
2141
99a814a1 2142 /* just after name is now '\0'. */
252b5132
RH		 2143 p = input_line_pointer;
2144 *p = c;
2145 SKIP_WHITESPACE ();
2146 if (*input_line_pointer != ',')
2147 {
d6ed37ed 2148 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2149 ignore_rest_of_line ();
2150 return;
2151 }
2152
2153 input_line_pointer++; /* skip ',' */
2154 if ((size = get_absolute_expression ()) < 0)
2155 {
2156 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2157 ignore_rest_of_line ();
2158 return;
2159 }
2160
2161 /* The third argument to .lcomm is the alignment. */
2162 if (*input_line_pointer != ',')
2163 align = 8;
2164 else
2165 {
2166 ++input_line_pointer;
2167 align = get_absolute_expression ();
2168 if (align <= 0)
2169 {
2170 as_warn (_("ignoring bad alignment"));
2171 align = 8;
2172 }
2173 }
2174
2175 *p = 0;
2176 symbolP = symbol_find_or_make (name);
2177 *p = c;
2178
2179 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2180 {
d6ed37ed 2181 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2182 S_GET_NAME (symbolP));
2183 ignore_rest_of_line ();
2184 return;
2185 }
2186
2187 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2188 {
d6ed37ed 2189 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2190 S_GET_NAME (symbolP),
2191 (long) S_GET_VALUE (symbolP),
2192 (long) size);
2193
2194 ignore_rest_of_line ();
2195 return;
2196 }
2197
99a814a1 2198 /* Allocate_bss. */
252b5132
RH		 2199 old_sec = now_seg;
2200 old_subsec = now_subseg;
2201 if (align)
2202 {
99a814a1 2203 /* Convert to a power of 2 alignment. */
252b5132
RH		 2204 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2205 if (align != 1)
2206 {
d6ed37ed 2207 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2208 ignore_rest_of_line ();
2209 return;
2210 }
2211 }
2212 else
2213 align2 = 0;
2214
2215 record_alignment (bss_section, align2);
cbe02d4f 2216 subseg_set (bss_section, 1);
252b5132
RH		 2217 if (align2)
2218 frag_align (align2, 0, 0);
2219 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2220 symbol_get_frag (symbolP)->fr_symbol = 0;
2221 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2222 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2223 (char *) 0);
2224 *pfrag = 0;
2225 S_SET_SIZE (symbolP, size);
2226 S_SET_SEGMENT (symbolP, bss_section);
2227 subseg_set (old_sec, old_subsec);
2228 demand_empty_rest_of_line ();
2229}
2230
6911b7dc
AM		 2231/* Pseudo op to set symbol local entry point. */
2232static void
2233ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2234{
2235 char *name = input_line_pointer;
2236 char c = get_symbol_end ();
2237 char *p;
2238 expressionS exp;
2239 symbolS *sym;
2240 asymbol *bfdsym;
2241 elf_symbol_type *elfsym;
2242
2243 p = input_line_pointer;
2244 *p = c;
2245 SKIP_WHITESPACE ();
2246 if (*input_line_pointer != ',')
2247 {
2248 *p = 0;
2249 as_bad (_("expected comma after name `%s' in .localentry directive"),
2250 name);
2251 *p = c;
2252 ignore_rest_of_line ();
2253 return;
2254 }
2255 input_line_pointer++;
2256 expression (&exp);
2257 if (exp.X_op == O_absent)
2258 {
2259 as_bad (_("missing expression in .localentry directive"));
2260 exp.X_op = O_constant;
2261 exp.X_add_number = 0;
2262 }
2263 *p = 0;
2264 sym = symbol_find_or_make (name);
2265 *p = c;
2266
2267 if (resolve_expression (&exp)
2268 && exp.X_op == O_constant)
2269 {
2270 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2271
e2b5892e 2272 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2273 as_bad (_(".localentry expression for `%s' "
2274 "is not a valid power of 2"), S_GET_NAME (sym));
2275 else
2276 {
2277 bfdsym = symbol_get_bfdsym (sym);
2278 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2279 gas_assert (elfsym);
2280 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2281 elfsym->internal_elf_sym.st_other |= encoded;
2282 if (ppc_abiversion == 0)
2283 ppc_abiversion = 2;
2284 }
2285 }
2286 else
2287 as_bad (_(".localentry expression for `%s' "
2288 "does not evaluate to a constant"), S_GET_NAME (sym));
2289
2290 demand_empty_rest_of_line ();
2291}
2292
ee67d69a
AM		 2293/* Pseudo op to set ABI version. */
2294static void
2295ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2296{
2297 expressionS exp;
2298
2299 expression (&exp);
2300 if (exp.X_op == O_absent)
2301 {
2302 as_bad (_("missing expression in .abiversion directive"));
2303 exp.X_op = O_constant;
2304 exp.X_add_number = 0;
2305 }
2306
2307 if (resolve_expression (&exp)
2308 && exp.X_op == O_constant)
2309 ppc_abiversion = exp.X_add_number;
2310 else
2311 as_bad (_(".abiversion expression does not evaluate to a constant"));
2312 demand_empty_rest_of_line ();
2313}
2314
2315/* Set ABI version in output file. */
2316void
2317ppc_elf_end (void)
2318{
2319 if (ppc_obj64 && ppc_abiversion != 0)
2320 {
2321 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2322 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2323 }
2324}
2325
252b5132
RH		 2326/* Validate any relocations emitted for -mrelocatable, possibly adding
2327 fixups for word relocations in writable segments, so we can adjust
2328 them at runtime. */
2329static void
98027b10 2330ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2331{
2332 if (fixp->fx_done || fixp->fx_pcrel)
2333 return;
2334
2335 switch (shlib)
2336 {
2337 case SHLIB_NONE:
2338 case SHLIB_PIC:
2339 return;
2340
5d6f4f16 2341 case SHLIB_MRELOCATABLE:
252b5132
RH		 2342 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2343 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2344 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2345 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2346 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2347 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2348 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2349 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2350 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2351 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2352 && strcmp (segment_name (seg), ".got2") != 0
2353 && strcmp (segment_name (seg), ".dtors") != 0
2354 && strcmp (segment_name (seg), ".ctors") != 0
2355 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2356 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2357 && strcmp (segment_name (seg), ".eh_frame") != 0
2358 && strcmp (segment_name (seg), ".ex_shared") != 0)
2359 {
2360 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2361 || fixp->fx_r_type != BFD_RELOC_CTOR)
2362 {
2363 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2364 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2365 }
2366 }
2367 return;
2368 }
2369}
0baf16f2 2370
7e8d4ab4
AM		 2371/* Prevent elf_frob_file_before_adjust removing a weak undefined
2372 function descriptor sym if the corresponding code sym is used. */
2373
2374void
98027b10 2375ppc_frob_file_before_adjust (void)
0baf16f2 2376{
7e8d4ab4 2377 symbolS *symp;
9232bbb0 2378 asection *toc;
0baf16f2 2379
7e8d4ab4
AM		 2380 if (!ppc_obj64)
2381 return;
2382
2383 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2384 {
7e8d4ab4
AM		 2385 const char *name;
2386 char *dotname;
2387 symbolS *dotsym;
2388 size_t len;
2389
2390 name = S_GET_NAME (symp);
2391 if (name[0] == '.')
2392 continue;
2393
2394 if (! S_IS_WEAK (symp)
2395 || S_IS_DEFINED (symp))
2396 continue;
2397
2398 len = strlen (name) + 1;
2399 dotname = xmalloc (len + 1);
2400 dotname[0] = '.';
2401 memcpy (dotname + 1, name, len);
461b725f 2402 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2403 free (dotname);
2404 if (dotsym != NULL && (symbol_used_p (dotsym)
2405 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2406 symbol_mark_used (symp);
2407
0baf16f2
AM		 2408 }
2409
9232bbb0
AM		 2410 toc = bfd_get_section_by_name (stdoutput, ".toc");
2411 if (toc != NULL
01efc3af 2412 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2413 && bfd_section_size (stdoutput, toc) > 0x10000)
2414 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2415}
2416
2417/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2418 emitted. Other uses of .TOC. will cause the symbol to be marked
2419 with BSF_KEEP in md_apply_fix. */
9232bbb0 2420
a38a07e0
AM		 2421void
2422ppc_elf_adjust_symtab (void)
2423{
2424 if (ppc_obj64)
2425 {
2426 symbolS *symp;
2427 symp = symbol_find (".TOC.");
2428 if (symp != NULL)
2429 {
2430 asymbol *bsym = symbol_get_bfdsym (symp);
2431 if ((bsym->flags & BSF_KEEP) == 0)
2432 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2433 }
2434 }
0baf16f2 2435}
252b5132
RH		 2436#endif /* OBJ_ELF */
2437\f
2438#ifdef TE_PE
2439
2440/*
99a814a1 2441 * Summary of parse_toc_entry.
252b5132
RH		 2442 *
2443 * in: Input_line_pointer points to the '[' in one of:
2444 *
2445 * [toc] [tocv] [toc32] [toc64]
2446 *
2447 * Anything else is an error of one kind or another.
2448 *
81d4177b 2449 * out:
252b5132
RH		 2450 * return value: success or failure
2451 * toc_kind: kind of toc reference
2452 * input_line_pointer:
2453 * success: first char after the ']'
2454 * failure: unchanged
2455 *
2456 * settings:
2457 *
2458 * [toc] - rv == success, toc_kind = default_toc
2459 * [tocv] - rv == success, toc_kind = data_in_toc
2460 * [toc32] - rv == success, toc_kind = must_be_32
2461 * [toc64] - rv == success, toc_kind = must_be_64
2462 *
2463 */
2464
81d4177b
KH		 2465enum toc_size_qualifier
2466{
252b5132
RH		 2467 default_toc, /* The toc cell constructed should be the system default size */
2468 data_in_toc, /* This is a direct reference to a toc cell */
2469 must_be_32, /* The toc cell constructed must be 32 bits wide */
2470 must_be_64 /* The toc cell constructed must be 64 bits wide */
2471};
2472
2473static int
98027b10 2474parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2475{
2476 char *start;
2477 char *toc_spec;
2478 char c;
2479 enum toc_size_qualifier t;
2480
99a814a1 2481 /* Save the input_line_pointer. */
252b5132
RH		 2482 start = input_line_pointer;
2483
99a814a1 2484 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2485 ++input_line_pointer;
2486 SKIP_WHITESPACE ();
81d4177b 2487
99a814a1 2488 /* Find the spelling of the operand. */
252b5132
RH		 2489 toc_spec = input_line_pointer;
2490 c = get_symbol_end ();
2491
99a814a1 2492 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2493 {
2494 t = default_toc;
2495 }
99a814a1 2496 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2497 {
2498 t = data_in_toc;
2499 }
99a814a1 2500 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2501 {
2502 t = must_be_32;
2503 }
99a814a1 2504 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2505 {
2506 t = must_be_64;
2507 }
2508 else
2509 {
2510 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2511 *input_line_pointer = c;
2512 input_line_pointer = start;
252b5132
RH		 2513 return 0;
2514 }
2515
99a814a1
AM		 2516 /* Now find the ']'. */
2517 *input_line_pointer = c;
252b5132 2518
81d4177b
KH		 2519 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2520 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2521
2522 if (c != ']')
2523 {
2524 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2525 input_line_pointer = start;
252b5132
RH		 2526 return 0;
2527 }
2528
99a814a1 2529 *toc_kind = t;
252b5132
RH		 2530 return 1;
2531}
2532#endif
3b8b57a9
AM		 2533
2534#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2535/* See whether a symbol is in the TOC section. */
2536
2537static int
2538ppc_is_toc_sym (symbolS *sym)
2539{
2540#ifdef OBJ_XCOFF
9f6e76f4
TG		 2541 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2542 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
3b8b57a9
AM		 2543#endif
2544#ifdef OBJ_ELF
2545 const char *sname = segment_name (S_GET_SEGMENT (sym));
2546 if (ppc_obj64)
2547 return strcmp (sname, ".toc") == 0;
2548 else
2549 return strcmp (sname, ".got") == 0;
2550#endif
2551}
2552#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2553\f
2554
dc1d03fc 2555#ifdef OBJ_ELF
6a0c61b7
EZ		 2556#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2557static void
98027b10 2558ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2559{
2560 unsigned int i;
2561
2562 /* Check we don't already exist. */
2563 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2564 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2565 return;
b34976b6 2566
6a0c61b7
EZ		 2567 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2568 {
2569 if (ppc_apuinfo_num_alloc == 0)
2570 {
2571 ppc_apuinfo_num_alloc = 4;
2572 ppc_apuinfo_list = (unsigned long *)
2573 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2574 }
2575 else
2576 {
2577 ppc_apuinfo_num_alloc += 4;
2578 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2579 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2580 }
2581 }
dc1d03fc 2582 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2583}
2584#undef APUID
dc1d03fc 2585#endif
6a0c61b7
EZ		 2586\f
2587
252b5132
RH		 2588/* We need to keep a list of fixups. We can't simply generate them as
2589 we go, because that would require us to first create the frag, and
2590 that would screw up references to ``.''. */
2591
2592struct ppc_fixup
2593{
2594 expressionS exp;
2595 int opindex;
2596 bfd_reloc_code_real_type reloc;
2597};
2598
2599#define MAX_INSN_FIXUPS (5)
2600
b9c361e0
JL		 2601/* Form I16L. */
2602#define E_OR2I_INSN 0x7000C000
2603#define E_AND2I_DOT_INSN 0x7000C800
2604#define E_OR2IS_INSN 0x7000D000
2605#define E_LIS_INSN 0x7000E000
2606#define E_AND2IS_DOT_INSN 0x7000E800
2607
2608/* Form I16A. */
2609#define E_ADD2I_DOT_INSN 0x70008800
2610#define E_ADD2IS_INSN 0x70009000
2611#define E_CMP16I_INSN 0x70009800
2612#define E_MULL2I_INSN 0x7000A000
2613#define E_CMPL16I_INSN 0x7000A800
2614#define E_CMPH16I_INSN 0x7000B000
2615#define E_CMPHL16I_INSN 0x7000B800
2616
252b5132
RH		 2617/* This routine is called for each instruction to be assembled. */
2618
2619void
98027b10 2620md_assemble (char *str)
252b5132
RH		 2621{
2622 char *s;
2623 const struct powerpc_opcode *opcode;
2624 unsigned long insn;
2625 const unsigned char *opindex_ptr;
2626 int skip_optional;
2627 int need_paren;
2628 int next_opindex;
2629 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2630 int fc;
2631 char *f;
09b935ac 2632 int addr_mod;
252b5132 2633 int i;
b9c361e0 2634 unsigned int insn_length;
252b5132
RH		 2635
2636 /* Get the opcode. */
3882b010 2637 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2638 ;
2639 if (*s != '\0')
2640 *s++ = '\0';
2641
2642 /* Look up the opcode in the hash table. */
2643 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2644 if (opcode == (const struct powerpc_opcode *) NULL)
2645 {
2646 const struct powerpc_macro *macro;
2647
2648 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2649 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2650 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2651 else
2652 ppc_macro (s, macro);
2653
2654 return;
2655 }
2656
2657 insn = opcode->opcode;
2658
2659 str = s;
3882b010 2660 while (ISSPACE (*str))
252b5132
RH		 2661 ++str;
2662
2663 /* PowerPC operands are just expressions. The only real issue is
2664 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2665 an optional operand separate the operands only with commas (in some
2666 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2667 have optional operands). Most instructions with optional operands
2668 have only one. Those that have more than one optional operand can
2669 take either all their operands or none. So, before we start seriously
2670 parsing the operands, we check to see if we have optional operands,
2671 and if we do, we count the number of commas to see which operands
2672 have been omitted. */
252b5132
RH		 2673 skip_optional = 0;
2674 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2675 {
2676 const struct powerpc_operand *operand;
2677
2678 operand = &powerpc_operands[*opindex_ptr];
2679 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2680 {
2681 unsigned int opcount;
7fe9cf6b 2682 unsigned int num_operands_expected;
252b5132
RH		 2683
2684 /* There is an optional operand. Count the number of
2685 commas in the input line. */
2686 if (*str == '\0')
2687 opcount = 0;
2688 else
2689 {
2690 opcount = 1;
2691 s = str;
2692 while ((s = strchr (s, ',')) != (char *) NULL)
2693 {
2694 ++opcount;
2695 ++s;
2696 }
2697 }
2698
7fe9cf6b
NC		 2699 /* Compute the number of expected operands.
2700 Do not count fake operands. */
2701 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2702 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2703 ++ num_operands_expected;
2704
252b5132
RH		 2705 /* If there are fewer operands in the line then are called
2706 for by the instruction, we want to skip the optional
1f6c9eb0 2707 operands. */
7fe9cf6b 2708 if (opcount < num_operands_expected)
252b5132
RH		 2709 skip_optional = 1;
2710
2711 break;
2712 }
2713 }
2714
2715 /* Gather the operands. */
2716 need_paren = 0;
2717 next_opindex = 0;
2718 fc = 0;
2719 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2720 {
2721 const struct powerpc_operand *operand;
2722 const char *errmsg;
2723 char *hold;
2724 expressionS ex;
2725 char endc;
2726
2727 if (next_opindex == 0)
2728 operand = &powerpc_operands[*opindex_ptr];
2729 else
2730 {
2731 operand = &powerpc_operands[next_opindex];
2732 next_opindex = 0;
2733 }
252b5132
RH		 2734 errmsg = NULL;
2735
2736 /* If this is a fake operand, then we do not expect anything
2737 from the input. */
2738 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2739 {
2b3c4602 2740 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2741 if (errmsg != (const char *) NULL)
ee2c9aa9 2742 as_bad ("%s", errmsg);
252b5132
RH		 2743 continue;
2744 }
2745
2746 /* If this is an optional operand, and we are skipping it, just
2747 insert a zero. */
2748 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2749 && skip_optional)
2750 {
2751 if (operand->insert)
2752 {
2b3c4602 2753 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2754 if (errmsg != (const char *) NULL)
ee2c9aa9 2755 as_bad ("%s", errmsg);
252b5132
RH		 2756 }
2757 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2758 next_opindex = *opindex_ptr + 1;
2759 continue;
2760 }
2761
2762 /* Gather the operand. */
2763 hold = input_line_pointer;
2764 input_line_pointer = str;
2765
2766#ifdef TE_PE
81d4177b 2767 if (*input_line_pointer == '[')
252b5132
RH		 2768 {
2769 /* We are expecting something like the second argument here:
99a814a1
AM		 2770 *
2771 * lwz r4,[toc].GS.0.static_int(rtoc)
2772 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2773 * The argument following the `]' must be a symbol name, and the
2774 * register must be the toc register: 'rtoc' or '2'
2775 *
2776 * The effect is to 0 as the displacement field
2777 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2778 * the appropriate variation) reloc against it based on the symbol.
2779 * The linker will build the toc, and insert the resolved toc offset.
2780 *
2781 * Note:
2782 * o The size of the toc entry is currently assumed to be
2783 * 32 bits. This should not be assumed to be a hard coded
2784 * number.
2785 * o In an effort to cope with a change from 32 to 64 bits,
2786 * there are also toc entries that are specified to be
2787 * either 32 or 64 bits:
2788 * lwz r4,[toc32].GS.0.static_int(rtoc)
2789 * lwz r4,[toc64].GS.0.static_int(rtoc)
2790 * These demand toc entries of the specified size, and the
2791 * instruction probably requires it.
2792 */
252b5132
RH		 2793
2794 int valid_toc;
2795 enum toc_size_qualifier toc_kind;
2796 bfd_reloc_code_real_type toc_reloc;
2797
99a814a1
AM		 2798 /* Go parse off the [tocXX] part. */
2799 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2800
81d4177b 2801 if (!valid_toc)
252b5132 2802 {
a5840dce
AM		 2803 ignore_rest_of_line ();
2804 break;
252b5132
RH		 2805 }
2806
99a814a1
AM		 2807 /* Now get the symbol following the ']'. */
2808 expression (&ex);
252b5132
RH		 2809
2810 switch (toc_kind)
2811 {
2812 case default_toc:
99a814a1
AM		 2813 /* In this case, we may not have seen the symbol yet,
2814 since it is allowed to appear on a .extern or .globl
2815 or just be a label in the .data section. */
252b5132
RH		 2816 toc_reloc = BFD_RELOC_PPC_TOC16;
2817 break;
2818 case data_in_toc:
99a814a1
AM		 2819 /* 1. The symbol must be defined and either in the toc
2820 section, or a global.
2821 2. The reloc generated must have the TOCDEFN flag set
2822 in upper bit mess of the reloc type.
2823 FIXME: It's a little confusing what the tocv
2824 qualifier can be used for. At the very least, I've
2825 seen three uses, only one of which I'm sure I can
2826 explain. */
81d4177b
KH		 2827 if (ex.X_op == O_symbol)
2828 {
9c2799c2 2829 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2830 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2831 != tocdata_section)
252b5132 2832 {
99a814a1 2833 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2834 }
2835 }
2836
2837 toc_reloc = BFD_RELOC_PPC_TOC16;
2838 break;
2839 case must_be_32:
99a814a1
AM		 2840 /* FIXME: these next two specifically specify 32/64 bit
2841 toc entries. We don't support them today. Is this
2842 the right way to say that? */
252b5132 2843 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2844 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2845 break;
2846 case must_be_64:
99a814a1 2847 /* FIXME: see above. */
252b5132 2848 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2849 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2850 break;
2851 default:
bc805888 2852 fprintf (stderr,
99a814a1
AM		 2853 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2854 toc_kind);
bc805888 2855 abort ();
252b5132
RH		 2856 break;
2857 }
2858
2859 /* We need to generate a fixup for this expression. */
2860 if (fc >= MAX_INSN_FIXUPS)
2861 as_fatal (_("too many fixups"));
2862
2863 fixups[fc].reloc = toc_reloc;
2864 fixups[fc].exp = ex;
2865 fixups[fc].opindex = *opindex_ptr;
2866 ++fc;
2867
99a814a1
AM		 2868 /* Ok. We've set up the fixup for the instruction. Now make it
2869 look like the constant 0 was found here. */
252b5132
RH		 2870 ex.X_unsigned = 1;
2871 ex.X_op = O_constant;
2872 ex.X_add_number = 0;
2873 ex.X_add_symbol = NULL;
2874 ex.X_op_symbol = NULL;
2875 }
2876
2877 else
2878#endif /* TE_PE */
2879 {
b9c361e0
JL		 2880 if ((reg_names_p
2881 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2882 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2883 || !register_name (&ex))
252b5132 2884 {
13abbae3
AM		 2885 char save_lex = lex_type['%'];
2886
b9c361e0
JL		 2887 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2888 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2889 {
2890 cr_operand = TRUE;
2891 lex_type['%'] |= LEX_BEGIN_NAME;
2892 }
252b5132 2893 expression (&ex);
b34976b6 2894 cr_operand = FALSE;
13abbae3 2895 lex_type['%'] = save_lex;
252b5132
RH		 2896 }
2897 }
2898
2899 str = input_line_pointer;
2900 input_line_pointer = hold;
2901
2902 if (ex.X_op == O_illegal)
2903 as_bad (_("illegal operand"));
2904 else if (ex.X_op == O_absent)
2905 as_bad (_("missing operand"));
2906 else if (ex.X_op == O_register)
2907 {
2908 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2909 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2910 }
2911 else if (ex.X_op == O_constant)
2912 {
2913#ifdef OBJ_ELF
81d4177b 2914 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2915 bfd_reloc_code_real_type reloc;
252b5132
RH		 2916 char *orig_str = str;
2917
2918 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2919 switch (reloc)
2920 {
2921 default:
2922 str = orig_str;
2923 break;
2924
2925 case BFD_RELOC_LO16:
f9c6b907
AM		 2926 ex.X_add_number &= 0xffff;
2927 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2928 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2929 break;
2930
2931 case BFD_RELOC_HI16:
f9c6b907
AM		 2932 if (REPORT_OVERFLOW_HI && ppc_obj64)
2933 {
2934 /* PowerPC64 @h is tested for overflow. */
2935 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2936 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2937 {
2938 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2939 ex.X_add_number
2940 = ((addressT) ex.X_add_number ^ sign) - sign;
2941 }
2942 break;
2943 }
2944 /* Fall thru */
2945
2946 case BFD_RELOC_PPC64_ADDR16_HIGH:
2947 ex.X_add_number = PPC_HI (ex.X_add_number);
2948 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2949 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2950 break;
2951
2952 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2953 if (REPORT_OVERFLOW_HI && ppc_obj64)
2954 {
2955 /* PowerPC64 @ha is tested for overflow. */
2956 ex.X_add_number
2957 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2958 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2959 {
2960 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2961 ex.X_add_number
2962 = ((addressT) ex.X_add_number ^ sign) - sign;
2963 }
2964 break;
2965 }
2966 /* Fall thru */
2967
2968 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2969 ex.X_add_number = PPC_HA (ex.X_add_number);
2970 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2971 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2972 break;
2973
0baf16f2 2974 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2975 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2976 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2977 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2978 break;
2979
2980 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2981 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2982 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2983 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2984 break;
0baf16f2
AM		 2985
2986 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2987 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2988 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2989 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2990 break;
2991
2992 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 2993 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2994 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2995 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 2996 break;
252b5132 2997 }
0baf16f2 2998#endif /* OBJ_ELF */
252b5132 2999 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3000 ppc_cpu, (char *) NULL, 0);
252b5132 3001 }
727fc41e 3002 else
252b5132 3003 {
3b8b57a9
AM		 3004 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
3005#ifdef OBJ_ELF
727fc41e 3006 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3007 {
727fc41e
AM		 3008 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3009 if (sym_name[0] == '.')
3010 ++sym_name;
cdba85ec 3011
727fc41e 3012 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3013 {
727fc41e
AM		 3014 expressionS tls_exp;
3015
3016 hold = input_line_pointer;
3017 input_line_pointer = str + 1;
3018 expression (&tls_exp);
3019 if (tls_exp.X_op == O_symbol)
3020 {
3021 reloc = BFD_RELOC_UNUSED;
3022 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3023 {
3024 reloc = BFD_RELOC_PPC_TLSGD;
3025 input_line_pointer += 7;
3026 }
3027 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3028 {
3029 reloc = BFD_RELOC_PPC_TLSLD;
3030 input_line_pointer += 7;
3031 }
3032 if (reloc != BFD_RELOC_UNUSED)
3033 {
3034 SKIP_WHITESPACE ();
3035 str = input_line_pointer;
3036
3037 if (fc >= MAX_INSN_FIXUPS)
3038 as_fatal (_("too many fixups"));
3039 fixups[fc].exp = tls_exp;
3040 fixups[fc].opindex = *opindex_ptr;
3041 fixups[fc].reloc = reloc;
3042 ++fc;
3043 }
3044 }
3045 input_line_pointer = hold;
252b5132
RH		 3046 }
3047 }
3048
727fc41e 3049 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 3050 {
727fc41e 3051 /* Some TLS tweaks. */
0baf16f2
AM		 3052 switch (reloc)
3053 {
727fc41e 3054 default:
cdba85ec 3055 break;
727fc41e
AM		 3056
3057 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3058 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3059 as_bad (_("@tls may not be used with \"%s\" operands"),
3060 opcode->name);
3061 else if (operand->shift != 11)
3062 as_bad (_("@tls may only be used in last operand"));
3063 else
3064 insn = ppc_insert_operand (insn, operand,
3065 ppc_obj64 ? 13 : 2,
3066 ppc_cpu, (char *) NULL, 0);
cdba85ec 3067 break;
727fc41e
AM		 3068
3069 /* We'll only use the 32 (or 64) bit form of these relocations
3070 in constants. Instructions get the 16 bit form. */
3071 case BFD_RELOC_PPC_DTPREL:
3072 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3073 break;
727fc41e
AM		 3074 case BFD_RELOC_PPC_TPREL:
3075 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3076 break;
3077 }
727fc41e 3078
b9c361e0
JL		 3079 /* If VLE-mode convert LO/HI/HA relocations. */
3080 if (opcode->flags & PPC_OPCODE_VLE)
3081 {
3082 int tmp_insn = insn & opcode->mask;
3083
3084 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3085 || tmp_insn == E_AND2I_DOT_INSN
3086 || tmp_insn == E_OR2IS_INSN
3087 || tmp_insn == E_LIS_INSN
3088 || tmp_insn == E_AND2IS_DOT_INSN);
3089
3090
3091 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3092 || tmp_insn == E_ADD2IS_INSN
3093 || tmp_insn == E_CMP16I_INSN
3094 || tmp_insn == E_MULL2I_INSN
3095 || tmp_insn == E_CMPL16I_INSN
3096 || tmp_insn == E_CMPH16I_INSN
3097 || tmp_insn == E_CMPHL16I_INSN);
3098
3099 switch (reloc)
3100 {
3101 default:
3102 break;
3103
3104 case BFD_RELOC_PPC_EMB_SDA21:
3105 reloc = BFD_RELOC_PPC_VLE_SDA21;
3106 break;
3107
3108 case BFD_RELOC_LO16:
3109 if (use_d_reloc)
3110 reloc = BFD_RELOC_PPC_VLE_LO16D;
3111 else if (use_a_reloc)
3112 reloc = BFD_RELOC_PPC_VLE_LO16A;
3113 break;
3114
3115 case BFD_RELOC_HI16:
3116 if (use_d_reloc)
3117 reloc = BFD_RELOC_PPC_VLE_HI16D;
3118 else if (use_a_reloc)
3119 reloc = BFD_RELOC_PPC_VLE_HI16A;
3120 break;
3121
3122 case BFD_RELOC_HI16_S:
3123 if (use_d_reloc)
3124 reloc = BFD_RELOC_PPC_VLE_HA16D;
3125 else if (use_a_reloc)
3126 reloc = BFD_RELOC_PPC_VLE_HA16A;
3127 break;
3128
3129 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3130 if (use_d_reloc)
3131 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3132 break;
3133
3134 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3135 if (use_d_reloc)
3136 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3137 break;
3138
3139 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3140 if (use_d_reloc)
3141 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3142 break;
3143 }
3144 }
3145
727fc41e
AM		 3146 /* For the absolute forms of branches, convert the PC
3147 relative form back into the absolute. */
3148 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3149 {
3150 switch (reloc)
3151 {
3152 case BFD_RELOC_PPC_B26:
3153 reloc = BFD_RELOC_PPC_BA26;
3154 break;
3155 case BFD_RELOC_PPC_B16:
3156 reloc = BFD_RELOC_PPC_BA16;
3157 break;
3158 case BFD_RELOC_PPC_B16_BRTAKEN:
3159 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3160 break;
3161 case BFD_RELOC_PPC_B16_BRNTAKEN:
3162 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3163 break;
3164 default:
3165 break;
3166 }
3167 }
3168
01efc3af
AM		 3169 switch (reloc)
3170 {
3171 case BFD_RELOC_PPC_TOC16:
3172 toc_reloc_types |= has_small_toc_reloc;
3173 break;
3174 case BFD_RELOC_PPC64_TOC16_LO:
3175 case BFD_RELOC_PPC64_TOC16_HI:
3176 case BFD_RELOC_PPC64_TOC16_HA:
3177 toc_reloc_types |= has_large_toc_reloc;
3178 break;
3179 default:
3180 break;
3181 }
3182
1fe532cf 3183 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
727fc41e
AM		 3184 {
3185 switch (reloc)
3186 {
3187 case BFD_RELOC_16:
3188 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3189 break;
3190 case BFD_RELOC_LO16:
3191 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3192 break;
3193 case BFD_RELOC_16_GOTOFF:
3194 reloc = BFD_RELOC_PPC64_GOT16_DS;
3195 break;
3196 case BFD_RELOC_LO16_GOTOFF:
3197 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3198 break;
3199 case BFD_RELOC_LO16_PLTOFF:
3200 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3201 break;
3202 case BFD_RELOC_16_BASEREL:
3203 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3204 break;
3205 case BFD_RELOC_LO16_BASEREL:
3206 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3207 break;
3208 case BFD_RELOC_PPC_TOC16:
3209 reloc = BFD_RELOC_PPC64_TOC16_DS;
3210 break;
3211 case BFD_RELOC_PPC64_TOC16_LO:
3212 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3213 break;
3214 case BFD_RELOC_PPC64_PLTGOT16:
3215 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3216 break;
3217 case BFD_RELOC_PPC64_PLTGOT16_LO:
3218 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3219 break;
3220 case BFD_RELOC_PPC_DTPREL16:
3221 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3222 break;
3223 case BFD_RELOC_PPC_DTPREL16_LO:
3224 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3225 break;
3226 case BFD_RELOC_PPC_TPREL16:
3227 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3228 break;
3229 case BFD_RELOC_PPC_TPREL16_LO:
3230 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3231 break;
3232 case BFD_RELOC_PPC_GOT_DTPREL16:
3233 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3234 case BFD_RELOC_PPC_GOT_TPREL16:
3235 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3236 break;
3237 default:
3238 as_bad (_("unsupported relocation for DS offset field"));
3239 break;
3240 }
3241 }
0baf16f2 3242 }
3b8b57a9
AM		 3243#endif /* OBJ_ELF */
3244
3245 if (reloc != BFD_RELOC_UNUSED)
3246 ;
3247 /* Determine a BFD reloc value based on the operand information.
3248 We are only prepared to turn a few of the operands into
3249 relocs. */
3250 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3251 && operand->bitm == 0x3fffffc
3252 && operand->shift == 0)
3253 reloc = BFD_RELOC_PPC_B26;
3254 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3255 && operand->bitm == 0xfffc
3256 && operand->shift == 0)
3257 reloc = BFD_RELOC_PPC_B16;
3258 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3259 && operand->bitm == 0x1fe
3260 && operand->shift == -1)
3261 reloc = BFD_RELOC_PPC_VLE_REL8;
3262 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3263 && operand->bitm == 0xfffe
3264 && operand->shift == 0)
3265 reloc = BFD_RELOC_PPC_VLE_REL15;
3266 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3267 && operand->bitm == 0x1fffffe
3268 && operand->shift == 0)
3269 reloc = BFD_RELOC_PPC_VLE_REL24;
3270 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3271 && operand->bitm == 0x3fffffc
3272 && operand->shift == 0)
3273 reloc = BFD_RELOC_PPC_BA26;
3274 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3275 && operand->bitm == 0xfffc
3276 && operand->shift == 0)
3277 reloc = BFD_RELOC_PPC_BA16;
3278#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3279 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3280 && (operand->bitm & 0xfff0) == 0xfff0
3281 && operand->shift == 0)
3282 {
ac21e7da 3283 /* Note: the symbol may be not yet defined. */
3b8b57a9
AM		 3284 if (ppc_is_toc_sym (ex.X_add_symbol))
3285 {
3286 reloc = BFD_RELOC_PPC_TOC16;
3287#ifdef OBJ_ELF
3288 if (ppc_obj64
3289 && (operand->flags & PPC_OPERAND_DS) != 0)
3290 reloc = BFD_RELOC_PPC64_TOC16_DS;
3291#endif
3292 }
3293 else
3294 {
3295 reloc = BFD_RELOC_16;
3296#ifdef OBJ_ELF
3297 if (ppc_obj64
3298 && (operand->flags & PPC_OPERAND_DS) != 0)
3299 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3300#endif
3301 }
3302 }
3303#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
0baf16f2 3304
252b5132
RH		 3305 /* We need to generate a fixup for this expression. */
3306 if (fc >= MAX_INSN_FIXUPS)
3307 as_fatal (_("too many fixups"));
3308 fixups[fc].exp = ex;
727fc41e 3309 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3310 fixups[fc].reloc = reloc;
3311 ++fc;
3312 }
252b5132
RH		 3313
3314 if (need_paren)
3315 {
3316 endc = ')';
3317 need_paren = 0;
c3d65c1c
BE		 3318 /* If expecting more operands, then we want to see "),". */
3319 if (*str == endc && opindex_ptr[1] != 0)
3320 {
3321 do
3322 ++str;
3323 while (ISSPACE (*str));
3324 endc = ',';
3325 }
252b5132
RH		 3326 }
3327 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3328 {
3329 endc = '(';
3330 need_paren = 1;
3331 }
3332 else
3333 endc = ',';
3334
3335 /* The call to expression should have advanced str past any
3336 whitespace. */
3337 if (*str != endc
3338 && (endc != ',' || *str != '\0'))
3339 {
5a938047
AM		 3340 if (*str == '\0')
3341 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3342 else
3343 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3344 break;
3345 }
3346
3347 if (*str != '\0')
3348 ++str;
3349 }
3350
3882b010 3351 while (ISSPACE (*str))
252b5132
RH		 3352 ++str;
3353
3354 if (*str != '\0')
3355 as_bad (_("junk at end of line: `%s'"), str);
3356
dc1d03fc 3357#ifdef OBJ_ELF
b9c361e0 3358 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3359 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3360 && !ppc_obj64)
6a0c61b7
EZ		 3361 {
3362 /* These are all version "1". */
3363 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3364 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3365 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3366 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3367 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3368 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3369 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3370 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3371 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3372 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3373 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3374 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3375 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3376 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3377 if (opcode->flags & PPC_OPCODE_VLE)
3378 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3379 }
dc1d03fc 3380#endif
6a0c61b7 3381
252b5132 3382 /* Write out the instruction. */
b9c361e0
JL		 3383 /* Differentiate between two and four byte insns. */
3384 if (ppc_mach () == bfd_mach_ppc_vle)
3385 {
3386 if (PPC_OP_SE_VLE (insn))
3387 insn_length = 2;
3388 else
3389 insn_length = 4;
3390 addr_mod = frag_now_fix () & 1;
3391 }
3392 else
3393 {
3394 insn_length = 4;
3395 addr_mod = frag_now_fix () & 3;
3396 }
3397 /* All instructions can start on a 2 byte boundary for VLE. */
3398 f = frag_more (insn_length);
09b935ac 3399 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3400 {
3401 if (ppc_mach() == bfd_mach_ppc_vle)
3402 as_bad (_("instruction address is not a multiple of 2"));
3403 else
3404 as_bad (_("instruction address is not a multiple of 4"));
3405 }
09b935ac
AM		 3406 frag_now->insn_addr = addr_mod;
3407 frag_now->has_code = 1;
b9c361e0 3408 md_number_to_chars (f, insn, insn_length);
252b5132 3409
5d6f4f16 3410#ifdef OBJ_ELF
b9c361e0 3411 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3412#endif
3413
3b8b57a9 3414 /* Create any fixups. */
252b5132
RH		 3415 for (i = 0; i < fc; i++)
3416 {
3b8b57a9 3417 fixS *fixP;
252b5132
RH		 3418 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3419 {
99a814a1 3420 reloc_howto_type *reloc_howto;
252b5132
RH		 3421 int size;
3422 int offset;
252b5132 3423
99a814a1 3424 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3425 if (!reloc_howto)
3426 abort ();
3427
3428 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3429 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3430
3431 if (size < 1 || size > 4)
bc805888 3432 abort ();
252b5132 3433
99a814a1
AM		 3434 fixP = fix_new_exp (frag_now,
3435 f - frag_now->fr_literal + offset,
3436 size,
3437 &fixups[i].exp,
3438 reloc_howto->pc_relative,
252b5132 3439 fixups[i].reloc);
252b5132
RH		 3440 }
3441 else
727fc41e
AM		 3442 {
3443 const struct powerpc_operand *operand;
3444
3445 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3446 fixP = fix_new_exp (frag_now,
3447 f - frag_now->fr_literal,
3448 insn_length,
3449 &fixups[i].exp,
3450 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3451 BFD_RELOC_UNUSED);
727fc41e 3452 }
3b8b57a9 3453 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3454 }
3455}
3456
3457/* Handle a macro. Gather all the operands, transform them as
3458 described by the macro, and call md_assemble recursively. All the
3459 operands are separated by commas; we don't accept parentheses
3460 around operands here. */
3461
3462static void
98027b10 3463ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3464{
3465 char *operands[10];
3466 unsigned int count;
3467 char *s;
3468 unsigned int len;
3469 const char *format;
db557034 3470 unsigned int arg;
252b5132
RH		 3471 char *send;
3472 char *complete;
3473
3474 /* Gather the users operands into the operands array. */
3475 count = 0;
3476 s = str;
3477 while (1)
3478 {
3479 if (count >= sizeof operands / sizeof operands[0])
3480 break;
3481 operands[count++] = s;
3482 s = strchr (s, ',');
3483 if (s == (char *) NULL)
3484 break;
3485 *s++ = '\0';
81d4177b 3486 }
252b5132
RH		 3487
3488 if (count != macro->operands)
3489 {
3490 as_bad (_("wrong number of operands"));
3491 return;
3492 }
3493
3494 /* Work out how large the string must be (the size is unbounded
3495 because it includes user input). */
3496 len = 0;
3497 format = macro->format;
3498 while (*format != '\0')
3499 {
3500 if (*format != '%')
3501 {
3502 ++len;
3503 ++format;
3504 }
3505 else
3506 {
3507 arg = strtol (format + 1, &send, 10);
db557034 3508 know (send != format && arg < count);
252b5132
RH		 3509 len += strlen (operands[arg]);
3510 format = send;
3511 }
3512 }
3513
3514 /* Put the string together. */
3515 complete = s = (char *) alloca (len + 1);
3516 format = macro->format;
3517 while (*format != '\0')
3518 {
3519 if (*format != '%')
3520 *s++ = *format++;
3521 else
3522 {
3523 arg = strtol (format + 1, &send, 10);
3524 strcpy (s, operands[arg]);
3525 s += strlen (s);
3526 format = send;
3527 }
3528 }
3529 *s = '\0';
3530
3531 /* Assemble the constructed instruction. */
3532 md_assemble (complete);
81d4177b 3533}
252b5132
RH		 3534\f
3535#ifdef OBJ_ELF
18ae9cc1 3536/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3537
3538int
98027b10 3539ppc_section_type (char *str, size_t len)
252b5132 3540{
9de8d8f1
RH		 3541 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3542 return SHT_ORDERED;
252b5132 3543
9de8d8f1 3544 return -1;
252b5132
RH		 3545}
3546
3547int
1239de13 3548ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3549{
3550 if (type == SHT_ORDERED)
3551 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3552
252b5132
RH		 3553 return flags;
3554}
3555#endif /* OBJ_ELF */
3556
3557\f
3558/* Pseudo-op handling. */
3559
3560/* The .byte pseudo-op. This is similar to the normal .byte
3561 pseudo-op, but it can also take a single ASCII string. */
3562
3563static void
98027b10 3564ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3565{
3566 if (*input_line_pointer != '\"')
3567 {
3568 cons (1);
3569 return;
3570 }
3571
3572 /* Gather characters. A real double quote is doubled. Unusual
3573 characters are not permitted. */
3574 ++input_line_pointer;
3575 while (1)
3576 {
3577 char c;
3578
3579 c = *input_line_pointer++;
3580
3581 if (c == '\"')
3582 {
3583 if (*input_line_pointer != '\"')
3584 break;
3585 ++input_line_pointer;
3586 }
3587
3588 FRAG_APPEND_1_CHAR (c);
3589 }
3590
3591 demand_empty_rest_of_line ();
3592}
3593\f
3594#ifdef OBJ_XCOFF
3595
3596/* XCOFF specific pseudo-op handling. */
3597
3598/* This is set if we are creating a .stabx symbol, since we don't want
3599 to handle symbol suffixes for such symbols. */
b34976b6 3600static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3601
3602/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3603 symbols in the .bss segment as though they were local common
67c1ffbe 3604 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3605 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3606
3607static void
98027b10 3608ppc_comm (int lcomm)
252b5132
RH		 3609{
3610 asection *current_seg = now_seg;
3611 subsegT current_subseg = now_subseg;
3612 char *name;
3613 char endc;
3614 char *end_name;
3615 offsetT size;
3616 offsetT align;
3617 symbolS *lcomm_sym = NULL;
3618 symbolS *sym;
3619 char *pfrag;
3620
3621 name = input_line_pointer;
3622 endc = get_symbol_end ();
3623 end_name = input_line_pointer;
3624 *end_name = endc;
3625
3626 if (*input_line_pointer != ',')
3627 {
3628 as_bad (_("missing size"));
3629 ignore_rest_of_line ();
3630 return;
3631 }
3632 ++input_line_pointer;
3633
3634 size = get_absolute_expression ();
3635 if (size < 0)
3636 {
3637 as_bad (_("negative size"));
3638 ignore_rest_of_line ();
3639 return;
3640 }
3641
3642 if (! lcomm)
3643 {
3644 /* The third argument to .comm is the alignment. */
3645 if (*input_line_pointer != ',')
1ad63b2f 3646 align = 2;
252b5132
RH		 3647 else
3648 {
3649 ++input_line_pointer;
3650 align = get_absolute_expression ();
3651 if (align <= 0)
3652 {
3653 as_warn (_("ignoring bad alignment"));
1ad63b2f 3654 align = 2;
252b5132
RH		 3655 }
3656 }
3657 }
3658 else
3659 {
3660 char *lcomm_name;
3661 char lcomm_endc;
3662
252b5132
RH		 3663 /* The third argument to .lcomm appears to be the real local
3664 common symbol to create. References to the symbol named in
3665 the first argument are turned into references to the third
3666 argument. */
3667 if (*input_line_pointer != ',')
3668 {
3669 as_bad (_("missing real symbol name"));
3670 ignore_rest_of_line ();
3671 return;
3672 }
3673 ++input_line_pointer;
3674
3675 lcomm_name = input_line_pointer;
3676 lcomm_endc = get_symbol_end ();
81d4177b 3677
252b5132
RH		 3678 lcomm_sym = symbol_find_or_make (lcomm_name);
3679
3680 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3681
3682 /* The fourth argument to .lcomm is the alignment. */
3683 if (*input_line_pointer != ',')
3684 {
3685 if (size <= 4)
3686 align = 2;
3687 else
3688 align = 3;
3689 }
3690 else
3691 {
3692 ++input_line_pointer;
3693 align = get_absolute_expression ();
3694 if (align <= 0)
3695 {
3696 as_warn (_("ignoring bad alignment"));
3697 align = 2;
3698 }
3699 }
252b5132
RH		 3700 }
3701
3702 *end_name = '\0';
3703 sym = symbol_find_or_make (name);
3704 *end_name = endc;
3705
3706 if (S_IS_DEFINED (sym)
3707 || S_GET_VALUE (sym) != 0)
3708 {
3709 as_bad (_("attempt to redefine symbol"));
3710 ignore_rest_of_line ();
3711 return;
3712 }
81d4177b 3713
252b5132 3714 record_alignment (bss_section, align);
81d4177b 3715
252b5132
RH		 3716 if (! lcomm
3717 || ! S_IS_DEFINED (lcomm_sym))
3718 {
3719 symbolS *def_sym;
3720 offsetT def_size;
3721
3722 if (! lcomm)
3723 {
3724 def_sym = sym;
3725 def_size = size;
3726 S_SET_EXTERNAL (sym);
3727 }
3728 else
3729 {
809ffe0d 3730 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3731 def_sym = lcomm_sym;
3732 def_size = 0;
3733 }
3734
3735 subseg_set (bss_section, 1);
3736 frag_align (align, 0, 0);
81d4177b 3737
809ffe0d 3738 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3739 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3740 def_size, (char *) NULL);
3741 *pfrag = 0;
3742 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3743 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3744 }
3745 else if (lcomm)
3746 {
3747 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3748 symbol_get_frag (lcomm_sym)->fr_offset =
3749 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3750 &~ ((1 << align) - 1));
809ffe0d
ILT		 3751 if (align > symbol_get_tc (lcomm_sym)->align)
3752 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3753 }
3754
3755 if (lcomm)
3756 {
3757 /* Make sym an offset from lcomm_sym. */
3758 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3759 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3760 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3761 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3762 }
3763
3764 subseg_set (current_seg, current_subseg);
3765
3766 demand_empty_rest_of_line ();
3767}
3768
3769/* The .csect pseudo-op. This switches us into a different
3770 subsegment. The first argument is a symbol whose value is the
3771 start of the .csect. In COFF, csect symbols get special aux
3772 entries defined by the x_csect field of union internal_auxent. The
3773 optional second argument is the alignment (the default is 2). */
3774
3775static void
98027b10 3776ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3777{
3778 char *name;
3779 char endc;
3780 symbolS *sym;
931e13a6 3781 offsetT align;
252b5132
RH		 3782
3783 name = input_line_pointer;
3784 endc = get_symbol_end ();
81d4177b 3785
252b5132
RH		 3786 sym = symbol_find_or_make (name);
3787
3788 *input_line_pointer = endc;
3789
3790 if (S_GET_NAME (sym)[0] == '\0')
3791 {
3792 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3793 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3794 }
3795
931e13a6 3796 align = 2;
252b5132
RH		 3797 if (*input_line_pointer == ',')
3798 {
3799 ++input_line_pointer;
931e13a6 3800 align = get_absolute_expression ();
252b5132
RH		 3801 }
3802
931e13a6
AM		 3803 ppc_change_csect (sym, align);
3804
252b5132
RH		 3805 demand_empty_rest_of_line ();
3806}
3807
3808/* Change to a different csect. */
3809
3810static void
98027b10 3811ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3812{
3813 if (S_IS_DEFINED (sym))
809ffe0d 3814 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3815 else
3816 {
3817 symbolS **list_ptr;
3818 int after_toc;
3819 int hold_chunksize;
3820 symbolS *list;
931e13a6
AM		 3821 int is_code;
3822 segT sec;
252b5132
RH		 3823
3824 /* This is a new csect. We need to look at the symbol class to
3825 figure out whether it should go in the text section or the
3826 data section. */
3827 after_toc = 0;
931e13a6 3828 is_code = 0;
96d56e9f 3829 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3830 {
3831 case XMC_PR:
3832 case XMC_RO:
3833 case XMC_DB:
3834 case XMC_GL:
3835 case XMC_XO:
3836 case XMC_SV:
3837 case XMC_TI:
3838 case XMC_TB:
3839 S_SET_SEGMENT (sym, text_section);
809ffe0d 3840 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3841 ++ppc_text_subsegment;
3842 list_ptr = &ppc_text_csects;
931e13a6 3843 is_code = 1;
252b5132
RH		 3844 break;
3845 case XMC_RW:
3846 case XMC_TC0:
3847 case XMC_TC:
3848 case XMC_DS:
3849 case XMC_UA:
3850 case XMC_BS:
3851 case XMC_UC:
3852 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3853 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3854 == ppc_data_subsegment))
252b5132
RH		 3855 after_toc = 1;
3856 S_SET_SEGMENT (sym, data_section);
809ffe0d 3857 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3858 ++ppc_data_subsegment;
3859 list_ptr = &ppc_data_csects;
3860 break;
3861 default:
3862 abort ();
3863 }
3864
3865 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3866 changing subsegments, so that we don't use a lot of memory
3867 space for what may be a small section. */
252b5132
RH		 3868 hold_chunksize = chunksize;
3869 chunksize = 64;
3870
931e13a6
AM		 3871 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3872 symbol_get_tc (sym)->subseg);
252b5132
RH		 3873
3874 chunksize = hold_chunksize;
3875
3876 if (after_toc)
3877 ppc_after_toc_frag = frag_now;
3878
931e13a6
AM		 3879 record_alignment (sec, align);
3880 if (is_code)
3881 frag_align_code (align, 0);
3882 else
3883 frag_align (align, 0, 0);
3884
809ffe0d 3885 symbol_set_frag (sym, frag_now);
252b5132
RH		 3886 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3887
931e13a6 3888 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3889 symbol_get_tc (sym)->output = 1;
3890 symbol_get_tc (sym)->within = sym;
81d4177b 3891
252b5132 3892 for (list = *list_ptr;
809ffe0d
ILT		 3893 symbol_get_tc (list)->next != (symbolS *) NULL;
3894 list = symbol_get_tc (list)->next)
252b5132 3895 ;
809ffe0d 3896 symbol_get_tc (list)->next = sym;
81d4177b 3897
252b5132 3898 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3899 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3900 &symbol_lastP);
252b5132
RH		 3901 }
3902
3903 ppc_current_csect = sym;
3904}
3905
85645aed
TG		 3906static void
3907ppc_change_debug_section (unsigned int idx, subsegT subseg)
3908{
3909 segT sec;
3910 flagword oldflags;
3911 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3912
3913 sec = subseg_new (dw->name, subseg);
3914 oldflags = bfd_get_section_flags (stdoutput, sec);
3915 if (oldflags == SEC_NO_FLAGS)
3916 {
3917 /* Just created section. */
3918 gas_assert (dw_sections[idx].sect == NULL);
3919
3920 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3921 bfd_set_section_alignment (stdoutput, sec, 0);
3922 dw_sections[idx].sect = sec;
3923 }
3924
3925 /* Not anymore in a csect. */
3926 ppc_current_csect = NULL;
3927}
3928
3929/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3930 .dwsect flag [, opt-label ]
3931*/
3932
3933static void
3934ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3935{
3936 offsetT flag;
3937 symbolS *opt_label;
3938 const struct xcoff_dwsect_name *dw;
3939 struct dw_subsection *subseg;
3940 struct dw_section *dws;
3941 int i;
3942
3943 /* Find section. */
3944 flag = get_absolute_expression ();
3945 dw = NULL;
3946 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3947 if (xcoff_dwsect_names[i].flag == flag)
3948 {
3949 dw = &xcoff_dwsect_names[i];
3950 break;
3951 }
3952
3953 /* Parse opt-label. */
3954 if (*input_line_pointer == ',')
3955 {
3956 const char *label;
3957 char c;
3958
3959 ++input_line_pointer;
3960
3961 label = input_line_pointer;
3962 c = get_symbol_end ();
3963 opt_label = symbol_find_or_make (label);
3964 *input_line_pointer = c;
3965 }
3966 else
3967 opt_label = NULL;
3968
3969 demand_empty_rest_of_line ();
3970
3971 /* Return now in case of unknown subsection. */
3972 if (dw == NULL)
3973 {
d6ed37ed 3974 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3975 (unsigned)flag);
3976 return;
3977 }
3978
3979 /* Find the subsection. */
3980 dws = &dw_sections[i];
3981 subseg = NULL;
3982 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3983 {
3984 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3985 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3986 {
3987 as_bad (_("label %s was not defined in this dwarf section"),
3988 S_GET_NAME (opt_label));
3989 subseg = dws->anon_subseg;
3990 opt_label = NULL;
3991 }
3992 else
3993 subseg = symbol_get_tc (opt_label)->u.dw;
3994 }
3995
3996 if (subseg != NULL)
3997 {
3998 /* Switch to the subsection. */
3999 ppc_change_debug_section (i, subseg->subseg);
4000 }
4001 else
4002 {
4003 /* Create a new dw subsection. */
4004 subseg = (struct dw_subsection *)
4005 xmalloc (sizeof (struct dw_subsection));
4006
4007 if (opt_label == NULL)
4008 {
4009 /* The anonymous one. */
4010 subseg->subseg = 0;
4011 subseg->link = NULL;
4012 dws->anon_subseg = subseg;
4013 }
4014 else
4015 {
4016 /* A named one. */
4017 if (dws->list_subseg != NULL)
4018 subseg->subseg = dws->list_subseg->subseg + 1;
4019 else
4020 subseg->subseg = 1;
4021
4022 subseg->link = dws->list_subseg;
4023 dws->list_subseg = subseg;
4024 symbol_get_tc (opt_label)->u.dw = subseg;
4025 }
4026
4027 ppc_change_debug_section (i, subseg->subseg);
4028
4029 if (dw->def_size)
4030 {
4031 /* Add the length field. */
4032 expressionS *exp = &subseg->end_exp;
4033 int sz;
4034
4035 if (opt_label != NULL)
4036 symbol_set_value_now (opt_label);
4037
4038 /* Add the length field. Note that according to the AIX assembler
4039 manual, the size of the length field is 4 for powerpc32 but
4040 12 for powerpc64. */
4041 if (ppc_obj64)
4042 {
4043 /* Write the 64bit marker. */
4044 md_number_to_chars (frag_more (4), -1, 4);
4045 }
4046
4047 exp->X_op = O_subtract;
4048 exp->X_op_symbol = symbol_temp_new_now ();
4049 exp->X_add_symbol = symbol_temp_make ();
4050
4051 sz = ppc_obj64 ? 8 : 4;
4052 exp->X_add_number = -sz;
4053 emit_expr (exp, sz);
4054 }
4055 }
4056}
4057
252b5132
RH		 4058/* This function handles the .text and .data pseudo-ops. These
4059 pseudo-ops aren't really used by XCOFF; we implement them for the
4060 convenience of people who aren't used to XCOFF. */
4061
4062static void
98027b10 4063ppc_section (int type)
252b5132
RH		 4064{
4065 const char *name;
4066 symbolS *sym;
4067
4068 if (type == 't')
4069 name = ".text[PR]";
4070 else if (type == 'd')
4071 name = ".data[RW]";
4072 else
4073 abort ();
4074
4075 sym = symbol_find_or_make (name);
4076
931e13a6 4077 ppc_change_csect (sym, 2);
252b5132
RH		 4078
4079 demand_empty_rest_of_line ();
4080}
4081
4082/* This function handles the .section pseudo-op. This is mostly to
4083 give an error, since XCOFF only supports .text, .data and .bss, but
4084 we do permit the user to name the text or data section. */
4085
4086static void
98027b10 4087ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4088{
4089 char *user_name;
4090 const char *real_name;
4091 char c;
4092 symbolS *sym;
4093
4094 user_name = input_line_pointer;
4095 c = get_symbol_end ();
4096
4097 if (strcmp (user_name, ".text") == 0)
4098 real_name = ".text[PR]";
4099 else if (strcmp (user_name, ".data") == 0)
4100 real_name = ".data[RW]";
4101 else
4102 {
d6ed37ed 4103 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4104 *input_line_pointer = c;
4105 ignore_rest_of_line ();
4106 return;
4107 }
4108
4109 *input_line_pointer = c;
4110
4111 sym = symbol_find_or_make (real_name);
4112
931e13a6 4113 ppc_change_csect (sym, 2);
252b5132
RH		 4114
4115 demand_empty_rest_of_line ();
4116}
4117
4118/* The .extern pseudo-op. We create an undefined symbol. */
4119
4120static void
98027b10 4121ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4122{
4123 char *name;
4124 char endc;
4125
4126 name = input_line_pointer;
4127 endc = get_symbol_end ();
4128
4129 (void) symbol_find_or_make (name);
4130
4131 *input_line_pointer = endc;
4132
4133 demand_empty_rest_of_line ();
4134}
4135
4136/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4137
4138static void
98027b10 4139ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4140{
4141 char *name;
4142 char endc;
4143 symbolS *sym;
4144
4145 name = input_line_pointer;
4146 endc = get_symbol_end ();
4147
4148 sym = symbol_find_or_make (name);
4149
4150 *input_line_pointer = endc;
4151
809ffe0d 4152 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4153
4154 demand_empty_rest_of_line ();
4155}
4156
c865e45b
RS		 4157/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4158 relocations at the beginning of the current csect.
4159
4160 (In principle, there's no reason why the relocations _have_ to be at
4161 the beginning. Anywhere in the csect would do. However, inserting
4162 at the beginning is what the native assmebler does, and it helps to
4163 deal with cases where the .ref statements follow the section contents.)
4164
4165 ??? .refs don't work for empty .csects. However, the native assembler
4166 doesn't report an error in this case, and neither yet do we. */
4167
4168static void
4169ppc_ref (int ignore ATTRIBUTE_UNUSED)
4170{
4171 char *name;
4172 char c;
4173
4174 if (ppc_current_csect == NULL)
4175 {
4176 as_bad (_(".ref outside .csect"));
4177 ignore_rest_of_line ();
4178 return;
4179 }
4180
4181 do
4182 {
4183 name = input_line_pointer;
4184 c = get_symbol_end ();
4185
4186 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4187 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4188
4189 *input_line_pointer = c;
4190 SKIP_WHITESPACE ();
4191 c = *input_line_pointer;
4192 if (c == ',')
4193 {
4194 input_line_pointer++;
4195 SKIP_WHITESPACE ();
4196 if (is_end_of_line[(unsigned char) *input_line_pointer])
4197 {
4198 as_bad (_("missing symbol name"));
4199 ignore_rest_of_line ();
4200 return;
4201 }
4202 }
4203 }
4204 while (c == ',');
4205
4206 demand_empty_rest_of_line ();
4207}
4208
252b5132
RH		 4209/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4210 although I don't know why it bothers. */
4211
4212static void
98027b10 4213ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4214{
4215 char *name;
4216 char endc;
4217 symbolS *sym;
4218 int len;
4219
4220 name = input_line_pointer;
4221 endc = get_symbol_end ();
4222
4223 sym = symbol_find_or_make (name);
4224
4225 *input_line_pointer = endc;
4226
4227 if (*input_line_pointer != ',')
4228 {
4229 as_bad (_("missing rename string"));
4230 ignore_rest_of_line ();
4231 return;
4232 }
4233 ++input_line_pointer;
4234
809ffe0d 4235 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4236
4237 demand_empty_rest_of_line ();
4238}
4239
4240/* The .stabx pseudo-op. This is similar to a normal .stabs
4241 pseudo-op, but slightly different. A sample is
4242 .stabx "main:F-1",.main,142,0
4243 The first argument is the symbol name to create. The second is the
4244 value, and the third is the storage class. The fourth seems to be
4245 always zero, and I am assuming it is the type. */
4246
4247static void
98027b10 4248ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4249{
4250 char *name;
4251 int len;
4252 symbolS *sym;
4253 expressionS exp;
4254
4255 name = demand_copy_C_string (&len);
4256
4257 if (*input_line_pointer != ',')
4258 {
4259 as_bad (_("missing value"));
4260 return;
4261 }
4262 ++input_line_pointer;
4263
b34976b6 4264 ppc_stab_symbol = TRUE;
252b5132 4265 sym = symbol_make (name);
b34976b6 4266 ppc_stab_symbol = FALSE;
252b5132 4267
809ffe0d 4268 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4269
4270 (void) expression (&exp);
4271
4272 switch (exp.X_op)
4273 {
4274 case O_illegal:
4275 case O_absent:
4276 case O_big:
4277 as_bad (_("illegal .stabx expression; zero assumed"));
4278 exp.X_add_number = 0;
4279 /* Fall through. */
4280 case O_constant:
4281 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4282 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4283 break;
4284
4285 case O_symbol:
4286 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4287 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4288 else
4289 {
4290 S_SET_VALUE (sym,
4291 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4292 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4293 }
4294 break;
4295
4296 default:
4297 /* The value is some complex expression. This will probably
99a814a1
AM		 4298 fail at some later point, but this is probably the right
4299 thing to do here. */
809ffe0d 4300 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4301 break;
4302 }
4303
4304 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4305 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4306
4307 if (*input_line_pointer != ',')
4308 {
4309 as_bad (_("missing class"));
4310 return;
4311 }
4312 ++input_line_pointer;
4313
4314 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4315
4316 if (*input_line_pointer != ',')
4317 {
4318 as_bad (_("missing type"));
4319 return;
4320 }
4321 ++input_line_pointer;
4322
4323 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4324
809ffe0d 4325 symbol_get_tc (sym)->output = 1;
252b5132 4326
c734e7e3
TG		 4327 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4328 {
4329 /* In this case :
252b5132 4330
c734e7e3
TG		 4331 .bs name
4332 .stabx "z",arrays_,133,0
4333 .es
99a814a1 4334
c734e7e3 4335 .comm arrays_,13768,3
99a814a1 4336
c734e7e3
TG		 4337 resolve_symbol_value will copy the exp's "within" into sym's when the
4338 offset is 0. Since this seems to be corner case problem,
4339 only do the correction for storage class C_STSYM. A better solution
4340 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4341
c734e7e3
TG		 4342 if (exp.X_op == O_symbol)
4343 {
4344 if (ppc_current_block == NULL)
4345 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4346
c734e7e3
TG		 4347 symbol_get_tc (sym)->within = ppc_current_block;
4348 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4349 }
4350 }
99a814a1 4351
252b5132
RH		 4352 if (exp.X_op != O_symbol
4353 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4354 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4355 ppc_frob_label (sym);
4356 else
4357 {
4358 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4359 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4360 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4361 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4362 }
4363
4364 demand_empty_rest_of_line ();
4365}
4366
4367/* The .function pseudo-op. This takes several arguments. The first
4368 argument seems to be the external name of the symbol. The second
67c1ffbe 4369 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4370 uses the same name for both. I have no idea what the third and
4371 fourth arguments are meant to be. The optional fifth argument is
4372 an expression for the size of the function. In COFF this symbol
4373 gets an aux entry like that used for a csect. */
4374
4375static void
98027b10 4376ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4377{
4378 char *name;
4379 char endc;
4380 char *s;
4381 symbolS *ext_sym;
4382 symbolS *lab_sym;
4383
4384 name = input_line_pointer;
4385 endc = get_symbol_end ();
4386
4387 /* Ignore any [PR] suffix. */
4388 name = ppc_canonicalize_symbol_name (name);
4389 s = strchr (name, '[');
4390 if (s != (char *) NULL
4391 && strcmp (s + 1, "PR]") == 0)
4392 *s = '\0';
4393
4394 ext_sym = symbol_find_or_make (name);
4395
4396 *input_line_pointer = endc;
4397
4398 if (*input_line_pointer != ',')
4399 {
4400 as_bad (_("missing symbol name"));
4401 ignore_rest_of_line ();
4402 return;
4403 }
4404 ++input_line_pointer;
4405
4406 name = input_line_pointer;
4407 endc = get_symbol_end ();
4408
4409 lab_sym = symbol_find_or_make (name);
4410
4411 *input_line_pointer = endc;
4412
4413 if (ext_sym != lab_sym)
4414 {
809ffe0d
ILT		 4415 expressionS exp;
4416
4417 exp.X_op = O_symbol;
4418 exp.X_add_symbol = lab_sym;
4419 exp.X_op_symbol = NULL;
4420 exp.X_add_number = 0;
4421 exp.X_unsigned = 0;
4422 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4423 }
4424
96d56e9f
NC		 4425 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4426 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4427 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4428
4429 if (*input_line_pointer == ',')
4430 {
91d6fa6a 4431 expressionS exp;
252b5132
RH		 4432
4433 /* Ignore the third argument. */
4434 ++input_line_pointer;
91d6fa6a 4435 expression (& exp);
252b5132
RH		 4436 if (*input_line_pointer == ',')
4437 {
4438 /* Ignore the fourth argument. */
4439 ++input_line_pointer;
91d6fa6a 4440 expression (& exp);
252b5132
RH		 4441 if (*input_line_pointer == ',')
4442 {
4443 /* The fifth argument is the function size. */
4444 ++input_line_pointer;
85645aed
TG		 4445 symbol_get_tc (ext_sym)->u.size = symbol_new
4446 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4447 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4448 }
4449 }
4450 }
4451
4452 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4453 SF_SET_FUNCTION (ext_sym);
4454 SF_SET_PROCESS (ext_sym);
4455 coff_add_linesym (ext_sym);
4456
4457 demand_empty_rest_of_line ();
4458}
4459
4460/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4461 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4462 with the correct line number */
5d6255fe 4463
8642cce8 4464static symbolS *saved_bi_sym = 0;
252b5132
RH		 4465
4466static void
98027b10 4467ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4468{
4469 symbolS *sym;
4470
4471 sym = symbol_make (".bf");
4472 S_SET_SEGMENT (sym, text_section);
809ffe0d 4473 symbol_set_frag (sym, frag_now);
252b5132
RH		 4474 S_SET_VALUE (sym, frag_now_fix ());
4475 S_SET_STORAGE_CLASS (sym, C_FCN);
4476
4477 coff_line_base = get_absolute_expression ();
4478
4479 S_SET_NUMBER_AUXILIARY (sym, 1);
4480 SA_SET_SYM_LNNO (sym, coff_line_base);
4481
8642cce8 4482 /* Line number for bi. */
5d6255fe 4483 if (saved_bi_sym)
8642cce8
TR		 4484 {
4485 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4486 saved_bi_sym = 0;
4487 }
5d6255fe 4488
8642cce8 4489
809ffe0d 4490 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4491
4492 ppc_frob_label (sym);
4493
4494 demand_empty_rest_of_line ();
4495}
4496
4497/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4498 ".ef", except that the line number is absolute, not relative to the
4499 most recent ".bf" symbol. */
4500
4501static void
98027b10 4502ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4503{
4504 symbolS *sym;
4505
4506 sym = symbol_make (".ef");
4507 S_SET_SEGMENT (sym, text_section);
809ffe0d 4508 symbol_set_frag (sym, frag_now);
252b5132
RH		 4509 S_SET_VALUE (sym, frag_now_fix ());
4510 S_SET_STORAGE_CLASS (sym, C_FCN);
4511 S_SET_NUMBER_AUXILIARY (sym, 1);
4512 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4513 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4514
4515 ppc_frob_label (sym);
4516
4517 demand_empty_rest_of_line ();
4518}
4519
4520/* The .bi and .ei pseudo-ops. These take a string argument and
4521 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4522 the symbol list. The value of .bi will be know when the next .bf
4523 is encountered. */
252b5132
RH		 4524
4525static void
98027b10 4526ppc_biei (int ei)
252b5132
RH		 4527{
4528 static symbolS *last_biei;
4529
4530 char *name;
4531 int len;
4532 symbolS *sym;
4533 symbolS *look;
4534
4535 name = demand_copy_C_string (&len);
4536
4537 /* The value of these symbols is actually file offset. Here we set
4538 the value to the index into the line number entries. In
4539 ppc_frob_symbols we set the fix_line field, which will cause BFD
4540 to do the right thing. */
4541
4542 sym = symbol_make (name);
4543 /* obj-coff.c currently only handles line numbers correctly in the
4544 .text section. */
4545 S_SET_SEGMENT (sym, text_section);
4546 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4547 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4548
4549 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4550 symbol_get_tc (sym)->output = 1;
81d4177b 4551
8642cce8 4552 /* Save bi. */
5d6255fe 4553 if (ei)
8642cce8
TR		 4554 saved_bi_sym = 0;
4555 else
4556 saved_bi_sym = sym;
4557
252b5132
RH		 4558 for (look = last_biei ? last_biei : symbol_rootP;
4559 (look != (symbolS *) NULL
4560 && (S_GET_STORAGE_CLASS (look) == C_FILE
4561 || S_GET_STORAGE_CLASS (look) == C_BINCL
4562 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4563 look = symbol_next (look))
4564 ;
4565 if (look != (symbolS *) NULL)
4566 {
4567 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4568 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4569 last_biei = sym;
4570 }
4571
4572 demand_empty_rest_of_line ();
4573}
4574
4575/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4576 There is one argument, which is a csect symbol. The value of the
4577 .bs symbol is the index of this csect symbol. */
4578
4579static void
98027b10 4580ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4581{
4582 char *name;
4583 char endc;
4584 symbolS *csect;
4585 symbolS *sym;
4586
4587 if (ppc_current_block != NULL)
4588 as_bad (_("nested .bs blocks"));
4589
4590 name = input_line_pointer;
4591 endc = get_symbol_end ();
4592
4593 csect = symbol_find_or_make (name);
4594
4595 *input_line_pointer = endc;
4596
4597 sym = symbol_make (".bs");
4598 S_SET_SEGMENT (sym, now_seg);
4599 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4600 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4601 symbol_get_tc (sym)->output = 1;
252b5132 4602
809ffe0d 4603 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4604
4605 ppc_frob_label (sym);
4606
4607 ppc_current_block = sym;
4608
4609 demand_empty_rest_of_line ();
4610}
4611
4612/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4613
4614static void
98027b10 4615ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4616{
4617 symbolS *sym;
4618
4619 if (ppc_current_block == NULL)
4620 as_bad (_(".es without preceding .bs"));
4621
4622 sym = symbol_make (".es");
4623 S_SET_SEGMENT (sym, now_seg);
4624 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4625 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4626 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4627
4628 ppc_frob_label (sym);
4629
4630 ppc_current_block = NULL;
4631
4632 demand_empty_rest_of_line ();
4633}
4634
4635/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4636 line number. */
4637
4638static void
98027b10 4639ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4640{
4641 symbolS *sym;
4642
4643 sym = symbol_make (".bb");
4644 S_SET_SEGMENT (sym, text_section);
809ffe0d 4645 symbol_set_frag (sym, frag_now);
252b5132
RH		 4646 S_SET_VALUE (sym, frag_now_fix ());
4647 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4648
4649 S_SET_NUMBER_AUXILIARY (sym, 1);
4650 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4651
809ffe0d 4652 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4653
4654 SF_SET_PROCESS (sym);
4655
4656 ppc_frob_label (sym);
4657
4658 demand_empty_rest_of_line ();
4659}
4660
4661/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4662 line number. */
4663
4664static void
98027b10 4665ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4666{
4667 symbolS *sym;
4668
4669 sym = symbol_make (".eb");
4670 S_SET_SEGMENT (sym, text_section);
809ffe0d 4671 symbol_set_frag (sym, frag_now);
252b5132
RH		 4672 S_SET_VALUE (sym, frag_now_fix ());
4673 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4674 S_SET_NUMBER_AUXILIARY (sym, 1);
4675 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4676 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4677
4678 SF_SET_PROCESS (sym);
4679
4680 ppc_frob_label (sym);
4681
4682 demand_empty_rest_of_line ();
4683}
4684
4685/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4686 specified name. */
4687
4688static void
98027b10 4689ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4690{
4691 char *name;
4692 int len;
4693 symbolS *sym;
4694
4695 name = demand_copy_C_string (&len);
4696 sym = symbol_make (name);
4697 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4698 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4699 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4700 S_SET_VALUE (sym, 0);
809ffe0d 4701 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4702
4703 ppc_frob_label (sym);
4704
4705 demand_empty_rest_of_line ();
4706}
4707
4708/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4709
4710static void
98027b10 4711ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4712{
4713 symbolS *sym;
4714
4715 sym = symbol_make (".ec");
4716 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4717 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4718 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4719 S_SET_VALUE (sym, 0);
809ffe0d 4720 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4721
4722 ppc_frob_label (sym);
4723
4724 demand_empty_rest_of_line ();
4725}
4726
4727/* The .toc pseudo-op. Switch to the .toc subsegment. */
4728
4729static void
98027b10 4730ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4731{
4732 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4733 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4734 else
4735 {
4736 subsegT subseg;
4737 symbolS *sym;
4738 symbolS *list;
81d4177b 4739
252b5132
RH		 4740 subseg = ppc_data_subsegment;
4741 ++ppc_data_subsegment;
4742
4743 subseg_new (segment_name (data_section), subseg);
4744 ppc_toc_frag = frag_now;
4745
4746 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4747 symbol_set_frag (sym, frag_now);
252b5132
RH		 4748 S_SET_SEGMENT (sym, data_section);
4749 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4750 symbol_get_tc (sym)->subseg = subseg;
4751 symbol_get_tc (sym)->output = 1;
4752 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4753
4754 ppc_toc_csect = sym;
81d4177b 4755
252b5132 4756 for (list = ppc_data_csects;
809ffe0d
ILT		 4757 symbol_get_tc (list)->next != (symbolS *) NULL;
4758 list = symbol_get_tc (list)->next)
252b5132 4759 ;
809ffe0d 4760 symbol_get_tc (list)->next = sym;
252b5132
RH		 4761
4762 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4763 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4764 &symbol_lastP);
252b5132
RH		 4765 }
4766
4767 ppc_current_csect = ppc_toc_csect;
4768
4769 demand_empty_rest_of_line ();
4770}
4771
4772/* The AIX assembler automatically aligns the operands of a .long or
4773 .short pseudo-op, and we want to be compatible. */
4774
4775static void
98027b10 4776ppc_xcoff_cons (int log_size)
252b5132
RH		 4777{
4778 frag_align (log_size, 0, 0);
4779 record_alignment (now_seg, log_size);
4780 cons (1 << log_size);
4781}
4782
4783static void
98027b10 4784ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4785{
4786 expressionS exp;
4787 int byte_count;
4788
4789 (void) expression (&exp);
4790
4791 if (exp.X_op != O_constant)
4792 {
4793 as_bad (_("non-constant byte count"));
4794 return;
4795 }
4796
4797 byte_count = exp.X_add_number;
4798
4799 if (*input_line_pointer != ',')
4800 {
4801 as_bad (_("missing value"));
4802 return;
4803 }
4804
4805 ++input_line_pointer;
4806 cons (byte_count);
4807}
4808
85645aed
TG		 4809void
4810ppc_xcoff_end (void)
4811{
4812 int i;
4813
4814 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4815 {
4816 struct dw_section *dws = &dw_sections[i];
4817 struct dw_subsection *dwss;
4818
4819 if (dws->anon_subseg)
4820 {
4821 dwss = dws->anon_subseg;
4822 dwss->link = dws->list_subseg;
4823 }
4824 else
4825 dwss = dws->list_subseg;
4826
4827 for (; dwss != NULL; dwss = dwss->link)
4828 if (dwss->end_exp.X_add_symbol != NULL)
4829 {
4830 subseg_set (dws->sect, dwss->subseg);
4831 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4832 }
4833 }
4834}
4835
252b5132 4836#endif /* OBJ_XCOFF */
0baf16f2 4837#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4838\f
4839/* The .tc pseudo-op. This is used when generating either XCOFF or
4840 ELF. This takes two or more arguments.
4841
4842 When generating XCOFF output, the first argument is the name to
4843 give to this location in the toc; this will be a symbol with class
0baf16f2 4844 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4845 this location in the TOC; often there is just one more argument, a
1049f94e 4846 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4847 depends on target word size. A 32-bit target uses 4-byte values, a
4848 64-bit target uses 8-byte values.
252b5132
RH		 4849
4850 When not generating XCOFF output, the arguments are the same, but
4851 the first argument is simply ignored. */
4852
4853static void
98027b10 4854ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4855{
4856#ifdef OBJ_XCOFF
4857
4858 /* Define the TOC symbol name. */
4859 {
4860 char *name;
4861 char endc;
4862 symbolS *sym;
4863
4864 if (ppc_toc_csect == (symbolS *) NULL
4865 || ppc_toc_csect != ppc_current_csect)
4866 {
4867 as_bad (_(".tc not in .toc section"));
4868 ignore_rest_of_line ();
4869 return;
4870 }
4871
4872 name = input_line_pointer;
4873 endc = get_symbol_end ();
4874
4875 sym = symbol_find_or_make (name);
4876
4877 *input_line_pointer = endc;
4878
4879 if (S_IS_DEFINED (sym))
4880 {
4881 symbolS *label;
4882
809ffe0d 4883 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4884 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4885 {
4886 as_bad (_(".tc with no label"));
4887 ignore_rest_of_line ();
4888 return;
4889 }
4890
4891 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4892 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4893 S_SET_VALUE (label, S_GET_VALUE (sym));
4894
4895 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4896 ++input_line_pointer;
4897
4898 return;
4899 }
4900
4901 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4902 symbol_set_frag (sym, frag_now);
252b5132 4903 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4904 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4905 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4906
4907 ppc_frob_label (sym);
4908 }
4909
0baf16f2
AM		 4910#endif /* OBJ_XCOFF */
4911#ifdef OBJ_ELF
9c7977b3 4912 int align;
252b5132
RH		 4913
4914 /* Skip the TOC symbol name. */
4915 while (is_part_of_name (*input_line_pointer)
d13d4015 4916 || *input_line_pointer == ' '
252b5132
RH		 4917 || *input_line_pointer == '['
4918 || *input_line_pointer == ']'
4919 || *input_line_pointer == '{'
4920 || *input_line_pointer == '}')
4921 ++input_line_pointer;
4922
0baf16f2 4923 /* Align to a four/eight byte boundary. */
2b3c4602 4924 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4925 frag_align (align, 0, 0);
4926 record_alignment (now_seg, align);
0baf16f2 4927#endif /* OBJ_ELF */
252b5132
RH		 4928
4929 if (*input_line_pointer != ',')
4930 demand_empty_rest_of_line ();
4931 else
4932 {
4933 ++input_line_pointer;
2b3c4602 4934 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4935 }
4936}
0baf16f2
AM		 4937
4938/* Pseudo-op .machine. */
0baf16f2
AM		 4939
4940static void
98027b10 4941ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4942{
69c040df
AM		 4943 char *cpu_string;
4944#define MAX_HISTORY 100
fa452fa6 4945 static ppc_cpu_t *cpu_history;
69c040df
AM		 4946 static int curr_hist;
4947
4948 SKIP_WHITESPACE ();
4949
4950 if (*input_line_pointer == '"')
4951 {
4952 int len;
4953 cpu_string = demand_copy_C_string (&len);
4954 }
4955 else
4956 {
4957 char c;
4958 cpu_string = input_line_pointer;
4959 c = get_symbol_end ();
4960 cpu_string = xstrdup (cpu_string);
4961 *input_line_pointer = c;
4962 }
4963
4964 if (cpu_string != NULL)
4965 {
fa452fa6 4966 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4967 ppc_cpu_t new_cpu;
69c040df
AM		 4968 char *p;
4969
4970 for (p = cpu_string; *p != 0; p++)
4971 *p = TOLOWER (*p);
4972
4973 if (strcmp (cpu_string, "push") == 0)
4974 {
4975 if (cpu_history == NULL)
4976 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4977
4978 if (curr_hist >= MAX_HISTORY)
4979 as_bad (_(".machine stack overflow"));
4980 else
4981 cpu_history[curr_hist++] = ppc_cpu;
4982 }
4983 else if (strcmp (cpu_string, "pop") == 0)
4984 {
4985 if (curr_hist <= 0)
4986 as_bad (_(".machine stack underflow"));
4987 else
4988 ppc_cpu = cpu_history[--curr_hist];
4989 }
776fc418 4990 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4991 ppc_cpu = new_cpu;
69c040df
AM		 4992 else
4993 as_bad (_("invalid machine `%s'"), cpu_string);
4994
4995 if (ppc_cpu != old_cpu)
4996 ppc_setup_opcodes ();
4997 }
4998
4999 demand_empty_rest_of_line ();
0baf16f2 5000}
0baf16f2 5001#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 5002\f
5003#ifdef TE_PE
5004
99a814a1 5005/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 5006
5007/* Set the current section. */
5008static void
98027b10 5009ppc_set_current_section (segT new)
252b5132
RH		 5010{
5011 ppc_previous_section = ppc_current_section;
5012 ppc_current_section = new;
5013}
5014
5015/* pseudo-op: .previous
5016 behaviour: toggles the current section with the previous section.
5017 errors: None
99a814a1
AM		 5018 warnings: "No previous section" */
5019
252b5132 5020static void
98027b10 5021ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5022{
81d4177b 5023 if (ppc_previous_section == NULL)
252b5132 5024 {
d6ed37ed 5025 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5026 return;
5027 }
5028
99a814a1 5029 subseg_set (ppc_previous_section, 0);
252b5132 5030
99a814a1 5031 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5032}
5033
5034/* pseudo-op: .pdata
5035 behaviour: predefined read only data section
b34976b6 5036 double word aligned
252b5132
RH		 5037 errors: None
5038 warnings: None
5039 initial: .section .pdata "adr3"
b34976b6 5040 a - don't know -- maybe a misprint
252b5132
RH		 5041 d - initialized data
5042 r - readable
5043 3 - double word aligned (that would be 4 byte boundary)
5044
5045 commentary:
5046 Tag index tables (also known as the function table) for exception
99a814a1 5047 handling, debugging, etc. */
252b5132 5048
252b5132 5049static void
98027b10 5050ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5051{
81d4177b 5052 if (pdata_section == 0)
252b5132
RH		 5053 {
5054 pdata_section = subseg_new (".pdata", 0);
81d4177b 5055
252b5132
RH		 5056 bfd_set_section_flags (stdoutput, pdata_section,
5057 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5058 | SEC_READONLY | SEC_DATA ));
81d4177b 5059
252b5132
RH		 5060 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5061 }
5062 else
5063 {
99a814a1 5064 pdata_section = subseg_new (".pdata", 0);
252b5132 5065 }
99a814a1 5066 ppc_set_current_section (pdata_section);
252b5132
RH		 5067}
5068
5069/* pseudo-op: .ydata
5070 behaviour: predefined read only data section
b34976b6 5071 double word aligned
252b5132
RH		 5072 errors: None
5073 warnings: None
5074 initial: .section .ydata "drw3"
b34976b6 5075 a - don't know -- maybe a misprint
252b5132
RH		 5076 d - initialized data
5077 r - readable
5078 3 - double word aligned (that would be 4 byte boundary)
5079 commentary:
5080 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5081 debugging, etc. */
5082
252b5132 5083static void
98027b10 5084ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5085{
81d4177b 5086 if (ydata_section == 0)
252b5132
RH		 5087 {
5088 ydata_section = subseg_new (".ydata", 0);
5089 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5090 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5091 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5092
5093 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5094 }
5095 else
5096 {
5097 ydata_section = subseg_new (".ydata", 0);
5098 }
99a814a1 5099 ppc_set_current_section (ydata_section);
252b5132
RH		 5100}
5101
5102/* pseudo-op: .reldata
5103 behaviour: predefined read write data section
b34976b6 5104 double word aligned (4-byte)
252b5132
RH		 5105 FIXME: relocation is applied to it
5106 FIXME: what's the difference between this and .data?
5107 errors: None
5108 warnings: None
5109 initial: .section .reldata "drw3"
5110 d - initialized data
5111 r - readable
5112 w - writeable
5113 3 - double word aligned (that would be 8 byte boundary)
5114
5115 commentary:
5116 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5117 function descriptors, etc. */
5118
252b5132 5119static void
98027b10 5120ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5121{
5122 if (reldata_section == 0)
5123 {
5124 reldata_section = subseg_new (".reldata", 0);
5125
5126 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5127 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5128 | SEC_DATA));
252b5132
RH		 5129
5130 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5131 }
5132 else
5133 {
5134 reldata_section = subseg_new (".reldata", 0);
5135 }
99a814a1 5136 ppc_set_current_section (reldata_section);
252b5132
RH		 5137}
5138
5139/* pseudo-op: .rdata
5140 behaviour: predefined read only data section
b34976b6 5141 double word aligned
252b5132
RH		 5142 errors: None
5143 warnings: None
5144 initial: .section .rdata "dr3"
5145 d - initialized data
5146 r - readable
99a814a1
AM		 5147 3 - double word aligned (that would be 4 byte boundary) */
5148
252b5132 5149static void
98027b10 5150ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5151{
5152 if (rdata_section == 0)
5153 {
5154 rdata_section = subseg_new (".rdata", 0);
5155 bfd_set_section_flags (stdoutput, rdata_section,
5156 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5157 | SEC_READONLY | SEC_DATA ));
5158
5159 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5160 }
5161 else
5162 {
5163 rdata_section = subseg_new (".rdata", 0);
5164 }
99a814a1 5165 ppc_set_current_section (rdata_section);
252b5132
RH		 5166}
5167
5168/* pseudo-op: .ualong
81d4177b 5169 behaviour: much like .int, with the exception that no alignment is
b34976b6 5170 performed.
252b5132
RH		 5171 FIXME: test the alignment statement
5172 errors: None
99a814a1
AM		 5173 warnings: None */
5174
252b5132 5175static void
98027b10 5176ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5177{
99a814a1
AM		 5178 /* Try for long. */
5179 cons (4);
252b5132
RH		 5180}
5181
5182/* pseudo-op: .znop <symbol name>
5183 behaviour: Issue a nop instruction
b34976b6 5184 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5185 the supplied symbol name.
5186 errors: None
99a814a1
AM		 5187 warnings: Missing symbol name */
5188
252b5132 5189static void
98027b10 5190ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5191{
5192 unsigned long insn;
5193 const struct powerpc_opcode *opcode;
252b5132 5194 char *f;
252b5132 5195 symbolS *sym;
252b5132
RH		 5196 char *symbol_name;
5197 char c;
5198 char *name;
252b5132 5199
99a814a1 5200 /* Strip out the symbol name. */
252b5132
RH		 5201 symbol_name = input_line_pointer;
5202 c = get_symbol_end ();
5203
5204 name = xmalloc (input_line_pointer - symbol_name + 1);
5205 strcpy (name, symbol_name);
5206
5207 sym = symbol_find_or_make (name);
5208
5209 *input_line_pointer = c;
5210
5211 SKIP_WHITESPACE ();
5212
5213 /* Look up the opcode in the hash table. */
5214 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5215
99a814a1 5216 /* Stick in the nop. */
252b5132
RH		 5217 insn = opcode->opcode;
5218
5219 /* Write out the instruction. */
5220 f = frag_more (4);
5221 md_number_to_chars (f, insn, 4);
5222 fix_new (frag_now,
5223 f - frag_now->fr_literal,
5224 4,
5225 sym,
5226 0,
5227 0,
5228 BFD_RELOC_16_GOT_PCREL);
5229
5230}
5231
81d4177b
KH		 5232/* pseudo-op:
5233 behaviour:
5234 errors:
99a814a1
AM		 5235 warnings: */
5236
252b5132 5237static void
98027b10 5238ppc_pe_comm (int lcomm)
252b5132 5239{
98027b10
AM		 5240 char *name;
5241 char c;
5242 char *p;
252b5132 5243 offsetT temp;
98027b10 5244 symbolS *symbolP;
252b5132
RH		 5245 offsetT align;
5246
5247 name = input_line_pointer;
5248 c = get_symbol_end ();
5249
99a814a1 5250 /* just after name is now '\0'. */
252b5132
RH		 5251 p = input_line_pointer;
5252 *p = c;
5253 SKIP_WHITESPACE ();
5254 if (*input_line_pointer != ',')
5255 {
d6ed37ed 5256 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5257 ignore_rest_of_line ();
5258 return;
5259 }
5260
5261 input_line_pointer++; /* skip ',' */
5262 if ((temp = get_absolute_expression ()) < 0)
5263 {
5264 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5265 ignore_rest_of_line ();
5266 return;
5267 }
5268
5269 if (! lcomm)
5270 {
5271 /* The third argument to .comm is the alignment. */
5272 if (*input_line_pointer != ',')
5273 align = 3;
5274 else
5275 {
5276 ++input_line_pointer;
5277 align = get_absolute_expression ();
5278 if (align <= 0)
5279 {
5280 as_warn (_("ignoring bad alignment"));
5281 align = 3;
5282 }
5283 }
5284 }
5285
5286 *p = 0;
5287 symbolP = symbol_find_or_make (name);
5288
5289 *p = c;
5290 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5291 {
d6ed37ed 5292 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5293 S_GET_NAME (symbolP));
5294 ignore_rest_of_line ();
5295 return;
5296 }
5297
5298 if (S_GET_VALUE (symbolP))
5299 {
5300 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5301 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5302 S_GET_NAME (symbolP),
5303 (long) S_GET_VALUE (symbolP),
5304 (long) temp);
5305 }
5306 else
5307 {
5308 S_SET_VALUE (symbolP, (valueT) temp);
5309 S_SET_EXTERNAL (symbolP);
86ebace2 5310 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5311 }
5312
5313 demand_empty_rest_of_line ();
5314}
5315
5316/*
5317 * implement the .section pseudo op:
5318 * .section name {, "flags"}
5319 * ^ ^
5320 * | +--- optional flags: 'b' for bss
5321 * | 'i' for info
5322 * +-- section name 'l' for lib
5323 * 'n' for noload
5324 * 'o' for over
5325 * 'w' for data
5326 * 'd' (apparently m88k for data)
5327 * 'x' for text
5328 * But if the argument is not a quoted string, treat it as a
5329 * subsegment number.
5330 *
5331 * FIXME: this is a copy of the section processing from obj-coff.c, with
5332 * additions/changes for the moto-pas assembler support. There are three
5333 * categories:
5334 *
81d4177b 5335 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5336 * setting bits that bfd probably neither understands or uses. The
5337 * correct approach (?) will have to incorporate extra fields attached
5338 * to the section to hold the system specific stuff. (krk)
5339 *
5340 * Section Contents:
5341 * 'a' - unknown - referred to in documentation, but no definition supplied
5342 * 'c' - section has code
5343 * 'd' - section has initialized data
5344 * 'u' - section has uninitialized data
5345 * 'i' - section contains directives (info)
5346 * 'n' - section can be discarded
5347 * 'R' - remove section at link time
5348 *
5349 * Section Protection:
5350 * 'r' - section is readable
5351 * 'w' - section is writeable
5352 * 'x' - section is executable
5353 * 's' - section is sharable
5354 *
5355 * Section Alignment:
5356 * '0' - align to byte boundary
5357 * '1' - align to halfword undary
5358 * '2' - align to word boundary
5359 * '3' - align to doubleword boundary
5360 * '4' - align to quadword boundary
5361 * '5' - align to 32 byte boundary
5362 * '6' - align to 64 byte boundary
5363 *
5364 */
5365
5366void
98027b10 5367ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5368{
99a814a1 5369 /* Strip out the section name. */
252b5132
RH		 5370 char *section_name;
5371 char c;
5372 char *name;
5373 unsigned int exp;
5374 flagword flags;
5375 segT sec;
5376 int align;
5377
5378 section_name = input_line_pointer;
5379 c = get_symbol_end ();
5380
5381 name = xmalloc (input_line_pointer - section_name + 1);
5382 strcpy (name, section_name);
5383
5384 *input_line_pointer = c;
5385
5386 SKIP_WHITESPACE ();
5387
5388 exp = 0;
5389 flags = SEC_NO_FLAGS;
5390
5391 if (strcmp (name, ".idata$2") == 0)
5392 {
5393 align = 0;
5394 }
5395 else if (strcmp (name, ".idata$3") == 0)
5396 {
5397 align = 0;
5398 }
5399 else if (strcmp (name, ".idata$4") == 0)
5400 {
5401 align = 2;
5402 }
5403 else if (strcmp (name, ".idata$5") == 0)
5404 {
5405 align = 2;
5406 }
5407 else if (strcmp (name, ".idata$6") == 0)
5408 {
5409 align = 1;
5410 }
5411 else
99a814a1
AM		 5412 /* Default alignment to 16 byte boundary. */
5413 align = 4;
252b5132
RH		 5414
5415 if (*input_line_pointer == ',')
5416 {
5417 ++input_line_pointer;
5418 SKIP_WHITESPACE ();
5419 if (*input_line_pointer != '"')
5420 exp = get_absolute_expression ();
5421 else
5422 {
5423 ++input_line_pointer;
5424 while (*input_line_pointer != '"'
5425 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5426 {
5427 switch (*input_line_pointer)
5428 {
5429 /* Section Contents */
5430 case 'a': /* unknown */
d6ed37ed 5431 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5432 break;
5433 case 'c': /* code section */
81d4177b 5434 flags |= SEC_CODE;
252b5132
RH		 5435 break;
5436 case 'd': /* section has initialized data */
5437 flags |= SEC_DATA;
5438 break;
5439 case 'u': /* section has uninitialized data */
5440 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5441 in winnt.h */
5442 flags |= SEC_ROM;
5443 break;
5444 case 'i': /* section contains directives (info) */
5445 /* FIXME: This is IMAGE_SCN_LNK_INFO
5446 in winnt.h */
5447 flags |= SEC_HAS_CONTENTS;
5448 break;
5449 case 'n': /* section can be discarded */
81d4177b 5450 flags &=~ SEC_LOAD;
252b5132
RH		 5451 break;
5452 case 'R': /* Remove section at link time */
5453 flags |= SEC_NEVER_LOAD;
5454 break;
8d452c78 5455#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5456 /* Section Protection */
5457 case 'r': /* section is readable */
5458 flags |= IMAGE_SCN_MEM_READ;
5459 break;
5460 case 'w': /* section is writeable */
5461 flags |= IMAGE_SCN_MEM_WRITE;
5462 break;
5463 case 'x': /* section is executable */
5464 flags |= IMAGE_SCN_MEM_EXECUTE;
5465 break;
5466 case 's': /* section is sharable */
5467 flags |= IMAGE_SCN_MEM_SHARED;
5468 break;
5469
5470 /* Section Alignment */
5471 case '0': /* align to byte boundary */
5472 flags |= IMAGE_SCN_ALIGN_1BYTES;
5473 align = 0;
5474 break;
5475 case '1': /* align to halfword boundary */
5476 flags |= IMAGE_SCN_ALIGN_2BYTES;
5477 align = 1;
5478 break;
5479 case '2': /* align to word boundary */
5480 flags |= IMAGE_SCN_ALIGN_4BYTES;
5481 align = 2;
5482 break;
5483 case '3': /* align to doubleword boundary */
5484 flags |= IMAGE_SCN_ALIGN_8BYTES;
5485 align = 3;
5486 break;
5487 case '4': /* align to quadword boundary */
5488 flags |= IMAGE_SCN_ALIGN_16BYTES;
5489 align = 4;
5490 break;
5491 case '5': /* align to 32 byte boundary */
5492 flags |= IMAGE_SCN_ALIGN_32BYTES;
5493 align = 5;
5494 break;
5495 case '6': /* align to 64 byte boundary */
5496 flags |= IMAGE_SCN_ALIGN_64BYTES;
5497 align = 6;
5498 break;
8d452c78 5499#endif
252b5132 5500 default:
99a814a1
AM		 5501 as_bad (_("unknown section attribute '%c'"),
5502 *input_line_pointer);
252b5132
RH		 5503 break;
5504 }
5505 ++input_line_pointer;
5506 }
5507 if (*input_line_pointer == '"')
5508 ++input_line_pointer;
5509 }
5510 }
5511
5512 sec = subseg_new (name, (subsegT) exp);
5513
99a814a1 5514 ppc_set_current_section (sec);
252b5132
RH		 5515
5516 if (flags != SEC_NO_FLAGS)
5517 {
5518 if (! bfd_set_section_flags (stdoutput, sec, flags))
5519 as_bad (_("error setting flags for \"%s\": %s"),
5520 bfd_section_name (stdoutput, sec),
5521 bfd_errmsg (bfd_get_error ()));
5522 }
5523
99a814a1 5524 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5525}
5526
5527static void
98027b10 5528ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5529{
5530 char *name;
5531 char endc;
5532 symbolS *ext_sym;
5533
5534 name = input_line_pointer;
5535 endc = get_symbol_end ();
5536
5537 ext_sym = symbol_find_or_make (name);
5538
5539 *input_line_pointer = endc;
5540
5541 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5542 SF_SET_FUNCTION (ext_sym);
5543 SF_SET_PROCESS (ext_sym);
5544 coff_add_linesym (ext_sym);
5545
5546 demand_empty_rest_of_line ();
5547}
5548
5549static void
98027b10 5550ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5551{
5552 if (tocdata_section == 0)
5553 {
5554 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5555 /* FIXME: section flags won't work. */
252b5132
RH		 5556 bfd_set_section_flags (stdoutput, tocdata_section,
5557 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5558 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5559
5560 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5561 }
5562 else
5563 {
5564 rdata_section = subseg_new (".tocd", 0);
5565 }
5566
99a814a1 5567 ppc_set_current_section (tocdata_section);
252b5132
RH		 5568
5569 demand_empty_rest_of_line ();
5570}
5571
5572/* Don't adjust TOC relocs to use the section symbol. */
5573
5574int
98027b10 5575ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5576{
5577 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5578}
5579
5580#endif
5581\f
5582#ifdef OBJ_XCOFF
5583
5584/* XCOFF specific symbol and file handling. */
5585
5586/* Canonicalize the symbol name. We use the to force the suffix, if
5587 any, to use square brackets, and to be in upper case. */
5588
5589char *
98027b10 5590ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5591{
5592 char *s;
5593
5594 if (ppc_stab_symbol)
5595 return name;
5596
5597 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5598 ;
5599 if (*s != '\0')
5600 {
5601 char brac;
5602
5603 if (*s == '[')
5604 brac = ']';
5605 else
5606 {
5607 *s = '[';
5608 brac = '}';
5609 }
5610
5611 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5612 *s = TOUPPER (*s);
252b5132
RH		 5613
5614 if (*s == '\0' || s[1] != '\0')
5615 as_bad (_("bad symbol suffix"));
5616
5617 *s = ']';
5618 }
5619
5620 return name;
5621}
5622
5623/* Set the class of a symbol based on the suffix, if any. This is
5624 called whenever a new symbol is created. */
5625
5626void
98027b10 5627ppc_symbol_new_hook (symbolS *sym)
252b5132 5628{
809ffe0d 5629 struct ppc_tc_sy *tc;
252b5132
RH		 5630 const char *s;
5631
809ffe0d
ILT		 5632 tc = symbol_get_tc (sym);
5633 tc->next = NULL;
5634 tc->output = 0;
96d56e9f 5635 tc->symbol_class = -1;
809ffe0d
ILT		 5636 tc->real_name = NULL;
5637 tc->subseg = 0;
5638 tc->align = 0;
85645aed
TG		 5639 tc->u.size = NULL;
5640 tc->u.dw = NULL;
809ffe0d 5641 tc->within = NULL;
252b5132
RH		 5642
5643 if (ppc_stab_symbol)
5644 return;
5645
5646 s = strchr (S_GET_NAME (sym), '[');
5647 if (s == (const char *) NULL)
5648 {
5649 /* There is no suffix. */
5650 return;
5651 }
5652
5653 ++s;
5654
5655 switch (s[0])
5656 {
5657 case 'B':
5658 if (strcmp (s, "BS]") == 0)
96d56e9f 5659 tc->symbol_class = XMC_BS;
252b5132
RH		 5660 break;
5661 case 'D':
5662 if (strcmp (s, "DB]") == 0)
96d56e9f 5663 tc->symbol_class = XMC_DB;
252b5132 5664 else if (strcmp (s, "DS]") == 0)
96d56e9f 5665 tc->symbol_class = XMC_DS;
252b5132
RH		 5666 break;
5667 case 'G':
5668 if (strcmp (s, "GL]") == 0)
96d56e9f 5669 tc->symbol_class = XMC_GL;
252b5132
RH		 5670 break;
5671 case 'P':
5672 if (strcmp (s, "PR]") == 0)
96d56e9f 5673 tc->symbol_class = XMC_PR;
252b5132
RH		 5674 break;
5675 case 'R':
5676 if (strcmp (s, "RO]") == 0)
96d56e9f 5677 tc->symbol_class = XMC_RO;
252b5132 5678 else if (strcmp (s, "RW]") == 0)
96d56e9f 5679 tc->symbol_class = XMC_RW;
252b5132
RH		 5680 break;
5681 case 'S':
5682 if (strcmp (s, "SV]") == 0)
96d56e9f 5683 tc->symbol_class = XMC_SV;
252b5132
RH		 5684 break;
5685 case 'T':
5686 if (strcmp (s, "TC]") == 0)
96d56e9f 5687 tc->symbol_class = XMC_TC;
252b5132 5688 else if (strcmp (s, "TI]") == 0)
96d56e9f 5689 tc->symbol_class = XMC_TI;
252b5132 5690 else if (strcmp (s, "TB]") == 0)
96d56e9f 5691 tc->symbol_class = XMC_TB;
252b5132 5692 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5693 tc->symbol_class = XMC_TC0;
252b5132
RH		 5694 break;
5695 case 'U':
5696 if (strcmp (s, "UA]") == 0)
96d56e9f 5697 tc->symbol_class = XMC_UA;
252b5132 5698 else if (strcmp (s, "UC]") == 0)
96d56e9f 5699 tc->symbol_class = XMC_UC;
252b5132
RH		 5700 break;
5701 case 'X':
5702 if (strcmp (s, "XO]") == 0)
96d56e9f 5703 tc->symbol_class = XMC_XO;
252b5132
RH		 5704 break;
5705 }
5706
96d56e9f 5707 if (tc->symbol_class == -1)
d6ed37ed 5708 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5709}
5710
5711/* Set the class of a label based on where it is defined. This
5712 handles symbols without suffixes. Also, move the symbol so that it
5713 follows the csect symbol. */
5714
5715void
98027b10 5716ppc_frob_label (symbolS *sym)
252b5132
RH		 5717{
5718 if (ppc_current_csect != (symbolS *) NULL)
5719 {
96d56e9f
NC		 5720 if (symbol_get_tc (sym)->symbol_class == -1)
5721 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5722
5723 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5724 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5725 &symbol_rootP, &symbol_lastP);
5726 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5727 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5728 }
07a53e5c
RH		 5729
5730#ifdef OBJ_ELF
5731 dwarf2_emit_label (sym);
5732#endif
252b5132
RH		 5733}
5734
5735/* This variable is set by ppc_frob_symbol if any absolute symbols are
5736 seen. It tells ppc_adjust_symtab whether it needs to look through
5737 the symbols. */
5738
b34976b6 5739static bfd_boolean ppc_saw_abs;
252b5132
RH		 5740
5741/* Change the name of a symbol just before writing it out. Set the
5742 real name if the .rename pseudo-op was used. Otherwise, remove any
5743 class suffix. Return 1 if the symbol should not be included in the
5744 symbol table. */
5745
5746int
98027b10 5747ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5748{
5749 static symbolS *ppc_last_function;
5750 static symbolS *set_end;
5751
5752 /* Discard symbols that should not be included in the output symbol
5753 table. */
809ffe0d
ILT		 5754 if (! symbol_used_in_reloc_p (sym)
5755 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5756 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5757 && ! symbol_get_tc (sym)->output
252b5132
RH		 5758 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5759 return 1;
5760
a161fe53
AM		 5761 /* This one will disappear anyway. Don't make a csect sym for it. */
5762 if (sym == abs_section_sym)
5763 return 1;
5764
809ffe0d
ILT		 5765 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5766 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5767 else
5768 {
5769 const char *name;
5770 const char *s;
5771
5772 name = S_GET_NAME (sym);
5773 s = strchr (name, '[');
5774 if (s != (char *) NULL)
5775 {
5776 unsigned int len;
5777 char *snew;
5778
5779 len = s - name;
5780 snew = xmalloc (len + 1);
5781 memcpy (snew, name, len);
5782 snew[len] = '\0';
5783
5784 S_SET_NAME (sym, snew);
5785 }
5786 }
5787
5788 if (set_end != (symbolS *) NULL)
5789 {
5790 SA_SET_SYM_ENDNDX (set_end, sym);
5791 set_end = NULL;
5792 }
5793
5794 if (SF_GET_FUNCTION (sym))
5795 {
5796 if (ppc_last_function != (symbolS *) NULL)
5797 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5798 ppc_last_function = sym;
85645aed 5799 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5800 {
85645aed 5801 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5802 SA_SET_SYM_FSIZE (sym,
85645aed 5803 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5804 }
5805 }
5806 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5807 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5808 {
5809 if (ppc_last_function == (symbolS *) NULL)
5810 as_bad (_(".ef with no preceding .function"));
5811 else
5812 {
5813 set_end = ppc_last_function;
5814 ppc_last_function = NULL;
5815
5816 /* We don't have a C_EFCN symbol, but we need to force the
5817 COFF backend to believe that it has seen one. */
5818 coff_last_function = NULL;
5819 }
5820 }
5821
670ec21d 5822 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5823 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5824 && S_GET_STORAGE_CLASS (sym) != C_FILE
5825 && S_GET_STORAGE_CLASS (sym) != C_FCN
5826 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5827 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5828 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5829 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5830 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5831 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5832 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5833
5834 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5835 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5836 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5837 {
5838 int i;
5839 union internal_auxent *a;
5840
5841 /* Create a csect aux. */
5842 i = S_GET_NUMBER_AUXILIARY (sym);
5843 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5844 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5845 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5846 {
5847 /* This is the TOC table. */
5848 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5849 a->x_csect.x_scnlen.l = 0;
5850 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5851 }
809ffe0d 5852 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5853 {
5854 /* This is a csect symbol. x_scnlen is the size of the
5855 csect. */
809ffe0d 5856 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5857 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5858 S_GET_SEGMENT (sym))
5859 - S_GET_VALUE (sym));
5860 else
5861 {
6386f3a7 5862 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5863 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5864 - S_GET_VALUE (sym));
5865 }
809ffe0d 5866 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5867 }
5868 else if (S_GET_SEGMENT (sym) == bss_section)
5869 {
5870 /* This is a common symbol. */
809ffe0d
ILT		 5871 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5872 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5873 if (S_IS_EXTERNAL (sym))
96d56e9f 5874 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5875 else
96d56e9f 5876 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5877 }
5878 else if (S_GET_SEGMENT (sym) == absolute_section)
5879 {
5880 /* This is an absolute symbol. The csect will be created by
99a814a1 5881 ppc_adjust_symtab. */
b34976b6 5882 ppc_saw_abs = TRUE;
252b5132 5883 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5884 if (symbol_get_tc (sym)->symbol_class == -1)
5885 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5886 }
5887 else if (! S_IS_DEFINED (sym))
5888 {
5889 /* This is an external symbol. */
5890 a->x_csect.x_scnlen.l = 0;
5891 a->x_csect.x_smtyp = XTY_ER;
5892 }
96d56e9f 5893 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5894 {
5895 symbolS *next;
5896
5897 /* This is a TOC definition. x_scnlen is the size of the
5898 TOC entry. */
5899 next = symbol_next (sym);
96d56e9f 5900 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5901 next = symbol_next (next);
5902 if (next == (symbolS *) NULL
96d56e9f 5903 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5904 {
5905 if (ppc_after_toc_frag == (fragS *) NULL)
5906 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5907 data_section)
5908 - S_GET_VALUE (sym));
5909 else
5910 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5911 - S_GET_VALUE (sym));
5912 }
5913 else
5914 {
6386f3a7 5915 resolve_symbol_value (next);
252b5132
RH		 5916 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5917 - S_GET_VALUE (sym));
5918 }
5919 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5920 }
5921 else
5922 {
5923 symbolS *csect;
5924
5925 /* This is a normal symbol definition. x_scnlen is the
5926 symbol index of the containing csect. */
5927 if (S_GET_SEGMENT (sym) == text_section)
5928 csect = ppc_text_csects;
5929 else if (S_GET_SEGMENT (sym) == data_section)
5930 csect = ppc_data_csects;
5931 else
5932 abort ();
5933
5934 /* Skip the initial dummy symbol. */
809ffe0d 5935 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5936
5937 if (csect == (symbolS *) NULL)
5938 {
5939 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5940 a->x_csect.x_scnlen.l = 0;
5941 }
5942 else
5943 {
809ffe0d 5944 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5945 {
6386f3a7 5946 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5947 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5948 > S_GET_VALUE (sym))
252b5132 5949 break;
809ffe0d 5950 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5951 }
5952
809ffe0d
ILT		 5953 a->x_csect.x_scnlen.p =
5954 coffsymbol (symbol_get_bfdsym (csect))->native;
5955 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5956 1;
252b5132
RH		 5957 }
5958 a->x_csect.x_smtyp = XTY_LD;
5959 }
81d4177b 5960
252b5132
RH		 5961 a->x_csect.x_parmhash = 0;
5962 a->x_csect.x_snhash = 0;
96d56e9f 5963 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5964 a->x_csect.x_smclas = XMC_PR;
5965 else
96d56e9f 5966 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5967 a->x_csect.x_stab = 0;
5968 a->x_csect.x_snstab = 0;
5969
5970 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5971 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5972 }
5973 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5974 {
5975 /* We want the value to be the symbol index of the referenced
5976 csect symbol. BFD will do that for us if we set the right
5977 flags. */
b782de16
AM		 5978 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5979 combined_entry_type *c = coffsymbol (bsym)->native;
5980
5981 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5982 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5983 }
5984 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5985 {
5986 symbolS *block;
c734e7e3 5987 valueT base;
252b5132 5988
809ffe0d 5989 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5990 if (block)
5991 {
5992 /* The value is the offset from the enclosing csect. */
5993 symbolS *csect;
5994
5995 csect = symbol_get_tc (block)->within;
5996 resolve_symbol_value (csect);
5997 base = S_GET_VALUE (csect);
5998 }
5999 else
6000 base = 0;
6001
6002 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 6003 }
6004 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6005 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6006 {
6007 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 6008 BFD will do that for us if we set the right flags. We have
6009 already set the value correctly. */
809ffe0d 6010 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6011 }
6012
6013 return 0;
6014}
6015
6016/* Adjust the symbol table. This creates csect symbols for all
6017 absolute symbols. */
6018
6019void
98027b10 6020ppc_adjust_symtab (void)
252b5132
RH		 6021{
6022 symbolS *sym;
6023
6024 if (! ppc_saw_abs)
6025 return;
6026
6027 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6028 {
6029 symbolS *csect;
6030 int i;
6031 union internal_auxent *a;
6032
6033 if (S_GET_SEGMENT (sym) != absolute_section)
6034 continue;
6035
6036 csect = symbol_create (".abs[XO]", absolute_section,
6037 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6038 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6039 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6040 i = S_GET_NUMBER_AUXILIARY (csect);
6041 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6042 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6043 a->x_csect.x_scnlen.l = 0;
6044 a->x_csect.x_smtyp = XTY_SD;
6045 a->x_csect.x_parmhash = 0;
6046 a->x_csect.x_snhash = 0;
6047 a->x_csect.x_smclas = XMC_XO;
6048 a->x_csect.x_stab = 0;
6049 a->x_csect.x_snstab = 0;
6050
6051 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6052
6053 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6054 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6055 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6056 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6057 }
6058
b34976b6 6059 ppc_saw_abs = FALSE;
252b5132
RH		 6060}
6061
6062/* Set the VMA for a section. This is called on all the sections in
6063 turn. */
6064
6065void
98027b10 6066ppc_frob_section (asection *sec)
252b5132 6067{
931e13a6 6068 static bfd_vma vma = 0;
252b5132 6069
85645aed
TG		 6070 /* Dwarf sections start at 0. */
6071 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6072 return;
6073
931e13a6 6074 vma = md_section_align (sec, vma);
252b5132
RH		 6075 bfd_set_section_vma (stdoutput, sec, vma);
6076 vma += bfd_section_size (stdoutput, sec);
6077}
6078
6079#endif /* OBJ_XCOFF */
6080\f
252b5132 6081char *
98027b10 6082md_atof (int type, char *litp, int *sizep)
252b5132 6083{
499ac353 6084 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6085}
6086
6087/* Write a value out to the object file, using the appropriate
6088 endianness. */
6089
6090void
98027b10 6091md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6092{
6093 if (target_big_endian)
6094 number_to_chars_bigendian (buf, val, n);
6095 else
6096 number_to_chars_littleendian (buf, val, n);
6097}
6098
6099/* Align a section (I don't know why this is machine dependent). */
6100
6101valueT
3aeeedbb 6102md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6103{
3aeeedbb
AM		 6104#ifdef OBJ_ELF
6105 return addr;
6106#else
252b5132
RH		 6107 int align = bfd_get_section_alignment (stdoutput, seg);
6108
6109 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6110#endif
252b5132
RH		 6111}
6112
6113/* We don't have any form of relaxing. */
6114
6115int
98027b10
AM		 6116md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6117 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6118{
6119 abort ();
6120 return 0;
6121}
6122
6123/* Convert a machine dependent frag. We never generate these. */
6124
6125void
98027b10
AM		 6126md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6127 asection *sec ATTRIBUTE_UNUSED,
6128 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6129{
6130 abort ();
6131}
6132
6133/* We have no need to default values of symbols. */
6134
252b5132 6135symbolS *
98027b10 6136md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6137{
6138 return 0;
6139}
6140\f
6141/* Functions concerning relocs. */
6142
6143/* The location from which a PC relative jump should be calculated,
6144 given a PC relative reloc. */
6145
6146long
98027b10 6147md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6148{
6149 return fixp->fx_frag->fr_address + fixp->fx_where;
6150}
6151
6152#ifdef OBJ_XCOFF
6153
6154/* This is called to see whether a fixup should be adjusted to use a
6155 section symbol. We take the opportunity to change a fixup against
6156 a symbol in the TOC subsegment into a reloc against the
6157 corresponding .tc symbol. */
6158
6159int
98027b10 6160ppc_fix_adjustable (fixS *fix)
252b5132 6161{
b782de16
AM		 6162 valueT val = resolve_symbol_value (fix->fx_addsy);
6163 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6164 TC_SYMFIELD_TYPE *tc;
6165
6166 if (symseg == absolute_section)
6167 return 0;
252b5132 6168
85645aed
TG		 6169 /* Always adjust symbols in debugging sections. */
6170 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6171 return 1;
6172
252b5132 6173 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6174 && fix->fx_addsy != ppc_toc_csect
b782de16 6175 && symseg == data_section
252b5132
RH		 6176 && val >= ppc_toc_frag->fr_address
6177 && (ppc_after_toc_frag == (fragS *) NULL
6178 || val < ppc_after_toc_frag->fr_address))
6179 {
6180 symbolS *sy;
6181
6182 for (sy = symbol_next (ppc_toc_csect);
6183 sy != (symbolS *) NULL;
6184 sy = symbol_next (sy))
6185 {
b782de16
AM		 6186 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6187
96d56e9f 6188 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6189 continue;
96d56e9f 6190 if (sy_tc->symbol_class != XMC_TC)
252b5132 6191 break;
b782de16 6192 if (val == resolve_symbol_value (sy))
252b5132
RH		 6193 {
6194 fix->fx_addsy = sy;
6195 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6196 return 0;
6197 }
6198 }
6199
6200 as_bad_where (fix->fx_file, fix->fx_line,
6201 _("symbol in .toc does not match any .tc"));
6202 }
6203
6204 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6205 tc = symbol_get_tc (fix->fx_addsy);
6206 if (tc->subseg == 0
96d56e9f
NC		 6207 && tc->symbol_class != XMC_TC0
6208 && tc->symbol_class != XMC_TC
b782de16 6209 && symseg != bss_section
252b5132 6210 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6211 && (symseg != data_section
252b5132
RH		 6212 || ppc_toc_csect == NULL
6213 || val < ppc_toc_frag->fr_address
6214 || (ppc_after_toc_frag != NULL
6215 && val >= ppc_after_toc_frag->fr_address)))
6216 {
2fb4b302 6217 symbolS *csect = tc->within;
252b5132 6218
2fb4b302
TG		 6219 /* If the symbol was not declared by a label (eg: a section symbol),
6220 use the section instead of the csect. This doesn't happen in
6221 normal AIX assembly code. */
6222 if (csect == NULL)
6223 csect = seg_info (symseg)->sym;
252b5132 6224
2fb4b302
TG		 6225 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6226 fix->fx_addsy = csect;
252b5132 6227
b782de16 6228 return 0;
252b5132
RH		 6229 }
6230
6231 /* Adjust a reloc against a .lcomm symbol to be against the base
6232 .lcomm. */
b782de16 6233 if (symseg == bss_section
252b5132
RH		 6234 && ! S_IS_EXTERNAL (fix->fx_addsy))
6235 {
b782de16
AM		 6236 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6237
6238 fix->fx_offset += val - resolve_symbol_value (sy);
6239 fix->fx_addsy = sy;
252b5132
RH		 6240 }
6241
6242 return 0;
6243}
6244
6245/* A reloc from one csect to another must be kept. The assembler
6246 will, of course, keep relocs between sections, and it will keep
6247 absolute relocs, but we need to force it to keep PC relative relocs
6248 between two csects in the same section. */
6249
6250int
98027b10 6251ppc_force_relocation (fixS *fix)
252b5132
RH		 6252{
6253 /* At this point fix->fx_addsy should already have been converted to
6254 a csect symbol. If the csect does not include the fragment, then
6255 we need to force the relocation. */
6256 if (fix->fx_pcrel
6257 && fix->fx_addsy != NULL
809ffe0d
ILT		 6258 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6259 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6260 > fix->fx_frag->fr_address)
6261 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6262 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6263 <= fix->fx_frag->fr_address))))
6264 return 1;
6265
ae6063d4 6266 return generic_force_reloc (fix);
252b5132
RH		 6267}
6268
2fb4b302
TG		 6269void
6270ppc_new_dot_label (symbolS *sym)
6271{
6272 /* Anchor this label to the current csect for relocations. */
6273 symbol_get_tc (sym)->within = ppc_current_csect;
6274}
6275
252b5132
RH		 6276#endif /* OBJ_XCOFF */
6277
0baf16f2 6278#ifdef OBJ_ELF
a161fe53
AM		 6279/* If this function returns non-zero, it guarantees that a relocation
6280 will be emitted for a fixup. */
6281
6282int
98027b10 6283ppc_force_relocation (fixS *fix)
a161fe53
AM		 6284{
6285 /* Branch prediction relocations must force a relocation, as must
6286 the vtable description relocs. */
6287 switch (fix->fx_r_type)
6288 {
6289 case BFD_RELOC_PPC_B16_BRTAKEN:
6290 case BFD_RELOC_PPC_B16_BRNTAKEN:
6291 case BFD_RELOC_PPC_BA16_BRTAKEN:
6292 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6293 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6294 case BFD_RELOC_PPC64_TOC:
a161fe53 6295 return 1;
6911b7dc
AM		 6296 case BFD_RELOC_PPC_B26:
6297 case BFD_RELOC_PPC_BA26:
6298 case BFD_RELOC_PPC_B16:
6299 case BFD_RELOC_PPC_BA16:
6300 /* All branch fixups targeting a localentry symbol must
6301 force a relocation. */
6302 if (fix->fx_addsy)
6303 {
6304 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6305 elf_symbol_type *elfsym
6306 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6307 gas_assert (elfsym);
6308 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6309 return 1;
6310 }
6311 break;
a161fe53
AM		 6312 default:
6313 break;
6314 }
6315
cdba85ec
AM		 6316 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6317 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6318 return 1;
6319
ae6063d4 6320 return generic_force_reloc (fix);
a161fe53
AM		 6321}
6322
0baf16f2 6323int
98027b10 6324ppc_fix_adjustable (fixS *fix)
252b5132 6325{
6911b7dc
AM		 6326 switch (fix->fx_r_type)
6327 {
6328 /* All branch fixups targeting a localentry symbol must
6329 continue using the symbol. */
6330 case BFD_RELOC_PPC_B26:
6331 case BFD_RELOC_PPC_BA26:
6332 case BFD_RELOC_PPC_B16:
6333 case BFD_RELOC_PPC_BA16:
6334 case BFD_RELOC_PPC_B16_BRTAKEN:
6335 case BFD_RELOC_PPC_B16_BRNTAKEN:
6336 case BFD_RELOC_PPC_BA16_BRTAKEN:
6337 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6338 if (fix->fx_addsy)
6339 {
6340 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6341 elf_symbol_type *elfsym
6342 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6343 gas_assert (elfsym);
6344 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6345 return 0;
6346 }
6347 break;
6348 default:
6349 break;
6350 }
6351
0baf16f2
AM		 6352 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6353 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6354 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6355 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6356 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6357 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6358 && fix->fx_r_type != BFD_RELOC_GPREL16
6359 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6360 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6361 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6362 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6363}
0baf16f2 6364#endif
252b5132 6365
b9c361e0
JL		 6366void
6367ppc_frag_check (struct frag *fragP)
6368{
6369 if (!fragP->has_code)
6370 return;
6371
6372 if (ppc_mach() == bfd_mach_ppc_vle)
6373 {
6374 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6375 as_bad (_("instruction address is not a multiple of 2"));
6376 }
6377 else
6378 {
6379 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6380 as_bad (_("instruction address is not a multiple of 4"));
6381 }
6382}
6383
3aeeedbb
AM		 6384/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6385 rs_align_code frag. */
6386
6387void
6388ppc_handle_align (struct frag *fragP)
6389{
6390 valueT count = (fragP->fr_next->fr_address
6391 - (fragP->fr_address + fragP->fr_fix));
6392
b9c361e0
JL		 6393 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6394 {
6395 char *dest = fragP->fr_literal + fragP->fr_fix;
6396
6397 fragP->fr_var = 2;
6398 md_number_to_chars (dest, 0x4400, 2);
6399 }
6400 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6401 {
6402 char *dest = fragP->fr_literal + fragP->fr_fix;
6403
6404 fragP->fr_var = 4;
cef4f754
AM		 6405
6406 if (count > 4 * nop_limit && count < 0x2000000)
6407 {
6408 struct frag *rest;
6409
6410 /* Make a branch, then follow with nops. Insert another
6411 frag to handle the nops. */
6412 md_number_to_chars (dest, 0x48000000 + count, 4);
6413 count -= 4;
6414 if (count == 0)
6415 return;
6416
6417 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6418 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6419 fragP->fr_next = rest;
6420 fragP = rest;
6421 rest->fr_address += rest->fr_fix + 4;
6422 rest->fr_fix = 0;
6423 /* If we leave the next frag as rs_align_code we'll come here
6424 again, resulting in a bunch of branches rather than a
6425 branch followed by nops. */
6426 rest->fr_type = rs_align;
6427 dest = rest->fr_literal;
6428 }
6429
3aeeedbb
AM		 6430 md_number_to_chars (dest, 0x60000000, 4);
6431
42240548 6432 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6433 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6434 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6435 {
5817ffd1 6436 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6437 terminating one. Do this by inserting an rs_fill frag immediately
6438 after this one, with its address set to the last nop location.
6439 This will automatically reduce the number of nops in the current
6440 frag by one. */
3aeeedbb
AM		 6441 if (count > 4)
6442 {
6443 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6444
6445 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6446 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6447 group_nop->fr_fix = 0;
6448 group_nop->fr_offset = 1;
6449 group_nop->fr_type = rs_fill;
6450 fragP->fr_next = group_nop;
6451 dest = group_nop->fr_literal;
6452 }
6453
5817ffd1
PB		 6454 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6455 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6456 {
6457 if (ppc_cpu & PPC_OPCODE_E500MC)
6458 /* e500mc group terminating nop: "ori 0,0,0". */
6459 md_number_to_chars (dest, 0x60000000, 4);
6460 else
5817ffd1 6461 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6462 md_number_to_chars (dest, 0x60420000, 4);
6463 }
42240548
PB		 6464 else
6465 /* power6 group terminating nop: "ori 1,1,0". */
6466 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6467 }
6468 }
6469}
6470
252b5132 6471/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6472 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6473
94f592af 6474void
98027b10 6475md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6476{
94f592af 6477 valueT value = * valP;
5656a981
AM		 6478 offsetT fieldval;
6479 const struct powerpc_operand *operand;
252b5132
RH		 6480
6481#ifdef OBJ_ELF
94f592af 6482 if (fixP->fx_addsy != NULL)
252b5132 6483 {
a161fe53 6484 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6485 if (fixP->fx_pcrel)
6486 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6487 }
6488 else
94f592af 6489 fixP->fx_done = 1;
252b5132 6490#else
a161fe53 6491 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6492 the symbol values. If we are doing this relocation the code in
6493 write.c is going to call bfd_install_relocation, which is also
6494 going to use the symbol value. That means that if the reloc is
6495 fully resolved we want to use *valP since bfd_install_relocation is
6496 not being used.
9f0eb232
RS		 6497 However, if the reloc is not fully resolved we do not want to
6498 use *valP, and must use fx_offset instead. If the relocation
6499 is PC-relative, we then need to re-apply md_pcrel_from_section
6500 to this new relocation value. */
94f592af
NC		 6501 if (fixP->fx_addsy == (symbolS *) NULL)
6502 fixP->fx_done = 1;
6503
252b5132 6504 else
9f0eb232
RS		 6505 {
6506 value = fixP->fx_offset;
6507 if (fixP->fx_pcrel)
6508 value -= md_pcrel_from_section (fixP, seg);
6509 }
a161fe53
AM		 6510#endif
6511
6512 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6513 {
a161fe53
AM		 6514 /* We can't actually support subtracting a symbol. */
6515 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6516 }
252b5132 6517
5656a981 6518 operand = NULL;
3b8b57a9 6519 if (fixP->fx_pcrel_adjust != 0)
252b5132 6520 {
5656a981 6521 /* This is a fixup on an instruction. */
3b8b57a9 6522 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6523
5656a981 6524 operand = &powerpc_operands[opindex];
252b5132 6525#ifdef OBJ_XCOFF
0baf16f2
AM		 6526 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6527 does not generate a reloc. It uses the offset of `sym' within its
6528 csect. Other usages, such as `.long sym', generate relocs. This
6529 is the documented behaviour of non-TOC symbols. */
252b5132 6530 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6531 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6532 && operand->shift == 0
2b3c4602 6533 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6534 && fixP->fx_addsy != NULL
6535 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6536 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6537 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6538 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6539 {
94f592af
NC		 6540 value = fixP->fx_offset;
6541 fixP->fx_done = 1;
252b5132 6542 }
ac21e7da
TG		 6543
6544 /* During parsing of instructions, a TOC16 reloc is generated for
6545 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6546 in the toc. But at parse time, SYM may be not yet defined, so
6547 check again here. */
6548 if (fixP->fx_r_type == BFD_RELOC_16
6549 && fixP->fx_addsy != NULL
6550 && ppc_is_toc_sym (fixP->fx_addsy))
6551 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6552#endif
5656a981
AM		 6553 }
6554
6555 /* Calculate value to be stored in field. */
6556 fieldval = value;
6557 switch (fixP->fx_r_type)
6558 {
1ec2d25e 6559#ifdef OBJ_ELF
5656a981
AM		 6560 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6561 case BFD_RELOC_PPC_VLE_LO16A:
6562 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6563#endif
5656a981
AM		 6564 case BFD_RELOC_LO16:
6565 case BFD_RELOC_LO16_PCREL:
6566 fieldval = value & 0xffff;
6567 sign_extend_16:
6568 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6569 fieldval = SEX16 (fieldval);
5656a981
AM		 6570 fixP->fx_no_overflow = 1;
6571 break;
3c9d25f4 6572
f9c6b907
AM		 6573 case BFD_RELOC_HI16:
6574 case BFD_RELOC_HI16_PCREL:
5656a981 6575#ifdef OBJ_ELF
f9c6b907
AM		 6576 if (REPORT_OVERFLOW_HI && ppc_obj64)
6577 {
6578 fieldval = value >> 16;
6579 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6580 {
6581 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6582 fieldval = ((valueT) fieldval ^ sign) - sign;
6583 }
6584 break;
6585 }
6586 /* Fall thru */
6587
5656a981
AM		 6588 case BFD_RELOC_PPC_VLE_HI16A:
6589 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6590 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6591#endif
5656a981
AM		 6592 fieldval = PPC_HI (value);
6593 goto sign_extend_16;
0baf16f2 6594
f9c6b907
AM		 6595 case BFD_RELOC_HI16_S:
6596 case BFD_RELOC_HI16_S_PCREL:
5656a981 6597#ifdef OBJ_ELF
f9c6b907
AM		 6598 if (REPORT_OVERFLOW_HI && ppc_obj64)
6599 {
6600 fieldval = (value + 0x8000) >> 16;
6601 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6602 {
6603 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6604 fieldval = ((valueT) fieldval ^ sign) - sign;
6605 }
6606 break;
6607 }
6608 /* Fall thru */
6609
5656a981
AM		 6610 case BFD_RELOC_PPC_VLE_HA16A:
6611 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6612 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6613#endif
5656a981
AM		 6614 fieldval = PPC_HA (value);
6615 goto sign_extend_16;
0baf16f2 6616
3b8b57a9 6617#ifdef OBJ_ELF
5656a981
AM		 6618 case BFD_RELOC_PPC64_HIGHER:
6619 fieldval = PPC_HIGHER (value);
6620 goto sign_extend_16;
252b5132 6621
5656a981
AM		 6622 case BFD_RELOC_PPC64_HIGHER_S:
6623 fieldval = PPC_HIGHERA (value);
6624 goto sign_extend_16;
0baf16f2 6625
5656a981
AM		 6626 case BFD_RELOC_PPC64_HIGHEST:
6627 fieldval = PPC_HIGHEST (value);
6628 goto sign_extend_16;
0baf16f2 6629
5656a981
AM		 6630 case BFD_RELOC_PPC64_HIGHEST_S:
6631 fieldval = PPC_HIGHESTA (value);
6632 goto sign_extend_16;
6633#endif
6634
6635 default:
6636 break;
6637 }
6638
6639 if (operand != NULL)
6640 {
6641 /* Handle relocs in an insn. */
6642 char *where;
6643 unsigned long insn;
0baf16f2 6644
5656a981
AM		 6645 switch (fixP->fx_r_type)
6646 {
7fa9fcb6 6647#ifdef OBJ_ELF
3b8b57a9
AM		 6648 /* The following relocs can't be calculated by the assembler.
6649 Leave the field zero. */
cdba85ec
AM		 6650 case BFD_RELOC_PPC_TPREL16:
6651 case BFD_RELOC_PPC_TPREL16_LO:
6652 case BFD_RELOC_PPC_TPREL16_HI:
6653 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6654 case BFD_RELOC_PPC_DTPREL16:
6655 case BFD_RELOC_PPC_DTPREL16_LO:
6656 case BFD_RELOC_PPC_DTPREL16_HI:
6657 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6658 case BFD_RELOC_PPC_GOT_TLSGD16:
6659 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6660 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6661 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6662 case BFD_RELOC_PPC_GOT_TLSLD16:
6663 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6664 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6665 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6666 case BFD_RELOC_PPC_GOT_TPREL16:
6667 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6668 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6669 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6670 case BFD_RELOC_PPC_GOT_DTPREL16:
6671 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6672 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6673 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6674 case BFD_RELOC_PPC64_TPREL16_DS:
6675 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6676 case BFD_RELOC_PPC64_TPREL16_HIGH:
6677 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6678 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6679 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6680 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6681 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6682 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6683 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6684 case BFD_RELOC_PPC64_DTPREL16_DS:
6685 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6686 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6687 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6688 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6689 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6690 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6691 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6692 fieldval = 0;
cdba85ec 6693 break;
3b8b57a9
AM		 6694
6695 /* These also should leave the field zero for the same
6696 reason. Note that older versions of gas wrote values
6697 here. If we want to go back to the old behaviour, then
6698 all _LO and _LO_DS cases will need to be treated like
6699 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6700 case BFD_RELOC_16_GOTOFF:
6701 case BFD_RELOC_LO16_GOTOFF:
6702 case BFD_RELOC_HI16_GOTOFF:
6703 case BFD_RELOC_HI16_S_GOTOFF:
6704 case BFD_RELOC_LO16_PLTOFF:
6705 case BFD_RELOC_HI16_PLTOFF:
6706 case BFD_RELOC_HI16_S_PLTOFF:
6707 case BFD_RELOC_GPREL16:
6708 case BFD_RELOC_16_BASEREL:
6709 case BFD_RELOC_LO16_BASEREL:
6710 case BFD_RELOC_HI16_BASEREL:
6711 case BFD_RELOC_HI16_S_BASEREL:
6712 case BFD_RELOC_PPC_TOC16:
6713 case BFD_RELOC_PPC64_TOC16_LO:
6714 case BFD_RELOC_PPC64_TOC16_HI:
6715 case BFD_RELOC_PPC64_TOC16_HA:
6716 case BFD_RELOC_PPC64_PLTGOT16:
6717 case BFD_RELOC_PPC64_PLTGOT16_LO:
6718 case BFD_RELOC_PPC64_PLTGOT16_HI:
6719 case BFD_RELOC_PPC64_PLTGOT16_HA:
6720 case BFD_RELOC_PPC64_GOT16_DS:
6721 case BFD_RELOC_PPC64_GOT16_LO_DS:
6722 case BFD_RELOC_PPC64_PLT16_LO_DS:
6723 case BFD_RELOC_PPC64_SECTOFF_DS:
6724 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6725 case BFD_RELOC_PPC64_TOC16_DS:
6726 case BFD_RELOC_PPC64_TOC16_LO_DS:
6727 case BFD_RELOC_PPC64_PLTGOT16_DS:
6728 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6729 case BFD_RELOC_PPC_EMB_NADDR16:
6730 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6731 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6732 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6733 case BFD_RELOC_PPC_EMB_SDAI16:
6734 case BFD_RELOC_PPC_EMB_SDA2I16:
6735 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6736 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6737 case BFD_RELOC_PPC_EMB_MRKREF:
6738 case BFD_RELOC_PPC_EMB_RELSEC16:
6739 case BFD_RELOC_PPC_EMB_RELST_LO:
6740 case BFD_RELOC_PPC_EMB_RELST_HI:
6741 case BFD_RELOC_PPC_EMB_RELST_HA:
6742 case BFD_RELOC_PPC_EMB_BIT_FLD:
6743 case BFD_RELOC_PPC_EMB_RELSDA:
6744 case BFD_RELOC_PPC_VLE_SDA21:
6745 case BFD_RELOC_PPC_VLE_SDA21_LO:
6746 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6747 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6748 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6749 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6750 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6751 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6752 gas_assert (fixP->fx_addsy != NULL);
6753 /* Fall thru */
6754
6755 case BFD_RELOC_PPC_TLS:
6756 case BFD_RELOC_PPC_TLSGD:
6757 case BFD_RELOC_PPC_TLSLD:
6758 fieldval = 0;
3b8b57a9 6759 break;
7fa9fcb6
TG		 6760#endif
6761
6762#ifdef OBJ_XCOFF
6763 case BFD_RELOC_PPC_B16:
6764 /* Adjust the offset to the instruction boundary. */
6765 fieldval += 2;
6766 break;
6767#endif
252b5132 6768
3b8b57a9 6769 default:
252b5132 6770 break;
3b8b57a9 6771 }
252b5132 6772
3b8b57a9
AM		 6773#ifdef OBJ_ELF
6774/* powerpc uses RELA style relocs, so if emitting a reloc the field
6775 contents can stay at zero. */
6776#define APPLY_RELOC fixP->fx_done
6777#else
6778#define APPLY_RELOC 1
6779#endif
6780 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6781 {
6782 /* Fetch the instruction, insert the fully resolved operand
6783 value, and stuff the instruction back again. */
6784 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6785 if (target_big_endian)
31a91399 6786 {
3b8b57a9
AM		 6787 if (fixP->fx_size == 4)
6788 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6789 else
3b8b57a9 6790 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6791 }
6792 else
3b8b57a9
AM		 6793 {
6794 if (fixP->fx_size == 4)
6795 insn = bfd_getl32 ((unsigned char *) where);
6796 else
6797 insn = bfd_getl16 ((unsigned char *) where);
6798 }
6799 insn = ppc_insert_operand (insn, operand, fieldval,
6800 fixP->tc_fix_data.ppc_cpu,
6801 fixP->fx_file, fixP->fx_line);
6802 if (target_big_endian)
6803 {
6804 if (fixP->fx_size == 4)
6805 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6806 else
6807 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6808 }
6809 else
6810 {
6811 if (fixP->fx_size == 4)
6812 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6813 else
6814 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6815 }
6816 }
6817
6818 if (fixP->fx_done)
6819 /* Nothing else to do here. */
6820 return;
6821
6822 gas_assert (fixP->fx_addsy != NULL);
6823 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6824 {
6825 char *sfile;
6826 unsigned int sline;
6827
6828 /* Use expr_symbol_where to see if this is an expression
6829 symbol. */
6830 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6831 as_bad_where (fixP->fx_file, fixP->fx_line,
6832 _("unresolved expression that must be resolved"));
6833 else
6834 as_bad_where (fixP->fx_file, fixP->fx_line,
6835 _("unsupported relocation against %s"),
6836 S_GET_NAME (fixP->fx_addsy));
6837 fixP->fx_done = 1;
6838 return;
6839 }
6840 }
6841 else
6842 {
6843 /* Handle relocs in data. */
6844 switch (fixP->fx_r_type)
6845 {
252b5132 6846 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6847 if (fixP->fx_addsy
6848 && !S_IS_DEFINED (fixP->fx_addsy)
6849 && !S_IS_WEAK (fixP->fx_addsy))
6850 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6851 /* Fall thru */
252b5132
RH		 6852
6853 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6854 fixP->fx_done = 0;
252b5132
RH		 6855 break;
6856
0baf16f2 6857#ifdef OBJ_ELF
3b8b57a9
AM		 6858 /* These can appear with @l etc. in data. */
6859 case BFD_RELOC_LO16:
3b8b57a9 6860 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6861 case BFD_RELOC_HI16:
3b8b57a9 6862 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6863 case BFD_RELOC_HI16_S:
3b8b57a9 6864 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6865 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6866 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6867 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6868 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6869 case BFD_RELOC_PPC64_ADDR16_HIGH:
6870 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3b8b57a9
AM		 6871 break;
6872
6873 case BFD_RELOC_PPC_DTPMOD:
6874 case BFD_RELOC_PPC_TPREL:
6875 case BFD_RELOC_PPC_DTPREL:
6876 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6877 break;
6878
6879 /* Just punt all of these to the linker. */
6880 case BFD_RELOC_PPC_B16_BRTAKEN:
6881 case BFD_RELOC_PPC_B16_BRNTAKEN:
6882 case BFD_RELOC_16_GOTOFF:
6883 case BFD_RELOC_LO16_GOTOFF:
6884 case BFD_RELOC_HI16_GOTOFF:
6885 case BFD_RELOC_HI16_S_GOTOFF:
6886 case BFD_RELOC_LO16_PLTOFF:
6887 case BFD_RELOC_HI16_PLTOFF:
6888 case BFD_RELOC_HI16_S_PLTOFF:
6889 case BFD_RELOC_PPC_COPY:
6890 case BFD_RELOC_PPC_GLOB_DAT:
6891 case BFD_RELOC_16_BASEREL:
6892 case BFD_RELOC_LO16_BASEREL:
6893 case BFD_RELOC_HI16_BASEREL:
6894 case BFD_RELOC_HI16_S_BASEREL:
6895 case BFD_RELOC_PPC_TLS:
6896 case BFD_RELOC_PPC_DTPREL16_LO:
6897 case BFD_RELOC_PPC_DTPREL16_HI:
6898 case BFD_RELOC_PPC_DTPREL16_HA:
6899 case BFD_RELOC_PPC_TPREL16_LO:
6900 case BFD_RELOC_PPC_TPREL16_HI:
6901 case BFD_RELOC_PPC_TPREL16_HA:
6902 case BFD_RELOC_PPC_GOT_TLSGD16:
6903 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6904 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6905 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6906 case BFD_RELOC_PPC_GOT_TLSLD16:
6907 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6908 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6909 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6910 case BFD_RELOC_PPC_GOT_DTPREL16:
6911 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6912 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6913 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6914 case BFD_RELOC_PPC_GOT_TPREL16:
6915 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6916 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6917 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6918 case BFD_RELOC_24_PLT_PCREL:
6919 case BFD_RELOC_PPC_LOCAL24PC:
6920 case BFD_RELOC_32_PLT_PCREL:
6921 case BFD_RELOC_GPREL16:
6922 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6923 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6924 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6925 case BFD_RELOC_PPC_EMB_NADDR32:
6926 case BFD_RELOC_PPC_EMB_NADDR16:
6927 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6928 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6929 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6930 case BFD_RELOC_PPC_EMB_SDAI16:
6931 case BFD_RELOC_PPC_EMB_SDA2REL:
6932 case BFD_RELOC_PPC_EMB_SDA2I16:
6933 case BFD_RELOC_PPC_EMB_SDA21:
6934 case BFD_RELOC_PPC_VLE_SDA21_LO:
6935 case BFD_RELOC_PPC_EMB_MRKREF:
6936 case BFD_RELOC_PPC_EMB_RELSEC16:
6937 case BFD_RELOC_PPC_EMB_RELST_LO:
6938 case BFD_RELOC_PPC_EMB_RELST_HI:
6939 case BFD_RELOC_PPC_EMB_RELST_HA:
6940 case BFD_RELOC_PPC_EMB_BIT_FLD:
6941 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6942 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6943 case BFD_RELOC_PPC_TOC16:
6944 case BFD_RELOC_PPC64_TOC16_LO:
6945 case BFD_RELOC_PPC64_TOC16_HI:
6946 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6947 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6948 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6949 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6950 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6951 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6952 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6953 case BFD_RELOC_PPC64_TPREL16_HIGH:
6954 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6955 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6956 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6957 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6958 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6959 fixP->fx_done = 0;
0baf16f2 6960 break;
0baf16f2 6961#endif
3b8b57a9
AM		 6962
6963#ifdef OBJ_XCOFF
6964 case BFD_RELOC_NONE:
3b8b57a9 6965#endif
5656a981
AM		 6966 case BFD_RELOC_CTOR:
6967 case BFD_RELOC_32:
6968 case BFD_RELOC_32_PCREL:
6969 case BFD_RELOC_RVA:
6970 case BFD_RELOC_64:
6971 case BFD_RELOC_64_PCREL:
6972 case BFD_RELOC_16:
6973 case BFD_RELOC_16_PCREL:
6974 case BFD_RELOC_8:
6975 break;
3b8b57a9 6976
252b5132 6977 default:
bc805888 6978 fprintf (stderr,
94f592af 6979 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6980 fflush (stderr);
252b5132
RH		 6981 abort ();
6982 }
46b596ff 6983
5656a981 6984 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6985 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981
AM		 6986 fieldval, fixP->fx_size);
6987 }
6988
6989 /* We are only able to convert some relocs to pc-relative. */
6990 if (!fixP->fx_done && fixP->fx_pcrel)
6991 {
6992 switch (fixP->fx_r_type)
6993 {
6994 case BFD_RELOC_LO16:
6995 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6996 break;
6997
6998 case BFD_RELOC_HI16:
6999 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7000 break;
7001
7002 case BFD_RELOC_HI16_S:
7003 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7004 break;
7005
7006 case BFD_RELOC_64:
7007 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7008 break;
7009
7010 case BFD_RELOC_32:
7011 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7012 break;
7013
7014 case BFD_RELOC_16:
7015 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7016 break;
7017
7018 /* Some of course are already pc-relative. */
7019 case BFD_RELOC_LO16_PCREL:
7020 case BFD_RELOC_HI16_PCREL:
7021 case BFD_RELOC_HI16_S_PCREL:
7022 case BFD_RELOC_64_PCREL:
7023 case BFD_RELOC_32_PCREL:
7024 case BFD_RELOC_16_PCREL:
7025 case BFD_RELOC_PPC_B16:
7026 case BFD_RELOC_PPC_B16_BRTAKEN:
7027 case BFD_RELOC_PPC_B16_BRNTAKEN:
7028 case BFD_RELOC_PPC_B26:
7029 case BFD_RELOC_PPC_LOCAL24PC:
7030 case BFD_RELOC_24_PLT_PCREL:
7031 case BFD_RELOC_32_PLT_PCREL:
7032 case BFD_RELOC_64_PLT_PCREL:
7033 case BFD_RELOC_PPC_VLE_REL8:
7034 case BFD_RELOC_PPC_VLE_REL15:
7035 case BFD_RELOC_PPC_VLE_REL24:
7036 break;
7037
7038 default:
7039 if (fixP->fx_addsy)
7040 {
7041 char *sfile;
7042 unsigned int sline;
7043
7044 /* Use expr_symbol_where to see if this is an
7045 expression symbol. */
7046 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7047 as_bad_where (fixP->fx_file, fixP->fx_line,
7048 _("unresolved expression that must"
7049 " be resolved"));
7050 else
7051 as_bad_where (fixP->fx_file, fixP->fx_line,
7052 _("cannot emit PC relative %s relocation"
7053 " against %s"),
7054 bfd_get_reloc_code_name (fixP->fx_r_type),
7055 S_GET_NAME (fixP->fx_addsy));
7056 }
7057 else
7058 as_bad_where (fixP->fx_file, fixP->fx_line,
7059 _("unable to resolve expression"));
7060 fixP->fx_done = 1;
7061 break;
7062 }
252b5132
RH		 7063 }
7064
7065#ifdef OBJ_ELF
3b8b57a9 7066 ppc_elf_validate_fix (fixP, seg);
94f592af 7067 fixP->fx_addnumber = value;
4e6935a6
AM		 7068
7069 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7070 from the section contents. If we are going to be emitting a reloc
7071 then the section contents are immaterial, so don't warn if they
7072 happen to overflow. Leave such warnings to ld. */
7073 if (!fixP->fx_done)
a38a07e0
AM		 7074 {
7075 fixP->fx_no_overflow = 1;
7076
7077 /* Arrange to emit .TOC. as a normal symbol if used in anything
7078 but .TOC.@tocbase. */
7079 if (ppc_obj64
7080 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7081 && fixP->fx_addsy != NULL
7082 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7083 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7084 }
252b5132 7085#else
94f592af
NC		 7086 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7087 fixP->fx_addnumber = 0;
252b5132
RH		 7088 else
7089 {
7090#ifdef TE_PE
94f592af 7091 fixP->fx_addnumber = 0;
252b5132 7092#else
8edcbfcd
TG		 7093 /* We want to use the offset within the toc, not the actual VMA
7094 of the symbol. */
94f592af 7095 fixP->fx_addnumber =
8edcbfcd
TG		 7096 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7097 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7098 /* Set *valP to avoid errors. */
7099 *valP = value;
252b5132
RH		 7100#endif
7101 }
7102#endif
252b5132
RH		 7103}
7104
7105/* Generate a reloc for a fixup. */
7106
7107arelent *
98027b10 7108tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7109{
7110 arelent *reloc;
7111
7112 reloc = (arelent *) xmalloc (sizeof (arelent));
7113
49309057
ILT		 7114 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7115 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7116 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7117 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7118 if (reloc->howto == (reloc_howto_type *) NULL)
7119 {
7120 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7121 _("reloc %d not supported by object file format"),
7122 (int) fixp->fx_r_type);
252b5132
RH		 7123 return NULL;
7124 }
7125 reloc->addend = fixp->fx_addnumber;
7126
7127 return reloc;
7128}
75e21f08
JJ		 7129
7130void
98027b10 7131ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7132{
7133 cfi_add_CFA_def_cfa (1, 0);
7134}
7135
7136int
1df69f4f 7137tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7138{
7139 unsigned int regnum = -1;
7140 unsigned int i;
7141 const char *p;
7142 char *q;
7143 static struct { char *name; int dw2regnum; } regnames[] =
7144 {
7145 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7146 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7147 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7148 { "spe_acc", 111 }, { "spefscr", 112 }
7149 };
7150
7151 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7152 if (strcmp (regnames[i].name, regname) == 0)
7153 return regnames[i].dw2regnum;
7154
7155 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7156 {
7157 p = regname + 1 + (regname[1] == '.');
7158 regnum = strtoul (p, &q, 10);
7159 if (p == q || *q || regnum >= 32)
7160 return -1;
7161 if (regname[0] == 'f')
b7d7dc63 7162 regnum += 32;
75e21f08 7163 else if (regname[0] == 'v')
b7d7dc63 7164 regnum += 77;
75e21f08
JJ		 7165 }
7166 else if (regname[0] == 'c' && regname[1] == 'r')
7167 {
7168 p = regname + 2 + (regname[2] == '.');
7169 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7170 return -1;
75e21f08
JJ		 7171 regnum = p[0] - '0' + 68;
7172 }
7173 return regnum;
7174}
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