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2009-02-06 Paul Pluzhnikov <ppluzhnikov@google.com>
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
783de163 3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
81d4177b
KH		 361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
252b5132
RH		 392 { "f30", 30 },
393 { "f31", 31 },
81d4177b
KH		 394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
252b5132
RH		 400
401 { "fpscr", 0 },
402
c3d65c1c
BE		 403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
252b5132
RH		 421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 503
7a899fff 504 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
7a899fff
C		 528 { "v.30", 30 },
529 { "v.31", 31 },
81d4177b
KH		 530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
7a899fff
C		 536
537 { "v0", 0 },
81d4177b
KH		 538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
7a899fff
C		 561 { "v30", 30 },
562 { "v31", 31 },
81d4177b
KH		 563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
7a899fff 568 { "v9", 9 },
252b5132
RH		 569
570 { "xer", 1 },
571
572};
573
bc805888 574#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 575
576/* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
252b5132 579static int
98027b10 580reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 581{
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602}
603
604/*
99a814a1 605 * Summary of register_name.
252b5132
RH		 606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
b34976b6 616static bfd_boolean
98027b10 617register_name (expressionS *expressionP)
252b5132
RH		 618{
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
99a814a1 624 /* Find the spelling of the operand. */
252b5132 625 start = name = input_line_pointer;
3882b010 626 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 627 name = ++input_line_pointer;
628
3882b010 629 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 630 return FALSE;
252b5132
RH		 631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
468cced8
AM		 635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
99a814a1 638 /* Look to see if it's in the register table. */
81d4177b 639 if (reg_number >= 0)
252b5132
RH		 640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
81d4177b 643
99a814a1 644 /* Make the rest nice. */
252b5132
RH		 645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
b34976b6 647 return TRUE;
252b5132 648 }
468cced8
AM		 649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
b34976b6 652 return FALSE;
252b5132
RH		 653}
654\f
655/* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659/* Whether to do the special parsing. */
b34976b6 660static bfd_boolean cr_operand;
252b5132
RH		 661
662/* Names to recognize in a condition code. This table is sorted. */
663static const struct pd_reg cr_names[] =
664{
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678};
679
680/* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683int
98027b10 684ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
13abbae3
AM		 691 if (*name == '%')
692 ++name;
252b5132
RH		 693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702}
703\f
704/* Local variables. */
705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
9b4e5766
PB		 828 ppc_cpu_t retain_flags =
829 ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SPE);
b0e34bfe 830
69c040df
AM		 831 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
832 (RIOS2). */
833 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
835 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
836 else if (strcmp (arg, "pwr") == 0)
837 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
838 /* -m601 means to assemble for the PowerPC 601, which includes
839 instructions that are holdovers from the Power. */
840 else if (strcmp (arg, "601") == 0)
841 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
842 | PPC_OPCODE_601 | PPC_OPCODE_32);
843 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
844 PowerPC 603/604. */
845 else if (strcmp (arg, "ppc") == 0
846 || strcmp (arg, "ppc32") == 0
847 || strcmp (arg, "603") == 0
848 || strcmp (arg, "604") == 0)
849 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 850 /* Do all PPC750s have paired single ops? */
851 else if (strcmp (arg, "750cl") == 0)
852 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
081ba1b3 853 else if (strcmp (arg, "403") == 0)
69c040df
AM		 854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
855 | PPC_OPCODE_403 | PPC_OPCODE_32);
081ba1b3
AM		 856 else if (strcmp (arg, "405") == 0)
857 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
858 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
c8187e15
PB		 859 else if (strcmp (arg, "440") == 0
860 || strcmp (arg, "464") == 0)
69c040df
AM		 861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
862 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
863 else if (strcmp (arg, "7400") == 0
864 || strcmp (arg, "7410") == 0
865 || strcmp (arg, "7450") == 0
866 || strcmp (arg, "7455") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
868 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 869 else if (strcmp (arg, "e300") == 0)
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
871 | PPC_OPCODE_E300);
69c040df
AM		 872 else if (strcmp (arg, "altivec") == 0)
873 {
874 if (ppc_cpu == 0)
b0e34bfe
NC		 875 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
876
9b4e5766
PB		 877 retain_flags |= PPC_OPCODE_ALTIVEC;
878 }
879 else if (strcmp (arg, "vsx") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
883
884 retain_flags |= PPC_OPCODE_VSX;
69c040df
AM		 885 }
886 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
887 {
888 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
889 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
890 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
19a6653c
AM		 891 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
892 }
893 else if (strcmp (arg, "e500mc") == 0)
894 {
895 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
896 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
897 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
69c040df
AM		 898 }
899 else if (strcmp (arg, "spe") == 0)
900 {
901 if (ppc_cpu == 0)
b0e34bfe
NC		 902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
903
9b4e5766 904 retain_flags |= PPC_OPCODE_SPE;
69c040df
AM		 905 }
906 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
907 620. */
908 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
909 {
910 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
911 }
912 else if (strcmp (arg, "ppc64bridge") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
916 }
917 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
918 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
919 {
920 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
921 }
69c040df
AM		 922 else if (strcmp (arg, "power4") == 0)
923 {
924 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
925 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
926 }
b0648eec
AM		 927 else if (strcmp (arg, "power5") == 0)
928 {
929 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
930 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
931 | PPC_OPCODE_POWER5);
932 }
9622b051
AM		 933 else if (strcmp (arg, "power6") == 0)
934 {
935 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
936 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209
PB		 937 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
938 | PPC_OPCODE_ALTIVEC);
9622b051 939 }
9b4e5766
PB		 940 else if (strcmp (arg, "power7") == 0)
941 {
942 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
943 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
944 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
945 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
946 }
ede602d7
AM		 947 else if (strcmp (arg, "cell") == 0)
948 {
949 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
950 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209 951 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
ede602d7 952 }
69c040df
AM		 953 /* -mcom means assemble for the common intersection between Power
954 and PowerPC. At present, we just allow the union, rather
955 than the intersection. */
956 else if (strcmp (arg, "com") == 0)
957 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
958 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
959 else if (strcmp (arg, "any") == 0)
960 ppc_cpu |= PPC_OPCODE_ANY;
961 else
962 return 0;
963
9b4e5766
PB		 964 /* Make sure the the Altivec, VSX and SPE bits are not lost. */
965 ppc_cpu |= retain_flags;
69c040df
AM		 966 return 1;
967}
968
252b5132 969int
98027b10 970md_parse_option (int c, char *arg)
252b5132
RH		 971{
972 switch (c)
973 {
974 case 'u':
975 /* -u means that any undefined symbols should be treated as
976 external, which is the default for gas anyhow. */
977 break;
978
979#ifdef OBJ_ELF
980 case 'l':
981 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 982 sake, recognize -be also. */
252b5132
RH		 983 if (strcmp (arg, "e") == 0)
984 {
985 target_big_endian = 0;
986 set_target_endian = 1;
987 }
988 else
989 return 0;
990
991 break;
992
993 case 'b':
994 if (strcmp (arg, "e") == 0)
995 {
996 target_big_endian = 1;
997 set_target_endian = 1;
998 }
999 else
1000 return 0;
1001
1002 break;
1003
1004 case 'K':
99a814a1 1005 /* Recognize -K PIC. */
252b5132
RH		 1006 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1007 {
1008 shlib = SHLIB_PIC;
1009 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1010 }
1011 else
1012 return 0;
1013
1014 break;
1015#endif
1016
7f6d05e8
CP		 1017 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1018 case 'a':
1019 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1020 {
1021#ifdef BFD64
1022 ppc_obj64 = 1;
1023#else
1024 as_fatal (_("%s unsupported"), "-a64");
1025#endif
1026 }
7f6d05e8 1027 else if (strcmp (arg, "32") == 0)
2b3c4602 1028 ppc_obj64 = 0;
7f6d05e8
CP		 1029 else
1030 return 0;
1031 break;
81d4177b 1032
252b5132 1033 case 'm':
69c040df
AM		 1034 if (parse_cpu (arg))
1035 ;
252b5132
RH		 1036
1037 else if (strcmp (arg, "regnames") == 0)
b34976b6 1038 reg_names_p = TRUE;
252b5132
RH		 1039
1040 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1041 reg_names_p = FALSE;
252b5132
RH		 1042
1043#ifdef OBJ_ELF
99a814a1
AM		 1044 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1045 that require relocation. */
252b5132
RH		 1046 else if (strcmp (arg, "relocatable") == 0)
1047 {
5d6f4f16 1048 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1049 ppc_flags |= EF_PPC_RELOCATABLE;
1050 }
1051
1052 else if (strcmp (arg, "relocatable-lib") == 0)
1053 {
5d6f4f16 1054 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1055 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1056 }
1057
99a814a1 1058 /* -memb, set embedded bit. */
252b5132
RH		 1059 else if (strcmp (arg, "emb") == 0)
1060 ppc_flags |= EF_PPC_EMB;
1061
99a814a1
AM		 1062 /* -mlittle/-mbig set the endianess. */
1063 else if (strcmp (arg, "little") == 0
1064 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1065 {
1066 target_big_endian = 0;
1067 set_target_endian = 1;
1068 }
1069
1070 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1071 {
1072 target_big_endian = 1;
1073 set_target_endian = 1;
1074 }
1075
1076 else if (strcmp (arg, "solaris") == 0)
1077 {
b34976b6 1078 msolaris = TRUE;
252b5132
RH		 1079 ppc_comment_chars = ppc_solaris_comment_chars;
1080 }
1081
1082 else if (strcmp (arg, "no-solaris") == 0)
1083 {
b34976b6 1084 msolaris = FALSE;
252b5132
RH		 1085 ppc_comment_chars = ppc_eabi_comment_chars;
1086 }
1087#endif
1088 else
1089 {
1090 as_bad (_("invalid switch -m%s"), arg);
1091 return 0;
1092 }
1093 break;
1094
1095#ifdef OBJ_ELF
1096 /* -V: SVR4 argument to print version ID. */
1097 case 'V':
1098 print_version_id ();
1099 break;
1100
1101 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1102 should be emitted or not. FIXME: Not implemented. */
1103 case 'Q':
1104 break;
1105
1106 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1107 rather than .stabs.excl, which is ignored by the linker.
1108 FIXME: Not implemented. */
1109 case 's':
1110 if (arg)
1111 return 0;
1112
1113 break;
1114#endif
1115
1116 default:
1117 return 0;
1118 }
1119
1120 return 1;
1121}
1122
1123void
98027b10 1124md_show_usage (FILE *stream)
252b5132 1125{
bc805888 1126 fprintf (stream, _("\
252b5132 1127PowerPC options:\n\
df12615d
AM		 1128-a32 generate ELF32/XCOFF32\n\
1129-a64 generate ELF64/XCOFF64\n\
252b5132 1130-u ignored\n\
23e1d84c
AM		 1131-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1132-mpwr generate code for POWER (RIOS1)\n\
1133-m601 generate code for PowerPC 601\n\
418c1742 1134-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1135 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1136-m403 generate code for PowerPC 403\n\
1137-m405 generate code for PowerPC 405\n\
3d8aea2f 1138-m440 generate code for PowerPC 440\n\
c8187e15 1139-m464 generate code for PowerPC 464\n\
f5c120c5 1140-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1141 generate code for PowerPC 7400/7410/7450/7455\n\
1142-m750cl generate code for PowerPC 750cl\n"));
df12615d 1143 fprintf (stream, _("\
23e1d84c 1144-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1145-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1146-mbooke generate code for 32-bit PowerPC BookE\n\
23e1d84c 1147-mpower4 generate code for Power4 architecture\n\
b0648eec 1148-mpower5 generate code for Power5 architecture\n\
9622b051 1149-mpower6 generate code for Power6 architecture\n\
9b4e5766 1150-mpower7 generate code for Power7 architecture\n\
ede602d7 1151-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1152-mcom generate code Power/PowerPC common instructions\n\
df12615d 1153-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1154 fprintf (stream, _("\
df12615d 1155-maltivec generate code for AltiVec\n\
9b4e5766 1156-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1157-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1158-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1159-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1160-mspe generate code for Motorola SPE instructions\n\
1161-mregnames Allow symbolic names for registers\n\
1162-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1163#ifdef OBJ_ELF
bc805888 1164 fprintf (stream, _("\
252b5132
RH		 1165-mrelocatable support for GCC's -mrelocatble option\n\
1166-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1167-memb set PPC_EMB bit in ELF flags\n\
df12615d 1168-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1169 generate code for a little endian machine\n\
df12615d
AM		 1170-mbig, -mbig-endian, -b, -be\n\
1171 generate code for a big endian machine\n\
252b5132
RH		 1172-msolaris generate code for Solaris\n\
1173-mno-solaris do not generate code for Solaris\n\
1174-V print assembler version number\n\
1175-Qy, -Qn ignored\n"));
1176#endif
1177}
1178\f
1179/* Set ppc_cpu if it is not already set. */
1180
1181static void
98027b10 1182ppc_set_cpu (void)
252b5132
RH		 1183{
1184 const char *default_os = TARGET_OS;
1185 const char *default_cpu = TARGET_CPU;
1186
3c9030c1 1187 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1188 {
2a98c3a6 1189 if (ppc_obj64)
3c9030c1 1190 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1191 else if (strncmp (default_os, "aix", 3) == 0
1192 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1193 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1194 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1195 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1196 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1197 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1198 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1199 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1200 else
99a814a1
AM		 1201 as_fatal (_("Unknown default cpu = %s, os = %s"),
1202 default_cpu, default_os);
252b5132
RH		 1203 }
1204}
1205
9232bbb0
AM		 1206/* Figure out the BFD architecture to use. This function and ppc_mach
1207 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1208
1209enum bfd_architecture
98027b10 1210ppc_arch (void)
252b5132
RH		 1211{
1212 const char *default_cpu = TARGET_CPU;
1213 ppc_set_cpu ();
1214
1215 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1216 return bfd_arch_powerpc;
1217 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1218 return bfd_arch_rs6000;
1219 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1220 {
1221 if (strcmp (default_cpu, "rs6000") == 0)
1222 return bfd_arch_rs6000;
0baf16f2 1223 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1224 return bfd_arch_powerpc;
1225 }
1226
1227 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1228 return bfd_arch_unknown;
1229}
1230
7f6d05e8 1231unsigned long
98027b10 1232ppc_mach (void)
7f6d05e8 1233{
2a98c3a6
AM		 1234 if (ppc_obj64)
1235 return bfd_mach_ppc64;
1236 else if (ppc_arch () == bfd_arch_rs6000)
1237 return bfd_mach_rs6k;
1238 else
1239 return bfd_mach_ppc;
7f6d05e8
CP		 1240}
1241
81d4177b 1242extern char*
98027b10 1243ppc_target_format (void)
7f6d05e8
CP		 1244{
1245#ifdef OBJ_COFF
1246#ifdef TE_PE
99a814a1 1247 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1248#elif TE_POWERMAC
0baf16f2 1249 return "xcoff-powermac";
7f6d05e8 1250#else
eb1e0e80 1251# ifdef TE_AIX5
2b3c4602 1252 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1253# else
2b3c4602 1254 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1255# endif
7f6d05e8 1256#endif
7f6d05e8
CP		 1257#endif
1258#ifdef OBJ_ELF
9d8504b1
PB		 1259# ifdef TE_VXWORKS
1260 return "elf32-powerpc-vxworks";
1261# else
0baf16f2 1262 return (target_big_endian
2b3c4602
AM		 1263 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1264 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1265# endif
7f6d05e8
CP		 1266#endif
1267}
1268
69c040df
AM		 1269/* Insert opcodes and macros into hash tables. Called at startup and
1270 for .cpu pseudo. */
252b5132 1271
69c040df
AM		 1272static void
1273ppc_setup_opcodes (void)
252b5132 1274{
98027b10 1275 const struct powerpc_opcode *op;
252b5132
RH		 1276 const struct powerpc_opcode *op_end;
1277 const struct powerpc_macro *macro;
1278 const struct powerpc_macro *macro_end;
b84bf58a 1279 bfd_boolean bad_insn = FALSE;
252b5132 1280
69c040df
AM		 1281 if (ppc_hash != NULL)
1282 hash_die (ppc_hash);
1283 if (ppc_macro_hash != NULL)
1284 hash_die (ppc_macro_hash);
252b5132
RH		 1285
1286 /* Insert the opcodes into a hash table. */
1287 ppc_hash = hash_new ();
1288
c43a438d 1289 if (ENABLE_CHECKING)
b84bf58a 1290 {
c43a438d 1291 unsigned int i;
b84bf58a 1292
c43a438d
AM		 1293 /* Check operand masks. Code here and in the disassembler assumes
1294 all the 1's in the mask are contiguous. */
1295 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1296 {
c43a438d
AM		 1297 unsigned long mask = powerpc_operands[i].bitm;
1298 unsigned long right_bit;
1299 unsigned int j;
1300
1301 right_bit = mask & -mask;
1302 mask += right_bit;
1303 right_bit = mask & -mask;
1304 if (mask != right_bit)
1305 {
1306 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1307 bad_insn = TRUE;
1308 }
1309 for (j = i + 1; j < num_powerpc_operands; ++j)
1310 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1311 sizeof (powerpc_operands[0])) == 0)
1312 {
1313 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1314 j, i);
1315 bad_insn = TRUE;
1316 }
b84bf58a
AM		 1317 }
1318 }
1319
252b5132
RH		 1320 op_end = powerpc_opcodes + powerpc_num_opcodes;
1321 for (op = powerpc_opcodes; op < op_end; op++)
1322 {
c43a438d 1323 if (ENABLE_CHECKING)
b84bf58a 1324 {
c43a438d
AM		 1325 const unsigned char *o;
1326 unsigned long omask = op->mask;
8dbcd839 1327
d815f1a9 1328 if (op != powerpc_opcodes)
8dbcd839 1329 {
d815f1a9
AM		 1330 /* The major opcodes had better be sorted. Code in the
1331 disassembler assumes the insns are sorted according to
1332 major opcode. */
1333 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1334 {
1335 as_bad (_("major opcode is not sorted for %s"),
1336 op->name);
1337 bad_insn = TRUE;
1338 }
1339
1340 /* Warn if the table isn't more strictly ordered.
1341 Unfortunately it doesn't seem possible to order the
1342 table on much more than the major opcode, which makes
1343 it difficult to implement a binary search in the
1344 disassembler. The problem is that we have multiple
1345 ways to disassemble instructions, and we usually want
1346 to choose a more specific form (with more bits set in
1347 the opcode) than a more general form. eg. all of the
1348 following are equivalent:
1349 bne label # opcode = 0x40820000, mask = 0xff830003
1350 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1351 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1352
1353 There are also cases where the table needs to be out
1354 of order to disassemble the correct instruction for
2f3bb96a 1355 processor variants. */
d815f1a9
AM		 1356 else if (0)
1357 {
1358 unsigned long t1 = op[0].opcode;
1359 unsigned long t2 = op[-1].opcode;
1360
1361 if (((t1 ^ t2) & 0xfc0007ff) == 0
1362 && (t1 & 0xfc0006df) == 0x7c000286)
1363 {
1364 /* spr field is split. */
1365 t1 = ((t1 & ~0x1ff800)
1366 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1367 t2 = ((t2 & ~0x1ff800)
1368 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1369 }
1370 if (t1 < t2)
1371 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1372 op[0].name, op[0].opcode, op[0].mask,
1373 op[-1].name, op[-1].opcode, op[-1].mask);
1374 }
8dbcd839 1375 }
c43a438d
AM		 1376
1377 /* The mask had better not trim off opcode bits. */
1378 if ((op->opcode & omask) != op->opcode)
1379 {
1380 as_bad (_("mask trims opcode bits for %s"),
1381 op->name);
1382 bad_insn = TRUE;
1383 }
1384
1385 /* The operands must not overlap the opcode or each other. */
1386 for (o = op->operands; *o; ++o)
1387 if (*o >= num_powerpc_operands)
1388 {
1389 as_bad (_("operand index error for %s"),
1390 op->name);
1391 bad_insn = TRUE;
1392 }
1393 else
b84bf58a 1394 {
c43a438d
AM		 1395 const struct powerpc_operand *operand = &powerpc_operands[*o];
1396 if (operand->shift >= 0)
b84bf58a 1397 {
c43a438d
AM		 1398 unsigned long mask = operand->bitm << operand->shift;
1399 if (omask & mask)
1400 {
1401 as_bad (_("operand %d overlap in %s"),
1402 (int) (o - op->operands), op->name);
1403 bad_insn = TRUE;
1404 }
1405 omask |= mask;
b84bf58a 1406 }
b84bf58a 1407 }
c43a438d 1408 }
252b5132 1409
2b3c4602 1410 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1411 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1412 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1413 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1414 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1415 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1416 {
1417 const char *retval;
1418
98027b10 1419 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1420 if (retval != NULL)
252b5132 1421 {
99a814a1 1422 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1423 if ((ppc_cpu & PPC_OPCODE_601) != 0
1424 && (op->flags & PPC_OPCODE_POWER) != 0)
1425 continue;
1426
b84bf58a 1427 as_bad (_("duplicate instruction %s"),
99a814a1 1428 op->name);
b84bf58a 1429 bad_insn = TRUE;
252b5132
RH		 1430 }
1431 }
1432 }
1433
3c9030c1
AM		 1434 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1435 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1436 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1437
252b5132
RH		 1438 /* Insert the macros into a hash table. */
1439 ppc_macro_hash = hash_new ();
1440
1441 macro_end = powerpc_macros + powerpc_num_macros;
1442 for (macro = powerpc_macros; macro < macro_end; macro++)
1443 {
1444 if ((macro->flags & ppc_cpu) != 0)
1445 {
1446 const char *retval;
1447
98027b10 1448 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1449 if (retval != (const char *) NULL)
1450 {
b84bf58a
AM		 1451 as_bad (_("duplicate macro %s"), macro->name);
1452 bad_insn = TRUE;
252b5132
RH		 1453 }
1454 }
1455 }
1456
b84bf58a 1457 if (bad_insn)
252b5132 1458 abort ();
69c040df
AM		 1459}
1460
1461/* This function is called when the assembler starts up. It is called
1462 after the options have been parsed and the output file has been
1463 opened. */
1464
1465void
98027b10 1466md_begin (void)
69c040df
AM		 1467{
1468 ppc_set_cpu ();
1469
1470 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1471
1472#ifdef OBJ_ELF
1473 /* Set the ELF flags if desired. */
1474 if (ppc_flags && !msolaris)
1475 bfd_set_private_flags (stdoutput, ppc_flags);
1476#endif
1477
1478 ppc_setup_opcodes ();
252b5132 1479
67c1ffbe 1480 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1481 by the user. */
252b5132
RH		 1482 if (!set_target_endian)
1483 {
1484 set_target_endian = 1;
1485 target_big_endian = PPC_BIG_ENDIAN;
1486 }
1487
1488#ifdef OBJ_XCOFF
1489 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1490
1491 /* Create dummy symbols to serve as initial csects. This forces the
1492 text csects to precede the data csects. These symbols will not
1493 be output. */
1494 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1495 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1496 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1497 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1498#endif
1499
1500#ifdef TE_PE
1501
1502 ppc_current_section = text_section;
81d4177b 1503 ppc_previous_section = 0;
252b5132
RH		 1504
1505#endif
1506}
1507
6a0c61b7 1508void
98027b10 1509ppc_cleanup (void)
6a0c61b7 1510{
dc1d03fc 1511#ifdef OBJ_ELF
6a0c61b7
EZ		 1512 if (ppc_apuinfo_list == NULL)
1513 return;
1514
1515 /* Ok, so write the section info out. We have this layout:
1516
1517 byte data what
1518 ---- ---- ----
1519 0 8 length of "APUinfo\0"
1520 4 (n*4) number of APU's (4 bytes each)
1521 8 2 note type 2
1522 12 "APUinfo\0" name
1523 20 APU#1 first APU's info
1524 24 APU#2 second APU's info
1525 ... ...
1526 */
1527 {
1528 char *p;
1529 asection *seg = now_seg;
1530 subsegT subseg = now_subseg;
1531 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1532 unsigned int i;
6a0c61b7
EZ		 1533
1534 /* Create the .PPC.EMB.apuinfo section. */
1535 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1536 bfd_set_section_flags (stdoutput,
1537 apuinfo_secp,
e1a9cb8e 1538 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1539
1540 p = frag_more (4);
1541 md_number_to_chars (p, (valueT) 8, 4);
1542
1543 p = frag_more (4);
e98d298c 1544 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1545
1546 p = frag_more (4);
1547 md_number_to_chars (p, (valueT) 2, 4);
1548
1549 p = frag_more (8);
1550 strcpy (p, "APUinfo");
1551
1552 for (i = 0; i < ppc_apuinfo_num; i++)
1553 {
b34976b6
AM		 1554 p = frag_more (4);
1555 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1556 }
1557
1558 frag_align (2, 0, 0);
1559
1560 /* We probably can't restore the current segment, for there likely
1561 isn't one yet... */
1562 if (seg && subseg)
1563 subseg_set (seg, subseg);
1564 }
dc1d03fc 1565#endif
6a0c61b7
EZ		 1566}
1567
252b5132
RH		 1568/* Insert an operand value into an instruction. */
1569
1570static unsigned long
a1867a27
AM		 1571ppc_insert_operand (unsigned long insn,
1572 const struct powerpc_operand *operand,
1573 offsetT val,
fa452fa6 1574 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1575 char *file,
1576 unsigned int line)
252b5132 1577{
b84bf58a 1578 long min, max, right;
eb42fac1 1579
b84bf58a
AM		 1580 max = operand->bitm;
1581 right = max & -max;
1582 min = 0;
1583
1584 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1585 {
b84bf58a 1586 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1587 max = (max >> 1) & -right;
1588 min = ~max & -right;
b84bf58a 1589 }
252b5132 1590
b84bf58a 1591 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1592 max++;
252b5132 1593
b84bf58a 1594 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1595 {
1596 long tmp = min;
1597 min = -max;
1598 max = -tmp;
1599 }
b84bf58a 1600
a1867a27
AM		 1601 if (min <= max)
1602 {
1603 /* Some people write constants with the sign extension done by
1604 hand but only up to 32 bits. This shouldn't really be valid,
1605 but, to permit this code to assemble on a 64-bit host, we
1606 sign extend the 32-bit value to 64 bits if so doing makes the
1607 value valid. */
1608 if (val > max
1609 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1610 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1611 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1612 val = val - 0x80000000 - 0x80000000;
1613
1614 /* Similarly, people write expressions like ~(1<<15), and expect
1615 this to be OK for a 32-bit unsigned value. */
1616 else if (val < min
1617 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1618 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1619 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1620 val = val + 0x80000000 + 0x80000000;
1621
1622 else if (val < min
1623 || val > max
1624 || (val & (right - 1)) != 0)
1625 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1626 }
b84bf58a 1627
252b5132
RH		 1628 if (operand->insert)
1629 {
1630 const char *errmsg;
1631
1632 errmsg = NULL;
2b3c4602 1633 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1634 if (errmsg != (const char *) NULL)
0baf16f2 1635 as_bad_where (file, line, errmsg);
252b5132
RH		 1636 }
1637 else
b84bf58a 1638 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1639
1640 return insn;
1641}
1642
1643\f
1644#ifdef OBJ_ELF
1645/* Parse @got, etc. and return the desired relocation. */
1646static bfd_reloc_code_real_type
98027b10 1647ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1648{
1649 struct map_bfd {
1650 char *string;
b7d7dc63
AM		 1651 unsigned int length : 8;
1652 unsigned int valid32 : 1;
1653 unsigned int valid64 : 1;
1654 unsigned int reloc;
252b5132
RH		 1655 };
1656
1657 char ident[20];
1658 char *str = *str_p;
1659 char *str2;
1660 int ch;
1661 int len;
15c1449b 1662 const struct map_bfd *ptr;
252b5132 1663
b7d7dc63
AM		 1664#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1665#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1666#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1667
15c1449b 1668 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1669 MAP ("l", BFD_RELOC_LO16),
1670 MAP ("h", BFD_RELOC_HI16),
1671 MAP ("ha", BFD_RELOC_HI16_S),
1672 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1673 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1674 MAP ("got", BFD_RELOC_16_GOTOFF),
1675 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1676 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1677 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1678 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1679 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1680 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1681 MAP ("copy", BFD_RELOC_PPC_COPY),
1682 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1683 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1684 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1685 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1686 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1687 MAP ("tls", BFD_RELOC_PPC_TLS),
1688 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1689 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1690 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1691 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1692 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1693 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1694 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1695 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1696 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1697 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1698 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1699 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1700 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1701 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1702 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1703 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1704 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1705 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1706 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1707 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1708 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1709 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1710 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1711 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1712 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1713 MAP32 ("fixup", BFD_RELOC_CTOR),
1714 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1715 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1716 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1717 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1718 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1719 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1720 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1721 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1722 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1723 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1724 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1725 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1726 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1727 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1728 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1729 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1730 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1731 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1732 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1733 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1734 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1735 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1736 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1737 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1738 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1739 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1740 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1741 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1742 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1743 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1744 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1745 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1746 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1747 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1748 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1749 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1750 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1751 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1752 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1753 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1754 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1755 };
1756
1757 if (*str++ != '@')
1758 return BFD_RELOC_UNUSED;
1759
1760 for (ch = *str, str2 = ident;
1761 (str2 < ident + sizeof (ident) - 1
3882b010 1762 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1763 ch = *++str)
1764 {
3882b010 1765 *str2++ = TOLOWER (ch);
252b5132
RH		 1766 }
1767
1768 *str2 = '\0';
1769 len = str2 - ident;
1770
1771 ch = ident[0];
1772 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1773 if (ch == ptr->string[0]
1774 && len == ptr->length
b7d7dc63
AM		 1775 && memcmp (ident, ptr->string, ptr->length) == 0
1776 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1777 {
15c1449b
AM		 1778 int reloc = ptr->reloc;
1779
cdba85ec 1780 if (!ppc_obj64)
5f6db75a
AM		 1781 if (exp_p->X_add_number != 0
1782 && (reloc == (int) BFD_RELOC_16_GOTOFF
1783 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1784 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1785 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1786 as_warn (_("identifier+constant@got means identifier@got+constant"));
1787
1788 /* Now check for identifier@suffix+constant. */
1789 if (*str == '-' || *str == '+')
252b5132 1790 {
5f6db75a
AM		 1791 char *orig_line = input_line_pointer;
1792 expressionS new_exp;
1793
1794 input_line_pointer = str;
1795 expression (&new_exp);
1796 if (new_exp.X_op == O_constant)
252b5132 1797 {
5f6db75a
AM		 1798 exp_p->X_add_number += new_exp.X_add_number;
1799 str = input_line_pointer;
252b5132 1800 }
5f6db75a
AM		 1801
1802 if (&input_line_pointer != str_p)
1803 input_line_pointer = orig_line;
252b5132 1804 }
252b5132 1805 *str_p = str;
0baf16f2 1806
2b3c4602 1807 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1808 && exp_p->X_op == O_symbol
1809 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1810 {
9f2b53d7
AM		 1811 /* Change the symbol so that the dummy .TOC. symbol can be
1812 omitted from the object file. */
0baf16f2
AM		 1813 exp_p->X_add_symbol = &abs_symbol;
1814 }
1815
15c1449b 1816 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1817 }
1818
1819 return BFD_RELOC_UNUSED;
1820}
1821
99a814a1
AM		 1822/* Like normal .long/.short/.word, except support @got, etc.
1823 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1824static void
98027b10 1825ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1826{
1827 expressionS exp;
1828 bfd_reloc_code_real_type reloc;
1829
1830 if (is_it_end_of_statement ())
1831 {
1832 demand_empty_rest_of_line ();
1833 return;
1834 }
1835
1836 do
1837 {
1838 expression (&exp);
1839 if (exp.X_op == O_symbol
1840 && *input_line_pointer == '@'
99a814a1
AM		 1841 && (reloc = ppc_elf_suffix (&input_line_pointer,
1842 &exp)) != BFD_RELOC_UNUSED)
252b5132 1843 {
99a814a1
AM		 1844 reloc_howto_type *reloc_howto;
1845 int size;
1846
1847 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1848 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1849
1850 if (size > nbytes)
0baf16f2
AM		 1851 {
1852 as_bad (_("%s relocations do not fit in %d bytes\n"),
1853 reloc_howto->name, nbytes);
1854 }
252b5132
RH		 1855 else
1856 {
0baf16f2
AM		 1857 char *p;
1858 int offset;
252b5132 1859
0baf16f2
AM		 1860 p = frag_more (nbytes);
1861 offset = 0;
1862 if (target_big_endian)
1863 offset = nbytes - size;
99a814a1
AM		 1864 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1865 &exp, 0, reloc);
252b5132
RH		 1866 }
1867 }
1868 else
1869 emit_expr (&exp, (unsigned int) nbytes);
1870 }
1871 while (*input_line_pointer++ == ',');
1872
99a814a1
AM		 1873 /* Put terminator back into stream. */
1874 input_line_pointer--;
252b5132
RH		 1875 demand_empty_rest_of_line ();
1876}
1877
1878/* Solaris pseduo op to change to the .rodata section. */
1879static void
98027b10 1880ppc_elf_rdata (int xxx)
252b5132
RH		 1881{
1882 char *save_line = input_line_pointer;
1883 static char section[] = ".rodata\n";
1884
99a814a1 1885 /* Just pretend this is .section .rodata */
252b5132
RH		 1886 input_line_pointer = section;
1887 obj_elf_section (xxx);
1888
1889 input_line_pointer = save_line;
1890}
1891
99a814a1 1892/* Pseudo op to make file scope bss items. */
252b5132 1893static void
98027b10 1894ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1895{
98027b10
AM		 1896 char *name;
1897 char c;
1898 char *p;
252b5132 1899 offsetT size;
98027b10 1900 symbolS *symbolP;
252b5132
RH		 1901 offsetT align;
1902 segT old_sec;
1903 int old_subsec;
1904 char *pfrag;
1905 int align2;
1906
1907 name = input_line_pointer;
1908 c = get_symbol_end ();
1909
99a814a1 1910 /* just after name is now '\0'. */
252b5132
RH		 1911 p = input_line_pointer;
1912 *p = c;
1913 SKIP_WHITESPACE ();
1914 if (*input_line_pointer != ',')
1915 {
1916 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1917 ignore_rest_of_line ();
1918 return;
1919 }
1920
1921 input_line_pointer++; /* skip ',' */
1922 if ((size = get_absolute_expression ()) < 0)
1923 {
1924 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1925 ignore_rest_of_line ();
1926 return;
1927 }
1928
1929 /* The third argument to .lcomm is the alignment. */
1930 if (*input_line_pointer != ',')
1931 align = 8;
1932 else
1933 {
1934 ++input_line_pointer;
1935 align = get_absolute_expression ();
1936 if (align <= 0)
1937 {
1938 as_warn (_("ignoring bad alignment"));
1939 align = 8;
1940 }
1941 }
1942
1943 *p = 0;
1944 symbolP = symbol_find_or_make (name);
1945 *p = c;
1946
1947 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1948 {
1949 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1950 S_GET_NAME (symbolP));
1951 ignore_rest_of_line ();
1952 return;
1953 }
1954
1955 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1956 {
1957 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1958 S_GET_NAME (symbolP),
1959 (long) S_GET_VALUE (symbolP),
1960 (long) size);
1961
1962 ignore_rest_of_line ();
1963 return;
1964 }
1965
99a814a1 1966 /* Allocate_bss. */
252b5132
RH		 1967 old_sec = now_seg;
1968 old_subsec = now_subseg;
1969 if (align)
1970 {
99a814a1 1971 /* Convert to a power of 2 alignment. */
252b5132
RH		 1972 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1973 if (align != 1)
1974 {
1975 as_bad (_("Common alignment not a power of 2"));
1976 ignore_rest_of_line ();
1977 return;
1978 }
1979 }
1980 else
1981 align2 = 0;
1982
1983 record_alignment (bss_section, align2);
1984 subseg_set (bss_section, 0);
1985 if (align2)
1986 frag_align (align2, 0, 0);
1987 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1988 symbol_get_frag (symbolP)->fr_symbol = 0;
1989 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1990 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1991 (char *) 0);
1992 *pfrag = 0;
1993 S_SET_SIZE (symbolP, size);
1994 S_SET_SEGMENT (symbolP, bss_section);
1995 subseg_set (old_sec, old_subsec);
1996 demand_empty_rest_of_line ();
1997}
1998
1999/* Validate any relocations emitted for -mrelocatable, possibly adding
2000 fixups for word relocations in writable segments, so we can adjust
2001 them at runtime. */
2002static void
98027b10 2003ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2004{
2005 if (fixp->fx_done || fixp->fx_pcrel)
2006 return;
2007
2008 switch (shlib)
2009 {
2010 case SHLIB_NONE:
2011 case SHLIB_PIC:
2012 return;
2013
5d6f4f16 2014 case SHLIB_MRELOCATABLE:
252b5132
RH		 2015 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2016 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2017 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2018 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2019 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2020 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2021 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2022 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2023 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2024 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2025 && strcmp (segment_name (seg), ".got2") != 0
2026 && strcmp (segment_name (seg), ".dtors") != 0
2027 && strcmp (segment_name (seg), ".ctors") != 0
2028 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2029 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2030 && strcmp (segment_name (seg), ".eh_frame") != 0
2031 && strcmp (segment_name (seg), ".ex_shared") != 0)
2032 {
2033 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2034 || fixp->fx_r_type != BFD_RELOC_CTOR)
2035 {
2036 as_bad_where (fixp->fx_file, fixp->fx_line,
2037 _("Relocation cannot be done when using -mrelocatable"));
2038 }
2039 }
2040 return;
2041 }
2042}
0baf16f2 2043
7e8d4ab4
AM		 2044/* Prevent elf_frob_file_before_adjust removing a weak undefined
2045 function descriptor sym if the corresponding code sym is used. */
2046
2047void
98027b10 2048ppc_frob_file_before_adjust (void)
0baf16f2 2049{
7e8d4ab4 2050 symbolS *symp;
9232bbb0 2051 asection *toc;
0baf16f2 2052
7e8d4ab4
AM		 2053 if (!ppc_obj64)
2054 return;
2055
2056 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2057 {
7e8d4ab4
AM		 2058 const char *name;
2059 char *dotname;
2060 symbolS *dotsym;
2061 size_t len;
2062
2063 name = S_GET_NAME (symp);
2064 if (name[0] == '.')
2065 continue;
2066
2067 if (! S_IS_WEAK (symp)
2068 || S_IS_DEFINED (symp))
2069 continue;
2070
2071 len = strlen (name) + 1;
2072 dotname = xmalloc (len + 1);
2073 dotname[0] = '.';
2074 memcpy (dotname + 1, name, len);
461b725f 2075 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2076 free (dotname);
2077 if (dotsym != NULL && (symbol_used_p (dotsym)
2078 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2079 symbol_mark_used (symp);
2080
0baf16f2
AM		 2081 }
2082
9232bbb0
AM		 2083 toc = bfd_get_section_by_name (stdoutput, ".toc");
2084 if (toc != NULL
2085 && bfd_section_size (stdoutput, toc) > 0x10000)
2086 as_warn (_("TOC section size exceeds 64k"));
2087
7e8d4ab4
AM		 2088 /* Don't emit .TOC. symbol. */
2089 symp = symbol_find (".TOC.");
2090 if (symp != NULL)
2091 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2092}
252b5132
RH		 2093#endif /* OBJ_ELF */
2094\f
2095#ifdef TE_PE
2096
2097/*
99a814a1 2098 * Summary of parse_toc_entry.
252b5132
RH		 2099 *
2100 * in: Input_line_pointer points to the '[' in one of:
2101 *
2102 * [toc] [tocv] [toc32] [toc64]
2103 *
2104 * Anything else is an error of one kind or another.
2105 *
81d4177b 2106 * out:
252b5132
RH		 2107 * return value: success or failure
2108 * toc_kind: kind of toc reference
2109 * input_line_pointer:
2110 * success: first char after the ']'
2111 * failure: unchanged
2112 *
2113 * settings:
2114 *
2115 * [toc] - rv == success, toc_kind = default_toc
2116 * [tocv] - rv == success, toc_kind = data_in_toc
2117 * [toc32] - rv == success, toc_kind = must_be_32
2118 * [toc64] - rv == success, toc_kind = must_be_64
2119 *
2120 */
2121
81d4177b
KH		 2122enum toc_size_qualifier
2123{
252b5132
RH		 2124 default_toc, /* The toc cell constructed should be the system default size */
2125 data_in_toc, /* This is a direct reference to a toc cell */
2126 must_be_32, /* The toc cell constructed must be 32 bits wide */
2127 must_be_64 /* The toc cell constructed must be 64 bits wide */
2128};
2129
2130static int
98027b10 2131parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2132{
2133 char *start;
2134 char *toc_spec;
2135 char c;
2136 enum toc_size_qualifier t;
2137
99a814a1 2138 /* Save the input_line_pointer. */
252b5132
RH		 2139 start = input_line_pointer;
2140
99a814a1 2141 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2142 ++input_line_pointer;
2143 SKIP_WHITESPACE ();
81d4177b 2144
99a814a1 2145 /* Find the spelling of the operand. */
252b5132
RH		 2146 toc_spec = input_line_pointer;
2147 c = get_symbol_end ();
2148
99a814a1 2149 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2150 {
2151 t = default_toc;
2152 }
99a814a1 2153 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2154 {
2155 t = data_in_toc;
2156 }
99a814a1 2157 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2158 {
2159 t = must_be_32;
2160 }
99a814a1 2161 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2162 {
2163 t = must_be_64;
2164 }
2165 else
2166 {
2167 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2168 *input_line_pointer = c;
2169 input_line_pointer = start;
252b5132
RH		 2170 return 0;
2171 }
2172
99a814a1
AM		 2173 /* Now find the ']'. */
2174 *input_line_pointer = c;
252b5132 2175
81d4177b
KH		 2176 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2177 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2178
2179 if (c != ']')
2180 {
2181 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2182 input_line_pointer = start;
252b5132
RH		 2183 return 0;
2184 }
2185
99a814a1 2186 *toc_kind = t;
252b5132
RH		 2187 return 1;
2188}
2189#endif
2190\f
2191
dc1d03fc 2192#ifdef OBJ_ELF
6a0c61b7
EZ		 2193#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2194static void
98027b10 2195ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2196{
2197 unsigned int i;
2198
2199 /* Check we don't already exist. */
2200 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2201 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2202 return;
b34976b6 2203
6a0c61b7
EZ		 2204 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2205 {
2206 if (ppc_apuinfo_num_alloc == 0)
2207 {
2208 ppc_apuinfo_num_alloc = 4;
2209 ppc_apuinfo_list = (unsigned long *)
2210 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2211 }
2212 else
2213 {
2214 ppc_apuinfo_num_alloc += 4;
2215 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2216 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2217 }
2218 }
dc1d03fc 2219 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2220}
2221#undef APUID
dc1d03fc 2222#endif
6a0c61b7
EZ		 2223\f
2224
252b5132
RH		 2225/* We need to keep a list of fixups. We can't simply generate them as
2226 we go, because that would require us to first create the frag, and
2227 that would screw up references to ``.''. */
2228
2229struct ppc_fixup
2230{
2231 expressionS exp;
2232 int opindex;
2233 bfd_reloc_code_real_type reloc;
2234};
2235
2236#define MAX_INSN_FIXUPS (5)
2237
2238/* This routine is called for each instruction to be assembled. */
2239
2240void
98027b10 2241md_assemble (char *str)
252b5132
RH		 2242{
2243 char *s;
2244 const struct powerpc_opcode *opcode;
2245 unsigned long insn;
2246 const unsigned char *opindex_ptr;
2247 int skip_optional;
2248 int need_paren;
2249 int next_opindex;
2250 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2251 int fc;
2252 char *f;
09b935ac 2253 int addr_mod;
252b5132
RH		 2254 int i;
2255#ifdef OBJ_ELF
2256 bfd_reloc_code_real_type reloc;
2257#endif
2258
2259 /* Get the opcode. */
3882b010 2260 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2261 ;
2262 if (*s != '\0')
2263 *s++ = '\0';
2264
2265 /* Look up the opcode in the hash table. */
2266 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2267 if (opcode == (const struct powerpc_opcode *) NULL)
2268 {
2269 const struct powerpc_macro *macro;
2270
2271 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2272 if (macro == (const struct powerpc_macro *) NULL)
2273 as_bad (_("Unrecognized opcode: `%s'"), str);
2274 else
2275 ppc_macro (s, macro);
2276
2277 return;
2278 }
2279
2280 insn = opcode->opcode;
2281
2282 str = s;
3882b010 2283 while (ISSPACE (*str))
252b5132
RH		 2284 ++str;
2285
2286 /* PowerPC operands are just expressions. The only real issue is
2287 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2288 an optional operand separate the operands only with commas (in some
2289 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2290 have optional operands). Most instructions with optional operands
2291 have only one. Those that have more than one optional operand can
2292 take either all their operands or none. So, before we start seriously
2293 parsing the operands, we check to see if we have optional operands,
2294 and if we do, we count the number of commas to see which operands
2295 have been omitted. */
252b5132
RH		 2296 skip_optional = 0;
2297 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2298 {
2299 const struct powerpc_operand *operand;
2300
2301 operand = &powerpc_operands[*opindex_ptr];
2302 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2303 {
2304 unsigned int opcount;
7fe9cf6b
NC		 2305 unsigned int num_operands_expected;
2306 unsigned int i;
252b5132
RH		 2307
2308 /* There is an optional operand. Count the number of
2309 commas in the input line. */
2310 if (*str == '\0')
2311 opcount = 0;
2312 else
2313 {
2314 opcount = 1;
2315 s = str;
2316 while ((s = strchr (s, ',')) != (char *) NULL)
2317 {
2318 ++opcount;
2319 ++s;
2320 }
2321 }
2322
7fe9cf6b
NC		 2323 /* Compute the number of expected operands.
2324 Do not count fake operands. */
2325 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2326 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2327 ++ num_operands_expected;
2328
252b5132
RH		 2329 /* If there are fewer operands in the line then are called
2330 for by the instruction, we want to skip the optional
1f6c9eb0 2331 operands. */
7fe9cf6b 2332 if (opcount < num_operands_expected)
252b5132
RH		 2333 skip_optional = 1;
2334
2335 break;
2336 }
2337 }
2338
2339 /* Gather the operands. */
2340 need_paren = 0;
2341 next_opindex = 0;
2342 fc = 0;
2343 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2344 {
2345 const struct powerpc_operand *operand;
2346 const char *errmsg;
2347 char *hold;
2348 expressionS ex;
2349 char endc;
2350
2351 if (next_opindex == 0)
2352 operand = &powerpc_operands[*opindex_ptr];
2353 else
2354 {
2355 operand = &powerpc_operands[next_opindex];
2356 next_opindex = 0;
2357 }
252b5132
RH		 2358 errmsg = NULL;
2359
2360 /* If this is a fake operand, then we do not expect anything
2361 from the input. */
2362 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2363 {
2b3c4602 2364 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2365 if (errmsg != (const char *) NULL)
2366 as_bad (errmsg);
2367 continue;
2368 }
2369
2370 /* If this is an optional operand, and we are skipping it, just
2371 insert a zero. */
2372 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2373 && skip_optional)
2374 {
2375 if (operand->insert)
2376 {
2b3c4602 2377 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2378 if (errmsg != (const char *) NULL)
2379 as_bad (errmsg);
2380 }
2381 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2382 next_opindex = *opindex_ptr + 1;
2383 continue;
2384 }
2385
2386 /* Gather the operand. */
2387 hold = input_line_pointer;
2388 input_line_pointer = str;
2389
2390#ifdef TE_PE
81d4177b 2391 if (*input_line_pointer == '[')
252b5132
RH		 2392 {
2393 /* We are expecting something like the second argument here:
99a814a1
AM		 2394 *
2395 * lwz r4,[toc].GS.0.static_int(rtoc)
2396 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2397 * The argument following the `]' must be a symbol name, and the
2398 * register must be the toc register: 'rtoc' or '2'
2399 *
2400 * The effect is to 0 as the displacement field
2401 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2402 * the appropriate variation) reloc against it based on the symbol.
2403 * The linker will build the toc, and insert the resolved toc offset.
2404 *
2405 * Note:
2406 * o The size of the toc entry is currently assumed to be
2407 * 32 bits. This should not be assumed to be a hard coded
2408 * number.
2409 * o In an effort to cope with a change from 32 to 64 bits,
2410 * there are also toc entries that are specified to be
2411 * either 32 or 64 bits:
2412 * lwz r4,[toc32].GS.0.static_int(rtoc)
2413 * lwz r4,[toc64].GS.0.static_int(rtoc)
2414 * These demand toc entries of the specified size, and the
2415 * instruction probably requires it.
2416 */
252b5132
RH		 2417
2418 int valid_toc;
2419 enum toc_size_qualifier toc_kind;
2420 bfd_reloc_code_real_type toc_reloc;
2421
99a814a1
AM		 2422 /* Go parse off the [tocXX] part. */
2423 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2424
81d4177b 2425 if (!valid_toc)
252b5132 2426 {
99a814a1
AM		 2427 /* Note: message has already been issued.
2428 FIXME: what sort of recovery should we do?
2429 demand_rest_of_line (); return; ? */
252b5132
RH		 2430 }
2431
99a814a1
AM		 2432 /* Now get the symbol following the ']'. */
2433 expression (&ex);
252b5132
RH		 2434
2435 switch (toc_kind)
2436 {
2437 case default_toc:
99a814a1
AM		 2438 /* In this case, we may not have seen the symbol yet,
2439 since it is allowed to appear on a .extern or .globl
2440 or just be a label in the .data section. */
252b5132
RH		 2441 toc_reloc = BFD_RELOC_PPC_TOC16;
2442 break;
2443 case data_in_toc:
99a814a1
AM		 2444 /* 1. The symbol must be defined and either in the toc
2445 section, or a global.
2446 2. The reloc generated must have the TOCDEFN flag set
2447 in upper bit mess of the reloc type.
2448 FIXME: It's a little confusing what the tocv
2449 qualifier can be used for. At the very least, I've
2450 seen three uses, only one of which I'm sure I can
2451 explain. */
81d4177b
KH		 2452 if (ex.X_op == O_symbol)
2453 {
252b5132 2454 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2455 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2456 != tocdata_section)
252b5132 2457 {
99a814a1 2458 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2459 }
2460 }
2461
2462 toc_reloc = BFD_RELOC_PPC_TOC16;
2463 break;
2464 case must_be_32:
99a814a1
AM		 2465 /* FIXME: these next two specifically specify 32/64 bit
2466 toc entries. We don't support them today. Is this
2467 the right way to say that? */
252b5132
RH		 2468 toc_reloc = BFD_RELOC_UNUSED;
2469 as_bad (_("Unimplemented toc32 expression modifier"));
2470 break;
2471 case must_be_64:
99a814a1 2472 /* FIXME: see above. */
252b5132
RH		 2473 toc_reloc = BFD_RELOC_UNUSED;
2474 as_bad (_("Unimplemented toc64 expression modifier"));
2475 break;
2476 default:
bc805888 2477 fprintf (stderr,
99a814a1
AM		 2478 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2479 toc_kind);
bc805888 2480 abort ();
252b5132
RH		 2481 break;
2482 }
2483
2484 /* We need to generate a fixup for this expression. */
2485 if (fc >= MAX_INSN_FIXUPS)
2486 as_fatal (_("too many fixups"));
2487
2488 fixups[fc].reloc = toc_reloc;
2489 fixups[fc].exp = ex;
2490 fixups[fc].opindex = *opindex_ptr;
2491 ++fc;
2492
99a814a1
AM		 2493 /* Ok. We've set up the fixup for the instruction. Now make it
2494 look like the constant 0 was found here. */
252b5132
RH		 2495 ex.X_unsigned = 1;
2496 ex.X_op = O_constant;
2497 ex.X_add_number = 0;
2498 ex.X_add_symbol = NULL;
2499 ex.X_op_symbol = NULL;
2500 }
2501
2502 else
2503#endif /* TE_PE */
2504 {
2ad068be
AM		 2505 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2506 || !register_name (&ex))
252b5132 2507 {
13abbae3
AM		 2508 char save_lex = lex_type['%'];
2509
252b5132 2510 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2511 {
2512 cr_operand = TRUE;
2513 lex_type['%'] |= LEX_BEGIN_NAME;
2514 }
252b5132 2515 expression (&ex);
b34976b6 2516 cr_operand = FALSE;
13abbae3 2517 lex_type['%'] = save_lex;
252b5132
RH		 2518 }
2519 }
2520
2521 str = input_line_pointer;
2522 input_line_pointer = hold;
2523
2524 if (ex.X_op == O_illegal)
2525 as_bad (_("illegal operand"));
2526 else if (ex.X_op == O_absent)
2527 as_bad (_("missing operand"));
2528 else if (ex.X_op == O_register)
2529 {
2530 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2531 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2532 }
2533 else if (ex.X_op == O_constant)
2534 {
2535#ifdef OBJ_ELF
81d4177b 2536 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2537 char *orig_str = str;
2538
2539 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2540 switch (reloc)
2541 {
2542 default:
2543 str = orig_str;
2544 break;
2545
2546 case BFD_RELOC_LO16:
2547 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2548 something which cleared it, we always produce a
2549 signed value. */
2550 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2551 ex.X_add_number &= 0xffff;
2552 else
0baf16f2 2553 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2554 break;
2555
2556 case BFD_RELOC_HI16:
0baf16f2
AM		 2557 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2558 ex.X_add_number = PPC_HI (ex.X_add_number);
2559 else
2560 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2561 break;
2562
2563 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2564 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2565 ex.X_add_number = PPC_HA (ex.X_add_number);
2566 else
2567 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2568 break;
2569
0baf16f2
AM		 2570 case BFD_RELOC_PPC64_HIGHER:
2571 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2572 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2573 else
2574 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2575 break;
2576
2577 case BFD_RELOC_PPC64_HIGHER_S:
2578 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2579 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2580 else
2581 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2582 break;
0baf16f2
AM		 2583
2584 case BFD_RELOC_PPC64_HIGHEST:
2585 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2586 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2587 else
2588 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2589 break;
2590
2591 case BFD_RELOC_PPC64_HIGHEST_S:
2592 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2593 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2594 else
2595 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2596 break;
252b5132 2597 }
0baf16f2 2598#endif /* OBJ_ELF */
252b5132 2599 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2600 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2601 }
2602#ifdef OBJ_ELF
2603 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2604 {
cdba85ec
AM		 2605 /* Some TLS tweaks. */
2606 switch (reloc)
2607 {
2608 default:
2609 break;
2610 case BFD_RELOC_PPC_TLS:
2611 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
783de163 2612 ppc_cpu, (char *) NULL, 0);
cdba85ec
AM		 2613 break;
2614 /* We'll only use the 32 (or 64) bit form of these relocations
2615 in constants. Instructions get the 16 bit form. */
2616 case BFD_RELOC_PPC_DTPREL:
2617 reloc = BFD_RELOC_PPC_DTPREL16;
2618 break;
2619 case BFD_RELOC_PPC_TPREL:
2620 reloc = BFD_RELOC_PPC_TPREL16;
2621 break;
2622 }
2623
99a814a1
AM		 2624 /* For the absolute forms of branches, convert the PC
2625 relative form back into the absolute. */
252b5132
RH		 2626 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2627 {
2628 switch (reloc)
2629 {
2630 case BFD_RELOC_PPC_B26:
2631 reloc = BFD_RELOC_PPC_BA26;
2632 break;
2633 case BFD_RELOC_PPC_B16:
2634 reloc = BFD_RELOC_PPC_BA16;
2635 break;
2636 case BFD_RELOC_PPC_B16_BRTAKEN:
2637 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2638 break;
2639 case BFD_RELOC_PPC_B16_BRNTAKEN:
2640 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2641 break;
2642 default:
2643 break;
2644 }
2645 }
2646
2b3c4602 2647 if (ppc_obj64
adadcc0c 2648 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2649 {
2650 switch (reloc)
2651 {
2652 case BFD_RELOC_16:
2653 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2654 break;
2655 case BFD_RELOC_LO16:
2656 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2657 break;
2658 case BFD_RELOC_16_GOTOFF:
2659 reloc = BFD_RELOC_PPC64_GOT16_DS;
2660 break;
2661 case BFD_RELOC_LO16_GOTOFF:
2662 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2663 break;
2664 case BFD_RELOC_LO16_PLTOFF:
2665 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2666 break;
1cfc59d5 2667 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2668 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2669 break;
2670 case BFD_RELOC_LO16_BASEREL:
2671 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2672 break;
2673 case BFD_RELOC_PPC_TOC16:
2674 reloc = BFD_RELOC_PPC64_TOC16_DS;
2675 break;
2676 case BFD_RELOC_PPC64_TOC16_LO:
2677 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2678 break;
2679 case BFD_RELOC_PPC64_PLTGOT16:
2680 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2681 break;
2682 case BFD_RELOC_PPC64_PLTGOT16_LO:
2683 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2684 break;
cdba85ec
AM		 2685 case BFD_RELOC_PPC_DTPREL16:
2686 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2687 break;
2688 case BFD_RELOC_PPC_DTPREL16_LO:
2689 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2690 break;
2691 case BFD_RELOC_PPC_TPREL16:
2692 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2693 break;
2694 case BFD_RELOC_PPC_TPREL16_LO:
2695 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2696 break;
2697 case BFD_RELOC_PPC_GOT_DTPREL16:
2698 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2699 case BFD_RELOC_PPC_GOT_TPREL16:
2700 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2701 break;
0baf16f2
AM		 2702 default:
2703 as_bad (_("unsupported relocation for DS offset field"));
2704 break;
2705 }
2706 }
2707
252b5132
RH		 2708 /* We need to generate a fixup for this expression. */
2709 if (fc >= MAX_INSN_FIXUPS)
2710 as_fatal (_("too many fixups"));
2711 fixups[fc].exp = ex;
2712 fixups[fc].opindex = 0;
2713 fixups[fc].reloc = reloc;
2714 ++fc;
2715 }
2716#endif /* OBJ_ELF */
2717
2718 else
2719 {
2720 /* We need to generate a fixup for this expression. */
2721 if (fc >= MAX_INSN_FIXUPS)
2722 as_fatal (_("too many fixups"));
2723 fixups[fc].exp = ex;
2724 fixups[fc].opindex = *opindex_ptr;
2725 fixups[fc].reloc = BFD_RELOC_UNUSED;
2726 ++fc;
2727 }
2728
2729 if (need_paren)
2730 {
2731 endc = ')';
2732 need_paren = 0;
c3d65c1c
BE		 2733 /* If expecting more operands, then we want to see "),". */
2734 if (*str == endc && opindex_ptr[1] != 0)
2735 {
2736 do
2737 ++str;
2738 while (ISSPACE (*str));
2739 endc = ',';
2740 }
252b5132
RH		 2741 }
2742 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2743 {
2744 endc = '(';
2745 need_paren = 1;
2746 }
2747 else
2748 endc = ',';
2749
2750 /* The call to expression should have advanced str past any
2751 whitespace. */
2752 if (*str != endc
2753 && (endc != ',' || *str != '\0'))
2754 {
2755 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2756 break;
2757 }
2758
2759 if (*str != '\0')
2760 ++str;
2761 }
2762
3882b010 2763 while (ISSPACE (*str))
252b5132
RH		 2764 ++str;
2765
2766 if (*str != '\0')
2767 as_bad (_("junk at end of line: `%s'"), str);
2768
dc1d03fc 2769#ifdef OBJ_ELF
6a0c61b7
EZ		 2770 /* Do we need/want a APUinfo section? */
2771 if (ppc_cpu & (PPC_OPCODE_SPE
2772 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2773 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2774 | PPC_OPCODE_RFMCI))
2775 {
2776 /* These are all version "1". */
2777 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2778 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2779 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2780 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2781 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2782 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2783 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2784 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2785 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2786 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2787 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2788 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2789 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2790 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2791 }
dc1d03fc 2792#endif
6a0c61b7 2793
252b5132
RH		 2794 /* Write out the instruction. */
2795 f = frag_more (4);
09b935ac
AM		 2796 addr_mod = frag_now_fix () & 3;
2797 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2798 as_bad (_("instruction address is not a multiple of 4"));
2799 frag_now->insn_addr = addr_mod;
2800 frag_now->has_code = 1;
252b5132
RH		 2801 md_number_to_chars (f, insn, 4);
2802
5d6f4f16
GK		 2803#ifdef OBJ_ELF
2804 dwarf2_emit_insn (4);
2805#endif
2806
252b5132
RH		 2807 /* Create any fixups. At this point we do not use a
2808 bfd_reloc_code_real_type, but instead just use the
2809 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2810 handle fixups for any operand type, although that is admittedly
2811 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2812 md_apply_fix. */
252b5132
RH		 2813 for (i = 0; i < fc; i++)
2814 {
2815 const struct powerpc_operand *operand;
2816
2817 operand = &powerpc_operands[fixups[i].opindex];
2818 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2819 {
99a814a1 2820 reloc_howto_type *reloc_howto;
252b5132
RH		 2821 int size;
2822 int offset;
2823 fixS *fixP;
2824
99a814a1 2825 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2826 if (!reloc_howto)
2827 abort ();
2828
2829 size = bfd_get_reloc_size (reloc_howto);
2830 offset = target_big_endian ? (4 - size) : 0;
2831
2832 if (size < 1 || size > 4)
bc805888 2833 abort ();
252b5132 2834
99a814a1
AM		 2835 fixP = fix_new_exp (frag_now,
2836 f - frag_now->fr_literal + offset,
2837 size,
2838 &fixups[i].exp,
2839 reloc_howto->pc_relative,
252b5132
RH		 2840 fixups[i].reloc);
2841
2842 /* Turn off complaints that the addend is too large for things like
2843 foo+100000@ha. */
2844 switch (fixups[i].reloc)
2845 {
2846 case BFD_RELOC_16_GOTOFF:
2847 case BFD_RELOC_PPC_TOC16:
2848 case BFD_RELOC_LO16:
2849 case BFD_RELOC_HI16:
2850 case BFD_RELOC_HI16_S:
0baf16f2 2851#ifdef OBJ_ELF
0baf16f2
AM		 2852 case BFD_RELOC_PPC64_HIGHER:
2853 case BFD_RELOC_PPC64_HIGHER_S:
2854 case BFD_RELOC_PPC64_HIGHEST:
2855 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2856#endif
252b5132
RH		 2857 fixP->fx_no_overflow = 1;
2858 break;
2859 default:
2860 break;
2861 }
2862 }
2863 else
99a814a1
AM		 2864 fix_new_exp (frag_now,
2865 f - frag_now->fr_literal,
2866 4,
252b5132
RH		 2867 &fixups[i].exp,
2868 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2869 ((bfd_reloc_code_real_type)
99a814a1 2870 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2871 }
2872}
2873
2874/* Handle a macro. Gather all the operands, transform them as
2875 described by the macro, and call md_assemble recursively. All the
2876 operands are separated by commas; we don't accept parentheses
2877 around operands here. */
2878
2879static void
98027b10 2880ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2881{
2882 char *operands[10];
2883 unsigned int count;
2884 char *s;
2885 unsigned int len;
2886 const char *format;
db557034 2887 unsigned int arg;
252b5132
RH		 2888 char *send;
2889 char *complete;
2890
2891 /* Gather the users operands into the operands array. */
2892 count = 0;
2893 s = str;
2894 while (1)
2895 {
2896 if (count >= sizeof operands / sizeof operands[0])
2897 break;
2898 operands[count++] = s;
2899 s = strchr (s, ',');
2900 if (s == (char *) NULL)
2901 break;
2902 *s++ = '\0';
81d4177b 2903 }
252b5132
RH		 2904
2905 if (count != macro->operands)
2906 {
2907 as_bad (_("wrong number of operands"));
2908 return;
2909 }
2910
2911 /* Work out how large the string must be (the size is unbounded
2912 because it includes user input). */
2913 len = 0;
2914 format = macro->format;
2915 while (*format != '\0')
2916 {
2917 if (*format != '%')
2918 {
2919 ++len;
2920 ++format;
2921 }
2922 else
2923 {
2924 arg = strtol (format + 1, &send, 10);
db557034 2925 know (send != format && arg < count);
252b5132
RH		 2926 len += strlen (operands[arg]);
2927 format = send;
2928 }
2929 }
2930
2931 /* Put the string together. */
2932 complete = s = (char *) alloca (len + 1);
2933 format = macro->format;
2934 while (*format != '\0')
2935 {
2936 if (*format != '%')
2937 *s++ = *format++;
2938 else
2939 {
2940 arg = strtol (format + 1, &send, 10);
2941 strcpy (s, operands[arg]);
2942 s += strlen (s);
2943 format = send;
2944 }
2945 }
2946 *s = '\0';
2947
2948 /* Assemble the constructed instruction. */
2949 md_assemble (complete);
81d4177b 2950}
252b5132
RH		 2951\f
2952#ifdef OBJ_ELF
99a814a1 2953/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 2954
01e1a5bc 2955bfd_vma
98027b10 2956ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2957{
2958 if (letter == 'e')
2959 return SHF_EXCLUDE;
2960
13ae64f3 2961 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2962 return -1;
252b5132
RH		 2963}
2964
01e1a5bc 2965bfd_vma
98027b10 2966ppc_section_word (char *str, size_t len)
252b5132 2967{
9de8d8f1
RH		 2968 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2969 return SHF_EXCLUDE;
252b5132 2970
9de8d8f1 2971 return -1;
252b5132
RH		 2972}
2973
2974int
98027b10 2975ppc_section_type (char *str, size_t len)
252b5132 2976{
9de8d8f1
RH		 2977 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2978 return SHT_ORDERED;
252b5132 2979
9de8d8f1 2980 return -1;
252b5132
RH		 2981}
2982
2983int
01e1a5bc 2984ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 2985{
2986 if (type == SHT_ORDERED)
2987 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2988
2989 if (attr & SHF_EXCLUDE)
2990 flags |= SEC_EXCLUDE;
2991
2992 return flags;
2993}
2994#endif /* OBJ_ELF */
2995
2996\f
2997/* Pseudo-op handling. */
2998
2999/* The .byte pseudo-op. This is similar to the normal .byte
3000 pseudo-op, but it can also take a single ASCII string. */
3001
3002static void
98027b10 3003ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3004{
3005 if (*input_line_pointer != '\"')
3006 {
3007 cons (1);
3008 return;
3009 }
3010
3011 /* Gather characters. A real double quote is doubled. Unusual
3012 characters are not permitted. */
3013 ++input_line_pointer;
3014 while (1)
3015 {
3016 char c;
3017
3018 c = *input_line_pointer++;
3019
3020 if (c == '\"')
3021 {
3022 if (*input_line_pointer != '\"')
3023 break;
3024 ++input_line_pointer;
3025 }
3026
3027 FRAG_APPEND_1_CHAR (c);
3028 }
3029
3030 demand_empty_rest_of_line ();
3031}
3032\f
3033#ifdef OBJ_XCOFF
3034
3035/* XCOFF specific pseudo-op handling. */
3036
3037/* This is set if we are creating a .stabx symbol, since we don't want
3038 to handle symbol suffixes for such symbols. */
b34976b6 3039static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3040
3041/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3042 symbols in the .bss segment as though they were local common
67c1ffbe 3043 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3044 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3045
3046static void
98027b10 3047ppc_comm (int lcomm)
252b5132
RH		 3048{
3049 asection *current_seg = now_seg;
3050 subsegT current_subseg = now_subseg;
3051 char *name;
3052 char endc;
3053 char *end_name;
3054 offsetT size;
3055 offsetT align;
3056 symbolS *lcomm_sym = NULL;
3057 symbolS *sym;
3058 char *pfrag;
3059
3060 name = input_line_pointer;
3061 endc = get_symbol_end ();
3062 end_name = input_line_pointer;
3063 *end_name = endc;
3064
3065 if (*input_line_pointer != ',')
3066 {
3067 as_bad (_("missing size"));
3068 ignore_rest_of_line ();
3069 return;
3070 }
3071 ++input_line_pointer;
3072
3073 size = get_absolute_expression ();
3074 if (size < 0)
3075 {
3076 as_bad (_("negative size"));
3077 ignore_rest_of_line ();
3078 return;
3079 }
3080
3081 if (! lcomm)
3082 {
3083 /* The third argument to .comm is the alignment. */
3084 if (*input_line_pointer != ',')
1ad63b2f 3085 align = 2;
252b5132
RH		 3086 else
3087 {
3088 ++input_line_pointer;
3089 align = get_absolute_expression ();
3090 if (align <= 0)
3091 {
3092 as_warn (_("ignoring bad alignment"));
1ad63b2f 3093 align = 2;
252b5132
RH		 3094 }
3095 }
3096 }
3097 else
3098 {
3099 char *lcomm_name;
3100 char lcomm_endc;
3101
1ad63b2f 3102 if (size <= 4)
252b5132
RH		 3103 align = 2;
3104 else
3105 align = 3;
3106
3107 /* The third argument to .lcomm appears to be the real local
3108 common symbol to create. References to the symbol named in
3109 the first argument are turned into references to the third
3110 argument. */
3111 if (*input_line_pointer != ',')
3112 {
3113 as_bad (_("missing real symbol name"));
3114 ignore_rest_of_line ();
3115 return;
3116 }
3117 ++input_line_pointer;
3118
3119 lcomm_name = input_line_pointer;
3120 lcomm_endc = get_symbol_end ();
81d4177b 3121
252b5132
RH		 3122 lcomm_sym = symbol_find_or_make (lcomm_name);
3123
3124 *input_line_pointer = lcomm_endc;
3125 }
3126
3127 *end_name = '\0';
3128 sym = symbol_find_or_make (name);
3129 *end_name = endc;
3130
3131 if (S_IS_DEFINED (sym)
3132 || S_GET_VALUE (sym) != 0)
3133 {
3134 as_bad (_("attempt to redefine symbol"));
3135 ignore_rest_of_line ();
3136 return;
3137 }
81d4177b 3138
252b5132 3139 record_alignment (bss_section, align);
81d4177b 3140
252b5132
RH		 3141 if (! lcomm
3142 || ! S_IS_DEFINED (lcomm_sym))
3143 {
3144 symbolS *def_sym;
3145 offsetT def_size;
3146
3147 if (! lcomm)
3148 {
3149 def_sym = sym;
3150 def_size = size;
3151 S_SET_EXTERNAL (sym);
3152 }
3153 else
3154 {
809ffe0d 3155 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3156 def_sym = lcomm_sym;
3157 def_size = 0;
3158 }
3159
3160 subseg_set (bss_section, 1);
3161 frag_align (align, 0, 0);
81d4177b 3162
809ffe0d 3163 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3164 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3165 def_size, (char *) NULL);
3166 *pfrag = 0;
3167 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3168 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3169 }
3170 else if (lcomm)
3171 {
3172 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3173 symbol_get_frag (lcomm_sym)->fr_offset =
3174 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3175 &~ ((1 << align) - 1));
809ffe0d
ILT		 3176 if (align > symbol_get_tc (lcomm_sym)->align)
3177 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3178 }
3179
3180 if (lcomm)
3181 {
3182 /* Make sym an offset from lcomm_sym. */
3183 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3184 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3185 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3186 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3187 }
3188
3189 subseg_set (current_seg, current_subseg);
3190
3191 demand_empty_rest_of_line ();
3192}
3193
3194/* The .csect pseudo-op. This switches us into a different
3195 subsegment. The first argument is a symbol whose value is the
3196 start of the .csect. In COFF, csect symbols get special aux
3197 entries defined by the x_csect field of union internal_auxent. The
3198 optional second argument is the alignment (the default is 2). */
3199
3200static void
98027b10 3201ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3202{
3203 char *name;
3204 char endc;
3205 symbolS *sym;
931e13a6 3206 offsetT align;
252b5132
RH		 3207
3208 name = input_line_pointer;
3209 endc = get_symbol_end ();
81d4177b 3210
252b5132
RH		 3211 sym = symbol_find_or_make (name);
3212
3213 *input_line_pointer = endc;
3214
3215 if (S_GET_NAME (sym)[0] == '\0')
3216 {
3217 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3218 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3219 }
3220
931e13a6 3221 align = 2;
252b5132
RH		 3222 if (*input_line_pointer == ',')
3223 {
3224 ++input_line_pointer;
931e13a6 3225 align = get_absolute_expression ();
252b5132
RH		 3226 }
3227
931e13a6
AM		 3228 ppc_change_csect (sym, align);
3229
252b5132
RH		 3230 demand_empty_rest_of_line ();
3231}
3232
3233/* Change to a different csect. */
3234
3235static void
98027b10 3236ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3237{
3238 if (S_IS_DEFINED (sym))
809ffe0d 3239 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3240 else
3241 {
3242 symbolS **list_ptr;
3243 int after_toc;
3244 int hold_chunksize;
3245 symbolS *list;
931e13a6
AM		 3246 int is_code;
3247 segT sec;
252b5132
RH		 3248
3249 /* This is a new csect. We need to look at the symbol class to
3250 figure out whether it should go in the text section or the
3251 data section. */
3252 after_toc = 0;
931e13a6 3253 is_code = 0;
809ffe0d 3254 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3255 {
3256 case XMC_PR:
3257 case XMC_RO:
3258 case XMC_DB:
3259 case XMC_GL:
3260 case XMC_XO:
3261 case XMC_SV:
3262 case XMC_TI:
3263 case XMC_TB:
3264 S_SET_SEGMENT (sym, text_section);
809ffe0d 3265 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3266 ++ppc_text_subsegment;
3267 list_ptr = &ppc_text_csects;
931e13a6 3268 is_code = 1;
252b5132
RH		 3269 break;
3270 case XMC_RW:
3271 case XMC_TC0:
3272 case XMC_TC:
3273 case XMC_DS:
3274 case XMC_UA:
3275 case XMC_BS:
3276 case XMC_UC:
3277 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3278 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3279 == ppc_data_subsegment))
252b5132
RH		 3280 after_toc = 1;
3281 S_SET_SEGMENT (sym, data_section);
809ffe0d 3282 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3283 ++ppc_data_subsegment;
3284 list_ptr = &ppc_data_csects;
3285 break;
3286 default:
3287 abort ();
3288 }
3289
3290 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3291 changing subsegments, so that we don't use a lot of memory
3292 space for what may be a small section. */
252b5132
RH		 3293 hold_chunksize = chunksize;
3294 chunksize = 64;
3295
931e13a6
AM		 3296 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3297 symbol_get_tc (sym)->subseg);
252b5132
RH		 3298
3299 chunksize = hold_chunksize;
3300
3301 if (after_toc)
3302 ppc_after_toc_frag = frag_now;
3303
931e13a6
AM		 3304 record_alignment (sec, align);
3305 if (is_code)
3306 frag_align_code (align, 0);
3307 else
3308 frag_align (align, 0, 0);
3309
809ffe0d 3310 symbol_set_frag (sym, frag_now);
252b5132
RH		 3311 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3312
931e13a6 3313 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3314 symbol_get_tc (sym)->output = 1;
3315 symbol_get_tc (sym)->within = sym;
81d4177b 3316
252b5132 3317 for (list = *list_ptr;
809ffe0d
ILT		 3318 symbol_get_tc (list)->next != (symbolS *) NULL;
3319 list = symbol_get_tc (list)->next)
252b5132 3320 ;
809ffe0d 3321 symbol_get_tc (list)->next = sym;
81d4177b 3322
252b5132 3323 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3324 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3325 &symbol_lastP);
252b5132
RH		 3326 }
3327
3328 ppc_current_csect = sym;
3329}
3330
3331/* This function handles the .text and .data pseudo-ops. These
3332 pseudo-ops aren't really used by XCOFF; we implement them for the
3333 convenience of people who aren't used to XCOFF. */
3334
3335static void
98027b10 3336ppc_section (int type)
252b5132
RH		 3337{
3338 const char *name;
3339 symbolS *sym;
3340
3341 if (type == 't')
3342 name = ".text[PR]";
3343 else if (type == 'd')
3344 name = ".data[RW]";
3345 else
3346 abort ();
3347
3348 sym = symbol_find_or_make (name);
3349
931e13a6 3350 ppc_change_csect (sym, 2);
252b5132
RH		 3351
3352 demand_empty_rest_of_line ();
3353}
3354
3355/* This function handles the .section pseudo-op. This is mostly to
3356 give an error, since XCOFF only supports .text, .data and .bss, but
3357 we do permit the user to name the text or data section. */
3358
3359static void
98027b10 3360ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3361{
3362 char *user_name;
3363 const char *real_name;
3364 char c;
3365 symbolS *sym;
3366
3367 user_name = input_line_pointer;
3368 c = get_symbol_end ();
3369
3370 if (strcmp (user_name, ".text") == 0)
3371 real_name = ".text[PR]";
3372 else if (strcmp (user_name, ".data") == 0)
3373 real_name = ".data[RW]";
3374 else
3375 {
3376 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3377 *input_line_pointer = c;
3378 ignore_rest_of_line ();
3379 return;
3380 }
3381
3382 *input_line_pointer = c;
3383
3384 sym = symbol_find_or_make (real_name);
3385
931e13a6 3386 ppc_change_csect (sym, 2);
252b5132
RH		 3387
3388 demand_empty_rest_of_line ();
3389}
3390
3391/* The .extern pseudo-op. We create an undefined symbol. */
3392
3393static void
98027b10 3394ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3395{
3396 char *name;
3397 char endc;
3398
3399 name = input_line_pointer;
3400 endc = get_symbol_end ();
3401
3402 (void) symbol_find_or_make (name);
3403
3404 *input_line_pointer = endc;
3405
3406 demand_empty_rest_of_line ();
3407}
3408
3409/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3410
3411static void
98027b10 3412ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3413{
3414 char *name;
3415 char endc;
3416 symbolS *sym;
3417
3418 name = input_line_pointer;
3419 endc = get_symbol_end ();
3420
3421 sym = symbol_find_or_make (name);
3422
3423 *input_line_pointer = endc;
3424
809ffe0d 3425 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3426
3427 demand_empty_rest_of_line ();
3428}
3429
3430/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3431 although I don't know why it bothers. */
3432
3433static void
98027b10 3434ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3435{
3436 char *name;
3437 char endc;
3438 symbolS *sym;
3439 int len;
3440
3441 name = input_line_pointer;
3442 endc = get_symbol_end ();
3443
3444 sym = symbol_find_or_make (name);
3445
3446 *input_line_pointer = endc;
3447
3448 if (*input_line_pointer != ',')
3449 {
3450 as_bad (_("missing rename string"));
3451 ignore_rest_of_line ();
3452 return;
3453 }
3454 ++input_line_pointer;
3455
809ffe0d 3456 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3457
3458 demand_empty_rest_of_line ();
3459}
3460
3461/* The .stabx pseudo-op. This is similar to a normal .stabs
3462 pseudo-op, but slightly different. A sample is
3463 .stabx "main:F-1",.main,142,0
3464 The first argument is the symbol name to create. The second is the
3465 value, and the third is the storage class. The fourth seems to be
3466 always zero, and I am assuming it is the type. */
3467
3468static void
98027b10 3469ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3470{
3471 char *name;
3472 int len;
3473 symbolS *sym;
3474 expressionS exp;
3475
3476 name = demand_copy_C_string (&len);
3477
3478 if (*input_line_pointer != ',')
3479 {
3480 as_bad (_("missing value"));
3481 return;
3482 }
3483 ++input_line_pointer;
3484
b34976b6 3485 ppc_stab_symbol = TRUE;
252b5132 3486 sym = symbol_make (name);
b34976b6 3487 ppc_stab_symbol = FALSE;
252b5132 3488
809ffe0d 3489 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3490
3491 (void) expression (&exp);
3492
3493 switch (exp.X_op)
3494 {
3495 case O_illegal:
3496 case O_absent:
3497 case O_big:
3498 as_bad (_("illegal .stabx expression; zero assumed"));
3499 exp.X_add_number = 0;
3500 /* Fall through. */
3501 case O_constant:
3502 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3503 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3504 break;
3505
3506 case O_symbol:
3507 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3508 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3509 else
3510 {
3511 S_SET_VALUE (sym,
3512 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3513 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3514 }
3515 break;
3516
3517 default:
3518 /* The value is some complex expression. This will probably
99a814a1
AM		 3519 fail at some later point, but this is probably the right
3520 thing to do here. */
809ffe0d 3521 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3522 break;
3523 }
3524
3525 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3526 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3527
3528 if (*input_line_pointer != ',')
3529 {
3530 as_bad (_("missing class"));
3531 return;
3532 }
3533 ++input_line_pointer;
3534
3535 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3536
3537 if (*input_line_pointer != ',')
3538 {
3539 as_bad (_("missing type"));
3540 return;
3541 }
3542 ++input_line_pointer;
3543
3544 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3545
809ffe0d 3546 symbol_get_tc (sym)->output = 1;
252b5132 3547
6877bb43 3548 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3549
809ffe0d 3550 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3551
41ea10b1 3552 /* In this case :
99a814a1 3553
41ea10b1
TR		 3554 .bs name
3555 .stabx "z",arrays_,133,0
3556 .es
99a814a1 3557
41ea10b1 3558 .comm arrays_,13768,3
99a814a1 3559
41ea10b1
TR		 3560 resolve_symbol_value will copy the exp's "within" into sym's when the
3561 offset is 0. Since this seems to be corner case problem,
3562 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3563 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3564
3565 if (exp.X_op == O_symbol)
41ea10b1
TR		 3566 {
3567 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3568 }
6877bb43 3569 }
99a814a1 3570
252b5132
RH		 3571 if (exp.X_op != O_symbol
3572 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3573 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3574 ppc_frob_label (sym);
3575 else
3576 {
3577 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3578 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3579 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3580 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3581 }
3582
3583 demand_empty_rest_of_line ();
3584}
3585
3586/* The .function pseudo-op. This takes several arguments. The first
3587 argument seems to be the external name of the symbol. The second
67c1ffbe 3588 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3589 uses the same name for both. I have no idea what the third and
3590 fourth arguments are meant to be. The optional fifth argument is
3591 an expression for the size of the function. In COFF this symbol
3592 gets an aux entry like that used for a csect. */
3593
3594static void
98027b10 3595ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3596{
3597 char *name;
3598 char endc;
3599 char *s;
3600 symbolS *ext_sym;
3601 symbolS *lab_sym;
3602
3603 name = input_line_pointer;
3604 endc = get_symbol_end ();
3605
3606 /* Ignore any [PR] suffix. */
3607 name = ppc_canonicalize_symbol_name (name);
3608 s = strchr (name, '[');
3609 if (s != (char *) NULL
3610 && strcmp (s + 1, "PR]") == 0)
3611 *s = '\0';
3612
3613 ext_sym = symbol_find_or_make (name);
3614
3615 *input_line_pointer = endc;
3616
3617 if (*input_line_pointer != ',')
3618 {
3619 as_bad (_("missing symbol name"));
3620 ignore_rest_of_line ();
3621 return;
3622 }
3623 ++input_line_pointer;
3624
3625 name = input_line_pointer;
3626 endc = get_symbol_end ();
3627
3628 lab_sym = symbol_find_or_make (name);
3629
3630 *input_line_pointer = endc;
3631
3632 if (ext_sym != lab_sym)
3633 {
809ffe0d
ILT		 3634 expressionS exp;
3635
3636 exp.X_op = O_symbol;
3637 exp.X_add_symbol = lab_sym;
3638 exp.X_op_symbol = NULL;
3639 exp.X_add_number = 0;
3640 exp.X_unsigned = 0;
3641 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3642 }
3643
809ffe0d
ILT		 3644 if (symbol_get_tc (ext_sym)->class == -1)
3645 symbol_get_tc (ext_sym)->class = XMC_PR;
3646 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3647
3648 if (*input_line_pointer == ',')
3649 {
3650 expressionS ignore;
3651
3652 /* Ignore the third argument. */
3653 ++input_line_pointer;
3654 expression (&ignore);
3655 if (*input_line_pointer == ',')
3656 {
3657 /* Ignore the fourth argument. */
3658 ++input_line_pointer;
3659 expression (&ignore);
3660 if (*input_line_pointer == ',')
3661 {
3662 /* The fifth argument is the function size. */
3663 ++input_line_pointer;
809ffe0d
ILT		 3664 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3665 absolute_section,
3666 (valueT) 0,
3667 &zero_address_frag);
3668 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3669 }
3670 }
3671 }
3672
3673 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3674 SF_SET_FUNCTION (ext_sym);
3675 SF_SET_PROCESS (ext_sym);
3676 coff_add_linesym (ext_sym);
3677
3678 demand_empty_rest_of_line ();
3679}
3680
3681/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3682 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3683 with the correct line number */
5d6255fe 3684
8642cce8 3685static symbolS *saved_bi_sym = 0;
252b5132
RH		 3686
3687static void
98027b10 3688ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3689{
3690 symbolS *sym;
3691
3692 sym = symbol_make (".bf");
3693 S_SET_SEGMENT (sym, text_section);
809ffe0d 3694 symbol_set_frag (sym, frag_now);
252b5132
RH		 3695 S_SET_VALUE (sym, frag_now_fix ());
3696 S_SET_STORAGE_CLASS (sym, C_FCN);
3697
3698 coff_line_base = get_absolute_expression ();
3699
3700 S_SET_NUMBER_AUXILIARY (sym, 1);
3701 SA_SET_SYM_LNNO (sym, coff_line_base);
3702
8642cce8 3703 /* Line number for bi. */
5d6255fe 3704 if (saved_bi_sym)
8642cce8
TR		 3705 {
3706 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3707 saved_bi_sym = 0;
3708 }
5d6255fe 3709
8642cce8 3710
809ffe0d 3711 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3712
3713 ppc_frob_label (sym);
3714
3715 demand_empty_rest_of_line ();
3716}
3717
3718/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3719 ".ef", except that the line number is absolute, not relative to the
3720 most recent ".bf" symbol. */
3721
3722static void
98027b10 3723ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3724{
3725 symbolS *sym;
3726
3727 sym = symbol_make (".ef");
3728 S_SET_SEGMENT (sym, text_section);
809ffe0d 3729 symbol_set_frag (sym, frag_now);
252b5132
RH		 3730 S_SET_VALUE (sym, frag_now_fix ());
3731 S_SET_STORAGE_CLASS (sym, C_FCN);
3732 S_SET_NUMBER_AUXILIARY (sym, 1);
3733 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3734 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3735
3736 ppc_frob_label (sym);
3737
3738 demand_empty_rest_of_line ();
3739}
3740
3741/* The .bi and .ei pseudo-ops. These take a string argument and
3742 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3743 the symbol list. The value of .bi will be know when the next .bf
3744 is encountered. */
252b5132
RH		 3745
3746static void
98027b10 3747ppc_biei (int ei)
252b5132
RH		 3748{
3749 static symbolS *last_biei;
3750
3751 char *name;
3752 int len;
3753 symbolS *sym;
3754 symbolS *look;
3755
3756 name = demand_copy_C_string (&len);
3757
3758 /* The value of these symbols is actually file offset. Here we set
3759 the value to the index into the line number entries. In
3760 ppc_frob_symbols we set the fix_line field, which will cause BFD
3761 to do the right thing. */
3762
3763 sym = symbol_make (name);
3764 /* obj-coff.c currently only handles line numbers correctly in the
3765 .text section. */
3766 S_SET_SEGMENT (sym, text_section);
3767 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3768 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3769
3770 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3771 symbol_get_tc (sym)->output = 1;
81d4177b 3772
8642cce8 3773 /* Save bi. */
5d6255fe 3774 if (ei)
8642cce8
TR		 3775 saved_bi_sym = 0;
3776 else
3777 saved_bi_sym = sym;
3778
252b5132
RH		 3779 for (look = last_biei ? last_biei : symbol_rootP;
3780 (look != (symbolS *) NULL
3781 && (S_GET_STORAGE_CLASS (look) == C_FILE
3782 || S_GET_STORAGE_CLASS (look) == C_BINCL
3783 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3784 look = symbol_next (look))
3785 ;
3786 if (look != (symbolS *) NULL)
3787 {
3788 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3789 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3790 last_biei = sym;
3791 }
3792
3793 demand_empty_rest_of_line ();
3794}
3795
3796/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3797 There is one argument, which is a csect symbol. The value of the
3798 .bs symbol is the index of this csect symbol. */
3799
3800static void
98027b10 3801ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3802{
3803 char *name;
3804 char endc;
3805 symbolS *csect;
3806 symbolS *sym;
3807
3808 if (ppc_current_block != NULL)
3809 as_bad (_("nested .bs blocks"));
3810
3811 name = input_line_pointer;
3812 endc = get_symbol_end ();
3813
3814 csect = symbol_find_or_make (name);
3815
3816 *input_line_pointer = endc;
3817
3818 sym = symbol_make (".bs");
3819 S_SET_SEGMENT (sym, now_seg);
3820 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3821 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3822 symbol_get_tc (sym)->output = 1;
252b5132 3823
809ffe0d 3824 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3825
3826 ppc_frob_label (sym);
3827
3828 ppc_current_block = sym;
3829
3830 demand_empty_rest_of_line ();
3831}
3832
3833/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3834
3835static void
98027b10 3836ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3837{
3838 symbolS *sym;
3839
3840 if (ppc_current_block == NULL)
3841 as_bad (_(".es without preceding .bs"));
3842
3843 sym = symbol_make (".es");
3844 S_SET_SEGMENT (sym, now_seg);
3845 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3846 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3847 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3848
3849 ppc_frob_label (sym);
3850
3851 ppc_current_block = NULL;
3852
3853 demand_empty_rest_of_line ();
3854}
3855
3856/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3857 line number. */
3858
3859static void
98027b10 3860ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3861{
3862 symbolS *sym;
3863
3864 sym = symbol_make (".bb");
3865 S_SET_SEGMENT (sym, text_section);
809ffe0d 3866 symbol_set_frag (sym, frag_now);
252b5132
RH		 3867 S_SET_VALUE (sym, frag_now_fix ());
3868 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3869
3870 S_SET_NUMBER_AUXILIARY (sym, 1);
3871 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3872
809ffe0d 3873 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3874
3875 SF_SET_PROCESS (sym);
3876
3877 ppc_frob_label (sym);
3878
3879 demand_empty_rest_of_line ();
3880}
3881
3882/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3883 line number. */
3884
3885static void
98027b10 3886ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3887{
3888 symbolS *sym;
3889
3890 sym = symbol_make (".eb");
3891 S_SET_SEGMENT (sym, text_section);
809ffe0d 3892 symbol_set_frag (sym, frag_now);
252b5132
RH		 3893 S_SET_VALUE (sym, frag_now_fix ());
3894 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3895 S_SET_NUMBER_AUXILIARY (sym, 1);
3896 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3897 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3898
3899 SF_SET_PROCESS (sym);
3900
3901 ppc_frob_label (sym);
3902
3903 demand_empty_rest_of_line ();
3904}
3905
3906/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3907 specified name. */
3908
3909static void
98027b10 3910ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3911{
3912 char *name;
3913 int len;
3914 symbolS *sym;
3915
3916 name = demand_copy_C_string (&len);
3917 sym = symbol_make (name);
3918 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3919 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3920 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3921 S_SET_VALUE (sym, 0);
809ffe0d 3922 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3923
3924 ppc_frob_label (sym);
3925
3926 demand_empty_rest_of_line ();
3927}
3928
3929/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3930
3931static void
98027b10 3932ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3933{
3934 symbolS *sym;
3935
3936 sym = symbol_make (".ec");
3937 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3938 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3939 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3940 S_SET_VALUE (sym, 0);
809ffe0d 3941 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3942
3943 ppc_frob_label (sym);
3944
3945 demand_empty_rest_of_line ();
3946}
3947
3948/* The .toc pseudo-op. Switch to the .toc subsegment. */
3949
3950static void
98027b10 3951ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3952{
3953 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3954 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3955 else
3956 {
3957 subsegT subseg;
3958 symbolS *sym;
3959 symbolS *list;
81d4177b 3960
252b5132
RH		 3961 subseg = ppc_data_subsegment;
3962 ++ppc_data_subsegment;
3963
3964 subseg_new (segment_name (data_section), subseg);
3965 ppc_toc_frag = frag_now;
3966
3967 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3968 symbol_set_frag (sym, frag_now);
252b5132
RH		 3969 S_SET_SEGMENT (sym, data_section);
3970 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3971 symbol_get_tc (sym)->subseg = subseg;
3972 symbol_get_tc (sym)->output = 1;
3973 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3974
3975 ppc_toc_csect = sym;
81d4177b 3976
252b5132 3977 for (list = ppc_data_csects;
809ffe0d
ILT		 3978 symbol_get_tc (list)->next != (symbolS *) NULL;
3979 list = symbol_get_tc (list)->next)
252b5132 3980 ;
809ffe0d 3981 symbol_get_tc (list)->next = sym;
252b5132
RH		 3982
3983 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3984 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3985 &symbol_lastP);
252b5132
RH		 3986 }
3987
3988 ppc_current_csect = ppc_toc_csect;
3989
3990 demand_empty_rest_of_line ();
3991}
3992
3993/* The AIX assembler automatically aligns the operands of a .long or
3994 .short pseudo-op, and we want to be compatible. */
3995
3996static void
98027b10 3997ppc_xcoff_cons (int log_size)
252b5132
RH		 3998{
3999 frag_align (log_size, 0, 0);
4000 record_alignment (now_seg, log_size);
4001 cons (1 << log_size);
4002}
4003
4004static void
98027b10 4005ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4006{
4007 expressionS exp;
4008 int byte_count;
4009
4010 (void) expression (&exp);
4011
4012 if (exp.X_op != O_constant)
4013 {
4014 as_bad (_("non-constant byte count"));
4015 return;
4016 }
4017
4018 byte_count = exp.X_add_number;
4019
4020 if (*input_line_pointer != ',')
4021 {
4022 as_bad (_("missing value"));
4023 return;
4024 }
4025
4026 ++input_line_pointer;
4027 cons (byte_count);
4028}
4029
4030#endif /* OBJ_XCOFF */
0baf16f2 4031#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4032\f
4033/* The .tc pseudo-op. This is used when generating either XCOFF or
4034 ELF. This takes two or more arguments.
4035
4036 When generating XCOFF output, the first argument is the name to
4037 give to this location in the toc; this will be a symbol with class
0baf16f2 4038 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4039 this location in the TOC; often there is just one more argument, a
1049f94e 4040 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4041 depends on target word size. A 32-bit target uses 4-byte values, a
4042 64-bit target uses 8-byte values.
252b5132
RH		 4043
4044 When not generating XCOFF output, the arguments are the same, but
4045 the first argument is simply ignored. */
4046
4047static void
98027b10 4048ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4049{
4050#ifdef OBJ_XCOFF
4051
4052 /* Define the TOC symbol name. */
4053 {
4054 char *name;
4055 char endc;
4056 symbolS *sym;
4057
4058 if (ppc_toc_csect == (symbolS *) NULL
4059 || ppc_toc_csect != ppc_current_csect)
4060 {
4061 as_bad (_(".tc not in .toc section"));
4062 ignore_rest_of_line ();
4063 return;
4064 }
4065
4066 name = input_line_pointer;
4067 endc = get_symbol_end ();
4068
4069 sym = symbol_find_or_make (name);
4070
4071 *input_line_pointer = endc;
4072
4073 if (S_IS_DEFINED (sym))
4074 {
4075 symbolS *label;
4076
809ffe0d
ILT		 4077 label = symbol_get_tc (ppc_current_csect)->within;
4078 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4079 {
4080 as_bad (_(".tc with no label"));
4081 ignore_rest_of_line ();
4082 return;
4083 }
4084
4085 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4086 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4087 S_SET_VALUE (label, S_GET_VALUE (sym));
4088
4089 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4090 ++input_line_pointer;
4091
4092 return;
4093 }
4094
4095 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4096 symbol_set_frag (sym, frag_now);
252b5132 4097 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4098 symbol_get_tc (sym)->class = XMC_TC;
4099 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4100
4101 ppc_frob_label (sym);
4102 }
4103
0baf16f2
AM		 4104#endif /* OBJ_XCOFF */
4105#ifdef OBJ_ELF
9c7977b3 4106 int align;
252b5132
RH		 4107
4108 /* Skip the TOC symbol name. */
4109 while (is_part_of_name (*input_line_pointer)
d13d4015 4110 || *input_line_pointer == ' '
252b5132
RH		 4111 || *input_line_pointer == '['
4112 || *input_line_pointer == ']'
4113 || *input_line_pointer == '{'
4114 || *input_line_pointer == '}')
4115 ++input_line_pointer;
4116
0baf16f2 4117 /* Align to a four/eight byte boundary. */
2b3c4602 4118 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4119 frag_align (align, 0, 0);
4120 record_alignment (now_seg, align);
0baf16f2 4121#endif /* OBJ_ELF */
252b5132
RH		 4122
4123 if (*input_line_pointer != ',')
4124 demand_empty_rest_of_line ();
4125 else
4126 {
4127 ++input_line_pointer;
2b3c4602 4128 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4129 }
4130}
0baf16f2
AM		 4131
4132/* Pseudo-op .machine. */
0baf16f2
AM		 4133
4134static void
98027b10 4135ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4136{
69c040df
AM		 4137 char *cpu_string;
4138#define MAX_HISTORY 100
fa452fa6 4139 static ppc_cpu_t *cpu_history;
69c040df
AM		 4140 static int curr_hist;
4141
4142 SKIP_WHITESPACE ();
4143
4144 if (*input_line_pointer == '"')
4145 {
4146 int len;
4147 cpu_string = demand_copy_C_string (&len);
4148 }
4149 else
4150 {
4151 char c;
4152 cpu_string = input_line_pointer;
4153 c = get_symbol_end ();
4154 cpu_string = xstrdup (cpu_string);
4155 *input_line_pointer = c;
4156 }
4157
4158 if (cpu_string != NULL)
4159 {
fa452fa6 4160 ppc_cpu_t old_cpu = ppc_cpu;
69c040df
AM		 4161 char *p;
4162
4163 for (p = cpu_string; *p != 0; p++)
4164 *p = TOLOWER (*p);
4165
4166 if (strcmp (cpu_string, "push") == 0)
4167 {
4168 if (cpu_history == NULL)
4169 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4170
4171 if (curr_hist >= MAX_HISTORY)
4172 as_bad (_(".machine stack overflow"));
4173 else
4174 cpu_history[curr_hist++] = ppc_cpu;
4175 }
4176 else if (strcmp (cpu_string, "pop") == 0)
4177 {
4178 if (curr_hist <= 0)
4179 as_bad (_(".machine stack underflow"));
4180 else
4181 ppc_cpu = cpu_history[--curr_hist];
4182 }
4183 else if (parse_cpu (cpu_string))
4184 ;
4185 else
4186 as_bad (_("invalid machine `%s'"), cpu_string);
4187
4188 if (ppc_cpu != old_cpu)
4189 ppc_setup_opcodes ();
4190 }
4191
4192 demand_empty_rest_of_line ();
0baf16f2
AM		 4193}
4194
4195/* See whether a symbol is in the TOC section. */
4196
4197static int
98027b10 4198ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4199{
4200#ifdef OBJ_XCOFF
4201 return symbol_get_tc (sym)->class == XMC_TC;
4202#endif
4203#ifdef OBJ_ELF
4204 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4205 if (ppc_obj64)
0baf16f2
AM		 4206 return strcmp (sname, ".toc") == 0;
4207 else
4208 return strcmp (sname, ".got") == 0;
4209#endif
4210}
4211#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4212\f
4213#ifdef TE_PE
4214
99a814a1 4215/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4216
4217/* Set the current section. */
4218static void
98027b10 4219ppc_set_current_section (segT new)
252b5132
RH		 4220{
4221 ppc_previous_section = ppc_current_section;
4222 ppc_current_section = new;
4223}
4224
4225/* pseudo-op: .previous
4226 behaviour: toggles the current section with the previous section.
4227 errors: None
99a814a1
AM		 4228 warnings: "No previous section" */
4229
252b5132 4230static void
98027b10 4231ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4232{
4233 symbolS *tmp;
4234
81d4177b 4235 if (ppc_previous_section == NULL)
252b5132 4236 {
99a814a1 4237 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4238 return;
4239 }
4240
99a814a1 4241 subseg_set (ppc_previous_section, 0);
252b5132 4242
99a814a1 4243 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4244}
4245
4246/* pseudo-op: .pdata
4247 behaviour: predefined read only data section
b34976b6 4248 double word aligned
252b5132
RH		 4249 errors: None
4250 warnings: None
4251 initial: .section .pdata "adr3"
b34976b6 4252 a - don't know -- maybe a misprint
252b5132
RH		 4253 d - initialized data
4254 r - readable
4255 3 - double word aligned (that would be 4 byte boundary)
4256
4257 commentary:
4258 Tag index tables (also known as the function table) for exception
99a814a1 4259 handling, debugging, etc. */
252b5132 4260
252b5132 4261static void
98027b10 4262ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4263{
81d4177b 4264 if (pdata_section == 0)
252b5132
RH		 4265 {
4266 pdata_section = subseg_new (".pdata", 0);
81d4177b 4267
252b5132
RH		 4268 bfd_set_section_flags (stdoutput, pdata_section,
4269 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4270 | SEC_READONLY | SEC_DATA ));
81d4177b 4271
252b5132
RH		 4272 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4273 }
4274 else
4275 {
99a814a1 4276 pdata_section = subseg_new (".pdata", 0);
252b5132 4277 }
99a814a1 4278 ppc_set_current_section (pdata_section);
252b5132
RH		 4279}
4280
4281/* pseudo-op: .ydata
4282 behaviour: predefined read only data section
b34976b6 4283 double word aligned
252b5132
RH		 4284 errors: None
4285 warnings: None
4286 initial: .section .ydata "drw3"
b34976b6 4287 a - don't know -- maybe a misprint
252b5132
RH		 4288 d - initialized data
4289 r - readable
4290 3 - double word aligned (that would be 4 byte boundary)
4291 commentary:
4292 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4293 debugging, etc. */
4294
252b5132 4295static void
98027b10 4296ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4297{
81d4177b 4298 if (ydata_section == 0)
252b5132
RH		 4299 {
4300 ydata_section = subseg_new (".ydata", 0);
4301 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4302 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4303 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4304
4305 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4306 }
4307 else
4308 {
4309 ydata_section = subseg_new (".ydata", 0);
4310 }
99a814a1 4311 ppc_set_current_section (ydata_section);
252b5132
RH		 4312}
4313
4314/* pseudo-op: .reldata
4315 behaviour: predefined read write data section
b34976b6 4316 double word aligned (4-byte)
252b5132
RH		 4317 FIXME: relocation is applied to it
4318 FIXME: what's the difference between this and .data?
4319 errors: None
4320 warnings: None
4321 initial: .section .reldata "drw3"
4322 d - initialized data
4323 r - readable
4324 w - writeable
4325 3 - double word aligned (that would be 8 byte boundary)
4326
4327 commentary:
4328 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4329 function descriptors, etc. */
4330
252b5132 4331static void
98027b10 4332ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4333{
4334 if (reldata_section == 0)
4335 {
4336 reldata_section = subseg_new (".reldata", 0);
4337
4338 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4339 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4340 | SEC_DATA));
252b5132
RH		 4341
4342 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4343 }
4344 else
4345 {
4346 reldata_section = subseg_new (".reldata", 0);
4347 }
99a814a1 4348 ppc_set_current_section (reldata_section);
252b5132
RH		 4349}
4350
4351/* pseudo-op: .rdata
4352 behaviour: predefined read only data section
b34976b6 4353 double word aligned
252b5132
RH		 4354 errors: None
4355 warnings: None
4356 initial: .section .rdata "dr3"
4357 d - initialized data
4358 r - readable
99a814a1
AM		 4359 3 - double word aligned (that would be 4 byte boundary) */
4360
252b5132 4361static void
98027b10 4362ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4363{
4364 if (rdata_section == 0)
4365 {
4366 rdata_section = subseg_new (".rdata", 0);
4367 bfd_set_section_flags (stdoutput, rdata_section,
4368 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4369 | SEC_READONLY | SEC_DATA ));
4370
4371 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4372 }
4373 else
4374 {
4375 rdata_section = subseg_new (".rdata", 0);
4376 }
99a814a1 4377 ppc_set_current_section (rdata_section);
252b5132
RH		 4378}
4379
4380/* pseudo-op: .ualong
81d4177b 4381 behaviour: much like .int, with the exception that no alignment is
b34976b6 4382 performed.
252b5132
RH		 4383 FIXME: test the alignment statement
4384 errors: None
99a814a1
AM		 4385 warnings: None */
4386
252b5132 4387static void
98027b10 4388ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4389{
99a814a1
AM		 4390 /* Try for long. */
4391 cons (4);
252b5132
RH		 4392}
4393
4394/* pseudo-op: .znop <symbol name>
4395 behaviour: Issue a nop instruction
b34976b6 4396 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4397 the supplied symbol name.
4398 errors: None
99a814a1
AM		 4399 warnings: Missing symbol name */
4400
252b5132 4401static void
98027b10 4402ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4403{
4404 unsigned long insn;
4405 const struct powerpc_opcode *opcode;
4406 expressionS ex;
4407 char *f;
252b5132 4408 symbolS *sym;
252b5132
RH		 4409 char *symbol_name;
4410 char c;
4411 char *name;
4412 unsigned int exp;
4413 flagword flags;
4414 asection *sec;
4415
99a814a1 4416 /* Strip out the symbol name. */
252b5132
RH		 4417 symbol_name = input_line_pointer;
4418 c = get_symbol_end ();
4419
4420 name = xmalloc (input_line_pointer - symbol_name + 1);
4421 strcpy (name, symbol_name);
4422
4423 sym = symbol_find_or_make (name);
4424
4425 *input_line_pointer = c;
4426
4427 SKIP_WHITESPACE ();
4428
4429 /* Look up the opcode in the hash table. */
4430 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4431
99a814a1 4432 /* Stick in the nop. */
252b5132
RH		 4433 insn = opcode->opcode;
4434
4435 /* Write out the instruction. */
4436 f = frag_more (4);
4437 md_number_to_chars (f, insn, 4);
4438 fix_new (frag_now,
4439 f - frag_now->fr_literal,
4440 4,
4441 sym,
4442 0,
4443 0,
4444 BFD_RELOC_16_GOT_PCREL);
4445
4446}
4447
81d4177b
KH		 4448/* pseudo-op:
4449 behaviour:
4450 errors:
99a814a1
AM		 4451 warnings: */
4452
252b5132 4453static void
98027b10 4454ppc_pe_comm (int lcomm)
252b5132 4455{
98027b10
AM		 4456 char *name;
4457 char c;
4458 char *p;
252b5132 4459 offsetT temp;
98027b10 4460 symbolS *symbolP;
252b5132
RH		 4461 offsetT align;
4462
4463 name = input_line_pointer;
4464 c = get_symbol_end ();
4465
99a814a1 4466 /* just after name is now '\0'. */
252b5132
RH		 4467 p = input_line_pointer;
4468 *p = c;
4469 SKIP_WHITESPACE ();
4470 if (*input_line_pointer != ',')
4471 {
4472 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4473 ignore_rest_of_line ();
4474 return;
4475 }
4476
4477 input_line_pointer++; /* skip ',' */
4478 if ((temp = get_absolute_expression ()) < 0)
4479 {
4480 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4481 ignore_rest_of_line ();
4482 return;
4483 }
4484
4485 if (! lcomm)
4486 {
4487 /* The third argument to .comm is the alignment. */
4488 if (*input_line_pointer != ',')
4489 align = 3;
4490 else
4491 {
4492 ++input_line_pointer;
4493 align = get_absolute_expression ();
4494 if (align <= 0)
4495 {
4496 as_warn (_("ignoring bad alignment"));
4497 align = 3;
4498 }
4499 }
4500 }
4501
4502 *p = 0;
4503 symbolP = symbol_find_or_make (name);
4504
4505 *p = c;
4506 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4507 {
4508 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4509 S_GET_NAME (symbolP));
4510 ignore_rest_of_line ();
4511 return;
4512 }
4513
4514 if (S_GET_VALUE (symbolP))
4515 {
4516 if (S_GET_VALUE (symbolP) != (valueT) temp)
4517 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4518 S_GET_NAME (symbolP),
4519 (long) S_GET_VALUE (symbolP),
4520 (long) temp);
4521 }
4522 else
4523 {
4524 S_SET_VALUE (symbolP, (valueT) temp);
4525 S_SET_EXTERNAL (symbolP);
86ebace2 4526 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4527 }
4528
4529 demand_empty_rest_of_line ();
4530}
4531
4532/*
4533 * implement the .section pseudo op:
4534 * .section name {, "flags"}
4535 * ^ ^
4536 * | +--- optional flags: 'b' for bss
4537 * | 'i' for info
4538 * +-- section name 'l' for lib
4539 * 'n' for noload
4540 * 'o' for over
4541 * 'w' for data
4542 * 'd' (apparently m88k for data)
4543 * 'x' for text
4544 * But if the argument is not a quoted string, treat it as a
4545 * subsegment number.
4546 *
4547 * FIXME: this is a copy of the section processing from obj-coff.c, with
4548 * additions/changes for the moto-pas assembler support. There are three
4549 * categories:
4550 *
81d4177b 4551 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4552 * setting bits that bfd probably neither understands or uses. The
4553 * correct approach (?) will have to incorporate extra fields attached
4554 * to the section to hold the system specific stuff. (krk)
4555 *
4556 * Section Contents:
4557 * 'a' - unknown - referred to in documentation, but no definition supplied
4558 * 'c' - section has code
4559 * 'd' - section has initialized data
4560 * 'u' - section has uninitialized data
4561 * 'i' - section contains directives (info)
4562 * 'n' - section can be discarded
4563 * 'R' - remove section at link time
4564 *
4565 * Section Protection:
4566 * 'r' - section is readable
4567 * 'w' - section is writeable
4568 * 'x' - section is executable
4569 * 's' - section is sharable
4570 *
4571 * Section Alignment:
4572 * '0' - align to byte boundary
4573 * '1' - align to halfword undary
4574 * '2' - align to word boundary
4575 * '3' - align to doubleword boundary
4576 * '4' - align to quadword boundary
4577 * '5' - align to 32 byte boundary
4578 * '6' - align to 64 byte boundary
4579 *
4580 */
4581
4582void
98027b10 4583ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4584{
99a814a1 4585 /* Strip out the section name. */
252b5132
RH		 4586 char *section_name;
4587 char c;
4588 char *name;
4589 unsigned int exp;
4590 flagword flags;
4591 segT sec;
4592 int align;
4593
4594 section_name = input_line_pointer;
4595 c = get_symbol_end ();
4596
4597 name = xmalloc (input_line_pointer - section_name + 1);
4598 strcpy (name, section_name);
4599
4600 *input_line_pointer = c;
4601
4602 SKIP_WHITESPACE ();
4603
4604 exp = 0;
4605 flags = SEC_NO_FLAGS;
4606
4607 if (strcmp (name, ".idata$2") == 0)
4608 {
4609 align = 0;
4610 }
4611 else if (strcmp (name, ".idata$3") == 0)
4612 {
4613 align = 0;
4614 }
4615 else if (strcmp (name, ".idata$4") == 0)
4616 {
4617 align = 2;
4618 }
4619 else if (strcmp (name, ".idata$5") == 0)
4620 {
4621 align = 2;
4622 }
4623 else if (strcmp (name, ".idata$6") == 0)
4624 {
4625 align = 1;
4626 }
4627 else
99a814a1
AM		 4628 /* Default alignment to 16 byte boundary. */
4629 align = 4;
252b5132
RH		 4630
4631 if (*input_line_pointer == ',')
4632 {
4633 ++input_line_pointer;
4634 SKIP_WHITESPACE ();
4635 if (*input_line_pointer != '"')
4636 exp = get_absolute_expression ();
4637 else
4638 {
4639 ++input_line_pointer;
4640 while (*input_line_pointer != '"'
4641 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4642 {
4643 switch (*input_line_pointer)
4644 {
4645 /* Section Contents */
4646 case 'a': /* unknown */
4647 as_bad (_("Unsupported section attribute -- 'a'"));
4648 break;
4649 case 'c': /* code section */
81d4177b 4650 flags |= SEC_CODE;
252b5132
RH		 4651 break;
4652 case 'd': /* section has initialized data */
4653 flags |= SEC_DATA;
4654 break;
4655 case 'u': /* section has uninitialized data */
4656 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4657 in winnt.h */
4658 flags |= SEC_ROM;
4659 break;
4660 case 'i': /* section contains directives (info) */
4661 /* FIXME: This is IMAGE_SCN_LNK_INFO
4662 in winnt.h */
4663 flags |= SEC_HAS_CONTENTS;
4664 break;
4665 case 'n': /* section can be discarded */
81d4177b 4666 flags &=~ SEC_LOAD;
252b5132
RH		 4667 break;
4668 case 'R': /* Remove section at link time */
4669 flags |= SEC_NEVER_LOAD;
4670 break;
8d452c78 4671#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4672 /* Section Protection */
4673 case 'r': /* section is readable */
4674 flags |= IMAGE_SCN_MEM_READ;
4675 break;
4676 case 'w': /* section is writeable */
4677 flags |= IMAGE_SCN_MEM_WRITE;
4678 break;
4679 case 'x': /* section is executable */
4680 flags |= IMAGE_SCN_MEM_EXECUTE;
4681 break;
4682 case 's': /* section is sharable */
4683 flags |= IMAGE_SCN_MEM_SHARED;
4684 break;
4685
4686 /* Section Alignment */
4687 case '0': /* align to byte boundary */
4688 flags |= IMAGE_SCN_ALIGN_1BYTES;
4689 align = 0;
4690 break;
4691 case '1': /* align to halfword boundary */
4692 flags |= IMAGE_SCN_ALIGN_2BYTES;
4693 align = 1;
4694 break;
4695 case '2': /* align to word boundary */
4696 flags |= IMAGE_SCN_ALIGN_4BYTES;
4697 align = 2;
4698 break;
4699 case '3': /* align to doubleword boundary */
4700 flags |= IMAGE_SCN_ALIGN_8BYTES;
4701 align = 3;
4702 break;
4703 case '4': /* align to quadword boundary */
4704 flags |= IMAGE_SCN_ALIGN_16BYTES;
4705 align = 4;
4706 break;
4707 case '5': /* align to 32 byte boundary */
4708 flags |= IMAGE_SCN_ALIGN_32BYTES;
4709 align = 5;
4710 break;
4711 case '6': /* align to 64 byte boundary */
4712 flags |= IMAGE_SCN_ALIGN_64BYTES;
4713 align = 6;
4714 break;
8d452c78 4715#endif
252b5132 4716 default:
99a814a1
AM		 4717 as_bad (_("unknown section attribute '%c'"),
4718 *input_line_pointer);
252b5132
RH		 4719 break;
4720 }
4721 ++input_line_pointer;
4722 }
4723 if (*input_line_pointer == '"')
4724 ++input_line_pointer;
4725 }
4726 }
4727
4728 sec = subseg_new (name, (subsegT) exp);
4729
99a814a1 4730 ppc_set_current_section (sec);
252b5132
RH		 4731
4732 if (flags != SEC_NO_FLAGS)
4733 {
4734 if (! bfd_set_section_flags (stdoutput, sec, flags))
4735 as_bad (_("error setting flags for \"%s\": %s"),
4736 bfd_section_name (stdoutput, sec),
4737 bfd_errmsg (bfd_get_error ()));
4738 }
4739
99a814a1 4740 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4741}
4742
4743static void
98027b10 4744ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4745{
4746 char *name;
4747 char endc;
4748 symbolS *ext_sym;
4749
4750 name = input_line_pointer;
4751 endc = get_symbol_end ();
4752
4753 ext_sym = symbol_find_or_make (name);
4754
4755 *input_line_pointer = endc;
4756
4757 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4758 SF_SET_FUNCTION (ext_sym);
4759 SF_SET_PROCESS (ext_sym);
4760 coff_add_linesym (ext_sym);
4761
4762 demand_empty_rest_of_line ();
4763}
4764
4765static void
98027b10 4766ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4767{
4768 if (tocdata_section == 0)
4769 {
4770 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4771 /* FIXME: section flags won't work. */
252b5132
RH		 4772 bfd_set_section_flags (stdoutput, tocdata_section,
4773 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4774 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4775
4776 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4777 }
4778 else
4779 {
4780 rdata_section = subseg_new (".tocd", 0);
4781 }
4782
99a814a1 4783 ppc_set_current_section (tocdata_section);
252b5132
RH		 4784
4785 demand_empty_rest_of_line ();
4786}
4787
4788/* Don't adjust TOC relocs to use the section symbol. */
4789
4790int
98027b10 4791ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4792{
4793 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4794}
4795
4796#endif
4797\f
4798#ifdef OBJ_XCOFF
4799
4800/* XCOFF specific symbol and file handling. */
4801
4802/* Canonicalize the symbol name. We use the to force the suffix, if
4803 any, to use square brackets, and to be in upper case. */
4804
4805char *
98027b10 4806ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4807{
4808 char *s;
4809
4810 if (ppc_stab_symbol)
4811 return name;
4812
4813 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4814 ;
4815 if (*s != '\0')
4816 {
4817 char brac;
4818
4819 if (*s == '[')
4820 brac = ']';
4821 else
4822 {
4823 *s = '[';
4824 brac = '}';
4825 }
4826
4827 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4828 *s = TOUPPER (*s);
252b5132
RH		 4829
4830 if (*s == '\0' || s[1] != '\0')
4831 as_bad (_("bad symbol suffix"));
4832
4833 *s = ']';
4834 }
4835
4836 return name;
4837}
4838
4839/* Set the class of a symbol based on the suffix, if any. This is
4840 called whenever a new symbol is created. */
4841
4842void
98027b10 4843ppc_symbol_new_hook (symbolS *sym)
252b5132 4844{
809ffe0d 4845 struct ppc_tc_sy *tc;
252b5132
RH		 4846 const char *s;
4847
809ffe0d
ILT		 4848 tc = symbol_get_tc (sym);
4849 tc->next = NULL;
4850 tc->output = 0;
4851 tc->class = -1;
4852 tc->real_name = NULL;
4853 tc->subseg = 0;
4854 tc->align = 0;
4855 tc->size = NULL;
4856 tc->within = NULL;
252b5132
RH		 4857
4858 if (ppc_stab_symbol)
4859 return;
4860
4861 s = strchr (S_GET_NAME (sym), '[');
4862 if (s == (const char *) NULL)
4863 {
4864 /* There is no suffix. */
4865 return;
4866 }
4867
4868 ++s;
4869
4870 switch (s[0])
4871 {
4872 case 'B':
4873 if (strcmp (s, "BS]") == 0)
809ffe0d 4874 tc->class = XMC_BS;
252b5132
RH		 4875 break;
4876 case 'D':
4877 if (strcmp (s, "DB]") == 0)
809ffe0d 4878 tc->class = XMC_DB;
252b5132 4879 else if (strcmp (s, "DS]") == 0)
809ffe0d 4880 tc->class = XMC_DS;
252b5132
RH		 4881 break;
4882 case 'G':
4883 if (strcmp (s, "GL]") == 0)
809ffe0d 4884 tc->class = XMC_GL;
252b5132
RH		 4885 break;
4886 case 'P':
4887 if (strcmp (s, "PR]") == 0)
809ffe0d 4888 tc->class = XMC_PR;
252b5132
RH		 4889 break;
4890 case 'R':
4891 if (strcmp (s, "RO]") == 0)
809ffe0d 4892 tc->class = XMC_RO;
252b5132 4893 else if (strcmp (s, "RW]") == 0)
809ffe0d 4894 tc->class = XMC_RW;
252b5132
RH		 4895 break;
4896 case 'S':
4897 if (strcmp (s, "SV]") == 0)
809ffe0d 4898 tc->class = XMC_SV;
252b5132
RH		 4899 break;
4900 case 'T':
4901 if (strcmp (s, "TC]") == 0)
809ffe0d 4902 tc->class = XMC_TC;
252b5132 4903 else if (strcmp (s, "TI]") == 0)
809ffe0d 4904 tc->class = XMC_TI;
252b5132 4905 else if (strcmp (s, "TB]") == 0)
809ffe0d 4906 tc->class = XMC_TB;
252b5132 4907 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4908 tc->class = XMC_TC0;
252b5132
RH		 4909 break;
4910 case 'U':
4911 if (strcmp (s, "UA]") == 0)
809ffe0d 4912 tc->class = XMC_UA;
252b5132 4913 else if (strcmp (s, "UC]") == 0)
809ffe0d 4914 tc->class = XMC_UC;
252b5132
RH		 4915 break;
4916 case 'X':
4917 if (strcmp (s, "XO]") == 0)
809ffe0d 4918 tc->class = XMC_XO;
252b5132
RH		 4919 break;
4920 }
4921
809ffe0d 4922 if (tc->class == -1)
252b5132
RH		 4923 as_bad (_("Unrecognized symbol suffix"));
4924}
4925
4926/* Set the class of a label based on where it is defined. This
4927 handles symbols without suffixes. Also, move the symbol so that it
4928 follows the csect symbol. */
4929
4930void
98027b10 4931ppc_frob_label (symbolS *sym)
252b5132
RH		 4932{
4933 if (ppc_current_csect != (symbolS *) NULL)
4934 {
809ffe0d
ILT		 4935 if (symbol_get_tc (sym)->class == -1)
4936 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4937
4938 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4939 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4940 &symbol_rootP, &symbol_lastP);
4941 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4942 }
07a53e5c
RH		 4943
4944#ifdef OBJ_ELF
4945 dwarf2_emit_label (sym);
4946#endif
252b5132
RH		 4947}
4948
4949/* This variable is set by ppc_frob_symbol if any absolute symbols are
4950 seen. It tells ppc_adjust_symtab whether it needs to look through
4951 the symbols. */
4952
b34976b6 4953static bfd_boolean ppc_saw_abs;
252b5132
RH		 4954
4955/* Change the name of a symbol just before writing it out. Set the
4956 real name if the .rename pseudo-op was used. Otherwise, remove any
4957 class suffix. Return 1 if the symbol should not be included in the
4958 symbol table. */
4959
4960int
98027b10 4961ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4962{
4963 static symbolS *ppc_last_function;
4964 static symbolS *set_end;
4965
4966 /* Discard symbols that should not be included in the output symbol
4967 table. */
809ffe0d
ILT		 4968 if (! symbol_used_in_reloc_p (sym)
4969 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4970 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4971 && ! symbol_get_tc (sym)->output
252b5132
RH		 4972 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4973 return 1;
4974
a161fe53
AM		 4975 /* This one will disappear anyway. Don't make a csect sym for it. */
4976 if (sym == abs_section_sym)
4977 return 1;
4978
809ffe0d
ILT		 4979 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4980 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4981 else
4982 {
4983 const char *name;
4984 const char *s;
4985
4986 name = S_GET_NAME (sym);
4987 s = strchr (name, '[');
4988 if (s != (char *) NULL)
4989 {
4990 unsigned int len;
4991 char *snew;
4992
4993 len = s - name;
4994 snew = xmalloc (len + 1);
4995 memcpy (snew, name, len);
4996 snew[len] = '\0';
4997
4998 S_SET_NAME (sym, snew);
4999 }
5000 }
5001
5002 if (set_end != (symbolS *) NULL)
5003 {
5004 SA_SET_SYM_ENDNDX (set_end, sym);
5005 set_end = NULL;
5006 }
5007
5008 if (SF_GET_FUNCTION (sym))
5009 {
5010 if (ppc_last_function != (symbolS *) NULL)
5011 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5012 ppc_last_function = sym;
809ffe0d 5013 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5014 {
6386f3a7 5015 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5016 SA_SET_SYM_FSIZE (sym,
5017 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5018 }
5019 }
5020 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5021 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5022 {
5023 if (ppc_last_function == (symbolS *) NULL)
5024 as_bad (_(".ef with no preceding .function"));
5025 else
5026 {
5027 set_end = ppc_last_function;
5028 ppc_last_function = NULL;
5029
5030 /* We don't have a C_EFCN symbol, but we need to force the
5031 COFF backend to believe that it has seen one. */
5032 coff_last_function = NULL;
5033 }
5034 }
5035
670ec21d 5036 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5037 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5038 && S_GET_STORAGE_CLASS (sym) != C_FILE
5039 && S_GET_STORAGE_CLASS (sym) != C_FCN
5040 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5041 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5042 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5043 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5044 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5045 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5046 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5047
5048 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5049 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5050 {
5051 int i;
5052 union internal_auxent *a;
5053
5054 /* Create a csect aux. */
5055 i = S_GET_NUMBER_AUXILIARY (sym);
5056 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5057 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5058 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5059 {
5060 /* This is the TOC table. */
5061 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5062 a->x_csect.x_scnlen.l = 0;
5063 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5064 }
809ffe0d 5065 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5066 {
5067 /* This is a csect symbol. x_scnlen is the size of the
5068 csect. */
809ffe0d 5069 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5070 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5071 S_GET_SEGMENT (sym))
5072 - S_GET_VALUE (sym));
5073 else
5074 {
6386f3a7 5075 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5076 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5077 - S_GET_VALUE (sym));
5078 }
809ffe0d 5079 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5080 }
5081 else if (S_GET_SEGMENT (sym) == bss_section)
5082 {
5083 /* This is a common symbol. */
809ffe0d
ILT		 5084 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5085 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5086 if (S_IS_EXTERNAL (sym))
809ffe0d 5087 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5088 else
809ffe0d 5089 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5090 }
5091 else if (S_GET_SEGMENT (sym) == absolute_section)
5092 {
5093 /* This is an absolute symbol. The csect will be created by
99a814a1 5094 ppc_adjust_symtab. */
b34976b6 5095 ppc_saw_abs = TRUE;
252b5132 5096 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5097 if (symbol_get_tc (sym)->class == -1)
5098 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5099 }
5100 else if (! S_IS_DEFINED (sym))
5101 {
5102 /* This is an external symbol. */
5103 a->x_csect.x_scnlen.l = 0;
5104 a->x_csect.x_smtyp = XTY_ER;
5105 }
809ffe0d 5106 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5107 {
5108 symbolS *next;
5109
5110 /* This is a TOC definition. x_scnlen is the size of the
5111 TOC entry. */
5112 next = symbol_next (sym);
809ffe0d 5113 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5114 next = symbol_next (next);
5115 if (next == (symbolS *) NULL
809ffe0d 5116 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5117 {
5118 if (ppc_after_toc_frag == (fragS *) NULL)
5119 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5120 data_section)
5121 - S_GET_VALUE (sym));
5122 else
5123 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5124 - S_GET_VALUE (sym));
5125 }
5126 else
5127 {
6386f3a7 5128 resolve_symbol_value (next);
252b5132
RH		 5129 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5130 - S_GET_VALUE (sym));
5131 }
5132 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5133 }
5134 else
5135 {
5136 symbolS *csect;
5137
5138 /* This is a normal symbol definition. x_scnlen is the
5139 symbol index of the containing csect. */
5140 if (S_GET_SEGMENT (sym) == text_section)
5141 csect = ppc_text_csects;
5142 else if (S_GET_SEGMENT (sym) == data_section)
5143 csect = ppc_data_csects;
5144 else
5145 abort ();
5146
5147 /* Skip the initial dummy symbol. */
809ffe0d 5148 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5149
5150 if (csect == (symbolS *) NULL)
5151 {
5152 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5153 a->x_csect.x_scnlen.l = 0;
5154 }
5155 else
5156 {
809ffe0d 5157 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5158 {
6386f3a7 5159 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5160 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5161 > S_GET_VALUE (sym))
252b5132 5162 break;
809ffe0d 5163 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5164 }
5165
809ffe0d
ILT		 5166 a->x_csect.x_scnlen.p =
5167 coffsymbol (symbol_get_bfdsym (csect))->native;
5168 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5169 1;
252b5132
RH		 5170 }
5171 a->x_csect.x_smtyp = XTY_LD;
5172 }
81d4177b 5173
252b5132
RH		 5174 a->x_csect.x_parmhash = 0;
5175 a->x_csect.x_snhash = 0;
809ffe0d 5176 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5177 a->x_csect.x_smclas = XMC_PR;
5178 else
809ffe0d 5179 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5180 a->x_csect.x_stab = 0;
5181 a->x_csect.x_snstab = 0;
5182
5183 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5184 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5185 }
5186 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5187 {
5188 /* We want the value to be the symbol index of the referenced
5189 csect symbol. BFD will do that for us if we set the right
5190 flags. */
b782de16
AM		 5191 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5192 combined_entry_type *c = coffsymbol (bsym)->native;
5193
5194 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5195 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5196 }
5197 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5198 {
5199 symbolS *block;
5200 symbolS *csect;
5201
5202 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5203 block = symbol_get_tc (sym)->within;
5204 csect = symbol_get_tc (block)->within;
6386f3a7 5205 resolve_symbol_value (csect);
252b5132
RH		 5206 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5207 }
5208 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5209 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5210 {
5211 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5212 BFD will do that for us if we set the right flags. We have
5213 already set the value correctly. */
809ffe0d 5214 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5215 }
5216
5217 return 0;
5218}
5219
5220/* Adjust the symbol table. This creates csect symbols for all
5221 absolute symbols. */
5222
5223void
98027b10 5224ppc_adjust_symtab (void)
252b5132
RH		 5225{
5226 symbolS *sym;
5227
5228 if (! ppc_saw_abs)
5229 return;
5230
5231 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5232 {
5233 symbolS *csect;
5234 int i;
5235 union internal_auxent *a;
5236
5237 if (S_GET_SEGMENT (sym) != absolute_section)
5238 continue;
5239
5240 csect = symbol_create (".abs[XO]", absolute_section,
5241 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5242 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5243 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5244 i = S_GET_NUMBER_AUXILIARY (csect);
5245 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5246 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5247 a->x_csect.x_scnlen.l = 0;
5248 a->x_csect.x_smtyp = XTY_SD;
5249 a->x_csect.x_parmhash = 0;
5250 a->x_csect.x_snhash = 0;
5251 a->x_csect.x_smclas = XMC_XO;
5252 a->x_csect.x_stab = 0;
5253 a->x_csect.x_snstab = 0;
5254
5255 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5256
5257 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5258 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5259 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5260 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5261 }
5262
b34976b6 5263 ppc_saw_abs = FALSE;
252b5132
RH		 5264}
5265
5266/* Set the VMA for a section. This is called on all the sections in
5267 turn. */
5268
5269void
98027b10 5270ppc_frob_section (asection *sec)
252b5132 5271{
931e13a6 5272 static bfd_vma vma = 0;
252b5132 5273
931e13a6 5274 vma = md_section_align (sec, vma);
252b5132
RH		 5275 bfd_set_section_vma (stdoutput, sec, vma);
5276 vma += bfd_section_size (stdoutput, sec);
5277}
5278
5279#endif /* OBJ_XCOFF */
5280\f
252b5132 5281char *
98027b10 5282md_atof (int type, char *litp, int *sizep)
252b5132 5283{
499ac353 5284 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5285}
5286
5287/* Write a value out to the object file, using the appropriate
5288 endianness. */
5289
5290void
98027b10 5291md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5292{
5293 if (target_big_endian)
5294 number_to_chars_bigendian (buf, val, n);
5295 else
5296 number_to_chars_littleendian (buf, val, n);
5297}
5298
5299/* Align a section (I don't know why this is machine dependent). */
5300
5301valueT
3aeeedbb 5302md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5303{
3aeeedbb
AM		 5304#ifdef OBJ_ELF
5305 return addr;
5306#else
252b5132
RH		 5307 int align = bfd_get_section_alignment (stdoutput, seg);
5308
5309 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5310#endif
252b5132
RH		 5311}
5312
5313/* We don't have any form of relaxing. */
5314
5315int
98027b10
AM		 5316md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5317 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5318{
5319 abort ();
5320 return 0;
5321}
5322
5323/* Convert a machine dependent frag. We never generate these. */
5324
5325void
98027b10
AM		 5326md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5327 asection *sec ATTRIBUTE_UNUSED,
5328 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5329{
5330 abort ();
5331}
5332
5333/* We have no need to default values of symbols. */
5334
252b5132 5335symbolS *
98027b10 5336md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5337{
5338 return 0;
5339}
5340\f
5341/* Functions concerning relocs. */
5342
5343/* The location from which a PC relative jump should be calculated,
5344 given a PC relative reloc. */
5345
5346long
98027b10 5347md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5348{
5349 return fixp->fx_frag->fr_address + fixp->fx_where;
5350}
5351
5352#ifdef OBJ_XCOFF
5353
5354/* This is called to see whether a fixup should be adjusted to use a
5355 section symbol. We take the opportunity to change a fixup against
5356 a symbol in the TOC subsegment into a reloc against the
5357 corresponding .tc symbol. */
5358
5359int
98027b10 5360ppc_fix_adjustable (fixS *fix)
252b5132 5361{
b782de16
AM		 5362 valueT val = resolve_symbol_value (fix->fx_addsy);
5363 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5364 TC_SYMFIELD_TYPE *tc;
5365
5366 if (symseg == absolute_section)
5367 return 0;
252b5132 5368
252b5132 5369 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5370 && fix->fx_addsy != ppc_toc_csect
b782de16 5371 && symseg == data_section
252b5132
RH		 5372 && val >= ppc_toc_frag->fr_address
5373 && (ppc_after_toc_frag == (fragS *) NULL
5374 || val < ppc_after_toc_frag->fr_address))
5375 {
5376 symbolS *sy;
5377
5378 for (sy = symbol_next (ppc_toc_csect);
5379 sy != (symbolS *) NULL;
5380 sy = symbol_next (sy))
5381 {
b782de16
AM		 5382 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5383
5384 if (sy_tc->class == XMC_TC0)
252b5132 5385 continue;
b782de16 5386 if (sy_tc->class != XMC_TC)
252b5132 5387 break;
b782de16 5388 if (val == resolve_symbol_value (sy))
252b5132
RH		 5389 {
5390 fix->fx_addsy = sy;
5391 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5392 return 0;
5393 }
5394 }
5395
5396 as_bad_where (fix->fx_file, fix->fx_line,
5397 _("symbol in .toc does not match any .tc"));
5398 }
5399
5400 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5401 tc = symbol_get_tc (fix->fx_addsy);
5402 if (tc->subseg == 0
5403 && tc->class != XMC_TC0
5404 && tc->class != XMC_TC
5405 && symseg != bss_section
252b5132 5406 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5407 && (symseg != data_section
252b5132
RH		 5408 || ppc_toc_csect == NULL
5409 || val < ppc_toc_frag->fr_address
5410 || (ppc_after_toc_frag != NULL
5411 && val >= ppc_after_toc_frag->fr_address)))
5412 {
5413 symbolS *csect;
b782de16 5414 symbolS *next_csect;
252b5132 5415
b782de16 5416 if (symseg == text_section)
252b5132 5417 csect = ppc_text_csects;
b782de16 5418 else if (symseg == data_section)
252b5132
RH		 5419 csect = ppc_data_csects;
5420 else
5421 abort ();
5422
5423 /* Skip the initial dummy symbol. */
809ffe0d 5424 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5425
5426 if (csect != (symbolS *) NULL)
5427 {
b782de16
AM		 5428 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5429 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5430 {
5431 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5432 have to look through the full symbol table to see
5433 whether this is the csect we want. Note that we will
5434 only get here if the csect has zero length. */
b782de16
AM		 5435 if (symbol_get_frag (csect)->fr_address == val
5436 && S_GET_VALUE (csect) == val)
252b5132
RH		 5437 {
5438 symbolS *scan;
5439
809ffe0d 5440 for (scan = symbol_next (csect);
252b5132 5441 scan != NULL;
809ffe0d 5442 scan = symbol_next (scan))
252b5132 5443 {
809ffe0d 5444 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5445 break;
5446 if (scan == fix->fx_addsy)
5447 break;
5448 }
5449
5450 /* If we found the symbol before the next csect
99a814a1 5451 symbol, then this is the csect we want. */
252b5132
RH		 5452 if (scan == fix->fx_addsy)
5453 break;
5454 }
5455
b782de16 5456 csect = next_csect;
252b5132
RH		 5457 }
5458
b782de16 5459 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5460 fix->fx_addsy = csect;
5461 }
b782de16 5462 return 0;
252b5132
RH		 5463 }
5464
5465 /* Adjust a reloc against a .lcomm symbol to be against the base
5466 .lcomm. */
b782de16 5467 if (symseg == bss_section
252b5132
RH		 5468 && ! S_IS_EXTERNAL (fix->fx_addsy))
5469 {
b782de16
AM		 5470 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5471
5472 fix->fx_offset += val - resolve_symbol_value (sy);
5473 fix->fx_addsy = sy;
252b5132
RH		 5474 }
5475
5476 return 0;
5477}
5478
5479/* A reloc from one csect to another must be kept. The assembler
5480 will, of course, keep relocs between sections, and it will keep
5481 absolute relocs, but we need to force it to keep PC relative relocs
5482 between two csects in the same section. */
5483
5484int
98027b10 5485ppc_force_relocation (fixS *fix)
252b5132
RH		 5486{
5487 /* At this point fix->fx_addsy should already have been converted to
5488 a csect symbol. If the csect does not include the fragment, then
5489 we need to force the relocation. */
5490 if (fix->fx_pcrel
5491 && fix->fx_addsy != NULL
809ffe0d
ILT		 5492 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5493 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5494 > fix->fx_frag->fr_address)
5495 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5496 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5497 <= fix->fx_frag->fr_address))))
5498 return 1;
5499
ae6063d4 5500 return generic_force_reloc (fix);
252b5132
RH		 5501}
5502
5503#endif /* OBJ_XCOFF */
5504
0baf16f2 5505#ifdef OBJ_ELF
a161fe53
AM		 5506/* If this function returns non-zero, it guarantees that a relocation
5507 will be emitted for a fixup. */
5508
5509int
98027b10 5510ppc_force_relocation (fixS *fix)
a161fe53
AM		 5511{
5512 /* Branch prediction relocations must force a relocation, as must
5513 the vtable description relocs. */
5514 switch (fix->fx_r_type)
5515 {
5516 case BFD_RELOC_PPC_B16_BRTAKEN:
5517 case BFD_RELOC_PPC_B16_BRNTAKEN:
5518 case BFD_RELOC_PPC_BA16_BRTAKEN:
5519 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5520 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5521 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5522 return 1;
5523 default:
5524 break;
5525 }
5526
cdba85ec
AM		 5527 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5528 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5529 return 1;
5530
ae6063d4 5531 return generic_force_reloc (fix);
a161fe53
AM		 5532}
5533
0baf16f2 5534int
98027b10 5535ppc_fix_adjustable (fixS *fix)
252b5132 5536{
0baf16f2
AM		 5537 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5538 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5539 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5540 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5541 && fix->fx_r_type != BFD_RELOC_GPREL16
5542 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5543 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5544 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5545 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5546}
0baf16f2 5547#endif
252b5132 5548
3aeeedbb
AM		 5549/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5550 rs_align_code frag. */
5551
5552void
5553ppc_handle_align (struct frag *fragP)
5554{
5555 valueT count = (fragP->fr_next->fr_address
5556 - (fragP->fr_address + fragP->fr_fix));
5557
5558 if (count != 0 && (count & 3) == 0)
5559 {
5560 char *dest = fragP->fr_literal + fragP->fr_fix;
5561
5562 fragP->fr_var = 4;
5563 md_number_to_chars (dest, 0x60000000, 4);
5564
5565 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5566 {
5567 /* For power6, we want the last nop to be a group terminating
5568 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5569 immediately after this one, with its address set to the last
5570 nop location. This will automatically reduce the number of
5571 nops in the current frag by one. */
5572 if (count > 4)
5573 {
5574 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5575
5576 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5577 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5578 group_nop->fr_fix = 0;
5579 group_nop->fr_offset = 1;
5580 group_nop->fr_type = rs_fill;
5581 fragP->fr_next = group_nop;
5582 dest = group_nop->fr_literal;
5583 }
5584
5585 md_number_to_chars (dest, 0x60210000, 4);
5586 }
5587 }
5588}
5589
252b5132
RH		 5590/* Apply a fixup to the object code. This is called for all the
5591 fixups we generated by the call to fix_new_exp, above. In the call
5592 above we used a reloc code which was the largest legal reloc code
5593 plus the operand index. Here we undo that to recover the operand
5594 index. At this point all symbol values should be fully resolved,
5595 and we attempt to completely resolve the reloc. If we can not do
5596 that, we determine the correct reloc code and put it back in the
5597 fixup. */
5598
94f592af 5599void
98027b10 5600md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5601{
94f592af 5602 valueT value = * valP;
252b5132
RH		 5603
5604#ifdef OBJ_ELF
94f592af 5605 if (fixP->fx_addsy != NULL)
252b5132 5606 {
a161fe53 5607 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5608 if (fixP->fx_pcrel)
5609 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5610 }
5611 else
94f592af 5612 fixP->fx_done = 1;
252b5132 5613#else
a161fe53 5614 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5615 the symbol values. If we are doing this relocation the code in
5616 write.c is going to call bfd_install_relocation, which is also
5617 going to use the symbol value. That means that if the reloc is
5618 fully resolved we want to use *valP since bfd_install_relocation is
5619 not being used.
252b5132 5620 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5621 *valP, and must use fx_offset instead. However, if the reloc
5622 is PC relative, we do want to use *valP since it includes the
252b5132 5623 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5624 if (fixP->fx_addsy == (symbolS *) NULL)
5625 fixP->fx_done = 1;
5626
5627 else if (fixP->fx_pcrel)
5628 ;
5629
252b5132 5630 else
a161fe53
AM		 5631 value = fixP->fx_offset;
5632#endif
5633
5634 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5635 {
a161fe53
AM		 5636 /* We can't actually support subtracting a symbol. */
5637 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5638 }
252b5132 5639
94f592af 5640 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5641 {
5642 int opindex;
5643 const struct powerpc_operand *operand;
5644 char *where;
5645 unsigned long insn;
5646
94f592af 5647 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5648
5649 operand = &powerpc_operands[opindex];
5650
5651#ifdef OBJ_XCOFF
0baf16f2
AM		 5652 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5653 does not generate a reloc. It uses the offset of `sym' within its
5654 csect. Other usages, such as `.long sym', generate relocs. This
5655 is the documented behaviour of non-TOC symbols. */
252b5132 5656 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5657 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5658 && operand->shift == 0
2b3c4602 5659 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5660 && fixP->fx_addsy != NULL
5661 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5662 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5663 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5664 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5665 {
94f592af
NC		 5666 value = fixP->fx_offset;
5667 fixP->fx_done = 1;
252b5132
RH		 5668 }
5669#endif
5670
5671 /* Fetch the instruction, insert the fully resolved operand
5672 value, and stuff the instruction back again. */
94f592af 5673 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5674 if (target_big_endian)
5675 insn = bfd_getb32 ((unsigned char *) where);
5676 else
5677 insn = bfd_getl32 ((unsigned char *) where);
5678 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5679 fixP->tc_fix_data.ppc_cpu,
94f592af 5680 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5681 if (target_big_endian)
5682 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5683 else
5684 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5685
94f592af
NC		 5686 if (fixP->fx_done)
5687 /* Nothing else to do here. */
5688 return;
252b5132 5689
94f592af 5690 assert (fixP->fx_addsy != NULL);
0baf16f2 5691
252b5132
RH		 5692 /* Determine a BFD reloc value based on the operand information.
5693 We are only prepared to turn a few of the operands into
0baf16f2 5694 relocs. */
11b37b7b 5695 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5696 && operand->bitm == 0x3fffffc
11b37b7b 5697 && operand->shift == 0)
94f592af 5698 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5699 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5700 && operand->bitm == 0xfffc
11b37b7b 5701 && operand->shift == 0)
95210096
AM		 5702 {
5703 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5704#ifdef OBJ_XCOFF
5705 fixP->fx_size = 2;
5706 if (target_big_endian)
5707 fixP->fx_where += 2;
5708#endif
5709 }
11b37b7b 5710 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5711 && operand->bitm == 0x3fffffc
11b37b7b 5712 && operand->shift == 0)
94f592af 5713 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5714 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5715 && operand->bitm == 0xfffc
11b37b7b 5716 && operand->shift == 0)
95210096
AM		 5717 {
5718 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5719#ifdef OBJ_XCOFF
5720 fixP->fx_size = 2;
5721 if (target_big_endian)
5722 fixP->fx_where += 2;
5723#endif
5724 }
0baf16f2 5725#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5726 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5727 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5728 && operand->shift == 0)
11b37b7b 5729 {
a7fc733f
AM		 5730 if (ppc_is_toc_sym (fixP->fx_addsy))
5731 {
5732 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5733#ifdef OBJ_ELF
a7fc733f
AM		 5734 if (ppc_obj64
5735 && (operand->flags & PPC_OPERAND_DS) != 0)
5736 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5737#endif
5738 }
5739 else
5740 {
5741 fixP->fx_r_type = BFD_RELOC_16;
5742#ifdef OBJ_ELF
5743 if (ppc_obj64
5744 && (operand->flags & PPC_OPERAND_DS) != 0)
5745 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5746#endif
a7fc733f 5747 }
94f592af 5748 fixP->fx_size = 2;
11b37b7b 5749 if (target_big_endian)
94f592af 5750 fixP->fx_where += 2;
11b37b7b 5751 }
0baf16f2 5752#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5753 else
252b5132
RH		 5754 {
5755 char *sfile;
5756 unsigned int sline;
5757
5758 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5759 symbol. */
94f592af
NC		 5760 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5761 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5762 _("unresolved expression that must be resolved"));
5763 else
94f592af 5764 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5765 _("unsupported relocation against %s"),
94f592af
NC		 5766 S_GET_NAME (fixP->fx_addsy));
5767 fixP->fx_done = 1;
5768 return;
252b5132
RH		 5769 }
5770 }
5771 else
5772 {
5773#ifdef OBJ_ELF
94f592af 5774 ppc_elf_validate_fix (fixP, seg);
252b5132 5775#endif
94f592af 5776 switch (fixP->fx_r_type)
252b5132 5777 {
252b5132 5778 case BFD_RELOC_CTOR:
2b3c4602 5779 if (ppc_obj64)
9c7977b3
AM		 5780 goto ctor64;
5781 /* fall through */
5782
0baf16f2 5783 case BFD_RELOC_32:
94f592af
NC		 5784 if (fixP->fx_pcrel)
5785 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5786 /* fall through */
252b5132
RH		 5787
5788 case BFD_RELOC_RVA:
5789 case BFD_RELOC_32_PCREL:
252b5132 5790 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5791 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5792 value, 4);
5793 break;
5794
7f6d05e8 5795 case BFD_RELOC_64:
9c7977b3 5796 ctor64:
94f592af
NC		 5797 if (fixP->fx_pcrel)
5798 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5799 /* fall through */
0baf16f2 5800
7f6d05e8 5801 case BFD_RELOC_64_PCREL:
94f592af 5802 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5803 value, 8);
81d4177b 5804 break;
0baf16f2 5805
252b5132
RH		 5806 case BFD_RELOC_GPREL16:
5807 case BFD_RELOC_16_GOT_PCREL:
5808 case BFD_RELOC_16_GOTOFF:
5809 case BFD_RELOC_LO16_GOTOFF:
5810 case BFD_RELOC_HI16_GOTOFF:
5811 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5812 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5813 case BFD_RELOC_LO16_BASEREL:
5814 case BFD_RELOC_HI16_BASEREL:
5815 case BFD_RELOC_HI16_S_BASEREL:
5816 case BFD_RELOC_PPC_EMB_NADDR16:
5817 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5818 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5819 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5820 case BFD_RELOC_PPC_EMB_SDAI16:
5821 case BFD_RELOC_PPC_EMB_SDA2REL:
5822 case BFD_RELOC_PPC_EMB_SDA2I16:
5823 case BFD_RELOC_PPC_EMB_RELSEC16:
5824 case BFD_RELOC_PPC_EMB_RELST_LO:
5825 case BFD_RELOC_PPC_EMB_RELST_HI:
5826 case BFD_RELOC_PPC_EMB_RELST_HA:
5827 case BFD_RELOC_PPC_EMB_RELSDA:
5828 case BFD_RELOC_PPC_TOC16:
0baf16f2 5829#ifdef OBJ_ELF
0baf16f2
AM		 5830 case BFD_RELOC_PPC64_TOC16_LO:
5831 case BFD_RELOC_PPC64_TOC16_HI:
5832 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5833#endif
94f592af 5834 if (fixP->fx_pcrel)
252b5132 5835 {
94f592af
NC		 5836 if (fixP->fx_addsy != NULL)
5837 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5838 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5839 bfd_get_reloc_code_name (fixP->fx_r_type),
5840 S_GET_NAME (fixP->fx_addsy));
252b5132 5841 else
94f592af 5842 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5843 _("cannot emit PC relative %s relocation"),
94f592af 5844 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5845 }
5846
94f592af 5847 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5848 value, 2);
5849 break;
5850
3c9d25f4
AM		 5851 case BFD_RELOC_16:
5852 if (fixP->fx_pcrel)
5853 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5854 /* fall through */
5855
5856 case BFD_RELOC_16_PCREL:
5857 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5858 value, 2);
5859 break;
5860
5861 case BFD_RELOC_LO16:
5862 if (fixP->fx_pcrel)
5863 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5864 /* fall through */
5865
5866 case BFD_RELOC_LO16_PCREL:
5867 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5868 value, 2);
5869 break;
5870
252b5132
RH		 5871 /* This case happens when you write, for example,
5872 lis %r3,(L1-L2)@ha
5873 where L1 and L2 are defined later. */
5874 case BFD_RELOC_HI16:
94f592af 5875 if (fixP->fx_pcrel)
3c9d25f4
AM		 5876 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5877 /* fall through */
5878
5879 case BFD_RELOC_HI16_PCREL:
94f592af 5880 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5881 PPC_HI (value), 2);
252b5132 5882 break;
0baf16f2 5883
252b5132 5884 case BFD_RELOC_HI16_S:
94f592af 5885 if (fixP->fx_pcrel)
3c9d25f4
AM		 5886 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5887 /* fall through */
5888
5889 case BFD_RELOC_HI16_S_PCREL:
94f592af 5890 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5891 PPC_HA (value), 2);
5892 break;
5893
5894#ifdef OBJ_ELF
0baf16f2 5895 case BFD_RELOC_PPC64_HIGHER:
94f592af 5896 if (fixP->fx_pcrel)
0baf16f2 5897 abort ();
94f592af 5898 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5899 PPC_HIGHER (value), 2);
252b5132
RH		 5900 break;
5901
0baf16f2 5902 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5903 if (fixP->fx_pcrel)
0baf16f2 5904 abort ();
94f592af 5905 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5906 PPC_HIGHERA (value), 2);
5907 break;
5908
5909 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5910 if (fixP->fx_pcrel)
0baf16f2 5911 abort ();
94f592af 5912 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5913 PPC_HIGHEST (value), 2);
5914 break;
5915
5916 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5917 if (fixP->fx_pcrel)
0baf16f2 5918 abort ();
94f592af 5919 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5920 PPC_HIGHESTA (value), 2);
5921 break;
5922
5923 case BFD_RELOC_PPC64_ADDR16_DS:
5924 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5925 case BFD_RELOC_PPC64_GOT16_DS:
5926 case BFD_RELOC_PPC64_GOT16_LO_DS:
5927 case BFD_RELOC_PPC64_PLT16_LO_DS:
5928 case BFD_RELOC_PPC64_SECTOFF_DS:
5929 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5930 case BFD_RELOC_PPC64_TOC16_DS:
5931 case BFD_RELOC_PPC64_TOC16_LO_DS:
5932 case BFD_RELOC_PPC64_PLTGOT16_DS:
5933 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5934 if (fixP->fx_pcrel)
0baf16f2
AM		 5935 abort ();
5936 {
2132e3a3 5937 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5938 unsigned long val, mask;
0baf16f2
AM		 5939
5940 if (target_big_endian)
adadcc0c 5941 val = bfd_getb32 (where - 2);
0baf16f2 5942 else
adadcc0c
AM		 5943 val = bfd_getl32 (where);
5944 mask = 0xfffc;
5945 /* lq insns reserve the four lsbs. */
5946 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5947 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5948 mask = 0xfff0;
5949 val |= value & mask;
0baf16f2
AM		 5950 if (target_big_endian)
5951 bfd_putb16 ((bfd_vma) val, where);
5952 else
5953 bfd_putl16 ((bfd_vma) val, where);
5954 }
5955 break;
cdba85ec 5956
ba0b2174
AM		 5957 case BFD_RELOC_PPC_B16_BRTAKEN:
5958 case BFD_RELOC_PPC_B16_BRNTAKEN:
5959 case BFD_RELOC_PPC_BA16_BRTAKEN:
5960 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5961 break;
5962
cdba85ec 5963 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5964 break;
5965
cdba85ec
AM		 5966 case BFD_RELOC_PPC_DTPMOD:
5967 case BFD_RELOC_PPC_TPREL16:
5968 case BFD_RELOC_PPC_TPREL16_LO:
5969 case BFD_RELOC_PPC_TPREL16_HI:
5970 case BFD_RELOC_PPC_TPREL16_HA:
5971 case BFD_RELOC_PPC_TPREL:
5972 case BFD_RELOC_PPC_DTPREL16:
5973 case BFD_RELOC_PPC_DTPREL16_LO:
5974 case BFD_RELOC_PPC_DTPREL16_HI:
5975 case BFD_RELOC_PPC_DTPREL16_HA:
5976 case BFD_RELOC_PPC_DTPREL:
5977 case BFD_RELOC_PPC_GOT_TLSGD16:
5978 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5979 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5980 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5981 case BFD_RELOC_PPC_GOT_TLSLD16:
5982 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5983 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5984 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5985 case BFD_RELOC_PPC_GOT_TPREL16:
5986 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5987 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5988 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5989 case BFD_RELOC_PPC_GOT_DTPREL16:
5990 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5991 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5992 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5993 case BFD_RELOC_PPC64_TPREL16_DS:
5994 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5995 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5996 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5997 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5998 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5999 case BFD_RELOC_PPC64_DTPREL16_DS:
6000 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6001 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6002 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6003 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6004 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6005 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6006 break;
0baf16f2 6007#endif
252b5132 6008 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6009 bytes, rather than 2, so offset it here appropriately. */
252b5132 6010 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6011 if (fixP->fx_pcrel)
252b5132
RH		 6012 abort ();
6013
94f592af 6014 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6015 + ((target_big_endian) ? 2 : 0),
6016 value, 2);
6017 break;
6018
6019 case BFD_RELOC_8:
94f592af 6020 if (fixP->fx_pcrel)
31a91399
NC		 6021 {
6022 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6023 ".byte <undefined_symbol> - ." */
31a91399
NC		 6024 if (fixP->fx_addsy)
6025 as_bad (_("Unable to handle reference to symbol %s"),
6026 S_GET_NAME (fixP->fx_addsy));
6027 else
6028 as_bad (_("Unable to resolve expression"));
6029 fixP->fx_done = 1;
6030 }
6031 else
6032 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6033 value, 1);
252b5132
RH		 6034 break;
6035
6036 case BFD_RELOC_24_PLT_PCREL:
6037 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6038 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6039 abort ();
6040
94f592af 6041 if (fixP->fx_done)
99a814a1
AM		 6042 {
6043 char *where;
6044 unsigned long insn;
6045
6046 /* Fetch the instruction, insert the fully resolved operand
6047 value, and stuff the instruction back again. */
94f592af 6048 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6049 if (target_big_endian)
6050 insn = bfd_getb32 ((unsigned char *) where);
6051 else
6052 insn = bfd_getl32 ((unsigned char *) where);
6053 if ((value & 3) != 0)
94f592af 6054 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6055 _("must branch to an address a multiple of 4"));
6056 if ((offsetT) value < -0x40000000
6057 || (offsetT) value >= 0x40000000)
94f592af 6058 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6059 _("@local or @plt branch destination is too far away, %ld bytes"),
6060 (long) value);
6061 insn = insn | (value & 0x03fffffc);
6062 if (target_big_endian)
6063 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6064 else
6065 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6066 }
252b5132
RH		 6067 break;
6068
6069 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6070 fixP->fx_done = 0;
6071 if (fixP->fx_addsy
6072 && !S_IS_DEFINED (fixP->fx_addsy)
6073 && !S_IS_WEAK (fixP->fx_addsy))
6074 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6075 break;
6076
6077 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6078 fixP->fx_done = 0;
252b5132
RH		 6079 break;
6080
0baf16f2 6081#ifdef OBJ_ELF
0baf16f2
AM		 6082 /* Generated by reference to `sym@tocbase'. The sym is
6083 ignored by the linker. */
6084 case BFD_RELOC_PPC64_TOC:
94f592af 6085 fixP->fx_done = 0;
0baf16f2 6086 break;
0baf16f2 6087#endif
252b5132 6088 default:
bc805888 6089 fprintf (stderr,
94f592af 6090 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6091 fflush (stderr);
252b5132
RH		 6092 abort ();
6093 }
6094 }
6095
6096#ifdef OBJ_ELF
94f592af 6097 fixP->fx_addnumber = value;
4e6935a6
AM		 6098
6099 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6100 from the section contents. If we are going to be emitting a reloc
6101 then the section contents are immaterial, so don't warn if they
6102 happen to overflow. Leave such warnings to ld. */
6103 if (!fixP->fx_done)
6104 fixP->fx_no_overflow = 1;
252b5132 6105#else
94f592af
NC		 6106 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6107 fixP->fx_addnumber = 0;
252b5132
RH		 6108 else
6109 {
6110#ifdef TE_PE
94f592af 6111 fixP->fx_addnumber = 0;
252b5132 6112#else
8edcbfcd
TG		 6113 /* We want to use the offset within the toc, not the actual VMA
6114 of the symbol. */
94f592af 6115 fixP->fx_addnumber =
8edcbfcd
TG		 6116 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6117 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6118#endif
6119 }
6120#endif
252b5132
RH		 6121}
6122
6123/* Generate a reloc for a fixup. */
6124
6125arelent *
98027b10 6126tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6127{
6128 arelent *reloc;
6129
6130 reloc = (arelent *) xmalloc (sizeof (arelent));
6131
49309057
ILT		 6132 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6133 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6134 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6135 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6136 if (reloc->howto == (reloc_howto_type *) NULL)
6137 {
6138 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6139 _("reloc %d not supported by object file format"),
6140 (int) fixp->fx_r_type);
252b5132
RH		 6141 return NULL;
6142 }
6143 reloc->addend = fixp->fx_addnumber;
6144
6145 return reloc;
6146}
75e21f08
JJ		 6147
6148void
98027b10 6149ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6150{
6151 cfi_add_CFA_def_cfa (1, 0);
6152}
6153
6154int
1df69f4f 6155tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6156{
6157 unsigned int regnum = -1;
6158 unsigned int i;
6159 const char *p;
6160 char *q;
6161 static struct { char *name; int dw2regnum; } regnames[] =
6162 {
6163 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6164 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6165 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6166 { "spe_acc", 111 }, { "spefscr", 112 }
6167 };
6168
6169 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6170 if (strcmp (regnames[i].name, regname) == 0)
6171 return regnames[i].dw2regnum;
6172
6173 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6174 {
6175 p = regname + 1 + (regname[1] == '.');
6176 regnum = strtoul (p, &q, 10);
6177 if (p == q || *q || regnum >= 32)
6178 return -1;
6179 if (regname[0] == 'f')
b7d7dc63 6180 regnum += 32;
75e21f08 6181 else if (regname[0] == 'v')
b7d7dc63 6182 regnum += 77;
75e21f08
JJ		 6183 }
6184 else if (regname[0] == 'c' && regname[1] == 'r')
6185 {
6186 p = regname + 2 + (regname[2] == '.');
6187 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6188 return -1;
75e21f08
JJ		 6189 regnum = p[0] - '0' + 68;
6190 }
6191 return regnum;
6192}
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