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binutils: Fix left shift of negative value.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b90efa5b 2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132 862
d02603dc 863 c = get_symbol_name (&name);
252b5132
RH		 864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
98027b10 1081md_parse_option (int c, char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015 1283 generate code for PowerPC 7400/7410/7450/7455\n\
ef5a96d5
AM		 1284-m750cl generate code for PowerPC 750cl\n\
1285-m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
df12615d 1286 fprintf (stream, _("\
ce3d2015
AM		 1287-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1288-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1289-mbooke generate code for 32-bit PowerPC BookE\n\
1290-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1291-mpower4, -mpwr4 generate code for Power4 architecture\n\
1292-mpower5, -mpwr5, -mpwr5x\n\
1293 generate code for Power5 architecture\n\
1294-mpower6, -mpwr6 generate code for Power6 architecture\n\
1295-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1296-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1297-mcell generate code for Cell Broadband Engine architecture\n\
1298-mcom generate code Power/PowerPC common instructions\n\
1299-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1300 fprintf (stream, _("\
ce3d2015
AM		 1301-maltivec generate code for AltiVec\n\
1302-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1303-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1304-me300 generate code for PowerPC e300 family\n\
1305-me500, -me500x2 generate code for Motorola e500 core complex\n\
1306-me500mc, generate code for Freescale e500mc core complex\n\
1307-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1308-me5500, generate code for Freescale e5500 core complex\n\
1309-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1310-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1311-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1312-mtitan generate code for AppliedMicro Titan core complex\n\
1313-mregnames Allow symbolic names for registers\n\
1314-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1315#ifdef OBJ_ELF
bc805888 1316 fprintf (stream, _("\
ce3d2015
AM		 1317-mrelocatable support for GCC's -mrelocatble option\n\
1318-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1319-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1320-mlittle, -mlittle-endian, -le\n\
ce3d2015 1321 generate code for a little endian machine\n\
b8b738ac 1322-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1323 generate code for a big endian machine\n\
1324-msolaris generate code for Solaris\n\
1325-mno-solaris do not generate code for Solaris\n\
b8b738ac 1326-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1327-V print assembler version number\n\
1328-Qy, -Qn ignored\n"));
252b5132 1329#endif
cef4f754 1330 fprintf (stream, _("\
bf7279d5
AM		 1331-nops=count when aligning, more than COUNT nops uses a branch\n\
1332-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1333}
1334\f
1335/* Set ppc_cpu if it is not already set. */
1336
1337static void
98027b10 1338ppc_set_cpu (void)
252b5132
RH		 1339{
1340 const char *default_os = TARGET_OS;
1341 const char *default_cpu = TARGET_CPU;
1342
7102e95e 1343 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1344 {
2a98c3a6 1345 if (ppc_obj64)
bdc70b4a 1346 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1347 else if (strncmp (default_os, "aix", 3) == 0
1348 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1349 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1350 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1351 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1352 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1353 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1354 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1355 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1356 else
d6ed37ed 1357 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1358 default_cpu, default_os);
252b5132
RH		 1359 }
1360}
1361
9232bbb0
AM		 1362/* Figure out the BFD architecture to use. This function and ppc_mach
1363 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1364
1365enum bfd_architecture
98027b10 1366ppc_arch (void)
252b5132
RH		 1367{
1368 const char *default_cpu = TARGET_CPU;
1369 ppc_set_cpu ();
1370
1371 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1372 return bfd_arch_powerpc;
b9c361e0
JL		 1373 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1374 return bfd_arch_powerpc;
1375 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1376 return bfd_arch_rs6000;
b9c361e0 1377 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1378 {
1379 if (strcmp (default_cpu, "rs6000") == 0)
1380 return bfd_arch_rs6000;
0baf16f2 1381 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1382 return bfd_arch_powerpc;
1383 }
1384
d6ed37ed 1385 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1386 return bfd_arch_unknown;
1387}
1388
7f6d05e8 1389unsigned long
98027b10 1390ppc_mach (void)
7f6d05e8 1391{
2a98c3a6
AM		 1392 if (ppc_obj64)
1393 return bfd_mach_ppc64;
1394 else if (ppc_arch () == bfd_arch_rs6000)
1395 return bfd_mach_rs6k;
ce3d2015
AM		 1396 else if (ppc_cpu & PPC_OPCODE_TITAN)
1397 return bfd_mach_ppc_titan;
b9c361e0
JL		 1398 else if (ppc_cpu & PPC_OPCODE_VLE)
1399 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1400 else
1401 return bfd_mach_ppc;
7f6d05e8
CP		 1402}
1403
81d4177b 1404extern char*
98027b10 1405ppc_target_format (void)
7f6d05e8
CP		 1406{
1407#ifdef OBJ_COFF
1408#ifdef TE_PE
99a814a1 1409 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1410#elif TE_POWERMAC
0baf16f2 1411 return "xcoff-powermac";
7f6d05e8 1412#else
eb1e0e80 1413# ifdef TE_AIX5
edc1d652 1414 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1415# else
edc1d652 1416 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1417# endif
7f6d05e8 1418#endif
7f6d05e8
CP		 1419#endif
1420#ifdef OBJ_ELF
edc1d652
AM		 1421# ifdef TE_FreeBSD
1422 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1423# elif defined (TE_VXWORKS)
9d8504b1
PB		 1424 return "elf32-powerpc-vxworks";
1425# else
0baf16f2 1426 return (target_big_endian
2b3c4602
AM		 1427 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1428 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1429# endif
7f6d05e8
CP		 1430#endif
1431}
1432
b9c361e0
JL		 1433/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1434 Return TRUE if there's a problem, otherwise FALSE. */
1435
1436static bfd_boolean
1437insn_validate (const struct powerpc_opcode *op)
1438{
1439 const unsigned char *o;
1440 unsigned long omask = op->mask;
1441
1442 /* The mask had better not trim off opcode bits. */
1443 if ((op->opcode & omask) != op->opcode)
1444 {
1445 as_bad (_("mask trims opcode bits for %s"), op->name);
1446 return TRUE;
1447 }
1448
1449 /* The operands must not overlap the opcode or each other. */
1450 for (o = op->operands; *o; ++o)
1451 {
1452 if (*o >= num_powerpc_operands)
1453 {
1454 as_bad (_("operand index error for %s"), op->name);
1455 return TRUE;
1456 }
1457 else
1458 {
1459 const struct powerpc_operand *operand = &powerpc_operands[*o];
b6518b38 1460 if (operand->shift != (int) PPC_OPSHIFT_INV)
b9c361e0
JL		 1461 {
1462 unsigned long mask;
1463
1464 if (operand->shift >= 0)
1465 mask = operand->bitm << operand->shift;
1466 else
1467 mask = operand->bitm >> -operand->shift;
1468 if (omask & mask)
1469 {
1470 as_bad (_("operand %d overlap in %s"),
1471 (int) (o - op->operands), op->name);
1472 return TRUE;
1473 }
1474 omask |= mask;
1475 }
1476 }
1477 }
1478 return FALSE;
1479}
1480
69c040df 1481/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1482 for .machine pseudo. */
252b5132 1483
69c040df
AM		 1484static void
1485ppc_setup_opcodes (void)
252b5132 1486{
98027b10 1487 const struct powerpc_opcode *op;
252b5132
RH		 1488 const struct powerpc_opcode *op_end;
1489 const struct powerpc_macro *macro;
1490 const struct powerpc_macro *macro_end;
b84bf58a 1491 bfd_boolean bad_insn = FALSE;
252b5132 1492
69c040df
AM		 1493 if (ppc_hash != NULL)
1494 hash_die (ppc_hash);
1495 if (ppc_macro_hash != NULL)
1496 hash_die (ppc_macro_hash);
252b5132
RH		 1497
1498 /* Insert the opcodes into a hash table. */
1499 ppc_hash = hash_new ();
1500
c43a438d 1501 if (ENABLE_CHECKING)
b84bf58a 1502 {
c43a438d 1503 unsigned int i;
b84bf58a 1504
3b8b57a9
AM		 1505 /* An index into powerpc_operands is stored in struct fix
1506 fx_pcrel_adjust which is 8 bits wide. */
1507 gas_assert (num_powerpc_operands < 256);
1508
c43a438d
AM		 1509 /* Check operand masks. Code here and in the disassembler assumes
1510 all the 1's in the mask are contiguous. */
1511 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1512 {
c43a438d
AM		 1513 unsigned long mask = powerpc_operands[i].bitm;
1514 unsigned long right_bit;
1515 unsigned int j;
1516
1517 right_bit = mask & -mask;
1518 mask += right_bit;
1519 right_bit = mask & -mask;
1520 if (mask != right_bit)
1521 {
1522 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1523 bad_insn = TRUE;
1524 }
1525 for (j = i + 1; j < num_powerpc_operands; ++j)
1526 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1527 sizeof (powerpc_operands[0])) == 0)
1528 {
1529 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1530 j, i);
1531 bad_insn = TRUE;
1532 }
b84bf58a
AM		 1533 }
1534 }
1535
252b5132
RH		 1536 op_end = powerpc_opcodes + powerpc_num_opcodes;
1537 for (op = powerpc_opcodes; op < op_end; op++)
1538 {
c43a438d 1539 if (ENABLE_CHECKING)
b84bf58a 1540 {
d815f1a9 1541 if (op != powerpc_opcodes)
8dbcd839 1542 {
b9c361e0
JL		 1543 int old_opcode = PPC_OP (op[-1].opcode);
1544 int new_opcode = PPC_OP (op[0].opcode);
1545
1546#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1547 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1548 op->name, (unsigned int) (op - powerpc_opcodes),
1549 (unsigned int) new_opcode, (unsigned int) op->opcode,
1550 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1551#endif
1552
d815f1a9
AM		 1553 /* The major opcodes had better be sorted. Code in the
1554 disassembler assumes the insns are sorted according to
1555 major opcode. */
b9c361e0 1556 if (new_opcode < old_opcode)
d815f1a9
AM		 1557 {
1558 as_bad (_("major opcode is not sorted for %s"),
1559 op->name);
1560 bad_insn = TRUE;
1561 }
8dbcd839 1562 }
b9c361e0
JL		 1563 bad_insn |= insn_validate (op);
1564 }
c43a438d 1565
b9c361e0
JL		 1566 if ((ppc_cpu & op->flags) != 0
1567 && !(ppc_cpu & op->deprecated))
1568 {
1569 const char *retval;
1570
1571 retval = hash_insert (ppc_hash, op->name, (void *) op);
1572 if (retval != NULL)
c43a438d 1573 {
b9c361e0 1574 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1575 op->name);
1576 bad_insn = TRUE;
1577 }
b9c361e0
JL		 1578 }
1579 }
c43a438d 1580
b9c361e0
JL		 1581 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1582 for (op = powerpc_opcodes; op < op_end; op++)
1583 hash_insert (ppc_hash, op->name, (void *) op);
1584
1585 op_end = vle_opcodes + vle_num_opcodes;
1586 for (op = vle_opcodes; op < op_end; op++)
1587 {
1588 if (ENABLE_CHECKING)
1589 {
1590 if (op != vle_opcodes)
1591 {
1592 unsigned old_seg, new_seg;
1593
1594 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1595 old_seg = VLE_OP_TO_SEG (old_seg);
1596 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1597 new_seg = VLE_OP_TO_SEG (new_seg);
1598
1599#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1600 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1601 op->name, (unsigned int) (op - powerpc_opcodes),
1602 (unsigned int) new_seg, (unsigned int) op->opcode,
1603 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1604#endif
1605 /* The major opcodes had better be sorted. Code in the
1606 disassembler assumes the insns are sorted according to
1607 major opcode. */
1608 if (new_seg < old_seg)
1609 {
1610 as_bad (_("major opcode is not sorted for %s"),
1611 op->name);
1612 bad_insn = TRUE;
1613 }
1614 }
1615
1616 bad_insn |= insn_validate (op);
c43a438d 1617 }
252b5132 1618
bdc70b4a 1619 if ((ppc_cpu & op->flags) != 0
1cb0a767 1620 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1621 {
1622 const char *retval;
1623
98027b10 1624 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1625 if (retval != NULL)
252b5132 1626 {
b84bf58a 1627 as_bad (_("duplicate instruction %s"),
99a814a1 1628 op->name);
b84bf58a 1629 bad_insn = TRUE;
252b5132
RH		 1630 }
1631 }
1632 }
1633
b9c361e0
JL		 1634 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1635 for (op = vle_opcodes; op < op_end; op++)
98027b10 1636 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1637
252b5132
RH		 1638 /* Insert the macros into a hash table. */
1639 ppc_macro_hash = hash_new ();
1640
1641 macro_end = powerpc_macros + powerpc_num_macros;
1642 for (macro = powerpc_macros; macro < macro_end; macro++)
1643 {
33740db9 1644 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1645 {
1646 const char *retval;
1647
98027b10 1648 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1649 if (retval != (const char *) NULL)
1650 {
b84bf58a
AM		 1651 as_bad (_("duplicate macro %s"), macro->name);
1652 bad_insn = TRUE;
252b5132
RH		 1653 }
1654 }
1655 }
1656
b84bf58a 1657 if (bad_insn)
252b5132 1658 abort ();
69c040df
AM		 1659}
1660
1661/* This function is called when the assembler starts up. It is called
1662 after the options have been parsed and the output file has been
1663 opened. */
1664
1665void
98027b10 1666md_begin (void)
69c040df
AM		 1667{
1668 ppc_set_cpu ();
1669
1670 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1671 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1672
1673#ifdef OBJ_ELF
1674 /* Set the ELF flags if desired. */
1675 if (ppc_flags && !msolaris)
1676 bfd_set_private_flags (stdoutput, ppc_flags);
1677#endif
1678
1679 ppc_setup_opcodes ();
252b5132 1680
67c1ffbe 1681 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1682 by the user. */
252b5132
RH		 1683 if (!set_target_endian)
1684 {
1685 set_target_endian = 1;
1686 target_big_endian = PPC_BIG_ENDIAN;
1687 }
1688
1689#ifdef OBJ_XCOFF
1690 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1691
1692 /* Create dummy symbols to serve as initial csects. This forces the
1693 text csects to precede the data csects. These symbols will not
1694 be output. */
1695 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1696 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1697 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1698 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1699#endif
1700
1701#ifdef TE_PE
1702
1703 ppc_current_section = text_section;
81d4177b 1704 ppc_previous_section = 0;
252b5132
RH		 1705
1706#endif
1707}
1708
6a0c61b7 1709void
98027b10 1710ppc_cleanup (void)
6a0c61b7 1711{
dc1d03fc 1712#ifdef OBJ_ELF
6a0c61b7
EZ		 1713 if (ppc_apuinfo_list == NULL)
1714 return;
1715
1716 /* Ok, so write the section info out. We have this layout:
1717
1718 byte data what
1719 ---- ---- ----
1720 0 8 length of "APUinfo\0"
1721 4 (n*4) number of APU's (4 bytes each)
1722 8 2 note type 2
1723 12 "APUinfo\0" name
1724 20 APU#1 first APU's info
1725 24 APU#2 second APU's info
1726 ... ...
1727 */
1728 {
1729 char *p;
1730 asection *seg = now_seg;
1731 subsegT subseg = now_subseg;
1732 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1733 unsigned int i;
6a0c61b7
EZ		 1734
1735 /* Create the .PPC.EMB.apuinfo section. */
1736 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1737 bfd_set_section_flags (stdoutput,
1738 apuinfo_secp,
e1a9cb8e 1739 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1740
1741 p = frag_more (4);
1742 md_number_to_chars (p, (valueT) 8, 4);
1743
1744 p = frag_more (4);
e98d298c 1745 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1746
1747 p = frag_more (4);
1748 md_number_to_chars (p, (valueT) 2, 4);
1749
1750 p = frag_more (8);
1751 strcpy (p, "APUinfo");
1752
1753 for (i = 0; i < ppc_apuinfo_num; i++)
1754 {
b34976b6
AM		 1755 p = frag_more (4);
1756 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1757 }
1758
1759 frag_align (2, 0, 0);
1760
1761 /* We probably can't restore the current segment, for there likely
1762 isn't one yet... */
1763 if (seg && subseg)
1764 subseg_set (seg, subseg);
1765 }
dc1d03fc 1766#endif
6a0c61b7
EZ		 1767}
1768
252b5132
RH		 1769/* Insert an operand value into an instruction. */
1770
1771static unsigned long
a1867a27
AM		 1772ppc_insert_operand (unsigned long insn,
1773 const struct powerpc_operand *operand,
1774 offsetT val,
91d6fa6a 1775 ppc_cpu_t cpu,
a1867a27
AM		 1776 char *file,
1777 unsigned int line)
252b5132 1778{
b84bf58a 1779 long min, max, right;
eb42fac1 1780
b84bf58a
AM		 1781 max = operand->bitm;
1782 right = max & -max;
1783 min = 0;
1784
a47622ac 1785 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1786 {
a47622ac
AM		 1787 /* Extend the allowed range for addis to [-65536, 65535].
1788 Similarly for some VLE high part insns. For 64-bit it
1789 would be good to disable this for signed fields since the
1790 value is sign extended into the high 32 bits of the register.
1791 If the value is, say, an address, then we might care about
1792 the high bits. However, gcc as of 2014-06 uses unsigned
1793 values when loading the high part of 64-bit constants using
1794 lis.
1795 Use the same extended range for cmpli, to allow at least
1796 [-32768, 65535]. */
1797 min = ~max & -right;
1798 }
1799 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1800 {
1801 max = (max >> 1) & -right;
931774a9 1802 min = ~max & -right;
b84bf58a 1803 }
252b5132 1804
b84bf58a 1805 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1806 max++;
252b5132 1807
b84bf58a 1808 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1809 {
1810 long tmp = min;
1811 min = -max;
1812 max = -tmp;
1813 }
b84bf58a 1814
a1867a27
AM		 1815 if (min <= max)
1816 {
1817 /* Some people write constants with the sign extension done by
1818 hand but only up to 32 bits. This shouldn't really be valid,
1819 but, to permit this code to assemble on a 64-bit host, we
1820 sign extend the 32-bit value to 64 bits if so doing makes the
1821 value valid. */
1822 if (val > max
1823 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1824 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1825 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1826 val = val - 0x80000000 - 0x80000000;
1827
1828 /* Similarly, people write expressions like ~(1<<15), and expect
1829 this to be OK for a 32-bit unsigned value. */
1830 else if (val < min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1832 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1833 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1834 val = val + 0x80000000 + 0x80000000;
1835
1836 else if (val < min
1837 || val > max
1838 || (val & (right - 1)) != 0)
1839 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1840 }
b84bf58a 1841
252b5132
RH		 1842 if (operand->insert)
1843 {
1844 const char *errmsg;
1845
1846 errmsg = NULL;
91d6fa6a 1847 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1848 if (errmsg != (const char *) NULL)
ee2c9aa9 1849 as_bad_where (file, line, "%s", errmsg);
252b5132 1850 }
b9c361e0 1851 else if (operand->shift >= 0)
b84bf58a 1852 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1853 else
1854 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1855
1856 return insn;
1857}
1858
1859\f
1860#ifdef OBJ_ELF
1861/* Parse @got, etc. and return the desired relocation. */
1862static bfd_reloc_code_real_type
98027b10 1863ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1864{
1865 struct map_bfd {
1866 char *string;
b7d7dc63
AM		 1867 unsigned int length : 8;
1868 unsigned int valid32 : 1;
1869 unsigned int valid64 : 1;
1870 unsigned int reloc;
252b5132
RH		 1871 };
1872
1873 char ident[20];
1874 char *str = *str_p;
1875 char *str2;
1876 int ch;
1877 int len;
15c1449b 1878 const struct map_bfd *ptr;
252b5132 1879
b7d7dc63
AM		 1880#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1881#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1882#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1883
15c1449b 1884 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1885 MAP ("l", BFD_RELOC_LO16),
1886 MAP ("h", BFD_RELOC_HI16),
1887 MAP ("ha", BFD_RELOC_HI16_S),
1888 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1889 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1890 MAP ("got", BFD_RELOC_16_GOTOFF),
1891 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1892 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1893 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1894 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1895 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1896 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1897 MAP ("copy", BFD_RELOC_PPC_COPY),
1898 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1899 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1900 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1901 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1902 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1903 MAP ("tls", BFD_RELOC_PPC_TLS),
1904 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1905 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1906 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1907 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1908 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1909 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1910 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1911 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1912 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1913 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1914 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1915 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1916 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1917 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1918 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1919 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1920 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1921 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1922 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1923 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1924 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1925 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1926 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1927 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1928 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1929 MAP32 ("fixup", BFD_RELOC_CTOR),
1930 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1932 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1934 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1935 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1936 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1937 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1938 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1939 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1940 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1941 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1942 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1943 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1944 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1945 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1946 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1947 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1948 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1949 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1950 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1951 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1952 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1953 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1954 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1955 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1956 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1957 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1958 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1959 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1960 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1961 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1962 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1963 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1964 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1965 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1966 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1967 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1968 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1969 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1970 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1971 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1972 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1973 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1974 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1975 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1976 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1977 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1978 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1979 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1980 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1981 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1982 };
1983
1984 if (*str++ != '@')
62ebcb5c 1985 return BFD_RELOC_NONE;
252b5132
RH		 1986
1987 for (ch = *str, str2 = ident;
1988 (str2 < ident + sizeof (ident) - 1
3882b010 1989 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1990 ch = *++str)
1991 {
3882b010 1992 *str2++ = TOLOWER (ch);
252b5132
RH		 1993 }
1994
1995 *str2 = '\0';
1996 len = str2 - ident;
1997
1998 ch = ident[0];
1999 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2000 if (ch == ptr->string[0]
2001 && len == ptr->length
b7d7dc63
AM		 2002 && memcmp (ident, ptr->string, ptr->length) == 0
2003 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2004 {
15c1449b
AM		 2005 int reloc = ptr->reloc;
2006
727fc41e
AM		 2007 if (!ppc_obj64 && exp_p->X_add_number != 0)
2008 {
2009 switch (reloc)
2010 {
2011 case BFD_RELOC_16_GOTOFF:
2012 case BFD_RELOC_LO16_GOTOFF:
2013 case BFD_RELOC_HI16_GOTOFF:
2014 case BFD_RELOC_HI16_S_GOTOFF:
2015 as_warn (_("identifier+constant@got means "
2016 "identifier@got+constant"));
2017 break;
2018
2019 case BFD_RELOC_PPC_GOT_TLSGD16:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2022 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2023 case BFD_RELOC_PPC_GOT_TLSLD16:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2026 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2027 case BFD_RELOC_PPC_GOT_DTPREL16:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2030 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2031 case BFD_RELOC_PPC_GOT_TPREL16:
2032 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2034 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2035 as_bad (_("symbol+offset not supported for got tls"));
2036 break;
2037 }
2038 }
5f6db75a
AM		 2039
2040 /* Now check for identifier@suffix+constant. */
2041 if (*str == '-' || *str == '+')
252b5132 2042 {
5f6db75a
AM		 2043 char *orig_line = input_line_pointer;
2044 expressionS new_exp;
2045
2046 input_line_pointer = str;
2047 expression (&new_exp);
2048 if (new_exp.X_op == O_constant)
252b5132 2049 {
5f6db75a
AM		 2050 exp_p->X_add_number += new_exp.X_add_number;
2051 str = input_line_pointer;
252b5132 2052 }
5f6db75a
AM		 2053
2054 if (&input_line_pointer != str_p)
2055 input_line_pointer = orig_line;
252b5132 2056 }
252b5132 2057 *str_p = str;
0baf16f2 2058
2b3c4602 2059 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2060 && exp_p->X_op == O_symbol
2061 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2062 {
9f2b53d7
AM		 2063 /* Change the symbol so that the dummy .TOC. symbol can be
2064 omitted from the object file. */
0baf16f2
AM		 2065 exp_p->X_add_symbol = &abs_symbol;
2066 }
2067
15c1449b 2068 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2069 }
2070
62ebcb5c 2071 return BFD_RELOC_NONE;
252b5132
RH		 2072}
2073
62ebcb5c 2074/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2075
62ebcb5c
AM		 2076bfd_reloc_code_real_type
2077ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2078{
2079 expression (exp);
2080 if (nbytes >= 2 && *input_line_pointer == '@')
2081 return ppc_elf_suffix (&input_line_pointer, exp);
2082 return BFD_RELOC_NONE;
252b5132
RH		 2083}
2084
bf7279d5
AM		 2085/* Warn when emitting data to code sections, unless we are emitting
2086 a relocation that ld --ppc476-workaround uses to recognise data
2087 *and* there was an unconditional branch prior to the data. */
2088
2089void
2090ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2091 unsigned int nbytes, fixS *fix)
2092{
2093 if (warn_476
2094 && (now_seg->flags & SEC_CODE) != 0
2095 && (nbytes != 4
2096 || fix == NULL
2097 || !(fix->fx_r_type == BFD_RELOC_32
2098 || fix->fx_r_type == BFD_RELOC_CTOR
2099 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2100 || !(last_seg == now_seg && last_subseg == now_subseg)
2101 || !((last_insn & (0x3f << 26)) == (18u << 26)
2102 || ((last_insn & (0x3f << 26)) == (16u << 26)
2103 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2104 || ((last_insn & (0x3f << 26)) == (19u << 26)
2105 && (last_insn & (0x3ff << 1)) == (16u << 1)
2106 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2107 {
2108 /* Flag that we've warned. */
2109 if (fix != NULL)
2110 fix->fx_tcbit = 1;
2111
2112 as_warn (_("data in executable section"));
2113 }
2114}
2115
252b5132
RH		 2116/* Solaris pseduo op to change to the .rodata section. */
2117static void
98027b10 2118ppc_elf_rdata (int xxx)
252b5132
RH		 2119{
2120 char *save_line = input_line_pointer;
2121 static char section[] = ".rodata\n";
2122
99a814a1 2123 /* Just pretend this is .section .rodata */
252b5132
RH		 2124 input_line_pointer = section;
2125 obj_elf_section (xxx);
2126
2127 input_line_pointer = save_line;
2128}
2129
99a814a1 2130/* Pseudo op to make file scope bss items. */
252b5132 2131static void
98027b10 2132ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2133{
98027b10
AM		 2134 char *name;
2135 char c;
2136 char *p;
252b5132 2137 offsetT size;
98027b10 2138 symbolS *symbolP;
252b5132
RH		 2139 offsetT align;
2140 segT old_sec;
2141 int old_subsec;
2142 char *pfrag;
2143 int align2;
2144
d02603dc 2145 c = get_symbol_name (&name);
252b5132 2146
d02603dc 2147 /* Just after name is now '\0'. */
252b5132
RH		 2148 p = input_line_pointer;
2149 *p = c;
d02603dc 2150 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 2151 if (*input_line_pointer != ',')
2152 {
d6ed37ed 2153 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2154 ignore_rest_of_line ();
2155 return;
2156 }
2157
2158 input_line_pointer++; /* skip ',' */
2159 if ((size = get_absolute_expression ()) < 0)
2160 {
2161 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2162 ignore_rest_of_line ();
2163 return;
2164 }
2165
2166 /* The third argument to .lcomm is the alignment. */
2167 if (*input_line_pointer != ',')
2168 align = 8;
2169 else
2170 {
2171 ++input_line_pointer;
2172 align = get_absolute_expression ();
2173 if (align <= 0)
2174 {
2175 as_warn (_("ignoring bad alignment"));
2176 align = 8;
2177 }
2178 }
2179
2180 *p = 0;
2181 symbolP = symbol_find_or_make (name);
2182 *p = c;
2183
2184 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2185 {
d6ed37ed 2186 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2187 S_GET_NAME (symbolP));
2188 ignore_rest_of_line ();
2189 return;
2190 }
2191
2192 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2193 {
d6ed37ed 2194 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2195 S_GET_NAME (symbolP),
2196 (long) S_GET_VALUE (symbolP),
2197 (long) size);
2198
2199 ignore_rest_of_line ();
2200 return;
2201 }
2202
99a814a1 2203 /* Allocate_bss. */
252b5132
RH		 2204 old_sec = now_seg;
2205 old_subsec = now_subseg;
2206 if (align)
2207 {
99a814a1 2208 /* Convert to a power of 2 alignment. */
252b5132
RH		 2209 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2210 if (align != 1)
2211 {
d6ed37ed 2212 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2213 ignore_rest_of_line ();
2214 return;
2215 }
2216 }
2217 else
2218 align2 = 0;
2219
2220 record_alignment (bss_section, align2);
cbe02d4f 2221 subseg_set (bss_section, 1);
252b5132
RH		 2222 if (align2)
2223 frag_align (align2, 0, 0);
2224 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2225 symbol_get_frag (symbolP)->fr_symbol = 0;
2226 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2227 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2228 (char *) 0);
2229 *pfrag = 0;
2230 S_SET_SIZE (symbolP, size);
2231 S_SET_SEGMENT (symbolP, bss_section);
2232 subseg_set (old_sec, old_subsec);
2233 demand_empty_rest_of_line ();
2234}
2235
6911b7dc
AM		 2236/* Pseudo op to set symbol local entry point. */
2237static void
2238ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2239{
d02603dc
NC		 2240 char *name;
2241 char c = get_symbol_name (&name);
6911b7dc
AM		 2242 char *p;
2243 expressionS exp;
2244 symbolS *sym;
2245 asymbol *bfdsym;
2246 elf_symbol_type *elfsym;
2247
2248 p = input_line_pointer;
2249 *p = c;
d02603dc 2250 SKIP_WHITESPACE_AFTER_NAME ();
6911b7dc
AM		 2251 if (*input_line_pointer != ',')
2252 {
2253 *p = 0;
2254 as_bad (_("expected comma after name `%s' in .localentry directive"),
2255 name);
2256 *p = c;
2257 ignore_rest_of_line ();
2258 return;
2259 }
2260 input_line_pointer++;
2261 expression (&exp);
2262 if (exp.X_op == O_absent)
2263 {
2264 as_bad (_("missing expression in .localentry directive"));
2265 exp.X_op = O_constant;
2266 exp.X_add_number = 0;
2267 }
2268 *p = 0;
2269 sym = symbol_find_or_make (name);
2270 *p = c;
2271
2272 if (resolve_expression (&exp)
2273 && exp.X_op == O_constant)
2274 {
2275 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2276
e2b5892e 2277 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2278 as_bad (_(".localentry expression for `%s' "
2279 "is not a valid power of 2"), S_GET_NAME (sym));
2280 else
2281 {
2282 bfdsym = symbol_get_bfdsym (sym);
2283 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2284 gas_assert (elfsym);
2285 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2286 elfsym->internal_elf_sym.st_other |= encoded;
2287 if (ppc_abiversion == 0)
2288 ppc_abiversion = 2;
2289 }
2290 }
2291 else
2292 as_bad (_(".localentry expression for `%s' "
2293 "does not evaluate to a constant"), S_GET_NAME (sym));
2294
2295 demand_empty_rest_of_line ();
2296}
2297
ee67d69a
AM		 2298/* Pseudo op to set ABI version. */
2299static void
2300ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2301{
2302 expressionS exp;
2303
2304 expression (&exp);
2305 if (exp.X_op == O_absent)
2306 {
2307 as_bad (_("missing expression in .abiversion directive"));
2308 exp.X_op = O_constant;
2309 exp.X_add_number = 0;
2310 }
2311
2312 if (resolve_expression (&exp)
2313 && exp.X_op == O_constant)
2314 ppc_abiversion = exp.X_add_number;
2315 else
2316 as_bad (_(".abiversion expression does not evaluate to a constant"));
2317 demand_empty_rest_of_line ();
2318}
2319
2320/* Set ABI version in output file. */
2321void
2322ppc_elf_end (void)
2323{
2324 if (ppc_obj64 && ppc_abiversion != 0)
2325 {
2326 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2327 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2328 }
2329}
2330
252b5132
RH		 2331/* Validate any relocations emitted for -mrelocatable, possibly adding
2332 fixups for word relocations in writable segments, so we can adjust
2333 them at runtime. */
2334static void
98027b10 2335ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2336{
2337 if (fixp->fx_done || fixp->fx_pcrel)
2338 return;
2339
2340 switch (shlib)
2341 {
2342 case SHLIB_NONE:
2343 case SHLIB_PIC:
2344 return;
2345
5d6f4f16 2346 case SHLIB_MRELOCATABLE:
62ebcb5c 2347 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2348 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2349 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2351 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2352 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2353 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2355 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2356 && strcmp (segment_name (seg), ".got2") != 0
2357 && strcmp (segment_name (seg), ".dtors") != 0
2358 && strcmp (segment_name (seg), ".ctors") != 0
2359 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2360 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2361 && strcmp (segment_name (seg), ".eh_frame") != 0
2362 && strcmp (segment_name (seg), ".ex_shared") != 0)
2363 {
2364 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2365 || fixp->fx_r_type != BFD_RELOC_CTOR)
2366 {
2367 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2368 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2369 }
2370 }
2371 return;
2372 }
2373}
0baf16f2 2374
7e8d4ab4
AM		 2375/* Prevent elf_frob_file_before_adjust removing a weak undefined
2376 function descriptor sym if the corresponding code sym is used. */
2377
2378void
98027b10 2379ppc_frob_file_before_adjust (void)
0baf16f2 2380{
7e8d4ab4 2381 symbolS *symp;
9232bbb0 2382 asection *toc;
0baf16f2 2383
7e8d4ab4
AM		 2384 if (!ppc_obj64)
2385 return;
2386
2387 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2388 {
7e8d4ab4
AM		 2389 const char *name;
2390 char *dotname;
2391 symbolS *dotsym;
2392 size_t len;
2393
2394 name = S_GET_NAME (symp);
2395 if (name[0] == '.')
2396 continue;
2397
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2400 continue;
2401
2402 len = strlen (name) + 1;
2403 dotname = xmalloc (len + 1);
2404 dotname[0] = '.';
2405 memcpy (dotname + 1, name, len);
461b725f 2406 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2407 free (dotname);
2408 if (dotsym != NULL && (symbol_used_p (dotsym)
2409 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2410 symbol_mark_used (symp);
2411
0baf16f2
AM		 2412 }
2413
9232bbb0
AM		 2414 toc = bfd_get_section_by_name (stdoutput, ".toc");
2415 if (toc != NULL
01efc3af 2416 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2417 && bfd_section_size (stdoutput, toc) > 0x10000)
2418 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2419}
2420
2421/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2422 emitted. Other uses of .TOC. will cause the symbol to be marked
2423 with BSF_KEEP in md_apply_fix. */
9232bbb0 2424
a38a07e0
AM		 2425void
2426ppc_elf_adjust_symtab (void)
2427{
2428 if (ppc_obj64)
2429 {
2430 symbolS *symp;
2431 symp = symbol_find (".TOC.");
2432 if (symp != NULL)
2433 {
2434 asymbol *bsym = symbol_get_bfdsym (symp);
2435 if ((bsym->flags & BSF_KEEP) == 0)
2436 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2437 }
2438 }
0baf16f2 2439}
252b5132
RH		 2440#endif /* OBJ_ELF */
2441\f
2442#ifdef TE_PE
2443
2444/*
99a814a1 2445 * Summary of parse_toc_entry.
252b5132
RH		 2446 *
2447 * in: Input_line_pointer points to the '[' in one of:
2448 *
2449 * [toc] [tocv] [toc32] [toc64]
2450 *
2451 * Anything else is an error of one kind or another.
2452 *
81d4177b 2453 * out:
252b5132
RH		 2454 * return value: success or failure
2455 * toc_kind: kind of toc reference
2456 * input_line_pointer:
2457 * success: first char after the ']'
2458 * failure: unchanged
2459 *
2460 * settings:
2461 *
2462 * [toc] - rv == success, toc_kind = default_toc
2463 * [tocv] - rv == success, toc_kind = data_in_toc
2464 * [toc32] - rv == success, toc_kind = must_be_32
2465 * [toc64] - rv == success, toc_kind = must_be_64
2466 *
2467 */
2468
81d4177b
KH		 2469enum toc_size_qualifier
2470{
252b5132
RH		 2471 default_toc, /* The toc cell constructed should be the system default size */
2472 data_in_toc, /* This is a direct reference to a toc cell */
2473 must_be_32, /* The toc cell constructed must be 32 bits wide */
2474 must_be_64 /* The toc cell constructed must be 64 bits wide */
2475};
2476
2477static int
98027b10 2478parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2479{
2480 char *start;
2481 char *toc_spec;
2482 char c;
2483 enum toc_size_qualifier t;
2484
99a814a1 2485 /* Save the input_line_pointer. */
252b5132
RH		 2486 start = input_line_pointer;
2487
99a814a1 2488 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2489 ++input_line_pointer;
2490 SKIP_WHITESPACE ();
81d4177b 2491
99a814a1 2492 /* Find the spelling of the operand. */
d02603dc 2493 c = get_symbol_name (&toc_spec);
252b5132 2494
99a814a1 2495 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2496 {
2497 t = default_toc;
2498 }
99a814a1 2499 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2500 {
2501 t = data_in_toc;
2502 }
99a814a1 2503 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2504 {
2505 t = must_be_32;
2506 }
99a814a1 2507 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2508 {
2509 t = must_be_64;
2510 }
2511 else
2512 {
2513 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2514 *input_line_pointer = c;
2515 input_line_pointer = start;
252b5132
RH		 2516 return 0;
2517 }
2518
99a814a1
AM		 2519 /* Now find the ']'. */
2520 *input_line_pointer = c;
252b5132 2521
d02603dc 2522 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
81d4177b 2523 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2524
2525 if (c != ']')
2526 {
2527 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2528 input_line_pointer = start;
252b5132
RH		 2529 return 0;
2530 }
2531
99a814a1 2532 *toc_kind = t;
252b5132
RH		 2533 return 1;
2534}
2535#endif
3b8b57a9 2536
3e60bf4d 2537#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2538/* See whether a symbol is in the TOC section. */
2539
2540static int
2541ppc_is_toc_sym (symbolS *sym)
2542{
3e60bf4d 2543#ifdef OBJ_XCOFF
9f6e76f4
TG		 2544 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2545 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2546#endif
3e60bf4d
AM		 2547#ifdef OBJ_ELF
2548 const char *sname = segment_name (S_GET_SEGMENT (sym));
2549 if (ppc_obj64)
2550 return strcmp (sname, ".toc") == 0;
2551 else
2552 return strcmp (sname, ".got") == 0;
2553#endif
2554}
2555#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2556\f
2557
dc1d03fc 2558#ifdef OBJ_ELF
6a0c61b7
EZ		 2559#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2560static void
98027b10 2561ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2562{
2563 unsigned int i;
2564
2565 /* Check we don't already exist. */
2566 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2567 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2568 return;
b34976b6 2569
6a0c61b7
EZ		 2570 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2571 {
2572 if (ppc_apuinfo_num_alloc == 0)
2573 {
2574 ppc_apuinfo_num_alloc = 4;
2575 ppc_apuinfo_list = (unsigned long *)
2576 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2577 }
2578 else
2579 {
2580 ppc_apuinfo_num_alloc += 4;
2581 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2582 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2583 }
2584 }
dc1d03fc 2585 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2586}
2587#undef APUID
dc1d03fc 2588#endif
6a0c61b7
EZ		 2589\f
2590
252b5132
RH		 2591/* We need to keep a list of fixups. We can't simply generate them as
2592 we go, because that would require us to first create the frag, and
2593 that would screw up references to ``.''. */
2594
2595struct ppc_fixup
2596{
2597 expressionS exp;
2598 int opindex;
2599 bfd_reloc_code_real_type reloc;
2600};
2601
2602#define MAX_INSN_FIXUPS (5)
2603
b9c361e0
JL		 2604/* Form I16L. */
2605#define E_OR2I_INSN 0x7000C000
2606#define E_AND2I_DOT_INSN 0x7000C800
2607#define E_OR2IS_INSN 0x7000D000
2608#define E_LIS_INSN 0x7000E000
2609#define E_AND2IS_DOT_INSN 0x7000E800
2610
2611/* Form I16A. */
2612#define E_ADD2I_DOT_INSN 0x70008800
2613#define E_ADD2IS_INSN 0x70009000
2614#define E_CMP16I_INSN 0x70009800
2615#define E_MULL2I_INSN 0x7000A000
2616#define E_CMPL16I_INSN 0x7000A800
2617#define E_CMPH16I_INSN 0x7000B000
2618#define E_CMPHL16I_INSN 0x7000B800
2619
252b5132
RH		 2620/* This routine is called for each instruction to be assembled. */
2621
2622void
98027b10 2623md_assemble (char *str)
252b5132
RH		 2624{
2625 char *s;
2626 const struct powerpc_opcode *opcode;
2627 unsigned long insn;
2628 const unsigned char *opindex_ptr;
2629 int skip_optional;
2630 int need_paren;
2631 int next_opindex;
2632 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2633 int fc;
2634 char *f;
09b935ac 2635 int addr_mod;
252b5132 2636 int i;
b9c361e0 2637 unsigned int insn_length;
252b5132
RH		 2638
2639 /* Get the opcode. */
3882b010 2640 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2641 ;
2642 if (*s != '\0')
2643 *s++ = '\0';
2644
2645 /* Look up the opcode in the hash table. */
2646 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2647 if (opcode == (const struct powerpc_opcode *) NULL)
2648 {
2649 const struct powerpc_macro *macro;
2650
2651 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2652 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2653 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2654 else
2655 ppc_macro (s, macro);
2656
2657 return;
2658 }
2659
2660 insn = opcode->opcode;
2661
2662 str = s;
3882b010 2663 while (ISSPACE (*str))
252b5132
RH		 2664 ++str;
2665
2666 /* PowerPC operands are just expressions. The only real issue is
2667 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2668 an optional operand separate the operands only with commas (in some
2669 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2670 have optional operands). Most instructions with optional operands
2671 have only one. Those that have more than one optional operand can
2672 take either all their operands or none. So, before we start seriously
2673 parsing the operands, we check to see if we have optional operands,
2674 and if we do, we count the number of commas to see which operands
2675 have been omitted. */
252b5132
RH		 2676 skip_optional = 0;
2677 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2678 {
2679 const struct powerpc_operand *operand;
2680
2681 operand = &powerpc_operands[*opindex_ptr];
2682 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2683 {
2684 unsigned int opcount;
7fe9cf6b 2685 unsigned int num_operands_expected;
252b5132
RH		 2686
2687 /* There is an optional operand. Count the number of
2688 commas in the input line. */
2689 if (*str == '\0')
2690 opcount = 0;
2691 else
2692 {
2693 opcount = 1;
2694 s = str;
2695 while ((s = strchr (s, ',')) != (char *) NULL)
2696 {
2697 ++opcount;
2698 ++s;
2699 }
2700 }
2701
7fe9cf6b
NC		 2702 /* Compute the number of expected operands.
2703 Do not count fake operands. */
2704 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2705 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2706 ++ num_operands_expected;
2707
252b5132
RH		 2708 /* If there are fewer operands in the line then are called
2709 for by the instruction, we want to skip the optional
1f6c9eb0 2710 operands. */
7fe9cf6b 2711 if (opcount < num_operands_expected)
252b5132
RH		 2712 skip_optional = 1;
2713
2714 break;
2715 }
2716 }
2717
2718 /* Gather the operands. */
2719 need_paren = 0;
2720 next_opindex = 0;
2721 fc = 0;
2722 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2723 {
2724 const struct powerpc_operand *operand;
2725 const char *errmsg;
2726 char *hold;
2727 expressionS ex;
2728 char endc;
2729
2730 if (next_opindex == 0)
2731 operand = &powerpc_operands[*opindex_ptr];
2732 else
2733 {
2734 operand = &powerpc_operands[next_opindex];
2735 next_opindex = 0;
2736 }
252b5132
RH		 2737 errmsg = NULL;
2738
2739 /* If this is a fake operand, then we do not expect anything
2740 from the input. */
2741 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2742 {
2b3c4602 2743 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2744 if (errmsg != (const char *) NULL)
ee2c9aa9 2745 as_bad ("%s", errmsg);
252b5132
RH		 2746 continue;
2747 }
2748
2749 /* If this is an optional operand, and we are skipping it, just
2750 insert a zero. */
2751 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2752 && skip_optional)
2753 {
11a0cf2e 2754 long val = ppc_optional_operand_value (operand);
252b5132
RH		 2755 if (operand->insert)
2756 {
11a0cf2e 2757 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
252b5132 2758 if (errmsg != (const char *) NULL)
ee2c9aa9 2759 as_bad ("%s", errmsg);
252b5132 2760 }
11a0cf2e
PB		 2761 else if (operand->shift >= 0)
2762 insn |= ((long) val & operand->bitm) << operand->shift;
2763 else
2764 insn |= ((long) val & operand->bitm) >> -operand->shift;
2765
252b5132
RH		 2766 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2767 next_opindex = *opindex_ptr + 1;
2768 continue;
2769 }
2770
2771 /* Gather the operand. */
2772 hold = input_line_pointer;
2773 input_line_pointer = str;
2774
2775#ifdef TE_PE
81d4177b 2776 if (*input_line_pointer == '[')
252b5132
RH		 2777 {
2778 /* We are expecting something like the second argument here:
99a814a1
AM		 2779 *
2780 * lwz r4,[toc].GS.0.static_int(rtoc)
2781 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2782 * The argument following the `]' must be a symbol name, and the
2783 * register must be the toc register: 'rtoc' or '2'
2784 *
2785 * The effect is to 0 as the displacement field
2786 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2787 * the appropriate variation) reloc against it based on the symbol.
2788 * The linker will build the toc, and insert the resolved toc offset.
2789 *
2790 * Note:
2791 * o The size of the toc entry is currently assumed to be
2792 * 32 bits. This should not be assumed to be a hard coded
2793 * number.
2794 * o In an effort to cope with a change from 32 to 64 bits,
2795 * there are also toc entries that are specified to be
2796 * either 32 or 64 bits:
2797 * lwz r4,[toc32].GS.0.static_int(rtoc)
2798 * lwz r4,[toc64].GS.0.static_int(rtoc)
2799 * These demand toc entries of the specified size, and the
2800 * instruction probably requires it.
2801 */
252b5132
RH		 2802
2803 int valid_toc;
2804 enum toc_size_qualifier toc_kind;
2805 bfd_reloc_code_real_type toc_reloc;
2806
99a814a1
AM		 2807 /* Go parse off the [tocXX] part. */
2808 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2809
81d4177b 2810 if (!valid_toc)
252b5132 2811 {
a5840dce
AM		 2812 ignore_rest_of_line ();
2813 break;
252b5132
RH		 2814 }
2815
99a814a1
AM		 2816 /* Now get the symbol following the ']'. */
2817 expression (&ex);
252b5132
RH		 2818
2819 switch (toc_kind)
2820 {
2821 case default_toc:
99a814a1
AM		 2822 /* In this case, we may not have seen the symbol yet,
2823 since it is allowed to appear on a .extern or .globl
2824 or just be a label in the .data section. */
252b5132
RH		 2825 toc_reloc = BFD_RELOC_PPC_TOC16;
2826 break;
2827 case data_in_toc:
99a814a1
AM		 2828 /* 1. The symbol must be defined and either in the toc
2829 section, or a global.
2830 2. The reloc generated must have the TOCDEFN flag set
2831 in upper bit mess of the reloc type.
2832 FIXME: It's a little confusing what the tocv
2833 qualifier can be used for. At the very least, I've
2834 seen three uses, only one of which I'm sure I can
2835 explain. */
81d4177b
KH		 2836 if (ex.X_op == O_symbol)
2837 {
9c2799c2 2838 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2839 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2840 != tocdata_section)
252b5132 2841 {
99a814a1 2842 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2843 }
2844 }
2845
2846 toc_reloc = BFD_RELOC_PPC_TOC16;
2847 break;
2848 case must_be_32:
99a814a1
AM		 2849 /* FIXME: these next two specifically specify 32/64 bit
2850 toc entries. We don't support them today. Is this
2851 the right way to say that? */
62ebcb5c 2852 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2853 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2854 break;
2855 case must_be_64:
99a814a1 2856 /* FIXME: see above. */
62ebcb5c 2857 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2858 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2859 break;
2860 default:
bc805888 2861 fprintf (stderr,
99a814a1
AM		 2862 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2863 toc_kind);
bc805888 2864 abort ();
252b5132
RH		 2865 break;
2866 }
2867
2868 /* We need to generate a fixup for this expression. */
2869 if (fc >= MAX_INSN_FIXUPS)
2870 as_fatal (_("too many fixups"));
2871
2872 fixups[fc].reloc = toc_reloc;
2873 fixups[fc].exp = ex;
2874 fixups[fc].opindex = *opindex_ptr;
2875 ++fc;
2876
99a814a1
AM		 2877 /* Ok. We've set up the fixup for the instruction. Now make it
2878 look like the constant 0 was found here. */
252b5132
RH		 2879 ex.X_unsigned = 1;
2880 ex.X_op = O_constant;
2881 ex.X_add_number = 0;
2882 ex.X_add_symbol = NULL;
2883 ex.X_op_symbol = NULL;
2884 }
2885
2886 else
2887#endif /* TE_PE */
2888 {
b9c361e0
JL		 2889 if ((reg_names_p
2890 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2891 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2892 || !register_name (&ex))
252b5132 2893 {
13abbae3
AM		 2894 char save_lex = lex_type['%'];
2895
b9c361e0
JL		 2896 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2897 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2898 {
2899 cr_operand = TRUE;
2900 lex_type['%'] |= LEX_BEGIN_NAME;
2901 }
252b5132 2902 expression (&ex);
b34976b6 2903 cr_operand = FALSE;
13abbae3 2904 lex_type['%'] = save_lex;
252b5132
RH		 2905 }
2906 }
2907
2908 str = input_line_pointer;
2909 input_line_pointer = hold;
2910
2911 if (ex.X_op == O_illegal)
2912 as_bad (_("illegal operand"));
2913 else if (ex.X_op == O_absent)
2914 as_bad (_("missing operand"));
2915 else if (ex.X_op == O_register)
2916 {
2917 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2918 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2919 }
2920 else if (ex.X_op == O_constant)
2921 {
2922#ifdef OBJ_ELF
81d4177b 2923 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2924 bfd_reloc_code_real_type reloc;
252b5132
RH		 2925 char *orig_str = str;
2926
62ebcb5c 2927 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2928 switch (reloc)
2929 {
2930 default:
2931 str = orig_str;
2932 break;
2933
2934 case BFD_RELOC_LO16:
f9c6b907
AM		 2935 ex.X_add_number &= 0xffff;
2936 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2937 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2938 break;
2939
2940 case BFD_RELOC_HI16:
f9c6b907
AM		 2941 if (REPORT_OVERFLOW_HI && ppc_obj64)
2942 {
2943 /* PowerPC64 @h is tested for overflow. */
2944 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2945 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2946 {
2947 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2948 ex.X_add_number
2949 = ((addressT) ex.X_add_number ^ sign) - sign;
2950 }
2951 break;
2952 }
2953 /* Fall thru */
2954
2955 case BFD_RELOC_PPC64_ADDR16_HIGH:
2956 ex.X_add_number = PPC_HI (ex.X_add_number);
2957 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2958 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2959 break;
2960
2961 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2962 if (REPORT_OVERFLOW_HI && ppc_obj64)
2963 {
2964 /* PowerPC64 @ha is tested for overflow. */
2965 ex.X_add_number
2966 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2967 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2968 {
2969 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2970 ex.X_add_number
2971 = ((addressT) ex.X_add_number ^ sign) - sign;
2972 }
2973 break;
2974 }
2975 /* Fall thru */
2976
2977 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2978 ex.X_add_number = PPC_HA (ex.X_add_number);
2979 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2980 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2981 break;
2982
0baf16f2 2983 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2984 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2985 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2986 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2987 break;
2988
2989 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2990 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2991 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2992 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2993 break;
0baf16f2
AM		 2994
2995 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2996 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2997 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2998 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2999 break;
3000
3001 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 3002 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3003 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3004 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3005 break;
252b5132 3006 }
0baf16f2 3007#endif /* OBJ_ELF */
252b5132 3008 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3009 ppc_cpu, (char *) NULL, 0);
252b5132 3010 }
727fc41e 3011 else
252b5132 3012 {
62ebcb5c 3013 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3014#ifdef OBJ_ELF
727fc41e 3015 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3016 {
727fc41e
AM		 3017 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3018 if (sym_name[0] == '.')
3019 ++sym_name;
cdba85ec 3020
727fc41e 3021 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3022 {
727fc41e
AM		 3023 expressionS tls_exp;
3024
3025 hold = input_line_pointer;
3026 input_line_pointer = str + 1;
3027 expression (&tls_exp);
3028 if (tls_exp.X_op == O_symbol)
3029 {
62ebcb5c 3030 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3031 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3032 {
3033 reloc = BFD_RELOC_PPC_TLSGD;
3034 input_line_pointer += 7;
3035 }
3036 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3037 {
3038 reloc = BFD_RELOC_PPC_TLSLD;
3039 input_line_pointer += 7;
3040 }
62ebcb5c 3041 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3042 {
3043 SKIP_WHITESPACE ();
3044 str = input_line_pointer;
3045
3046 if (fc >= MAX_INSN_FIXUPS)
3047 as_fatal (_("too many fixups"));
3048 fixups[fc].exp = tls_exp;
3049 fixups[fc].opindex = *opindex_ptr;
3050 fixups[fc].reloc = reloc;
3051 ++fc;
3052 }
3053 }
3054 input_line_pointer = hold;
252b5132
RH		 3055 }
3056 }
3057
62ebcb5c 3058 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3059 {
727fc41e 3060 /* Some TLS tweaks. */
0baf16f2
AM		 3061 switch (reloc)
3062 {
727fc41e 3063 default:
cdba85ec 3064 break;
727fc41e
AM		 3065
3066 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3067 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3068 as_bad (_("@tls may not be used with \"%s\" operands"),
3069 opcode->name);
3070 else if (operand->shift != 11)
3071 as_bad (_("@tls may only be used in last operand"));
3072 else
3073 insn = ppc_insert_operand (insn, operand,
3074 ppc_obj64 ? 13 : 2,
3075 ppc_cpu, (char *) NULL, 0);
cdba85ec 3076 break;
727fc41e
AM		 3077
3078 /* We'll only use the 32 (or 64) bit form of these relocations
3079 in constants. Instructions get the 16 bit form. */
3080 case BFD_RELOC_PPC_DTPREL:
3081 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3082 break;
727fc41e
AM		 3083 case BFD_RELOC_PPC_TPREL:
3084 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3085 break;
3086 }
727fc41e 3087
b9c361e0
JL		 3088 /* If VLE-mode convert LO/HI/HA relocations. */
3089 if (opcode->flags & PPC_OPCODE_VLE)
3090 {
3091 int tmp_insn = insn & opcode->mask;
3739860c 3092
b9c361e0
JL		 3093 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3094 || tmp_insn == E_AND2I_DOT_INSN
3095 || tmp_insn == E_OR2IS_INSN
3096 || tmp_insn == E_LIS_INSN
3097 || tmp_insn == E_AND2IS_DOT_INSN);
3098
3099
3100 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3101 || tmp_insn == E_ADD2IS_INSN
3102 || tmp_insn == E_CMP16I_INSN
3103 || tmp_insn == E_MULL2I_INSN
3104 || tmp_insn == E_CMPL16I_INSN
3105 || tmp_insn == E_CMPH16I_INSN
3106 || tmp_insn == E_CMPHL16I_INSN);
3107
3108 switch (reloc)
3109 {
3110 default:
3111 break;
3112
3113 case BFD_RELOC_PPC_EMB_SDA21:
3114 reloc = BFD_RELOC_PPC_VLE_SDA21;
3115 break;
3116
3117 case BFD_RELOC_LO16:
3118 if (use_d_reloc)
3119 reloc = BFD_RELOC_PPC_VLE_LO16D;
3120 else if (use_a_reloc)
3121 reloc = BFD_RELOC_PPC_VLE_LO16A;
3122 break;
3123
3124 case BFD_RELOC_HI16:
3125 if (use_d_reloc)
3126 reloc = BFD_RELOC_PPC_VLE_HI16D;
3127 else if (use_a_reloc)
3128 reloc = BFD_RELOC_PPC_VLE_HI16A;
3129 break;
3739860c 3130
b9c361e0
JL		 3131 case BFD_RELOC_HI16_S:
3132 if (use_d_reloc)
3133 reloc = BFD_RELOC_PPC_VLE_HA16D;
3134 else if (use_a_reloc)
3135 reloc = BFD_RELOC_PPC_VLE_HA16A;
3136 break;
3137
3138 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3139 if (use_d_reloc)
3140 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3141 break;
3142
3143 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3144 if (use_d_reloc)
3145 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3146 break;
3147
3148 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3149 if (use_d_reloc)
3150 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3151 break;
3152 }
3153 }
0baf16f2 3154 }
3b8b57a9
AM		 3155#endif /* OBJ_ELF */
3156
62ebcb5c 3157 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3158 ;
3159 /* Determine a BFD reloc value based on the operand information.
3160 We are only prepared to turn a few of the operands into
3161 relocs. */
a0593ad9
AM		 3162 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3163 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3164 && operand->bitm == 0x3fffffc
3165 && operand->shift == 0)
3166 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3167 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3168 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3169 && operand->bitm == 0xfffc
3170 && operand->shift == 0)
3171 reloc = BFD_RELOC_PPC_B16;
3172 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3173 && operand->bitm == 0x1fe
3174 && operand->shift == -1)
3175 reloc = BFD_RELOC_PPC_VLE_REL8;
3176 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3177 && operand->bitm == 0xfffe
3178 && operand->shift == 0)
3179 reloc = BFD_RELOC_PPC_VLE_REL15;
3180 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3181 && operand->bitm == 0x1fffffe
3182 && operand->shift == 0)
3183 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3184 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3185 && (operand->bitm & 0xfff0) == 0xfff0
3186 && operand->shift == 0)
3187 {
f50c47f1 3188 reloc = BFD_RELOC_16;
3e60bf4d 3189#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3190 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3191 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3192 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3193 {
3194 reloc = BFD_RELOC_PPC_TOC16;
3195#ifdef OBJ_ELF
3196 as_warn (_("assuming %s on symbol"),
3197 ppc_obj64 ? "@toc" : "@xgot");
3198#endif
3199 }
3b8b57a9 3200#endif
3b8b57a9 3201 }
a0593ad9
AM		 3202
3203 /* For the absolute forms of branches, convert the PC
3204 relative form back into the absolute. */
3205 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3206 {
3207 switch (reloc)
3208 {
3209 case BFD_RELOC_PPC_B26:
3210 reloc = BFD_RELOC_PPC_BA26;
3211 break;
3212 case BFD_RELOC_PPC_B16:
3213 reloc = BFD_RELOC_PPC_BA16;
3214 break;
3215#ifdef OBJ_ELF
3216 case BFD_RELOC_PPC_B16_BRTAKEN:
3217 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3218 break;
3219 case BFD_RELOC_PPC_B16_BRNTAKEN:
3220 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3221 break;
3222#endif
3223 default:
3224 break;
3225 }
3226 }
3227
3228#ifdef OBJ_ELF
3229 switch (reloc)
3230 {
3231 case BFD_RELOC_PPC_TOC16:
3232 toc_reloc_types |= has_small_toc_reloc;
3233 break;
3234 case BFD_RELOC_PPC64_TOC16_LO:
3235 case BFD_RELOC_PPC64_TOC16_HI:
3236 case BFD_RELOC_PPC64_TOC16_HA:
3237 toc_reloc_types |= has_large_toc_reloc;
3238 break;
3239 default:
3240 break;
3241 }
3242
3243 if (ppc_obj64
3244 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3245 {
3246 switch (reloc)
3247 {
3248 case BFD_RELOC_16:
3249 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3250 break;
3251 case BFD_RELOC_LO16:
3252 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3253 break;
3254 case BFD_RELOC_16_GOTOFF:
3255 reloc = BFD_RELOC_PPC64_GOT16_DS;
3256 break;
3257 case BFD_RELOC_LO16_GOTOFF:
3258 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3259 break;
3260 case BFD_RELOC_LO16_PLTOFF:
3261 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3262 break;
3263 case BFD_RELOC_16_BASEREL:
3264 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3265 break;
3266 case BFD_RELOC_LO16_BASEREL:
3267 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3268 break;
3269 case BFD_RELOC_PPC_TOC16:
3270 reloc = BFD_RELOC_PPC64_TOC16_DS;
3271 break;
3272 case BFD_RELOC_PPC64_TOC16_LO:
3273 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3274 break;
3275 case BFD_RELOC_PPC64_PLTGOT16:
3276 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3277 break;
3278 case BFD_RELOC_PPC64_PLTGOT16_LO:
3279 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3280 break;
3281 case BFD_RELOC_PPC_DTPREL16:
3282 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3283 break;
3284 case BFD_RELOC_PPC_DTPREL16_LO:
3285 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3286 break;
3287 case BFD_RELOC_PPC_TPREL16:
3288 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3289 break;
3290 case BFD_RELOC_PPC_TPREL16_LO:
3291 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3292 break;
3293 case BFD_RELOC_PPC_GOT_DTPREL16:
3294 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3295 case BFD_RELOC_PPC_GOT_TPREL16:
3296 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3297 break;
3298 default:
3299 as_bad (_("unsupported relocation for DS offset field"));
3300 break;
3301 }
3302 }
3303#endif
0baf16f2 3304
252b5132
RH		 3305 /* We need to generate a fixup for this expression. */
3306 if (fc >= MAX_INSN_FIXUPS)
3307 as_fatal (_("too many fixups"));
3308 fixups[fc].exp = ex;
727fc41e 3309 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3310 fixups[fc].reloc = reloc;
3311 ++fc;
3312 }
252b5132
RH		 3313
3314 if (need_paren)
3315 {
3316 endc = ')';
3317 need_paren = 0;
c3d65c1c
BE		 3318 /* If expecting more operands, then we want to see "),". */
3319 if (*str == endc && opindex_ptr[1] != 0)
3320 {
3321 do
3322 ++str;
3323 while (ISSPACE (*str));
3324 endc = ',';
3325 }
252b5132
RH		 3326 }
3327 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3328 {
3329 endc = '(';
3330 need_paren = 1;
3331 }
3332 else
3333 endc = ',';
3334
3335 /* The call to expression should have advanced str past any
3336 whitespace. */
3337 if (*str != endc
3338 && (endc != ',' || *str != '\0'))
3339 {
5a938047
AM		 3340 if (*str == '\0')
3341 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3342 else
3343 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3344 break;
3345 }
3346
3347 if (*str != '\0')
3348 ++str;
3349 }
3350
3882b010 3351 while (ISSPACE (*str))
252b5132
RH		 3352 ++str;
3353
3354 if (*str != '\0')
3355 as_bad (_("junk at end of line: `%s'"), str);
3356
dc1d03fc 3357#ifdef OBJ_ELF
b9c361e0 3358 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3359 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3360 && !ppc_obj64)
6a0c61b7
EZ		 3361 {
3362 /* These are all version "1". */
3363 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3364 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3365 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3366 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3367 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3368 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3369 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3370 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3371 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3372 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3373 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3374 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3375 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3376 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
fbd94057
MR		 3377 /* Only set the VLE flag if the instruction has been pulled via
3378 the VLE instruction set. This way the flag is guaranteed to
3379 be set for VLE-only instructions or for VLE-only processors,
3380 however it'll remain clear for dual-mode instructions on
3381 dual-mode and, more importantly, standard-mode processors. */
3382 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
b9c361e0 3383 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3384 }
dc1d03fc 3385#endif
6a0c61b7 3386
252b5132 3387 /* Write out the instruction. */
b9c361e0
JL		 3388 /* Differentiate between two and four byte insns. */
3389 if (ppc_mach () == bfd_mach_ppc_vle)
3390 {
3391 if (PPC_OP_SE_VLE (insn))
3392 insn_length = 2;
3393 else
3394 insn_length = 4;
3395 addr_mod = frag_now_fix () & 1;
3396 }
3397 else
3398 {
3399 insn_length = 4;
3400 addr_mod = frag_now_fix () & 3;
3401 }
3402 /* All instructions can start on a 2 byte boundary for VLE. */
3403 f = frag_more (insn_length);
09b935ac 3404 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3405 {
3406 if (ppc_mach() == bfd_mach_ppc_vle)
3407 as_bad (_("instruction address is not a multiple of 2"));
3408 else
3409 as_bad (_("instruction address is not a multiple of 4"));
3410 }
09b935ac
AM		 3411 frag_now->insn_addr = addr_mod;
3412 frag_now->has_code = 1;
b9c361e0 3413 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3414 last_insn = insn;
3415 last_seg = now_seg;
3416 last_subseg = now_subseg;
252b5132 3417
5d6f4f16 3418#ifdef OBJ_ELF
b9c361e0 3419 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3420#endif
3421
3b8b57a9 3422 /* Create any fixups. */
252b5132
RH		 3423 for (i = 0; i < fc; i++)
3424 {
3b8b57a9 3425 fixS *fixP;
62ebcb5c 3426 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3427 {
99a814a1 3428 reloc_howto_type *reloc_howto;
252b5132
RH		 3429 int size;
3430 int offset;
252b5132 3431
99a814a1 3432 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3433 if (!reloc_howto)
3434 abort ();
3435
3436 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3437 offset = target_big_endian ? (insn_length - size) : 0;
252b5132 3438
99a814a1
AM		 3439 fixP = fix_new_exp (frag_now,
3440 f - frag_now->fr_literal + offset,
3441 size,
3442 &fixups[i].exp,
3443 reloc_howto->pc_relative,
252b5132 3444 fixups[i].reloc);
252b5132
RH		 3445 }
3446 else
727fc41e
AM		 3447 {
3448 const struct powerpc_operand *operand;
3449
3450 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3451 fixP = fix_new_exp (frag_now,
3452 f - frag_now->fr_literal,
3453 insn_length,
3454 &fixups[i].exp,
3455 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3456 BFD_RELOC_NONE);
727fc41e 3457 }
3b8b57a9 3458 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3459 }
3460}
3461
3462/* Handle a macro. Gather all the operands, transform them as
3463 described by the macro, and call md_assemble recursively. All the
3464 operands are separated by commas; we don't accept parentheses
3465 around operands here. */
3466
3467static void
98027b10 3468ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3469{
3470 char *operands[10];
3471 unsigned int count;
3472 char *s;
3473 unsigned int len;
3474 const char *format;
db557034 3475 unsigned int arg;
252b5132
RH		 3476 char *send;
3477 char *complete;
3478
3479 /* Gather the users operands into the operands array. */
3480 count = 0;
3481 s = str;
3482 while (1)
3483 {
3484 if (count >= sizeof operands / sizeof operands[0])
3485 break;
3486 operands[count++] = s;
3487 s = strchr (s, ',');
3488 if (s == (char *) NULL)
3489 break;
3490 *s++ = '\0';
81d4177b 3491 }
252b5132
RH		 3492
3493 if (count != macro->operands)
3494 {
3495 as_bad (_("wrong number of operands"));
3496 return;
3497 }
3498
3499 /* Work out how large the string must be (the size is unbounded
3500 because it includes user input). */
3501 len = 0;
3502 format = macro->format;
3503 while (*format != '\0')
3504 {
3505 if (*format != '%')
3506 {
3507 ++len;
3508 ++format;
3509 }
3510 else
3511 {
3512 arg = strtol (format + 1, &send, 10);
db557034 3513 know (send != format && arg < count);
252b5132
RH		 3514 len += strlen (operands[arg]);
3515 format = send;
3516 }
3517 }
3518
3519 /* Put the string together. */
3520 complete = s = (char *) alloca (len + 1);
3521 format = macro->format;
3522 while (*format != '\0')
3523 {
3524 if (*format != '%')
3525 *s++ = *format++;
3526 else
3527 {
3528 arg = strtol (format + 1, &send, 10);
3529 strcpy (s, operands[arg]);
3530 s += strlen (s);
3531 format = send;
3532 }
3533 }
3534 *s = '\0';
3535
3536 /* Assemble the constructed instruction. */
3537 md_assemble (complete);
81d4177b 3538}
252b5132
RH		 3539\f
3540#ifdef OBJ_ELF
18ae9cc1 3541/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3542
3543int
98027b10 3544ppc_section_type (char *str, size_t len)
252b5132 3545{
9de8d8f1
RH		 3546 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3547 return SHT_ORDERED;
252b5132 3548
9de8d8f1 3549 return -1;
252b5132
RH		 3550}
3551
3552int
1239de13 3553ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3554{
3555 if (type == SHT_ORDERED)
3556 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3557
252b5132
RH		 3558 return flags;
3559}
3560#endif /* OBJ_ELF */
3561
3562\f
3563/* Pseudo-op handling. */
3564
3565/* The .byte pseudo-op. This is similar to the normal .byte
3566 pseudo-op, but it can also take a single ASCII string. */
3567
3568static void
98027b10 3569ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3570{
bf7279d5
AM		 3571 int count = 0;
3572
252b5132
RH		 3573 if (*input_line_pointer != '\"')
3574 {
3575 cons (1);
3576 return;
3577 }
3578
3579 /* Gather characters. A real double quote is doubled. Unusual
3580 characters are not permitted. */
3581 ++input_line_pointer;
3582 while (1)
3583 {
3584 char c;
3585
3586 c = *input_line_pointer++;
3587
3588 if (c == '\"')
3589 {
3590 if (*input_line_pointer != '\"')
3591 break;
3592 ++input_line_pointer;
3593 }
3594
3595 FRAG_APPEND_1_CHAR (c);
bf7279d5 3596 ++count;
252b5132
RH		 3597 }
3598
bf7279d5
AM		 3599 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3600 as_warn (_("data in executable section"));
252b5132
RH		 3601 demand_empty_rest_of_line ();
3602}
3603\f
3604#ifdef OBJ_XCOFF
3605
3606/* XCOFF specific pseudo-op handling. */
3607
3608/* This is set if we are creating a .stabx symbol, since we don't want
3609 to handle symbol suffixes for such symbols. */
b34976b6 3610static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3611
3612/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3613 symbols in the .bss segment as though they were local common
67c1ffbe 3614 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3615 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3616
3617static void
98027b10 3618ppc_comm (int lcomm)
252b5132
RH		 3619{
3620 asection *current_seg = now_seg;
3621 subsegT current_subseg = now_subseg;
3622 char *name;
3623 char endc;
3624 char *end_name;
3625 offsetT size;
3626 offsetT align;
3627 symbolS *lcomm_sym = NULL;
3628 symbolS *sym;
3629 char *pfrag;
3630
d02603dc 3631 endc = get_symbol_name (&name);
252b5132 3632 end_name = input_line_pointer;
d02603dc 3633 (void) restore_line_pointer (endc);
252b5132
RH		 3634
3635 if (*input_line_pointer != ',')
3636 {
3637 as_bad (_("missing size"));
3638 ignore_rest_of_line ();
3639 return;
3640 }
3641 ++input_line_pointer;
3642
3643 size = get_absolute_expression ();
3644 if (size < 0)
3645 {
3646 as_bad (_("negative size"));
3647 ignore_rest_of_line ();
3648 return;
3649 }
3650
3651 if (! lcomm)
3652 {
3653 /* The third argument to .comm is the alignment. */
3654 if (*input_line_pointer != ',')
1ad63b2f 3655 align = 2;
252b5132
RH		 3656 else
3657 {
3658 ++input_line_pointer;
3659 align = get_absolute_expression ();
3660 if (align <= 0)
3661 {
3662 as_warn (_("ignoring bad alignment"));
1ad63b2f 3663 align = 2;
252b5132
RH		 3664 }
3665 }
3666 }
3667 else
3668 {
3669 char *lcomm_name;
3670 char lcomm_endc;
3671
252b5132
RH		 3672 /* The third argument to .lcomm appears to be the real local
3673 common symbol to create. References to the symbol named in
3674 the first argument are turned into references to the third
3675 argument. */
3676 if (*input_line_pointer != ',')
3677 {
3678 as_bad (_("missing real symbol name"));
3679 ignore_rest_of_line ();
3680 return;
3681 }
3682 ++input_line_pointer;
3683
d02603dc 3684 lcomm_endc = get_symbol_name (&lcomm_name);
81d4177b 3685
252b5132
RH		 3686 lcomm_sym = symbol_find_or_make (lcomm_name);
3687
d02603dc 3688 (void) restore_line_pointer (lcomm_endc);
3c02c47f
DE		 3689
3690 /* The fourth argument to .lcomm is the alignment. */
3691 if (*input_line_pointer != ',')
3692 {
3693 if (size <= 4)
3694 align = 2;
3695 else
3696 align = 3;
3697 }
3698 else
3699 {
3700 ++input_line_pointer;
3701 align = get_absolute_expression ();
3702 if (align <= 0)
3703 {
3704 as_warn (_("ignoring bad alignment"));
3705 align = 2;
3706 }
3707 }
252b5132
RH		 3708 }
3709
3710 *end_name = '\0';
3711 sym = symbol_find_or_make (name);
3712 *end_name = endc;
3713
3714 if (S_IS_DEFINED (sym)
3715 || S_GET_VALUE (sym) != 0)
3716 {
3717 as_bad (_("attempt to redefine symbol"));
3718 ignore_rest_of_line ();
3719 return;
3720 }
81d4177b 3721
252b5132 3722 record_alignment (bss_section, align);
81d4177b 3723
252b5132
RH		 3724 if (! lcomm
3725 || ! S_IS_DEFINED (lcomm_sym))
3726 {
3727 symbolS *def_sym;
3728 offsetT def_size;
3729
3730 if (! lcomm)
3731 {
3732 def_sym = sym;
3733 def_size = size;
3734 S_SET_EXTERNAL (sym);
3735 }
3736 else
3737 {
809ffe0d 3738 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3739 def_sym = lcomm_sym;
3740 def_size = 0;
3741 }
3742
3743 subseg_set (bss_section, 1);
3744 frag_align (align, 0, 0);
81d4177b 3745
809ffe0d 3746 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3747 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3748 def_size, (char *) NULL);
3749 *pfrag = 0;
3750 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3751 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3752 }
3753 else if (lcomm)
3754 {
3755 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3756 symbol_get_frag (lcomm_sym)->fr_offset =
3757 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3758 &~ ((1 << align) - 1));
809ffe0d
ILT		 3759 if (align > symbol_get_tc (lcomm_sym)->align)
3760 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3761 }
3762
3763 if (lcomm)
3764 {
3765 /* Make sym an offset from lcomm_sym. */
3766 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3767 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3768 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3769 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3770 }
3771
3772 subseg_set (current_seg, current_subseg);
3773
3774 demand_empty_rest_of_line ();
3775}
3776
3777/* The .csect pseudo-op. This switches us into a different
3778 subsegment. The first argument is a symbol whose value is the
3779 start of the .csect. In COFF, csect symbols get special aux
3780 entries defined by the x_csect field of union internal_auxent. The
3781 optional second argument is the alignment (the default is 2). */
3782
3783static void
98027b10 3784ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3785{
3786 char *name;
3787 char endc;
3788 symbolS *sym;
931e13a6 3789 offsetT align;
252b5132 3790
d02603dc 3791 endc = get_symbol_name (&name);
81d4177b 3792
252b5132
RH		 3793 sym = symbol_find_or_make (name);
3794
d02603dc 3795 (void) restore_line_pointer (endc);
252b5132
RH		 3796
3797 if (S_GET_NAME (sym)[0] == '\0')
3798 {
3799 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3800 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3801 }
3802
931e13a6 3803 align = 2;
252b5132
RH		 3804 if (*input_line_pointer == ',')
3805 {
3806 ++input_line_pointer;
931e13a6 3807 align = get_absolute_expression ();
252b5132
RH		 3808 }
3809
931e13a6
AM		 3810 ppc_change_csect (sym, align);
3811
252b5132
RH		 3812 demand_empty_rest_of_line ();
3813}
3814
3815/* Change to a different csect. */
3816
3817static void
98027b10 3818ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3819{
3820 if (S_IS_DEFINED (sym))
809ffe0d 3821 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3822 else
3823 {
3824 symbolS **list_ptr;
3825 int after_toc;
3826 int hold_chunksize;
3827 symbolS *list;
931e13a6
AM		 3828 int is_code;
3829 segT sec;
252b5132
RH		 3830
3831 /* This is a new csect. We need to look at the symbol class to
3832 figure out whether it should go in the text section or the
3833 data section. */
3834 after_toc = 0;
931e13a6 3835 is_code = 0;
96d56e9f 3836 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3837 {
3838 case XMC_PR:
3839 case XMC_RO:
3840 case XMC_DB:
3841 case XMC_GL:
3842 case XMC_XO:
3843 case XMC_SV:
3844 case XMC_TI:
3845 case XMC_TB:
3846 S_SET_SEGMENT (sym, text_section);
809ffe0d 3847 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3848 ++ppc_text_subsegment;
3849 list_ptr = &ppc_text_csects;
931e13a6 3850 is_code = 1;
252b5132
RH		 3851 break;
3852 case XMC_RW:
3853 case XMC_TC0:
3854 case XMC_TC:
3855 case XMC_DS:
3856 case XMC_UA:
3857 case XMC_BS:
3858 case XMC_UC:
3859 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3860 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3861 == ppc_data_subsegment))
252b5132
RH		 3862 after_toc = 1;
3863 S_SET_SEGMENT (sym, data_section);
809ffe0d 3864 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3865 ++ppc_data_subsegment;
3866 list_ptr = &ppc_data_csects;
3867 break;
3868 default:
3869 abort ();
3870 }
3871
3872 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3873 changing subsegments, so that we don't use a lot of memory
3874 space for what may be a small section. */
252b5132
RH		 3875 hold_chunksize = chunksize;
3876 chunksize = 64;
3877
931e13a6
AM		 3878 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3879 symbol_get_tc (sym)->subseg);
252b5132
RH		 3880
3881 chunksize = hold_chunksize;
3882
3883 if (after_toc)
3884 ppc_after_toc_frag = frag_now;
3885
931e13a6
AM		 3886 record_alignment (sec, align);
3887 if (is_code)
3888 frag_align_code (align, 0);
3889 else
3890 frag_align (align, 0, 0);
3891
809ffe0d 3892 symbol_set_frag (sym, frag_now);
252b5132
RH		 3893 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3894
931e13a6 3895 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3896 symbol_get_tc (sym)->output = 1;
3897 symbol_get_tc (sym)->within = sym;
81d4177b 3898
252b5132 3899 for (list = *list_ptr;
809ffe0d
ILT		 3900 symbol_get_tc (list)->next != (symbolS *) NULL;
3901 list = symbol_get_tc (list)->next)
252b5132 3902 ;
809ffe0d 3903 symbol_get_tc (list)->next = sym;
81d4177b 3904
252b5132 3905 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3906 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3907 &symbol_lastP);
252b5132
RH		 3908 }
3909
3910 ppc_current_csect = sym;
3911}
3912
85645aed
TG		 3913static void
3914ppc_change_debug_section (unsigned int idx, subsegT subseg)
3915{
3916 segT sec;
3917 flagword oldflags;
3918 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3919
3920 sec = subseg_new (dw->name, subseg);
3921 oldflags = bfd_get_section_flags (stdoutput, sec);
3922 if (oldflags == SEC_NO_FLAGS)
3923 {
3924 /* Just created section. */
3925 gas_assert (dw_sections[idx].sect == NULL);
3926
3927 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3928 bfd_set_section_alignment (stdoutput, sec, 0);
3929 dw_sections[idx].sect = sec;
3930 }
3931
3932 /* Not anymore in a csect. */
3933 ppc_current_csect = NULL;
3934}
3935
3936/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3937 .dwsect flag [, opt-label ]
3938*/
3939
3940static void
3941ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3942{
3943 offsetT flag;
3944 symbolS *opt_label;
3945 const struct xcoff_dwsect_name *dw;
3946 struct dw_subsection *subseg;
3947 struct dw_section *dws;
3948 int i;
3949
3950 /* Find section. */
3951 flag = get_absolute_expression ();
3952 dw = NULL;
3953 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3954 if (xcoff_dwsect_names[i].flag == flag)
3955 {
3956 dw = &xcoff_dwsect_names[i];
3957 break;
3958 }
3959
3960 /* Parse opt-label. */
3961 if (*input_line_pointer == ',')
3962 {
d02603dc 3963 char *label;
85645aed
TG		 3964 char c;
3965
3966 ++input_line_pointer;
3967
d02603dc 3968 c = get_symbol_name (&label);
85645aed 3969 opt_label = symbol_find_or_make (label);
d02603dc 3970 (void) restore_line_pointer (c);
85645aed
TG		 3971 }
3972 else
3973 opt_label = NULL;
3974
3975 demand_empty_rest_of_line ();
3976
3977 /* Return now in case of unknown subsection. */
3978 if (dw == NULL)
3979 {
d6ed37ed 3980 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3981 (unsigned)flag);
3982 return;
3983 }
3984
3985 /* Find the subsection. */
3986 dws = &dw_sections[i];
3987 subseg = NULL;
3988 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3989 {
3990 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3991 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3992 {
3993 as_bad (_("label %s was not defined in this dwarf section"),
3994 S_GET_NAME (opt_label));
3995 subseg = dws->anon_subseg;
3996 opt_label = NULL;
3997 }
3998 else
3999 subseg = symbol_get_tc (opt_label)->u.dw;
4000 }
4001
4002 if (subseg != NULL)
4003 {
4004 /* Switch to the subsection. */
4005 ppc_change_debug_section (i, subseg->subseg);
4006 }
4007 else
4008 {
4009 /* Create a new dw subsection. */
4010 subseg = (struct dw_subsection *)
4011 xmalloc (sizeof (struct dw_subsection));
4012
4013 if (opt_label == NULL)
4014 {
4015 /* The anonymous one. */
4016 subseg->subseg = 0;
4017 subseg->link = NULL;
4018 dws->anon_subseg = subseg;
4019 }
4020 else
4021 {
4022 /* A named one. */
4023 if (dws->list_subseg != NULL)
4024 subseg->subseg = dws->list_subseg->subseg + 1;
4025 else
4026 subseg->subseg = 1;
4027
4028 subseg->link = dws->list_subseg;
4029 dws->list_subseg = subseg;
4030 symbol_get_tc (opt_label)->u.dw = subseg;
4031 }
4032
4033 ppc_change_debug_section (i, subseg->subseg);
4034
4035 if (dw->def_size)
4036 {
4037 /* Add the length field. */
4038 expressionS *exp = &subseg->end_exp;
4039 int sz;
4040
4041 if (opt_label != NULL)
4042 symbol_set_value_now (opt_label);
4043
4044 /* Add the length field. Note that according to the AIX assembler
4045 manual, the size of the length field is 4 for powerpc32 but
4046 12 for powerpc64. */
4047 if (ppc_obj64)
4048 {
4049 /* Write the 64bit marker. */
4050 md_number_to_chars (frag_more (4), -1, 4);
4051 }
4052
4053 exp->X_op = O_subtract;
4054 exp->X_op_symbol = symbol_temp_new_now ();
4055 exp->X_add_symbol = symbol_temp_make ();
4056
4057 sz = ppc_obj64 ? 8 : 4;
4058 exp->X_add_number = -sz;
4059 emit_expr (exp, sz);
4060 }
4061 }
4062}
4063
252b5132
RH		 4064/* This function handles the .text and .data pseudo-ops. These
4065 pseudo-ops aren't really used by XCOFF; we implement them for the
4066 convenience of people who aren't used to XCOFF. */
4067
4068static void
98027b10 4069ppc_section (int type)
252b5132
RH		 4070{
4071 const char *name;
4072 symbolS *sym;
4073
4074 if (type == 't')
4075 name = ".text[PR]";
4076 else if (type == 'd')
4077 name = ".data[RW]";
4078 else
4079 abort ();
4080
4081 sym = symbol_find_or_make (name);
4082
931e13a6 4083 ppc_change_csect (sym, 2);
252b5132
RH		 4084
4085 demand_empty_rest_of_line ();
4086}
4087
4088/* This function handles the .section pseudo-op. This is mostly to
4089 give an error, since XCOFF only supports .text, .data and .bss, but
4090 we do permit the user to name the text or data section. */
4091
4092static void
98027b10 4093ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4094{
4095 char *user_name;
4096 const char *real_name;
4097 char c;
4098 symbolS *sym;
4099
d02603dc 4100 c = get_symbol_name (&user_name);
252b5132
RH		 4101
4102 if (strcmp (user_name, ".text") == 0)
4103 real_name = ".text[PR]";
4104 else if (strcmp (user_name, ".data") == 0)
4105 real_name = ".data[RW]";
4106 else
4107 {
d6ed37ed 4108 as_bad (_("the XCOFF file format does not support arbitrary sections"));
d02603dc 4109 (void) restore_line_pointer (c);
252b5132
RH		 4110 ignore_rest_of_line ();
4111 return;
4112 }
4113
d02603dc 4114 (void) restore_line_pointer (c);
252b5132
RH		 4115
4116 sym = symbol_find_or_make (real_name);
4117
931e13a6 4118 ppc_change_csect (sym, 2);
252b5132
RH		 4119
4120 demand_empty_rest_of_line ();
4121}
4122
4123/* The .extern pseudo-op. We create an undefined symbol. */
4124
4125static void
98027b10 4126ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4127{
4128 char *name;
4129 char endc;
4130
d02603dc 4131 endc = get_symbol_name (&name);
252b5132
RH		 4132
4133 (void) symbol_find_or_make (name);
4134
d02603dc 4135 (void) restore_line_pointer (endc);
252b5132
RH		 4136
4137 demand_empty_rest_of_line ();
4138}
4139
4140/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4141
4142static void
98027b10 4143ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4144{
4145 char *name;
4146 char endc;
4147 symbolS *sym;
4148
d02603dc 4149 endc = get_symbol_name (&name);
252b5132
RH		 4150
4151 sym = symbol_find_or_make (name);
4152
d02603dc 4153 (void) restore_line_pointer (endc);
252b5132 4154
809ffe0d 4155 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4156
4157 demand_empty_rest_of_line ();
4158}
4159
c865e45b
RS		 4160/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4161 relocations at the beginning of the current csect.
4162
4163 (In principle, there's no reason why the relocations _have_ to be at
4164 the beginning. Anywhere in the csect would do. However, inserting
4165 at the beginning is what the native assmebler does, and it helps to
4166 deal with cases where the .ref statements follow the section contents.)
4167
4168 ??? .refs don't work for empty .csects. However, the native assembler
4169 doesn't report an error in this case, and neither yet do we. */
4170
4171static void
4172ppc_ref (int ignore ATTRIBUTE_UNUSED)
4173{
4174 char *name;
4175 char c;
4176
4177 if (ppc_current_csect == NULL)
4178 {
4179 as_bad (_(".ref outside .csect"));
4180 ignore_rest_of_line ();
4181 return;
4182 }
4183
4184 do
4185 {
d02603dc 4186 c = get_symbol_name (&name);
c865e45b
RS		 4187
4188 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4189 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4190
4191 *input_line_pointer = c;
d02603dc 4192 SKIP_WHITESPACE_AFTER_NAME ();
c865e45b
RS		 4193 c = *input_line_pointer;
4194 if (c == ',')
4195 {
4196 input_line_pointer++;
4197 SKIP_WHITESPACE ();
4198 if (is_end_of_line[(unsigned char) *input_line_pointer])
4199 {
4200 as_bad (_("missing symbol name"));
4201 ignore_rest_of_line ();
4202 return;
4203 }
4204 }
4205 }
4206 while (c == ',');
4207
4208 demand_empty_rest_of_line ();
4209}
4210
252b5132
RH		 4211/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4212 although I don't know why it bothers. */
4213
4214static void
98027b10 4215ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4216{
4217 char *name;
4218 char endc;
4219 symbolS *sym;
4220 int len;
4221
d02603dc 4222 endc = get_symbol_name (&name);
252b5132
RH		 4223
4224 sym = symbol_find_or_make (name);
4225
d02603dc 4226 (void) restore_line_pointer (endc);
252b5132
RH		 4227
4228 if (*input_line_pointer != ',')
4229 {
4230 as_bad (_("missing rename string"));
4231 ignore_rest_of_line ();
4232 return;
4233 }
4234 ++input_line_pointer;
4235
809ffe0d 4236 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4237
4238 demand_empty_rest_of_line ();
4239}
4240
4241/* The .stabx pseudo-op. This is similar to a normal .stabs
4242 pseudo-op, but slightly different. A sample is
4243 .stabx "main:F-1",.main,142,0
4244 The first argument is the symbol name to create. The second is the
4245 value, and the third is the storage class. The fourth seems to be
4246 always zero, and I am assuming it is the type. */
4247
4248static void
98027b10 4249ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4250{
4251 char *name;
4252 int len;
4253 symbolS *sym;
4254 expressionS exp;
4255
4256 name = demand_copy_C_string (&len);
4257
4258 if (*input_line_pointer != ',')
4259 {
4260 as_bad (_("missing value"));
4261 return;
4262 }
4263 ++input_line_pointer;
4264
b34976b6 4265 ppc_stab_symbol = TRUE;
252b5132 4266 sym = symbol_make (name);
b34976b6 4267 ppc_stab_symbol = FALSE;
252b5132 4268
809ffe0d 4269 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4270
4271 (void) expression (&exp);
4272
4273 switch (exp.X_op)
4274 {
4275 case O_illegal:
4276 case O_absent:
4277 case O_big:
4278 as_bad (_("illegal .stabx expression; zero assumed"));
4279 exp.X_add_number = 0;
4280 /* Fall through. */
4281 case O_constant:
4282 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4283 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4284 break;
4285
4286 case O_symbol:
4287 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4288 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4289 else
4290 {
4291 S_SET_VALUE (sym,
4292 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4293 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4294 }
4295 break;
4296
4297 default:
4298 /* The value is some complex expression. This will probably
99a814a1
AM		 4299 fail at some later point, but this is probably the right
4300 thing to do here. */
809ffe0d 4301 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4302 break;
4303 }
4304
4305 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4306 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4307
4308 if (*input_line_pointer != ',')
4309 {
4310 as_bad (_("missing class"));
4311 return;
4312 }
4313 ++input_line_pointer;
4314
4315 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4316
4317 if (*input_line_pointer != ',')
4318 {
4319 as_bad (_("missing type"));
4320 return;
4321 }
4322 ++input_line_pointer;
4323
4324 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4325
809ffe0d 4326 symbol_get_tc (sym)->output = 1;
252b5132 4327
c734e7e3
TG		 4328 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4329 {
4330 /* In this case :
252b5132 4331
c734e7e3
TG		 4332 .bs name
4333 .stabx "z",arrays_,133,0
4334 .es
99a814a1 4335
c734e7e3 4336 .comm arrays_,13768,3
99a814a1 4337
c734e7e3
TG		 4338 resolve_symbol_value will copy the exp's "within" into sym's when the
4339 offset is 0. Since this seems to be corner case problem,
4340 only do the correction for storage class C_STSYM. A better solution
4341 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4342
c734e7e3
TG		 4343 if (exp.X_op == O_symbol)
4344 {
4345 if (ppc_current_block == NULL)
4346 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4347
c734e7e3
TG		 4348 symbol_get_tc (sym)->within = ppc_current_block;
4349 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4350 }
4351 }
99a814a1 4352
252b5132
RH		 4353 if (exp.X_op != O_symbol
4354 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4355 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4356 ppc_frob_label (sym);
4357 else
4358 {
4359 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4360 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4361 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4362 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4363 }
4364
4365 demand_empty_rest_of_line ();
4366}
4367
4368/* The .function pseudo-op. This takes several arguments. The first
4369 argument seems to be the external name of the symbol. The second
67c1ffbe 4370 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4371 uses the same name for both. I have no idea what the third and
4372 fourth arguments are meant to be. The optional fifth argument is
4373 an expression for the size of the function. In COFF this symbol
4374 gets an aux entry like that used for a csect. */
4375
4376static void
98027b10 4377ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4378{
4379 char *name;
4380 char endc;
4381 char *s;
4382 symbolS *ext_sym;
4383 symbolS *lab_sym;
4384
d02603dc 4385 endc = get_symbol_name (&name);
252b5132
RH		 4386
4387 /* Ignore any [PR] suffix. */
4388 name = ppc_canonicalize_symbol_name (name);
4389 s = strchr (name, '[');
4390 if (s != (char *) NULL
4391 && strcmp (s + 1, "PR]") == 0)
4392 *s = '\0';
4393
4394 ext_sym = symbol_find_or_make (name);
4395
d02603dc 4396 (void) restore_line_pointer (endc);
252b5132
RH		 4397
4398 if (*input_line_pointer != ',')
4399 {
4400 as_bad (_("missing symbol name"));
4401 ignore_rest_of_line ();
4402 return;
4403 }
4404 ++input_line_pointer;
4405
d02603dc 4406 endc = get_symbol_name (&name);
252b5132
RH		 4407
4408 lab_sym = symbol_find_or_make (name);
4409
d02603dc 4410 (void) restore_line_pointer (endc);
252b5132
RH		 4411
4412 if (ext_sym != lab_sym)
4413 {
809ffe0d
ILT		 4414 expressionS exp;
4415
4416 exp.X_op = O_symbol;
4417 exp.X_add_symbol = lab_sym;
4418 exp.X_op_symbol = NULL;
4419 exp.X_add_number = 0;
4420 exp.X_unsigned = 0;
4421 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4422 }
4423
96d56e9f
NC		 4424 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4425 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4426 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4427
4428 if (*input_line_pointer == ',')
4429 {
91d6fa6a 4430 expressionS exp;
252b5132
RH		 4431
4432 /* Ignore the third argument. */
4433 ++input_line_pointer;
91d6fa6a 4434 expression (& exp);
252b5132
RH		 4435 if (*input_line_pointer == ',')
4436 {
4437 /* Ignore the fourth argument. */
4438 ++input_line_pointer;
91d6fa6a 4439 expression (& exp);
252b5132
RH		 4440 if (*input_line_pointer == ',')
4441 {
4442 /* The fifth argument is the function size. */
4443 ++input_line_pointer;
85645aed
TG		 4444 symbol_get_tc (ext_sym)->u.size = symbol_new
4445 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4446 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4447 }
4448 }
4449 }
4450
4451 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4452 SF_SET_FUNCTION (ext_sym);
4453 SF_SET_PROCESS (ext_sym);
4454 coff_add_linesym (ext_sym);
4455
4456 demand_empty_rest_of_line ();
4457}
4458
4459/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4460 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4461 with the correct line number */
5d6255fe 4462
8642cce8 4463static symbolS *saved_bi_sym = 0;
252b5132
RH		 4464
4465static void
98027b10 4466ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4467{
4468 symbolS *sym;
4469
4470 sym = symbol_make (".bf");
4471 S_SET_SEGMENT (sym, text_section);
809ffe0d 4472 symbol_set_frag (sym, frag_now);
252b5132
RH		 4473 S_SET_VALUE (sym, frag_now_fix ());
4474 S_SET_STORAGE_CLASS (sym, C_FCN);
4475
4476 coff_line_base = get_absolute_expression ();
4477
4478 S_SET_NUMBER_AUXILIARY (sym, 1);
4479 SA_SET_SYM_LNNO (sym, coff_line_base);
4480
8642cce8 4481 /* Line number for bi. */
5d6255fe 4482 if (saved_bi_sym)
8642cce8
TR		 4483 {
4484 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4485 saved_bi_sym = 0;
4486 }
5d6255fe 4487
8642cce8 4488
809ffe0d 4489 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4490
4491 ppc_frob_label (sym);
4492
4493 demand_empty_rest_of_line ();
4494}
4495
4496/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4497 ".ef", except that the line number is absolute, not relative to the
4498 most recent ".bf" symbol. */
4499
4500static void
98027b10 4501ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4502{
4503 symbolS *sym;
4504
4505 sym = symbol_make (".ef");
4506 S_SET_SEGMENT (sym, text_section);
809ffe0d 4507 symbol_set_frag (sym, frag_now);
252b5132
RH		 4508 S_SET_VALUE (sym, frag_now_fix ());
4509 S_SET_STORAGE_CLASS (sym, C_FCN);
4510 S_SET_NUMBER_AUXILIARY (sym, 1);
4511 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4512 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4513
4514 ppc_frob_label (sym);
4515
4516 demand_empty_rest_of_line ();
4517}
4518
4519/* The .bi and .ei pseudo-ops. These take a string argument and
4520 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4521 the symbol list. The value of .bi will be know when the next .bf
4522 is encountered. */
252b5132
RH		 4523
4524static void
98027b10 4525ppc_biei (int ei)
252b5132
RH		 4526{
4527 static symbolS *last_biei;
4528
4529 char *name;
4530 int len;
4531 symbolS *sym;
4532 symbolS *look;
4533
4534 name = demand_copy_C_string (&len);
4535
4536 /* The value of these symbols is actually file offset. Here we set
4537 the value to the index into the line number entries. In
4538 ppc_frob_symbols we set the fix_line field, which will cause BFD
4539 to do the right thing. */
4540
4541 sym = symbol_make (name);
4542 /* obj-coff.c currently only handles line numbers correctly in the
4543 .text section. */
4544 S_SET_SEGMENT (sym, text_section);
4545 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4546 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4547
4548 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4549 symbol_get_tc (sym)->output = 1;
81d4177b 4550
8642cce8 4551 /* Save bi. */
5d6255fe 4552 if (ei)
8642cce8
TR		 4553 saved_bi_sym = 0;
4554 else
4555 saved_bi_sym = sym;
4556
252b5132
RH		 4557 for (look = last_biei ? last_biei : symbol_rootP;
4558 (look != (symbolS *) NULL
4559 && (S_GET_STORAGE_CLASS (look) == C_FILE
4560 || S_GET_STORAGE_CLASS (look) == C_BINCL
4561 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4562 look = symbol_next (look))
4563 ;
4564 if (look != (symbolS *) NULL)
4565 {
4566 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4567 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4568 last_biei = sym;
4569 }
4570
4571 demand_empty_rest_of_line ();
4572}
4573
4574/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4575 There is one argument, which is a csect symbol. The value of the
4576 .bs symbol is the index of this csect symbol. */
4577
4578static void
98027b10 4579ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4580{
4581 char *name;
4582 char endc;
4583 symbolS *csect;
4584 symbolS *sym;
4585
4586 if (ppc_current_block != NULL)
4587 as_bad (_("nested .bs blocks"));
4588
d02603dc 4589 endc = get_symbol_name (&name);
252b5132
RH		 4590
4591 csect = symbol_find_or_make (name);
4592
d02603dc 4593 (void) restore_line_pointer (endc);
252b5132
RH		 4594
4595 sym = symbol_make (".bs");
4596 S_SET_SEGMENT (sym, now_seg);
4597 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4598 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4599 symbol_get_tc (sym)->output = 1;
252b5132 4600
809ffe0d 4601 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4602
4603 ppc_frob_label (sym);
4604
4605 ppc_current_block = sym;
4606
4607 demand_empty_rest_of_line ();
4608}
4609
4610/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4611
4612static void
98027b10 4613ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4614{
4615 symbolS *sym;
4616
4617 if (ppc_current_block == NULL)
4618 as_bad (_(".es without preceding .bs"));
4619
4620 sym = symbol_make (".es");
4621 S_SET_SEGMENT (sym, now_seg);
4622 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4623 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4624 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4625
4626 ppc_frob_label (sym);
4627
4628 ppc_current_block = NULL;
4629
4630 demand_empty_rest_of_line ();
4631}
4632
4633/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4634 line number. */
4635
4636static void
98027b10 4637ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4638{
4639 symbolS *sym;
4640
4641 sym = symbol_make (".bb");
4642 S_SET_SEGMENT (sym, text_section);
809ffe0d 4643 symbol_set_frag (sym, frag_now);
252b5132
RH		 4644 S_SET_VALUE (sym, frag_now_fix ());
4645 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4646
4647 S_SET_NUMBER_AUXILIARY (sym, 1);
4648 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4649
809ffe0d 4650 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4651
4652 SF_SET_PROCESS (sym);
4653
4654 ppc_frob_label (sym);
4655
4656 demand_empty_rest_of_line ();
4657}
4658
4659/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4660 line number. */
4661
4662static void
98027b10 4663ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4664{
4665 symbolS *sym;
4666
4667 sym = symbol_make (".eb");
4668 S_SET_SEGMENT (sym, text_section);
809ffe0d 4669 symbol_set_frag (sym, frag_now);
252b5132
RH		 4670 S_SET_VALUE (sym, frag_now_fix ());
4671 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4672 S_SET_NUMBER_AUXILIARY (sym, 1);
4673 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4674 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4675
4676 SF_SET_PROCESS (sym);
4677
4678 ppc_frob_label (sym);
4679
4680 demand_empty_rest_of_line ();
4681}
4682
4683/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4684 specified name. */
4685
4686static void
98027b10 4687ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4688{
4689 char *name;
4690 int len;
4691 symbolS *sym;
4692
4693 name = demand_copy_C_string (&len);
4694 sym = symbol_make (name);
4695 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4696 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4697 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4698 S_SET_VALUE (sym, 0);
809ffe0d 4699 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4700
4701 ppc_frob_label (sym);
4702
4703 demand_empty_rest_of_line ();
4704}
4705
4706/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4707
4708static void
98027b10 4709ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4710{
4711 symbolS *sym;
4712
4713 sym = symbol_make (".ec");
4714 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4715 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4716 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4717 S_SET_VALUE (sym, 0);
809ffe0d 4718 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4719
4720 ppc_frob_label (sym);
4721
4722 demand_empty_rest_of_line ();
4723}
4724
4725/* The .toc pseudo-op. Switch to the .toc subsegment. */
4726
4727static void
98027b10 4728ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4729{
4730 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4731 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4732 else
4733 {
4734 subsegT subseg;
4735 symbolS *sym;
4736 symbolS *list;
81d4177b 4737
252b5132
RH		 4738 subseg = ppc_data_subsegment;
4739 ++ppc_data_subsegment;
4740
4741 subseg_new (segment_name (data_section), subseg);
4742 ppc_toc_frag = frag_now;
4743
4744 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4745 symbol_set_frag (sym, frag_now);
252b5132
RH		 4746 S_SET_SEGMENT (sym, data_section);
4747 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4748 symbol_get_tc (sym)->subseg = subseg;
4749 symbol_get_tc (sym)->output = 1;
4750 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4751
4752 ppc_toc_csect = sym;
81d4177b 4753
252b5132 4754 for (list = ppc_data_csects;
809ffe0d
ILT		 4755 symbol_get_tc (list)->next != (symbolS *) NULL;
4756 list = symbol_get_tc (list)->next)
252b5132 4757 ;
809ffe0d 4758 symbol_get_tc (list)->next = sym;
252b5132
RH		 4759
4760 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4761 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4762 &symbol_lastP);
252b5132
RH		 4763 }
4764
4765 ppc_current_csect = ppc_toc_csect;
4766
4767 demand_empty_rest_of_line ();
4768}
4769
4770/* The AIX assembler automatically aligns the operands of a .long or
4771 .short pseudo-op, and we want to be compatible. */
4772
4773static void
98027b10 4774ppc_xcoff_cons (int log_size)
252b5132
RH		 4775{
4776 frag_align (log_size, 0, 0);
4777 record_alignment (now_seg, log_size);
4778 cons (1 << log_size);
4779}
4780
4781static void
98027b10 4782ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4783{
4784 expressionS exp;
4785 int byte_count;
4786
4787 (void) expression (&exp);
4788
4789 if (exp.X_op != O_constant)
4790 {
4791 as_bad (_("non-constant byte count"));
4792 return;
4793 }
4794
4795 byte_count = exp.X_add_number;
4796
4797 if (*input_line_pointer != ',')
4798 {
4799 as_bad (_("missing value"));
4800 return;
4801 }
4802
4803 ++input_line_pointer;
4804 cons (byte_count);
4805}
4806
85645aed
TG		 4807void
4808ppc_xcoff_end (void)
4809{
4810 int i;
4811
4812 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4813 {
4814 struct dw_section *dws = &dw_sections[i];
4815 struct dw_subsection *dwss;
4816
4817 if (dws->anon_subseg)
4818 {
4819 dwss = dws->anon_subseg;
4820 dwss->link = dws->list_subseg;
4821 }
4822 else
4823 dwss = dws->list_subseg;
4824
4825 for (; dwss != NULL; dwss = dwss->link)
4826 if (dwss->end_exp.X_add_symbol != NULL)
4827 {
4828 subseg_set (dws->sect, dwss->subseg);
4829 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4830 }
4831 }
4832}
4833
252b5132 4834#endif /* OBJ_XCOFF */
0baf16f2 4835#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4836\f
4837/* The .tc pseudo-op. This is used when generating either XCOFF or
4838 ELF. This takes two or more arguments.
4839
4840 When generating XCOFF output, the first argument is the name to
4841 give to this location in the toc; this will be a symbol with class
0baf16f2 4842 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4843 this location in the TOC; often there is just one more argument, a
1049f94e 4844 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4845 depends on target word size. A 32-bit target uses 4-byte values, a
4846 64-bit target uses 8-byte values.
252b5132
RH		 4847
4848 When not generating XCOFF output, the arguments are the same, but
4849 the first argument is simply ignored. */
4850
4851static void
98027b10 4852ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4853{
4854#ifdef OBJ_XCOFF
4855
4856 /* Define the TOC symbol name. */
4857 {
4858 char *name;
4859 char endc;
4860 symbolS *sym;
4861
4862 if (ppc_toc_csect == (symbolS *) NULL
4863 || ppc_toc_csect != ppc_current_csect)
4864 {
4865 as_bad (_(".tc not in .toc section"));
4866 ignore_rest_of_line ();
4867 return;
4868 }
4869
d02603dc 4870 endc = get_symbol_name (&name);
252b5132
RH		 4871
4872 sym = symbol_find_or_make (name);
4873
d02603dc 4874 (void) restore_line_pointer (endc);
252b5132
RH		 4875
4876 if (S_IS_DEFINED (sym))
4877 {
4878 symbolS *label;
4879
809ffe0d 4880 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4881 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4882 {
4883 as_bad (_(".tc with no label"));
4884 ignore_rest_of_line ();
4885 return;
4886 }
4887
4888 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4889 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4890 S_SET_VALUE (label, S_GET_VALUE (sym));
4891
4892 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4893 ++input_line_pointer;
4894
4895 return;
4896 }
4897
4898 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4899 symbol_set_frag (sym, frag_now);
252b5132 4900 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4901 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4902 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4903
4904 ppc_frob_label (sym);
4905 }
4906
0baf16f2
AM		 4907#endif /* OBJ_XCOFF */
4908#ifdef OBJ_ELF
9c7977b3 4909 int align;
252b5132
RH		 4910
4911 /* Skip the TOC symbol name. */
4912 while (is_part_of_name (*input_line_pointer)
d13d4015 4913 || *input_line_pointer == ' '
252b5132
RH		 4914 || *input_line_pointer == '['
4915 || *input_line_pointer == ']'
4916 || *input_line_pointer == '{'
4917 || *input_line_pointer == '}')
4918 ++input_line_pointer;
4919
0baf16f2 4920 /* Align to a four/eight byte boundary. */
2b3c4602 4921 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4922 frag_align (align, 0, 0);
4923 record_alignment (now_seg, align);
0baf16f2 4924#endif /* OBJ_ELF */
252b5132
RH		 4925
4926 if (*input_line_pointer != ',')
4927 demand_empty_rest_of_line ();
4928 else
4929 {
4930 ++input_line_pointer;
2b3c4602 4931 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4932 }
4933}
0baf16f2
AM		 4934
4935/* Pseudo-op .machine. */
0baf16f2
AM		 4936
4937static void
98027b10 4938ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4939{
d02603dc 4940 char c;
69c040df
AM		 4941 char *cpu_string;
4942#define MAX_HISTORY 100
fa452fa6 4943 static ppc_cpu_t *cpu_history;
69c040df
AM		 4944 static int curr_hist;
4945
4946 SKIP_WHITESPACE ();
4947
d02603dc
NC		 4948 c = get_symbol_name (&cpu_string);
4949 cpu_string = xstrdup (cpu_string);
4950 (void) restore_line_pointer (c);
69c040df
AM		 4951
4952 if (cpu_string != NULL)
4953 {
fa452fa6 4954 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4955 ppc_cpu_t new_cpu;
69c040df
AM		 4956 char *p;
4957
4958 for (p = cpu_string; *p != 0; p++)
4959 *p = TOLOWER (*p);
4960
4961 if (strcmp (cpu_string, "push") == 0)
4962 {
4963 if (cpu_history == NULL)
4964 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4965
4966 if (curr_hist >= MAX_HISTORY)
4967 as_bad (_(".machine stack overflow"));
4968 else
4969 cpu_history[curr_hist++] = ppc_cpu;
4970 }
4971 else if (strcmp (cpu_string, "pop") == 0)
4972 {
4973 if (curr_hist <= 0)
4974 as_bad (_(".machine stack underflow"));
4975 else
4976 ppc_cpu = cpu_history[--curr_hist];
4977 }
776fc418 4978 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4979 ppc_cpu = new_cpu;
69c040df
AM		 4980 else
4981 as_bad (_("invalid machine `%s'"), cpu_string);
4982
4983 if (ppc_cpu != old_cpu)
4984 ppc_setup_opcodes ();
4985 }
4986
4987 demand_empty_rest_of_line ();
0baf16f2 4988}
0baf16f2 4989#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4990\f
4991#ifdef TE_PE
4992
99a814a1 4993/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4994
4995/* Set the current section. */
4996static void
98027b10 4997ppc_set_current_section (segT new)
252b5132
RH		 4998{
4999 ppc_previous_section = ppc_current_section;
5000 ppc_current_section = new;
5001}
5002
5003/* pseudo-op: .previous
5004 behaviour: toggles the current section with the previous section.
5005 errors: None
99a814a1
AM		 5006 warnings: "No previous section" */
5007
252b5132 5008static void
98027b10 5009ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5010{
81d4177b 5011 if (ppc_previous_section == NULL)
252b5132 5012 {
d6ed37ed 5013 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5014 return;
5015 }
5016
99a814a1 5017 subseg_set (ppc_previous_section, 0);
252b5132 5018
99a814a1 5019 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5020}
5021
5022/* pseudo-op: .pdata
5023 behaviour: predefined read only data section
b34976b6 5024 double word aligned
252b5132
RH		 5025 errors: None
5026 warnings: None
5027 initial: .section .pdata "adr3"
b34976b6 5028 a - don't know -- maybe a misprint
252b5132
RH		 5029 d - initialized data
5030 r - readable
5031 3 - double word aligned (that would be 4 byte boundary)
5032
5033 commentary:
5034 Tag index tables (also known as the function table) for exception
99a814a1 5035 handling, debugging, etc. */
252b5132 5036
252b5132 5037static void
98027b10 5038ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5039{
81d4177b 5040 if (pdata_section == 0)
252b5132
RH		 5041 {
5042 pdata_section = subseg_new (".pdata", 0);
81d4177b 5043
252b5132
RH		 5044 bfd_set_section_flags (stdoutput, pdata_section,
5045 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5046 | SEC_READONLY | SEC_DATA ));
81d4177b 5047
252b5132
RH		 5048 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5049 }
5050 else
5051 {
99a814a1 5052 pdata_section = subseg_new (".pdata", 0);
252b5132 5053 }
99a814a1 5054 ppc_set_current_section (pdata_section);
252b5132
RH		 5055}
5056
5057/* pseudo-op: .ydata
5058 behaviour: predefined read only data section
b34976b6 5059 double word aligned
252b5132
RH		 5060 errors: None
5061 warnings: None
5062 initial: .section .ydata "drw3"
b34976b6 5063 a - don't know -- maybe a misprint
252b5132
RH		 5064 d - initialized data
5065 r - readable
5066 3 - double word aligned (that would be 4 byte boundary)
5067 commentary:
5068 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5069 debugging, etc. */
5070
252b5132 5071static void
98027b10 5072ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5073{
81d4177b 5074 if (ydata_section == 0)
252b5132
RH		 5075 {
5076 ydata_section = subseg_new (".ydata", 0);
5077 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5078 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5079 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5080
5081 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5082 }
5083 else
5084 {
5085 ydata_section = subseg_new (".ydata", 0);
5086 }
99a814a1 5087 ppc_set_current_section (ydata_section);
252b5132
RH		 5088}
5089
5090/* pseudo-op: .reldata
5091 behaviour: predefined read write data section
b34976b6 5092 double word aligned (4-byte)
252b5132
RH		 5093 FIXME: relocation is applied to it
5094 FIXME: what's the difference between this and .data?
5095 errors: None
5096 warnings: None
5097 initial: .section .reldata "drw3"
5098 d - initialized data
5099 r - readable
5100 w - writeable
5101 3 - double word aligned (that would be 8 byte boundary)
5102
5103 commentary:
5104 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5105 function descriptors, etc. */
5106
252b5132 5107static void
98027b10 5108ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5109{
5110 if (reldata_section == 0)
5111 {
5112 reldata_section = subseg_new (".reldata", 0);
5113
5114 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5115 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5116 | SEC_DATA));
252b5132
RH		 5117
5118 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5119 }
5120 else
5121 {
5122 reldata_section = subseg_new (".reldata", 0);
5123 }
99a814a1 5124 ppc_set_current_section (reldata_section);
252b5132
RH		 5125}
5126
5127/* pseudo-op: .rdata
5128 behaviour: predefined read only data section
b34976b6 5129 double word aligned
252b5132
RH		 5130 errors: None
5131 warnings: None
5132 initial: .section .rdata "dr3"
5133 d - initialized data
5134 r - readable
99a814a1
AM		 5135 3 - double word aligned (that would be 4 byte boundary) */
5136
252b5132 5137static void
98027b10 5138ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5139{
5140 if (rdata_section == 0)
5141 {
5142 rdata_section = subseg_new (".rdata", 0);
5143 bfd_set_section_flags (stdoutput, rdata_section,
5144 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5145 | SEC_READONLY | SEC_DATA ));
5146
5147 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5148 }
5149 else
5150 {
5151 rdata_section = subseg_new (".rdata", 0);
5152 }
99a814a1 5153 ppc_set_current_section (rdata_section);
252b5132
RH		 5154}
5155
5156/* pseudo-op: .ualong
81d4177b 5157 behaviour: much like .int, with the exception that no alignment is
b34976b6 5158 performed.
252b5132
RH		 5159 FIXME: test the alignment statement
5160 errors: None
99a814a1
AM		 5161 warnings: None */
5162
252b5132 5163static void
98027b10 5164ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5165{
99a814a1
AM		 5166 /* Try for long. */
5167 cons (4);
252b5132
RH		 5168}
5169
5170/* pseudo-op: .znop <symbol name>
5171 behaviour: Issue a nop instruction
b34976b6 5172 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5173 the supplied symbol name.
5174 errors: None
99a814a1
AM		 5175 warnings: Missing symbol name */
5176
252b5132 5177static void
98027b10 5178ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5179{
5180 unsigned long insn;
5181 const struct powerpc_opcode *opcode;
252b5132 5182 char *f;
252b5132 5183 symbolS *sym;
252b5132
RH		 5184 char *symbol_name;
5185 char c;
5186 char *name;
252b5132 5187
99a814a1 5188 /* Strip out the symbol name. */
d02603dc 5189 c = get_symbol_name (&symbol_name);
252b5132
RH		 5190
5191 name = xmalloc (input_line_pointer - symbol_name + 1);
5192 strcpy (name, symbol_name);
5193
5194 sym = symbol_find_or_make (name);
5195
5196 *input_line_pointer = c;
5197
d02603dc 5198 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5199
5200 /* Look up the opcode in the hash table. */
5201 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5202
99a814a1 5203 /* Stick in the nop. */
252b5132
RH		 5204 insn = opcode->opcode;
5205
5206 /* Write out the instruction. */
5207 f = frag_more (4);
5208 md_number_to_chars (f, insn, 4);
5209 fix_new (frag_now,
5210 f - frag_now->fr_literal,
5211 4,
5212 sym,
5213 0,
5214 0,
5215 BFD_RELOC_16_GOT_PCREL);
5216
5217}
5218
81d4177b
KH		 5219/* pseudo-op:
5220 behaviour:
5221 errors:
99a814a1
AM		 5222 warnings: */
5223
252b5132 5224static void
98027b10 5225ppc_pe_comm (int lcomm)
252b5132 5226{
98027b10
AM		 5227 char *name;
5228 char c;
5229 char *p;
252b5132 5230 offsetT temp;
98027b10 5231 symbolS *symbolP;
252b5132
RH		 5232 offsetT align;
5233
d02603dc 5234 c = get_symbol_name (&name);
252b5132 5235
99a814a1 5236 /* just after name is now '\0'. */
252b5132
RH		 5237 p = input_line_pointer;
5238 *p = c;
d02603dc 5239 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5240 if (*input_line_pointer != ',')
5241 {
d6ed37ed 5242 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5243 ignore_rest_of_line ();
5244 return;
5245 }
5246
5247 input_line_pointer++; /* skip ',' */
5248 if ((temp = get_absolute_expression ()) < 0)
5249 {
5250 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5251 ignore_rest_of_line ();
5252 return;
5253 }
5254
5255 if (! lcomm)
5256 {
5257 /* The third argument to .comm is the alignment. */
5258 if (*input_line_pointer != ',')
5259 align = 3;
5260 else
5261 {
5262 ++input_line_pointer;
5263 align = get_absolute_expression ();
5264 if (align <= 0)
5265 {
5266 as_warn (_("ignoring bad alignment"));
5267 align = 3;
5268 }
5269 }
5270 }
5271
5272 *p = 0;
5273 symbolP = symbol_find_or_make (name);
5274
5275 *p = c;
5276 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5277 {
d6ed37ed 5278 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5279 S_GET_NAME (symbolP));
5280 ignore_rest_of_line ();
5281 return;
5282 }
5283
5284 if (S_GET_VALUE (symbolP))
5285 {
5286 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5287 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5288 S_GET_NAME (symbolP),
5289 (long) S_GET_VALUE (symbolP),
5290 (long) temp);
5291 }
5292 else
5293 {
5294 S_SET_VALUE (symbolP, (valueT) temp);
5295 S_SET_EXTERNAL (symbolP);
86ebace2 5296 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5297 }
5298
5299 demand_empty_rest_of_line ();
5300}
5301
5302/*
5303 * implement the .section pseudo op:
5304 * .section name {, "flags"}
5305 * ^ ^
5306 * | +--- optional flags: 'b' for bss
5307 * | 'i' for info
5308 * +-- section name 'l' for lib
5309 * 'n' for noload
5310 * 'o' for over
5311 * 'w' for data
5312 * 'd' (apparently m88k for data)
5313 * 'x' for text
5314 * But if the argument is not a quoted string, treat it as a
5315 * subsegment number.
5316 *
5317 * FIXME: this is a copy of the section processing from obj-coff.c, with
5318 * additions/changes for the moto-pas assembler support. There are three
5319 * categories:
5320 *
81d4177b 5321 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5322 * setting bits that bfd probably neither understands or uses. The
5323 * correct approach (?) will have to incorporate extra fields attached
5324 * to the section to hold the system specific stuff. (krk)
5325 *
5326 * Section Contents:
5327 * 'a' - unknown - referred to in documentation, but no definition supplied
5328 * 'c' - section has code
5329 * 'd' - section has initialized data
5330 * 'u' - section has uninitialized data
5331 * 'i' - section contains directives (info)
5332 * 'n' - section can be discarded
5333 * 'R' - remove section at link time
5334 *
5335 * Section Protection:
5336 * 'r' - section is readable
5337 * 'w' - section is writeable
5338 * 'x' - section is executable
5339 * 's' - section is sharable
5340 *
5341 * Section Alignment:
5342 * '0' - align to byte boundary
5343 * '1' - align to halfword undary
5344 * '2' - align to word boundary
5345 * '3' - align to doubleword boundary
5346 * '4' - align to quadword boundary
5347 * '5' - align to 32 byte boundary
5348 * '6' - align to 64 byte boundary
5349 *
5350 */
5351
5352void
98027b10 5353ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5354{
99a814a1 5355 /* Strip out the section name. */
252b5132
RH		 5356 char *section_name;
5357 char c;
5358 char *name;
5359 unsigned int exp;
5360 flagword flags;
5361 segT sec;
5362 int align;
5363
d02603dc 5364 c = get_symbol_name (&section_name);
252b5132
RH		 5365
5366 name = xmalloc (input_line_pointer - section_name + 1);
5367 strcpy (name, section_name);
5368
5369 *input_line_pointer = c;
5370
d02603dc 5371 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5372
5373 exp = 0;
5374 flags = SEC_NO_FLAGS;
5375
5376 if (strcmp (name, ".idata$2") == 0)
5377 {
5378 align = 0;
5379 }
5380 else if (strcmp (name, ".idata$3") == 0)
5381 {
5382 align = 0;
5383 }
5384 else if (strcmp (name, ".idata$4") == 0)
5385 {
5386 align = 2;
5387 }
5388 else if (strcmp (name, ".idata$5") == 0)
5389 {
5390 align = 2;
5391 }
5392 else if (strcmp (name, ".idata$6") == 0)
5393 {
5394 align = 1;
5395 }
5396 else
99a814a1
AM		 5397 /* Default alignment to 16 byte boundary. */
5398 align = 4;
252b5132
RH		 5399
5400 if (*input_line_pointer == ',')
5401 {
5402 ++input_line_pointer;
5403 SKIP_WHITESPACE ();
5404 if (*input_line_pointer != '"')
5405 exp = get_absolute_expression ();
5406 else
5407 {
5408 ++input_line_pointer;
5409 while (*input_line_pointer != '"'
5410 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5411 {
5412 switch (*input_line_pointer)
5413 {
5414 /* Section Contents */
5415 case 'a': /* unknown */
d6ed37ed 5416 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5417 break;
5418 case 'c': /* code section */
81d4177b 5419 flags |= SEC_CODE;
252b5132
RH		 5420 break;
5421 case 'd': /* section has initialized data */
5422 flags |= SEC_DATA;
5423 break;
5424 case 'u': /* section has uninitialized data */
5425 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5426 in winnt.h */
5427 flags |= SEC_ROM;
5428 break;
5429 case 'i': /* section contains directives (info) */
5430 /* FIXME: This is IMAGE_SCN_LNK_INFO
5431 in winnt.h */
5432 flags |= SEC_HAS_CONTENTS;
5433 break;
5434 case 'n': /* section can be discarded */
81d4177b 5435 flags &=~ SEC_LOAD;
252b5132
RH		 5436 break;
5437 case 'R': /* Remove section at link time */
5438 flags |= SEC_NEVER_LOAD;
5439 break;
8d452c78 5440#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5441 /* Section Protection */
5442 case 'r': /* section is readable */
5443 flags |= IMAGE_SCN_MEM_READ;
5444 break;
5445 case 'w': /* section is writeable */
5446 flags |= IMAGE_SCN_MEM_WRITE;
5447 break;
5448 case 'x': /* section is executable */
5449 flags |= IMAGE_SCN_MEM_EXECUTE;
5450 break;
5451 case 's': /* section is sharable */
5452 flags |= IMAGE_SCN_MEM_SHARED;
5453 break;
5454
5455 /* Section Alignment */
5456 case '0': /* align to byte boundary */
5457 flags |= IMAGE_SCN_ALIGN_1BYTES;
5458 align = 0;
5459 break;
5460 case '1': /* align to halfword boundary */
5461 flags |= IMAGE_SCN_ALIGN_2BYTES;
5462 align = 1;
5463 break;
5464 case '2': /* align to word boundary */
5465 flags |= IMAGE_SCN_ALIGN_4BYTES;
5466 align = 2;
5467 break;
5468 case '3': /* align to doubleword boundary */
5469 flags |= IMAGE_SCN_ALIGN_8BYTES;
5470 align = 3;
5471 break;
5472 case '4': /* align to quadword boundary */
5473 flags |= IMAGE_SCN_ALIGN_16BYTES;
5474 align = 4;
5475 break;
5476 case '5': /* align to 32 byte boundary */
5477 flags |= IMAGE_SCN_ALIGN_32BYTES;
5478 align = 5;
5479 break;
5480 case '6': /* align to 64 byte boundary */
5481 flags |= IMAGE_SCN_ALIGN_64BYTES;
5482 align = 6;
5483 break;
8d452c78 5484#endif
252b5132 5485 default:
99a814a1
AM		 5486 as_bad (_("unknown section attribute '%c'"),
5487 *input_line_pointer);
252b5132
RH		 5488 break;
5489 }
5490 ++input_line_pointer;
5491 }
5492 if (*input_line_pointer == '"')
5493 ++input_line_pointer;
5494 }
5495 }
5496
5497 sec = subseg_new (name, (subsegT) exp);
5498
99a814a1 5499 ppc_set_current_section (sec);
252b5132
RH		 5500
5501 if (flags != SEC_NO_FLAGS)
5502 {
5503 if (! bfd_set_section_flags (stdoutput, sec, flags))
5504 as_bad (_("error setting flags for \"%s\": %s"),
5505 bfd_section_name (stdoutput, sec),
5506 bfd_errmsg (bfd_get_error ()));
5507 }
5508
99a814a1 5509 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5510}
5511
5512static void
98027b10 5513ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5514{
5515 char *name;
5516 char endc;
5517 symbolS *ext_sym;
5518
d02603dc 5519 endc = get_symbol_name (&name);
252b5132
RH		 5520
5521 ext_sym = symbol_find_or_make (name);
5522
d02603dc 5523 (void) restore_line_pointer (endc);
252b5132
RH		 5524
5525 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5526 SF_SET_FUNCTION (ext_sym);
5527 SF_SET_PROCESS (ext_sym);
5528 coff_add_linesym (ext_sym);
5529
5530 demand_empty_rest_of_line ();
5531}
5532
5533static void
98027b10 5534ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5535{
5536 if (tocdata_section == 0)
5537 {
5538 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5539 /* FIXME: section flags won't work. */
252b5132
RH		 5540 bfd_set_section_flags (stdoutput, tocdata_section,
5541 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5542 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5543
5544 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5545 }
5546 else
5547 {
5548 rdata_section = subseg_new (".tocd", 0);
5549 }
5550
99a814a1 5551 ppc_set_current_section (tocdata_section);
252b5132
RH		 5552
5553 demand_empty_rest_of_line ();
5554}
5555
5556/* Don't adjust TOC relocs to use the section symbol. */
5557
5558int
98027b10 5559ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5560{
5561 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5562}
5563
5564#endif
5565\f
5566#ifdef OBJ_XCOFF
5567
5568/* XCOFF specific symbol and file handling. */
5569
5570/* Canonicalize the symbol name. We use the to force the suffix, if
5571 any, to use square brackets, and to be in upper case. */
5572
5573char *
98027b10 5574ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5575{
5576 char *s;
5577
5578 if (ppc_stab_symbol)
5579 return name;
5580
5581 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5582 ;
5583 if (*s != '\0')
5584 {
5585 char brac;
5586
5587 if (*s == '[')
5588 brac = ']';
5589 else
5590 {
5591 *s = '[';
5592 brac = '}';
5593 }
5594
5595 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5596 *s = TOUPPER (*s);
252b5132
RH		 5597
5598 if (*s == '\0' || s[1] != '\0')
5599 as_bad (_("bad symbol suffix"));
5600
5601 *s = ']';
5602 }
5603
5604 return name;
5605}
5606
5607/* Set the class of a symbol based on the suffix, if any. This is
5608 called whenever a new symbol is created. */
5609
5610void
98027b10 5611ppc_symbol_new_hook (symbolS *sym)
252b5132 5612{
809ffe0d 5613 struct ppc_tc_sy *tc;
252b5132
RH		 5614 const char *s;
5615
809ffe0d
ILT		 5616 tc = symbol_get_tc (sym);
5617 tc->next = NULL;
5618 tc->output = 0;
96d56e9f 5619 tc->symbol_class = -1;
809ffe0d
ILT		 5620 tc->real_name = NULL;
5621 tc->subseg = 0;
5622 tc->align = 0;
85645aed
TG		 5623 tc->u.size = NULL;
5624 tc->u.dw = NULL;
809ffe0d 5625 tc->within = NULL;
252b5132
RH		 5626
5627 if (ppc_stab_symbol)
5628 return;
5629
5630 s = strchr (S_GET_NAME (sym), '[');
5631 if (s == (const char *) NULL)
5632 {
5633 /* There is no suffix. */
5634 return;
5635 }
5636
5637 ++s;
5638
5639 switch (s[0])
5640 {
5641 case 'B':
5642 if (strcmp (s, "BS]") == 0)
96d56e9f 5643 tc->symbol_class = XMC_BS;
252b5132
RH		 5644 break;
5645 case 'D':
5646 if (strcmp (s, "DB]") == 0)
96d56e9f 5647 tc->symbol_class = XMC_DB;
252b5132 5648 else if (strcmp (s, "DS]") == 0)
96d56e9f 5649 tc->symbol_class = XMC_DS;
252b5132
RH		 5650 break;
5651 case 'G':
5652 if (strcmp (s, "GL]") == 0)
96d56e9f 5653 tc->symbol_class = XMC_GL;
252b5132
RH		 5654 break;
5655 case 'P':
5656 if (strcmp (s, "PR]") == 0)
96d56e9f 5657 tc->symbol_class = XMC_PR;
252b5132
RH		 5658 break;
5659 case 'R':
5660 if (strcmp (s, "RO]") == 0)
96d56e9f 5661 tc->symbol_class = XMC_RO;
252b5132 5662 else if (strcmp (s, "RW]") == 0)
96d56e9f 5663 tc->symbol_class = XMC_RW;
252b5132
RH		 5664 break;
5665 case 'S':
5666 if (strcmp (s, "SV]") == 0)
96d56e9f 5667 tc->symbol_class = XMC_SV;
252b5132
RH		 5668 break;
5669 case 'T':
5670 if (strcmp (s, "TC]") == 0)
96d56e9f 5671 tc->symbol_class = XMC_TC;
252b5132 5672 else if (strcmp (s, "TI]") == 0)
96d56e9f 5673 tc->symbol_class = XMC_TI;
252b5132 5674 else if (strcmp (s, "TB]") == 0)
96d56e9f 5675 tc->symbol_class = XMC_TB;
252b5132 5676 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5677 tc->symbol_class = XMC_TC0;
252b5132
RH		 5678 break;
5679 case 'U':
5680 if (strcmp (s, "UA]") == 0)
96d56e9f 5681 tc->symbol_class = XMC_UA;
252b5132 5682 else if (strcmp (s, "UC]") == 0)
96d56e9f 5683 tc->symbol_class = XMC_UC;
252b5132
RH		 5684 break;
5685 case 'X':
5686 if (strcmp (s, "XO]") == 0)
96d56e9f 5687 tc->symbol_class = XMC_XO;
252b5132
RH		 5688 break;
5689 }
5690
96d56e9f 5691 if (tc->symbol_class == -1)
d6ed37ed 5692 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5693}
5694
5695/* Set the class of a label based on where it is defined. This
5696 handles symbols without suffixes. Also, move the symbol so that it
5697 follows the csect symbol. */
5698
5699void
98027b10 5700ppc_frob_label (symbolS *sym)
252b5132
RH		 5701{
5702 if (ppc_current_csect != (symbolS *) NULL)
5703 {
96d56e9f
NC		 5704 if (symbol_get_tc (sym)->symbol_class == -1)
5705 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5706
5707 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5708 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5709 &symbol_rootP, &symbol_lastP);
5710 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5711 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5712 }
07a53e5c
RH		 5713
5714#ifdef OBJ_ELF
5715 dwarf2_emit_label (sym);
5716#endif
252b5132
RH		 5717}
5718
5719/* This variable is set by ppc_frob_symbol if any absolute symbols are
5720 seen. It tells ppc_adjust_symtab whether it needs to look through
5721 the symbols. */
5722
b34976b6 5723static bfd_boolean ppc_saw_abs;
252b5132
RH		 5724
5725/* Change the name of a symbol just before writing it out. Set the
5726 real name if the .rename pseudo-op was used. Otherwise, remove any
5727 class suffix. Return 1 if the symbol should not be included in the
5728 symbol table. */
5729
5730int
98027b10 5731ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5732{
5733 static symbolS *ppc_last_function;
5734 static symbolS *set_end;
5735
5736 /* Discard symbols that should not be included in the output symbol
5737 table. */
809ffe0d
ILT		 5738 if (! symbol_used_in_reloc_p (sym)
5739 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5740 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5741 && ! symbol_get_tc (sym)->output
252b5132
RH		 5742 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5743 return 1;
5744
a161fe53
AM		 5745 /* This one will disappear anyway. Don't make a csect sym for it. */
5746 if (sym == abs_section_sym)
5747 return 1;
5748
809ffe0d
ILT		 5749 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5750 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5751 else
5752 {
5753 const char *name;
5754 const char *s;
5755
5756 name = S_GET_NAME (sym);
5757 s = strchr (name, '[');
5758 if (s != (char *) NULL)
5759 {
5760 unsigned int len;
5761 char *snew;
5762
5763 len = s - name;
5764 snew = xmalloc (len + 1);
5765 memcpy (snew, name, len);
5766 snew[len] = '\0';
5767
5768 S_SET_NAME (sym, snew);
5769 }
5770 }
5771
5772 if (set_end != (symbolS *) NULL)
5773 {
5774 SA_SET_SYM_ENDNDX (set_end, sym);
5775 set_end = NULL;
5776 }
5777
5778 if (SF_GET_FUNCTION (sym))
5779 {
5780 if (ppc_last_function != (symbolS *) NULL)
5781 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5782 ppc_last_function = sym;
85645aed 5783 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5784 {
85645aed 5785 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5786 SA_SET_SYM_FSIZE (sym,
85645aed 5787 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5788 }
5789 }
5790 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5791 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5792 {
5793 if (ppc_last_function == (symbolS *) NULL)
5794 as_bad (_(".ef with no preceding .function"));
5795 else
5796 {
5797 set_end = ppc_last_function;
5798 ppc_last_function = NULL;
5799
5800 /* We don't have a C_EFCN symbol, but we need to force the
5801 COFF backend to believe that it has seen one. */
5802 coff_last_function = NULL;
5803 }
5804 }
5805
670ec21d 5806 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5807 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5808 && S_GET_STORAGE_CLASS (sym) != C_FILE
5809 && S_GET_STORAGE_CLASS (sym) != C_FCN
5810 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5811 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5812 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5813 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5814 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5815 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5816 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5817
5818 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5819 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5820 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5821 {
5822 int i;
5823 union internal_auxent *a;
5824
5825 /* Create a csect aux. */
5826 i = S_GET_NUMBER_AUXILIARY (sym);
5827 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5828 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5829 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5830 {
5831 /* This is the TOC table. */
5832 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5833 a->x_csect.x_scnlen.l = 0;
5834 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5835 }
809ffe0d 5836 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5837 {
5838 /* This is a csect symbol. x_scnlen is the size of the
5839 csect. */
809ffe0d 5840 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5841 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5842 S_GET_SEGMENT (sym))
5843 - S_GET_VALUE (sym));
5844 else
5845 {
6386f3a7 5846 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5847 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5848 - S_GET_VALUE (sym));
5849 }
809ffe0d 5850 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5851 }
5852 else if (S_GET_SEGMENT (sym) == bss_section)
5853 {
5854 /* This is a common symbol. */
809ffe0d
ILT		 5855 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5856 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5857 if (S_IS_EXTERNAL (sym))
96d56e9f 5858 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5859 else
96d56e9f 5860 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5861 }
5862 else if (S_GET_SEGMENT (sym) == absolute_section)
5863 {
5864 /* This is an absolute symbol. The csect will be created by
99a814a1 5865 ppc_adjust_symtab. */
b34976b6 5866 ppc_saw_abs = TRUE;
252b5132 5867 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5868 if (symbol_get_tc (sym)->symbol_class == -1)
5869 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5870 }
5871 else if (! S_IS_DEFINED (sym))
5872 {
5873 /* This is an external symbol. */
5874 a->x_csect.x_scnlen.l = 0;
5875 a->x_csect.x_smtyp = XTY_ER;
5876 }
96d56e9f 5877 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5878 {
5879 symbolS *next;
5880
5881 /* This is a TOC definition. x_scnlen is the size of the
5882 TOC entry. */
5883 next = symbol_next (sym);
96d56e9f 5884 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5885 next = symbol_next (next);
5886 if (next == (symbolS *) NULL
96d56e9f 5887 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5888 {
5889 if (ppc_after_toc_frag == (fragS *) NULL)
5890 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5891 data_section)
5892 - S_GET_VALUE (sym));
5893 else
5894 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5895 - S_GET_VALUE (sym));
5896 }
5897 else
5898 {
6386f3a7 5899 resolve_symbol_value (next);
252b5132
RH		 5900 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5901 - S_GET_VALUE (sym));
5902 }
5903 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5904 }
5905 else
5906 {
5907 symbolS *csect;
5908
5909 /* This is a normal symbol definition. x_scnlen is the
5910 symbol index of the containing csect. */
5911 if (S_GET_SEGMENT (sym) == text_section)
5912 csect = ppc_text_csects;
5913 else if (S_GET_SEGMENT (sym) == data_section)
5914 csect = ppc_data_csects;
5915 else
5916 abort ();
5917
5918 /* Skip the initial dummy symbol. */
809ffe0d 5919 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5920
5921 if (csect == (symbolS *) NULL)
5922 {
5923 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5924 a->x_csect.x_scnlen.l = 0;
5925 }
5926 else
5927 {
809ffe0d 5928 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5929 {
6386f3a7 5930 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5931 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5932 > S_GET_VALUE (sym))
252b5132 5933 break;
809ffe0d 5934 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5935 }
5936
809ffe0d
ILT		 5937 a->x_csect.x_scnlen.p =
5938 coffsymbol (symbol_get_bfdsym (csect))->native;
5939 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5940 1;
252b5132
RH		 5941 }
5942 a->x_csect.x_smtyp = XTY_LD;
5943 }
81d4177b 5944
252b5132
RH		 5945 a->x_csect.x_parmhash = 0;
5946 a->x_csect.x_snhash = 0;
96d56e9f 5947 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5948 a->x_csect.x_smclas = XMC_PR;
5949 else
96d56e9f 5950 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5951 a->x_csect.x_stab = 0;
5952 a->x_csect.x_snstab = 0;
5953
5954 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5955 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5956 }
5957 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5958 {
5959 /* We want the value to be the symbol index of the referenced
5960 csect symbol. BFD will do that for us if we set the right
5961 flags. */
b782de16
AM		 5962 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5963 combined_entry_type *c = coffsymbol (bsym)->native;
5964
5965 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5966 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5967 }
5968 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5969 {
5970 symbolS *block;
c734e7e3 5971 valueT base;
252b5132 5972
809ffe0d 5973 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5974 if (block)
5975 {
5976 /* The value is the offset from the enclosing csect. */
5977 symbolS *csect;
5978
5979 csect = symbol_get_tc (block)->within;
5980 resolve_symbol_value (csect);
5981 base = S_GET_VALUE (csect);
5982 }
5983 else
5984 base = 0;
5985
5986 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5987 }
5988 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5989 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5990 {
5991 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5992 BFD will do that for us if we set the right flags. We have
5993 already set the value correctly. */
809ffe0d 5994 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5995 }
5996
5997 return 0;
5998}
5999
6000/* Adjust the symbol table. This creates csect symbols for all
6001 absolute symbols. */
6002
6003void
98027b10 6004ppc_adjust_symtab (void)
252b5132
RH		 6005{
6006 symbolS *sym;
6007
6008 if (! ppc_saw_abs)
6009 return;
6010
6011 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6012 {
6013 symbolS *csect;
6014 int i;
6015 union internal_auxent *a;
6016
6017 if (S_GET_SEGMENT (sym) != absolute_section)
6018 continue;
6019
6020 csect = symbol_create (".abs[XO]", absolute_section,
6021 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6022 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6023 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6024 i = S_GET_NUMBER_AUXILIARY (csect);
6025 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6026 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6027 a->x_csect.x_scnlen.l = 0;
6028 a->x_csect.x_smtyp = XTY_SD;
6029 a->x_csect.x_parmhash = 0;
6030 a->x_csect.x_snhash = 0;
6031 a->x_csect.x_smclas = XMC_XO;
6032 a->x_csect.x_stab = 0;
6033 a->x_csect.x_snstab = 0;
6034
6035 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6036
6037 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6038 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6039 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6040 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6041 }
6042
b34976b6 6043 ppc_saw_abs = FALSE;
252b5132
RH		 6044}
6045
6046/* Set the VMA for a section. This is called on all the sections in
6047 turn. */
6048
6049void
98027b10 6050ppc_frob_section (asection *sec)
252b5132 6051{
931e13a6 6052 static bfd_vma vma = 0;
252b5132 6053
85645aed
TG		 6054 /* Dwarf sections start at 0. */
6055 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6056 return;
6057
931e13a6 6058 vma = md_section_align (sec, vma);
252b5132
RH		 6059 bfd_set_section_vma (stdoutput, sec, vma);
6060 vma += bfd_section_size (stdoutput, sec);
6061}
6062
6063#endif /* OBJ_XCOFF */
6064\f
252b5132 6065char *
98027b10 6066md_atof (int type, char *litp, int *sizep)
252b5132 6067{
499ac353 6068 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6069}
6070
6071/* Write a value out to the object file, using the appropriate
6072 endianness. */
6073
6074void
98027b10 6075md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6076{
6077 if (target_big_endian)
6078 number_to_chars_bigendian (buf, val, n);
6079 else
6080 number_to_chars_littleendian (buf, val, n);
6081}
6082
6083/* Align a section (I don't know why this is machine dependent). */
6084
6085valueT
3aeeedbb 6086md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6087{
3aeeedbb
AM		 6088#ifdef OBJ_ELF
6089 return addr;
6090#else
252b5132
RH		 6091 int align = bfd_get_section_alignment (stdoutput, seg);
6092
6093 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6094#endif
252b5132
RH		 6095}
6096
6097/* We don't have any form of relaxing. */
6098
6099int
98027b10
AM		 6100md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6101 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6102{
6103 abort ();
6104 return 0;
6105}
6106
6107/* Convert a machine dependent frag. We never generate these. */
6108
6109void
98027b10
AM		 6110md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6111 asection *sec ATTRIBUTE_UNUSED,
6112 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6113{
6114 abort ();
6115}
6116
6117/* We have no need to default values of symbols. */
6118
252b5132 6119symbolS *
98027b10 6120md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6121{
6122 return 0;
6123}
6124\f
6125/* Functions concerning relocs. */
6126
6127/* The location from which a PC relative jump should be calculated,
6128 given a PC relative reloc. */
6129
6130long
98027b10 6131md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6132{
6133 return fixp->fx_frag->fr_address + fixp->fx_where;
6134}
6135
6136#ifdef OBJ_XCOFF
6137
6138/* This is called to see whether a fixup should be adjusted to use a
6139 section symbol. We take the opportunity to change a fixup against
6140 a symbol in the TOC subsegment into a reloc against the
6141 corresponding .tc symbol. */
6142
6143int
98027b10 6144ppc_fix_adjustable (fixS *fix)
252b5132 6145{
b782de16
AM		 6146 valueT val = resolve_symbol_value (fix->fx_addsy);
6147 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6148 TC_SYMFIELD_TYPE *tc;
6149
6150 if (symseg == absolute_section)
6151 return 0;
252b5132 6152
85645aed
TG		 6153 /* Always adjust symbols in debugging sections. */
6154 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6155 return 1;
6156
252b5132 6157 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6158 && fix->fx_addsy != ppc_toc_csect
b782de16 6159 && symseg == data_section
252b5132
RH		 6160 && val >= ppc_toc_frag->fr_address
6161 && (ppc_after_toc_frag == (fragS *) NULL
6162 || val < ppc_after_toc_frag->fr_address))
6163 {
6164 symbolS *sy;
6165
6166 for (sy = symbol_next (ppc_toc_csect);
6167 sy != (symbolS *) NULL;
6168 sy = symbol_next (sy))
6169 {
b782de16
AM		 6170 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6171
96d56e9f 6172 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6173 continue;
96d56e9f 6174 if (sy_tc->symbol_class != XMC_TC)
252b5132 6175 break;
b782de16 6176 if (val == resolve_symbol_value (sy))
252b5132
RH		 6177 {
6178 fix->fx_addsy = sy;
6179 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6180 return 0;
6181 }
6182 }
6183
6184 as_bad_where (fix->fx_file, fix->fx_line,
6185 _("symbol in .toc does not match any .tc"));
6186 }
6187
6188 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6189 tc = symbol_get_tc (fix->fx_addsy);
6190 if (tc->subseg == 0
96d56e9f
NC		 6191 && tc->symbol_class != XMC_TC0
6192 && tc->symbol_class != XMC_TC
b782de16 6193 && symseg != bss_section
252b5132 6194 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6195 && (symseg != data_section
252b5132
RH		 6196 || ppc_toc_csect == NULL
6197 || val < ppc_toc_frag->fr_address
6198 || (ppc_after_toc_frag != NULL
6199 && val >= ppc_after_toc_frag->fr_address)))
6200 {
2fb4b302 6201 symbolS *csect = tc->within;
252b5132 6202
2fb4b302
TG		 6203 /* If the symbol was not declared by a label (eg: a section symbol),
6204 use the section instead of the csect. This doesn't happen in
6205 normal AIX assembly code. */
6206 if (csect == NULL)
6207 csect = seg_info (symseg)->sym;
252b5132 6208
2fb4b302
TG		 6209 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6210 fix->fx_addsy = csect;
252b5132 6211
b782de16 6212 return 0;
252b5132
RH		 6213 }
6214
6215 /* Adjust a reloc against a .lcomm symbol to be against the base
6216 .lcomm. */
b782de16 6217 if (symseg == bss_section
252b5132
RH		 6218 && ! S_IS_EXTERNAL (fix->fx_addsy))
6219 {
b782de16
AM		 6220 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6221
6222 fix->fx_offset += val - resolve_symbol_value (sy);
6223 fix->fx_addsy = sy;
252b5132
RH		 6224 }
6225
6226 return 0;
6227}
6228
6229/* A reloc from one csect to another must be kept. The assembler
6230 will, of course, keep relocs between sections, and it will keep
6231 absolute relocs, but we need to force it to keep PC relative relocs
6232 between two csects in the same section. */
6233
6234int
98027b10 6235ppc_force_relocation (fixS *fix)
252b5132
RH		 6236{
6237 /* At this point fix->fx_addsy should already have been converted to
6238 a csect symbol. If the csect does not include the fragment, then
6239 we need to force the relocation. */
6240 if (fix->fx_pcrel
6241 && fix->fx_addsy != NULL
809ffe0d
ILT		 6242 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6243 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6244 > fix->fx_frag->fr_address)
6245 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6246 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6247 <= fix->fx_frag->fr_address))))
6248 return 1;
6249
ae6063d4 6250 return generic_force_reloc (fix);
252b5132
RH		 6251}
6252
2fb4b302
TG		 6253void
6254ppc_new_dot_label (symbolS *sym)
6255{
6256 /* Anchor this label to the current csect for relocations. */
6257 symbol_get_tc (sym)->within = ppc_current_csect;
6258}
6259
252b5132
RH		 6260#endif /* OBJ_XCOFF */
6261
0baf16f2 6262#ifdef OBJ_ELF
a161fe53
AM		 6263/* If this function returns non-zero, it guarantees that a relocation
6264 will be emitted for a fixup. */
6265
6266int
98027b10 6267ppc_force_relocation (fixS *fix)
a161fe53
AM		 6268{
6269 /* Branch prediction relocations must force a relocation, as must
6270 the vtable description relocs. */
6271 switch (fix->fx_r_type)
6272 {
6273 case BFD_RELOC_PPC_B16_BRTAKEN:
6274 case BFD_RELOC_PPC_B16_BRNTAKEN:
6275 case BFD_RELOC_PPC_BA16_BRTAKEN:
6276 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6277 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6278 case BFD_RELOC_PPC64_TOC:
a161fe53 6279 return 1;
6911b7dc
AM		 6280 case BFD_RELOC_PPC_B26:
6281 case BFD_RELOC_PPC_BA26:
6282 case BFD_RELOC_PPC_B16:
6283 case BFD_RELOC_PPC_BA16:
6284 /* All branch fixups targeting a localentry symbol must
6285 force a relocation. */
6286 if (fix->fx_addsy)
6287 {
6288 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6289 elf_symbol_type *elfsym
6290 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6291 gas_assert (elfsym);
6292 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6293 return 1;
6294 }
6295 break;
a161fe53
AM		 6296 default:
6297 break;
6298 }
6299
cdba85ec
AM		 6300 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6301 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6302 return 1;
6303
ae6063d4 6304 return generic_force_reloc (fix);
a161fe53
AM		 6305}
6306
0baf16f2 6307int
98027b10 6308ppc_fix_adjustable (fixS *fix)
252b5132 6309{
6911b7dc
AM		 6310 switch (fix->fx_r_type)
6311 {
6312 /* All branch fixups targeting a localentry symbol must
6313 continue using the symbol. */
6314 case BFD_RELOC_PPC_B26:
6315 case BFD_RELOC_PPC_BA26:
6316 case BFD_RELOC_PPC_B16:
6317 case BFD_RELOC_PPC_BA16:
6318 case BFD_RELOC_PPC_B16_BRTAKEN:
6319 case BFD_RELOC_PPC_B16_BRNTAKEN:
6320 case BFD_RELOC_PPC_BA16_BRTAKEN:
6321 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6322 if (fix->fx_addsy)
6323 {
6324 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6325 elf_symbol_type *elfsym
6326 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6327 gas_assert (elfsym);
6328 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6329 return 0;
6330 }
6331 break;
6332 default:
6333 break;
6334 }
6335
0baf16f2
AM		 6336 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6337 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6338 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6339 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6340 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6341 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6342 && fix->fx_r_type != BFD_RELOC_GPREL16
6343 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6344 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6345 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6346 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6347}
0baf16f2 6348#endif
252b5132 6349
b9c361e0
JL		 6350void
6351ppc_frag_check (struct frag *fragP)
6352{
6353 if (!fragP->has_code)
6354 return;
6355
6356 if (ppc_mach() == bfd_mach_ppc_vle)
6357 {
6358 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6359 as_bad (_("instruction address is not a multiple of 2"));
6360 }
6361 else
6362 {
6363 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6364 as_bad (_("instruction address is not a multiple of 4"));
6365 }
6366}
6367
3aeeedbb
AM		 6368/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6369 rs_align_code frag. */
6370
6371void
6372ppc_handle_align (struct frag *fragP)
6373{
6374 valueT count = (fragP->fr_next->fr_address
6375 - (fragP->fr_address + fragP->fr_fix));
6376
b9c361e0
JL		 6377 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6378 {
6379 char *dest = fragP->fr_literal + fragP->fr_fix;
6380
6381 fragP->fr_var = 2;
6382 md_number_to_chars (dest, 0x4400, 2);
6383 }
6384 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6385 {
6386 char *dest = fragP->fr_literal + fragP->fr_fix;
6387
6388 fragP->fr_var = 4;
cef4f754
AM		 6389
6390 if (count > 4 * nop_limit && count < 0x2000000)
6391 {
6392 struct frag *rest;
6393
6394 /* Make a branch, then follow with nops. Insert another
6395 frag to handle the nops. */
6396 md_number_to_chars (dest, 0x48000000 + count, 4);
6397 count -= 4;
6398 if (count == 0)
6399 return;
6400
6401 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6402 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6403 fragP->fr_next = rest;
6404 fragP = rest;
6405 rest->fr_address += rest->fr_fix + 4;
6406 rest->fr_fix = 0;
6407 /* If we leave the next frag as rs_align_code we'll come here
6408 again, resulting in a bunch of branches rather than a
6409 branch followed by nops. */
6410 rest->fr_type = rs_align;
6411 dest = rest->fr_literal;
6412 }
6413
3aeeedbb
AM		 6414 md_number_to_chars (dest, 0x60000000, 4);
6415
42240548 6416 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6417 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6418 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6419 {
5817ffd1 6420 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6421 terminating one. Do this by inserting an rs_fill frag immediately
6422 after this one, with its address set to the last nop location.
6423 This will automatically reduce the number of nops in the current
6424 frag by one. */
3aeeedbb
AM		 6425 if (count > 4)
6426 {
6427 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6428
6429 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6430 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6431 group_nop->fr_fix = 0;
6432 group_nop->fr_offset = 1;
6433 group_nop->fr_type = rs_fill;
6434 fragP->fr_next = group_nop;
6435 dest = group_nop->fr_literal;
6436 }
6437
5817ffd1
PB		 6438 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6439 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6440 {
6441 if (ppc_cpu & PPC_OPCODE_E500MC)
6442 /* e500mc group terminating nop: "ori 0,0,0". */
6443 md_number_to_chars (dest, 0x60000000, 4);
6444 else
5817ffd1 6445 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6446 md_number_to_chars (dest, 0x60420000, 4);
6447 }
42240548
PB		 6448 else
6449 /* power6 group terminating nop: "ori 1,1,0". */
6450 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6451 }
6452 }
6453}
6454
252b5132 6455/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6456 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6457
94f592af 6458void
62ebcb5c 6459md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6460{
94f592af 6461 valueT value = * valP;
5656a981
AM		 6462 offsetT fieldval;
6463 const struct powerpc_operand *operand;
252b5132
RH		 6464
6465#ifdef OBJ_ELF
94f592af 6466 if (fixP->fx_addsy != NULL)
252b5132 6467 {
a161fe53 6468 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6469 if (fixP->fx_pcrel)
6470 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6471 }
6472 else
94f592af 6473 fixP->fx_done = 1;
252b5132 6474#else
a161fe53 6475 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6476 the symbol values. If we are doing this relocation the code in
6477 write.c is going to call bfd_install_relocation, which is also
6478 going to use the symbol value. That means that if the reloc is
6479 fully resolved we want to use *valP since bfd_install_relocation is
6480 not being used.
9f0eb232
RS		 6481 However, if the reloc is not fully resolved we do not want to
6482 use *valP, and must use fx_offset instead. If the relocation
6483 is PC-relative, we then need to re-apply md_pcrel_from_section
6484 to this new relocation value. */
94f592af
NC		 6485 if (fixP->fx_addsy == (symbolS *) NULL)
6486 fixP->fx_done = 1;
6487
252b5132 6488 else
9f0eb232
RS		 6489 {
6490 value = fixP->fx_offset;
6491 if (fixP->fx_pcrel)
6492 value -= md_pcrel_from_section (fixP, seg);
6493 }
a161fe53
AM		 6494#endif
6495
6496 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6497 {
a161fe53
AM		 6498 /* We can't actually support subtracting a symbol. */
6499 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6500 }
252b5132 6501
5656a981 6502 operand = NULL;
3b8b57a9 6503 if (fixP->fx_pcrel_adjust != 0)
252b5132 6504 {
5656a981 6505 /* This is a fixup on an instruction. */
3b8b57a9 6506 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6507
5656a981 6508 operand = &powerpc_operands[opindex];
252b5132 6509#ifdef OBJ_XCOFF
0baf16f2
AM		 6510 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6511 does not generate a reloc. It uses the offset of `sym' within its
6512 csect. Other usages, such as `.long sym', generate relocs. This
6513 is the documented behaviour of non-TOC symbols. */
252b5132 6514 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6515 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6516 && operand->shift == 0
2b3c4602 6517 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6518 && fixP->fx_addsy != NULL
6519 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6520 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6521 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6522 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6523 {
94f592af
NC		 6524 value = fixP->fx_offset;
6525 fixP->fx_done = 1;
252b5132 6526 }
ac21e7da
TG		 6527
6528 /* During parsing of instructions, a TOC16 reloc is generated for
6529 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6530 in the toc. But at parse time, SYM may be not yet defined, so
6531 check again here. */
6532 if (fixP->fx_r_type == BFD_RELOC_16
6533 && fixP->fx_addsy != NULL
6534 && ppc_is_toc_sym (fixP->fx_addsy))
6535 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6536#endif
5656a981
AM		 6537 }
6538
6539 /* Calculate value to be stored in field. */
6540 fieldval = value;
6541 switch (fixP->fx_r_type)
6542 {
1ec2d25e 6543#ifdef OBJ_ELF
5656a981
AM		 6544 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6545 case BFD_RELOC_PPC_VLE_LO16A:
6546 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6547#endif
5656a981
AM		 6548 case BFD_RELOC_LO16:
6549 case BFD_RELOC_LO16_PCREL:
6550 fieldval = value & 0xffff;
6551 sign_extend_16:
6552 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6553 fieldval = SEX16 (fieldval);
5656a981
AM		 6554 fixP->fx_no_overflow = 1;
6555 break;
3c9d25f4 6556
f9c6b907
AM		 6557 case BFD_RELOC_HI16:
6558 case BFD_RELOC_HI16_PCREL:
5656a981 6559#ifdef OBJ_ELF
f9c6b907
AM		 6560 if (REPORT_OVERFLOW_HI && ppc_obj64)
6561 {
6562 fieldval = value >> 16;
6563 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6564 {
6565 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6566 fieldval = ((valueT) fieldval ^ sign) - sign;
6567 }
6568 break;
6569 }
6570 /* Fall thru */
6571
5656a981
AM		 6572 case BFD_RELOC_PPC_VLE_HI16A:
6573 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6574 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6575#endif
5656a981
AM		 6576 fieldval = PPC_HI (value);
6577 goto sign_extend_16;
0baf16f2 6578
f9c6b907
AM		 6579 case BFD_RELOC_HI16_S:
6580 case BFD_RELOC_HI16_S_PCREL:
5656a981 6581#ifdef OBJ_ELF
f9c6b907
AM		 6582 if (REPORT_OVERFLOW_HI && ppc_obj64)
6583 {
6584 fieldval = (value + 0x8000) >> 16;
6585 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6586 {
6587 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6588 fieldval = ((valueT) fieldval ^ sign) - sign;
6589 }
6590 break;
6591 }
6592 /* Fall thru */
6593
5656a981
AM		 6594 case BFD_RELOC_PPC_VLE_HA16A:
6595 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6596 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6597#endif
5656a981
AM		 6598 fieldval = PPC_HA (value);
6599 goto sign_extend_16;
0baf16f2 6600
3b8b57a9 6601#ifdef OBJ_ELF
5656a981
AM		 6602 case BFD_RELOC_PPC64_HIGHER:
6603 fieldval = PPC_HIGHER (value);
6604 goto sign_extend_16;
252b5132 6605
5656a981
AM		 6606 case BFD_RELOC_PPC64_HIGHER_S:
6607 fieldval = PPC_HIGHERA (value);
6608 goto sign_extend_16;
0baf16f2 6609
5656a981
AM		 6610 case BFD_RELOC_PPC64_HIGHEST:
6611 fieldval = PPC_HIGHEST (value);
6612 goto sign_extend_16;
0baf16f2 6613
5656a981
AM		 6614 case BFD_RELOC_PPC64_HIGHEST_S:
6615 fieldval = PPC_HIGHESTA (value);
6616 goto sign_extend_16;
6617#endif
6618
6619 default:
6620 break;
6621 }
6622
6623 if (operand != NULL)
6624 {
6625 /* Handle relocs in an insn. */
6626 char *where;
6627 unsigned long insn;
0baf16f2 6628
5656a981
AM		 6629 switch (fixP->fx_r_type)
6630 {
7fa9fcb6 6631#ifdef OBJ_ELF
3b8b57a9
AM		 6632 /* The following relocs can't be calculated by the assembler.
6633 Leave the field zero. */
cdba85ec
AM		 6634 case BFD_RELOC_PPC_TPREL16:
6635 case BFD_RELOC_PPC_TPREL16_LO:
6636 case BFD_RELOC_PPC_TPREL16_HI:
6637 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6638 case BFD_RELOC_PPC_DTPREL16:
6639 case BFD_RELOC_PPC_DTPREL16_LO:
6640 case BFD_RELOC_PPC_DTPREL16_HI:
6641 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6642 case BFD_RELOC_PPC_GOT_TLSGD16:
6643 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6644 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6645 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6646 case BFD_RELOC_PPC_GOT_TLSLD16:
6647 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6648 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6649 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6650 case BFD_RELOC_PPC_GOT_TPREL16:
6651 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6652 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6653 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6654 case BFD_RELOC_PPC_GOT_DTPREL16:
6655 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6656 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6657 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6658 case BFD_RELOC_PPC64_TPREL16_DS:
6659 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6660 case BFD_RELOC_PPC64_TPREL16_HIGH:
6661 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6662 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6663 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6664 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6665 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6666 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6667 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6668 case BFD_RELOC_PPC64_DTPREL16_DS:
6669 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6670 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6671 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6672 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6673 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6674 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6675 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6676 fieldval = 0;
cdba85ec 6677 break;
3b8b57a9
AM		 6678
6679 /* These also should leave the field zero for the same
6680 reason. Note that older versions of gas wrote values
6681 here. If we want to go back to the old behaviour, then
6682 all _LO and _LO_DS cases will need to be treated like
6683 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6684 case BFD_RELOC_16_GOTOFF:
6685 case BFD_RELOC_LO16_GOTOFF:
6686 case BFD_RELOC_HI16_GOTOFF:
6687 case BFD_RELOC_HI16_S_GOTOFF:
6688 case BFD_RELOC_LO16_PLTOFF:
6689 case BFD_RELOC_HI16_PLTOFF:
6690 case BFD_RELOC_HI16_S_PLTOFF:
6691 case BFD_RELOC_GPREL16:
6692 case BFD_RELOC_16_BASEREL:
6693 case BFD_RELOC_LO16_BASEREL:
6694 case BFD_RELOC_HI16_BASEREL:
6695 case BFD_RELOC_HI16_S_BASEREL:
6696 case BFD_RELOC_PPC_TOC16:
6697 case BFD_RELOC_PPC64_TOC16_LO:
6698 case BFD_RELOC_PPC64_TOC16_HI:
6699 case BFD_RELOC_PPC64_TOC16_HA:
6700 case BFD_RELOC_PPC64_PLTGOT16:
6701 case BFD_RELOC_PPC64_PLTGOT16_LO:
6702 case BFD_RELOC_PPC64_PLTGOT16_HI:
6703 case BFD_RELOC_PPC64_PLTGOT16_HA:
6704 case BFD_RELOC_PPC64_GOT16_DS:
6705 case BFD_RELOC_PPC64_GOT16_LO_DS:
6706 case BFD_RELOC_PPC64_PLT16_LO_DS:
6707 case BFD_RELOC_PPC64_SECTOFF_DS:
6708 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6709 case BFD_RELOC_PPC64_TOC16_DS:
6710 case BFD_RELOC_PPC64_TOC16_LO_DS:
6711 case BFD_RELOC_PPC64_PLTGOT16_DS:
6712 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6713 case BFD_RELOC_PPC_EMB_NADDR16:
6714 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6715 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6716 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6717 case BFD_RELOC_PPC_EMB_SDAI16:
6718 case BFD_RELOC_PPC_EMB_SDA2I16:
6719 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6720 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6721 case BFD_RELOC_PPC_EMB_MRKREF:
6722 case BFD_RELOC_PPC_EMB_RELSEC16:
6723 case BFD_RELOC_PPC_EMB_RELST_LO:
6724 case BFD_RELOC_PPC_EMB_RELST_HI:
6725 case BFD_RELOC_PPC_EMB_RELST_HA:
6726 case BFD_RELOC_PPC_EMB_BIT_FLD:
6727 case BFD_RELOC_PPC_EMB_RELSDA:
6728 case BFD_RELOC_PPC_VLE_SDA21:
6729 case BFD_RELOC_PPC_VLE_SDA21_LO:
6730 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6731 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6732 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6733 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6734 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6735 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6736 gas_assert (fixP->fx_addsy != NULL);
6737 /* Fall thru */
6738
6739 case BFD_RELOC_PPC_TLS:
6740 case BFD_RELOC_PPC_TLSGD:
6741 case BFD_RELOC_PPC_TLSLD:
6742 fieldval = 0;
3b8b57a9 6743 break;
7fa9fcb6
TG		 6744#endif
6745
6746#ifdef OBJ_XCOFF
6747 case BFD_RELOC_PPC_B16:
6748 /* Adjust the offset to the instruction boundary. */
6749 fieldval += 2;
6750 break;
6751#endif
252b5132 6752
f728387b
AM		 6753 case BFD_RELOC_VTABLE_INHERIT:
6754 case BFD_RELOC_VTABLE_ENTRY:
6755 case BFD_RELOC_PPC_DTPMOD:
6756 case BFD_RELOC_PPC_TPREL:
6757 case BFD_RELOC_PPC_DTPREL:
6758 case BFD_RELOC_PPC_COPY:
6759 case BFD_RELOC_PPC_GLOB_DAT:
6760 case BFD_RELOC_32_PLT_PCREL:
6761 case BFD_RELOC_PPC_EMB_NADDR32:
6762 case BFD_RELOC_PPC64_TOC:
6763 case BFD_RELOC_CTOR:
6764 case BFD_RELOC_32:
6765 case BFD_RELOC_32_PCREL:
6766 case BFD_RELOC_RVA:
6767 case BFD_RELOC_64:
6768 case BFD_RELOC_64_PCREL:
6769 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6770 as_bad_where (fixP->fx_file, fixP->fx_line,
6771 _("%s unsupported as instruction fixup"),
6772 bfd_get_reloc_code_name (fixP->fx_r_type));
6773 fixP->fx_done = 1;
6774 return;
6775
3b8b57a9 6776 default:
252b5132 6777 break;
3b8b57a9 6778 }
252b5132 6779
3b8b57a9
AM		 6780#ifdef OBJ_ELF
6781/* powerpc uses RELA style relocs, so if emitting a reloc the field
6782 contents can stay at zero. */
6783#define APPLY_RELOC fixP->fx_done
6784#else
6785#define APPLY_RELOC 1
6786#endif
6787 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6788 {
6789 /* Fetch the instruction, insert the fully resolved operand
6790 value, and stuff the instruction back again. */
6791 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6792 if (target_big_endian)
31a91399 6793 {
3b8b57a9
AM		 6794 if (fixP->fx_size == 4)
6795 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6796 else
3b8b57a9 6797 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6798 }
6799 else
3b8b57a9
AM		 6800 {
6801 if (fixP->fx_size == 4)
6802 insn = bfd_getl32 ((unsigned char *) where);
6803 else
6804 insn = bfd_getl16 ((unsigned char *) where);
6805 }
6806 insn = ppc_insert_operand (insn, operand, fieldval,
6807 fixP->tc_fix_data.ppc_cpu,
6808 fixP->fx_file, fixP->fx_line);
6809 if (target_big_endian)
6810 {
6811 if (fixP->fx_size == 4)
6812 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6813 else
6814 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6815 }
6816 else
6817 {
6818 if (fixP->fx_size == 4)
6819 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6820 else
6821 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6822 }
6823 }
6824
6825 if (fixP->fx_done)
6826 /* Nothing else to do here. */
6827 return;
6828
6829 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6830 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9
AM		 6831 {
6832 char *sfile;
6833 unsigned int sline;
6834
6835 /* Use expr_symbol_where to see if this is an expression
6836 symbol. */
6837 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6838 as_bad_where (fixP->fx_file, fixP->fx_line,
6839 _("unresolved expression that must be resolved"));
6840 else
6841 as_bad_where (fixP->fx_file, fixP->fx_line,
6842 _("unsupported relocation against %s"),
6843 S_GET_NAME (fixP->fx_addsy));
6844 fixP->fx_done = 1;
6845 return;
6846 }
6847 }
6848 else
6849 {
6850 /* Handle relocs in data. */
6851 switch (fixP->fx_r_type)
6852 {
252b5132 6853 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6854 if (fixP->fx_addsy
6855 && !S_IS_DEFINED (fixP->fx_addsy)
6856 && !S_IS_WEAK (fixP->fx_addsy))
6857 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6858 /* Fall thru */
252b5132
RH		 6859
6860 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6861 fixP->fx_done = 0;
252b5132
RH		 6862 break;
6863
0baf16f2 6864#ifdef OBJ_ELF
3b8b57a9
AM		 6865 /* These can appear with @l etc. in data. */
6866 case BFD_RELOC_LO16:
3b8b57a9 6867 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6868 case BFD_RELOC_HI16:
3b8b57a9 6869 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6870 case BFD_RELOC_HI16_S:
3b8b57a9 6871 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6872 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6873 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6874 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6875 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6876 case BFD_RELOC_PPC64_ADDR16_HIGH:
6877 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6878 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6879 break;
6880
6881 case BFD_RELOC_PPC_DTPMOD:
6882 case BFD_RELOC_PPC_TPREL:
6883 case BFD_RELOC_PPC_DTPREL:
6884 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6885 break;
6886
6887 /* Just punt all of these to the linker. */
6888 case BFD_RELOC_PPC_B16_BRTAKEN:
6889 case BFD_RELOC_PPC_B16_BRNTAKEN:
6890 case BFD_RELOC_16_GOTOFF:
6891 case BFD_RELOC_LO16_GOTOFF:
6892 case BFD_RELOC_HI16_GOTOFF:
6893 case BFD_RELOC_HI16_S_GOTOFF:
6894 case BFD_RELOC_LO16_PLTOFF:
6895 case BFD_RELOC_HI16_PLTOFF:
6896 case BFD_RELOC_HI16_S_PLTOFF:
6897 case BFD_RELOC_PPC_COPY:
6898 case BFD_RELOC_PPC_GLOB_DAT:
6899 case BFD_RELOC_16_BASEREL:
6900 case BFD_RELOC_LO16_BASEREL:
6901 case BFD_RELOC_HI16_BASEREL:
6902 case BFD_RELOC_HI16_S_BASEREL:
6903 case BFD_RELOC_PPC_TLS:
6904 case BFD_RELOC_PPC_DTPREL16_LO:
6905 case BFD_RELOC_PPC_DTPREL16_HI:
6906 case BFD_RELOC_PPC_DTPREL16_HA:
6907 case BFD_RELOC_PPC_TPREL16_LO:
6908 case BFD_RELOC_PPC_TPREL16_HI:
6909 case BFD_RELOC_PPC_TPREL16_HA:
6910 case BFD_RELOC_PPC_GOT_TLSGD16:
6911 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6912 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6913 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6914 case BFD_RELOC_PPC_GOT_TLSLD16:
6915 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6916 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6917 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6918 case BFD_RELOC_PPC_GOT_DTPREL16:
6919 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6920 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6921 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6922 case BFD_RELOC_PPC_GOT_TPREL16:
6923 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6924 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6925 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6926 case BFD_RELOC_24_PLT_PCREL:
6927 case BFD_RELOC_PPC_LOCAL24PC:
6928 case BFD_RELOC_32_PLT_PCREL:
6929 case BFD_RELOC_GPREL16:
6930 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6931 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6932 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6933 case BFD_RELOC_PPC_EMB_NADDR32:
6934 case BFD_RELOC_PPC_EMB_NADDR16:
6935 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6936 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6937 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6938 case BFD_RELOC_PPC_EMB_SDAI16:
6939 case BFD_RELOC_PPC_EMB_SDA2REL:
6940 case BFD_RELOC_PPC_EMB_SDA2I16:
6941 case BFD_RELOC_PPC_EMB_SDA21:
6942 case BFD_RELOC_PPC_VLE_SDA21_LO:
6943 case BFD_RELOC_PPC_EMB_MRKREF:
6944 case BFD_RELOC_PPC_EMB_RELSEC16:
6945 case BFD_RELOC_PPC_EMB_RELST_LO:
6946 case BFD_RELOC_PPC_EMB_RELST_HI:
6947 case BFD_RELOC_PPC_EMB_RELST_HA:
6948 case BFD_RELOC_PPC_EMB_BIT_FLD:
6949 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6950 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6951 case BFD_RELOC_PPC_TOC16:
6952 case BFD_RELOC_PPC64_TOC16_LO:
6953 case BFD_RELOC_PPC64_TOC16_HI:
6954 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6955 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6956 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6957 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6958 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6959 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6960 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6961 case BFD_RELOC_PPC64_TPREL16_HIGH:
6962 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6963 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6964 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6965 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6966 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6967 fixP->fx_done = 0;
0baf16f2 6968 break;
0baf16f2 6969#endif
3b8b57a9
AM		 6970
6971#ifdef OBJ_XCOFF
6972 case BFD_RELOC_NONE:
3b8b57a9 6973#endif
5656a981
AM		 6974 case BFD_RELOC_CTOR:
6975 case BFD_RELOC_32:
6976 case BFD_RELOC_32_PCREL:
6977 case BFD_RELOC_RVA:
6978 case BFD_RELOC_64:
6979 case BFD_RELOC_64_PCREL:
6980 case BFD_RELOC_16:
6981 case BFD_RELOC_16_PCREL:
6982 case BFD_RELOC_8:
6983 break;
3b8b57a9 6984
252b5132 6985 default:
bc805888 6986 fprintf (stderr,
94f592af 6987 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6988 fflush (stderr);
252b5132
RH		 6989 abort ();
6990 }
46b596ff 6991
5656a981 6992 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6993 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 6994 fieldval, fixP->fx_size);
bf7279d5
AM		 6995 if (warn_476
6996 && (seg->flags & SEC_CODE) != 0
6997 && fixP->fx_size == 4
6998 && fixP->fx_done
6999 && !fixP->fx_tcbit
7000 && (fixP->fx_r_type == BFD_RELOC_32
7001 || fixP->fx_r_type == BFD_RELOC_CTOR
7002 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7003 as_warn_where (fixP->fx_file, fixP->fx_line,
7004 _("data in executable section"));
5656a981
AM		 7005 }
7006
7007 /* We are only able to convert some relocs to pc-relative. */
7008 if (!fixP->fx_done && fixP->fx_pcrel)
7009 {
7010 switch (fixP->fx_r_type)
7011 {
7012 case BFD_RELOC_LO16:
7013 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7014 break;
7015
7016 case BFD_RELOC_HI16:
7017 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7018 break;
7019
7020 case BFD_RELOC_HI16_S:
7021 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7022 break;
7023
7024 case BFD_RELOC_64:
7025 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7026 break;
7027
7028 case BFD_RELOC_32:
7029 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7030 break;
7031
7032 case BFD_RELOC_16:
7033 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7034 break;
7035
7036 /* Some of course are already pc-relative. */
7037 case BFD_RELOC_LO16_PCREL:
7038 case BFD_RELOC_HI16_PCREL:
7039 case BFD_RELOC_HI16_S_PCREL:
7040 case BFD_RELOC_64_PCREL:
7041 case BFD_RELOC_32_PCREL:
7042 case BFD_RELOC_16_PCREL:
7043 case BFD_RELOC_PPC_B16:
7044 case BFD_RELOC_PPC_B16_BRTAKEN:
7045 case BFD_RELOC_PPC_B16_BRNTAKEN:
7046 case BFD_RELOC_PPC_B26:
7047 case BFD_RELOC_PPC_LOCAL24PC:
7048 case BFD_RELOC_24_PLT_PCREL:
7049 case BFD_RELOC_32_PLT_PCREL:
7050 case BFD_RELOC_64_PLT_PCREL:
7051 case BFD_RELOC_PPC_VLE_REL8:
7052 case BFD_RELOC_PPC_VLE_REL15:
7053 case BFD_RELOC_PPC_VLE_REL24:
7054 break;
7055
7056 default:
7057 if (fixP->fx_addsy)
7058 {
7059 char *sfile;
7060 unsigned int sline;
7061
7062 /* Use expr_symbol_where to see if this is an
7063 expression symbol. */
7064 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7065 as_bad_where (fixP->fx_file, fixP->fx_line,
7066 _("unresolved expression that must"
7067 " be resolved"));
7068 else
7069 as_bad_where (fixP->fx_file, fixP->fx_line,
7070 _("cannot emit PC relative %s relocation"
7071 " against %s"),
7072 bfd_get_reloc_code_name (fixP->fx_r_type),
7073 S_GET_NAME (fixP->fx_addsy));
7074 }
7075 else
7076 as_bad_where (fixP->fx_file, fixP->fx_line,
7077 _("unable to resolve expression"));
7078 fixP->fx_done = 1;
7079 break;
7080 }
252b5132
RH		 7081 }
7082
7083#ifdef OBJ_ELF
3b8b57a9 7084 ppc_elf_validate_fix (fixP, seg);
94f592af 7085 fixP->fx_addnumber = value;
4e6935a6
AM		 7086
7087 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7088 from the section contents. If we are going to be emitting a reloc
7089 then the section contents are immaterial, so don't warn if they
7090 happen to overflow. Leave such warnings to ld. */
7091 if (!fixP->fx_done)
a38a07e0
AM		 7092 {
7093 fixP->fx_no_overflow = 1;
7094
7095 /* Arrange to emit .TOC. as a normal symbol if used in anything
7096 but .TOC.@tocbase. */
7097 if (ppc_obj64
7098 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7099 && fixP->fx_addsy != NULL
7100 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7101 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7102 }
252b5132 7103#else
94f592af
NC		 7104 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7105 fixP->fx_addnumber = 0;
252b5132
RH		 7106 else
7107 {
7108#ifdef TE_PE
94f592af 7109 fixP->fx_addnumber = 0;
252b5132 7110#else
8edcbfcd
TG		 7111 /* We want to use the offset within the toc, not the actual VMA
7112 of the symbol. */
94f592af 7113 fixP->fx_addnumber =
8edcbfcd
TG		 7114 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7115 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7116 /* Set *valP to avoid errors. */
7117 *valP = value;
252b5132
RH		 7118#endif
7119 }
7120#endif
252b5132
RH		 7121}
7122
7123/* Generate a reloc for a fixup. */
7124
7125arelent *
98027b10 7126tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7127{
7128 arelent *reloc;
7129
7130 reloc = (arelent *) xmalloc (sizeof (arelent));
7131
49309057
ILT		 7132 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7133 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7134 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7135 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7136 if (reloc->howto == (reloc_howto_type *) NULL)
7137 {
7138 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7139 _("reloc %d not supported by object file format"),
7140 (int) fixp->fx_r_type);
252b5132
RH		 7141 return NULL;
7142 }
7143 reloc->addend = fixp->fx_addnumber;
7144
7145 return reloc;
7146}
75e21f08
JJ		 7147
7148void
98027b10 7149ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7150{
7151 cfi_add_CFA_def_cfa (1, 0);
7152}
7153
7154int
1df69f4f 7155tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7156{
7157 unsigned int regnum = -1;
7158 unsigned int i;
7159 const char *p;
7160 char *q;
7161 static struct { char *name; int dw2regnum; } regnames[] =
7162 {
7163 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7164 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7165 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7166 { "spe_acc", 111 }, { "spefscr", 112 }
7167 };
7168
7169 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7170 if (strcmp (regnames[i].name, regname) == 0)
7171 return regnames[i].dw2regnum;
7172
7173 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7174 {
7175 p = regname + 1 + (regname[1] == '.');
7176 regnum = strtoul (p, &q, 10);
7177 if (p == q || *q || regnum >= 32)
7178 return -1;
7179 if (regname[0] == 'f')
b7d7dc63 7180 regnum += 32;
75e21f08 7181 else if (regname[0] == 'v')
b7d7dc63 7182 regnum += 77;
75e21f08
JJ		 7183 }
7184 else if (regname[0] == 'c' && regname[1] == 'r')
7185 {
7186 p = regname + 2 + (regname[2] == '.');
7187 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7188 return -1;
75e21f08
JJ		 7189 regnum = p[0] - '0' + 68;
7190 }
7191 return regnum;
7192}
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