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[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
066be9f7
PB		 361
362 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
363 { "f.33", 33 },
364 { "f.34", 34 },
365 { "f.35", 35 },
366 { "f.36", 36 },
367 { "f.37", 37 },
368 { "f.38", 38 },
369 { "f.39", 39 },
81d4177b 370 { "f.4", 4 },
066be9f7
PB		 371 { "f.40", 40 },
372 { "f.41", 41 },
373 { "f.42", 42 },
374 { "f.43", 43 },
375 { "f.44", 44 },
376 { "f.45", 45 },
377 { "f.46", 46 },
378 { "f.47", 47 },
379 { "f.48", 48 },
380 { "f.49", 49 },
81d4177b 381 { "f.5", 5 },
066be9f7
PB		 382 { "f.50", 50 },
383 { "f.51", 51 },
384 { "f.52", 52 },
385 { "f.53", 53 },
386 { "f.54", 54 },
387 { "f.55", 55 },
388 { "f.56", 56 },
389 { "f.57", 57 },
390 { "f.58", 58 },
391 { "f.59", 59 },
81d4177b 392 { "f.6", 6 },
066be9f7
PB		 393 { "f.60", 60 },
394 { "f.61", 61 },
395 { "f.62", 62 },
396 { "f.63", 63 },
81d4177b
KH		 397 { "f.7", 7 },
398 { "f.8", 8 },
399 { "f.9", 9 },
400
401 { "f0", 0 },
402 { "f1", 1 },
403 { "f10", 10 },
404 { "f11", 11 },
405 { "f12", 12 },
406 { "f13", 13 },
407 { "f14", 14 },
408 { "f15", 15 },
409 { "f16", 16 },
410 { "f17", 17 },
411 { "f18", 18 },
412 { "f19", 19 },
413 { "f2", 2 },
414 { "f20", 20 },
415 { "f21", 21 },
416 { "f22", 22 },
417 { "f23", 23 },
418 { "f24", 24 },
419 { "f25", 25 },
420 { "f26", 26 },
421 { "f27", 27 },
422 { "f28", 28 },
423 { "f29", 29 },
424 { "f3", 3 },
252b5132
RH		 425 { "f30", 30 },
426 { "f31", 31 },
066be9f7
PB		 427
428 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
429 { "f33", 33 },
430 { "f34", 34 },
431 { "f35", 35 },
432 { "f36", 36 },
433 { "f37", 37 },
434 { "f38", 38 },
435 { "f39", 39 },
81d4177b 436 { "f4", 4 },
066be9f7
PB		 437 { "f40", 40 },
438 { "f41", 41 },
439 { "f42", 42 },
440 { "f43", 43 },
441 { "f44", 44 },
442 { "f45", 45 },
443 { "f46", 46 },
444 { "f47", 47 },
445 { "f48", 48 },
446 { "f49", 49 },
81d4177b 447 { "f5", 5 },
066be9f7
PB		 448 { "f50", 50 },
449 { "f51", 51 },
450 { "f52", 52 },
451 { "f53", 53 },
452 { "f54", 54 },
453 { "f55", 55 },
454 { "f56", 56 },
455 { "f57", 57 },
456 { "f58", 58 },
457 { "f59", 59 },
81d4177b 458 { "f6", 6 },
066be9f7
PB		 459 { "f60", 60 },
460 { "f61", 61 },
461 { "f62", 62 },
462 { "f63", 63 },
81d4177b
KH		 463 { "f7", 7 },
464 { "f8", 8 },
465 { "f9", 9 },
252b5132
RH		 466
467 { "fpscr", 0 },
468
c3d65c1c
BE		 469 /* Quantization registers used with pair single instructions. */
470 { "gqr.0", 0 },
471 { "gqr.1", 1 },
472 { "gqr.2", 2 },
473 { "gqr.3", 3 },
474 { "gqr.4", 4 },
475 { "gqr.5", 5 },
476 { "gqr.6", 6 },
477 { "gqr.7", 7 },
478 { "gqr0", 0 },
479 { "gqr1", 1 },
480 { "gqr2", 2 },
481 { "gqr3", 3 },
482 { "gqr4", 4 },
483 { "gqr5", 5 },
484 { "gqr6", 6 },
485 { "gqr7", 7 },
486
252b5132
RH		 487 { "lr", 8 }, /* Link Register */
488
489 { "pmr", 0 },
490
491 { "r.0", 0 }, /* General Purpose Registers */
492 { "r.1", 1 },
493 { "r.10", 10 },
494 { "r.11", 11 },
495 { "r.12", 12 },
496 { "r.13", 13 },
497 { "r.14", 14 },
498 { "r.15", 15 },
499 { "r.16", 16 },
500 { "r.17", 17 },
501 { "r.18", 18 },
502 { "r.19", 19 },
503 { "r.2", 2 },
504 { "r.20", 20 },
505 { "r.21", 21 },
506 { "r.22", 22 },
507 { "r.23", 23 },
508 { "r.24", 24 },
509 { "r.25", 25 },
510 { "r.26", 26 },
511 { "r.27", 27 },
512 { "r.28", 28 },
513 { "r.29", 29 },
514 { "r.3", 3 },
515 { "r.30", 30 },
516 { "r.31", 31 },
517 { "r.4", 4 },
518 { "r.5", 5 },
519 { "r.6", 6 },
520 { "r.7", 7 },
521 { "r.8", 8 },
522 { "r.9", 9 },
523
524 { "r.sp", 1 }, /* Stack Pointer */
525
526 { "r.toc", 2 }, /* Pointer to the table of contents */
527
528 { "r0", 0 }, /* More general purpose registers */
529 { "r1", 1 },
530 { "r10", 10 },
531 { "r11", 11 },
532 { "r12", 12 },
533 { "r13", 13 },
534 { "r14", 14 },
535 { "r15", 15 },
536 { "r16", 16 },
537 { "r17", 17 },
538 { "r18", 18 },
539 { "r19", 19 },
540 { "r2", 2 },
541 { "r20", 20 },
542 { "r21", 21 },
543 { "r22", 22 },
544 { "r23", 23 },
545 { "r24", 24 },
546 { "r25", 25 },
547 { "r26", 26 },
548 { "r27", 27 },
549 { "r28", 28 },
550 { "r29", 29 },
551 { "r3", 3 },
552 { "r30", 30 },
553 { "r31", 31 },
554 { "r4", 4 },
555 { "r5", 5 },
556 { "r6", 6 },
557 { "r7", 7 },
558 { "r8", 8 },
559 { "r9", 9 },
560
561 { "rtoc", 2 }, /* Table of contents */
562
563 { "sdr1", 25 }, /* Storage Description Register 1 */
564
565 { "sp", 1 },
566
567 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
568 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 569
066be9f7 570 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 571 { "v.1", 1 },
572 { "v.10", 10 },
573 { "v.11", 11 },
574 { "v.12", 12 },
575 { "v.13", 13 },
576 { "v.14", 14 },
577 { "v.15", 15 },
578 { "v.16", 16 },
579 { "v.17", 17 },
580 { "v.18", 18 },
581 { "v.19", 19 },
582 { "v.2", 2 },
583 { "v.20", 20 },
584 { "v.21", 21 },
585 { "v.22", 22 },
586 { "v.23", 23 },
587 { "v.24", 24 },
588 { "v.25", 25 },
589 { "v.26", 26 },
590 { "v.27", 27 },
591 { "v.28", 28 },
592 { "v.29", 29 },
593 { "v.3", 3 },
7a899fff
C		 594 { "v.30", 30 },
595 { "v.31", 31 },
81d4177b
KH		 596 { "v.4", 4 },
597 { "v.5", 5 },
598 { "v.6", 6 },
599 { "v.7", 7 },
600 { "v.8", 8 },
601 { "v.9", 9 },
7a899fff
C		 602
603 { "v0", 0 },
81d4177b
KH		 604 { "v1", 1 },
605 { "v10", 10 },
606 { "v11", 11 },
607 { "v12", 12 },
608 { "v13", 13 },
609 { "v14", 14 },
610 { "v15", 15 },
611 { "v16", 16 },
612 { "v17", 17 },
613 { "v18", 18 },
614 { "v19", 19 },
615 { "v2", 2 },
616 { "v20", 20 },
617 { "v21", 21 },
618 { "v22", 22 },
619 { "v23", 23 },
620 { "v24", 24 },
621 { "v25", 25 },
622 { "v26", 26 },
623 { "v27", 27 },
624 { "v28", 28 },
625 { "v29", 29 },
626 { "v3", 3 },
7a899fff
C		 627 { "v30", 30 },
628 { "v31", 31 },
81d4177b
KH		 629 { "v4", 4 },
630 { "v5", 5 },
631 { "v6", 6 },
632 { "v7", 7 },
633 { "v8", 8 },
7a899fff 634 { "v9", 9 },
252b5132 635
066be9f7
PB		 636 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
637 { "vs.1", 1 },
638 { "vs.10", 10 },
639 { "vs.11", 11 },
640 { "vs.12", 12 },
641 { "vs.13", 13 },
642 { "vs.14", 14 },
643 { "vs.15", 15 },
644 { "vs.16", 16 },
645 { "vs.17", 17 },
646 { "vs.18", 18 },
647 { "vs.19", 19 },
648 { "vs.2", 2 },
649 { "vs.20", 20 },
650 { "vs.21", 21 },
651 { "vs.22", 22 },
652 { "vs.23", 23 },
653 { "vs.24", 24 },
654 { "vs.25", 25 },
655 { "vs.26", 26 },
656 { "vs.27", 27 },
657 { "vs.28", 28 },
658 { "vs.29", 29 },
659 { "vs.3", 3 },
660 { "vs.30", 30 },
661 { "vs.31", 31 },
662 { "vs.32", 32 },
663 { "vs.33", 33 },
664 { "vs.34", 34 },
665 { "vs.35", 35 },
666 { "vs.36", 36 },
667 { "vs.37", 37 },
668 { "vs.38", 38 },
669 { "vs.39", 39 },
670 { "vs.4", 4 },
671 { "vs.40", 40 },
672 { "vs.41", 41 },
673 { "vs.42", 42 },
674 { "vs.43", 43 },
675 { "vs.44", 44 },
676 { "vs.45", 45 },
677 { "vs.46", 46 },
678 { "vs.47", 47 },
679 { "vs.48", 48 },
680 { "vs.49", 49 },
681 { "vs.5", 5 },
682 { "vs.50", 50 },
683 { "vs.51", 51 },
684 { "vs.52", 52 },
685 { "vs.53", 53 },
686 { "vs.54", 54 },
687 { "vs.55", 55 },
688 { "vs.56", 56 },
689 { "vs.57", 57 },
690 { "vs.58", 58 },
691 { "vs.59", 59 },
692 { "vs.6", 6 },
693 { "vs.60", 60 },
694 { "vs.61", 61 },
695 { "vs.62", 62 },
696 { "vs.63", 63 },
697 { "vs.7", 7 },
698 { "vs.8", 8 },
699 { "vs.9", 9 },
700
701 { "vs0", 0 },
702 { "vs1", 1 },
703 { "vs10", 10 },
704 { "vs11", 11 },
705 { "vs12", 12 },
706 { "vs13", 13 },
707 { "vs14", 14 },
708 { "vs15", 15 },
709 { "vs16", 16 },
710 { "vs17", 17 },
711 { "vs18", 18 },
712 { "vs19", 19 },
713 { "vs2", 2 },
714 { "vs20", 20 },
715 { "vs21", 21 },
716 { "vs22", 22 },
717 { "vs23", 23 },
718 { "vs24", 24 },
719 { "vs25", 25 },
720 { "vs26", 26 },
721 { "vs27", 27 },
722 { "vs28", 28 },
723 { "vs29", 29 },
724 { "vs3", 3 },
725 { "vs30", 30 },
726 { "vs31", 31 },
727 { "vs32", 32 },
728 { "vs33", 33 },
729 { "vs34", 34 },
730 { "vs35", 35 },
731 { "vs36", 36 },
732 { "vs37", 37 },
733 { "vs38", 38 },
734 { "vs39", 39 },
735 { "vs4", 4 },
736 { "vs40", 40 },
737 { "vs41", 41 },
738 { "vs42", 42 },
739 { "vs43", 43 },
740 { "vs44", 44 },
741 { "vs45", 45 },
742 { "vs46", 46 },
743 { "vs47", 47 },
744 { "vs48", 48 },
745 { "vs49", 49 },
746 { "vs5", 5 },
747 { "vs50", 50 },
748 { "vs51", 51 },
749 { "vs52", 52 },
750 { "vs53", 53 },
751 { "vs54", 54 },
752 { "vs55", 55 },
753 { "vs56", 56 },
754 { "vs57", 57 },
755 { "vs58", 58 },
756 { "vs59", 59 },
757 { "vs6", 6 },
758 { "vs60", 60 },
759 { "vs61", 61 },
760 { "vs62", 62 },
761 { "vs63", 63 },
762 { "vs7", 7 },
763 { "vs8", 8 },
764 { "vs9", 9 },
765
252b5132
RH		 766 { "xer", 1 },
767
768};
769
bc805888 770#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 771
772/* Given NAME, find the register number associated with that name, return
773 the integer value associated with the given name or -1 on failure. */
774
252b5132 775static int
98027b10 776reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 777{
778 int middle, low, high;
779 int cmp;
780
781 low = 0;
782 high = regcount - 1;
783
784 do
785 {
786 middle = (low + high) / 2;
787 cmp = strcasecmp (name, regs[middle].name);
788 if (cmp < 0)
789 high = middle - 1;
790 else if (cmp > 0)
791 low = middle + 1;
792 else
793 return regs[middle].value;
794 }
795 while (low <= high);
796
797 return -1;
798}
799
800/*
99a814a1 801 * Summary of register_name.
252b5132
RH		 802 *
803 * in: Input_line_pointer points to 1st char of operand.
804 *
805 * out: A expressionS.
806 * The operand may have been a register: in this case, X_op == O_register,
807 * X_add_number is set to the register number, and truth is returned.
808 * Input_line_pointer->(next non-blank) char after operand, or is in its
809 * original state.
810 */
811
b34976b6 812static bfd_boolean
98027b10 813register_name (expressionS *expressionP)
252b5132
RH		 814{
815 int reg_number;
816 char *name;
817 char *start;
818 char c;
819
99a814a1 820 /* Find the spelling of the operand. */
252b5132 821 start = name = input_line_pointer;
3882b010 822 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 823 name = ++input_line_pointer;
824
3882b010 825 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 826 return FALSE;
252b5132
RH		 827
828 c = get_symbol_end ();
829 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
830
468cced8
AM		 831 /* Put back the delimiting char. */
832 *input_line_pointer = c;
833
99a814a1 834 /* Look to see if it's in the register table. */
81d4177b 835 if (reg_number >= 0)
252b5132
RH		 836 {
837 expressionP->X_op = O_register;
838 expressionP->X_add_number = reg_number;
81d4177b 839
99a814a1 840 /* Make the rest nice. */
252b5132
RH		 841 expressionP->X_add_symbol = NULL;
842 expressionP->X_op_symbol = NULL;
b34976b6 843 return TRUE;
252b5132 844 }
468cced8
AM		 845
846 /* Reset the line as if we had not done anything. */
847 input_line_pointer = start;
b34976b6 848 return FALSE;
252b5132
RH		 849}
850\f
851/* This function is called for each symbol seen in an expression. It
852 handles the special parsing which PowerPC assemblers are supposed
853 to use for condition codes. */
854
855/* Whether to do the special parsing. */
b34976b6 856static bfd_boolean cr_operand;
252b5132
RH		 857
858/* Names to recognize in a condition code. This table is sorted. */
859static const struct pd_reg cr_names[] =
860{
861 { "cr0", 0 },
862 { "cr1", 1 },
863 { "cr2", 2 },
864 { "cr3", 3 },
865 { "cr4", 4 },
866 { "cr5", 5 },
867 { "cr6", 6 },
868 { "cr7", 7 },
869 { "eq", 2 },
870 { "gt", 1 },
871 { "lt", 0 },
872 { "so", 3 },
873 { "un", 3 }
874};
875
876/* Parsing function. This returns non-zero if it recognized an
877 expression. */
878
879int
91d6fa6a 880ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 881{
882 int val;
883
884 if (! cr_operand)
885 return 0;
886
13abbae3
AM		 887 if (*name == '%')
888 ++name;
252b5132
RH		 889 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
890 name);
891 if (val < 0)
892 return 0;
893
91d6fa6a
NC		 894 exp->X_op = O_constant;
895 exp->X_add_number = val;
252b5132
RH		 896
897 return 1;
898}
899\f
900/* Local variables. */
901
2b3c4602
AM		 902/* Whether to target xcoff64/elf64. */
903static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 904
252b5132
RH		 905/* Opcode hash table. */
906static struct hash_control *ppc_hash;
907
908/* Macro hash table. */
909static struct hash_control *ppc_macro_hash;
910
911#ifdef OBJ_ELF
99a814a1 912/* What type of shared library support to use. */
5d6f4f16 913static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 914
99a814a1 915/* Flags to set in the elf header. */
252b5132
RH		 916static flagword ppc_flags = 0;
917
918/* Whether this is Solaris or not. */
919#ifdef TARGET_SOLARIS_COMMENT
b34976b6 920#define SOLARIS_P TRUE
252b5132 921#else
b34976b6 922#define SOLARIS_P FALSE
252b5132
RH		 923#endif
924
b34976b6 925static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 926#endif
927
928#ifdef OBJ_XCOFF
929
930/* The RS/6000 assembler uses the .csect pseudo-op to generate code
931 using a bunch of different sections. These assembler sections,
932 however, are all encompassed within the .text or .data sections of
933 the final output file. We handle this by using different
934 subsegments within these main segments. */
935
936/* Next subsegment to allocate within the .text segment. */
937static subsegT ppc_text_subsegment = 2;
938
939/* Linked list of csects in the text section. */
940static symbolS *ppc_text_csects;
941
942/* Next subsegment to allocate within the .data segment. */
943static subsegT ppc_data_subsegment = 2;
944
945/* Linked list of csects in the data section. */
946static symbolS *ppc_data_csects;
947
948/* The current csect. */
949static symbolS *ppc_current_csect;
950
951/* The RS/6000 assembler uses a TOC which holds addresses of functions
952 and variables. Symbols are put in the TOC with the .tc pseudo-op.
953 A special relocation is used when accessing TOC entries. We handle
954 the TOC as a subsegment within the .data segment. We set it up if
955 we see a .toc pseudo-op, and save the csect symbol here. */
956static symbolS *ppc_toc_csect;
957
958/* The first frag in the TOC subsegment. */
959static fragS *ppc_toc_frag;
960
961/* The first frag in the first subsegment after the TOC in the .data
962 segment. NULL if there are no subsegments after the TOC. */
963static fragS *ppc_after_toc_frag;
964
965/* The current static block. */
966static symbolS *ppc_current_block;
967
968/* The COFF debugging section; set by md_begin. This is not the
969 .debug section, but is instead the secret BFD section which will
970 cause BFD to set the section number of a symbol to N_DEBUG. */
971static asection *ppc_coff_debug_section;
972
973#endif /* OBJ_XCOFF */
974
975#ifdef TE_PE
976
977/* Various sections that we need for PE coff support. */
978static segT ydata_section;
979static segT pdata_section;
980static segT reldata_section;
981static segT rdata_section;
982static segT tocdata_section;
983
81d4177b 984/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 985static segT ppc_previous_section;
986static segT ppc_current_section;
987
988#endif /* TE_PE */
989
990#ifdef OBJ_ELF
991symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 992#define PPC_APUINFO_ISEL 0x40
993#define PPC_APUINFO_PMR 0x41
994#define PPC_APUINFO_RFMCI 0x42
995#define PPC_APUINFO_CACHELCK 0x43
996#define PPC_APUINFO_SPE 0x100
997#define PPC_APUINFO_EFS 0x101
998#define PPC_APUINFO_BRLOCK 0x102
999
b34976b6
AM		 1000/*
1001 * We keep a list of APUinfo
6a0c61b7
EZ		 1002 */
1003unsigned long *ppc_apuinfo_list;
1004unsigned int ppc_apuinfo_num;
1005unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1006#endif /* OBJ_ELF */
1007\f
1008#ifdef OBJ_ELF
15c1449b 1009const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1010#else
15c1449b 1011const char *const md_shortopts = "um:";
252b5132 1012#endif
15c1449b 1013const struct option md_longopts[] = {
252b5132
RH		 1014 {NULL, no_argument, NULL, 0}
1015};
15c1449b 1016const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1017
1018int
98027b10 1019md_parse_option (int c, char *arg)
252b5132 1020{
69fe9ce5
AM		 1021 ppc_cpu_t new_cpu;
1022
252b5132
RH		 1023 switch (c)
1024 {
1025 case 'u':
1026 /* -u means that any undefined symbols should be treated as
1027 external, which is the default for gas anyhow. */
1028 break;
1029
1030#ifdef OBJ_ELF
1031 case 'l':
1032 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1033 sake, recognize -be also. */
252b5132
RH		 1034 if (strcmp (arg, "e") == 0)
1035 {
1036 target_big_endian = 0;
1037 set_target_endian = 1;
1038 }
1039 else
1040 return 0;
1041
1042 break;
1043
1044 case 'b':
1045 if (strcmp (arg, "e") == 0)
1046 {
1047 target_big_endian = 1;
1048 set_target_endian = 1;
1049 }
1050 else
1051 return 0;
1052
1053 break;
1054
1055 case 'K':
99a814a1 1056 /* Recognize -K PIC. */
252b5132
RH		 1057 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1058 {
1059 shlib = SHLIB_PIC;
1060 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1061 }
1062 else
1063 return 0;
1064
1065 break;
1066#endif
1067
7f6d05e8
CP		 1068 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1069 case 'a':
1070 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1071 {
1072#ifdef BFD64
1073 ppc_obj64 = 1;
1074#else
1075 as_fatal (_("%s unsupported"), "-a64");
1076#endif
1077 }
7f6d05e8 1078 else if (strcmp (arg, "32") == 0)
2b3c4602 1079 ppc_obj64 = 0;
7f6d05e8
CP		 1080 else
1081 return 0;
1082 break;
81d4177b 1083
252b5132 1084 case 'm':
69fe9ce5
AM		 1085 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1086 ppc_cpu = new_cpu;
252b5132
RH		 1087
1088 else if (strcmp (arg, "regnames") == 0)
b34976b6 1089 reg_names_p = TRUE;
252b5132
RH		 1090
1091 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1092 reg_names_p = FALSE;
252b5132
RH		 1093
1094#ifdef OBJ_ELF
99a814a1
AM		 1095 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1096 that require relocation. */
252b5132
RH		 1097 else if (strcmp (arg, "relocatable") == 0)
1098 {
5d6f4f16 1099 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1100 ppc_flags |= EF_PPC_RELOCATABLE;
1101 }
1102
1103 else if (strcmp (arg, "relocatable-lib") == 0)
1104 {
5d6f4f16 1105 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1106 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1107 }
1108
99a814a1 1109 /* -memb, set embedded bit. */
252b5132
RH		 1110 else if (strcmp (arg, "emb") == 0)
1111 ppc_flags |= EF_PPC_EMB;
1112
99a814a1
AM		 1113 /* -mlittle/-mbig set the endianess. */
1114 else if (strcmp (arg, "little") == 0
1115 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1116 {
1117 target_big_endian = 0;
1118 set_target_endian = 1;
1119 }
1120
1121 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1122 {
1123 target_big_endian = 1;
1124 set_target_endian = 1;
1125 }
1126
1127 else if (strcmp (arg, "solaris") == 0)
1128 {
b34976b6 1129 msolaris = TRUE;
252b5132
RH		 1130 ppc_comment_chars = ppc_solaris_comment_chars;
1131 }
1132
1133 else if (strcmp (arg, "no-solaris") == 0)
1134 {
b34976b6 1135 msolaris = FALSE;
252b5132
RH		 1136 ppc_comment_chars = ppc_eabi_comment_chars;
1137 }
1138#endif
1139 else
1140 {
1141 as_bad (_("invalid switch -m%s"), arg);
1142 return 0;
1143 }
1144 break;
1145
1146#ifdef OBJ_ELF
1147 /* -V: SVR4 argument to print version ID. */
1148 case 'V':
1149 print_version_id ();
1150 break;
1151
1152 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1153 should be emitted or not. FIXME: Not implemented. */
1154 case 'Q':
1155 break;
1156
1157 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1158 rather than .stabs.excl, which is ignored by the linker.
1159 FIXME: Not implemented. */
1160 case 's':
1161 if (arg)
1162 return 0;
1163
1164 break;
1165#endif
1166
1167 default:
1168 return 0;
1169 }
1170
1171 return 1;
1172}
1173
1174void
98027b10 1175md_show_usage (FILE *stream)
252b5132 1176{
bc805888 1177 fprintf (stream, _("\
252b5132 1178PowerPC options:\n\
df12615d
AM		 1179-a32 generate ELF32/XCOFF32\n\
1180-a64 generate ELF64/XCOFF64\n\
252b5132 1181-u ignored\n\
23e1d84c
AM		 1182-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1183-mpwr generate code for POWER (RIOS1)\n\
1184-m601 generate code for PowerPC 601\n\
418c1742 1185-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1186 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1187-m403 generate code for PowerPC 403\n\
1188-m405 generate code for PowerPC 405\n\
3d8aea2f 1189-m440 generate code for PowerPC 440\n\
c8187e15 1190-m464 generate code for PowerPC 464\n\
9fe54b1c 1191-m476 generate code for PowerPC 476\n\
f5c120c5 1192-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1193 generate code for PowerPC 7400/7410/7450/7455\n\
1194-m750cl generate code for PowerPC 750cl\n"));
df12615d 1195 fprintf (stream, _("\
23e1d84c 1196-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1197-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1198-mbooke generate code for 32-bit PowerPC BookE\n\
634b50f2 1199-ma2 generate code for A2 architecture\n\
23e1d84c 1200-mpower4 generate code for Power4 architecture\n\
b0648eec 1201-mpower5 generate code for Power5 architecture\n\
9622b051 1202-mpower6 generate code for Power6 architecture\n\
9b4e5766 1203-mpower7 generate code for Power7 architecture\n\
ede602d7 1204-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1205-mcom generate code Power/PowerPC common instructions\n\
df12615d 1206-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1207 fprintf (stream, _("\
df12615d 1208-maltivec generate code for AltiVec\n\
9b4e5766 1209-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1210-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1211-me500, -me500x2 generate code for Motorola e500 core complex\n\
0dc93057
AM		 1212-me500mc, generate code for Freescale e500mc core complex\n\
1213-me500mc64, generate code for Freescale e500mc64 core complex\n\
df12615d
AM		 1214-mspe generate code for Motorola SPE instructions\n\
1215-mregnames Allow symbolic names for registers\n\
1216-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1217#ifdef OBJ_ELF
bc805888 1218 fprintf (stream, _("\
252b5132
RH		 1219-mrelocatable support for GCC's -mrelocatble option\n\
1220-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1221-memb set PPC_EMB bit in ELF flags\n\
df12615d 1222-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1223 generate code for a little endian machine\n\
df12615d
AM		 1224-mbig, -mbig-endian, -b, -be\n\
1225 generate code for a big endian machine\n\
252b5132
RH		 1226-msolaris generate code for Solaris\n\
1227-mno-solaris do not generate code for Solaris\n\
1228-V print assembler version number\n\
1229-Qy, -Qn ignored\n"));
1230#endif
1231}
1232\f
1233/* Set ppc_cpu if it is not already set. */
1234
1235static void
98027b10 1236ppc_set_cpu (void)
252b5132
RH		 1237{
1238 const char *default_os = TARGET_OS;
1239 const char *default_cpu = TARGET_CPU;
1240
3c9030c1 1241 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1242 {
2a98c3a6 1243 if (ppc_obj64)
3c9030c1 1244 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1245 else if (strncmp (default_os, "aix", 3) == 0
1246 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1247 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1248 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1249 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1250 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1251 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1252 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1253 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1254 else
99a814a1
AM		 1255 as_fatal (_("Unknown default cpu = %s, os = %s"),
1256 default_cpu, default_os);
252b5132
RH		 1257 }
1258}
1259
9232bbb0
AM		 1260/* Figure out the BFD architecture to use. This function and ppc_mach
1261 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1262
1263enum bfd_architecture
98027b10 1264ppc_arch (void)
252b5132
RH		 1265{
1266 const char *default_cpu = TARGET_CPU;
1267 ppc_set_cpu ();
1268
1269 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1270 return bfd_arch_powerpc;
1271 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1272 return bfd_arch_rs6000;
1273 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1274 {
1275 if (strcmp (default_cpu, "rs6000") == 0)
1276 return bfd_arch_rs6000;
0baf16f2 1277 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1278 return bfd_arch_powerpc;
1279 }
1280
1281 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1282 return bfd_arch_unknown;
1283}
1284
7f6d05e8 1285unsigned long
98027b10 1286ppc_mach (void)
7f6d05e8 1287{
2a98c3a6
AM		 1288 if (ppc_obj64)
1289 return bfd_mach_ppc64;
1290 else if (ppc_arch () == bfd_arch_rs6000)
1291 return bfd_mach_rs6k;
1292 else
1293 return bfd_mach_ppc;
7f6d05e8
CP		 1294}
1295
81d4177b 1296extern char*
98027b10 1297ppc_target_format (void)
7f6d05e8
CP		 1298{
1299#ifdef OBJ_COFF
1300#ifdef TE_PE
99a814a1 1301 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1302#elif TE_POWERMAC
0baf16f2 1303 return "xcoff-powermac";
7f6d05e8 1304#else
eb1e0e80 1305# ifdef TE_AIX5
2b3c4602 1306 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1307# else
2b3c4602 1308 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1309# endif
7f6d05e8 1310#endif
7f6d05e8
CP		 1311#endif
1312#ifdef OBJ_ELF
9d8504b1
PB		 1313# ifdef TE_VXWORKS
1314 return "elf32-powerpc-vxworks";
1315# else
0baf16f2 1316 return (target_big_endian
2b3c4602
AM		 1317 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1318 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1319# endif
7f6d05e8
CP		 1320#endif
1321}
1322
69c040df
AM		 1323/* Insert opcodes and macros into hash tables. Called at startup and
1324 for .cpu pseudo. */
252b5132 1325
69c040df
AM		 1326static void
1327ppc_setup_opcodes (void)
252b5132 1328{
98027b10 1329 const struct powerpc_opcode *op;
252b5132
RH		 1330 const struct powerpc_opcode *op_end;
1331 const struct powerpc_macro *macro;
1332 const struct powerpc_macro *macro_end;
b84bf58a 1333 bfd_boolean bad_insn = FALSE;
252b5132 1334
69c040df
AM		 1335 if (ppc_hash != NULL)
1336 hash_die (ppc_hash);
1337 if (ppc_macro_hash != NULL)
1338 hash_die (ppc_macro_hash);
252b5132
RH		 1339
1340 /* Insert the opcodes into a hash table. */
1341 ppc_hash = hash_new ();
1342
c43a438d 1343 if (ENABLE_CHECKING)
b84bf58a 1344 {
c43a438d 1345 unsigned int i;
b84bf58a 1346
c43a438d
AM		 1347 /* Check operand masks. Code here and in the disassembler assumes
1348 all the 1's in the mask are contiguous. */
1349 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1350 {
c43a438d
AM		 1351 unsigned long mask = powerpc_operands[i].bitm;
1352 unsigned long right_bit;
1353 unsigned int j;
1354
1355 right_bit = mask & -mask;
1356 mask += right_bit;
1357 right_bit = mask & -mask;
1358 if (mask != right_bit)
1359 {
1360 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1361 bad_insn = TRUE;
1362 }
1363 for (j = i + 1; j < num_powerpc_operands; ++j)
1364 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1365 sizeof (powerpc_operands[0])) == 0)
1366 {
1367 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1368 j, i);
1369 bad_insn = TRUE;
1370 }
b84bf58a
AM		 1371 }
1372 }
1373
252b5132
RH		 1374 op_end = powerpc_opcodes + powerpc_num_opcodes;
1375 for (op = powerpc_opcodes; op < op_end; op++)
1376 {
c43a438d 1377 if (ENABLE_CHECKING)
b84bf58a 1378 {
c43a438d
AM		 1379 const unsigned char *o;
1380 unsigned long omask = op->mask;
8dbcd839 1381
d815f1a9 1382 if (op != powerpc_opcodes)
8dbcd839 1383 {
d815f1a9
AM		 1384 /* The major opcodes had better be sorted. Code in the
1385 disassembler assumes the insns are sorted according to
1386 major opcode. */
1387 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1388 {
1389 as_bad (_("major opcode is not sorted for %s"),
1390 op->name);
1391 bad_insn = TRUE;
1392 }
1393
1394 /* Warn if the table isn't more strictly ordered.
1395 Unfortunately it doesn't seem possible to order the
1396 table on much more than the major opcode, which makes
1397 it difficult to implement a binary search in the
1398 disassembler. The problem is that we have multiple
1399 ways to disassemble instructions, and we usually want
1400 to choose a more specific form (with more bits set in
1401 the opcode) than a more general form. eg. all of the
1402 following are equivalent:
1403 bne label # opcode = 0x40820000, mask = 0xff830003
1404 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1405 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1406
1407 There are also cases where the table needs to be out
1408 of order to disassemble the correct instruction for
2f3bb96a 1409 processor variants. */
d815f1a9
AM		 1410 else if (0)
1411 {
1412 unsigned long t1 = op[0].opcode;
1413 unsigned long t2 = op[-1].opcode;
1414
1415 if (((t1 ^ t2) & 0xfc0007ff) == 0
1416 && (t1 & 0xfc0006df) == 0x7c000286)
1417 {
1418 /* spr field is split. */
1419 t1 = ((t1 & ~0x1ff800)
1420 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1421 t2 = ((t2 & ~0x1ff800)
1422 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1423 }
1424 if (t1 < t2)
1425 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1426 op[0].name, op[0].opcode, op[0].mask,
1427 op[-1].name, op[-1].opcode, op[-1].mask);
1428 }
8dbcd839 1429 }
c43a438d
AM		 1430
1431 /* The mask had better not trim off opcode bits. */
1432 if ((op->opcode & omask) != op->opcode)
1433 {
1434 as_bad (_("mask trims opcode bits for %s"),
1435 op->name);
1436 bad_insn = TRUE;
1437 }
1438
1439 /* The operands must not overlap the opcode or each other. */
1440 for (o = op->operands; *o; ++o)
1441 if (*o >= num_powerpc_operands)
1442 {
1443 as_bad (_("operand index error for %s"),
1444 op->name);
1445 bad_insn = TRUE;
1446 }
1447 else
b84bf58a 1448 {
c43a438d
AM		 1449 const struct powerpc_operand *operand = &powerpc_operands[*o];
1450 if (operand->shift >= 0)
b84bf58a 1451 {
c43a438d
AM		 1452 unsigned long mask = operand->bitm << operand->shift;
1453 if (omask & mask)
1454 {
1455 as_bad (_("operand %d overlap in %s"),
1456 (int) (o - op->operands), op->name);
1457 bad_insn = TRUE;
1458 }
1459 omask |= mask;
b84bf58a 1460 }
b84bf58a 1461 }
c43a438d 1462 }
252b5132 1463
2b3c4602 1464 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1465 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1466 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1467 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1468 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1469 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1470 {
1471 const char *retval;
1472
98027b10 1473 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1474 if (retval != NULL)
252b5132 1475 {
99a814a1 1476 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1477 if ((ppc_cpu & PPC_OPCODE_601) != 0
1478 && (op->flags & PPC_OPCODE_POWER) != 0)
1479 continue;
1480
b84bf58a 1481 as_bad (_("duplicate instruction %s"),
99a814a1 1482 op->name);
b84bf58a 1483 bad_insn = TRUE;
252b5132
RH		 1484 }
1485 }
1486 }
1487
3c9030c1
AM		 1488 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1489 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1490 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1491
252b5132
RH		 1492 /* Insert the macros into a hash table. */
1493 ppc_macro_hash = hash_new ();
1494
1495 macro_end = powerpc_macros + powerpc_num_macros;
1496 for (macro = powerpc_macros; macro < macro_end; macro++)
1497 {
1498 if ((macro->flags & ppc_cpu) != 0)
1499 {
1500 const char *retval;
1501
98027b10 1502 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1503 if (retval != (const char *) NULL)
1504 {
b84bf58a
AM		 1505 as_bad (_("duplicate macro %s"), macro->name);
1506 bad_insn = TRUE;
252b5132
RH		 1507 }
1508 }
1509 }
1510
b84bf58a 1511 if (bad_insn)
252b5132 1512 abort ();
69c040df
AM		 1513}
1514
1515/* This function is called when the assembler starts up. It is called
1516 after the options have been parsed and the output file has been
1517 opened. */
1518
1519void
98027b10 1520md_begin (void)
69c040df
AM		 1521{
1522 ppc_set_cpu ();
1523
1524 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1525
1526#ifdef OBJ_ELF
1527 /* Set the ELF flags if desired. */
1528 if (ppc_flags && !msolaris)
1529 bfd_set_private_flags (stdoutput, ppc_flags);
1530#endif
1531
1532 ppc_setup_opcodes ();
252b5132 1533
67c1ffbe 1534 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1535 by the user. */
252b5132
RH		 1536 if (!set_target_endian)
1537 {
1538 set_target_endian = 1;
1539 target_big_endian = PPC_BIG_ENDIAN;
1540 }
1541
1542#ifdef OBJ_XCOFF
1543 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1544
1545 /* Create dummy symbols to serve as initial csects. This forces the
1546 text csects to precede the data csects. These symbols will not
1547 be output. */
1548 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1549 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1550 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1551 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1552#endif
1553
1554#ifdef TE_PE
1555
1556 ppc_current_section = text_section;
81d4177b 1557 ppc_previous_section = 0;
252b5132
RH		 1558
1559#endif
1560}
1561
6a0c61b7 1562void
98027b10 1563ppc_cleanup (void)
6a0c61b7 1564{
dc1d03fc 1565#ifdef OBJ_ELF
6a0c61b7
EZ		 1566 if (ppc_apuinfo_list == NULL)
1567 return;
1568
1569 /* Ok, so write the section info out. We have this layout:
1570
1571 byte data what
1572 ---- ---- ----
1573 0 8 length of "APUinfo\0"
1574 4 (n*4) number of APU's (4 bytes each)
1575 8 2 note type 2
1576 12 "APUinfo\0" name
1577 20 APU#1 first APU's info
1578 24 APU#2 second APU's info
1579 ... ...
1580 */
1581 {
1582 char *p;
1583 asection *seg = now_seg;
1584 subsegT subseg = now_subseg;
1585 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1586 unsigned int i;
6a0c61b7
EZ		 1587
1588 /* Create the .PPC.EMB.apuinfo section. */
1589 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1590 bfd_set_section_flags (stdoutput,
1591 apuinfo_secp,
e1a9cb8e 1592 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1593
1594 p = frag_more (4);
1595 md_number_to_chars (p, (valueT) 8, 4);
1596
1597 p = frag_more (4);
e98d298c 1598 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1599
1600 p = frag_more (4);
1601 md_number_to_chars (p, (valueT) 2, 4);
1602
1603 p = frag_more (8);
1604 strcpy (p, "APUinfo");
1605
1606 for (i = 0; i < ppc_apuinfo_num; i++)
1607 {
b34976b6
AM		 1608 p = frag_more (4);
1609 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1610 }
1611
1612 frag_align (2, 0, 0);
1613
1614 /* We probably can't restore the current segment, for there likely
1615 isn't one yet... */
1616 if (seg && subseg)
1617 subseg_set (seg, subseg);
1618 }
dc1d03fc 1619#endif
6a0c61b7
EZ		 1620}
1621
252b5132
RH		 1622/* Insert an operand value into an instruction. */
1623
1624static unsigned long
a1867a27
AM		 1625ppc_insert_operand (unsigned long insn,
1626 const struct powerpc_operand *operand,
1627 offsetT val,
91d6fa6a 1628 ppc_cpu_t cpu,
a1867a27
AM		 1629 char *file,
1630 unsigned int line)
252b5132 1631{
b84bf58a 1632 long min, max, right;
eb42fac1 1633
b84bf58a
AM		 1634 max = operand->bitm;
1635 right = max & -max;
1636 min = 0;
1637
1638 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1639 {
b84bf58a 1640 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1641 max = (max >> 1) & -right;
1642 min = ~max & -right;
b84bf58a 1643 }
252b5132 1644
b84bf58a 1645 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1646 max++;
252b5132 1647
b84bf58a 1648 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1649 {
1650 long tmp = min;
1651 min = -max;
1652 max = -tmp;
1653 }
b84bf58a 1654
a1867a27
AM		 1655 if (min <= max)
1656 {
1657 /* Some people write constants with the sign extension done by
1658 hand but only up to 32 bits. This shouldn't really be valid,
1659 but, to permit this code to assemble on a 64-bit host, we
1660 sign extend the 32-bit value to 64 bits if so doing makes the
1661 value valid. */
1662 if (val > max
1663 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1664 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1665 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1666 val = val - 0x80000000 - 0x80000000;
1667
1668 /* Similarly, people write expressions like ~(1<<15), and expect
1669 this to be OK for a 32-bit unsigned value. */
1670 else if (val < min
1671 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1672 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1673 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1674 val = val + 0x80000000 + 0x80000000;
1675
1676 else if (val < min
1677 || val > max
1678 || (val & (right - 1)) != 0)
1679 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1680 }
b84bf58a 1681
252b5132
RH		 1682 if (operand->insert)
1683 {
1684 const char *errmsg;
1685
1686 errmsg = NULL;
91d6fa6a 1687 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1688 if (errmsg != (const char *) NULL)
ee2c9aa9 1689 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1690 }
1691 else
b84bf58a 1692 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1693
1694 return insn;
1695}
1696
1697\f
1698#ifdef OBJ_ELF
1699/* Parse @got, etc. and return the desired relocation. */
1700static bfd_reloc_code_real_type
98027b10 1701ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1702{
1703 struct map_bfd {
1704 char *string;
b7d7dc63
AM		 1705 unsigned int length : 8;
1706 unsigned int valid32 : 1;
1707 unsigned int valid64 : 1;
1708 unsigned int reloc;
252b5132
RH		 1709 };
1710
1711 char ident[20];
1712 char *str = *str_p;
1713 char *str2;
1714 int ch;
1715 int len;
15c1449b 1716 const struct map_bfd *ptr;
252b5132 1717
b7d7dc63
AM		 1718#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1719#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1720#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1721
15c1449b 1722 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1723 MAP ("l", BFD_RELOC_LO16),
1724 MAP ("h", BFD_RELOC_HI16),
1725 MAP ("ha", BFD_RELOC_HI16_S),
1726 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1727 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1728 MAP ("got", BFD_RELOC_16_GOTOFF),
1729 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1730 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1731 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1732 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1733 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1734 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1735 MAP ("copy", BFD_RELOC_PPC_COPY),
1736 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1737 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1738 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1739 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1740 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1741 MAP ("tls", BFD_RELOC_PPC_TLS),
1742 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1743 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1744 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1745 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1746 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1747 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1748 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1749 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1750 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1751 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1752 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1753 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1754 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1755 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1756 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1757 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1758 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1759 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1760 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1761 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1762 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1763 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1764 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1765 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1766 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1767 MAP32 ("fixup", BFD_RELOC_CTOR),
1768 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1769 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1770 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1771 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1772 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1773 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1774 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1775 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1776 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1777 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1778 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1779 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1780 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1781 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1782 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1783 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1784 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1785 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1786 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1787 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1788 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1789 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1790 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1791 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1792 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1793 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1794 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1795 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1796 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1797 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1798 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1799 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1800 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1801 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1802 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1803 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1804 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1805 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1806 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1807 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1808 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1809 };
1810
1811 if (*str++ != '@')
1812 return BFD_RELOC_UNUSED;
1813
1814 for (ch = *str, str2 = ident;
1815 (str2 < ident + sizeof (ident) - 1
3882b010 1816 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1817 ch = *++str)
1818 {
3882b010 1819 *str2++ = TOLOWER (ch);
252b5132
RH		 1820 }
1821
1822 *str2 = '\0';
1823 len = str2 - ident;
1824
1825 ch = ident[0];
1826 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1827 if (ch == ptr->string[0]
1828 && len == ptr->length
b7d7dc63
AM		 1829 && memcmp (ident, ptr->string, ptr->length) == 0
1830 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1831 {
15c1449b
AM		 1832 int reloc = ptr->reloc;
1833
727fc41e
AM		 1834 if (!ppc_obj64 && exp_p->X_add_number != 0)
1835 {
1836 switch (reloc)
1837 {
1838 case BFD_RELOC_16_GOTOFF:
1839 case BFD_RELOC_LO16_GOTOFF:
1840 case BFD_RELOC_HI16_GOTOFF:
1841 case BFD_RELOC_HI16_S_GOTOFF:
1842 as_warn (_("identifier+constant@got means "
1843 "identifier@got+constant"));
1844 break;
1845
1846 case BFD_RELOC_PPC_GOT_TLSGD16:
1847 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1848 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1849 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1850 case BFD_RELOC_PPC_GOT_TLSLD16:
1851 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1852 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1853 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1854 case BFD_RELOC_PPC_GOT_DTPREL16:
1855 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1856 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1857 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1858 case BFD_RELOC_PPC_GOT_TPREL16:
1859 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1860 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1861 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1862 as_bad (_("symbol+offset not supported for got tls"));
1863 break;
1864 }
1865 }
5f6db75a
AM		 1866
1867 /* Now check for identifier@suffix+constant. */
1868 if (*str == '-' || *str == '+')
252b5132 1869 {
5f6db75a
AM		 1870 char *orig_line = input_line_pointer;
1871 expressionS new_exp;
1872
1873 input_line_pointer = str;
1874 expression (&new_exp);
1875 if (new_exp.X_op == O_constant)
252b5132 1876 {
5f6db75a
AM		 1877 exp_p->X_add_number += new_exp.X_add_number;
1878 str = input_line_pointer;
252b5132 1879 }
5f6db75a
AM		 1880
1881 if (&input_line_pointer != str_p)
1882 input_line_pointer = orig_line;
252b5132 1883 }
252b5132 1884 *str_p = str;
0baf16f2 1885
2b3c4602 1886 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1887 && exp_p->X_op == O_symbol
1888 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1889 {
9f2b53d7
AM		 1890 /* Change the symbol so that the dummy .TOC. symbol can be
1891 omitted from the object file. */
0baf16f2
AM		 1892 exp_p->X_add_symbol = &abs_symbol;
1893 }
1894
15c1449b 1895 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1896 }
1897
1898 return BFD_RELOC_UNUSED;
1899}
1900
99a814a1
AM		 1901/* Like normal .long/.short/.word, except support @got, etc.
1902 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1903static void
98027b10 1904ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1905{
1906 expressionS exp;
1907 bfd_reloc_code_real_type reloc;
1908
1909 if (is_it_end_of_statement ())
1910 {
1911 demand_empty_rest_of_line ();
1912 return;
1913 }
1914
1915 do
1916 {
1917 expression (&exp);
1918 if (exp.X_op == O_symbol
1919 && *input_line_pointer == '@'
99a814a1
AM		 1920 && (reloc = ppc_elf_suffix (&input_line_pointer,
1921 &exp)) != BFD_RELOC_UNUSED)
252b5132 1922 {
99a814a1
AM		 1923 reloc_howto_type *reloc_howto;
1924 int size;
1925
1926 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1927 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1928
1929 if (size > nbytes)
0baf16f2
AM		 1930 {
1931 as_bad (_("%s relocations do not fit in %d bytes\n"),
1932 reloc_howto->name, nbytes);
1933 }
252b5132
RH		 1934 else
1935 {
0baf16f2
AM		 1936 char *p;
1937 int offset;
252b5132 1938
0baf16f2
AM		 1939 p = frag_more (nbytes);
1940 offset = 0;
1941 if (target_big_endian)
1942 offset = nbytes - size;
99a814a1
AM		 1943 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1944 &exp, 0, reloc);
252b5132
RH		 1945 }
1946 }
1947 else
1948 emit_expr (&exp, (unsigned int) nbytes);
1949 }
1950 while (*input_line_pointer++ == ',');
1951
99a814a1
AM		 1952 /* Put terminator back into stream. */
1953 input_line_pointer--;
252b5132
RH		 1954 demand_empty_rest_of_line ();
1955}
1956
1957/* Solaris pseduo op to change to the .rodata section. */
1958static void
98027b10 1959ppc_elf_rdata (int xxx)
252b5132
RH		 1960{
1961 char *save_line = input_line_pointer;
1962 static char section[] = ".rodata\n";
1963
99a814a1 1964 /* Just pretend this is .section .rodata */
252b5132
RH		 1965 input_line_pointer = section;
1966 obj_elf_section (xxx);
1967
1968 input_line_pointer = save_line;
1969}
1970
99a814a1 1971/* Pseudo op to make file scope bss items. */
252b5132 1972static void
98027b10 1973ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1974{
98027b10
AM		 1975 char *name;
1976 char c;
1977 char *p;
252b5132 1978 offsetT size;
98027b10 1979 symbolS *symbolP;
252b5132
RH		 1980 offsetT align;
1981 segT old_sec;
1982 int old_subsec;
1983 char *pfrag;
1984 int align2;
1985
1986 name = input_line_pointer;
1987 c = get_symbol_end ();
1988
99a814a1 1989 /* just after name is now '\0'. */
252b5132
RH		 1990 p = input_line_pointer;
1991 *p = c;
1992 SKIP_WHITESPACE ();
1993 if (*input_line_pointer != ',')
1994 {
1995 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1996 ignore_rest_of_line ();
1997 return;
1998 }
1999
2000 input_line_pointer++; /* skip ',' */
2001 if ((size = get_absolute_expression ()) < 0)
2002 {
2003 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2004 ignore_rest_of_line ();
2005 return;
2006 }
2007
2008 /* The third argument to .lcomm is the alignment. */
2009 if (*input_line_pointer != ',')
2010 align = 8;
2011 else
2012 {
2013 ++input_line_pointer;
2014 align = get_absolute_expression ();
2015 if (align <= 0)
2016 {
2017 as_warn (_("ignoring bad alignment"));
2018 align = 8;
2019 }
2020 }
2021
2022 *p = 0;
2023 symbolP = symbol_find_or_make (name);
2024 *p = c;
2025
2026 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2027 {
2028 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2029 S_GET_NAME (symbolP));
2030 ignore_rest_of_line ();
2031 return;
2032 }
2033
2034 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2035 {
2036 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2037 S_GET_NAME (symbolP),
2038 (long) S_GET_VALUE (symbolP),
2039 (long) size);
2040
2041 ignore_rest_of_line ();
2042 return;
2043 }
2044
99a814a1 2045 /* Allocate_bss. */
252b5132
RH		 2046 old_sec = now_seg;
2047 old_subsec = now_subseg;
2048 if (align)
2049 {
99a814a1 2050 /* Convert to a power of 2 alignment. */
252b5132
RH		 2051 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2052 if (align != 1)
2053 {
2054 as_bad (_("Common alignment not a power of 2"));
2055 ignore_rest_of_line ();
2056 return;
2057 }
2058 }
2059 else
2060 align2 = 0;
2061
2062 record_alignment (bss_section, align2);
2063 subseg_set (bss_section, 0);
2064 if (align2)
2065 frag_align (align2, 0, 0);
2066 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2067 symbol_get_frag (symbolP)->fr_symbol = 0;
2068 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2069 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2070 (char *) 0);
2071 *pfrag = 0;
2072 S_SET_SIZE (symbolP, size);
2073 S_SET_SEGMENT (symbolP, bss_section);
2074 subseg_set (old_sec, old_subsec);
2075 demand_empty_rest_of_line ();
2076}
2077
2078/* Validate any relocations emitted for -mrelocatable, possibly adding
2079 fixups for word relocations in writable segments, so we can adjust
2080 them at runtime. */
2081static void
98027b10 2082ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2083{
2084 if (fixp->fx_done || fixp->fx_pcrel)
2085 return;
2086
2087 switch (shlib)
2088 {
2089 case SHLIB_NONE:
2090 case SHLIB_PIC:
2091 return;
2092
5d6f4f16 2093 case SHLIB_MRELOCATABLE:
252b5132
RH		 2094 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2095 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2096 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2097 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2098 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2099 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2100 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2101 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2102 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2103 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2104 && strcmp (segment_name (seg), ".got2") != 0
2105 && strcmp (segment_name (seg), ".dtors") != 0
2106 && strcmp (segment_name (seg), ".ctors") != 0
2107 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2108 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2109 && strcmp (segment_name (seg), ".eh_frame") != 0
2110 && strcmp (segment_name (seg), ".ex_shared") != 0)
2111 {
2112 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2113 || fixp->fx_r_type != BFD_RELOC_CTOR)
2114 {
2115 as_bad_where (fixp->fx_file, fixp->fx_line,
2116 _("Relocation cannot be done when using -mrelocatable"));
2117 }
2118 }
2119 return;
2120 }
2121}
0baf16f2 2122
7e8d4ab4
AM		 2123/* Prevent elf_frob_file_before_adjust removing a weak undefined
2124 function descriptor sym if the corresponding code sym is used. */
2125
2126void
98027b10 2127ppc_frob_file_before_adjust (void)
0baf16f2 2128{
7e8d4ab4 2129 symbolS *symp;
9232bbb0 2130 asection *toc;
0baf16f2 2131
7e8d4ab4
AM		 2132 if (!ppc_obj64)
2133 return;
2134
2135 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2136 {
7e8d4ab4
AM		 2137 const char *name;
2138 char *dotname;
2139 symbolS *dotsym;
2140 size_t len;
2141
2142 name = S_GET_NAME (symp);
2143 if (name[0] == '.')
2144 continue;
2145
2146 if (! S_IS_WEAK (symp)
2147 || S_IS_DEFINED (symp))
2148 continue;
2149
2150 len = strlen (name) + 1;
2151 dotname = xmalloc (len + 1);
2152 dotname[0] = '.';
2153 memcpy (dotname + 1, name, len);
461b725f 2154 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2155 free (dotname);
2156 if (dotsym != NULL && (symbol_used_p (dotsym)
2157 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2158 symbol_mark_used (symp);
2159
0baf16f2
AM		 2160 }
2161
9232bbb0
AM		 2162 toc = bfd_get_section_by_name (stdoutput, ".toc");
2163 if (toc != NULL
2164 && bfd_section_size (stdoutput, toc) > 0x10000)
2165 as_warn (_("TOC section size exceeds 64k"));
2166
7e8d4ab4
AM		 2167 /* Don't emit .TOC. symbol. */
2168 symp = symbol_find (".TOC.");
2169 if (symp != NULL)
2170 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2171}
252b5132
RH		 2172#endif /* OBJ_ELF */
2173\f
2174#ifdef TE_PE
2175
2176/*
99a814a1 2177 * Summary of parse_toc_entry.
252b5132
RH		 2178 *
2179 * in: Input_line_pointer points to the '[' in one of:
2180 *
2181 * [toc] [tocv] [toc32] [toc64]
2182 *
2183 * Anything else is an error of one kind or another.
2184 *
81d4177b 2185 * out:
252b5132
RH		 2186 * return value: success or failure
2187 * toc_kind: kind of toc reference
2188 * input_line_pointer:
2189 * success: first char after the ']'
2190 * failure: unchanged
2191 *
2192 * settings:
2193 *
2194 * [toc] - rv == success, toc_kind = default_toc
2195 * [tocv] - rv == success, toc_kind = data_in_toc
2196 * [toc32] - rv == success, toc_kind = must_be_32
2197 * [toc64] - rv == success, toc_kind = must_be_64
2198 *
2199 */
2200
81d4177b
KH		 2201enum toc_size_qualifier
2202{
252b5132
RH		 2203 default_toc, /* The toc cell constructed should be the system default size */
2204 data_in_toc, /* This is a direct reference to a toc cell */
2205 must_be_32, /* The toc cell constructed must be 32 bits wide */
2206 must_be_64 /* The toc cell constructed must be 64 bits wide */
2207};
2208
2209static int
98027b10 2210parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2211{
2212 char *start;
2213 char *toc_spec;
2214 char c;
2215 enum toc_size_qualifier t;
2216
99a814a1 2217 /* Save the input_line_pointer. */
252b5132
RH		 2218 start = input_line_pointer;
2219
99a814a1 2220 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2221 ++input_line_pointer;
2222 SKIP_WHITESPACE ();
81d4177b 2223
99a814a1 2224 /* Find the spelling of the operand. */
252b5132
RH		 2225 toc_spec = input_line_pointer;
2226 c = get_symbol_end ();
2227
99a814a1 2228 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2229 {
2230 t = default_toc;
2231 }
99a814a1 2232 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2233 {
2234 t = data_in_toc;
2235 }
99a814a1 2236 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2237 {
2238 t = must_be_32;
2239 }
99a814a1 2240 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2241 {
2242 t = must_be_64;
2243 }
2244 else
2245 {
2246 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2247 *input_line_pointer = c;
2248 input_line_pointer = start;
252b5132
RH		 2249 return 0;
2250 }
2251
99a814a1
AM		 2252 /* Now find the ']'. */
2253 *input_line_pointer = c;
252b5132 2254
81d4177b
KH		 2255 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2256 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2257
2258 if (c != ']')
2259 {
2260 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2261 input_line_pointer = start;
252b5132
RH		 2262 return 0;
2263 }
2264
99a814a1 2265 *toc_kind = t;
252b5132
RH		 2266 return 1;
2267}
2268#endif
2269\f
2270
dc1d03fc 2271#ifdef OBJ_ELF
6a0c61b7
EZ		 2272#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2273static void
98027b10 2274ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2275{
2276 unsigned int i;
2277
2278 /* Check we don't already exist. */
2279 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2280 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2281 return;
b34976b6 2282
6a0c61b7
EZ		 2283 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2284 {
2285 if (ppc_apuinfo_num_alloc == 0)
2286 {
2287 ppc_apuinfo_num_alloc = 4;
2288 ppc_apuinfo_list = (unsigned long *)
2289 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2290 }
2291 else
2292 {
2293 ppc_apuinfo_num_alloc += 4;
2294 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2295 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2296 }
2297 }
dc1d03fc 2298 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2299}
2300#undef APUID
dc1d03fc 2301#endif
6a0c61b7
EZ		 2302\f
2303
252b5132
RH		 2304/* We need to keep a list of fixups. We can't simply generate them as
2305 we go, because that would require us to first create the frag, and
2306 that would screw up references to ``.''. */
2307
2308struct ppc_fixup
2309{
2310 expressionS exp;
2311 int opindex;
2312 bfd_reloc_code_real_type reloc;
2313};
2314
2315#define MAX_INSN_FIXUPS (5)
2316
2317/* This routine is called for each instruction to be assembled. */
2318
2319void
98027b10 2320md_assemble (char *str)
252b5132
RH		 2321{
2322 char *s;
2323 const struct powerpc_opcode *opcode;
2324 unsigned long insn;
2325 const unsigned char *opindex_ptr;
2326 int skip_optional;
2327 int need_paren;
2328 int next_opindex;
2329 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2330 int fc;
2331 char *f;
09b935ac 2332 int addr_mod;
252b5132
RH		 2333 int i;
2334#ifdef OBJ_ELF
2335 bfd_reloc_code_real_type reloc;
2336#endif
2337
2338 /* Get the opcode. */
3882b010 2339 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2340 ;
2341 if (*s != '\0')
2342 *s++ = '\0';
2343
2344 /* Look up the opcode in the hash table. */
2345 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2346 if (opcode == (const struct powerpc_opcode *) NULL)
2347 {
2348 const struct powerpc_macro *macro;
2349
2350 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2351 if (macro == (const struct powerpc_macro *) NULL)
2352 as_bad (_("Unrecognized opcode: `%s'"), str);
2353 else
2354 ppc_macro (s, macro);
2355
2356 return;
2357 }
2358
2359 insn = opcode->opcode;
2360
2361 str = s;
3882b010 2362 while (ISSPACE (*str))
252b5132
RH		 2363 ++str;
2364
2365 /* PowerPC operands are just expressions. The only real issue is
2366 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2367 an optional operand separate the operands only with commas (in some
2368 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2369 have optional operands). Most instructions with optional operands
2370 have only one. Those that have more than one optional operand can
2371 take either all their operands or none. So, before we start seriously
2372 parsing the operands, we check to see if we have optional operands,
2373 and if we do, we count the number of commas to see which operands
2374 have been omitted. */
252b5132
RH		 2375 skip_optional = 0;
2376 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2377 {
2378 const struct powerpc_operand *operand;
2379
2380 operand = &powerpc_operands[*opindex_ptr];
2381 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2382 {
2383 unsigned int opcount;
7fe9cf6b 2384 unsigned int num_operands_expected;
252b5132
RH		 2385
2386 /* There is an optional operand. Count the number of
2387 commas in the input line. */
2388 if (*str == '\0')
2389 opcount = 0;
2390 else
2391 {
2392 opcount = 1;
2393 s = str;
2394 while ((s = strchr (s, ',')) != (char *) NULL)
2395 {
2396 ++opcount;
2397 ++s;
2398 }
2399 }
2400
7fe9cf6b
NC		 2401 /* Compute the number of expected operands.
2402 Do not count fake operands. */
2403 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2404 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2405 ++ num_operands_expected;
2406
252b5132
RH		 2407 /* If there are fewer operands in the line then are called
2408 for by the instruction, we want to skip the optional
1f6c9eb0 2409 operands. */
7fe9cf6b 2410 if (opcount < num_operands_expected)
252b5132
RH		 2411 skip_optional = 1;
2412
2413 break;
2414 }
2415 }
2416
2417 /* Gather the operands. */
2418 need_paren = 0;
2419 next_opindex = 0;
2420 fc = 0;
2421 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2422 {
2423 const struct powerpc_operand *operand;
2424 const char *errmsg;
2425 char *hold;
2426 expressionS ex;
2427 char endc;
2428
2429 if (next_opindex == 0)
2430 operand = &powerpc_operands[*opindex_ptr];
2431 else
2432 {
2433 operand = &powerpc_operands[next_opindex];
2434 next_opindex = 0;
2435 }
252b5132
RH		 2436 errmsg = NULL;
2437
2438 /* If this is a fake operand, then we do not expect anything
2439 from the input. */
2440 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2441 {
2b3c4602 2442 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2443 if (errmsg != (const char *) NULL)
ee2c9aa9 2444 as_bad ("%s", errmsg);
252b5132
RH		 2445 continue;
2446 }
2447
2448 /* If this is an optional operand, and we are skipping it, just
2449 insert a zero. */
2450 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2451 && skip_optional)
2452 {
2453 if (operand->insert)
2454 {
2b3c4602 2455 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2456 if (errmsg != (const char *) NULL)
ee2c9aa9 2457 as_bad ("%s", errmsg);
252b5132
RH		 2458 }
2459 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2460 next_opindex = *opindex_ptr + 1;
2461 continue;
2462 }
2463
2464 /* Gather the operand. */
2465 hold = input_line_pointer;
2466 input_line_pointer = str;
2467
2468#ifdef TE_PE
81d4177b 2469 if (*input_line_pointer == '[')
252b5132
RH		 2470 {
2471 /* We are expecting something like the second argument here:
99a814a1
AM		 2472 *
2473 * lwz r4,[toc].GS.0.static_int(rtoc)
2474 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2475 * The argument following the `]' must be a symbol name, and the
2476 * register must be the toc register: 'rtoc' or '2'
2477 *
2478 * The effect is to 0 as the displacement field
2479 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2480 * the appropriate variation) reloc against it based on the symbol.
2481 * The linker will build the toc, and insert the resolved toc offset.
2482 *
2483 * Note:
2484 * o The size of the toc entry is currently assumed to be
2485 * 32 bits. This should not be assumed to be a hard coded
2486 * number.
2487 * o In an effort to cope with a change from 32 to 64 bits,
2488 * there are also toc entries that are specified to be
2489 * either 32 or 64 bits:
2490 * lwz r4,[toc32].GS.0.static_int(rtoc)
2491 * lwz r4,[toc64].GS.0.static_int(rtoc)
2492 * These demand toc entries of the specified size, and the
2493 * instruction probably requires it.
2494 */
252b5132
RH		 2495
2496 int valid_toc;
2497 enum toc_size_qualifier toc_kind;
2498 bfd_reloc_code_real_type toc_reloc;
2499
99a814a1
AM		 2500 /* Go parse off the [tocXX] part. */
2501 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2502
81d4177b 2503 if (!valid_toc)
252b5132 2504 {
99a814a1
AM		 2505 /* Note: message has already been issued.
2506 FIXME: what sort of recovery should we do?
2507 demand_rest_of_line (); return; ? */
252b5132
RH		 2508 }
2509
99a814a1
AM		 2510 /* Now get the symbol following the ']'. */
2511 expression (&ex);
252b5132
RH		 2512
2513 switch (toc_kind)
2514 {
2515 case default_toc:
99a814a1
AM		 2516 /* In this case, we may not have seen the symbol yet,
2517 since it is allowed to appear on a .extern or .globl
2518 or just be a label in the .data section. */
252b5132
RH		 2519 toc_reloc = BFD_RELOC_PPC_TOC16;
2520 break;
2521 case data_in_toc:
99a814a1
AM		 2522 /* 1. The symbol must be defined and either in the toc
2523 section, or a global.
2524 2. The reloc generated must have the TOCDEFN flag set
2525 in upper bit mess of the reloc type.
2526 FIXME: It's a little confusing what the tocv
2527 qualifier can be used for. At the very least, I've
2528 seen three uses, only one of which I'm sure I can
2529 explain. */
81d4177b
KH		 2530 if (ex.X_op == O_symbol)
2531 {
9c2799c2 2532 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2533 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2534 != tocdata_section)
252b5132 2535 {
99a814a1 2536 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2537 }
2538 }
2539
2540 toc_reloc = BFD_RELOC_PPC_TOC16;
2541 break;
2542 case must_be_32:
99a814a1
AM		 2543 /* FIXME: these next two specifically specify 32/64 bit
2544 toc entries. We don't support them today. Is this
2545 the right way to say that? */
252b5132
RH		 2546 toc_reloc = BFD_RELOC_UNUSED;
2547 as_bad (_("Unimplemented toc32 expression modifier"));
2548 break;
2549 case must_be_64:
99a814a1 2550 /* FIXME: see above. */
252b5132
RH		 2551 toc_reloc = BFD_RELOC_UNUSED;
2552 as_bad (_("Unimplemented toc64 expression modifier"));
2553 break;
2554 default:
bc805888 2555 fprintf (stderr,
99a814a1
AM		 2556 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2557 toc_kind);
bc805888 2558 abort ();
252b5132
RH		 2559 break;
2560 }
2561
2562 /* We need to generate a fixup for this expression. */
2563 if (fc >= MAX_INSN_FIXUPS)
2564 as_fatal (_("too many fixups"));
2565
2566 fixups[fc].reloc = toc_reloc;
2567 fixups[fc].exp = ex;
2568 fixups[fc].opindex = *opindex_ptr;
2569 ++fc;
2570
99a814a1
AM		 2571 /* Ok. We've set up the fixup for the instruction. Now make it
2572 look like the constant 0 was found here. */
252b5132
RH		 2573 ex.X_unsigned = 1;
2574 ex.X_op = O_constant;
2575 ex.X_add_number = 0;
2576 ex.X_add_symbol = NULL;
2577 ex.X_op_symbol = NULL;
2578 }
2579
2580 else
2581#endif /* TE_PE */
2582 {
2ad068be
AM		 2583 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2584 || !register_name (&ex))
252b5132 2585 {
13abbae3
AM		 2586 char save_lex = lex_type['%'];
2587
252b5132 2588 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2589 {
2590 cr_operand = TRUE;
2591 lex_type['%'] |= LEX_BEGIN_NAME;
2592 }
252b5132 2593 expression (&ex);
b34976b6 2594 cr_operand = FALSE;
13abbae3 2595 lex_type['%'] = save_lex;
252b5132
RH		 2596 }
2597 }
2598
2599 str = input_line_pointer;
2600 input_line_pointer = hold;
2601
2602 if (ex.X_op == O_illegal)
2603 as_bad (_("illegal operand"));
2604 else if (ex.X_op == O_absent)
2605 as_bad (_("missing operand"));
2606 else if (ex.X_op == O_register)
2607 {
2608 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2609 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2610 }
2611 else if (ex.X_op == O_constant)
2612 {
2613#ifdef OBJ_ELF
81d4177b 2614 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2615 char *orig_str = str;
2616
2617 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2618 switch (reloc)
2619 {
2620 default:
2621 str = orig_str;
2622 break;
2623
2624 case BFD_RELOC_LO16:
2625 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2626 something which cleared it, we always produce a
2627 signed value. */
2628 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2629 ex.X_add_number &= 0xffff;
2630 else
0baf16f2 2631 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2632 break;
2633
2634 case BFD_RELOC_HI16:
0baf16f2
AM		 2635 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2636 ex.X_add_number = PPC_HI (ex.X_add_number);
2637 else
2638 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2639 break;
2640
2641 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2642 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2643 ex.X_add_number = PPC_HA (ex.X_add_number);
2644 else
2645 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2646 break;
2647
0baf16f2
AM		 2648 case BFD_RELOC_PPC64_HIGHER:
2649 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2650 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2651 else
2652 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2653 break;
2654
2655 case BFD_RELOC_PPC64_HIGHER_S:
2656 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2657 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2658 else
2659 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2660 break;
0baf16f2
AM		 2661
2662 case BFD_RELOC_PPC64_HIGHEST:
2663 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2664 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2665 else
2666 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2667 break;
2668
2669 case BFD_RELOC_PPC64_HIGHEST_S:
2670 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2671 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2672 else
2673 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2674 break;
252b5132 2675 }
0baf16f2 2676#endif /* OBJ_ELF */
252b5132 2677 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2678 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2679 }
2680#ifdef OBJ_ELF
727fc41e 2681 else
252b5132 2682 {
727fc41e 2683 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2684 {
727fc41e
AM		 2685 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2686 if (sym_name[0] == '.')
2687 ++sym_name;
cdba85ec 2688
727fc41e 2689 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2690 {
727fc41e
AM		 2691 expressionS tls_exp;
2692
2693 hold = input_line_pointer;
2694 input_line_pointer = str + 1;
2695 expression (&tls_exp);
2696 if (tls_exp.X_op == O_symbol)
2697 {
2698 reloc = BFD_RELOC_UNUSED;
2699 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2700 {
2701 reloc = BFD_RELOC_PPC_TLSGD;
2702 input_line_pointer += 7;
2703 }
2704 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2705 {
2706 reloc = BFD_RELOC_PPC_TLSLD;
2707 input_line_pointer += 7;
2708 }
2709 if (reloc != BFD_RELOC_UNUSED)
2710 {
2711 SKIP_WHITESPACE ();
2712 str = input_line_pointer;
2713
2714 if (fc >= MAX_INSN_FIXUPS)
2715 as_fatal (_("too many fixups"));
2716 fixups[fc].exp = tls_exp;
2717 fixups[fc].opindex = *opindex_ptr;
2718 fixups[fc].reloc = reloc;
2719 ++fc;
2720 }
2721 }
2722 input_line_pointer = hold;
252b5132
RH		 2723 }
2724 }
2725
727fc41e 2726 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2727 {
727fc41e 2728 /* Some TLS tweaks. */
0baf16f2
AM		 2729 switch (reloc)
2730 {
727fc41e 2731 default:
cdba85ec 2732 break;
727fc41e
AM		 2733
2734 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2735 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2736 as_bad (_("@tls may not be used with \"%s\" operands"),
2737 opcode->name);
2738 else if (operand->shift != 11)
2739 as_bad (_("@tls may only be used in last operand"));
2740 else
2741 insn = ppc_insert_operand (insn, operand,
2742 ppc_obj64 ? 13 : 2,
2743 ppc_cpu, (char *) NULL, 0);
cdba85ec 2744 break;
727fc41e
AM		 2745
2746 /* We'll only use the 32 (or 64) bit form of these relocations
2747 in constants. Instructions get the 16 bit form. */
2748 case BFD_RELOC_PPC_DTPREL:
2749 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2750 break;
727fc41e
AM		 2751 case BFD_RELOC_PPC_TPREL:
2752 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2753 break;
2754 }
727fc41e
AM		 2755
2756 /* For the absolute forms of branches, convert the PC
2757 relative form back into the absolute. */
2758 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2759 {
2760 switch (reloc)
2761 {
2762 case BFD_RELOC_PPC_B26:
2763 reloc = BFD_RELOC_PPC_BA26;
2764 break;
2765 case BFD_RELOC_PPC_B16:
2766 reloc = BFD_RELOC_PPC_BA16;
2767 break;
2768 case BFD_RELOC_PPC_B16_BRTAKEN:
2769 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2770 break;
2771 case BFD_RELOC_PPC_B16_BRNTAKEN:
2772 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2773 break;
2774 default:
2775 break;
2776 }
2777 }
2778
2779 if (ppc_obj64
2780 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2781 {
2782 switch (reloc)
2783 {
2784 case BFD_RELOC_16:
2785 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2786 break;
2787 case BFD_RELOC_LO16:
2788 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2789 break;
2790 case BFD_RELOC_16_GOTOFF:
2791 reloc = BFD_RELOC_PPC64_GOT16_DS;
2792 break;
2793 case BFD_RELOC_LO16_GOTOFF:
2794 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2795 break;
2796 case BFD_RELOC_LO16_PLTOFF:
2797 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2798 break;
2799 case BFD_RELOC_16_BASEREL:
2800 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2801 break;
2802 case BFD_RELOC_LO16_BASEREL:
2803 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2804 break;
2805 case BFD_RELOC_PPC_TOC16:
2806 reloc = BFD_RELOC_PPC64_TOC16_DS;
2807 break;
2808 case BFD_RELOC_PPC64_TOC16_LO:
2809 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2810 break;
2811 case BFD_RELOC_PPC64_PLTGOT16:
2812 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2813 break;
2814 case BFD_RELOC_PPC64_PLTGOT16_LO:
2815 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2816 break;
2817 case BFD_RELOC_PPC_DTPREL16:
2818 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2819 break;
2820 case BFD_RELOC_PPC_DTPREL16_LO:
2821 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2822 break;
2823 case BFD_RELOC_PPC_TPREL16:
2824 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2825 break;
2826 case BFD_RELOC_PPC_TPREL16_LO:
2827 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2828 break;
2829 case BFD_RELOC_PPC_GOT_DTPREL16:
2830 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2831 case BFD_RELOC_PPC_GOT_TPREL16:
2832 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2833 break;
2834 default:
2835 as_bad (_("unsupported relocation for DS offset field"));
2836 break;
2837 }
2838 }
0baf16f2
AM		 2839 }
2840
252b5132
RH		 2841 /* We need to generate a fixup for this expression. */
2842 if (fc >= MAX_INSN_FIXUPS)
2843 as_fatal (_("too many fixups"));
2844 fixups[fc].exp = ex;
727fc41e 2845 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2846 fixups[fc].reloc = reloc;
2847 ++fc;
2848 }
727fc41e 2849#else /* OBJ_ELF */
252b5132
RH		 2850 else
2851 {
2852 /* We need to generate a fixup for this expression. */
2853 if (fc >= MAX_INSN_FIXUPS)
2854 as_fatal (_("too many fixups"));
2855 fixups[fc].exp = ex;
2856 fixups[fc].opindex = *opindex_ptr;
2857 fixups[fc].reloc = BFD_RELOC_UNUSED;
2858 ++fc;
2859 }
727fc41e 2860#endif /* OBJ_ELF */
252b5132
RH		 2861
2862 if (need_paren)
2863 {
2864 endc = ')';
2865 need_paren = 0;
c3d65c1c
BE		 2866 /* If expecting more operands, then we want to see "),". */
2867 if (*str == endc && opindex_ptr[1] != 0)
2868 {
2869 do
2870 ++str;
2871 while (ISSPACE (*str));
2872 endc = ',';
2873 }
252b5132
RH		 2874 }
2875 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2876 {
2877 endc = '(';
2878 need_paren = 1;
2879 }
2880 else
2881 endc = ',';
2882
2883 /* The call to expression should have advanced str past any
2884 whitespace. */
2885 if (*str != endc
2886 && (endc != ',' || *str != '\0'))
2887 {
2888 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2889 break;
2890 }
2891
2892 if (*str != '\0')
2893 ++str;
2894 }
2895
3882b010 2896 while (ISSPACE (*str))
252b5132
RH		 2897 ++str;
2898
2899 if (*str != '\0')
2900 as_bad (_("junk at end of line: `%s'"), str);
2901
dc1d03fc 2902#ifdef OBJ_ELF
6a0c61b7 2903 /* Do we need/want a APUinfo section? */
ed84b57b 2904 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2905 {
2906 /* These are all version "1". */
2907 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2908 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2909 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2910 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2911 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2912 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2913 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2914 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2915 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2916 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2917 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2918 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2919 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2920 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2921 }
dc1d03fc 2922#endif
6a0c61b7 2923
252b5132
RH		 2924 /* Write out the instruction. */
2925 f = frag_more (4);
09b935ac
AM		 2926 addr_mod = frag_now_fix () & 3;
2927 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2928 as_bad (_("instruction address is not a multiple of 4"));
2929 frag_now->insn_addr = addr_mod;
2930 frag_now->has_code = 1;
252b5132
RH		 2931 md_number_to_chars (f, insn, 4);
2932
5d6f4f16
GK		 2933#ifdef OBJ_ELF
2934 dwarf2_emit_insn (4);
2935#endif
2936
252b5132
RH		 2937 /* Create any fixups. At this point we do not use a
2938 bfd_reloc_code_real_type, but instead just use the
2939 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2940 handle fixups for any operand type, although that is admittedly
2941 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2942 md_apply_fix. */
252b5132
RH		 2943 for (i = 0; i < fc; i++)
2944 {
252b5132
RH		 2945 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2946 {
99a814a1 2947 reloc_howto_type *reloc_howto;
252b5132
RH		 2948 int size;
2949 int offset;
2950 fixS *fixP;
2951
99a814a1 2952 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2953 if (!reloc_howto)
2954 abort ();
2955
2956 size = bfd_get_reloc_size (reloc_howto);
2957 offset = target_big_endian ? (4 - size) : 0;
2958
2959 if (size < 1 || size > 4)
bc805888 2960 abort ();
252b5132 2961
99a814a1
AM		 2962 fixP = fix_new_exp (frag_now,
2963 f - frag_now->fr_literal + offset,
2964 size,
2965 &fixups[i].exp,
2966 reloc_howto->pc_relative,
252b5132
RH		 2967 fixups[i].reloc);
2968
2969 /* Turn off complaints that the addend is too large for things like
2970 foo+100000@ha. */
2971 switch (fixups[i].reloc)
2972 {
2973 case BFD_RELOC_16_GOTOFF:
2974 case BFD_RELOC_PPC_TOC16:
2975 case BFD_RELOC_LO16:
2976 case BFD_RELOC_HI16:
2977 case BFD_RELOC_HI16_S:
0baf16f2 2978#ifdef OBJ_ELF
0baf16f2
AM		 2979 case BFD_RELOC_PPC64_HIGHER:
2980 case BFD_RELOC_PPC64_HIGHER_S:
2981 case BFD_RELOC_PPC64_HIGHEST:
2982 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2983#endif
252b5132
RH		 2984 fixP->fx_no_overflow = 1;
2985 break;
2986 default:
2987 break;
2988 }
2989 }
2990 else
727fc41e
AM		 2991 {
2992 const struct powerpc_operand *operand;
2993
2994 operand = &powerpc_operands[fixups[i].opindex];
2995 fix_new_exp (frag_now,
2996 f - frag_now->fr_literal,
2997 4,
2998 &fixups[i].exp,
2999 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3000 ((bfd_reloc_code_real_type)
3001 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3002 }
252b5132
RH		 3003 }
3004}
3005
3006/* Handle a macro. Gather all the operands, transform them as
3007 described by the macro, and call md_assemble recursively. All the
3008 operands are separated by commas; we don't accept parentheses
3009 around operands here. */
3010
3011static void
98027b10 3012ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3013{
3014 char *operands[10];
3015 unsigned int count;
3016 char *s;
3017 unsigned int len;
3018 const char *format;
db557034 3019 unsigned int arg;
252b5132
RH		 3020 char *send;
3021 char *complete;
3022
3023 /* Gather the users operands into the operands array. */
3024 count = 0;
3025 s = str;
3026 while (1)
3027 {
3028 if (count >= sizeof operands / sizeof operands[0])
3029 break;
3030 operands[count++] = s;
3031 s = strchr (s, ',');
3032 if (s == (char *) NULL)
3033 break;
3034 *s++ = '\0';
81d4177b 3035 }
252b5132
RH		 3036
3037 if (count != macro->operands)
3038 {
3039 as_bad (_("wrong number of operands"));
3040 return;
3041 }
3042
3043 /* Work out how large the string must be (the size is unbounded
3044 because it includes user input). */
3045 len = 0;
3046 format = macro->format;
3047 while (*format != '\0')
3048 {
3049 if (*format != '%')
3050 {
3051 ++len;
3052 ++format;
3053 }
3054 else
3055 {
3056 arg = strtol (format + 1, &send, 10);
db557034 3057 know (send != format && arg < count);
252b5132
RH		 3058 len += strlen (operands[arg]);
3059 format = send;
3060 }
3061 }
3062
3063 /* Put the string together. */
3064 complete = s = (char *) alloca (len + 1);
3065 format = macro->format;
3066 while (*format != '\0')
3067 {
3068 if (*format != '%')
3069 *s++ = *format++;
3070 else
3071 {
3072 arg = strtol (format + 1, &send, 10);
3073 strcpy (s, operands[arg]);
3074 s += strlen (s);
3075 format = send;
3076 }
3077 }
3078 *s = '\0';
3079
3080 /* Assemble the constructed instruction. */
3081 md_assemble (complete);
81d4177b 3082}
252b5132
RH		 3083\f
3084#ifdef OBJ_ELF
99a814a1 3085/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3086
01e1a5bc 3087bfd_vma
98027b10 3088ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3089{
3090 if (letter == 'e')
3091 return SHF_EXCLUDE;
3092
13ae64f3 3093 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3094 return -1;
252b5132
RH		 3095}
3096
01e1a5bc 3097bfd_vma
98027b10 3098ppc_section_word (char *str, size_t len)
252b5132 3099{
9de8d8f1
RH		 3100 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3101 return SHF_EXCLUDE;
252b5132 3102
9de8d8f1 3103 return -1;
252b5132
RH		 3104}
3105
3106int
98027b10 3107ppc_section_type (char *str, size_t len)
252b5132 3108{
9de8d8f1
RH		 3109 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3110 return SHT_ORDERED;
252b5132 3111
9de8d8f1 3112 return -1;
252b5132
RH		 3113}
3114
3115int
01e1a5bc 3116ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3117{
3118 if (type == SHT_ORDERED)
3119 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3120
3121 if (attr & SHF_EXCLUDE)
3122 flags |= SEC_EXCLUDE;
3123
3124 return flags;
3125}
3126#endif /* OBJ_ELF */
3127
3128\f
3129/* Pseudo-op handling. */
3130
3131/* The .byte pseudo-op. This is similar to the normal .byte
3132 pseudo-op, but it can also take a single ASCII string. */
3133
3134static void
98027b10 3135ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3136{
3137 if (*input_line_pointer != '\"')
3138 {
3139 cons (1);
3140 return;
3141 }
3142
3143 /* Gather characters. A real double quote is doubled. Unusual
3144 characters are not permitted. */
3145 ++input_line_pointer;
3146 while (1)
3147 {
3148 char c;
3149
3150 c = *input_line_pointer++;
3151
3152 if (c == '\"')
3153 {
3154 if (*input_line_pointer != '\"')
3155 break;
3156 ++input_line_pointer;
3157 }
3158
3159 FRAG_APPEND_1_CHAR (c);
3160 }
3161
3162 demand_empty_rest_of_line ();
3163}
3164\f
3165#ifdef OBJ_XCOFF
3166
3167/* XCOFF specific pseudo-op handling. */
3168
3169/* This is set if we are creating a .stabx symbol, since we don't want
3170 to handle symbol suffixes for such symbols. */
b34976b6 3171static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3172
3173/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3174 symbols in the .bss segment as though they were local common
67c1ffbe 3175 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3176 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3177
3178static void
98027b10 3179ppc_comm (int lcomm)
252b5132
RH		 3180{
3181 asection *current_seg = now_seg;
3182 subsegT current_subseg = now_subseg;
3183 char *name;
3184 char endc;
3185 char *end_name;
3186 offsetT size;
3187 offsetT align;
3188 symbolS *lcomm_sym = NULL;
3189 symbolS *sym;
3190 char *pfrag;
3191
3192 name = input_line_pointer;
3193 endc = get_symbol_end ();
3194 end_name = input_line_pointer;
3195 *end_name = endc;
3196
3197 if (*input_line_pointer != ',')
3198 {
3199 as_bad (_("missing size"));
3200 ignore_rest_of_line ();
3201 return;
3202 }
3203 ++input_line_pointer;
3204
3205 size = get_absolute_expression ();
3206 if (size < 0)
3207 {
3208 as_bad (_("negative size"));
3209 ignore_rest_of_line ();
3210 return;
3211 }
3212
3213 if (! lcomm)
3214 {
3215 /* The third argument to .comm is the alignment. */
3216 if (*input_line_pointer != ',')
1ad63b2f 3217 align = 2;
252b5132
RH		 3218 else
3219 {
3220 ++input_line_pointer;
3221 align = get_absolute_expression ();
3222 if (align <= 0)
3223 {
3224 as_warn (_("ignoring bad alignment"));
1ad63b2f 3225 align = 2;
252b5132
RH		 3226 }
3227 }
3228 }
3229 else
3230 {
3231 char *lcomm_name;
3232 char lcomm_endc;
3233
1ad63b2f 3234 if (size <= 4)
252b5132
RH		 3235 align = 2;
3236 else
3237 align = 3;
3238
3239 /* The third argument to .lcomm appears to be the real local
3240 common symbol to create. References to the symbol named in
3241 the first argument are turned into references to the third
3242 argument. */
3243 if (*input_line_pointer != ',')
3244 {
3245 as_bad (_("missing real symbol name"));
3246 ignore_rest_of_line ();
3247 return;
3248 }
3249 ++input_line_pointer;
3250
3251 lcomm_name = input_line_pointer;
3252 lcomm_endc = get_symbol_end ();
81d4177b 3253
252b5132
RH		 3254 lcomm_sym = symbol_find_or_make (lcomm_name);
3255
3256 *input_line_pointer = lcomm_endc;
3257 }
3258
3259 *end_name = '\0';
3260 sym = symbol_find_or_make (name);
3261 *end_name = endc;
3262
3263 if (S_IS_DEFINED (sym)
3264 || S_GET_VALUE (sym) != 0)
3265 {
3266 as_bad (_("attempt to redefine symbol"));
3267 ignore_rest_of_line ();
3268 return;
3269 }
81d4177b 3270
252b5132 3271 record_alignment (bss_section, align);
81d4177b 3272
252b5132
RH		 3273 if (! lcomm
3274 || ! S_IS_DEFINED (lcomm_sym))
3275 {
3276 symbolS *def_sym;
3277 offsetT def_size;
3278
3279 if (! lcomm)
3280 {
3281 def_sym = sym;
3282 def_size = size;
3283 S_SET_EXTERNAL (sym);
3284 }
3285 else
3286 {
809ffe0d 3287 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3288 def_sym = lcomm_sym;
3289 def_size = 0;
3290 }
3291
3292 subseg_set (bss_section, 1);
3293 frag_align (align, 0, 0);
81d4177b 3294
809ffe0d 3295 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3296 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3297 def_size, (char *) NULL);
3298 *pfrag = 0;
3299 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3300 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3301 }
3302 else if (lcomm)
3303 {
3304 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3305 symbol_get_frag (lcomm_sym)->fr_offset =
3306 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3307 &~ ((1 << align) - 1));
809ffe0d
ILT		 3308 if (align > symbol_get_tc (lcomm_sym)->align)
3309 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3310 }
3311
3312 if (lcomm)
3313 {
3314 /* Make sym an offset from lcomm_sym. */
3315 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3316 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3317 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3318 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3319 }
3320
3321 subseg_set (current_seg, current_subseg);
3322
3323 demand_empty_rest_of_line ();
3324}
3325
3326/* The .csect pseudo-op. This switches us into a different
3327 subsegment. The first argument is a symbol whose value is the
3328 start of the .csect. In COFF, csect symbols get special aux
3329 entries defined by the x_csect field of union internal_auxent. The
3330 optional second argument is the alignment (the default is 2). */
3331
3332static void
98027b10 3333ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3334{
3335 char *name;
3336 char endc;
3337 symbolS *sym;
931e13a6 3338 offsetT align;
252b5132
RH		 3339
3340 name = input_line_pointer;
3341 endc = get_symbol_end ();
81d4177b 3342
252b5132
RH		 3343 sym = symbol_find_or_make (name);
3344
3345 *input_line_pointer = endc;
3346
3347 if (S_GET_NAME (sym)[0] == '\0')
3348 {
3349 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3350 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3351 }
3352
931e13a6 3353 align = 2;
252b5132
RH		 3354 if (*input_line_pointer == ',')
3355 {
3356 ++input_line_pointer;
931e13a6 3357 align = get_absolute_expression ();
252b5132
RH		 3358 }
3359
931e13a6
AM		 3360 ppc_change_csect (sym, align);
3361
252b5132
RH		 3362 demand_empty_rest_of_line ();
3363}
3364
3365/* Change to a different csect. */
3366
3367static void
98027b10 3368ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3369{
3370 if (S_IS_DEFINED (sym))
809ffe0d 3371 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3372 else
3373 {
3374 symbolS **list_ptr;
3375 int after_toc;
3376 int hold_chunksize;
3377 symbolS *list;
931e13a6
AM		 3378 int is_code;
3379 segT sec;
252b5132
RH		 3380
3381 /* This is a new csect. We need to look at the symbol class to
3382 figure out whether it should go in the text section or the
3383 data section. */
3384 after_toc = 0;
931e13a6 3385 is_code = 0;
96d56e9f 3386 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3387 {
3388 case XMC_PR:
3389 case XMC_RO:
3390 case XMC_DB:
3391 case XMC_GL:
3392 case XMC_XO:
3393 case XMC_SV:
3394 case XMC_TI:
3395 case XMC_TB:
3396 S_SET_SEGMENT (sym, text_section);
809ffe0d 3397 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3398 ++ppc_text_subsegment;
3399 list_ptr = &ppc_text_csects;
931e13a6 3400 is_code = 1;
252b5132
RH		 3401 break;
3402 case XMC_RW:
3403 case XMC_TC0:
3404 case XMC_TC:
3405 case XMC_DS:
3406 case XMC_UA:
3407 case XMC_BS:
3408 case XMC_UC:
3409 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3410 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3411 == ppc_data_subsegment))
252b5132
RH		 3412 after_toc = 1;
3413 S_SET_SEGMENT (sym, data_section);
809ffe0d 3414 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3415 ++ppc_data_subsegment;
3416 list_ptr = &ppc_data_csects;
3417 break;
3418 default:
3419 abort ();
3420 }
3421
3422 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3423 changing subsegments, so that we don't use a lot of memory
3424 space for what may be a small section. */
252b5132
RH		 3425 hold_chunksize = chunksize;
3426 chunksize = 64;
3427
931e13a6
AM		 3428 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3429 symbol_get_tc (sym)->subseg);
252b5132
RH		 3430
3431 chunksize = hold_chunksize;
3432
3433 if (after_toc)
3434 ppc_after_toc_frag = frag_now;
3435
931e13a6
AM		 3436 record_alignment (sec, align);
3437 if (is_code)
3438 frag_align_code (align, 0);
3439 else
3440 frag_align (align, 0, 0);
3441
809ffe0d 3442 symbol_set_frag (sym, frag_now);
252b5132
RH		 3443 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3444
931e13a6 3445 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3446 symbol_get_tc (sym)->output = 1;
3447 symbol_get_tc (sym)->within = sym;
81d4177b 3448
252b5132 3449 for (list = *list_ptr;
809ffe0d
ILT		 3450 symbol_get_tc (list)->next != (symbolS *) NULL;
3451 list = symbol_get_tc (list)->next)
252b5132 3452 ;
809ffe0d 3453 symbol_get_tc (list)->next = sym;
81d4177b 3454
252b5132 3455 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3456 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3457 &symbol_lastP);
252b5132
RH		 3458 }
3459
3460 ppc_current_csect = sym;
3461}
3462
3463/* This function handles the .text and .data pseudo-ops. These
3464 pseudo-ops aren't really used by XCOFF; we implement them for the
3465 convenience of people who aren't used to XCOFF. */
3466
3467static void
98027b10 3468ppc_section (int type)
252b5132
RH		 3469{
3470 const char *name;
3471 symbolS *sym;
3472
3473 if (type == 't')
3474 name = ".text[PR]";
3475 else if (type == 'd')
3476 name = ".data[RW]";
3477 else
3478 abort ();
3479
3480 sym = symbol_find_or_make (name);
3481
931e13a6 3482 ppc_change_csect (sym, 2);
252b5132
RH		 3483
3484 demand_empty_rest_of_line ();
3485}
3486
3487/* This function handles the .section pseudo-op. This is mostly to
3488 give an error, since XCOFF only supports .text, .data and .bss, but
3489 we do permit the user to name the text or data section. */
3490
3491static void
98027b10 3492ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3493{
3494 char *user_name;
3495 const char *real_name;
3496 char c;
3497 symbolS *sym;
3498
3499 user_name = input_line_pointer;
3500 c = get_symbol_end ();
3501
3502 if (strcmp (user_name, ".text") == 0)
3503 real_name = ".text[PR]";
3504 else if (strcmp (user_name, ".data") == 0)
3505 real_name = ".data[RW]";
3506 else
3507 {
3508 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3509 *input_line_pointer = c;
3510 ignore_rest_of_line ();
3511 return;
3512 }
3513
3514 *input_line_pointer = c;
3515
3516 sym = symbol_find_or_make (real_name);
3517
931e13a6 3518 ppc_change_csect (sym, 2);
252b5132
RH		 3519
3520 demand_empty_rest_of_line ();
3521}
3522
3523/* The .extern pseudo-op. We create an undefined symbol. */
3524
3525static void
98027b10 3526ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3527{
3528 char *name;
3529 char endc;
3530
3531 name = input_line_pointer;
3532 endc = get_symbol_end ();
3533
3534 (void) symbol_find_or_make (name);
3535
3536 *input_line_pointer = endc;
3537
3538 demand_empty_rest_of_line ();
3539}
3540
3541/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3542
3543static void
98027b10 3544ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3545{
3546 char *name;
3547 char endc;
3548 symbolS *sym;
3549
3550 name = input_line_pointer;
3551 endc = get_symbol_end ();
3552
3553 sym = symbol_find_or_make (name);
3554
3555 *input_line_pointer = endc;
3556
809ffe0d 3557 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3558
3559 demand_empty_rest_of_line ();
3560}
3561
3562/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3563 although I don't know why it bothers. */
3564
3565static void
98027b10 3566ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3567{
3568 char *name;
3569 char endc;
3570 symbolS *sym;
3571 int len;
3572
3573 name = input_line_pointer;
3574 endc = get_symbol_end ();
3575
3576 sym = symbol_find_or_make (name);
3577
3578 *input_line_pointer = endc;
3579
3580 if (*input_line_pointer != ',')
3581 {
3582 as_bad (_("missing rename string"));
3583 ignore_rest_of_line ();
3584 return;
3585 }
3586 ++input_line_pointer;
3587
809ffe0d 3588 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3589
3590 demand_empty_rest_of_line ();
3591}
3592
3593/* The .stabx pseudo-op. This is similar to a normal .stabs
3594 pseudo-op, but slightly different. A sample is
3595 .stabx "main:F-1",.main,142,0
3596 The first argument is the symbol name to create. The second is the
3597 value, and the third is the storage class. The fourth seems to be
3598 always zero, and I am assuming it is the type. */
3599
3600static void
98027b10 3601ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3602{
3603 char *name;
3604 int len;
3605 symbolS *sym;
3606 expressionS exp;
3607
3608 name = demand_copy_C_string (&len);
3609
3610 if (*input_line_pointer != ',')
3611 {
3612 as_bad (_("missing value"));
3613 return;
3614 }
3615 ++input_line_pointer;
3616
b34976b6 3617 ppc_stab_symbol = TRUE;
252b5132 3618 sym = symbol_make (name);
b34976b6 3619 ppc_stab_symbol = FALSE;
252b5132 3620
809ffe0d 3621 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3622
3623 (void) expression (&exp);
3624
3625 switch (exp.X_op)
3626 {
3627 case O_illegal:
3628 case O_absent:
3629 case O_big:
3630 as_bad (_("illegal .stabx expression; zero assumed"));
3631 exp.X_add_number = 0;
3632 /* Fall through. */
3633 case O_constant:
3634 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3635 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3636 break;
3637
3638 case O_symbol:
3639 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3640 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3641 else
3642 {
3643 S_SET_VALUE (sym,
3644 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3645 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3646 }
3647 break;
3648
3649 default:
3650 /* The value is some complex expression. This will probably
99a814a1
AM		 3651 fail at some later point, but this is probably the right
3652 thing to do here. */
809ffe0d 3653 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3654 break;
3655 }
3656
3657 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3658 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3659
3660 if (*input_line_pointer != ',')
3661 {
3662 as_bad (_("missing class"));
3663 return;
3664 }
3665 ++input_line_pointer;
3666
3667 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3668
3669 if (*input_line_pointer != ',')
3670 {
3671 as_bad (_("missing type"));
3672 return;
3673 }
3674 ++input_line_pointer;
3675
3676 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3677
809ffe0d 3678 symbol_get_tc (sym)->output = 1;
252b5132 3679
6877bb43 3680 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3681
809ffe0d 3682 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3683
41ea10b1 3684 /* In this case :
99a814a1 3685
41ea10b1
TR		 3686 .bs name
3687 .stabx "z",arrays_,133,0
3688 .es
99a814a1 3689
41ea10b1 3690 .comm arrays_,13768,3
99a814a1 3691
41ea10b1
TR		 3692 resolve_symbol_value will copy the exp's "within" into sym's when the
3693 offset is 0. Since this seems to be corner case problem,
3694 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3695 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3696
3697 if (exp.X_op == O_symbol)
41ea10b1
TR		 3698 {
3699 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3700 }
6877bb43 3701 }
99a814a1 3702
252b5132
RH		 3703 if (exp.X_op != O_symbol
3704 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3705 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3706 ppc_frob_label (sym);
3707 else
3708 {
3709 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3710 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3711 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3712 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3713 }
3714
3715 demand_empty_rest_of_line ();
3716}
3717
3718/* The .function pseudo-op. This takes several arguments. The first
3719 argument seems to be the external name of the symbol. The second
67c1ffbe 3720 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3721 uses the same name for both. I have no idea what the third and
3722 fourth arguments are meant to be. The optional fifth argument is
3723 an expression for the size of the function. In COFF this symbol
3724 gets an aux entry like that used for a csect. */
3725
3726static void
98027b10 3727ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3728{
3729 char *name;
3730 char endc;
3731 char *s;
3732 symbolS *ext_sym;
3733 symbolS *lab_sym;
3734
3735 name = input_line_pointer;
3736 endc = get_symbol_end ();
3737
3738 /* Ignore any [PR] suffix. */
3739 name = ppc_canonicalize_symbol_name (name);
3740 s = strchr (name, '[');
3741 if (s != (char *) NULL
3742 && strcmp (s + 1, "PR]") == 0)
3743 *s = '\0';
3744
3745 ext_sym = symbol_find_or_make (name);
3746
3747 *input_line_pointer = endc;
3748
3749 if (*input_line_pointer != ',')
3750 {
3751 as_bad (_("missing symbol name"));
3752 ignore_rest_of_line ();
3753 return;
3754 }
3755 ++input_line_pointer;
3756
3757 name = input_line_pointer;
3758 endc = get_symbol_end ();
3759
3760 lab_sym = symbol_find_or_make (name);
3761
3762 *input_line_pointer = endc;
3763
3764 if (ext_sym != lab_sym)
3765 {
809ffe0d
ILT		 3766 expressionS exp;
3767
3768 exp.X_op = O_symbol;
3769 exp.X_add_symbol = lab_sym;
3770 exp.X_op_symbol = NULL;
3771 exp.X_add_number = 0;
3772 exp.X_unsigned = 0;
3773 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3774 }
3775
96d56e9f
NC		 3776 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3777 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3778 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3779
3780 if (*input_line_pointer == ',')
3781 {
91d6fa6a 3782 expressionS exp;
252b5132
RH		 3783
3784 /* Ignore the third argument. */
3785 ++input_line_pointer;
91d6fa6a 3786 expression (& exp);
252b5132
RH		 3787 if (*input_line_pointer == ',')
3788 {
3789 /* Ignore the fourth argument. */
3790 ++input_line_pointer;
91d6fa6a 3791 expression (& exp);
252b5132
RH		 3792 if (*input_line_pointer == ',')
3793 {
3794 /* The fifth argument is the function size. */
3795 ++input_line_pointer;
809ffe0d
ILT		 3796 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3797 absolute_section,
3798 (valueT) 0,
3799 &zero_address_frag);
3800 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3801 }
3802 }
3803 }
3804
3805 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3806 SF_SET_FUNCTION (ext_sym);
3807 SF_SET_PROCESS (ext_sym);
3808 coff_add_linesym (ext_sym);
3809
3810 demand_empty_rest_of_line ();
3811}
3812
3813/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3814 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3815 with the correct line number */
5d6255fe 3816
8642cce8 3817static symbolS *saved_bi_sym = 0;
252b5132
RH		 3818
3819static void
98027b10 3820ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3821{
3822 symbolS *sym;
3823
3824 sym = symbol_make (".bf");
3825 S_SET_SEGMENT (sym, text_section);
809ffe0d 3826 symbol_set_frag (sym, frag_now);
252b5132
RH		 3827 S_SET_VALUE (sym, frag_now_fix ());
3828 S_SET_STORAGE_CLASS (sym, C_FCN);
3829
3830 coff_line_base = get_absolute_expression ();
3831
3832 S_SET_NUMBER_AUXILIARY (sym, 1);
3833 SA_SET_SYM_LNNO (sym, coff_line_base);
3834
8642cce8 3835 /* Line number for bi. */
5d6255fe 3836 if (saved_bi_sym)
8642cce8
TR		 3837 {
3838 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3839 saved_bi_sym = 0;
3840 }
5d6255fe 3841
8642cce8 3842
809ffe0d 3843 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3844
3845 ppc_frob_label (sym);
3846
3847 demand_empty_rest_of_line ();
3848}
3849
3850/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3851 ".ef", except that the line number is absolute, not relative to the
3852 most recent ".bf" symbol. */
3853
3854static void
98027b10 3855ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3856{
3857 symbolS *sym;
3858
3859 sym = symbol_make (".ef");
3860 S_SET_SEGMENT (sym, text_section);
809ffe0d 3861 symbol_set_frag (sym, frag_now);
252b5132
RH		 3862 S_SET_VALUE (sym, frag_now_fix ());
3863 S_SET_STORAGE_CLASS (sym, C_FCN);
3864 S_SET_NUMBER_AUXILIARY (sym, 1);
3865 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3866 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3867
3868 ppc_frob_label (sym);
3869
3870 demand_empty_rest_of_line ();
3871}
3872
3873/* The .bi and .ei pseudo-ops. These take a string argument and
3874 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3875 the symbol list. The value of .bi will be know when the next .bf
3876 is encountered. */
252b5132
RH		 3877
3878static void
98027b10 3879ppc_biei (int ei)
252b5132
RH		 3880{
3881 static symbolS *last_biei;
3882
3883 char *name;
3884 int len;
3885 symbolS *sym;
3886 symbolS *look;
3887
3888 name = demand_copy_C_string (&len);
3889
3890 /* The value of these symbols is actually file offset. Here we set
3891 the value to the index into the line number entries. In
3892 ppc_frob_symbols we set the fix_line field, which will cause BFD
3893 to do the right thing. */
3894
3895 sym = symbol_make (name);
3896 /* obj-coff.c currently only handles line numbers correctly in the
3897 .text section. */
3898 S_SET_SEGMENT (sym, text_section);
3899 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3900 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3901
3902 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3903 symbol_get_tc (sym)->output = 1;
81d4177b 3904
8642cce8 3905 /* Save bi. */
5d6255fe 3906 if (ei)
8642cce8
TR		 3907 saved_bi_sym = 0;
3908 else
3909 saved_bi_sym = sym;
3910
252b5132
RH		 3911 for (look = last_biei ? last_biei : symbol_rootP;
3912 (look != (symbolS *) NULL
3913 && (S_GET_STORAGE_CLASS (look) == C_FILE
3914 || S_GET_STORAGE_CLASS (look) == C_BINCL
3915 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3916 look = symbol_next (look))
3917 ;
3918 if (look != (symbolS *) NULL)
3919 {
3920 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3921 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3922 last_biei = sym;
3923 }
3924
3925 demand_empty_rest_of_line ();
3926}
3927
3928/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3929 There is one argument, which is a csect symbol. The value of the
3930 .bs symbol is the index of this csect symbol. */
3931
3932static void
98027b10 3933ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3934{
3935 char *name;
3936 char endc;
3937 symbolS *csect;
3938 symbolS *sym;
3939
3940 if (ppc_current_block != NULL)
3941 as_bad (_("nested .bs blocks"));
3942
3943 name = input_line_pointer;
3944 endc = get_symbol_end ();
3945
3946 csect = symbol_find_or_make (name);
3947
3948 *input_line_pointer = endc;
3949
3950 sym = symbol_make (".bs");
3951 S_SET_SEGMENT (sym, now_seg);
3952 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3953 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3954 symbol_get_tc (sym)->output = 1;
252b5132 3955
809ffe0d 3956 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3957
3958 ppc_frob_label (sym);
3959
3960 ppc_current_block = sym;
3961
3962 demand_empty_rest_of_line ();
3963}
3964
3965/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3966
3967static void
98027b10 3968ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3969{
3970 symbolS *sym;
3971
3972 if (ppc_current_block == NULL)
3973 as_bad (_(".es without preceding .bs"));
3974
3975 sym = symbol_make (".es");
3976 S_SET_SEGMENT (sym, now_seg);
3977 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3978 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3979 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3980
3981 ppc_frob_label (sym);
3982
3983 ppc_current_block = NULL;
3984
3985 demand_empty_rest_of_line ();
3986}
3987
3988/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3989 line number. */
3990
3991static void
98027b10 3992ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3993{
3994 symbolS *sym;
3995
3996 sym = symbol_make (".bb");
3997 S_SET_SEGMENT (sym, text_section);
809ffe0d 3998 symbol_set_frag (sym, frag_now);
252b5132
RH		 3999 S_SET_VALUE (sym, frag_now_fix ());
4000 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4001
4002 S_SET_NUMBER_AUXILIARY (sym, 1);
4003 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4004
809ffe0d 4005 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4006
4007 SF_SET_PROCESS (sym);
4008
4009 ppc_frob_label (sym);
4010
4011 demand_empty_rest_of_line ();
4012}
4013
4014/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4015 line number. */
4016
4017static void
98027b10 4018ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4019{
4020 symbolS *sym;
4021
4022 sym = symbol_make (".eb");
4023 S_SET_SEGMENT (sym, text_section);
809ffe0d 4024 symbol_set_frag (sym, frag_now);
252b5132
RH		 4025 S_SET_VALUE (sym, frag_now_fix ());
4026 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4027 S_SET_NUMBER_AUXILIARY (sym, 1);
4028 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4029 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4030
4031 SF_SET_PROCESS (sym);
4032
4033 ppc_frob_label (sym);
4034
4035 demand_empty_rest_of_line ();
4036}
4037
4038/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4039 specified name. */
4040
4041static void
98027b10 4042ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4043{
4044 char *name;
4045 int len;
4046 symbolS *sym;
4047
4048 name = demand_copy_C_string (&len);
4049 sym = symbol_make (name);
4050 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4051 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4052 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4053 S_SET_VALUE (sym, 0);
809ffe0d 4054 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4055
4056 ppc_frob_label (sym);
4057
4058 demand_empty_rest_of_line ();
4059}
4060
4061/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4062
4063static void
98027b10 4064ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4065{
4066 symbolS *sym;
4067
4068 sym = symbol_make (".ec");
4069 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4070 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4071 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4072 S_SET_VALUE (sym, 0);
809ffe0d 4073 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4074
4075 ppc_frob_label (sym);
4076
4077 demand_empty_rest_of_line ();
4078}
4079
4080/* The .toc pseudo-op. Switch to the .toc subsegment. */
4081
4082static void
98027b10 4083ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4084{
4085 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4086 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4087 else
4088 {
4089 subsegT subseg;
4090 symbolS *sym;
4091 symbolS *list;
81d4177b 4092
252b5132
RH		 4093 subseg = ppc_data_subsegment;
4094 ++ppc_data_subsegment;
4095
4096 subseg_new (segment_name (data_section), subseg);
4097 ppc_toc_frag = frag_now;
4098
4099 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4100 symbol_set_frag (sym, frag_now);
252b5132
RH		 4101 S_SET_SEGMENT (sym, data_section);
4102 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4103 symbol_get_tc (sym)->subseg = subseg;
4104 symbol_get_tc (sym)->output = 1;
4105 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4106
4107 ppc_toc_csect = sym;
81d4177b 4108
252b5132 4109 for (list = ppc_data_csects;
809ffe0d
ILT		 4110 symbol_get_tc (list)->next != (symbolS *) NULL;
4111 list = symbol_get_tc (list)->next)
252b5132 4112 ;
809ffe0d 4113 symbol_get_tc (list)->next = sym;
252b5132
RH		 4114
4115 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4116 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4117 &symbol_lastP);
252b5132
RH		 4118 }
4119
4120 ppc_current_csect = ppc_toc_csect;
4121
4122 demand_empty_rest_of_line ();
4123}
4124
4125/* The AIX assembler automatically aligns the operands of a .long or
4126 .short pseudo-op, and we want to be compatible. */
4127
4128static void
98027b10 4129ppc_xcoff_cons (int log_size)
252b5132
RH		 4130{
4131 frag_align (log_size, 0, 0);
4132 record_alignment (now_seg, log_size);
4133 cons (1 << log_size);
4134}
4135
4136static void
98027b10 4137ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4138{
4139 expressionS exp;
4140 int byte_count;
4141
4142 (void) expression (&exp);
4143
4144 if (exp.X_op != O_constant)
4145 {
4146 as_bad (_("non-constant byte count"));
4147 return;
4148 }
4149
4150 byte_count = exp.X_add_number;
4151
4152 if (*input_line_pointer != ',')
4153 {
4154 as_bad (_("missing value"));
4155 return;
4156 }
4157
4158 ++input_line_pointer;
4159 cons (byte_count);
4160}
4161
4162#endif /* OBJ_XCOFF */
0baf16f2 4163#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4164\f
4165/* The .tc pseudo-op. This is used when generating either XCOFF or
4166 ELF. This takes two or more arguments.
4167
4168 When generating XCOFF output, the first argument is the name to
4169 give to this location in the toc; this will be a symbol with class
0baf16f2 4170 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4171 this location in the TOC; often there is just one more argument, a
1049f94e 4172 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4173 depends on target word size. A 32-bit target uses 4-byte values, a
4174 64-bit target uses 8-byte values.
252b5132
RH		 4175
4176 When not generating XCOFF output, the arguments are the same, but
4177 the first argument is simply ignored. */
4178
4179static void
98027b10 4180ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4181{
4182#ifdef OBJ_XCOFF
4183
4184 /* Define the TOC symbol name. */
4185 {
4186 char *name;
4187 char endc;
4188 symbolS *sym;
4189
4190 if (ppc_toc_csect == (symbolS *) NULL
4191 || ppc_toc_csect != ppc_current_csect)
4192 {
4193 as_bad (_(".tc not in .toc section"));
4194 ignore_rest_of_line ();
4195 return;
4196 }
4197
4198 name = input_line_pointer;
4199 endc = get_symbol_end ();
4200
4201 sym = symbol_find_or_make (name);
4202
4203 *input_line_pointer = endc;
4204
4205 if (S_IS_DEFINED (sym))
4206 {
4207 symbolS *label;
4208
809ffe0d 4209 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4210 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4211 {
4212 as_bad (_(".tc with no label"));
4213 ignore_rest_of_line ();
4214 return;
4215 }
4216
4217 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4218 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4219 S_SET_VALUE (label, S_GET_VALUE (sym));
4220
4221 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4222 ++input_line_pointer;
4223
4224 return;
4225 }
4226
4227 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4228 symbol_set_frag (sym, frag_now);
252b5132 4229 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4230 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4231 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4232
4233 ppc_frob_label (sym);
4234 }
4235
0baf16f2
AM		 4236#endif /* OBJ_XCOFF */
4237#ifdef OBJ_ELF
9c7977b3 4238 int align;
252b5132
RH		 4239
4240 /* Skip the TOC symbol name. */
4241 while (is_part_of_name (*input_line_pointer)
d13d4015 4242 || *input_line_pointer == ' '
252b5132
RH		 4243 || *input_line_pointer == '['
4244 || *input_line_pointer == ']'
4245 || *input_line_pointer == '{'
4246 || *input_line_pointer == '}')
4247 ++input_line_pointer;
4248
0baf16f2 4249 /* Align to a four/eight byte boundary. */
2b3c4602 4250 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4251 frag_align (align, 0, 0);
4252 record_alignment (now_seg, align);
0baf16f2 4253#endif /* OBJ_ELF */
252b5132
RH		 4254
4255 if (*input_line_pointer != ',')
4256 demand_empty_rest_of_line ();
4257 else
4258 {
4259 ++input_line_pointer;
2b3c4602 4260 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4261 }
4262}
0baf16f2
AM		 4263
4264/* Pseudo-op .machine. */
0baf16f2
AM		 4265
4266static void
98027b10 4267ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4268{
69c040df
AM		 4269 char *cpu_string;
4270#define MAX_HISTORY 100
fa452fa6 4271 static ppc_cpu_t *cpu_history;
69c040df
AM		 4272 static int curr_hist;
4273
4274 SKIP_WHITESPACE ();
4275
4276 if (*input_line_pointer == '"')
4277 {
4278 int len;
4279 cpu_string = demand_copy_C_string (&len);
4280 }
4281 else
4282 {
4283 char c;
4284 cpu_string = input_line_pointer;
4285 c = get_symbol_end ();
4286 cpu_string = xstrdup (cpu_string);
4287 *input_line_pointer = c;
4288 }
4289
4290 if (cpu_string != NULL)
4291 {
fa452fa6 4292 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4293 ppc_cpu_t new_cpu;
69c040df
AM		 4294 char *p;
4295
4296 for (p = cpu_string; *p != 0; p++)
4297 *p = TOLOWER (*p);
4298
4299 if (strcmp (cpu_string, "push") == 0)
4300 {
4301 if (cpu_history == NULL)
4302 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4303
4304 if (curr_hist >= MAX_HISTORY)
4305 as_bad (_(".machine stack overflow"));
4306 else
4307 cpu_history[curr_hist++] = ppc_cpu;
4308 }
4309 else if (strcmp (cpu_string, "pop") == 0)
4310 {
4311 if (curr_hist <= 0)
4312 as_bad (_(".machine stack underflow"));
4313 else
4314 ppc_cpu = cpu_history[--curr_hist];
4315 }
69fe9ce5
AM		 4316 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4317 ppc_cpu = new_cpu;
69c040df
AM		 4318 else
4319 as_bad (_("invalid machine `%s'"), cpu_string);
4320
4321 if (ppc_cpu != old_cpu)
4322 ppc_setup_opcodes ();
4323 }
4324
4325 demand_empty_rest_of_line ();
0baf16f2
AM		 4326}
4327
4328/* See whether a symbol is in the TOC section. */
4329
4330static int
98027b10 4331ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4332{
4333#ifdef OBJ_XCOFF
96d56e9f 4334 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4335#endif
4336#ifdef OBJ_ELF
4337 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4338 if (ppc_obj64)
0baf16f2
AM		 4339 return strcmp (sname, ".toc") == 0;
4340 else
4341 return strcmp (sname, ".got") == 0;
4342#endif
4343}
4344#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4345\f
4346#ifdef TE_PE
4347
99a814a1 4348/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4349
4350/* Set the current section. */
4351static void
98027b10 4352ppc_set_current_section (segT new)
252b5132
RH		 4353{
4354 ppc_previous_section = ppc_current_section;
4355 ppc_current_section = new;
4356}
4357
4358/* pseudo-op: .previous
4359 behaviour: toggles the current section with the previous section.
4360 errors: None
99a814a1
AM		 4361 warnings: "No previous section" */
4362
252b5132 4363static void
98027b10 4364ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4365{
4366 symbolS *tmp;
4367
81d4177b 4368 if (ppc_previous_section == NULL)
252b5132 4369 {
99a814a1 4370 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4371 return;
4372 }
4373
99a814a1 4374 subseg_set (ppc_previous_section, 0);
252b5132 4375
99a814a1 4376 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4377}
4378
4379/* pseudo-op: .pdata
4380 behaviour: predefined read only data section
b34976b6 4381 double word aligned
252b5132
RH		 4382 errors: None
4383 warnings: None
4384 initial: .section .pdata "adr3"
b34976b6 4385 a - don't know -- maybe a misprint
252b5132
RH		 4386 d - initialized data
4387 r - readable
4388 3 - double word aligned (that would be 4 byte boundary)
4389
4390 commentary:
4391 Tag index tables (also known as the function table) for exception
99a814a1 4392 handling, debugging, etc. */
252b5132 4393
252b5132 4394static void
98027b10 4395ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4396{
81d4177b 4397 if (pdata_section == 0)
252b5132
RH		 4398 {
4399 pdata_section = subseg_new (".pdata", 0);
81d4177b 4400
252b5132
RH		 4401 bfd_set_section_flags (stdoutput, pdata_section,
4402 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4403 | SEC_READONLY | SEC_DATA ));
81d4177b 4404
252b5132
RH		 4405 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4406 }
4407 else
4408 {
99a814a1 4409 pdata_section = subseg_new (".pdata", 0);
252b5132 4410 }
99a814a1 4411 ppc_set_current_section (pdata_section);
252b5132
RH		 4412}
4413
4414/* pseudo-op: .ydata
4415 behaviour: predefined read only data section
b34976b6 4416 double word aligned
252b5132
RH		 4417 errors: None
4418 warnings: None
4419 initial: .section .ydata "drw3"
b34976b6 4420 a - don't know -- maybe a misprint
252b5132
RH		 4421 d - initialized data
4422 r - readable
4423 3 - double word aligned (that would be 4 byte boundary)
4424 commentary:
4425 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4426 debugging, etc. */
4427
252b5132 4428static void
98027b10 4429ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4430{
81d4177b 4431 if (ydata_section == 0)
252b5132
RH		 4432 {
4433 ydata_section = subseg_new (".ydata", 0);
4434 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4435 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4436 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4437
4438 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4439 }
4440 else
4441 {
4442 ydata_section = subseg_new (".ydata", 0);
4443 }
99a814a1 4444 ppc_set_current_section (ydata_section);
252b5132
RH		 4445}
4446
4447/* pseudo-op: .reldata
4448 behaviour: predefined read write data section
b34976b6 4449 double word aligned (4-byte)
252b5132
RH		 4450 FIXME: relocation is applied to it
4451 FIXME: what's the difference between this and .data?
4452 errors: None
4453 warnings: None
4454 initial: .section .reldata "drw3"
4455 d - initialized data
4456 r - readable
4457 w - writeable
4458 3 - double word aligned (that would be 8 byte boundary)
4459
4460 commentary:
4461 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4462 function descriptors, etc. */
4463
252b5132 4464static void
98027b10 4465ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4466{
4467 if (reldata_section == 0)
4468 {
4469 reldata_section = subseg_new (".reldata", 0);
4470
4471 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4472 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4473 | SEC_DATA));
252b5132
RH		 4474
4475 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4476 }
4477 else
4478 {
4479 reldata_section = subseg_new (".reldata", 0);
4480 }
99a814a1 4481 ppc_set_current_section (reldata_section);
252b5132
RH		 4482}
4483
4484/* pseudo-op: .rdata
4485 behaviour: predefined read only data section
b34976b6 4486 double word aligned
252b5132
RH		 4487 errors: None
4488 warnings: None
4489 initial: .section .rdata "dr3"
4490 d - initialized data
4491 r - readable
99a814a1
AM		 4492 3 - double word aligned (that would be 4 byte boundary) */
4493
252b5132 4494static void
98027b10 4495ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4496{
4497 if (rdata_section == 0)
4498 {
4499 rdata_section = subseg_new (".rdata", 0);
4500 bfd_set_section_flags (stdoutput, rdata_section,
4501 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4502 | SEC_READONLY | SEC_DATA ));
4503
4504 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4505 }
4506 else
4507 {
4508 rdata_section = subseg_new (".rdata", 0);
4509 }
99a814a1 4510 ppc_set_current_section (rdata_section);
252b5132
RH		 4511}
4512
4513/* pseudo-op: .ualong
81d4177b 4514 behaviour: much like .int, with the exception that no alignment is
b34976b6 4515 performed.
252b5132
RH		 4516 FIXME: test the alignment statement
4517 errors: None
99a814a1
AM		 4518 warnings: None */
4519
252b5132 4520static void
98027b10 4521ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4522{
99a814a1
AM		 4523 /* Try for long. */
4524 cons (4);
252b5132
RH		 4525}
4526
4527/* pseudo-op: .znop <symbol name>
4528 behaviour: Issue a nop instruction
b34976b6 4529 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4530 the supplied symbol name.
4531 errors: None
99a814a1
AM		 4532 warnings: Missing symbol name */
4533
252b5132 4534static void
98027b10 4535ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4536{
4537 unsigned long insn;
4538 const struct powerpc_opcode *opcode;
4539 expressionS ex;
4540 char *f;
252b5132 4541 symbolS *sym;
252b5132
RH		 4542 char *symbol_name;
4543 char c;
4544 char *name;
4545 unsigned int exp;
4546 flagword flags;
4547 asection *sec;
4548
99a814a1 4549 /* Strip out the symbol name. */
252b5132
RH		 4550 symbol_name = input_line_pointer;
4551 c = get_symbol_end ();
4552
4553 name = xmalloc (input_line_pointer - symbol_name + 1);
4554 strcpy (name, symbol_name);
4555
4556 sym = symbol_find_or_make (name);
4557
4558 *input_line_pointer = c;
4559
4560 SKIP_WHITESPACE ();
4561
4562 /* Look up the opcode in the hash table. */
4563 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4564
99a814a1 4565 /* Stick in the nop. */
252b5132
RH		 4566 insn = opcode->opcode;
4567
4568 /* Write out the instruction. */
4569 f = frag_more (4);
4570 md_number_to_chars (f, insn, 4);
4571 fix_new (frag_now,
4572 f - frag_now->fr_literal,
4573 4,
4574 sym,
4575 0,
4576 0,
4577 BFD_RELOC_16_GOT_PCREL);
4578
4579}
4580
81d4177b
KH		 4581/* pseudo-op:
4582 behaviour:
4583 errors:
99a814a1
AM		 4584 warnings: */
4585
252b5132 4586static void
98027b10 4587ppc_pe_comm (int lcomm)
252b5132 4588{
98027b10
AM		 4589 char *name;
4590 char c;
4591 char *p;
252b5132 4592 offsetT temp;
98027b10 4593 symbolS *symbolP;
252b5132
RH		 4594 offsetT align;
4595
4596 name = input_line_pointer;
4597 c = get_symbol_end ();
4598
99a814a1 4599 /* just after name is now '\0'. */
252b5132
RH		 4600 p = input_line_pointer;
4601 *p = c;
4602 SKIP_WHITESPACE ();
4603 if (*input_line_pointer != ',')
4604 {
4605 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4606 ignore_rest_of_line ();
4607 return;
4608 }
4609
4610 input_line_pointer++; /* skip ',' */
4611 if ((temp = get_absolute_expression ()) < 0)
4612 {
4613 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4614 ignore_rest_of_line ();
4615 return;
4616 }
4617
4618 if (! lcomm)
4619 {
4620 /* The third argument to .comm is the alignment. */
4621 if (*input_line_pointer != ',')
4622 align = 3;
4623 else
4624 {
4625 ++input_line_pointer;
4626 align = get_absolute_expression ();
4627 if (align <= 0)
4628 {
4629 as_warn (_("ignoring bad alignment"));
4630 align = 3;
4631 }
4632 }
4633 }
4634
4635 *p = 0;
4636 symbolP = symbol_find_or_make (name);
4637
4638 *p = c;
4639 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4640 {
4641 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4642 S_GET_NAME (symbolP));
4643 ignore_rest_of_line ();
4644 return;
4645 }
4646
4647 if (S_GET_VALUE (symbolP))
4648 {
4649 if (S_GET_VALUE (symbolP) != (valueT) temp)
4650 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4651 S_GET_NAME (symbolP),
4652 (long) S_GET_VALUE (symbolP),
4653 (long) temp);
4654 }
4655 else
4656 {
4657 S_SET_VALUE (symbolP, (valueT) temp);
4658 S_SET_EXTERNAL (symbolP);
86ebace2 4659 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4660 }
4661
4662 demand_empty_rest_of_line ();
4663}
4664
4665/*
4666 * implement the .section pseudo op:
4667 * .section name {, "flags"}
4668 * ^ ^
4669 * | +--- optional flags: 'b' for bss
4670 * | 'i' for info
4671 * +-- section name 'l' for lib
4672 * 'n' for noload
4673 * 'o' for over
4674 * 'w' for data
4675 * 'd' (apparently m88k for data)
4676 * 'x' for text
4677 * But if the argument is not a quoted string, treat it as a
4678 * subsegment number.
4679 *
4680 * FIXME: this is a copy of the section processing from obj-coff.c, with
4681 * additions/changes for the moto-pas assembler support. There are three
4682 * categories:
4683 *
81d4177b 4684 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4685 * setting bits that bfd probably neither understands or uses. The
4686 * correct approach (?) will have to incorporate extra fields attached
4687 * to the section to hold the system specific stuff. (krk)
4688 *
4689 * Section Contents:
4690 * 'a' - unknown - referred to in documentation, but no definition supplied
4691 * 'c' - section has code
4692 * 'd' - section has initialized data
4693 * 'u' - section has uninitialized data
4694 * 'i' - section contains directives (info)
4695 * 'n' - section can be discarded
4696 * 'R' - remove section at link time
4697 *
4698 * Section Protection:
4699 * 'r' - section is readable
4700 * 'w' - section is writeable
4701 * 'x' - section is executable
4702 * 's' - section is sharable
4703 *
4704 * Section Alignment:
4705 * '0' - align to byte boundary
4706 * '1' - align to halfword undary
4707 * '2' - align to word boundary
4708 * '3' - align to doubleword boundary
4709 * '4' - align to quadword boundary
4710 * '5' - align to 32 byte boundary
4711 * '6' - align to 64 byte boundary
4712 *
4713 */
4714
4715void
98027b10 4716ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4717{
99a814a1 4718 /* Strip out the section name. */
252b5132
RH		 4719 char *section_name;
4720 char c;
4721 char *name;
4722 unsigned int exp;
4723 flagword flags;
4724 segT sec;
4725 int align;
4726
4727 section_name = input_line_pointer;
4728 c = get_symbol_end ();
4729
4730 name = xmalloc (input_line_pointer - section_name + 1);
4731 strcpy (name, section_name);
4732
4733 *input_line_pointer = c;
4734
4735 SKIP_WHITESPACE ();
4736
4737 exp = 0;
4738 flags = SEC_NO_FLAGS;
4739
4740 if (strcmp (name, ".idata$2") == 0)
4741 {
4742 align = 0;
4743 }
4744 else if (strcmp (name, ".idata$3") == 0)
4745 {
4746 align = 0;
4747 }
4748 else if (strcmp (name, ".idata$4") == 0)
4749 {
4750 align = 2;
4751 }
4752 else if (strcmp (name, ".idata$5") == 0)
4753 {
4754 align = 2;
4755 }
4756 else if (strcmp (name, ".idata$6") == 0)
4757 {
4758 align = 1;
4759 }
4760 else
99a814a1
AM		 4761 /* Default alignment to 16 byte boundary. */
4762 align = 4;
252b5132
RH		 4763
4764 if (*input_line_pointer == ',')
4765 {
4766 ++input_line_pointer;
4767 SKIP_WHITESPACE ();
4768 if (*input_line_pointer != '"')
4769 exp = get_absolute_expression ();
4770 else
4771 {
4772 ++input_line_pointer;
4773 while (*input_line_pointer != '"'
4774 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4775 {
4776 switch (*input_line_pointer)
4777 {
4778 /* Section Contents */
4779 case 'a': /* unknown */
4780 as_bad (_("Unsupported section attribute -- 'a'"));
4781 break;
4782 case 'c': /* code section */
81d4177b 4783 flags |= SEC_CODE;
252b5132
RH		 4784 break;
4785 case 'd': /* section has initialized data */
4786 flags |= SEC_DATA;
4787 break;
4788 case 'u': /* section has uninitialized data */
4789 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4790 in winnt.h */
4791 flags |= SEC_ROM;
4792 break;
4793 case 'i': /* section contains directives (info) */
4794 /* FIXME: This is IMAGE_SCN_LNK_INFO
4795 in winnt.h */
4796 flags |= SEC_HAS_CONTENTS;
4797 break;
4798 case 'n': /* section can be discarded */
81d4177b 4799 flags &=~ SEC_LOAD;
252b5132
RH		 4800 break;
4801 case 'R': /* Remove section at link time */
4802 flags |= SEC_NEVER_LOAD;
4803 break;
8d452c78 4804#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4805 /* Section Protection */
4806 case 'r': /* section is readable */
4807 flags |= IMAGE_SCN_MEM_READ;
4808 break;
4809 case 'w': /* section is writeable */
4810 flags |= IMAGE_SCN_MEM_WRITE;
4811 break;
4812 case 'x': /* section is executable */
4813 flags |= IMAGE_SCN_MEM_EXECUTE;
4814 break;
4815 case 's': /* section is sharable */
4816 flags |= IMAGE_SCN_MEM_SHARED;
4817 break;
4818
4819 /* Section Alignment */
4820 case '0': /* align to byte boundary */
4821 flags |= IMAGE_SCN_ALIGN_1BYTES;
4822 align = 0;
4823 break;
4824 case '1': /* align to halfword boundary */
4825 flags |= IMAGE_SCN_ALIGN_2BYTES;
4826 align = 1;
4827 break;
4828 case '2': /* align to word boundary */
4829 flags |= IMAGE_SCN_ALIGN_4BYTES;
4830 align = 2;
4831 break;
4832 case '3': /* align to doubleword boundary */
4833 flags |= IMAGE_SCN_ALIGN_8BYTES;
4834 align = 3;
4835 break;
4836 case '4': /* align to quadword boundary */
4837 flags |= IMAGE_SCN_ALIGN_16BYTES;
4838 align = 4;
4839 break;
4840 case '5': /* align to 32 byte boundary */
4841 flags |= IMAGE_SCN_ALIGN_32BYTES;
4842 align = 5;
4843 break;
4844 case '6': /* align to 64 byte boundary */
4845 flags |= IMAGE_SCN_ALIGN_64BYTES;
4846 align = 6;
4847 break;
8d452c78 4848#endif
252b5132 4849 default:
99a814a1
AM		 4850 as_bad (_("unknown section attribute '%c'"),
4851 *input_line_pointer);
252b5132
RH		 4852 break;
4853 }
4854 ++input_line_pointer;
4855 }
4856 if (*input_line_pointer == '"')
4857 ++input_line_pointer;
4858 }
4859 }
4860
4861 sec = subseg_new (name, (subsegT) exp);
4862
99a814a1 4863 ppc_set_current_section (sec);
252b5132
RH		 4864
4865 if (flags != SEC_NO_FLAGS)
4866 {
4867 if (! bfd_set_section_flags (stdoutput, sec, flags))
4868 as_bad (_("error setting flags for \"%s\": %s"),
4869 bfd_section_name (stdoutput, sec),
4870 bfd_errmsg (bfd_get_error ()));
4871 }
4872
99a814a1 4873 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4874}
4875
4876static void
98027b10 4877ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4878{
4879 char *name;
4880 char endc;
4881 symbolS *ext_sym;
4882
4883 name = input_line_pointer;
4884 endc = get_symbol_end ();
4885
4886 ext_sym = symbol_find_or_make (name);
4887
4888 *input_line_pointer = endc;
4889
4890 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4891 SF_SET_FUNCTION (ext_sym);
4892 SF_SET_PROCESS (ext_sym);
4893 coff_add_linesym (ext_sym);
4894
4895 demand_empty_rest_of_line ();
4896}
4897
4898static void
98027b10 4899ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4900{
4901 if (tocdata_section == 0)
4902 {
4903 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4904 /* FIXME: section flags won't work. */
252b5132
RH		 4905 bfd_set_section_flags (stdoutput, tocdata_section,
4906 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4907 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4908
4909 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4910 }
4911 else
4912 {
4913 rdata_section = subseg_new (".tocd", 0);
4914 }
4915
99a814a1 4916 ppc_set_current_section (tocdata_section);
252b5132
RH		 4917
4918 demand_empty_rest_of_line ();
4919}
4920
4921/* Don't adjust TOC relocs to use the section symbol. */
4922
4923int
98027b10 4924ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4925{
4926 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4927}
4928
4929#endif
4930\f
4931#ifdef OBJ_XCOFF
4932
4933/* XCOFF specific symbol and file handling. */
4934
4935/* Canonicalize the symbol name. We use the to force the suffix, if
4936 any, to use square brackets, and to be in upper case. */
4937
4938char *
98027b10 4939ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4940{
4941 char *s;
4942
4943 if (ppc_stab_symbol)
4944 return name;
4945
4946 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4947 ;
4948 if (*s != '\0')
4949 {
4950 char brac;
4951
4952 if (*s == '[')
4953 brac = ']';
4954 else
4955 {
4956 *s = '[';
4957 brac = '}';
4958 }
4959
4960 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4961 *s = TOUPPER (*s);
252b5132
RH		 4962
4963 if (*s == '\0' || s[1] != '\0')
4964 as_bad (_("bad symbol suffix"));
4965
4966 *s = ']';
4967 }
4968
4969 return name;
4970}
4971
4972/* Set the class of a symbol based on the suffix, if any. This is
4973 called whenever a new symbol is created. */
4974
4975void
98027b10 4976ppc_symbol_new_hook (symbolS *sym)
252b5132 4977{
809ffe0d 4978 struct ppc_tc_sy *tc;
252b5132
RH		 4979 const char *s;
4980
809ffe0d
ILT		 4981 tc = symbol_get_tc (sym);
4982 tc->next = NULL;
4983 tc->output = 0;
96d56e9f 4984 tc->symbol_class = -1;
809ffe0d
ILT		 4985 tc->real_name = NULL;
4986 tc->subseg = 0;
4987 tc->align = 0;
4988 tc->size = NULL;
4989 tc->within = NULL;
252b5132
RH		 4990
4991 if (ppc_stab_symbol)
4992 return;
4993
4994 s = strchr (S_GET_NAME (sym), '[');
4995 if (s == (const char *) NULL)
4996 {
4997 /* There is no suffix. */
4998 return;
4999 }
5000
5001 ++s;
5002
5003 switch (s[0])
5004 {
5005 case 'B':
5006 if (strcmp (s, "BS]") == 0)
96d56e9f 5007 tc->symbol_class = XMC_BS;
252b5132
RH		 5008 break;
5009 case 'D':
5010 if (strcmp (s, "DB]") == 0)
96d56e9f 5011 tc->symbol_class = XMC_DB;
252b5132 5012 else if (strcmp (s, "DS]") == 0)
96d56e9f 5013 tc->symbol_class = XMC_DS;
252b5132
RH		 5014 break;
5015 case 'G':
5016 if (strcmp (s, "GL]") == 0)
96d56e9f 5017 tc->symbol_class = XMC_GL;
252b5132
RH		 5018 break;
5019 case 'P':
5020 if (strcmp (s, "PR]") == 0)
96d56e9f 5021 tc->symbol_class = XMC_PR;
252b5132
RH		 5022 break;
5023 case 'R':
5024 if (strcmp (s, "RO]") == 0)
96d56e9f 5025 tc->symbol_class = XMC_RO;
252b5132 5026 else if (strcmp (s, "RW]") == 0)
96d56e9f 5027 tc->symbol_class = XMC_RW;
252b5132
RH		 5028 break;
5029 case 'S':
5030 if (strcmp (s, "SV]") == 0)
96d56e9f 5031 tc->symbol_class = XMC_SV;
252b5132
RH		 5032 break;
5033 case 'T':
5034 if (strcmp (s, "TC]") == 0)
96d56e9f 5035 tc->symbol_class = XMC_TC;
252b5132 5036 else if (strcmp (s, "TI]") == 0)
96d56e9f 5037 tc->symbol_class = XMC_TI;
252b5132 5038 else if (strcmp (s, "TB]") == 0)
96d56e9f 5039 tc->symbol_class = XMC_TB;
252b5132 5040 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5041 tc->symbol_class = XMC_TC0;
252b5132
RH		 5042 break;
5043 case 'U':
5044 if (strcmp (s, "UA]") == 0)
96d56e9f 5045 tc->symbol_class = XMC_UA;
252b5132 5046 else if (strcmp (s, "UC]") == 0)
96d56e9f 5047 tc->symbol_class = XMC_UC;
252b5132
RH		 5048 break;
5049 case 'X':
5050 if (strcmp (s, "XO]") == 0)
96d56e9f 5051 tc->symbol_class = XMC_XO;
252b5132
RH		 5052 break;
5053 }
5054
96d56e9f 5055 if (tc->symbol_class == -1)
252b5132
RH		 5056 as_bad (_("Unrecognized symbol suffix"));
5057}
5058
5059/* Set the class of a label based on where it is defined. This
5060 handles symbols without suffixes. Also, move the symbol so that it
5061 follows the csect symbol. */
5062
5063void
98027b10 5064ppc_frob_label (symbolS *sym)
252b5132
RH		 5065{
5066 if (ppc_current_csect != (symbolS *) NULL)
5067 {
96d56e9f
NC		 5068 if (symbol_get_tc (sym)->symbol_class == -1)
5069 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5070
5071 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5072 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5073 &symbol_rootP, &symbol_lastP);
5074 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5075 }
07a53e5c
RH		 5076
5077#ifdef OBJ_ELF
5078 dwarf2_emit_label (sym);
5079#endif
252b5132
RH		 5080}
5081
5082/* This variable is set by ppc_frob_symbol if any absolute symbols are
5083 seen. It tells ppc_adjust_symtab whether it needs to look through
5084 the symbols. */
5085
b34976b6 5086static bfd_boolean ppc_saw_abs;
252b5132
RH		 5087
5088/* Change the name of a symbol just before writing it out. Set the
5089 real name if the .rename pseudo-op was used. Otherwise, remove any
5090 class suffix. Return 1 if the symbol should not be included in the
5091 symbol table. */
5092
5093int
98027b10 5094ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5095{
5096 static symbolS *ppc_last_function;
5097 static symbolS *set_end;
5098
5099 /* Discard symbols that should not be included in the output symbol
5100 table. */
809ffe0d
ILT		 5101 if (! symbol_used_in_reloc_p (sym)
5102 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5103 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5104 && ! symbol_get_tc (sym)->output
252b5132
RH		 5105 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5106 return 1;
5107
a161fe53
AM		 5108 /* This one will disappear anyway. Don't make a csect sym for it. */
5109 if (sym == abs_section_sym)
5110 return 1;
5111
809ffe0d
ILT		 5112 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5113 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5114 else
5115 {
5116 const char *name;
5117 const char *s;
5118
5119 name = S_GET_NAME (sym);
5120 s = strchr (name, '[');
5121 if (s != (char *) NULL)
5122 {
5123 unsigned int len;
5124 char *snew;
5125
5126 len = s - name;
5127 snew = xmalloc (len + 1);
5128 memcpy (snew, name, len);
5129 snew[len] = '\0';
5130
5131 S_SET_NAME (sym, snew);
5132 }
5133 }
5134
5135 if (set_end != (symbolS *) NULL)
5136 {
5137 SA_SET_SYM_ENDNDX (set_end, sym);
5138 set_end = NULL;
5139 }
5140
5141 if (SF_GET_FUNCTION (sym))
5142 {
5143 if (ppc_last_function != (symbolS *) NULL)
5144 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5145 ppc_last_function = sym;
809ffe0d 5146 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5147 {
6386f3a7 5148 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5149 SA_SET_SYM_FSIZE (sym,
5150 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5151 }
5152 }
5153 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5154 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5155 {
5156 if (ppc_last_function == (symbolS *) NULL)
5157 as_bad (_(".ef with no preceding .function"));
5158 else
5159 {
5160 set_end = ppc_last_function;
5161 ppc_last_function = NULL;
5162
5163 /* We don't have a C_EFCN symbol, but we need to force the
5164 COFF backend to believe that it has seen one. */
5165 coff_last_function = NULL;
5166 }
5167 }
5168
670ec21d 5169 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5170 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5171 && S_GET_STORAGE_CLASS (sym) != C_FILE
5172 && S_GET_STORAGE_CLASS (sym) != C_FCN
5173 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5174 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5175 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5176 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5177 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5178 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5179 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5180
5181 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5182 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5183 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5184 {
5185 int i;
5186 union internal_auxent *a;
5187
5188 /* Create a csect aux. */
5189 i = S_GET_NUMBER_AUXILIARY (sym);
5190 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5191 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5192 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5193 {
5194 /* This is the TOC table. */
5195 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5196 a->x_csect.x_scnlen.l = 0;
5197 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5198 }
809ffe0d 5199 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5200 {
5201 /* This is a csect symbol. x_scnlen is the size of the
5202 csect. */
809ffe0d 5203 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5204 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5205 S_GET_SEGMENT (sym))
5206 - S_GET_VALUE (sym));
5207 else
5208 {
6386f3a7 5209 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5210 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5211 - S_GET_VALUE (sym));
5212 }
809ffe0d 5213 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5214 }
5215 else if (S_GET_SEGMENT (sym) == bss_section)
5216 {
5217 /* This is a common symbol. */
809ffe0d
ILT		 5218 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5219 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5220 if (S_IS_EXTERNAL (sym))
96d56e9f 5221 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5222 else
96d56e9f 5223 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5224 }
5225 else if (S_GET_SEGMENT (sym) == absolute_section)
5226 {
5227 /* This is an absolute symbol. The csect will be created by
99a814a1 5228 ppc_adjust_symtab. */
b34976b6 5229 ppc_saw_abs = TRUE;
252b5132 5230 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5231 if (symbol_get_tc (sym)->symbol_class == -1)
5232 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5233 }
5234 else if (! S_IS_DEFINED (sym))
5235 {
5236 /* This is an external symbol. */
5237 a->x_csect.x_scnlen.l = 0;
5238 a->x_csect.x_smtyp = XTY_ER;
5239 }
96d56e9f 5240 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5241 {
5242 symbolS *next;
5243
5244 /* This is a TOC definition. x_scnlen is the size of the
5245 TOC entry. */
5246 next = symbol_next (sym);
96d56e9f 5247 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5248 next = symbol_next (next);
5249 if (next == (symbolS *) NULL
96d56e9f 5250 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5251 {
5252 if (ppc_after_toc_frag == (fragS *) NULL)
5253 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5254 data_section)
5255 - S_GET_VALUE (sym));
5256 else
5257 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5258 - S_GET_VALUE (sym));
5259 }
5260 else
5261 {
6386f3a7 5262 resolve_symbol_value (next);
252b5132
RH		 5263 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5264 - S_GET_VALUE (sym));
5265 }
5266 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5267 }
5268 else
5269 {
5270 symbolS *csect;
5271
5272 /* This is a normal symbol definition. x_scnlen is the
5273 symbol index of the containing csect. */
5274 if (S_GET_SEGMENT (sym) == text_section)
5275 csect = ppc_text_csects;
5276 else if (S_GET_SEGMENT (sym) == data_section)
5277 csect = ppc_data_csects;
5278 else
5279 abort ();
5280
5281 /* Skip the initial dummy symbol. */
809ffe0d 5282 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5283
5284 if (csect == (symbolS *) NULL)
5285 {
5286 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5287 a->x_csect.x_scnlen.l = 0;
5288 }
5289 else
5290 {
809ffe0d 5291 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5292 {
6386f3a7 5293 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5294 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5295 > S_GET_VALUE (sym))
252b5132 5296 break;
809ffe0d 5297 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5298 }
5299
809ffe0d
ILT		 5300 a->x_csect.x_scnlen.p =
5301 coffsymbol (symbol_get_bfdsym (csect))->native;
5302 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5303 1;
252b5132
RH		 5304 }
5305 a->x_csect.x_smtyp = XTY_LD;
5306 }
81d4177b 5307
252b5132
RH		 5308 a->x_csect.x_parmhash = 0;
5309 a->x_csect.x_snhash = 0;
96d56e9f 5310 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5311 a->x_csect.x_smclas = XMC_PR;
5312 else
96d56e9f 5313 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5314 a->x_csect.x_stab = 0;
5315 a->x_csect.x_snstab = 0;
5316
5317 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5318 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5319 }
5320 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5321 {
5322 /* We want the value to be the symbol index of the referenced
5323 csect symbol. BFD will do that for us if we set the right
5324 flags. */
b782de16
AM		 5325 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5326 combined_entry_type *c = coffsymbol (bsym)->native;
5327
5328 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5329 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5330 }
5331 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5332 {
5333 symbolS *block;
5334 symbolS *csect;
5335
5336 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5337 block = symbol_get_tc (sym)->within;
5338 csect = symbol_get_tc (block)->within;
6386f3a7 5339 resolve_symbol_value (csect);
252b5132
RH		 5340 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5341 }
5342 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5343 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5344 {
5345 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5346 BFD will do that for us if we set the right flags. We have
5347 already set the value correctly. */
809ffe0d 5348 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5349 }
5350
5351 return 0;
5352}
5353
5354/* Adjust the symbol table. This creates csect symbols for all
5355 absolute symbols. */
5356
5357void
98027b10 5358ppc_adjust_symtab (void)
252b5132
RH		 5359{
5360 symbolS *sym;
5361
5362 if (! ppc_saw_abs)
5363 return;
5364
5365 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5366 {
5367 symbolS *csect;
5368 int i;
5369 union internal_auxent *a;
5370
5371 if (S_GET_SEGMENT (sym) != absolute_section)
5372 continue;
5373
5374 csect = symbol_create (".abs[XO]", absolute_section,
5375 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5376 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5377 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5378 i = S_GET_NUMBER_AUXILIARY (csect);
5379 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5380 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5381 a->x_csect.x_scnlen.l = 0;
5382 a->x_csect.x_smtyp = XTY_SD;
5383 a->x_csect.x_parmhash = 0;
5384 a->x_csect.x_snhash = 0;
5385 a->x_csect.x_smclas = XMC_XO;
5386 a->x_csect.x_stab = 0;
5387 a->x_csect.x_snstab = 0;
5388
5389 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5390
5391 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5392 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5393 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5394 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5395 }
5396
b34976b6 5397 ppc_saw_abs = FALSE;
252b5132
RH		 5398}
5399
5400/* Set the VMA for a section. This is called on all the sections in
5401 turn. */
5402
5403void
98027b10 5404ppc_frob_section (asection *sec)
252b5132 5405{
931e13a6 5406 static bfd_vma vma = 0;
252b5132 5407
931e13a6 5408 vma = md_section_align (sec, vma);
252b5132
RH		 5409 bfd_set_section_vma (stdoutput, sec, vma);
5410 vma += bfd_section_size (stdoutput, sec);
5411}
5412
5413#endif /* OBJ_XCOFF */
5414\f
252b5132 5415char *
98027b10 5416md_atof (int type, char *litp, int *sizep)
252b5132 5417{
499ac353 5418 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5419}
5420
5421/* Write a value out to the object file, using the appropriate
5422 endianness. */
5423
5424void
98027b10 5425md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5426{
5427 if (target_big_endian)
5428 number_to_chars_bigendian (buf, val, n);
5429 else
5430 number_to_chars_littleendian (buf, val, n);
5431}
5432
5433/* Align a section (I don't know why this is machine dependent). */
5434
5435valueT
3aeeedbb 5436md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5437{
3aeeedbb
AM		 5438#ifdef OBJ_ELF
5439 return addr;
5440#else
252b5132
RH		 5441 int align = bfd_get_section_alignment (stdoutput, seg);
5442
5443 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5444#endif
252b5132
RH		 5445}
5446
5447/* We don't have any form of relaxing. */
5448
5449int
98027b10
AM		 5450md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5451 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5452{
5453 abort ();
5454 return 0;
5455}
5456
5457/* Convert a machine dependent frag. We never generate these. */
5458
5459void
98027b10
AM		 5460md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5461 asection *sec ATTRIBUTE_UNUSED,
5462 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5463{
5464 abort ();
5465}
5466
5467/* We have no need to default values of symbols. */
5468
252b5132 5469symbolS *
98027b10 5470md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5471{
5472 return 0;
5473}
5474\f
5475/* Functions concerning relocs. */
5476
5477/* The location from which a PC relative jump should be calculated,
5478 given a PC relative reloc. */
5479
5480long
98027b10 5481md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5482{
5483 return fixp->fx_frag->fr_address + fixp->fx_where;
5484}
5485
5486#ifdef OBJ_XCOFF
5487
5488/* This is called to see whether a fixup should be adjusted to use a
5489 section symbol. We take the opportunity to change a fixup against
5490 a symbol in the TOC subsegment into a reloc against the
5491 corresponding .tc symbol. */
5492
5493int
98027b10 5494ppc_fix_adjustable (fixS *fix)
252b5132 5495{
b782de16
AM		 5496 valueT val = resolve_symbol_value (fix->fx_addsy);
5497 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5498 TC_SYMFIELD_TYPE *tc;
5499
5500 if (symseg == absolute_section)
5501 return 0;
252b5132 5502
252b5132 5503 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5504 && fix->fx_addsy != ppc_toc_csect
b782de16 5505 && symseg == data_section
252b5132
RH		 5506 && val >= ppc_toc_frag->fr_address
5507 && (ppc_after_toc_frag == (fragS *) NULL
5508 || val < ppc_after_toc_frag->fr_address))
5509 {
5510 symbolS *sy;
5511
5512 for (sy = symbol_next (ppc_toc_csect);
5513 sy != (symbolS *) NULL;
5514 sy = symbol_next (sy))
5515 {
b782de16
AM		 5516 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5517
96d56e9f 5518 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5519 continue;
96d56e9f 5520 if (sy_tc->symbol_class != XMC_TC)
252b5132 5521 break;
b782de16 5522 if (val == resolve_symbol_value (sy))
252b5132
RH		 5523 {
5524 fix->fx_addsy = sy;
5525 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5526 return 0;
5527 }
5528 }
5529
5530 as_bad_where (fix->fx_file, fix->fx_line,
5531 _("symbol in .toc does not match any .tc"));
5532 }
5533
5534 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5535 tc = symbol_get_tc (fix->fx_addsy);
5536 if (tc->subseg == 0
96d56e9f
NC		 5537 && tc->symbol_class != XMC_TC0
5538 && tc->symbol_class != XMC_TC
b782de16 5539 && symseg != bss_section
252b5132 5540 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5541 && (symseg != data_section
252b5132
RH		 5542 || ppc_toc_csect == NULL
5543 || val < ppc_toc_frag->fr_address
5544 || (ppc_after_toc_frag != NULL
5545 && val >= ppc_after_toc_frag->fr_address)))
5546 {
5547 symbolS *csect;
b782de16 5548 symbolS *next_csect;
252b5132 5549
b782de16 5550 if (symseg == text_section)
252b5132 5551 csect = ppc_text_csects;
b782de16 5552 else if (symseg == data_section)
252b5132
RH		 5553 csect = ppc_data_csects;
5554 else
5555 abort ();
5556
5557 /* Skip the initial dummy symbol. */
809ffe0d 5558 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5559
5560 if (csect != (symbolS *) NULL)
5561 {
b782de16
AM		 5562 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5563 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5564 {
5565 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5566 have to look through the full symbol table to see
5567 whether this is the csect we want. Note that we will
5568 only get here if the csect has zero length. */
b782de16
AM		 5569 if (symbol_get_frag (csect)->fr_address == val
5570 && S_GET_VALUE (csect) == val)
252b5132
RH		 5571 {
5572 symbolS *scan;
5573
809ffe0d 5574 for (scan = symbol_next (csect);
252b5132 5575 scan != NULL;
809ffe0d 5576 scan = symbol_next (scan))
252b5132 5577 {
809ffe0d 5578 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5579 break;
5580 if (scan == fix->fx_addsy)
5581 break;
5582 }
5583
5584 /* If we found the symbol before the next csect
99a814a1 5585 symbol, then this is the csect we want. */
252b5132
RH		 5586 if (scan == fix->fx_addsy)
5587 break;
5588 }
5589
b782de16 5590 csect = next_csect;
252b5132
RH		 5591 }
5592
b782de16 5593 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5594 fix->fx_addsy = csect;
5595 }
b782de16 5596 return 0;
252b5132
RH		 5597 }
5598
5599 /* Adjust a reloc against a .lcomm symbol to be against the base
5600 .lcomm. */
b782de16 5601 if (symseg == bss_section
252b5132
RH		 5602 && ! S_IS_EXTERNAL (fix->fx_addsy))
5603 {
b782de16
AM		 5604 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5605
5606 fix->fx_offset += val - resolve_symbol_value (sy);
5607 fix->fx_addsy = sy;
252b5132
RH		 5608 }
5609
5610 return 0;
5611}
5612
5613/* A reloc from one csect to another must be kept. The assembler
5614 will, of course, keep relocs between sections, and it will keep
5615 absolute relocs, but we need to force it to keep PC relative relocs
5616 between two csects in the same section. */
5617
5618int
98027b10 5619ppc_force_relocation (fixS *fix)
252b5132
RH		 5620{
5621 /* At this point fix->fx_addsy should already have been converted to
5622 a csect symbol. If the csect does not include the fragment, then
5623 we need to force the relocation. */
5624 if (fix->fx_pcrel
5625 && fix->fx_addsy != NULL
809ffe0d
ILT		 5626 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5627 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5628 > fix->fx_frag->fr_address)
5629 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5630 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5631 <= fix->fx_frag->fr_address))))
5632 return 1;
5633
ae6063d4 5634 return generic_force_reloc (fix);
252b5132
RH		 5635}
5636
5637#endif /* OBJ_XCOFF */
5638
0baf16f2 5639#ifdef OBJ_ELF
a161fe53
AM		 5640/* If this function returns non-zero, it guarantees that a relocation
5641 will be emitted for a fixup. */
5642
5643int
98027b10 5644ppc_force_relocation (fixS *fix)
a161fe53
AM		 5645{
5646 /* Branch prediction relocations must force a relocation, as must
5647 the vtable description relocs. */
5648 switch (fix->fx_r_type)
5649 {
5650 case BFD_RELOC_PPC_B16_BRTAKEN:
5651 case BFD_RELOC_PPC_B16_BRNTAKEN:
5652 case BFD_RELOC_PPC_BA16_BRTAKEN:
5653 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5654 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5655 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5656 return 1;
5657 default:
5658 break;
5659 }
5660
cdba85ec
AM		 5661 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5662 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5663 return 1;
5664
ae6063d4 5665 return generic_force_reloc (fix);
a161fe53
AM		 5666}
5667
0baf16f2 5668int
98027b10 5669ppc_fix_adjustable (fixS *fix)
252b5132 5670{
0baf16f2
AM		 5671 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5672 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5673 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5674 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5675 && fix->fx_r_type != BFD_RELOC_GPREL16
5676 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5677 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5678 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5679 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5680}
0baf16f2 5681#endif
252b5132 5682
3aeeedbb
AM		 5683/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5684 rs_align_code frag. */
5685
5686void
5687ppc_handle_align (struct frag *fragP)
5688{
5689 valueT count = (fragP->fr_next->fr_address
5690 - (fragP->fr_address + fragP->fr_fix));
5691
5692 if (count != 0 && (count & 3) == 0)
5693 {
5694 char *dest = fragP->fr_literal + fragP->fr_fix;
5695
5696 fragP->fr_var = 4;
5697 md_number_to_chars (dest, 0x60000000, 4);
5698
42240548
PB		 5699 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5700 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5701 {
42240548
PB		 5702 /* For power6 and power7, we want the last nop to be a group
5703 terminating one. Do this by inserting an rs_fill frag immediately
5704 after this one, with its address set to the last nop location.
5705 This will automatically reduce the number of nops in the current
5706 frag by one. */
3aeeedbb
AM		 5707 if (count > 4)
5708 {
5709 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5710
5711 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5712 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5713 group_nop->fr_fix = 0;
5714 group_nop->fr_offset = 1;
5715 group_nop->fr_type = rs_fill;
5716 fragP->fr_next = group_nop;
5717 dest = group_nop->fr_literal;
5718 }
5719
42240548
PB		 5720 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5721 /* power7 group terminating nop: "ori 2,2,0". */
5722 md_number_to_chars (dest, 0x60420000, 4);
5723 else
5724 /* power6 group terminating nop: "ori 1,1,0". */
5725 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5726 }
5727 }
5728}
5729
252b5132
RH		 5730/* Apply a fixup to the object code. This is called for all the
5731 fixups we generated by the call to fix_new_exp, above. In the call
5732 above we used a reloc code which was the largest legal reloc code
5733 plus the operand index. Here we undo that to recover the operand
5734 index. At this point all symbol values should be fully resolved,
5735 and we attempt to completely resolve the reloc. If we can not do
5736 that, we determine the correct reloc code and put it back in the
5737 fixup. */
5738
94f592af 5739void
98027b10 5740md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5741{
94f592af 5742 valueT value = * valP;
252b5132
RH		 5743
5744#ifdef OBJ_ELF
94f592af 5745 if (fixP->fx_addsy != NULL)
252b5132 5746 {
a161fe53 5747 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5748 if (fixP->fx_pcrel)
5749 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5750 }
5751 else
94f592af 5752 fixP->fx_done = 1;
252b5132 5753#else
a161fe53 5754 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5755 the symbol values. If we are doing this relocation the code in
5756 write.c is going to call bfd_install_relocation, which is also
5757 going to use the symbol value. That means that if the reloc is
5758 fully resolved we want to use *valP since bfd_install_relocation is
5759 not being used.
9f0eb232
RS		 5760 However, if the reloc is not fully resolved we do not want to
5761 use *valP, and must use fx_offset instead. If the relocation
5762 is PC-relative, we then need to re-apply md_pcrel_from_section
5763 to this new relocation value. */
94f592af
NC		 5764 if (fixP->fx_addsy == (symbolS *) NULL)
5765 fixP->fx_done = 1;
5766
252b5132 5767 else
9f0eb232
RS		 5768 {
5769 value = fixP->fx_offset;
5770 if (fixP->fx_pcrel)
5771 value -= md_pcrel_from_section (fixP, seg);
5772 }
a161fe53
AM		 5773#endif
5774
5775 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5776 {
a161fe53
AM		 5777 /* We can't actually support subtracting a symbol. */
5778 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5779 }
252b5132 5780
94f592af 5781 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5782 {
5783 int opindex;
5784 const struct powerpc_operand *operand;
5785 char *where;
5786 unsigned long insn;
5787
94f592af 5788 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5789
5790 operand = &powerpc_operands[opindex];
5791
5792#ifdef OBJ_XCOFF
0baf16f2
AM		 5793 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5794 does not generate a reloc. It uses the offset of `sym' within its
5795 csect. Other usages, such as `.long sym', generate relocs. This
5796 is the documented behaviour of non-TOC symbols. */
252b5132 5797 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5798 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5799 && operand->shift == 0
2b3c4602 5800 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5801 && fixP->fx_addsy != NULL
5802 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5803 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5804 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5805 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5806 {
94f592af
NC		 5807 value = fixP->fx_offset;
5808 fixP->fx_done = 1;
252b5132
RH		 5809 }
5810#endif
5811
5812 /* Fetch the instruction, insert the fully resolved operand
5813 value, and stuff the instruction back again. */
94f592af 5814 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5815 if (target_big_endian)
5816 insn = bfd_getb32 ((unsigned char *) where);
5817 else
5818 insn = bfd_getl32 ((unsigned char *) where);
5819 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5820 fixP->tc_fix_data.ppc_cpu,
94f592af 5821 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5822 if (target_big_endian)
5823 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5824 else
5825 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5826
94f592af
NC		 5827 if (fixP->fx_done)
5828 /* Nothing else to do here. */
5829 return;
252b5132 5830
9c2799c2 5831 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5832
252b5132
RH		 5833 /* Determine a BFD reloc value based on the operand information.
5834 We are only prepared to turn a few of the operands into
0baf16f2 5835 relocs. */
11b37b7b 5836 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5837 && operand->bitm == 0x3fffffc
11b37b7b 5838 && operand->shift == 0)
94f592af 5839 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5840 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5841 && operand->bitm == 0xfffc
11b37b7b 5842 && operand->shift == 0)
95210096
AM		 5843 {
5844 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5845#ifdef OBJ_XCOFF
5846 fixP->fx_size = 2;
5847 if (target_big_endian)
5848 fixP->fx_where += 2;
5849#endif
5850 }
11b37b7b 5851 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5852 && operand->bitm == 0x3fffffc
11b37b7b 5853 && operand->shift == 0)
94f592af 5854 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5855 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5856 && operand->bitm == 0xfffc
11b37b7b 5857 && operand->shift == 0)
95210096
AM		 5858 {
5859 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5860#ifdef OBJ_XCOFF
5861 fixP->fx_size = 2;
5862 if (target_big_endian)
5863 fixP->fx_where += 2;
5864#endif
5865 }
0baf16f2 5866#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5867 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5868 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5869 && operand->shift == 0)
11b37b7b 5870 {
a7fc733f
AM		 5871 if (ppc_is_toc_sym (fixP->fx_addsy))
5872 {
5873 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5874#ifdef OBJ_ELF
a7fc733f
AM		 5875 if (ppc_obj64
5876 && (operand->flags & PPC_OPERAND_DS) != 0)
5877 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5878#endif
5879 }
5880 else
5881 {
5882 fixP->fx_r_type = BFD_RELOC_16;
5883#ifdef OBJ_ELF
5884 if (ppc_obj64
5885 && (operand->flags & PPC_OPERAND_DS) != 0)
5886 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5887#endif
a7fc733f 5888 }
94f592af 5889 fixP->fx_size = 2;
11b37b7b 5890 if (target_big_endian)
94f592af 5891 fixP->fx_where += 2;
11b37b7b 5892 }
0baf16f2 5893#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5894 else
252b5132
RH		 5895 {
5896 char *sfile;
5897 unsigned int sline;
5898
5899 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5900 symbol. */
94f592af
NC		 5901 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5902 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5903 _("unresolved expression that must be resolved"));
5904 else
94f592af 5905 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5906 _("unsupported relocation against %s"),
94f592af
NC		 5907 S_GET_NAME (fixP->fx_addsy));
5908 fixP->fx_done = 1;
5909 return;
252b5132
RH		 5910 }
5911 }
5912 else
5913 {
5914#ifdef OBJ_ELF
94f592af 5915 ppc_elf_validate_fix (fixP, seg);
252b5132 5916#endif
94f592af 5917 switch (fixP->fx_r_type)
252b5132 5918 {
252b5132 5919 case BFD_RELOC_CTOR:
2b3c4602 5920 if (ppc_obj64)
9c7977b3
AM		 5921 goto ctor64;
5922 /* fall through */
5923
0baf16f2 5924 case BFD_RELOC_32:
94f592af
NC		 5925 if (fixP->fx_pcrel)
5926 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5927 /* fall through */
252b5132
RH		 5928
5929 case BFD_RELOC_RVA:
5930 case BFD_RELOC_32_PCREL:
252b5132 5931 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5932 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5933 value, 4);
5934 break;
5935
7f6d05e8 5936 case BFD_RELOC_64:
9c7977b3 5937 ctor64:
94f592af
NC		 5938 if (fixP->fx_pcrel)
5939 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5940 /* fall through */
0baf16f2 5941
7f6d05e8 5942 case BFD_RELOC_64_PCREL:
94f592af 5943 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5944 value, 8);
81d4177b 5945 break;
0baf16f2 5946
252b5132
RH		 5947 case BFD_RELOC_GPREL16:
5948 case BFD_RELOC_16_GOT_PCREL:
5949 case BFD_RELOC_16_GOTOFF:
5950 case BFD_RELOC_LO16_GOTOFF:
5951 case BFD_RELOC_HI16_GOTOFF:
5952 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5953 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5954 case BFD_RELOC_LO16_BASEREL:
5955 case BFD_RELOC_HI16_BASEREL:
5956 case BFD_RELOC_HI16_S_BASEREL:
5957 case BFD_RELOC_PPC_EMB_NADDR16:
5958 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5959 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5960 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5961 case BFD_RELOC_PPC_EMB_SDAI16:
5962 case BFD_RELOC_PPC_EMB_SDA2REL:
5963 case BFD_RELOC_PPC_EMB_SDA2I16:
5964 case BFD_RELOC_PPC_EMB_RELSEC16:
5965 case BFD_RELOC_PPC_EMB_RELST_LO:
5966 case BFD_RELOC_PPC_EMB_RELST_HI:
5967 case BFD_RELOC_PPC_EMB_RELST_HA:
5968 case BFD_RELOC_PPC_EMB_RELSDA:
5969 case BFD_RELOC_PPC_TOC16:
0baf16f2 5970#ifdef OBJ_ELF
0baf16f2
AM		 5971 case BFD_RELOC_PPC64_TOC16_LO:
5972 case BFD_RELOC_PPC64_TOC16_HI:
5973 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5974#endif
94f592af 5975 if (fixP->fx_pcrel)
252b5132 5976 {
94f592af
NC		 5977 if (fixP->fx_addsy != NULL)
5978 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5979 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5980 bfd_get_reloc_code_name (fixP->fx_r_type),
5981 S_GET_NAME (fixP->fx_addsy));
252b5132 5982 else
94f592af 5983 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5984 _("cannot emit PC relative %s relocation"),
94f592af 5985 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5986 }
5987
94f592af 5988 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5989 value, 2);
5990 break;
5991
3c9d25f4
AM		 5992 case BFD_RELOC_16:
5993 if (fixP->fx_pcrel)
5994 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5995 /* fall through */
5996
5997 case BFD_RELOC_16_PCREL:
5998 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5999 value, 2);
6000 break;
6001
6002 case BFD_RELOC_LO16:
6003 if (fixP->fx_pcrel)
6004 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6005 /* fall through */
6006
6007 case BFD_RELOC_LO16_PCREL:
6008 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6009 value, 2);
6010 break;
6011
252b5132
RH		 6012 /* This case happens when you write, for example,
6013 lis %r3,(L1-L2)@ha
6014 where L1 and L2 are defined later. */
6015 case BFD_RELOC_HI16:
94f592af 6016 if (fixP->fx_pcrel)
3c9d25f4
AM		 6017 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6018 /* fall through */
6019
6020 case BFD_RELOC_HI16_PCREL:
94f592af 6021 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6022 PPC_HI (value), 2);
252b5132 6023 break;
0baf16f2 6024
252b5132 6025 case BFD_RELOC_HI16_S:
94f592af 6026 if (fixP->fx_pcrel)
3c9d25f4
AM		 6027 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6028 /* fall through */
6029
6030 case BFD_RELOC_HI16_S_PCREL:
94f592af 6031 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6032 PPC_HA (value), 2);
6033 break;
6034
6035#ifdef OBJ_ELF
0baf16f2 6036 case BFD_RELOC_PPC64_HIGHER:
94f592af 6037 if (fixP->fx_pcrel)
0baf16f2 6038 abort ();
94f592af 6039 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6040 PPC_HIGHER (value), 2);
252b5132
RH		 6041 break;
6042
0baf16f2 6043 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6044 if (fixP->fx_pcrel)
0baf16f2 6045 abort ();
94f592af 6046 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6047 PPC_HIGHERA (value), 2);
6048 break;
6049
6050 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6051 if (fixP->fx_pcrel)
0baf16f2 6052 abort ();
94f592af 6053 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6054 PPC_HIGHEST (value), 2);
6055 break;
6056
6057 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6058 if (fixP->fx_pcrel)
0baf16f2 6059 abort ();
94f592af 6060 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6061 PPC_HIGHESTA (value), 2);
6062 break;
6063
6064 case BFD_RELOC_PPC64_ADDR16_DS:
6065 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6066 case BFD_RELOC_PPC64_GOT16_DS:
6067 case BFD_RELOC_PPC64_GOT16_LO_DS:
6068 case BFD_RELOC_PPC64_PLT16_LO_DS:
6069 case BFD_RELOC_PPC64_SECTOFF_DS:
6070 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6071 case BFD_RELOC_PPC64_TOC16_DS:
6072 case BFD_RELOC_PPC64_TOC16_LO_DS:
6073 case BFD_RELOC_PPC64_PLTGOT16_DS:
6074 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6075 if (fixP->fx_pcrel)
0baf16f2
AM		 6076 abort ();
6077 {
2132e3a3 6078 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6079 unsigned long val, mask;
0baf16f2
AM		 6080
6081 if (target_big_endian)
adadcc0c 6082 val = bfd_getb32 (where - 2);
0baf16f2 6083 else
adadcc0c
AM		 6084 val = bfd_getl32 (where);
6085 mask = 0xfffc;
6086 /* lq insns reserve the four lsbs. */
6087 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6088 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6089 mask = 0xfff0;
6090 val |= value & mask;
0baf16f2
AM		 6091 if (target_big_endian)
6092 bfd_putb16 ((bfd_vma) val, where);
6093 else
6094 bfd_putl16 ((bfd_vma) val, where);
6095 }
6096 break;
cdba85ec 6097
ba0b2174
AM		 6098 case BFD_RELOC_PPC_B16_BRTAKEN:
6099 case BFD_RELOC_PPC_B16_BRNTAKEN:
6100 case BFD_RELOC_PPC_BA16_BRTAKEN:
6101 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6102 break;
6103
cdba85ec 6104 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6105 case BFD_RELOC_PPC_TLSGD:
6106 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6107 break;
6108
cdba85ec
AM		 6109 case BFD_RELOC_PPC_DTPMOD:
6110 case BFD_RELOC_PPC_TPREL16:
6111 case BFD_RELOC_PPC_TPREL16_LO:
6112 case BFD_RELOC_PPC_TPREL16_HI:
6113 case BFD_RELOC_PPC_TPREL16_HA:
6114 case BFD_RELOC_PPC_TPREL:
6115 case BFD_RELOC_PPC_DTPREL16:
6116 case BFD_RELOC_PPC_DTPREL16_LO:
6117 case BFD_RELOC_PPC_DTPREL16_HI:
6118 case BFD_RELOC_PPC_DTPREL16_HA:
6119 case BFD_RELOC_PPC_DTPREL:
6120 case BFD_RELOC_PPC_GOT_TLSGD16:
6121 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6122 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6123 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6124 case BFD_RELOC_PPC_GOT_TLSLD16:
6125 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6126 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6127 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6128 case BFD_RELOC_PPC_GOT_TPREL16:
6129 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6130 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6131 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6132 case BFD_RELOC_PPC_GOT_DTPREL16:
6133 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6134 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6135 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6136 case BFD_RELOC_PPC64_TPREL16_DS:
6137 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6138 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6139 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6140 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6141 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6142 case BFD_RELOC_PPC64_DTPREL16_DS:
6143 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6144 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6145 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6146 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6147 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6148 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6149 break;
0baf16f2 6150#endif
252b5132 6151 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6152 bytes, rather than 2, so offset it here appropriately. */
252b5132 6153 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6154 if (fixP->fx_pcrel)
252b5132
RH		 6155 abort ();
6156
94f592af 6157 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6158 + ((target_big_endian) ? 2 : 0),
6159 value, 2);
6160 break;
6161
6162 case BFD_RELOC_8:
94f592af 6163 if (fixP->fx_pcrel)
31a91399
NC		 6164 {
6165 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6166 ".byte <undefined_symbol> - ." */
31a91399
NC		 6167 if (fixP->fx_addsy)
6168 as_bad (_("Unable to handle reference to symbol %s"),
6169 S_GET_NAME (fixP->fx_addsy));
6170 else
6171 as_bad (_("Unable to resolve expression"));
6172 fixP->fx_done = 1;
6173 }
6174 else
6175 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6176 value, 1);
252b5132
RH		 6177 break;
6178
6179 case BFD_RELOC_24_PLT_PCREL:
6180 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6181 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6182 abort ();
6183
94f592af 6184 if (fixP->fx_done)
99a814a1
AM		 6185 {
6186 char *where;
6187 unsigned long insn;
6188
6189 /* Fetch the instruction, insert the fully resolved operand
6190 value, and stuff the instruction back again. */
94f592af 6191 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6192 if (target_big_endian)
6193 insn = bfd_getb32 ((unsigned char *) where);
6194 else
6195 insn = bfd_getl32 ((unsigned char *) where);
6196 if ((value & 3) != 0)
94f592af 6197 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6198 _("must branch to an address a multiple of 4"));
6199 if ((offsetT) value < -0x40000000
6200 || (offsetT) value >= 0x40000000)
94f592af 6201 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6202 _("@local or @plt branch destination is too far away, %ld bytes"),
6203 (long) value);
6204 insn = insn | (value & 0x03fffffc);
6205 if (target_big_endian)
6206 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6207 else
6208 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6209 }
252b5132
RH		 6210 break;
6211
6212 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6213 fixP->fx_done = 0;
6214 if (fixP->fx_addsy
6215 && !S_IS_DEFINED (fixP->fx_addsy)
6216 && !S_IS_WEAK (fixP->fx_addsy))
6217 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6218 break;
6219
6220 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6221 fixP->fx_done = 0;
252b5132
RH		 6222 break;
6223
0baf16f2 6224#ifdef OBJ_ELF
0baf16f2
AM		 6225 /* Generated by reference to `sym@tocbase'. The sym is
6226 ignored by the linker. */
6227 case BFD_RELOC_PPC64_TOC:
94f592af 6228 fixP->fx_done = 0;
0baf16f2 6229 break;
0baf16f2 6230#endif
252b5132 6231 default:
bc805888 6232 fprintf (stderr,
94f592af 6233 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6234 fflush (stderr);
252b5132
RH		 6235 abort ();
6236 }
6237 }
6238
6239#ifdef OBJ_ELF
94f592af 6240 fixP->fx_addnumber = value;
4e6935a6
AM		 6241
6242 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6243 from the section contents. If we are going to be emitting a reloc
6244 then the section contents are immaterial, so don't warn if they
6245 happen to overflow. Leave such warnings to ld. */
6246 if (!fixP->fx_done)
6247 fixP->fx_no_overflow = 1;
252b5132 6248#else
94f592af
NC		 6249 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6250 fixP->fx_addnumber = 0;
252b5132
RH		 6251 else
6252 {
6253#ifdef TE_PE
94f592af 6254 fixP->fx_addnumber = 0;
252b5132 6255#else
8edcbfcd
TG		 6256 /* We want to use the offset within the toc, not the actual VMA
6257 of the symbol. */
94f592af 6258 fixP->fx_addnumber =
8edcbfcd
TG		 6259 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6260 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6261#endif
6262 }
6263#endif
252b5132
RH		 6264}
6265
6266/* Generate a reloc for a fixup. */
6267
6268arelent *
98027b10 6269tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6270{
6271 arelent *reloc;
6272
6273 reloc = (arelent *) xmalloc (sizeof (arelent));
6274
49309057
ILT		 6275 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6276 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6277 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6278 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6279 if (reloc->howto == (reloc_howto_type *) NULL)
6280 {
6281 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6282 _("reloc %d not supported by object file format"),
6283 (int) fixp->fx_r_type);
252b5132
RH		 6284 return NULL;
6285 }
6286 reloc->addend = fixp->fx_addnumber;
6287
6288 return reloc;
6289}
75e21f08
JJ		 6290
6291void
98027b10 6292ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6293{
6294 cfi_add_CFA_def_cfa (1, 0);
6295}
6296
6297int
1df69f4f 6298tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6299{
6300 unsigned int regnum = -1;
6301 unsigned int i;
6302 const char *p;
6303 char *q;
6304 static struct { char *name; int dw2regnum; } regnames[] =
6305 {
6306 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6307 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6308 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6309 { "spe_acc", 111 }, { "spefscr", 112 }
6310 };
6311
6312 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6313 if (strcmp (regnames[i].name, regname) == 0)
6314 return regnames[i].dw2regnum;
6315
6316 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6317 {
6318 p = regname + 1 + (regname[1] == '.');
6319 regnum = strtoul (p, &q, 10);
6320 if (p == q || *q || regnum >= 32)
6321 return -1;
6322 if (regname[0] == 'f')
b7d7dc63 6323 regnum += 32;
75e21f08 6324 else if (regname[0] == 'v')
b7d7dc63 6325 regnum += 77;
75e21f08
JJ		 6326 }
6327 else if (regname[0] == 'c' && regname[1] == 'r')
6328 {
6329 p = regname + 2 + (regname[2] == '.');
6330 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6331 return -1;
75e21f08
JJ		 6332 regnum = p[0] - '0' + 68;
6333 }
6334 return regnum;
6335}
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