]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/config/tc-ppc.c
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* elf64-ppc.c (ppc64_elf_edit_toc): Always adjust local syms in
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163
AM		 182
183/* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 185ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 186
187/* Flags set on encountering toc relocs. */
188enum {
189 has_large_toc_reloc = 1,
190 has_small_toc_reloc = 2
191} toc_reloc_types;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
c865e45b 222 { "ref", ppc_ref, 0 },
252b5132
RH		 223 { "rename", ppc_rename, 0 },
224 { "section", ppc_named_section, 0 },
225 { "stabx", ppc_stabx, 0 },
226 { "text", ppc_section, 't' },
227 { "toc", ppc_toc, 0 },
228 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 229 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 230 { "word", ppc_xcoff_cons, 1 },
231 { "short", ppc_xcoff_cons, 1 },
232 { "vbyte", ppc_vbyte, 0 },
233#endif
234
235#ifdef OBJ_ELF
0baf16f2
AM		 236 { "llong", ppc_elf_cons, 8 },
237 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 238 { "long", ppc_elf_cons, 4 },
239 { "word", ppc_elf_cons, 2 },
240 { "short", ppc_elf_cons, 2 },
241 { "rdata", ppc_elf_rdata, 0 },
242 { "rodata", ppc_elf_rdata, 0 },
243 { "lcomm", ppc_elf_lcomm, 0 },
244#endif
245
246#ifdef TE_PE
99a814a1 247 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 248 { "previous", ppc_previous, 0 },
249 { "pdata", ppc_pdata, 0 },
250 { "ydata", ppc_ydata, 0 },
251 { "reldata", ppc_reldata, 0 },
252 { "rdata", ppc_rdata, 0 },
253 { "ualong", ppc_ualong, 0 },
254 { "znop", ppc_znop, 0 },
255 { "comm", ppc_pe_comm, 0 },
256 { "lcomm", ppc_pe_comm, 1 },
257 { "section", ppc_pe_section, 0 },
258 { "function", ppc_pe_function,0 },
259 { "tocd", ppc_pe_tocd, 0 },
260#endif
261
0baf16f2 262#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 263 { "tc", ppc_tc, 0 },
0baf16f2
AM		 264 { "machine", ppc_machine, 0 },
265#endif
252b5132
RH		 266
267 { NULL, NULL, 0 }
268};
269
270\f
99a814a1
AM		 271/* Predefined register names if -mregnames (or default for Windows NT).
272 In general, there are lots of them, in an attempt to be compatible
273 with a number of other Windows NT assemblers. */
252b5132
RH		 274
275/* Structure to hold information about predefined registers. */
276struct pd_reg
277 {
278 char *name;
279 int value;
280 };
281
282/* List of registers that are pre-defined:
283
284 Each general register has predefined names of the form:
285 1. r<reg_num> which has the value <reg_num>.
286 2. r.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each floating point register has predefined names of the form:
289 1. f<reg_num> which has the value <reg_num>.
290 2. f.<reg_num> which has the value <reg_num>.
291
7a899fff
C		 292 Each vector unit register has predefined names of the form:
293 1. v<reg_num> which has the value <reg_num>.
294 2. v.<reg_num> which has the value <reg_num>.
295
252b5132
RH		 296 Each condition register has predefined names of the form:
297 1. cr<reg_num> which has the value <reg_num>.
298 2. cr.<reg_num> which has the value <reg_num>.
299
300 There are individual registers as well:
301 sp or r.sp has the value 1
302 rtoc or r.toc has the value 2
303 fpscr has the value 0
304 xer has the value 1
305 lr has the value 8
306 ctr has the value 9
307 pmr has the value 0
308 dar has the value 19
309 dsisr has the value 18
310 dec has the value 22
311 sdr1 has the value 25
312 srr0 has the value 26
313 srr1 has the value 27
314
81d4177b 315 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 316
317static const struct pd_reg pre_defined_registers[] =
318{
319 { "cr.0", 0 }, /* Condition Registers */
320 { "cr.1", 1 },
321 { "cr.2", 2 },
322 { "cr.3", 3 },
323 { "cr.4", 4 },
324 { "cr.5", 5 },
325 { "cr.6", 6 },
326 { "cr.7", 7 },
327
328 { "cr0", 0 },
329 { "cr1", 1 },
330 { "cr2", 2 },
331 { "cr3", 3 },
332 { "cr4", 4 },
333 { "cr5", 5 },
334 { "cr6", 6 },
335 { "cr7", 7 },
336
337 { "ctr", 9 },
338
339 { "dar", 19 }, /* Data Access Register */
340 { "dec", 22 }, /* Decrementer */
341 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
342
343 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 344 { "f.1", 1 },
345 { "f.10", 10 },
346 { "f.11", 11 },
347 { "f.12", 12 },
348 { "f.13", 13 },
349 { "f.14", 14 },
350 { "f.15", 15 },
351 { "f.16", 16 },
352 { "f.17", 17 },
353 { "f.18", 18 },
354 { "f.19", 19 },
355 { "f.2", 2 },
356 { "f.20", 20 },
357 { "f.21", 21 },
358 { "f.22", 22 },
359 { "f.23", 23 },
360 { "f.24", 24 },
361 { "f.25", 25 },
362 { "f.26", 26 },
363 { "f.27", 27 },
364 { "f.28", 28 },
365 { "f.29", 29 },
366 { "f.3", 3 },
252b5132
RH		 367 { "f.30", 30 },
368 { "f.31", 31 },
066be9f7
PB		 369
370 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
371 { "f.33", 33 },
372 { "f.34", 34 },
373 { "f.35", 35 },
374 { "f.36", 36 },
375 { "f.37", 37 },
376 { "f.38", 38 },
377 { "f.39", 39 },
81d4177b 378 { "f.4", 4 },
066be9f7
PB		 379 { "f.40", 40 },
380 { "f.41", 41 },
381 { "f.42", 42 },
382 { "f.43", 43 },
383 { "f.44", 44 },
384 { "f.45", 45 },
385 { "f.46", 46 },
386 { "f.47", 47 },
387 { "f.48", 48 },
388 { "f.49", 49 },
81d4177b 389 { "f.5", 5 },
066be9f7
PB		 390 { "f.50", 50 },
391 { "f.51", 51 },
392 { "f.52", 52 },
393 { "f.53", 53 },
394 { "f.54", 54 },
395 { "f.55", 55 },
396 { "f.56", 56 },
397 { "f.57", 57 },
398 { "f.58", 58 },
399 { "f.59", 59 },
81d4177b 400 { "f.6", 6 },
066be9f7
PB		 401 { "f.60", 60 },
402 { "f.61", 61 },
403 { "f.62", 62 },
404 { "f.63", 63 },
81d4177b
KH		 405 { "f.7", 7 },
406 { "f.8", 8 },
407 { "f.9", 9 },
408
409 { "f0", 0 },
410 { "f1", 1 },
411 { "f10", 10 },
412 { "f11", 11 },
413 { "f12", 12 },
414 { "f13", 13 },
415 { "f14", 14 },
416 { "f15", 15 },
417 { "f16", 16 },
418 { "f17", 17 },
419 { "f18", 18 },
420 { "f19", 19 },
421 { "f2", 2 },
422 { "f20", 20 },
423 { "f21", 21 },
424 { "f22", 22 },
425 { "f23", 23 },
426 { "f24", 24 },
427 { "f25", 25 },
428 { "f26", 26 },
429 { "f27", 27 },
430 { "f28", 28 },
431 { "f29", 29 },
432 { "f3", 3 },
252b5132
RH		 433 { "f30", 30 },
434 { "f31", 31 },
066be9f7
PB		 435
436 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
437 { "f33", 33 },
438 { "f34", 34 },
439 { "f35", 35 },
440 { "f36", 36 },
441 { "f37", 37 },
442 { "f38", 38 },
443 { "f39", 39 },
81d4177b 444 { "f4", 4 },
066be9f7
PB		 445 { "f40", 40 },
446 { "f41", 41 },
447 { "f42", 42 },
448 { "f43", 43 },
449 { "f44", 44 },
450 { "f45", 45 },
451 { "f46", 46 },
452 { "f47", 47 },
453 { "f48", 48 },
454 { "f49", 49 },
81d4177b 455 { "f5", 5 },
066be9f7
PB		 456 { "f50", 50 },
457 { "f51", 51 },
458 { "f52", 52 },
459 { "f53", 53 },
460 { "f54", 54 },
461 { "f55", 55 },
462 { "f56", 56 },
463 { "f57", 57 },
464 { "f58", 58 },
465 { "f59", 59 },
81d4177b 466 { "f6", 6 },
066be9f7
PB		 467 { "f60", 60 },
468 { "f61", 61 },
469 { "f62", 62 },
470 { "f63", 63 },
81d4177b
KH		 471 { "f7", 7 },
472 { "f8", 8 },
473 { "f9", 9 },
252b5132
RH		 474
475 { "fpscr", 0 },
476
c3d65c1c
BE		 477 /* Quantization registers used with pair single instructions. */
478 { "gqr.0", 0 },
479 { "gqr.1", 1 },
480 { "gqr.2", 2 },
481 { "gqr.3", 3 },
482 { "gqr.4", 4 },
483 { "gqr.5", 5 },
484 { "gqr.6", 6 },
485 { "gqr.7", 7 },
486 { "gqr0", 0 },
487 { "gqr1", 1 },
488 { "gqr2", 2 },
489 { "gqr3", 3 },
490 { "gqr4", 4 },
491 { "gqr5", 5 },
492 { "gqr6", 6 },
493 { "gqr7", 7 },
494
252b5132
RH		 495 { "lr", 8 }, /* Link Register */
496
497 { "pmr", 0 },
498
499 { "r.0", 0 }, /* General Purpose Registers */
500 { "r.1", 1 },
501 { "r.10", 10 },
502 { "r.11", 11 },
503 { "r.12", 12 },
504 { "r.13", 13 },
505 { "r.14", 14 },
506 { "r.15", 15 },
507 { "r.16", 16 },
508 { "r.17", 17 },
509 { "r.18", 18 },
510 { "r.19", 19 },
511 { "r.2", 2 },
512 { "r.20", 20 },
513 { "r.21", 21 },
514 { "r.22", 22 },
515 { "r.23", 23 },
516 { "r.24", 24 },
517 { "r.25", 25 },
518 { "r.26", 26 },
519 { "r.27", 27 },
520 { "r.28", 28 },
521 { "r.29", 29 },
522 { "r.3", 3 },
523 { "r.30", 30 },
524 { "r.31", 31 },
525 { "r.4", 4 },
526 { "r.5", 5 },
527 { "r.6", 6 },
528 { "r.7", 7 },
529 { "r.8", 8 },
530 { "r.9", 9 },
531
532 { "r.sp", 1 }, /* Stack Pointer */
533
534 { "r.toc", 2 }, /* Pointer to the table of contents */
535
536 { "r0", 0 }, /* More general purpose registers */
537 { "r1", 1 },
538 { "r10", 10 },
539 { "r11", 11 },
540 { "r12", 12 },
541 { "r13", 13 },
542 { "r14", 14 },
543 { "r15", 15 },
544 { "r16", 16 },
545 { "r17", 17 },
546 { "r18", 18 },
547 { "r19", 19 },
548 { "r2", 2 },
549 { "r20", 20 },
550 { "r21", 21 },
551 { "r22", 22 },
552 { "r23", 23 },
553 { "r24", 24 },
554 { "r25", 25 },
555 { "r26", 26 },
556 { "r27", 27 },
557 { "r28", 28 },
558 { "r29", 29 },
559 { "r3", 3 },
560 { "r30", 30 },
561 { "r31", 31 },
562 { "r4", 4 },
563 { "r5", 5 },
564 { "r6", 6 },
565 { "r7", 7 },
566 { "r8", 8 },
567 { "r9", 9 },
568
569 { "rtoc", 2 }, /* Table of contents */
570
571 { "sdr1", 25 }, /* Storage Description Register 1 */
572
573 { "sp", 1 },
574
575 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
576 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 577
066be9f7 578 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 579 { "v.1", 1 },
580 { "v.10", 10 },
581 { "v.11", 11 },
582 { "v.12", 12 },
583 { "v.13", 13 },
584 { "v.14", 14 },
585 { "v.15", 15 },
586 { "v.16", 16 },
587 { "v.17", 17 },
588 { "v.18", 18 },
589 { "v.19", 19 },
590 { "v.2", 2 },
591 { "v.20", 20 },
592 { "v.21", 21 },
593 { "v.22", 22 },
594 { "v.23", 23 },
595 { "v.24", 24 },
596 { "v.25", 25 },
597 { "v.26", 26 },
598 { "v.27", 27 },
599 { "v.28", 28 },
600 { "v.29", 29 },
601 { "v.3", 3 },
7a899fff
C		 602 { "v.30", 30 },
603 { "v.31", 31 },
81d4177b
KH		 604 { "v.4", 4 },
605 { "v.5", 5 },
606 { "v.6", 6 },
607 { "v.7", 7 },
608 { "v.8", 8 },
609 { "v.9", 9 },
7a899fff
C		 610
611 { "v0", 0 },
81d4177b
KH		 612 { "v1", 1 },
613 { "v10", 10 },
614 { "v11", 11 },
615 { "v12", 12 },
616 { "v13", 13 },
617 { "v14", 14 },
618 { "v15", 15 },
619 { "v16", 16 },
620 { "v17", 17 },
621 { "v18", 18 },
622 { "v19", 19 },
623 { "v2", 2 },
624 { "v20", 20 },
625 { "v21", 21 },
626 { "v22", 22 },
627 { "v23", 23 },
628 { "v24", 24 },
629 { "v25", 25 },
630 { "v26", 26 },
631 { "v27", 27 },
632 { "v28", 28 },
633 { "v29", 29 },
634 { "v3", 3 },
7a899fff
C		 635 { "v30", 30 },
636 { "v31", 31 },
81d4177b
KH		 637 { "v4", 4 },
638 { "v5", 5 },
639 { "v6", 6 },
640 { "v7", 7 },
641 { "v8", 8 },
7a899fff 642 { "v9", 9 },
252b5132 643
066be9f7
PB		 644 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
645 { "vs.1", 1 },
646 { "vs.10", 10 },
647 { "vs.11", 11 },
648 { "vs.12", 12 },
649 { "vs.13", 13 },
650 { "vs.14", 14 },
651 { "vs.15", 15 },
652 { "vs.16", 16 },
653 { "vs.17", 17 },
654 { "vs.18", 18 },
655 { "vs.19", 19 },
656 { "vs.2", 2 },
657 { "vs.20", 20 },
658 { "vs.21", 21 },
659 { "vs.22", 22 },
660 { "vs.23", 23 },
661 { "vs.24", 24 },
662 { "vs.25", 25 },
663 { "vs.26", 26 },
664 { "vs.27", 27 },
665 { "vs.28", 28 },
666 { "vs.29", 29 },
667 { "vs.3", 3 },
668 { "vs.30", 30 },
669 { "vs.31", 31 },
670 { "vs.32", 32 },
671 { "vs.33", 33 },
672 { "vs.34", 34 },
673 { "vs.35", 35 },
674 { "vs.36", 36 },
675 { "vs.37", 37 },
676 { "vs.38", 38 },
677 { "vs.39", 39 },
678 { "vs.4", 4 },
679 { "vs.40", 40 },
680 { "vs.41", 41 },
681 { "vs.42", 42 },
682 { "vs.43", 43 },
683 { "vs.44", 44 },
684 { "vs.45", 45 },
685 { "vs.46", 46 },
686 { "vs.47", 47 },
687 { "vs.48", 48 },
688 { "vs.49", 49 },
689 { "vs.5", 5 },
690 { "vs.50", 50 },
691 { "vs.51", 51 },
692 { "vs.52", 52 },
693 { "vs.53", 53 },
694 { "vs.54", 54 },
695 { "vs.55", 55 },
696 { "vs.56", 56 },
697 { "vs.57", 57 },
698 { "vs.58", 58 },
699 { "vs.59", 59 },
700 { "vs.6", 6 },
701 { "vs.60", 60 },
702 { "vs.61", 61 },
703 { "vs.62", 62 },
704 { "vs.63", 63 },
705 { "vs.7", 7 },
706 { "vs.8", 8 },
707 { "vs.9", 9 },
708
709 { "vs0", 0 },
710 { "vs1", 1 },
711 { "vs10", 10 },
712 { "vs11", 11 },
713 { "vs12", 12 },
714 { "vs13", 13 },
715 { "vs14", 14 },
716 { "vs15", 15 },
717 { "vs16", 16 },
718 { "vs17", 17 },
719 { "vs18", 18 },
720 { "vs19", 19 },
721 { "vs2", 2 },
722 { "vs20", 20 },
723 { "vs21", 21 },
724 { "vs22", 22 },
725 { "vs23", 23 },
726 { "vs24", 24 },
727 { "vs25", 25 },
728 { "vs26", 26 },
729 { "vs27", 27 },
730 { "vs28", 28 },
731 { "vs29", 29 },
732 { "vs3", 3 },
733 { "vs30", 30 },
734 { "vs31", 31 },
735 { "vs32", 32 },
736 { "vs33", 33 },
737 { "vs34", 34 },
738 { "vs35", 35 },
739 { "vs36", 36 },
740 { "vs37", 37 },
741 { "vs38", 38 },
742 { "vs39", 39 },
743 { "vs4", 4 },
744 { "vs40", 40 },
745 { "vs41", 41 },
746 { "vs42", 42 },
747 { "vs43", 43 },
748 { "vs44", 44 },
749 { "vs45", 45 },
750 { "vs46", 46 },
751 { "vs47", 47 },
752 { "vs48", 48 },
753 { "vs49", 49 },
754 { "vs5", 5 },
755 { "vs50", 50 },
756 { "vs51", 51 },
757 { "vs52", 52 },
758 { "vs53", 53 },
759 { "vs54", 54 },
760 { "vs55", 55 },
761 { "vs56", 56 },
762 { "vs57", 57 },
763 { "vs58", 58 },
764 { "vs59", 59 },
765 { "vs6", 6 },
766 { "vs60", 60 },
767 { "vs61", 61 },
768 { "vs62", 62 },
769 { "vs63", 63 },
770 { "vs7", 7 },
771 { "vs8", 8 },
772 { "vs9", 9 },
773
252b5132
RH		 774 { "xer", 1 },
775
776};
777
bc805888 778#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 779
780/* Given NAME, find the register number associated with that name, return
781 the integer value associated with the given name or -1 on failure. */
782
252b5132 783static int
98027b10 784reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 785{
786 int middle, low, high;
787 int cmp;
788
789 low = 0;
790 high = regcount - 1;
791
792 do
793 {
794 middle = (low + high) / 2;
795 cmp = strcasecmp (name, regs[middle].name);
796 if (cmp < 0)
797 high = middle - 1;
798 else if (cmp > 0)
799 low = middle + 1;
800 else
801 return regs[middle].value;
802 }
803 while (low <= high);
804
805 return -1;
806}
807
808/*
99a814a1 809 * Summary of register_name.
252b5132
RH		 810 *
811 * in: Input_line_pointer points to 1st char of operand.
812 *
813 * out: A expressionS.
814 * The operand may have been a register: in this case, X_op == O_register,
815 * X_add_number is set to the register number, and truth is returned.
816 * Input_line_pointer->(next non-blank) char after operand, or is in its
817 * original state.
818 */
819
b34976b6 820static bfd_boolean
98027b10 821register_name (expressionS *expressionP)
252b5132
RH		 822{
823 int reg_number;
824 char *name;
825 char *start;
826 char c;
827
99a814a1 828 /* Find the spelling of the operand. */
252b5132 829 start = name = input_line_pointer;
3882b010 830 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 831 name = ++input_line_pointer;
832
3882b010 833 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 834 return FALSE;
252b5132
RH		 835
836 c = get_symbol_end ();
837 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
838
468cced8
AM		 839 /* Put back the delimiting char. */
840 *input_line_pointer = c;
841
99a814a1 842 /* Look to see if it's in the register table. */
81d4177b 843 if (reg_number >= 0)
252b5132
RH		 844 {
845 expressionP->X_op = O_register;
846 expressionP->X_add_number = reg_number;
81d4177b 847
99a814a1 848 /* Make the rest nice. */
252b5132
RH		 849 expressionP->X_add_symbol = NULL;
850 expressionP->X_op_symbol = NULL;
b34976b6 851 return TRUE;
252b5132 852 }
468cced8
AM		 853
854 /* Reset the line as if we had not done anything. */
855 input_line_pointer = start;
b34976b6 856 return FALSE;
252b5132
RH		 857}
858\f
859/* This function is called for each symbol seen in an expression. It
860 handles the special parsing which PowerPC assemblers are supposed
861 to use for condition codes. */
862
863/* Whether to do the special parsing. */
b34976b6 864static bfd_boolean cr_operand;
252b5132
RH		 865
866/* Names to recognize in a condition code. This table is sorted. */
867static const struct pd_reg cr_names[] =
868{
869 { "cr0", 0 },
870 { "cr1", 1 },
871 { "cr2", 2 },
872 { "cr3", 3 },
873 { "cr4", 4 },
874 { "cr5", 5 },
875 { "cr6", 6 },
876 { "cr7", 7 },
877 { "eq", 2 },
878 { "gt", 1 },
879 { "lt", 0 },
880 { "so", 3 },
881 { "un", 3 }
882};
883
884/* Parsing function. This returns non-zero if it recognized an
885 expression. */
886
887int
91d6fa6a 888ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 889{
890 int val;
891
892 if (! cr_operand)
893 return 0;
894
13abbae3
AM		 895 if (*name == '%')
896 ++name;
252b5132
RH		 897 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
898 name);
899 if (val < 0)
900 return 0;
901
91d6fa6a
NC		 902 exp->X_op = O_constant;
903 exp->X_add_number = val;
252b5132
RH		 904
905 return 1;
906}
907\f
908/* Local variables. */
909
2b3c4602
AM		 910/* Whether to target xcoff64/elf64. */
911static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 912
252b5132
RH		 913/* Opcode hash table. */
914static struct hash_control *ppc_hash;
915
916/* Macro hash table. */
917static struct hash_control *ppc_macro_hash;
918
919#ifdef OBJ_ELF
99a814a1 920/* What type of shared library support to use. */
5d6f4f16 921static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 922
99a814a1 923/* Flags to set in the elf header. */
252b5132
RH		 924static flagword ppc_flags = 0;
925
926/* Whether this is Solaris or not. */
927#ifdef TARGET_SOLARIS_COMMENT
b34976b6 928#define SOLARIS_P TRUE
252b5132 929#else
b34976b6 930#define SOLARIS_P FALSE
252b5132
RH		 931#endif
932
b34976b6 933static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 934#endif
935
936#ifdef OBJ_XCOFF
937
938/* The RS/6000 assembler uses the .csect pseudo-op to generate code
939 using a bunch of different sections. These assembler sections,
940 however, are all encompassed within the .text or .data sections of
941 the final output file. We handle this by using different
942 subsegments within these main segments. */
943
944/* Next subsegment to allocate within the .text segment. */
945static subsegT ppc_text_subsegment = 2;
946
947/* Linked list of csects in the text section. */
948static symbolS *ppc_text_csects;
949
950/* Next subsegment to allocate within the .data segment. */
951static subsegT ppc_data_subsegment = 2;
952
953/* Linked list of csects in the data section. */
954static symbolS *ppc_data_csects;
955
956/* The current csect. */
957static symbolS *ppc_current_csect;
958
959/* The RS/6000 assembler uses a TOC which holds addresses of functions
960 and variables. Symbols are put in the TOC with the .tc pseudo-op.
961 A special relocation is used when accessing TOC entries. We handle
962 the TOC as a subsegment within the .data segment. We set it up if
963 we see a .toc pseudo-op, and save the csect symbol here. */
964static symbolS *ppc_toc_csect;
965
966/* The first frag in the TOC subsegment. */
967static fragS *ppc_toc_frag;
968
969/* The first frag in the first subsegment after the TOC in the .data
970 segment. NULL if there are no subsegments after the TOC. */
971static fragS *ppc_after_toc_frag;
972
973/* The current static block. */
974static symbolS *ppc_current_block;
975
976/* The COFF debugging section; set by md_begin. This is not the
977 .debug section, but is instead the secret BFD section which will
978 cause BFD to set the section number of a symbol to N_DEBUG. */
979static asection *ppc_coff_debug_section;
980
981#endif /* OBJ_XCOFF */
982
983#ifdef TE_PE
984
985/* Various sections that we need for PE coff support. */
986static segT ydata_section;
987static segT pdata_section;
988static segT reldata_section;
989static segT rdata_section;
990static segT tocdata_section;
991
81d4177b 992/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 993static segT ppc_previous_section;
994static segT ppc_current_section;
995
996#endif /* TE_PE */
997
998#ifdef OBJ_ELF
999symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1000#define PPC_APUINFO_ISEL 0x40
1001#define PPC_APUINFO_PMR 0x41
1002#define PPC_APUINFO_RFMCI 0x42
1003#define PPC_APUINFO_CACHELCK 0x43
1004#define PPC_APUINFO_SPE 0x100
1005#define PPC_APUINFO_EFS 0x101
1006#define PPC_APUINFO_BRLOCK 0x102
1007
b34976b6
AM		 1008/*
1009 * We keep a list of APUinfo
6a0c61b7
EZ		 1010 */
1011unsigned long *ppc_apuinfo_list;
1012unsigned int ppc_apuinfo_num;
1013unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1014#endif /* OBJ_ELF */
1015\f
1016#ifdef OBJ_ELF
15c1449b 1017const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1018#else
15c1449b 1019const char *const md_shortopts = "um:";
252b5132 1020#endif
15c1449b 1021const struct option md_longopts[] = {
252b5132
RH		 1022 {NULL, no_argument, NULL, 0}
1023};
15c1449b 1024const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1025
1026int
98027b10 1027md_parse_option (int c, char *arg)
252b5132 1028{
69fe9ce5
AM		 1029 ppc_cpu_t new_cpu;
1030
252b5132
RH		 1031 switch (c)
1032 {
1033 case 'u':
1034 /* -u means that any undefined symbols should be treated as
1035 external, which is the default for gas anyhow. */
1036 break;
1037
1038#ifdef OBJ_ELF
1039 case 'l':
1040 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1041 sake, recognize -be also. */
252b5132
RH		 1042 if (strcmp (arg, "e") == 0)
1043 {
1044 target_big_endian = 0;
1045 set_target_endian = 1;
1046 }
1047 else
1048 return 0;
1049
1050 break;
1051
1052 case 'b':
1053 if (strcmp (arg, "e") == 0)
1054 {
1055 target_big_endian = 1;
1056 set_target_endian = 1;
1057 }
1058 else
1059 return 0;
1060
1061 break;
1062
1063 case 'K':
99a814a1 1064 /* Recognize -K PIC. */
252b5132
RH		 1065 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1066 {
1067 shlib = SHLIB_PIC;
1068 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1069 }
1070 else
1071 return 0;
1072
1073 break;
1074#endif
1075
7f6d05e8
CP		 1076 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1077 case 'a':
1078 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1079 {
1080#ifdef BFD64
1081 ppc_obj64 = 1;
1082#else
1083 as_fatal (_("%s unsupported"), "-a64");
1084#endif
1085 }
7f6d05e8 1086 else if (strcmp (arg, "32") == 0)
2b3c4602 1087 ppc_obj64 = 0;
7f6d05e8
CP		 1088 else
1089 return 0;
1090 break;
81d4177b 1091
252b5132 1092 case 'm':
69fe9ce5
AM		 1093 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1094 ppc_cpu = new_cpu;
252b5132
RH		 1095
1096 else if (strcmp (arg, "regnames") == 0)
b34976b6 1097 reg_names_p = TRUE;
252b5132
RH		 1098
1099 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1100 reg_names_p = FALSE;
252b5132
RH		 1101
1102#ifdef OBJ_ELF
99a814a1
AM		 1103 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1104 that require relocation. */
252b5132
RH		 1105 else if (strcmp (arg, "relocatable") == 0)
1106 {
5d6f4f16 1107 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1108 ppc_flags |= EF_PPC_RELOCATABLE;
1109 }
1110
1111 else if (strcmp (arg, "relocatable-lib") == 0)
1112 {
5d6f4f16 1113 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1114 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1115 }
1116
99a814a1 1117 /* -memb, set embedded bit. */
252b5132
RH		 1118 else if (strcmp (arg, "emb") == 0)
1119 ppc_flags |= EF_PPC_EMB;
1120
99a814a1
AM		 1121 /* -mlittle/-mbig set the endianess. */
1122 else if (strcmp (arg, "little") == 0
1123 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1124 {
1125 target_big_endian = 0;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1130 {
1131 target_big_endian = 1;
1132 set_target_endian = 1;
1133 }
1134
1135 else if (strcmp (arg, "solaris") == 0)
1136 {
b34976b6 1137 msolaris = TRUE;
252b5132
RH		 1138 ppc_comment_chars = ppc_solaris_comment_chars;
1139 }
1140
1141 else if (strcmp (arg, "no-solaris") == 0)
1142 {
b34976b6 1143 msolaris = FALSE;
252b5132
RH		 1144 ppc_comment_chars = ppc_eabi_comment_chars;
1145 }
1146#endif
1147 else
1148 {
1149 as_bad (_("invalid switch -m%s"), arg);
1150 return 0;
1151 }
1152 break;
1153
1154#ifdef OBJ_ELF
1155 /* -V: SVR4 argument to print version ID. */
1156 case 'V':
1157 print_version_id ();
1158 break;
1159
1160 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1161 should be emitted or not. FIXME: Not implemented. */
1162 case 'Q':
1163 break;
1164
1165 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1166 rather than .stabs.excl, which is ignored by the linker.
1167 FIXME: Not implemented. */
1168 case 's':
1169 if (arg)
1170 return 0;
1171
1172 break;
1173#endif
1174
1175 default:
1176 return 0;
1177 }
1178
1179 return 1;
1180}
1181
1182void
98027b10 1183md_show_usage (FILE *stream)
252b5132 1184{
bc805888 1185 fprintf (stream, _("\
252b5132 1186PowerPC options:\n\
ce3d2015
AM		 1187-a32 generate ELF32/XCOFF32\n\
1188-a64 generate ELF64/XCOFF64\n\
1189-u ignored\n\
1190-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1191-mpwr generate code for POWER (RIOS1)\n\
1192-m601 generate code for PowerPC 601\n\
418c1742 1193-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1194 generate code for PowerPC 603/604\n\
1195-m403 generate code for PowerPC 403\n\
1196-m405 generate code for PowerPC 405\n\
1197-m440 generate code for PowerPC 440\n\
1198-m464 generate code for PowerPC 464\n\
1199-m476 generate code for PowerPC 476\n\
f5c120c5 1200-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1201 generate code for PowerPC 7400/7410/7450/7455\n\
1202-m750cl generate code for PowerPC 750cl\n"));
df12615d 1203 fprintf (stream, _("\
ce3d2015
AM		 1204-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1205-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1206-mbooke generate code for 32-bit PowerPC BookE\n\
1207-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1208-mpower4, -mpwr4 generate code for Power4 architecture\n\
1209-mpower5, -mpwr5, -mpwr5x\n\
1210 generate code for Power5 architecture\n\
1211-mpower6, -mpwr6 generate code for Power6 architecture\n\
1212-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1213-mcell generate code for Cell Broadband Engine architecture\n\
1214-mcom generate code Power/PowerPC common instructions\n\
1215-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1216 fprintf (stream, _("\
ce3d2015
AM		 1217-maltivec generate code for AltiVec\n\
1218-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1219-me300 generate code for PowerPC e300 family\n\
1220-me500, -me500x2 generate code for Motorola e500 core complex\n\
1221-me500mc, generate code for Freescale e500mc core complex\n\
1222-me500mc64, generate code for Freescale e500mc64 core complex\n\
1223-mspe generate code for Motorola SPE instructions\n\
1224-mtitan generate code for AppliedMicro Titan core complex\n\
1225-mregnames Allow symbolic names for registers\n\
1226-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1227#ifdef OBJ_ELF
bc805888 1228 fprintf (stream, _("\
ce3d2015
AM		 1229-mrelocatable support for GCC's -mrelocatble option\n\
1230-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1231-memb set PPC_EMB bit in ELF flags\n\
df12615d 1232-mlittle, -mlittle-endian, -l, -le\n\
ce3d2015 1233 generate code for a little endian machine\n\
df12615d 1234-mbig, -mbig-endian, -b, -be\n\
ce3d2015
AM		 1235 generate code for a big endian machine\n\
1236-msolaris generate code for Solaris\n\
1237-mno-solaris do not generate code for Solaris\n\
1238-V print assembler version number\n\
1239-Qy, -Qn ignored\n"));
252b5132
RH		 1240#endif
1241}
1242\f
1243/* Set ppc_cpu if it is not already set. */
1244
1245static void
98027b10 1246ppc_set_cpu (void)
252b5132
RH		 1247{
1248 const char *default_os = TARGET_OS;
1249 const char *default_cpu = TARGET_CPU;
1250
7102e95e 1251 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1252 {
2a98c3a6 1253 if (ppc_obj64)
bdc70b4a 1254 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1255 else if (strncmp (default_os, "aix", 3) == 0
1256 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1257 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1258 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1259 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1260 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1261 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1262 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1263 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1264 else
99a814a1
AM		 1265 as_fatal (_("Unknown default cpu = %s, os = %s"),
1266 default_cpu, default_os);
252b5132
RH		 1267 }
1268}
1269
9232bbb0
AM		 1270/* Figure out the BFD architecture to use. This function and ppc_mach
1271 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1272
1273enum bfd_architecture
98027b10 1274ppc_arch (void)
252b5132
RH		 1275{
1276 const char *default_cpu = TARGET_CPU;
1277 ppc_set_cpu ();
1278
1279 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1280 return bfd_arch_powerpc;
1281 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1282 return bfd_arch_rs6000;
1283 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1284 {
1285 if (strcmp (default_cpu, "rs6000") == 0)
1286 return bfd_arch_rs6000;
0baf16f2 1287 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1288 return bfd_arch_powerpc;
1289 }
1290
1291 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1292 return bfd_arch_unknown;
1293}
1294
7f6d05e8 1295unsigned long
98027b10 1296ppc_mach (void)
7f6d05e8 1297{
2a98c3a6
AM		 1298 if (ppc_obj64)
1299 return bfd_mach_ppc64;
1300 else if (ppc_arch () == bfd_arch_rs6000)
1301 return bfd_mach_rs6k;
ce3d2015
AM		 1302 else if (ppc_cpu & PPC_OPCODE_TITAN)
1303 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1304 else
1305 return bfd_mach_ppc;
7f6d05e8
CP		 1306}
1307
81d4177b 1308extern char*
98027b10 1309ppc_target_format (void)
7f6d05e8
CP		 1310{
1311#ifdef OBJ_COFF
1312#ifdef TE_PE
99a814a1 1313 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1314#elif TE_POWERMAC
0baf16f2 1315 return "xcoff-powermac";
7f6d05e8 1316#else
eb1e0e80 1317# ifdef TE_AIX5
2b3c4602 1318 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1319# else
2b3c4602 1320 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1321# endif
7f6d05e8 1322#endif
7f6d05e8
CP		 1323#endif
1324#ifdef OBJ_ELF
9d8504b1
PB		 1325# ifdef TE_VXWORKS
1326 return "elf32-powerpc-vxworks";
1327# else
0baf16f2 1328 return (target_big_endian
2b3c4602
AM		 1329 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1330 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1331# endif
7f6d05e8
CP		 1332#endif
1333}
1334
69c040df
AM		 1335/* Insert opcodes and macros into hash tables. Called at startup and
1336 for .cpu pseudo. */
252b5132 1337
69c040df
AM		 1338static void
1339ppc_setup_opcodes (void)
252b5132 1340{
98027b10 1341 const struct powerpc_opcode *op;
252b5132
RH		 1342 const struct powerpc_opcode *op_end;
1343 const struct powerpc_macro *macro;
1344 const struct powerpc_macro *macro_end;
b84bf58a 1345 bfd_boolean bad_insn = FALSE;
252b5132 1346
69c040df
AM		 1347 if (ppc_hash != NULL)
1348 hash_die (ppc_hash);
1349 if (ppc_macro_hash != NULL)
1350 hash_die (ppc_macro_hash);
252b5132
RH		 1351
1352 /* Insert the opcodes into a hash table. */
1353 ppc_hash = hash_new ();
1354
c43a438d 1355 if (ENABLE_CHECKING)
b84bf58a 1356 {
c43a438d 1357 unsigned int i;
b84bf58a 1358
c43a438d
AM		 1359 /* Check operand masks. Code here and in the disassembler assumes
1360 all the 1's in the mask are contiguous. */
1361 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1362 {
c43a438d
AM		 1363 unsigned long mask = powerpc_operands[i].bitm;
1364 unsigned long right_bit;
1365 unsigned int j;
1366
1367 right_bit = mask & -mask;
1368 mask += right_bit;
1369 right_bit = mask & -mask;
1370 if (mask != right_bit)
1371 {
1372 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1373 bad_insn = TRUE;
1374 }
1375 for (j = i + 1; j < num_powerpc_operands; ++j)
1376 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1377 sizeof (powerpc_operands[0])) == 0)
1378 {
1379 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1380 j, i);
1381 bad_insn = TRUE;
1382 }
b84bf58a
AM		 1383 }
1384 }
1385
252b5132
RH		 1386 op_end = powerpc_opcodes + powerpc_num_opcodes;
1387 for (op = powerpc_opcodes; op < op_end; op++)
1388 {
c43a438d 1389 if (ENABLE_CHECKING)
b84bf58a 1390 {
c43a438d
AM		 1391 const unsigned char *o;
1392 unsigned long omask = op->mask;
8dbcd839 1393
d815f1a9 1394 if (op != powerpc_opcodes)
8dbcd839 1395 {
d815f1a9
AM		 1396 /* The major opcodes had better be sorted. Code in the
1397 disassembler assumes the insns are sorted according to
1398 major opcode. */
1399 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1400 {
1401 as_bad (_("major opcode is not sorted for %s"),
1402 op->name);
1403 bad_insn = TRUE;
1404 }
1405
1406 /* Warn if the table isn't more strictly ordered.
1407 Unfortunately it doesn't seem possible to order the
1408 table on much more than the major opcode, which makes
1409 it difficult to implement a binary search in the
1410 disassembler. The problem is that we have multiple
1411 ways to disassemble instructions, and we usually want
1412 to choose a more specific form (with more bits set in
1413 the opcode) than a more general form. eg. all of the
1414 following are equivalent:
1415 bne label # opcode = 0x40820000, mask = 0xff830003
1416 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1417 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1418
1419 There are also cases where the table needs to be out
1420 of order to disassemble the correct instruction for
2f3bb96a 1421 processor variants. */
d815f1a9
AM		 1422 else if (0)
1423 {
1424 unsigned long t1 = op[0].opcode;
1425 unsigned long t2 = op[-1].opcode;
1426
1427 if (((t1 ^ t2) & 0xfc0007ff) == 0
1428 && (t1 & 0xfc0006df) == 0x7c000286)
1429 {
1430 /* spr field is split. */
1431 t1 = ((t1 & ~0x1ff800)
1432 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1433 t2 = ((t2 & ~0x1ff800)
1434 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1435 }
1436 if (t1 < t2)
1437 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1438 op[0].name, op[0].opcode, op[0].mask,
1439 op[-1].name, op[-1].opcode, op[-1].mask);
1440 }
8dbcd839 1441 }
c43a438d
AM		 1442
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1445 {
1446 as_bad (_("mask trims opcode bits for %s"),
1447 op->name);
1448 bad_insn = TRUE;
1449 }
1450
1451 /* The operands must not overlap the opcode or each other. */
1452 for (o = op->operands; *o; ++o)
1453 if (*o >= num_powerpc_operands)
1454 {
1455 as_bad (_("operand index error for %s"),
1456 op->name);
1457 bad_insn = TRUE;
1458 }
1459 else
b84bf58a 1460 {
c43a438d
AM		 1461 const struct powerpc_operand *operand = &powerpc_operands[*o];
1462 if (operand->shift >= 0)
b84bf58a 1463 {
c43a438d
AM		 1464 unsigned long mask = operand->bitm << operand->shift;
1465 if (omask & mask)
1466 {
1467 as_bad (_("operand %d overlap in %s"),
1468 (int) (o - op->operands), op->name);
1469 bad_insn = TRUE;
1470 }
1471 omask |= mask;
b84bf58a 1472 }
b84bf58a 1473 }
c43a438d 1474 }
252b5132 1475
bdc70b4a 1476 if ((ppc_cpu & op->flags) != 0
1cb0a767 1477 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1478 {
1479 const char *retval;
1480
98027b10 1481 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1482 if (retval != NULL)
252b5132 1483 {
b84bf58a 1484 as_bad (_("duplicate instruction %s"),
99a814a1 1485 op->name);
b84bf58a 1486 bad_insn = TRUE;
252b5132
RH		 1487 }
1488 }
1489 }
1490
3c9030c1
AM		 1491 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1492 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1493 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1494
252b5132
RH		 1495 /* Insert the macros into a hash table. */
1496 ppc_macro_hash = hash_new ();
1497
1498 macro_end = powerpc_macros + powerpc_num_macros;
1499 for (macro = powerpc_macros; macro < macro_end; macro++)
1500 {
33740db9 1501 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1502 {
1503 const char *retval;
1504
98027b10 1505 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1506 if (retval != (const char *) NULL)
1507 {
b84bf58a
AM		 1508 as_bad (_("duplicate macro %s"), macro->name);
1509 bad_insn = TRUE;
252b5132
RH		 1510 }
1511 }
1512 }
1513
b84bf58a 1514 if (bad_insn)
252b5132 1515 abort ();
69c040df
AM		 1516}
1517
1518/* This function is called when the assembler starts up. It is called
1519 after the options have been parsed and the output file has been
1520 opened. */
1521
1522void
98027b10 1523md_begin (void)
69c040df
AM		 1524{
1525 ppc_set_cpu ();
1526
1527 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1528
1529#ifdef OBJ_ELF
1530 /* Set the ELF flags if desired. */
1531 if (ppc_flags && !msolaris)
1532 bfd_set_private_flags (stdoutput, ppc_flags);
1533#endif
1534
1535 ppc_setup_opcodes ();
252b5132 1536
67c1ffbe 1537 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1538 by the user. */
252b5132
RH		 1539 if (!set_target_endian)
1540 {
1541 set_target_endian = 1;
1542 target_big_endian = PPC_BIG_ENDIAN;
1543 }
1544
1545#ifdef OBJ_XCOFF
1546 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1547
1548 /* Create dummy symbols to serve as initial csects. This forces the
1549 text csects to precede the data csects. These symbols will not
1550 be output. */
1551 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1552 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1553 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1554 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1555#endif
1556
1557#ifdef TE_PE
1558
1559 ppc_current_section = text_section;
81d4177b 1560 ppc_previous_section = 0;
252b5132
RH		 1561
1562#endif
1563}
1564
6a0c61b7 1565void
98027b10 1566ppc_cleanup (void)
6a0c61b7 1567{
dc1d03fc 1568#ifdef OBJ_ELF
6a0c61b7
EZ		 1569 if (ppc_apuinfo_list == NULL)
1570 return;
1571
1572 /* Ok, so write the section info out. We have this layout:
1573
1574 byte data what
1575 ---- ---- ----
1576 0 8 length of "APUinfo\0"
1577 4 (n*4) number of APU's (4 bytes each)
1578 8 2 note type 2
1579 12 "APUinfo\0" name
1580 20 APU#1 first APU's info
1581 24 APU#2 second APU's info
1582 ... ...
1583 */
1584 {
1585 char *p;
1586 asection *seg = now_seg;
1587 subsegT subseg = now_subseg;
1588 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1589 unsigned int i;
6a0c61b7
EZ		 1590
1591 /* Create the .PPC.EMB.apuinfo section. */
1592 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1593 bfd_set_section_flags (stdoutput,
1594 apuinfo_secp,
e1a9cb8e 1595 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1596
1597 p = frag_more (4);
1598 md_number_to_chars (p, (valueT) 8, 4);
1599
1600 p = frag_more (4);
e98d298c 1601 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1602
1603 p = frag_more (4);
1604 md_number_to_chars (p, (valueT) 2, 4);
1605
1606 p = frag_more (8);
1607 strcpy (p, "APUinfo");
1608
1609 for (i = 0; i < ppc_apuinfo_num; i++)
1610 {
b34976b6
AM		 1611 p = frag_more (4);
1612 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1613 }
1614
1615 frag_align (2, 0, 0);
1616
1617 /* We probably can't restore the current segment, for there likely
1618 isn't one yet... */
1619 if (seg && subseg)
1620 subseg_set (seg, subseg);
1621 }
dc1d03fc 1622#endif
6a0c61b7
EZ		 1623}
1624
252b5132
RH		 1625/* Insert an operand value into an instruction. */
1626
1627static unsigned long
a1867a27
AM		 1628ppc_insert_operand (unsigned long insn,
1629 const struct powerpc_operand *operand,
1630 offsetT val,
91d6fa6a 1631 ppc_cpu_t cpu,
a1867a27
AM		 1632 char *file,
1633 unsigned int line)
252b5132 1634{
b84bf58a 1635 long min, max, right;
eb42fac1 1636
b84bf58a
AM		 1637 max = operand->bitm;
1638 right = max & -max;
1639 min = 0;
1640
1641 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1642 {
b84bf58a 1643 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1644 max = (max >> 1) & -right;
1645 min = ~max & -right;
b84bf58a 1646 }
252b5132 1647
b84bf58a 1648 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1649 max++;
252b5132 1650
b84bf58a 1651 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1652 {
1653 long tmp = min;
1654 min = -max;
1655 max = -tmp;
1656 }
b84bf58a 1657
a1867a27
AM		 1658 if (min <= max)
1659 {
1660 /* Some people write constants with the sign extension done by
1661 hand but only up to 32 bits. This shouldn't really be valid,
1662 but, to permit this code to assemble on a 64-bit host, we
1663 sign extend the 32-bit value to 64 bits if so doing makes the
1664 value valid. */
1665 if (val > max
1666 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1667 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1668 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1669 val = val - 0x80000000 - 0x80000000;
1670
1671 /* Similarly, people write expressions like ~(1<<15), and expect
1672 this to be OK for a 32-bit unsigned value. */
1673 else if (val < min
1674 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1675 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1676 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1677 val = val + 0x80000000 + 0x80000000;
1678
1679 else if (val < min
1680 || val > max
1681 || (val & (right - 1)) != 0)
1682 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1683 }
b84bf58a 1684
252b5132
RH		 1685 if (operand->insert)
1686 {
1687 const char *errmsg;
1688
1689 errmsg = NULL;
91d6fa6a 1690 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1691 if (errmsg != (const char *) NULL)
ee2c9aa9 1692 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1693 }
1694 else
b84bf58a 1695 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1696
1697 return insn;
1698}
1699
1700\f
1701#ifdef OBJ_ELF
1702/* Parse @got, etc. and return the desired relocation. */
1703static bfd_reloc_code_real_type
98027b10 1704ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1705{
1706 struct map_bfd {
1707 char *string;
b7d7dc63
AM		 1708 unsigned int length : 8;
1709 unsigned int valid32 : 1;
1710 unsigned int valid64 : 1;
1711 unsigned int reloc;
252b5132
RH		 1712 };
1713
1714 char ident[20];
1715 char *str = *str_p;
1716 char *str2;
1717 int ch;
1718 int len;
15c1449b 1719 const struct map_bfd *ptr;
252b5132 1720
b7d7dc63
AM		 1721#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1722#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1723#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1724
15c1449b 1725 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1726 MAP ("l", BFD_RELOC_LO16),
1727 MAP ("h", BFD_RELOC_HI16),
1728 MAP ("ha", BFD_RELOC_HI16_S),
1729 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1730 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1731 MAP ("got", BFD_RELOC_16_GOTOFF),
1732 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1733 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1734 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1735 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1736 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1737 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1738 MAP ("copy", BFD_RELOC_PPC_COPY),
1739 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1740 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1741 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1742 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1743 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1744 MAP ("tls", BFD_RELOC_PPC_TLS),
1745 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1746 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1747 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1748 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1749 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1750 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1751 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1752 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1753 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1754 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1755 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1756 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1757 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1758 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1759 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1760 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1761 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1762 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1763 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1764 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1765 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1766 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1767 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1768 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1769 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1770 MAP32 ("fixup", BFD_RELOC_CTOR),
1771 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1772 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1773 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1774 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1775 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1776 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1777 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1778 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1779 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1780 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1781 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1782 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1783 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1784 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1785 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1786 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1787 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1788 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1789 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1790 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1791 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1792 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1793 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1794 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1795 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1796 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1797 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1798 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1799 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1800 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1801 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1802 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1803 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1804 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1805 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1806 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1807 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1808 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1809 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1810 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1811 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1812 };
1813
1814 if (*str++ != '@')
1815 return BFD_RELOC_UNUSED;
1816
1817 for (ch = *str, str2 = ident;
1818 (str2 < ident + sizeof (ident) - 1
3882b010 1819 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1820 ch = *++str)
1821 {
3882b010 1822 *str2++ = TOLOWER (ch);
252b5132
RH		 1823 }
1824
1825 *str2 = '\0';
1826 len = str2 - ident;
1827
1828 ch = ident[0];
1829 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1830 if (ch == ptr->string[0]
1831 && len == ptr->length
b7d7dc63
AM		 1832 && memcmp (ident, ptr->string, ptr->length) == 0
1833 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1834 {
15c1449b
AM		 1835 int reloc = ptr->reloc;
1836
727fc41e
AM		 1837 if (!ppc_obj64 && exp_p->X_add_number != 0)
1838 {
1839 switch (reloc)
1840 {
1841 case BFD_RELOC_16_GOTOFF:
1842 case BFD_RELOC_LO16_GOTOFF:
1843 case BFD_RELOC_HI16_GOTOFF:
1844 case BFD_RELOC_HI16_S_GOTOFF:
1845 as_warn (_("identifier+constant@got means "
1846 "identifier@got+constant"));
1847 break;
1848
1849 case BFD_RELOC_PPC_GOT_TLSGD16:
1850 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1851 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1852 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1853 case BFD_RELOC_PPC_GOT_TLSLD16:
1854 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1855 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1856 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1857 case BFD_RELOC_PPC_GOT_DTPREL16:
1858 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1859 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1860 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1861 case BFD_RELOC_PPC_GOT_TPREL16:
1862 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1863 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1864 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1865 as_bad (_("symbol+offset not supported for got tls"));
1866 break;
1867 }
1868 }
5f6db75a
AM		 1869
1870 /* Now check for identifier@suffix+constant. */
1871 if (*str == '-' || *str == '+')
252b5132 1872 {
5f6db75a
AM		 1873 char *orig_line = input_line_pointer;
1874 expressionS new_exp;
1875
1876 input_line_pointer = str;
1877 expression (&new_exp);
1878 if (new_exp.X_op == O_constant)
252b5132 1879 {
5f6db75a
AM		 1880 exp_p->X_add_number += new_exp.X_add_number;
1881 str = input_line_pointer;
252b5132 1882 }
5f6db75a
AM		 1883
1884 if (&input_line_pointer != str_p)
1885 input_line_pointer = orig_line;
252b5132 1886 }
252b5132 1887 *str_p = str;
0baf16f2 1888
2b3c4602 1889 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1890 && exp_p->X_op == O_symbol
1891 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1892 {
9f2b53d7
AM		 1893 /* Change the symbol so that the dummy .TOC. symbol can be
1894 omitted from the object file. */
0baf16f2
AM		 1895 exp_p->X_add_symbol = &abs_symbol;
1896 }
1897
15c1449b 1898 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1899 }
1900
1901 return BFD_RELOC_UNUSED;
1902}
1903
99a814a1
AM		 1904/* Like normal .long/.short/.word, except support @got, etc.
1905 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1906static void
98027b10 1907ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1908{
1909 expressionS exp;
1910 bfd_reloc_code_real_type reloc;
1911
1912 if (is_it_end_of_statement ())
1913 {
1914 demand_empty_rest_of_line ();
1915 return;
1916 }
1917
1918 do
1919 {
1920 expression (&exp);
1921 if (exp.X_op == O_symbol
1922 && *input_line_pointer == '@'
99a814a1
AM		 1923 && (reloc = ppc_elf_suffix (&input_line_pointer,
1924 &exp)) != BFD_RELOC_UNUSED)
252b5132 1925 {
99a814a1
AM		 1926 reloc_howto_type *reloc_howto;
1927 int size;
1928
1929 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1930 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1931
1932 if (size > nbytes)
0baf16f2
AM		 1933 {
1934 as_bad (_("%s relocations do not fit in %d bytes\n"),
1935 reloc_howto->name, nbytes);
1936 }
252b5132
RH		 1937 else
1938 {
0baf16f2
AM		 1939 char *p;
1940 int offset;
252b5132 1941
0baf16f2 1942 p = frag_more (nbytes);
aa0c8c1a 1943 memset (p, 0, nbytes);
0baf16f2
AM		 1944 offset = 0;
1945 if (target_big_endian)
1946 offset = nbytes - size;
99a814a1
AM		 1947 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1948 &exp, 0, reloc);
252b5132
RH		 1949 }
1950 }
1951 else
1952 emit_expr (&exp, (unsigned int) nbytes);
1953 }
1954 while (*input_line_pointer++ == ',');
1955
99a814a1
AM		 1956 /* Put terminator back into stream. */
1957 input_line_pointer--;
252b5132
RH		 1958 demand_empty_rest_of_line ();
1959}
1960
1961/* Solaris pseduo op to change to the .rodata section. */
1962static void
98027b10 1963ppc_elf_rdata (int xxx)
252b5132
RH		 1964{
1965 char *save_line = input_line_pointer;
1966 static char section[] = ".rodata\n";
1967
99a814a1 1968 /* Just pretend this is .section .rodata */
252b5132
RH		 1969 input_line_pointer = section;
1970 obj_elf_section (xxx);
1971
1972 input_line_pointer = save_line;
1973}
1974
99a814a1 1975/* Pseudo op to make file scope bss items. */
252b5132 1976static void
98027b10 1977ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1978{
98027b10
AM		 1979 char *name;
1980 char c;
1981 char *p;
252b5132 1982 offsetT size;
98027b10 1983 symbolS *symbolP;
252b5132
RH		 1984 offsetT align;
1985 segT old_sec;
1986 int old_subsec;
1987 char *pfrag;
1988 int align2;
1989
1990 name = input_line_pointer;
1991 c = get_symbol_end ();
1992
99a814a1 1993 /* just after name is now '\0'. */
252b5132
RH		 1994 p = input_line_pointer;
1995 *p = c;
1996 SKIP_WHITESPACE ();
1997 if (*input_line_pointer != ',')
1998 {
1999 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2000 ignore_rest_of_line ();
2001 return;
2002 }
2003
2004 input_line_pointer++; /* skip ',' */
2005 if ((size = get_absolute_expression ()) < 0)
2006 {
2007 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2008 ignore_rest_of_line ();
2009 return;
2010 }
2011
2012 /* The third argument to .lcomm is the alignment. */
2013 if (*input_line_pointer != ',')
2014 align = 8;
2015 else
2016 {
2017 ++input_line_pointer;
2018 align = get_absolute_expression ();
2019 if (align <= 0)
2020 {
2021 as_warn (_("ignoring bad alignment"));
2022 align = 8;
2023 }
2024 }
2025
2026 *p = 0;
2027 symbolP = symbol_find_or_make (name);
2028 *p = c;
2029
2030 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2031 {
2032 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2033 S_GET_NAME (symbolP));
2034 ignore_rest_of_line ();
2035 return;
2036 }
2037
2038 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2039 {
2040 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2041 S_GET_NAME (symbolP),
2042 (long) S_GET_VALUE (symbolP),
2043 (long) size);
2044
2045 ignore_rest_of_line ();
2046 return;
2047 }
2048
99a814a1 2049 /* Allocate_bss. */
252b5132
RH		 2050 old_sec = now_seg;
2051 old_subsec = now_subseg;
2052 if (align)
2053 {
99a814a1 2054 /* Convert to a power of 2 alignment. */
252b5132
RH		 2055 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2056 if (align != 1)
2057 {
2058 as_bad (_("Common alignment not a power of 2"));
2059 ignore_rest_of_line ();
2060 return;
2061 }
2062 }
2063 else
2064 align2 = 0;
2065
2066 record_alignment (bss_section, align2);
2067 subseg_set (bss_section, 0);
2068 if (align2)
2069 frag_align (align2, 0, 0);
2070 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2071 symbol_get_frag (symbolP)->fr_symbol = 0;
2072 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2073 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2074 (char *) 0);
2075 *pfrag = 0;
2076 S_SET_SIZE (symbolP, size);
2077 S_SET_SEGMENT (symbolP, bss_section);
2078 subseg_set (old_sec, old_subsec);
2079 demand_empty_rest_of_line ();
2080}
2081
2082/* Validate any relocations emitted for -mrelocatable, possibly adding
2083 fixups for word relocations in writable segments, so we can adjust
2084 them at runtime. */
2085static void
98027b10 2086ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2087{
2088 if (fixp->fx_done || fixp->fx_pcrel)
2089 return;
2090
2091 switch (shlib)
2092 {
2093 case SHLIB_NONE:
2094 case SHLIB_PIC:
2095 return;
2096
5d6f4f16 2097 case SHLIB_MRELOCATABLE:
252b5132
RH		 2098 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2099 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2100 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2101 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2102 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2103 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2104 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2105 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2106 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2107 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2108 && strcmp (segment_name (seg), ".got2") != 0
2109 && strcmp (segment_name (seg), ".dtors") != 0
2110 && strcmp (segment_name (seg), ".ctors") != 0
2111 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2112 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2113 && strcmp (segment_name (seg), ".eh_frame") != 0
2114 && strcmp (segment_name (seg), ".ex_shared") != 0)
2115 {
2116 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2117 || fixp->fx_r_type != BFD_RELOC_CTOR)
2118 {
2119 as_bad_where (fixp->fx_file, fixp->fx_line,
2120 _("Relocation cannot be done when using -mrelocatable"));
2121 }
2122 }
2123 return;
2124 }
2125}
0baf16f2 2126
7e8d4ab4
AM		 2127/* Prevent elf_frob_file_before_adjust removing a weak undefined
2128 function descriptor sym if the corresponding code sym is used. */
2129
2130void
98027b10 2131ppc_frob_file_before_adjust (void)
0baf16f2 2132{
7e8d4ab4 2133 symbolS *symp;
9232bbb0 2134 asection *toc;
0baf16f2 2135
7e8d4ab4
AM		 2136 if (!ppc_obj64)
2137 return;
2138
2139 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2140 {
7e8d4ab4
AM		 2141 const char *name;
2142 char *dotname;
2143 symbolS *dotsym;
2144 size_t len;
2145
2146 name = S_GET_NAME (symp);
2147 if (name[0] == '.')
2148 continue;
2149
2150 if (! S_IS_WEAK (symp)
2151 || S_IS_DEFINED (symp))
2152 continue;
2153
2154 len = strlen (name) + 1;
2155 dotname = xmalloc (len + 1);
2156 dotname[0] = '.';
2157 memcpy (dotname + 1, name, len);
461b725f 2158 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2159 free (dotname);
2160 if (dotsym != NULL && (symbol_used_p (dotsym)
2161 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2162 symbol_mark_used (symp);
2163
0baf16f2
AM		 2164 }
2165
9232bbb0
AM		 2166 toc = bfd_get_section_by_name (stdoutput, ".toc");
2167 if (toc != NULL
01efc3af 2168 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2169 && bfd_section_size (stdoutput, toc) > 0x10000)
2170 as_warn (_("TOC section size exceeds 64k"));
2171
7e8d4ab4
AM		 2172 /* Don't emit .TOC. symbol. */
2173 symp = symbol_find (".TOC.");
2174 if (symp != NULL)
2175 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2176}
252b5132
RH		 2177#endif /* OBJ_ELF */
2178\f
2179#ifdef TE_PE
2180
2181/*
99a814a1 2182 * Summary of parse_toc_entry.
252b5132
RH		 2183 *
2184 * in: Input_line_pointer points to the '[' in one of:
2185 *
2186 * [toc] [tocv] [toc32] [toc64]
2187 *
2188 * Anything else is an error of one kind or another.
2189 *
81d4177b 2190 * out:
252b5132
RH		 2191 * return value: success or failure
2192 * toc_kind: kind of toc reference
2193 * input_line_pointer:
2194 * success: first char after the ']'
2195 * failure: unchanged
2196 *
2197 * settings:
2198 *
2199 * [toc] - rv == success, toc_kind = default_toc
2200 * [tocv] - rv == success, toc_kind = data_in_toc
2201 * [toc32] - rv == success, toc_kind = must_be_32
2202 * [toc64] - rv == success, toc_kind = must_be_64
2203 *
2204 */
2205
81d4177b
KH		 2206enum toc_size_qualifier
2207{
252b5132
RH		 2208 default_toc, /* The toc cell constructed should be the system default size */
2209 data_in_toc, /* This is a direct reference to a toc cell */
2210 must_be_32, /* The toc cell constructed must be 32 bits wide */
2211 must_be_64 /* The toc cell constructed must be 64 bits wide */
2212};
2213
2214static int
98027b10 2215parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2216{
2217 char *start;
2218 char *toc_spec;
2219 char c;
2220 enum toc_size_qualifier t;
2221
99a814a1 2222 /* Save the input_line_pointer. */
252b5132
RH		 2223 start = input_line_pointer;
2224
99a814a1 2225 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2226 ++input_line_pointer;
2227 SKIP_WHITESPACE ();
81d4177b 2228
99a814a1 2229 /* Find the spelling of the operand. */
252b5132
RH		 2230 toc_spec = input_line_pointer;
2231 c = get_symbol_end ();
2232
99a814a1 2233 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2234 {
2235 t = default_toc;
2236 }
99a814a1 2237 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2238 {
2239 t = data_in_toc;
2240 }
99a814a1 2241 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2242 {
2243 t = must_be_32;
2244 }
99a814a1 2245 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2246 {
2247 t = must_be_64;
2248 }
2249 else
2250 {
2251 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2252 *input_line_pointer = c;
2253 input_line_pointer = start;
252b5132
RH		 2254 return 0;
2255 }
2256
99a814a1
AM		 2257 /* Now find the ']'. */
2258 *input_line_pointer = c;
252b5132 2259
81d4177b
KH		 2260 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2261 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2262
2263 if (c != ']')
2264 {
2265 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2266 input_line_pointer = start;
252b5132
RH		 2267 return 0;
2268 }
2269
99a814a1 2270 *toc_kind = t;
252b5132
RH		 2271 return 1;
2272}
2273#endif
2274\f
2275
dc1d03fc 2276#ifdef OBJ_ELF
6a0c61b7
EZ		 2277#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2278static void
98027b10 2279ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2280{
2281 unsigned int i;
2282
2283 /* Check we don't already exist. */
2284 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2285 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2286 return;
b34976b6 2287
6a0c61b7
EZ		 2288 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2289 {
2290 if (ppc_apuinfo_num_alloc == 0)
2291 {
2292 ppc_apuinfo_num_alloc = 4;
2293 ppc_apuinfo_list = (unsigned long *)
2294 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2295 }
2296 else
2297 {
2298 ppc_apuinfo_num_alloc += 4;
2299 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2300 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2301 }
2302 }
dc1d03fc 2303 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2304}
2305#undef APUID
dc1d03fc 2306#endif
6a0c61b7
EZ		 2307\f
2308
252b5132
RH		 2309/* We need to keep a list of fixups. We can't simply generate them as
2310 we go, because that would require us to first create the frag, and
2311 that would screw up references to ``.''. */
2312
2313struct ppc_fixup
2314{
2315 expressionS exp;
2316 int opindex;
2317 bfd_reloc_code_real_type reloc;
2318};
2319
2320#define MAX_INSN_FIXUPS (5)
2321
2322/* This routine is called for each instruction to be assembled. */
2323
2324void
98027b10 2325md_assemble (char *str)
252b5132
RH		 2326{
2327 char *s;
2328 const struct powerpc_opcode *opcode;
2329 unsigned long insn;
2330 const unsigned char *opindex_ptr;
2331 int skip_optional;
2332 int need_paren;
2333 int next_opindex;
2334 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2335 int fc;
2336 char *f;
09b935ac 2337 int addr_mod;
252b5132
RH		 2338 int i;
2339#ifdef OBJ_ELF
2340 bfd_reloc_code_real_type reloc;
2341#endif
2342
2343 /* Get the opcode. */
3882b010 2344 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2345 ;
2346 if (*s != '\0')
2347 *s++ = '\0';
2348
2349 /* Look up the opcode in the hash table. */
2350 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2351 if (opcode == (const struct powerpc_opcode *) NULL)
2352 {
2353 const struct powerpc_macro *macro;
2354
2355 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2356 if (macro == (const struct powerpc_macro *) NULL)
2357 as_bad (_("Unrecognized opcode: `%s'"), str);
2358 else
2359 ppc_macro (s, macro);
2360
2361 return;
2362 }
2363
2364 insn = opcode->opcode;
2365
2366 str = s;
3882b010 2367 while (ISSPACE (*str))
252b5132
RH		 2368 ++str;
2369
2370 /* PowerPC operands are just expressions. The only real issue is
2371 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2372 an optional operand separate the operands only with commas (in some
2373 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2374 have optional operands). Most instructions with optional operands
2375 have only one. Those that have more than one optional operand can
2376 take either all their operands or none. So, before we start seriously
2377 parsing the operands, we check to see if we have optional operands,
2378 and if we do, we count the number of commas to see which operands
2379 have been omitted. */
252b5132
RH		 2380 skip_optional = 0;
2381 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2382 {
2383 const struct powerpc_operand *operand;
2384
2385 operand = &powerpc_operands[*opindex_ptr];
2386 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2387 {
2388 unsigned int opcount;
7fe9cf6b 2389 unsigned int num_operands_expected;
252b5132
RH		 2390
2391 /* There is an optional operand. Count the number of
2392 commas in the input line. */
2393 if (*str == '\0')
2394 opcount = 0;
2395 else
2396 {
2397 opcount = 1;
2398 s = str;
2399 while ((s = strchr (s, ',')) != (char *) NULL)
2400 {
2401 ++opcount;
2402 ++s;
2403 }
2404 }
2405
7fe9cf6b
NC		 2406 /* Compute the number of expected operands.
2407 Do not count fake operands. */
2408 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2409 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2410 ++ num_operands_expected;
2411
252b5132
RH		 2412 /* If there are fewer operands in the line then are called
2413 for by the instruction, we want to skip the optional
1f6c9eb0 2414 operands. */
7fe9cf6b 2415 if (opcount < num_operands_expected)
252b5132
RH		 2416 skip_optional = 1;
2417
2418 break;
2419 }
2420 }
2421
2422 /* Gather the operands. */
2423 need_paren = 0;
2424 next_opindex = 0;
2425 fc = 0;
2426 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2427 {
2428 const struct powerpc_operand *operand;
2429 const char *errmsg;
2430 char *hold;
2431 expressionS ex;
2432 char endc;
2433
2434 if (next_opindex == 0)
2435 operand = &powerpc_operands[*opindex_ptr];
2436 else
2437 {
2438 operand = &powerpc_operands[next_opindex];
2439 next_opindex = 0;
2440 }
252b5132
RH		 2441 errmsg = NULL;
2442
2443 /* If this is a fake operand, then we do not expect anything
2444 from the input. */
2445 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2446 {
2b3c4602 2447 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2448 if (errmsg != (const char *) NULL)
ee2c9aa9 2449 as_bad ("%s", errmsg);
252b5132
RH		 2450 continue;
2451 }
2452
2453 /* If this is an optional operand, and we are skipping it, just
2454 insert a zero. */
2455 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2456 && skip_optional)
2457 {
2458 if (operand->insert)
2459 {
2b3c4602 2460 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2461 if (errmsg != (const char *) NULL)
ee2c9aa9 2462 as_bad ("%s", errmsg);
252b5132
RH		 2463 }
2464 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2465 next_opindex = *opindex_ptr + 1;
2466 continue;
2467 }
2468
2469 /* Gather the operand. */
2470 hold = input_line_pointer;
2471 input_line_pointer = str;
2472
2473#ifdef TE_PE
81d4177b 2474 if (*input_line_pointer == '[')
252b5132
RH		 2475 {
2476 /* We are expecting something like the second argument here:
99a814a1
AM		 2477 *
2478 * lwz r4,[toc].GS.0.static_int(rtoc)
2479 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2480 * The argument following the `]' must be a symbol name, and the
2481 * register must be the toc register: 'rtoc' or '2'
2482 *
2483 * The effect is to 0 as the displacement field
2484 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2485 * the appropriate variation) reloc against it based on the symbol.
2486 * The linker will build the toc, and insert the resolved toc offset.
2487 *
2488 * Note:
2489 * o The size of the toc entry is currently assumed to be
2490 * 32 bits. This should not be assumed to be a hard coded
2491 * number.
2492 * o In an effort to cope with a change from 32 to 64 bits,
2493 * there are also toc entries that are specified to be
2494 * either 32 or 64 bits:
2495 * lwz r4,[toc32].GS.0.static_int(rtoc)
2496 * lwz r4,[toc64].GS.0.static_int(rtoc)
2497 * These demand toc entries of the specified size, and the
2498 * instruction probably requires it.
2499 */
252b5132
RH		 2500
2501 int valid_toc;
2502 enum toc_size_qualifier toc_kind;
2503 bfd_reloc_code_real_type toc_reloc;
2504
99a814a1
AM		 2505 /* Go parse off the [tocXX] part. */
2506 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2507
81d4177b 2508 if (!valid_toc)
252b5132 2509 {
99a814a1
AM		 2510 /* Note: message has already been issued.
2511 FIXME: what sort of recovery should we do?
2512 demand_rest_of_line (); return; ? */
252b5132
RH		 2513 }
2514
99a814a1
AM		 2515 /* Now get the symbol following the ']'. */
2516 expression (&ex);
252b5132
RH		 2517
2518 switch (toc_kind)
2519 {
2520 case default_toc:
99a814a1
AM		 2521 /* In this case, we may not have seen the symbol yet,
2522 since it is allowed to appear on a .extern or .globl
2523 or just be a label in the .data section. */
252b5132
RH		 2524 toc_reloc = BFD_RELOC_PPC_TOC16;
2525 break;
2526 case data_in_toc:
99a814a1
AM		 2527 /* 1. The symbol must be defined and either in the toc
2528 section, or a global.
2529 2. The reloc generated must have the TOCDEFN flag set
2530 in upper bit mess of the reloc type.
2531 FIXME: It's a little confusing what the tocv
2532 qualifier can be used for. At the very least, I've
2533 seen three uses, only one of which I'm sure I can
2534 explain. */
81d4177b
KH		 2535 if (ex.X_op == O_symbol)
2536 {
9c2799c2 2537 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2538 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2539 != tocdata_section)
252b5132 2540 {
99a814a1 2541 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2542 }
2543 }
2544
2545 toc_reloc = BFD_RELOC_PPC_TOC16;
2546 break;
2547 case must_be_32:
99a814a1
AM		 2548 /* FIXME: these next two specifically specify 32/64 bit
2549 toc entries. We don't support them today. Is this
2550 the right way to say that? */
252b5132
RH		 2551 toc_reloc = BFD_RELOC_UNUSED;
2552 as_bad (_("Unimplemented toc32 expression modifier"));
2553 break;
2554 case must_be_64:
99a814a1 2555 /* FIXME: see above. */
252b5132
RH		 2556 toc_reloc = BFD_RELOC_UNUSED;
2557 as_bad (_("Unimplemented toc64 expression modifier"));
2558 break;
2559 default:
bc805888 2560 fprintf (stderr,
99a814a1
AM		 2561 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2562 toc_kind);
bc805888 2563 abort ();
252b5132
RH		 2564 break;
2565 }
2566
2567 /* We need to generate a fixup for this expression. */
2568 if (fc >= MAX_INSN_FIXUPS)
2569 as_fatal (_("too many fixups"));
2570
2571 fixups[fc].reloc = toc_reloc;
2572 fixups[fc].exp = ex;
2573 fixups[fc].opindex = *opindex_ptr;
2574 ++fc;
2575
99a814a1
AM		 2576 /* Ok. We've set up the fixup for the instruction. Now make it
2577 look like the constant 0 was found here. */
252b5132
RH		 2578 ex.X_unsigned = 1;
2579 ex.X_op = O_constant;
2580 ex.X_add_number = 0;
2581 ex.X_add_symbol = NULL;
2582 ex.X_op_symbol = NULL;
2583 }
2584
2585 else
2586#endif /* TE_PE */
2587 {
2ad068be
AM		 2588 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2589 || !register_name (&ex))
252b5132 2590 {
13abbae3
AM		 2591 char save_lex = lex_type['%'];
2592
252b5132 2593 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2594 {
2595 cr_operand = TRUE;
2596 lex_type['%'] |= LEX_BEGIN_NAME;
2597 }
252b5132 2598 expression (&ex);
b34976b6 2599 cr_operand = FALSE;
13abbae3 2600 lex_type['%'] = save_lex;
252b5132
RH		 2601 }
2602 }
2603
2604 str = input_line_pointer;
2605 input_line_pointer = hold;
2606
2607 if (ex.X_op == O_illegal)
2608 as_bad (_("illegal operand"));
2609 else if (ex.X_op == O_absent)
2610 as_bad (_("missing operand"));
2611 else if (ex.X_op == O_register)
2612 {
2613 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2614 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2615 }
2616 else if (ex.X_op == O_constant)
2617 {
2618#ifdef OBJ_ELF
81d4177b 2619 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2620 char *orig_str = str;
2621
2622 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2623 switch (reloc)
2624 {
2625 default:
2626 str = orig_str;
2627 break;
2628
2629 case BFD_RELOC_LO16:
2630 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2631 something which cleared it, we always produce a
2632 signed value. */
2633 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2634 ex.X_add_number &= 0xffff;
2635 else
0baf16f2 2636 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2637 break;
2638
2639 case BFD_RELOC_HI16:
0baf16f2
AM		 2640 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2641 ex.X_add_number = PPC_HI (ex.X_add_number);
2642 else
2643 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2644 break;
2645
2646 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2647 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2648 ex.X_add_number = PPC_HA (ex.X_add_number);
2649 else
2650 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2651 break;
2652
0baf16f2
AM		 2653 case BFD_RELOC_PPC64_HIGHER:
2654 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2655 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2656 else
2657 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2658 break;
2659
2660 case BFD_RELOC_PPC64_HIGHER_S:
2661 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2662 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2663 else
2664 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2665 break;
0baf16f2
AM		 2666
2667 case BFD_RELOC_PPC64_HIGHEST:
2668 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2669 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2670 else
2671 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2672 break;
2673
2674 case BFD_RELOC_PPC64_HIGHEST_S:
2675 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2676 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2677 else
2678 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2679 break;
252b5132 2680 }
0baf16f2 2681#endif /* OBJ_ELF */
252b5132 2682 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2683 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2684 }
2685#ifdef OBJ_ELF
727fc41e 2686 else
252b5132 2687 {
727fc41e 2688 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2689 {
727fc41e
AM		 2690 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2691 if (sym_name[0] == '.')
2692 ++sym_name;
cdba85ec 2693
727fc41e 2694 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2695 {
727fc41e
AM		 2696 expressionS tls_exp;
2697
2698 hold = input_line_pointer;
2699 input_line_pointer = str + 1;
2700 expression (&tls_exp);
2701 if (tls_exp.X_op == O_symbol)
2702 {
2703 reloc = BFD_RELOC_UNUSED;
2704 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2705 {
2706 reloc = BFD_RELOC_PPC_TLSGD;
2707 input_line_pointer += 7;
2708 }
2709 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2710 {
2711 reloc = BFD_RELOC_PPC_TLSLD;
2712 input_line_pointer += 7;
2713 }
2714 if (reloc != BFD_RELOC_UNUSED)
2715 {
2716 SKIP_WHITESPACE ();
2717 str = input_line_pointer;
2718
2719 if (fc >= MAX_INSN_FIXUPS)
2720 as_fatal (_("too many fixups"));
2721 fixups[fc].exp = tls_exp;
2722 fixups[fc].opindex = *opindex_ptr;
2723 fixups[fc].reloc = reloc;
2724 ++fc;
2725 }
2726 }
2727 input_line_pointer = hold;
252b5132
RH		 2728 }
2729 }
2730
727fc41e 2731 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2732 {
727fc41e 2733 /* Some TLS tweaks. */
0baf16f2
AM		 2734 switch (reloc)
2735 {
727fc41e 2736 default:
cdba85ec 2737 break;
727fc41e
AM		 2738
2739 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2740 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2741 as_bad (_("@tls may not be used with \"%s\" operands"),
2742 opcode->name);
2743 else if (operand->shift != 11)
2744 as_bad (_("@tls may only be used in last operand"));
2745 else
2746 insn = ppc_insert_operand (insn, operand,
2747 ppc_obj64 ? 13 : 2,
2748 ppc_cpu, (char *) NULL, 0);
cdba85ec 2749 break;
727fc41e
AM		 2750
2751 /* We'll only use the 32 (or 64) bit form of these relocations
2752 in constants. Instructions get the 16 bit form. */
2753 case BFD_RELOC_PPC_DTPREL:
2754 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2755 break;
727fc41e
AM		 2756 case BFD_RELOC_PPC_TPREL:
2757 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2758 break;
2759 }
727fc41e
AM		 2760
2761 /* For the absolute forms of branches, convert the PC
2762 relative form back into the absolute. */
2763 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2764 {
2765 switch (reloc)
2766 {
2767 case BFD_RELOC_PPC_B26:
2768 reloc = BFD_RELOC_PPC_BA26;
2769 break;
2770 case BFD_RELOC_PPC_B16:
2771 reloc = BFD_RELOC_PPC_BA16;
2772 break;
2773 case BFD_RELOC_PPC_B16_BRTAKEN:
2774 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2775 break;
2776 case BFD_RELOC_PPC_B16_BRNTAKEN:
2777 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2778 break;
2779 default:
2780 break;
2781 }
2782 }
2783
01efc3af
AM		 2784 switch (reloc)
2785 {
2786 case BFD_RELOC_PPC_TOC16:
2787 toc_reloc_types |= has_small_toc_reloc;
2788 break;
2789 case BFD_RELOC_PPC64_TOC16_LO:
2790 case BFD_RELOC_PPC64_TOC16_HI:
2791 case BFD_RELOC_PPC64_TOC16_HA:
2792 toc_reloc_types |= has_large_toc_reloc;
2793 break;
2794 default:
2795 break;
2796 }
2797
727fc41e
AM		 2798 if (ppc_obj64
2799 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2800 {
2801 switch (reloc)
2802 {
2803 case BFD_RELOC_16:
2804 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2805 break;
2806 case BFD_RELOC_LO16:
2807 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2808 break;
2809 case BFD_RELOC_16_GOTOFF:
2810 reloc = BFD_RELOC_PPC64_GOT16_DS;
2811 break;
2812 case BFD_RELOC_LO16_GOTOFF:
2813 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2814 break;
2815 case BFD_RELOC_LO16_PLTOFF:
2816 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2817 break;
2818 case BFD_RELOC_16_BASEREL:
2819 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2820 break;
2821 case BFD_RELOC_LO16_BASEREL:
2822 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2823 break;
2824 case BFD_RELOC_PPC_TOC16:
2825 reloc = BFD_RELOC_PPC64_TOC16_DS;
2826 break;
2827 case BFD_RELOC_PPC64_TOC16_LO:
2828 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2829 break;
2830 case BFD_RELOC_PPC64_PLTGOT16:
2831 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2832 break;
2833 case BFD_RELOC_PPC64_PLTGOT16_LO:
2834 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2835 break;
2836 case BFD_RELOC_PPC_DTPREL16:
2837 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2838 break;
2839 case BFD_RELOC_PPC_DTPREL16_LO:
2840 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2841 break;
2842 case BFD_RELOC_PPC_TPREL16:
2843 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2844 break;
2845 case BFD_RELOC_PPC_TPREL16_LO:
2846 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2847 break;
2848 case BFD_RELOC_PPC_GOT_DTPREL16:
2849 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2850 case BFD_RELOC_PPC_GOT_TPREL16:
2851 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2852 break;
2853 default:
2854 as_bad (_("unsupported relocation for DS offset field"));
2855 break;
2856 }
2857 }
0baf16f2
AM		 2858 }
2859
252b5132
RH		 2860 /* We need to generate a fixup for this expression. */
2861 if (fc >= MAX_INSN_FIXUPS)
2862 as_fatal (_("too many fixups"));
2863 fixups[fc].exp = ex;
727fc41e 2864 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2865 fixups[fc].reloc = reloc;
2866 ++fc;
2867 }
727fc41e 2868#else /* OBJ_ELF */
252b5132
RH		 2869 else
2870 {
2871 /* We need to generate a fixup for this expression. */
2872 if (fc >= MAX_INSN_FIXUPS)
2873 as_fatal (_("too many fixups"));
2874 fixups[fc].exp = ex;
2875 fixups[fc].opindex = *opindex_ptr;
2876 fixups[fc].reloc = BFD_RELOC_UNUSED;
2877 ++fc;
2878 }
727fc41e 2879#endif /* OBJ_ELF */
252b5132
RH		 2880
2881 if (need_paren)
2882 {
2883 endc = ')';
2884 need_paren = 0;
c3d65c1c
BE		 2885 /* If expecting more operands, then we want to see "),". */
2886 if (*str == endc && opindex_ptr[1] != 0)
2887 {
2888 do
2889 ++str;
2890 while (ISSPACE (*str));
2891 endc = ',';
2892 }
252b5132
RH		 2893 }
2894 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2895 {
2896 endc = '(';
2897 need_paren = 1;
2898 }
2899 else
2900 endc = ',';
2901
2902 /* The call to expression should have advanced str past any
2903 whitespace. */
2904 if (*str != endc
2905 && (endc != ',' || *str != '\0'))
2906 {
5a938047
AM		 2907 if (*str == '\0')
2908 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2909 else
2910 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2911 break;
2912 }
2913
2914 if (*str != '\0')
2915 ++str;
2916 }
2917
3882b010 2918 while (ISSPACE (*str))
252b5132
RH		 2919 ++str;
2920
2921 if (*str != '\0')
2922 as_bad (_("junk at end of line: `%s'"), str);
2923
dc1d03fc 2924#ifdef OBJ_ELF
6a0c61b7 2925 /* Do we need/want a APUinfo section? */
e01d869a 2926 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2927 {
2928 /* These are all version "1". */
2929 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2930 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2931 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2932 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2933 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2934 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2935 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2936 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2937 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2938 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2939 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2940 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2941 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2942 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2943 }
dc1d03fc 2944#endif
6a0c61b7 2945
252b5132
RH		 2946 /* Write out the instruction. */
2947 f = frag_more (4);
09b935ac
AM		 2948 addr_mod = frag_now_fix () & 3;
2949 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2950 as_bad (_("instruction address is not a multiple of 4"));
2951 frag_now->insn_addr = addr_mod;
2952 frag_now->has_code = 1;
252b5132
RH		 2953 md_number_to_chars (f, insn, 4);
2954
5d6f4f16
GK		 2955#ifdef OBJ_ELF
2956 dwarf2_emit_insn (4);
2957#endif
2958
252b5132
RH		 2959 /* Create any fixups. At this point we do not use a
2960 bfd_reloc_code_real_type, but instead just use the
2961 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2962 handle fixups for any operand type, although that is admittedly
2963 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2964 md_apply_fix. */
252b5132
RH		 2965 for (i = 0; i < fc; i++)
2966 {
252b5132
RH		 2967 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2968 {
99a814a1 2969 reloc_howto_type *reloc_howto;
252b5132
RH		 2970 int size;
2971 int offset;
2972 fixS *fixP;
2973
99a814a1 2974 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2975 if (!reloc_howto)
2976 abort ();
2977
2978 size = bfd_get_reloc_size (reloc_howto);
2979 offset = target_big_endian ? (4 - size) : 0;
2980
2981 if (size < 1 || size > 4)
bc805888 2982 abort ();
252b5132 2983
99a814a1
AM		 2984 fixP = fix_new_exp (frag_now,
2985 f - frag_now->fr_literal + offset,
2986 size,
2987 &fixups[i].exp,
2988 reloc_howto->pc_relative,
252b5132
RH		 2989 fixups[i].reloc);
2990
2991 /* Turn off complaints that the addend is too large for things like
2992 foo+100000@ha. */
2993 switch (fixups[i].reloc)
2994 {
2995 case BFD_RELOC_16_GOTOFF:
2996 case BFD_RELOC_PPC_TOC16:
2997 case BFD_RELOC_LO16:
2998 case BFD_RELOC_HI16:
2999 case BFD_RELOC_HI16_S:
0baf16f2 3000#ifdef OBJ_ELF
0baf16f2
AM		 3001 case BFD_RELOC_PPC64_HIGHER:
3002 case BFD_RELOC_PPC64_HIGHER_S:
3003 case BFD_RELOC_PPC64_HIGHEST:
3004 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3005#endif
252b5132
RH		 3006 fixP->fx_no_overflow = 1;
3007 break;
3008 default:
3009 break;
3010 }
3011 }
3012 else
727fc41e
AM		 3013 {
3014 const struct powerpc_operand *operand;
3015
3016 operand = &powerpc_operands[fixups[i].opindex];
3017 fix_new_exp (frag_now,
3018 f - frag_now->fr_literal,
3019 4,
3020 &fixups[i].exp,
3021 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3022 ((bfd_reloc_code_real_type)
3023 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3024 }
252b5132
RH		 3025 }
3026}
3027
3028/* Handle a macro. Gather all the operands, transform them as
3029 described by the macro, and call md_assemble recursively. All the
3030 operands are separated by commas; we don't accept parentheses
3031 around operands here. */
3032
3033static void
98027b10 3034ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3035{
3036 char *operands[10];
3037 unsigned int count;
3038 char *s;
3039 unsigned int len;
3040 const char *format;
db557034 3041 unsigned int arg;
252b5132
RH		 3042 char *send;
3043 char *complete;
3044
3045 /* Gather the users operands into the operands array. */
3046 count = 0;
3047 s = str;
3048 while (1)
3049 {
3050 if (count >= sizeof operands / sizeof operands[0])
3051 break;
3052 operands[count++] = s;
3053 s = strchr (s, ',');
3054 if (s == (char *) NULL)
3055 break;
3056 *s++ = '\0';
81d4177b 3057 }
252b5132
RH		 3058
3059 if (count != macro->operands)
3060 {
3061 as_bad (_("wrong number of operands"));
3062 return;
3063 }
3064
3065 /* Work out how large the string must be (the size is unbounded
3066 because it includes user input). */
3067 len = 0;
3068 format = macro->format;
3069 while (*format != '\0')
3070 {
3071 if (*format != '%')
3072 {
3073 ++len;
3074 ++format;
3075 }
3076 else
3077 {
3078 arg = strtol (format + 1, &send, 10);
db557034 3079 know (send != format && arg < count);
252b5132
RH		 3080 len += strlen (operands[arg]);
3081 format = send;
3082 }
3083 }
3084
3085 /* Put the string together. */
3086 complete = s = (char *) alloca (len + 1);
3087 format = macro->format;
3088 while (*format != '\0')
3089 {
3090 if (*format != '%')
3091 *s++ = *format++;
3092 else
3093 {
3094 arg = strtol (format + 1, &send, 10);
3095 strcpy (s, operands[arg]);
3096 s += strlen (s);
3097 format = send;
3098 }
3099 }
3100 *s = '\0';
3101
3102 /* Assemble the constructed instruction. */
3103 md_assemble (complete);
81d4177b 3104}
252b5132
RH		 3105\f
3106#ifdef OBJ_ELF
18ae9cc1 3107/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3108
3109int
98027b10 3110ppc_section_type (char *str, size_t len)
252b5132 3111{
9de8d8f1
RH		 3112 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3113 return SHT_ORDERED;
252b5132 3114
9de8d8f1 3115 return -1;
252b5132
RH		 3116}
3117
3118int
1239de13 3119ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3120{
3121 if (type == SHT_ORDERED)
3122 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3123
252b5132
RH		 3124 return flags;
3125}
3126#endif /* OBJ_ELF */
3127
3128\f
3129/* Pseudo-op handling. */
3130
3131/* The .byte pseudo-op. This is similar to the normal .byte
3132 pseudo-op, but it can also take a single ASCII string. */
3133
3134static void
98027b10 3135ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3136{
3137 if (*input_line_pointer != '\"')
3138 {
3139 cons (1);
3140 return;
3141 }
3142
3143 /* Gather characters. A real double quote is doubled. Unusual
3144 characters are not permitted. */
3145 ++input_line_pointer;
3146 while (1)
3147 {
3148 char c;
3149
3150 c = *input_line_pointer++;
3151
3152 if (c == '\"')
3153 {
3154 if (*input_line_pointer != '\"')
3155 break;
3156 ++input_line_pointer;
3157 }
3158
3159 FRAG_APPEND_1_CHAR (c);
3160 }
3161
3162 demand_empty_rest_of_line ();
3163}
3164\f
3165#ifdef OBJ_XCOFF
3166
3167/* XCOFF specific pseudo-op handling. */
3168
3169/* This is set if we are creating a .stabx symbol, since we don't want
3170 to handle symbol suffixes for such symbols. */
b34976b6 3171static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3172
3173/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3174 symbols in the .bss segment as though they were local common
67c1ffbe 3175 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3176 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3177
3178static void
98027b10 3179ppc_comm (int lcomm)
252b5132
RH		 3180{
3181 asection *current_seg = now_seg;
3182 subsegT current_subseg = now_subseg;
3183 char *name;
3184 char endc;
3185 char *end_name;
3186 offsetT size;
3187 offsetT align;
3188 symbolS *lcomm_sym = NULL;
3189 symbolS *sym;
3190 char *pfrag;
3191
3192 name = input_line_pointer;
3193 endc = get_symbol_end ();
3194 end_name = input_line_pointer;
3195 *end_name = endc;
3196
3197 if (*input_line_pointer != ',')
3198 {
3199 as_bad (_("missing size"));
3200 ignore_rest_of_line ();
3201 return;
3202 }
3203 ++input_line_pointer;
3204
3205 size = get_absolute_expression ();
3206 if (size < 0)
3207 {
3208 as_bad (_("negative size"));
3209 ignore_rest_of_line ();
3210 return;
3211 }
3212
3213 if (! lcomm)
3214 {
3215 /* The third argument to .comm is the alignment. */
3216 if (*input_line_pointer != ',')
1ad63b2f 3217 align = 2;
252b5132
RH		 3218 else
3219 {
3220 ++input_line_pointer;
3221 align = get_absolute_expression ();
3222 if (align <= 0)
3223 {
3224 as_warn (_("ignoring bad alignment"));
1ad63b2f 3225 align = 2;
252b5132
RH		 3226 }
3227 }
3228 }
3229 else
3230 {
3231 char *lcomm_name;
3232 char lcomm_endc;
3233
1ad63b2f 3234 if (size <= 4)
252b5132
RH		 3235 align = 2;
3236 else
3237 align = 3;
3238
3239 /* The third argument to .lcomm appears to be the real local
3240 common symbol to create. References to the symbol named in
3241 the first argument are turned into references to the third
3242 argument. */
3243 if (*input_line_pointer != ',')
3244 {
3245 as_bad (_("missing real symbol name"));
3246 ignore_rest_of_line ();
3247 return;
3248 }
3249 ++input_line_pointer;
3250
3251 lcomm_name = input_line_pointer;
3252 lcomm_endc = get_symbol_end ();
81d4177b 3253
252b5132
RH		 3254 lcomm_sym = symbol_find_or_make (lcomm_name);
3255
3256 *input_line_pointer = lcomm_endc;
3257 }
3258
3259 *end_name = '\0';
3260 sym = symbol_find_or_make (name);
3261 *end_name = endc;
3262
3263 if (S_IS_DEFINED (sym)
3264 || S_GET_VALUE (sym) != 0)
3265 {
3266 as_bad (_("attempt to redefine symbol"));
3267 ignore_rest_of_line ();
3268 return;
3269 }
81d4177b 3270
252b5132 3271 record_alignment (bss_section, align);
81d4177b 3272
252b5132
RH		 3273 if (! lcomm
3274 || ! S_IS_DEFINED (lcomm_sym))
3275 {
3276 symbolS *def_sym;
3277 offsetT def_size;
3278
3279 if (! lcomm)
3280 {
3281 def_sym = sym;
3282 def_size = size;
3283 S_SET_EXTERNAL (sym);
3284 }
3285 else
3286 {
809ffe0d 3287 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3288 def_sym = lcomm_sym;
3289 def_size = 0;
3290 }
3291
3292 subseg_set (bss_section, 1);
3293 frag_align (align, 0, 0);
81d4177b 3294
809ffe0d 3295 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3296 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3297 def_size, (char *) NULL);
3298 *pfrag = 0;
3299 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3300 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3301 }
3302 else if (lcomm)
3303 {
3304 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3305 symbol_get_frag (lcomm_sym)->fr_offset =
3306 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3307 &~ ((1 << align) - 1));
809ffe0d
ILT		 3308 if (align > symbol_get_tc (lcomm_sym)->align)
3309 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3310 }
3311
3312 if (lcomm)
3313 {
3314 /* Make sym an offset from lcomm_sym. */
3315 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3316 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3317 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3318 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3319 }
3320
3321 subseg_set (current_seg, current_subseg);
3322
3323 demand_empty_rest_of_line ();
3324}
3325
3326/* The .csect pseudo-op. This switches us into a different
3327 subsegment. The first argument is a symbol whose value is the
3328 start of the .csect. In COFF, csect symbols get special aux
3329 entries defined by the x_csect field of union internal_auxent. The
3330 optional second argument is the alignment (the default is 2). */
3331
3332static void
98027b10 3333ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3334{
3335 char *name;
3336 char endc;
3337 symbolS *sym;
931e13a6 3338 offsetT align;
252b5132
RH		 3339
3340 name = input_line_pointer;
3341 endc = get_symbol_end ();
81d4177b 3342
252b5132
RH		 3343 sym = symbol_find_or_make (name);
3344
3345 *input_line_pointer = endc;
3346
3347 if (S_GET_NAME (sym)[0] == '\0')
3348 {
3349 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3350 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3351 }
3352
931e13a6 3353 align = 2;
252b5132
RH		 3354 if (*input_line_pointer == ',')
3355 {
3356 ++input_line_pointer;
931e13a6 3357 align = get_absolute_expression ();
252b5132
RH		 3358 }
3359
931e13a6
AM		 3360 ppc_change_csect (sym, align);
3361
252b5132
RH		 3362 demand_empty_rest_of_line ();
3363}
3364
3365/* Change to a different csect. */
3366
3367static void
98027b10 3368ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3369{
3370 if (S_IS_DEFINED (sym))
809ffe0d 3371 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3372 else
3373 {
3374 symbolS **list_ptr;
3375 int after_toc;
3376 int hold_chunksize;
3377 symbolS *list;
931e13a6
AM		 3378 int is_code;
3379 segT sec;
252b5132
RH		 3380
3381 /* This is a new csect. We need to look at the symbol class to
3382 figure out whether it should go in the text section or the
3383 data section. */
3384 after_toc = 0;
931e13a6 3385 is_code = 0;
96d56e9f 3386 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3387 {
3388 case XMC_PR:
3389 case XMC_RO:
3390 case XMC_DB:
3391 case XMC_GL:
3392 case XMC_XO:
3393 case XMC_SV:
3394 case XMC_TI:
3395 case XMC_TB:
3396 S_SET_SEGMENT (sym, text_section);
809ffe0d 3397 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3398 ++ppc_text_subsegment;
3399 list_ptr = &ppc_text_csects;
931e13a6 3400 is_code = 1;
252b5132
RH		 3401 break;
3402 case XMC_RW:
3403 case XMC_TC0:
3404 case XMC_TC:
3405 case XMC_DS:
3406 case XMC_UA:
3407 case XMC_BS:
3408 case XMC_UC:
3409 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3410 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3411 == ppc_data_subsegment))
252b5132
RH		 3412 after_toc = 1;
3413 S_SET_SEGMENT (sym, data_section);
809ffe0d 3414 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3415 ++ppc_data_subsegment;
3416 list_ptr = &ppc_data_csects;
3417 break;
3418 default:
3419 abort ();
3420 }
3421
3422 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3423 changing subsegments, so that we don't use a lot of memory
3424 space for what may be a small section. */
252b5132
RH		 3425 hold_chunksize = chunksize;
3426 chunksize = 64;
3427
931e13a6
AM		 3428 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3429 symbol_get_tc (sym)->subseg);
252b5132
RH		 3430
3431 chunksize = hold_chunksize;
3432
3433 if (after_toc)
3434 ppc_after_toc_frag = frag_now;
3435
931e13a6
AM		 3436 record_alignment (sec, align);
3437 if (is_code)
3438 frag_align_code (align, 0);
3439 else
3440 frag_align (align, 0, 0);
3441
809ffe0d 3442 symbol_set_frag (sym, frag_now);
252b5132
RH		 3443 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3444
931e13a6 3445 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3446 symbol_get_tc (sym)->output = 1;
3447 symbol_get_tc (sym)->within = sym;
81d4177b 3448
252b5132 3449 for (list = *list_ptr;
809ffe0d
ILT		 3450 symbol_get_tc (list)->next != (symbolS *) NULL;
3451 list = symbol_get_tc (list)->next)
252b5132 3452 ;
809ffe0d 3453 symbol_get_tc (list)->next = sym;
81d4177b 3454
252b5132 3455 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3456 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3457 &symbol_lastP);
252b5132
RH		 3458 }
3459
3460 ppc_current_csect = sym;
3461}
3462
3463/* This function handles the .text and .data pseudo-ops. These
3464 pseudo-ops aren't really used by XCOFF; we implement them for the
3465 convenience of people who aren't used to XCOFF. */
3466
3467static void
98027b10 3468ppc_section (int type)
252b5132
RH		 3469{
3470 const char *name;
3471 symbolS *sym;
3472
3473 if (type == 't')
3474 name = ".text[PR]";
3475 else if (type == 'd')
3476 name = ".data[RW]";
3477 else
3478 abort ();
3479
3480 sym = symbol_find_or_make (name);
3481
931e13a6 3482 ppc_change_csect (sym, 2);
252b5132
RH		 3483
3484 demand_empty_rest_of_line ();
3485}
3486
3487/* This function handles the .section pseudo-op. This is mostly to
3488 give an error, since XCOFF only supports .text, .data and .bss, but
3489 we do permit the user to name the text or data section. */
3490
3491static void
98027b10 3492ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3493{
3494 char *user_name;
3495 const char *real_name;
3496 char c;
3497 symbolS *sym;
3498
3499 user_name = input_line_pointer;
3500 c = get_symbol_end ();
3501
3502 if (strcmp (user_name, ".text") == 0)
3503 real_name = ".text[PR]";
3504 else if (strcmp (user_name, ".data") == 0)
3505 real_name = ".data[RW]";
3506 else
3507 {
3508 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3509 *input_line_pointer = c;
3510 ignore_rest_of_line ();
3511 return;
3512 }
3513
3514 *input_line_pointer = c;
3515
3516 sym = symbol_find_or_make (real_name);
3517
931e13a6 3518 ppc_change_csect (sym, 2);
252b5132
RH		 3519
3520 demand_empty_rest_of_line ();
3521}
3522
3523/* The .extern pseudo-op. We create an undefined symbol. */
3524
3525static void
98027b10 3526ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3527{
3528 char *name;
3529 char endc;
3530
3531 name = input_line_pointer;
3532 endc = get_symbol_end ();
3533
3534 (void) symbol_find_or_make (name);
3535
3536 *input_line_pointer = endc;
3537
3538 demand_empty_rest_of_line ();
3539}
3540
3541/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3542
3543static void
98027b10 3544ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3545{
3546 char *name;
3547 char endc;
3548 symbolS *sym;
3549
3550 name = input_line_pointer;
3551 endc = get_symbol_end ();
3552
3553 sym = symbol_find_or_make (name);
3554
3555 *input_line_pointer = endc;
3556
809ffe0d 3557 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3558
3559 demand_empty_rest_of_line ();
3560}
3561
c865e45b
RS		 3562/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3563 relocations at the beginning of the current csect.
3564
3565 (In principle, there's no reason why the relocations _have_ to be at
3566 the beginning. Anywhere in the csect would do. However, inserting
3567 at the beginning is what the native assmebler does, and it helps to
3568 deal with cases where the .ref statements follow the section contents.)
3569
3570 ??? .refs don't work for empty .csects. However, the native assembler
3571 doesn't report an error in this case, and neither yet do we. */
3572
3573static void
3574ppc_ref (int ignore ATTRIBUTE_UNUSED)
3575{
3576 char *name;
3577 char c;
3578
3579 if (ppc_current_csect == NULL)
3580 {
3581 as_bad (_(".ref outside .csect"));
3582 ignore_rest_of_line ();
3583 return;
3584 }
3585
3586 do
3587 {
3588 name = input_line_pointer;
3589 c = get_symbol_end ();
3590
3591 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3592 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3593
3594 *input_line_pointer = c;
3595 SKIP_WHITESPACE ();
3596 c = *input_line_pointer;
3597 if (c == ',')
3598 {
3599 input_line_pointer++;
3600 SKIP_WHITESPACE ();
3601 if (is_end_of_line[(unsigned char) *input_line_pointer])
3602 {
3603 as_bad (_("missing symbol name"));
3604 ignore_rest_of_line ();
3605 return;
3606 }
3607 }
3608 }
3609 while (c == ',');
3610
3611 demand_empty_rest_of_line ();
3612}
3613
252b5132
RH		 3614/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3615 although I don't know why it bothers. */
3616
3617static void
98027b10 3618ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3619{
3620 char *name;
3621 char endc;
3622 symbolS *sym;
3623 int len;
3624
3625 name = input_line_pointer;
3626 endc = get_symbol_end ();
3627
3628 sym = symbol_find_or_make (name);
3629
3630 *input_line_pointer = endc;
3631
3632 if (*input_line_pointer != ',')
3633 {
3634 as_bad (_("missing rename string"));
3635 ignore_rest_of_line ();
3636 return;
3637 }
3638 ++input_line_pointer;
3639
809ffe0d 3640 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3641
3642 demand_empty_rest_of_line ();
3643}
3644
3645/* The .stabx pseudo-op. This is similar to a normal .stabs
3646 pseudo-op, but slightly different. A sample is
3647 .stabx "main:F-1",.main,142,0
3648 The first argument is the symbol name to create. The second is the
3649 value, and the third is the storage class. The fourth seems to be
3650 always zero, and I am assuming it is the type. */
3651
3652static void
98027b10 3653ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3654{
3655 char *name;
3656 int len;
3657 symbolS *sym;
3658 expressionS exp;
3659
3660 name = demand_copy_C_string (&len);
3661
3662 if (*input_line_pointer != ',')
3663 {
3664 as_bad (_("missing value"));
3665 return;
3666 }
3667 ++input_line_pointer;
3668
b34976b6 3669 ppc_stab_symbol = TRUE;
252b5132 3670 sym = symbol_make (name);
b34976b6 3671 ppc_stab_symbol = FALSE;
252b5132 3672
809ffe0d 3673 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3674
3675 (void) expression (&exp);
3676
3677 switch (exp.X_op)
3678 {
3679 case O_illegal:
3680 case O_absent:
3681 case O_big:
3682 as_bad (_("illegal .stabx expression; zero assumed"));
3683 exp.X_add_number = 0;
3684 /* Fall through. */
3685 case O_constant:
3686 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3687 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3688 break;
3689
3690 case O_symbol:
3691 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3692 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3693 else
3694 {
3695 S_SET_VALUE (sym,
3696 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3697 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3698 }
3699 break;
3700
3701 default:
3702 /* The value is some complex expression. This will probably
99a814a1
AM		 3703 fail at some later point, but this is probably the right
3704 thing to do here. */
809ffe0d 3705 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3706 break;
3707 }
3708
3709 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3710 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3711
3712 if (*input_line_pointer != ',')
3713 {
3714 as_bad (_("missing class"));
3715 return;
3716 }
3717 ++input_line_pointer;
3718
3719 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3720
3721 if (*input_line_pointer != ',')
3722 {
3723 as_bad (_("missing type"));
3724 return;
3725 }
3726 ++input_line_pointer;
3727
3728 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3729
809ffe0d 3730 symbol_get_tc (sym)->output = 1;
252b5132 3731
6877bb43 3732 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3733
809ffe0d 3734 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3735
41ea10b1 3736 /* In this case :
99a814a1 3737
41ea10b1
TR		 3738 .bs name
3739 .stabx "z",arrays_,133,0
3740 .es
99a814a1 3741
41ea10b1 3742 .comm arrays_,13768,3
99a814a1 3743
41ea10b1
TR		 3744 resolve_symbol_value will copy the exp's "within" into sym's when the
3745 offset is 0. Since this seems to be corner case problem,
3746 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3747 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3748
3749 if (exp.X_op == O_symbol)
41ea10b1
TR		 3750 {
3751 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3752 }
6877bb43 3753 }
99a814a1 3754
252b5132
RH		 3755 if (exp.X_op != O_symbol
3756 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3757 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3758 ppc_frob_label (sym);
3759 else
3760 {
3761 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3762 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3763 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3764 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3765 }
3766
3767 demand_empty_rest_of_line ();
3768}
3769
3770/* The .function pseudo-op. This takes several arguments. The first
3771 argument seems to be the external name of the symbol. The second
67c1ffbe 3772 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3773 uses the same name for both. I have no idea what the third and
3774 fourth arguments are meant to be. The optional fifth argument is
3775 an expression for the size of the function. In COFF this symbol
3776 gets an aux entry like that used for a csect. */
3777
3778static void
98027b10 3779ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3780{
3781 char *name;
3782 char endc;
3783 char *s;
3784 symbolS *ext_sym;
3785 symbolS *lab_sym;
3786
3787 name = input_line_pointer;
3788 endc = get_symbol_end ();
3789
3790 /* Ignore any [PR] suffix. */
3791 name = ppc_canonicalize_symbol_name (name);
3792 s = strchr (name, '[');
3793 if (s != (char *) NULL
3794 && strcmp (s + 1, "PR]") == 0)
3795 *s = '\0';
3796
3797 ext_sym = symbol_find_or_make (name);
3798
3799 *input_line_pointer = endc;
3800
3801 if (*input_line_pointer != ',')
3802 {
3803 as_bad (_("missing symbol name"));
3804 ignore_rest_of_line ();
3805 return;
3806 }
3807 ++input_line_pointer;
3808
3809 name = input_line_pointer;
3810 endc = get_symbol_end ();
3811
3812 lab_sym = symbol_find_or_make (name);
3813
3814 *input_line_pointer = endc;
3815
3816 if (ext_sym != lab_sym)
3817 {
809ffe0d
ILT		 3818 expressionS exp;
3819
3820 exp.X_op = O_symbol;
3821 exp.X_add_symbol = lab_sym;
3822 exp.X_op_symbol = NULL;
3823 exp.X_add_number = 0;
3824 exp.X_unsigned = 0;
3825 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3826 }
3827
96d56e9f
NC		 3828 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3829 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3830 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3831
3832 if (*input_line_pointer == ',')
3833 {
91d6fa6a 3834 expressionS exp;
252b5132
RH		 3835
3836 /* Ignore the third argument. */
3837 ++input_line_pointer;
91d6fa6a 3838 expression (& exp);
252b5132
RH		 3839 if (*input_line_pointer == ',')
3840 {
3841 /* Ignore the fourth argument. */
3842 ++input_line_pointer;
91d6fa6a 3843 expression (& exp);
252b5132
RH		 3844 if (*input_line_pointer == ',')
3845 {
3846 /* The fifth argument is the function size. */
3847 ++input_line_pointer;
809ffe0d
ILT		 3848 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3849 absolute_section,
3850 (valueT) 0,
3851 &zero_address_frag);
3852 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3853 }
3854 }
3855 }
3856
3857 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3858 SF_SET_FUNCTION (ext_sym);
3859 SF_SET_PROCESS (ext_sym);
3860 coff_add_linesym (ext_sym);
3861
3862 demand_empty_rest_of_line ();
3863}
3864
3865/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3866 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3867 with the correct line number */
5d6255fe 3868
8642cce8 3869static symbolS *saved_bi_sym = 0;
252b5132
RH		 3870
3871static void
98027b10 3872ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3873{
3874 symbolS *sym;
3875
3876 sym = symbol_make (".bf");
3877 S_SET_SEGMENT (sym, text_section);
809ffe0d 3878 symbol_set_frag (sym, frag_now);
252b5132
RH		 3879 S_SET_VALUE (sym, frag_now_fix ());
3880 S_SET_STORAGE_CLASS (sym, C_FCN);
3881
3882 coff_line_base = get_absolute_expression ();
3883
3884 S_SET_NUMBER_AUXILIARY (sym, 1);
3885 SA_SET_SYM_LNNO (sym, coff_line_base);
3886
8642cce8 3887 /* Line number for bi. */
5d6255fe 3888 if (saved_bi_sym)
8642cce8
TR		 3889 {
3890 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3891 saved_bi_sym = 0;
3892 }
5d6255fe 3893
8642cce8 3894
809ffe0d 3895 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3896
3897 ppc_frob_label (sym);
3898
3899 demand_empty_rest_of_line ();
3900}
3901
3902/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3903 ".ef", except that the line number is absolute, not relative to the
3904 most recent ".bf" symbol. */
3905
3906static void
98027b10 3907ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3908{
3909 symbolS *sym;
3910
3911 sym = symbol_make (".ef");
3912 S_SET_SEGMENT (sym, text_section);
809ffe0d 3913 symbol_set_frag (sym, frag_now);
252b5132
RH		 3914 S_SET_VALUE (sym, frag_now_fix ());
3915 S_SET_STORAGE_CLASS (sym, C_FCN);
3916 S_SET_NUMBER_AUXILIARY (sym, 1);
3917 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3918 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3919
3920 ppc_frob_label (sym);
3921
3922 demand_empty_rest_of_line ();
3923}
3924
3925/* The .bi and .ei pseudo-ops. These take a string argument and
3926 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3927 the symbol list. The value of .bi will be know when the next .bf
3928 is encountered. */
252b5132
RH		 3929
3930static void
98027b10 3931ppc_biei (int ei)
252b5132
RH		 3932{
3933 static symbolS *last_biei;
3934
3935 char *name;
3936 int len;
3937 symbolS *sym;
3938 symbolS *look;
3939
3940 name = demand_copy_C_string (&len);
3941
3942 /* The value of these symbols is actually file offset. Here we set
3943 the value to the index into the line number entries. In
3944 ppc_frob_symbols we set the fix_line field, which will cause BFD
3945 to do the right thing. */
3946
3947 sym = symbol_make (name);
3948 /* obj-coff.c currently only handles line numbers correctly in the
3949 .text section. */
3950 S_SET_SEGMENT (sym, text_section);
3951 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3952 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3953
3954 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3955 symbol_get_tc (sym)->output = 1;
81d4177b 3956
8642cce8 3957 /* Save bi. */
5d6255fe 3958 if (ei)
8642cce8
TR		 3959 saved_bi_sym = 0;
3960 else
3961 saved_bi_sym = sym;
3962
252b5132
RH		 3963 for (look = last_biei ? last_biei : symbol_rootP;
3964 (look != (symbolS *) NULL
3965 && (S_GET_STORAGE_CLASS (look) == C_FILE
3966 || S_GET_STORAGE_CLASS (look) == C_BINCL
3967 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3968 look = symbol_next (look))
3969 ;
3970 if (look != (symbolS *) NULL)
3971 {
3972 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3973 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3974 last_biei = sym;
3975 }
3976
3977 demand_empty_rest_of_line ();
3978}
3979
3980/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3981 There is one argument, which is a csect symbol. The value of the
3982 .bs symbol is the index of this csect symbol. */
3983
3984static void
98027b10 3985ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3986{
3987 char *name;
3988 char endc;
3989 symbolS *csect;
3990 symbolS *sym;
3991
3992 if (ppc_current_block != NULL)
3993 as_bad (_("nested .bs blocks"));
3994
3995 name = input_line_pointer;
3996 endc = get_symbol_end ();
3997
3998 csect = symbol_find_or_make (name);
3999
4000 *input_line_pointer = endc;
4001
4002 sym = symbol_make (".bs");
4003 S_SET_SEGMENT (sym, now_seg);
4004 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4005 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4006 symbol_get_tc (sym)->output = 1;
252b5132 4007
809ffe0d 4008 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4009
4010 ppc_frob_label (sym);
4011
4012 ppc_current_block = sym;
4013
4014 demand_empty_rest_of_line ();
4015}
4016
4017/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4018
4019static void
98027b10 4020ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4021{
4022 symbolS *sym;
4023
4024 if (ppc_current_block == NULL)
4025 as_bad (_(".es without preceding .bs"));
4026
4027 sym = symbol_make (".es");
4028 S_SET_SEGMENT (sym, now_seg);
4029 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4030 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4031 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4032
4033 ppc_frob_label (sym);
4034
4035 ppc_current_block = NULL;
4036
4037 demand_empty_rest_of_line ();
4038}
4039
4040/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4041 line number. */
4042
4043static void
98027b10 4044ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4045{
4046 symbolS *sym;
4047
4048 sym = symbol_make (".bb");
4049 S_SET_SEGMENT (sym, text_section);
809ffe0d 4050 symbol_set_frag (sym, frag_now);
252b5132
RH		 4051 S_SET_VALUE (sym, frag_now_fix ());
4052 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4053
4054 S_SET_NUMBER_AUXILIARY (sym, 1);
4055 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4056
809ffe0d 4057 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4058
4059 SF_SET_PROCESS (sym);
4060
4061 ppc_frob_label (sym);
4062
4063 demand_empty_rest_of_line ();
4064}
4065
4066/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4067 line number. */
4068
4069static void
98027b10 4070ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4071{
4072 symbolS *sym;
4073
4074 sym = symbol_make (".eb");
4075 S_SET_SEGMENT (sym, text_section);
809ffe0d 4076 symbol_set_frag (sym, frag_now);
252b5132
RH		 4077 S_SET_VALUE (sym, frag_now_fix ());
4078 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4079 S_SET_NUMBER_AUXILIARY (sym, 1);
4080 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4081 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4082
4083 SF_SET_PROCESS (sym);
4084
4085 ppc_frob_label (sym);
4086
4087 demand_empty_rest_of_line ();
4088}
4089
4090/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4091 specified name. */
4092
4093static void
98027b10 4094ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4095{
4096 char *name;
4097 int len;
4098 symbolS *sym;
4099
4100 name = demand_copy_C_string (&len);
4101 sym = symbol_make (name);
4102 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4103 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4104 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4105 S_SET_VALUE (sym, 0);
809ffe0d 4106 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4107
4108 ppc_frob_label (sym);
4109
4110 demand_empty_rest_of_line ();
4111}
4112
4113/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4114
4115static void
98027b10 4116ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4117{
4118 symbolS *sym;
4119
4120 sym = symbol_make (".ec");
4121 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4122 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4123 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4124 S_SET_VALUE (sym, 0);
809ffe0d 4125 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4126
4127 ppc_frob_label (sym);
4128
4129 demand_empty_rest_of_line ();
4130}
4131
4132/* The .toc pseudo-op. Switch to the .toc subsegment. */
4133
4134static void
98027b10 4135ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4136{
4137 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4138 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4139 else
4140 {
4141 subsegT subseg;
4142 symbolS *sym;
4143 symbolS *list;
81d4177b 4144
252b5132
RH		 4145 subseg = ppc_data_subsegment;
4146 ++ppc_data_subsegment;
4147
4148 subseg_new (segment_name (data_section), subseg);
4149 ppc_toc_frag = frag_now;
4150
4151 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4152 symbol_set_frag (sym, frag_now);
252b5132
RH		 4153 S_SET_SEGMENT (sym, data_section);
4154 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4155 symbol_get_tc (sym)->subseg = subseg;
4156 symbol_get_tc (sym)->output = 1;
4157 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4158
4159 ppc_toc_csect = sym;
81d4177b 4160
252b5132 4161 for (list = ppc_data_csects;
809ffe0d
ILT		 4162 symbol_get_tc (list)->next != (symbolS *) NULL;
4163 list = symbol_get_tc (list)->next)
252b5132 4164 ;
809ffe0d 4165 symbol_get_tc (list)->next = sym;
252b5132
RH		 4166
4167 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4168 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4169 &symbol_lastP);
252b5132
RH		 4170 }
4171
4172 ppc_current_csect = ppc_toc_csect;
4173
4174 demand_empty_rest_of_line ();
4175}
4176
4177/* The AIX assembler automatically aligns the operands of a .long or
4178 .short pseudo-op, and we want to be compatible. */
4179
4180static void
98027b10 4181ppc_xcoff_cons (int log_size)
252b5132
RH		 4182{
4183 frag_align (log_size, 0, 0);
4184 record_alignment (now_seg, log_size);
4185 cons (1 << log_size);
4186}
4187
4188static void
98027b10 4189ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4190{
4191 expressionS exp;
4192 int byte_count;
4193
4194 (void) expression (&exp);
4195
4196 if (exp.X_op != O_constant)
4197 {
4198 as_bad (_("non-constant byte count"));
4199 return;
4200 }
4201
4202 byte_count = exp.X_add_number;
4203
4204 if (*input_line_pointer != ',')
4205 {
4206 as_bad (_("missing value"));
4207 return;
4208 }
4209
4210 ++input_line_pointer;
4211 cons (byte_count);
4212}
4213
4214#endif /* OBJ_XCOFF */
0baf16f2 4215#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4216\f
4217/* The .tc pseudo-op. This is used when generating either XCOFF or
4218 ELF. This takes two or more arguments.
4219
4220 When generating XCOFF output, the first argument is the name to
4221 give to this location in the toc; this will be a symbol with class
0baf16f2 4222 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4223 this location in the TOC; often there is just one more argument, a
1049f94e 4224 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4225 depends on target word size. A 32-bit target uses 4-byte values, a
4226 64-bit target uses 8-byte values.
252b5132
RH		 4227
4228 When not generating XCOFF output, the arguments are the same, but
4229 the first argument is simply ignored. */
4230
4231static void
98027b10 4232ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4233{
4234#ifdef OBJ_XCOFF
4235
4236 /* Define the TOC symbol name. */
4237 {
4238 char *name;
4239 char endc;
4240 symbolS *sym;
4241
4242 if (ppc_toc_csect == (symbolS *) NULL
4243 || ppc_toc_csect != ppc_current_csect)
4244 {
4245 as_bad (_(".tc not in .toc section"));
4246 ignore_rest_of_line ();
4247 return;
4248 }
4249
4250 name = input_line_pointer;
4251 endc = get_symbol_end ();
4252
4253 sym = symbol_find_or_make (name);
4254
4255 *input_line_pointer = endc;
4256
4257 if (S_IS_DEFINED (sym))
4258 {
4259 symbolS *label;
4260
809ffe0d 4261 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4262 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4263 {
4264 as_bad (_(".tc with no label"));
4265 ignore_rest_of_line ();
4266 return;
4267 }
4268
4269 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4270 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4271 S_SET_VALUE (label, S_GET_VALUE (sym));
4272
4273 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4274 ++input_line_pointer;
4275
4276 return;
4277 }
4278
4279 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4280 symbol_set_frag (sym, frag_now);
252b5132 4281 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4282 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4283 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4284
4285 ppc_frob_label (sym);
4286 }
4287
0baf16f2
AM		 4288#endif /* OBJ_XCOFF */
4289#ifdef OBJ_ELF
9c7977b3 4290 int align;
252b5132
RH		 4291
4292 /* Skip the TOC symbol name. */
4293 while (is_part_of_name (*input_line_pointer)
d13d4015 4294 || *input_line_pointer == ' '
252b5132
RH		 4295 || *input_line_pointer == '['
4296 || *input_line_pointer == ']'
4297 || *input_line_pointer == '{'
4298 || *input_line_pointer == '}')
4299 ++input_line_pointer;
4300
0baf16f2 4301 /* Align to a four/eight byte boundary. */
2b3c4602 4302 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4303 frag_align (align, 0, 0);
4304 record_alignment (now_seg, align);
0baf16f2 4305#endif /* OBJ_ELF */
252b5132
RH		 4306
4307 if (*input_line_pointer != ',')
4308 demand_empty_rest_of_line ();
4309 else
4310 {
4311 ++input_line_pointer;
2b3c4602 4312 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4313 }
4314}
0baf16f2
AM		 4315
4316/* Pseudo-op .machine. */
0baf16f2
AM		 4317
4318static void
98027b10 4319ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4320{
69c040df
AM		 4321 char *cpu_string;
4322#define MAX_HISTORY 100
fa452fa6 4323 static ppc_cpu_t *cpu_history;
69c040df
AM		 4324 static int curr_hist;
4325
4326 SKIP_WHITESPACE ();
4327
4328 if (*input_line_pointer == '"')
4329 {
4330 int len;
4331 cpu_string = demand_copy_C_string (&len);
4332 }
4333 else
4334 {
4335 char c;
4336 cpu_string = input_line_pointer;
4337 c = get_symbol_end ();
4338 cpu_string = xstrdup (cpu_string);
4339 *input_line_pointer = c;
4340 }
4341
4342 if (cpu_string != NULL)
4343 {
fa452fa6 4344 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4345 ppc_cpu_t new_cpu;
69c040df
AM		 4346 char *p;
4347
4348 for (p = cpu_string; *p != 0; p++)
4349 *p = TOLOWER (*p);
4350
4351 if (strcmp (cpu_string, "push") == 0)
4352 {
4353 if (cpu_history == NULL)
4354 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4355
4356 if (curr_hist >= MAX_HISTORY)
4357 as_bad (_(".machine stack overflow"));
4358 else
4359 cpu_history[curr_hist++] = ppc_cpu;
4360 }
4361 else if (strcmp (cpu_string, "pop") == 0)
4362 {
4363 if (curr_hist <= 0)
4364 as_bad (_(".machine stack underflow"));
4365 else
4366 ppc_cpu = cpu_history[--curr_hist];
4367 }
69fe9ce5
AM		 4368 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4369 ppc_cpu = new_cpu;
69c040df
AM		 4370 else
4371 as_bad (_("invalid machine `%s'"), cpu_string);
4372
4373 if (ppc_cpu != old_cpu)
4374 ppc_setup_opcodes ();
4375 }
4376
4377 demand_empty_rest_of_line ();
0baf16f2
AM		 4378}
4379
4380/* See whether a symbol is in the TOC section. */
4381
4382static int
98027b10 4383ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4384{
4385#ifdef OBJ_XCOFF
96d56e9f 4386 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4387#endif
4388#ifdef OBJ_ELF
4389 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4390 if (ppc_obj64)
0baf16f2
AM		 4391 return strcmp (sname, ".toc") == 0;
4392 else
4393 return strcmp (sname, ".got") == 0;
4394#endif
4395}
4396#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4397\f
4398#ifdef TE_PE
4399
99a814a1 4400/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4401
4402/* Set the current section. */
4403static void
98027b10 4404ppc_set_current_section (segT new)
252b5132
RH		 4405{
4406 ppc_previous_section = ppc_current_section;
4407 ppc_current_section = new;
4408}
4409
4410/* pseudo-op: .previous
4411 behaviour: toggles the current section with the previous section.
4412 errors: None
99a814a1
AM		 4413 warnings: "No previous section" */
4414
252b5132 4415static void
98027b10 4416ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4417{
4418 symbolS *tmp;
4419
81d4177b 4420 if (ppc_previous_section == NULL)
252b5132 4421 {
99a814a1 4422 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4423 return;
4424 }
4425
99a814a1 4426 subseg_set (ppc_previous_section, 0);
252b5132 4427
99a814a1 4428 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4429}
4430
4431/* pseudo-op: .pdata
4432 behaviour: predefined read only data section
b34976b6 4433 double word aligned
252b5132
RH		 4434 errors: None
4435 warnings: None
4436 initial: .section .pdata "adr3"
b34976b6 4437 a - don't know -- maybe a misprint
252b5132
RH		 4438 d - initialized data
4439 r - readable
4440 3 - double word aligned (that would be 4 byte boundary)
4441
4442 commentary:
4443 Tag index tables (also known as the function table) for exception
99a814a1 4444 handling, debugging, etc. */
252b5132 4445
252b5132 4446static void
98027b10 4447ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4448{
81d4177b 4449 if (pdata_section == 0)
252b5132
RH		 4450 {
4451 pdata_section = subseg_new (".pdata", 0);
81d4177b 4452
252b5132
RH		 4453 bfd_set_section_flags (stdoutput, pdata_section,
4454 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4455 | SEC_READONLY | SEC_DATA ));
81d4177b 4456
252b5132
RH		 4457 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4458 }
4459 else
4460 {
99a814a1 4461 pdata_section = subseg_new (".pdata", 0);
252b5132 4462 }
99a814a1 4463 ppc_set_current_section (pdata_section);
252b5132
RH		 4464}
4465
4466/* pseudo-op: .ydata
4467 behaviour: predefined read only data section
b34976b6 4468 double word aligned
252b5132
RH		 4469 errors: None
4470 warnings: None
4471 initial: .section .ydata "drw3"
b34976b6 4472 a - don't know -- maybe a misprint
252b5132
RH		 4473 d - initialized data
4474 r - readable
4475 3 - double word aligned (that would be 4 byte boundary)
4476 commentary:
4477 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4478 debugging, etc. */
4479
252b5132 4480static void
98027b10 4481ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4482{
81d4177b 4483 if (ydata_section == 0)
252b5132
RH		 4484 {
4485 ydata_section = subseg_new (".ydata", 0);
4486 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4487 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4488 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4489
4490 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4491 }
4492 else
4493 {
4494 ydata_section = subseg_new (".ydata", 0);
4495 }
99a814a1 4496 ppc_set_current_section (ydata_section);
252b5132
RH		 4497}
4498
4499/* pseudo-op: .reldata
4500 behaviour: predefined read write data section
b34976b6 4501 double word aligned (4-byte)
252b5132
RH		 4502 FIXME: relocation is applied to it
4503 FIXME: what's the difference between this and .data?
4504 errors: None
4505 warnings: None
4506 initial: .section .reldata "drw3"
4507 d - initialized data
4508 r - readable
4509 w - writeable
4510 3 - double word aligned (that would be 8 byte boundary)
4511
4512 commentary:
4513 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4514 function descriptors, etc. */
4515
252b5132 4516static void
98027b10 4517ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4518{
4519 if (reldata_section == 0)
4520 {
4521 reldata_section = subseg_new (".reldata", 0);
4522
4523 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4524 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4525 | SEC_DATA));
252b5132
RH		 4526
4527 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4528 }
4529 else
4530 {
4531 reldata_section = subseg_new (".reldata", 0);
4532 }
99a814a1 4533 ppc_set_current_section (reldata_section);
252b5132
RH		 4534}
4535
4536/* pseudo-op: .rdata
4537 behaviour: predefined read only data section
b34976b6 4538 double word aligned
252b5132
RH		 4539 errors: None
4540 warnings: None
4541 initial: .section .rdata "dr3"
4542 d - initialized data
4543 r - readable
99a814a1
AM		 4544 3 - double word aligned (that would be 4 byte boundary) */
4545
252b5132 4546static void
98027b10 4547ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4548{
4549 if (rdata_section == 0)
4550 {
4551 rdata_section = subseg_new (".rdata", 0);
4552 bfd_set_section_flags (stdoutput, rdata_section,
4553 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4554 | SEC_READONLY | SEC_DATA ));
4555
4556 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4557 }
4558 else
4559 {
4560 rdata_section = subseg_new (".rdata", 0);
4561 }
99a814a1 4562 ppc_set_current_section (rdata_section);
252b5132
RH		 4563}
4564
4565/* pseudo-op: .ualong
81d4177b 4566 behaviour: much like .int, with the exception that no alignment is
b34976b6 4567 performed.
252b5132
RH		 4568 FIXME: test the alignment statement
4569 errors: None
99a814a1
AM		 4570 warnings: None */
4571
252b5132 4572static void
98027b10 4573ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4574{
99a814a1
AM		 4575 /* Try for long. */
4576 cons (4);
252b5132
RH		 4577}
4578
4579/* pseudo-op: .znop <symbol name>
4580 behaviour: Issue a nop instruction
b34976b6 4581 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4582 the supplied symbol name.
4583 errors: None
99a814a1
AM		 4584 warnings: Missing symbol name */
4585
252b5132 4586static void
98027b10 4587ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4588{
4589 unsigned long insn;
4590 const struct powerpc_opcode *opcode;
4591 expressionS ex;
4592 char *f;
252b5132 4593 symbolS *sym;
252b5132
RH		 4594 char *symbol_name;
4595 char c;
4596 char *name;
4597 unsigned int exp;
4598 flagword flags;
4599 asection *sec;
4600
99a814a1 4601 /* Strip out the symbol name. */
252b5132
RH		 4602 symbol_name = input_line_pointer;
4603 c = get_symbol_end ();
4604
4605 name = xmalloc (input_line_pointer - symbol_name + 1);
4606 strcpy (name, symbol_name);
4607
4608 sym = symbol_find_or_make (name);
4609
4610 *input_line_pointer = c;
4611
4612 SKIP_WHITESPACE ();
4613
4614 /* Look up the opcode in the hash table. */
4615 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4616
99a814a1 4617 /* Stick in the nop. */
252b5132
RH		 4618 insn = opcode->opcode;
4619
4620 /* Write out the instruction. */
4621 f = frag_more (4);
4622 md_number_to_chars (f, insn, 4);
4623 fix_new (frag_now,
4624 f - frag_now->fr_literal,
4625 4,
4626 sym,
4627 0,
4628 0,
4629 BFD_RELOC_16_GOT_PCREL);
4630
4631}
4632
81d4177b
KH		 4633/* pseudo-op:
4634 behaviour:
4635 errors:
99a814a1
AM		 4636 warnings: */
4637
252b5132 4638static void
98027b10 4639ppc_pe_comm (int lcomm)
252b5132 4640{
98027b10
AM		 4641 char *name;
4642 char c;
4643 char *p;
252b5132 4644 offsetT temp;
98027b10 4645 symbolS *symbolP;
252b5132
RH		 4646 offsetT align;
4647
4648 name = input_line_pointer;
4649 c = get_symbol_end ();
4650
99a814a1 4651 /* just after name is now '\0'. */
252b5132
RH		 4652 p = input_line_pointer;
4653 *p = c;
4654 SKIP_WHITESPACE ();
4655 if (*input_line_pointer != ',')
4656 {
4657 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4658 ignore_rest_of_line ();
4659 return;
4660 }
4661
4662 input_line_pointer++; /* skip ',' */
4663 if ((temp = get_absolute_expression ()) < 0)
4664 {
4665 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4666 ignore_rest_of_line ();
4667 return;
4668 }
4669
4670 if (! lcomm)
4671 {
4672 /* The third argument to .comm is the alignment. */
4673 if (*input_line_pointer != ',')
4674 align = 3;
4675 else
4676 {
4677 ++input_line_pointer;
4678 align = get_absolute_expression ();
4679 if (align <= 0)
4680 {
4681 as_warn (_("ignoring bad alignment"));
4682 align = 3;
4683 }
4684 }
4685 }
4686
4687 *p = 0;
4688 symbolP = symbol_find_or_make (name);
4689
4690 *p = c;
4691 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4692 {
4693 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4694 S_GET_NAME (symbolP));
4695 ignore_rest_of_line ();
4696 return;
4697 }
4698
4699 if (S_GET_VALUE (symbolP))
4700 {
4701 if (S_GET_VALUE (symbolP) != (valueT) temp)
4702 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4703 S_GET_NAME (symbolP),
4704 (long) S_GET_VALUE (symbolP),
4705 (long) temp);
4706 }
4707 else
4708 {
4709 S_SET_VALUE (symbolP, (valueT) temp);
4710 S_SET_EXTERNAL (symbolP);
86ebace2 4711 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4712 }
4713
4714 demand_empty_rest_of_line ();
4715}
4716
4717/*
4718 * implement the .section pseudo op:
4719 * .section name {, "flags"}
4720 * ^ ^
4721 * | +--- optional flags: 'b' for bss
4722 * | 'i' for info
4723 * +-- section name 'l' for lib
4724 * 'n' for noload
4725 * 'o' for over
4726 * 'w' for data
4727 * 'd' (apparently m88k for data)
4728 * 'x' for text
4729 * But if the argument is not a quoted string, treat it as a
4730 * subsegment number.
4731 *
4732 * FIXME: this is a copy of the section processing from obj-coff.c, with
4733 * additions/changes for the moto-pas assembler support. There are three
4734 * categories:
4735 *
81d4177b 4736 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4737 * setting bits that bfd probably neither understands or uses. The
4738 * correct approach (?) will have to incorporate extra fields attached
4739 * to the section to hold the system specific stuff. (krk)
4740 *
4741 * Section Contents:
4742 * 'a' - unknown - referred to in documentation, but no definition supplied
4743 * 'c' - section has code
4744 * 'd' - section has initialized data
4745 * 'u' - section has uninitialized data
4746 * 'i' - section contains directives (info)
4747 * 'n' - section can be discarded
4748 * 'R' - remove section at link time
4749 *
4750 * Section Protection:
4751 * 'r' - section is readable
4752 * 'w' - section is writeable
4753 * 'x' - section is executable
4754 * 's' - section is sharable
4755 *
4756 * Section Alignment:
4757 * '0' - align to byte boundary
4758 * '1' - align to halfword undary
4759 * '2' - align to word boundary
4760 * '3' - align to doubleword boundary
4761 * '4' - align to quadword boundary
4762 * '5' - align to 32 byte boundary
4763 * '6' - align to 64 byte boundary
4764 *
4765 */
4766
4767void
98027b10 4768ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4769{
99a814a1 4770 /* Strip out the section name. */
252b5132
RH		 4771 char *section_name;
4772 char c;
4773 char *name;
4774 unsigned int exp;
4775 flagword flags;
4776 segT sec;
4777 int align;
4778
4779 section_name = input_line_pointer;
4780 c = get_symbol_end ();
4781
4782 name = xmalloc (input_line_pointer - section_name + 1);
4783 strcpy (name, section_name);
4784
4785 *input_line_pointer = c;
4786
4787 SKIP_WHITESPACE ();
4788
4789 exp = 0;
4790 flags = SEC_NO_FLAGS;
4791
4792 if (strcmp (name, ".idata$2") == 0)
4793 {
4794 align = 0;
4795 }
4796 else if (strcmp (name, ".idata$3") == 0)
4797 {
4798 align = 0;
4799 }
4800 else if (strcmp (name, ".idata$4") == 0)
4801 {
4802 align = 2;
4803 }
4804 else if (strcmp (name, ".idata$5") == 0)
4805 {
4806 align = 2;
4807 }
4808 else if (strcmp (name, ".idata$6") == 0)
4809 {
4810 align = 1;
4811 }
4812 else
99a814a1
AM		 4813 /* Default alignment to 16 byte boundary. */
4814 align = 4;
252b5132
RH		 4815
4816 if (*input_line_pointer == ',')
4817 {
4818 ++input_line_pointer;
4819 SKIP_WHITESPACE ();
4820 if (*input_line_pointer != '"')
4821 exp = get_absolute_expression ();
4822 else
4823 {
4824 ++input_line_pointer;
4825 while (*input_line_pointer != '"'
4826 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4827 {
4828 switch (*input_line_pointer)
4829 {
4830 /* Section Contents */
4831 case 'a': /* unknown */
4832 as_bad (_("Unsupported section attribute -- 'a'"));
4833 break;
4834 case 'c': /* code section */
81d4177b 4835 flags |= SEC_CODE;
252b5132
RH		 4836 break;
4837 case 'd': /* section has initialized data */
4838 flags |= SEC_DATA;
4839 break;
4840 case 'u': /* section has uninitialized data */
4841 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4842 in winnt.h */
4843 flags |= SEC_ROM;
4844 break;
4845 case 'i': /* section contains directives (info) */
4846 /* FIXME: This is IMAGE_SCN_LNK_INFO
4847 in winnt.h */
4848 flags |= SEC_HAS_CONTENTS;
4849 break;
4850 case 'n': /* section can be discarded */
81d4177b 4851 flags &=~ SEC_LOAD;
252b5132
RH		 4852 break;
4853 case 'R': /* Remove section at link time */
4854 flags |= SEC_NEVER_LOAD;
4855 break;
8d452c78 4856#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4857 /* Section Protection */
4858 case 'r': /* section is readable */
4859 flags |= IMAGE_SCN_MEM_READ;
4860 break;
4861 case 'w': /* section is writeable */
4862 flags |= IMAGE_SCN_MEM_WRITE;
4863 break;
4864 case 'x': /* section is executable */
4865 flags |= IMAGE_SCN_MEM_EXECUTE;
4866 break;
4867 case 's': /* section is sharable */
4868 flags |= IMAGE_SCN_MEM_SHARED;
4869 break;
4870
4871 /* Section Alignment */
4872 case '0': /* align to byte boundary */
4873 flags |= IMAGE_SCN_ALIGN_1BYTES;
4874 align = 0;
4875 break;
4876 case '1': /* align to halfword boundary */
4877 flags |= IMAGE_SCN_ALIGN_2BYTES;
4878 align = 1;
4879 break;
4880 case '2': /* align to word boundary */
4881 flags |= IMAGE_SCN_ALIGN_4BYTES;
4882 align = 2;
4883 break;
4884 case '3': /* align to doubleword boundary */
4885 flags |= IMAGE_SCN_ALIGN_8BYTES;
4886 align = 3;
4887 break;
4888 case '4': /* align to quadword boundary */
4889 flags |= IMAGE_SCN_ALIGN_16BYTES;
4890 align = 4;
4891 break;
4892 case '5': /* align to 32 byte boundary */
4893 flags |= IMAGE_SCN_ALIGN_32BYTES;
4894 align = 5;
4895 break;
4896 case '6': /* align to 64 byte boundary */
4897 flags |= IMAGE_SCN_ALIGN_64BYTES;
4898 align = 6;
4899 break;
8d452c78 4900#endif
252b5132 4901 default:
99a814a1
AM		 4902 as_bad (_("unknown section attribute '%c'"),
4903 *input_line_pointer);
252b5132
RH		 4904 break;
4905 }
4906 ++input_line_pointer;
4907 }
4908 if (*input_line_pointer == '"')
4909 ++input_line_pointer;
4910 }
4911 }
4912
4913 sec = subseg_new (name, (subsegT) exp);
4914
99a814a1 4915 ppc_set_current_section (sec);
252b5132
RH		 4916
4917 if (flags != SEC_NO_FLAGS)
4918 {
4919 if (! bfd_set_section_flags (stdoutput, sec, flags))
4920 as_bad (_("error setting flags for \"%s\": %s"),
4921 bfd_section_name (stdoutput, sec),
4922 bfd_errmsg (bfd_get_error ()));
4923 }
4924
99a814a1 4925 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4926}
4927
4928static void
98027b10 4929ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4930{
4931 char *name;
4932 char endc;
4933 symbolS *ext_sym;
4934
4935 name = input_line_pointer;
4936 endc = get_symbol_end ();
4937
4938 ext_sym = symbol_find_or_make (name);
4939
4940 *input_line_pointer = endc;
4941
4942 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4943 SF_SET_FUNCTION (ext_sym);
4944 SF_SET_PROCESS (ext_sym);
4945 coff_add_linesym (ext_sym);
4946
4947 demand_empty_rest_of_line ();
4948}
4949
4950static void
98027b10 4951ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4952{
4953 if (tocdata_section == 0)
4954 {
4955 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4956 /* FIXME: section flags won't work. */
252b5132
RH		 4957 bfd_set_section_flags (stdoutput, tocdata_section,
4958 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4959 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4960
4961 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4962 }
4963 else
4964 {
4965 rdata_section = subseg_new (".tocd", 0);
4966 }
4967
99a814a1 4968 ppc_set_current_section (tocdata_section);
252b5132
RH		 4969
4970 demand_empty_rest_of_line ();
4971}
4972
4973/* Don't adjust TOC relocs to use the section symbol. */
4974
4975int
98027b10 4976ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4977{
4978 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4979}
4980
4981#endif
4982\f
4983#ifdef OBJ_XCOFF
4984
4985/* XCOFF specific symbol and file handling. */
4986
4987/* Canonicalize the symbol name. We use the to force the suffix, if
4988 any, to use square brackets, and to be in upper case. */
4989
4990char *
98027b10 4991ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4992{
4993 char *s;
4994
4995 if (ppc_stab_symbol)
4996 return name;
4997
4998 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4999 ;
5000 if (*s != '\0')
5001 {
5002 char brac;
5003
5004 if (*s == '[')
5005 brac = ']';
5006 else
5007 {
5008 *s = '[';
5009 brac = '}';
5010 }
5011
5012 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5013 *s = TOUPPER (*s);
252b5132
RH		 5014
5015 if (*s == '\0' || s[1] != '\0')
5016 as_bad (_("bad symbol suffix"));
5017
5018 *s = ']';
5019 }
5020
5021 return name;
5022}
5023
5024/* Set the class of a symbol based on the suffix, if any. This is
5025 called whenever a new symbol is created. */
5026
5027void
98027b10 5028ppc_symbol_new_hook (symbolS *sym)
252b5132 5029{
809ffe0d 5030 struct ppc_tc_sy *tc;
252b5132
RH		 5031 const char *s;
5032
809ffe0d
ILT		 5033 tc = symbol_get_tc (sym);
5034 tc->next = NULL;
5035 tc->output = 0;
96d56e9f 5036 tc->symbol_class = -1;
809ffe0d
ILT		 5037 tc->real_name = NULL;
5038 tc->subseg = 0;
5039 tc->align = 0;
5040 tc->size = NULL;
5041 tc->within = NULL;
252b5132
RH		 5042
5043 if (ppc_stab_symbol)
5044 return;
5045
5046 s = strchr (S_GET_NAME (sym), '[');
5047 if (s == (const char *) NULL)
5048 {
5049 /* There is no suffix. */
5050 return;
5051 }
5052
5053 ++s;
5054
5055 switch (s[0])
5056 {
5057 case 'B':
5058 if (strcmp (s, "BS]") == 0)
96d56e9f 5059 tc->symbol_class = XMC_BS;
252b5132
RH		 5060 break;
5061 case 'D':
5062 if (strcmp (s, "DB]") == 0)
96d56e9f 5063 tc->symbol_class = XMC_DB;
252b5132 5064 else if (strcmp (s, "DS]") == 0)
96d56e9f 5065 tc->symbol_class = XMC_DS;
252b5132
RH		 5066 break;
5067 case 'G':
5068 if (strcmp (s, "GL]") == 0)
96d56e9f 5069 tc->symbol_class = XMC_GL;
252b5132
RH		 5070 break;
5071 case 'P':
5072 if (strcmp (s, "PR]") == 0)
96d56e9f 5073 tc->symbol_class = XMC_PR;
252b5132
RH		 5074 break;
5075 case 'R':
5076 if (strcmp (s, "RO]") == 0)
96d56e9f 5077 tc->symbol_class = XMC_RO;
252b5132 5078 else if (strcmp (s, "RW]") == 0)
96d56e9f 5079 tc->symbol_class = XMC_RW;
252b5132
RH		 5080 break;
5081 case 'S':
5082 if (strcmp (s, "SV]") == 0)
96d56e9f 5083 tc->symbol_class = XMC_SV;
252b5132
RH		 5084 break;
5085 case 'T':
5086 if (strcmp (s, "TC]") == 0)
96d56e9f 5087 tc->symbol_class = XMC_TC;
252b5132 5088 else if (strcmp (s, "TI]") == 0)
96d56e9f 5089 tc->symbol_class = XMC_TI;
252b5132 5090 else if (strcmp (s, "TB]") == 0)
96d56e9f 5091 tc->symbol_class = XMC_TB;
252b5132 5092 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5093 tc->symbol_class = XMC_TC0;
252b5132
RH		 5094 break;
5095 case 'U':
5096 if (strcmp (s, "UA]") == 0)
96d56e9f 5097 tc->symbol_class = XMC_UA;
252b5132 5098 else if (strcmp (s, "UC]") == 0)
96d56e9f 5099 tc->symbol_class = XMC_UC;
252b5132
RH		 5100 break;
5101 case 'X':
5102 if (strcmp (s, "XO]") == 0)
96d56e9f 5103 tc->symbol_class = XMC_XO;
252b5132
RH		 5104 break;
5105 }
5106
96d56e9f 5107 if (tc->symbol_class == -1)
252b5132
RH		 5108 as_bad (_("Unrecognized symbol suffix"));
5109}
5110
5111/* Set the class of a label based on where it is defined. This
5112 handles symbols without suffixes. Also, move the symbol so that it
5113 follows the csect symbol. */
5114
5115void
98027b10 5116ppc_frob_label (symbolS *sym)
252b5132
RH		 5117{
5118 if (ppc_current_csect != (symbolS *) NULL)
5119 {
96d56e9f
NC		 5120 if (symbol_get_tc (sym)->symbol_class == -1)
5121 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5122
5123 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5124 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5125 &symbol_rootP, &symbol_lastP);
5126 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5127 }
07a53e5c
RH		 5128
5129#ifdef OBJ_ELF
5130 dwarf2_emit_label (sym);
5131#endif
252b5132
RH		 5132}
5133
5134/* This variable is set by ppc_frob_symbol if any absolute symbols are
5135 seen. It tells ppc_adjust_symtab whether it needs to look through
5136 the symbols. */
5137
b34976b6 5138static bfd_boolean ppc_saw_abs;
252b5132
RH		 5139
5140/* Change the name of a symbol just before writing it out. Set the
5141 real name if the .rename pseudo-op was used. Otherwise, remove any
5142 class suffix. Return 1 if the symbol should not be included in the
5143 symbol table. */
5144
5145int
98027b10 5146ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5147{
5148 static symbolS *ppc_last_function;
5149 static symbolS *set_end;
5150
5151 /* Discard symbols that should not be included in the output symbol
5152 table. */
809ffe0d
ILT		 5153 if (! symbol_used_in_reloc_p (sym)
5154 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5155 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5156 && ! symbol_get_tc (sym)->output
252b5132
RH		 5157 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5158 return 1;
5159
a161fe53
AM		 5160 /* This one will disappear anyway. Don't make a csect sym for it. */
5161 if (sym == abs_section_sym)
5162 return 1;
5163
809ffe0d
ILT		 5164 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5165 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5166 else
5167 {
5168 const char *name;
5169 const char *s;
5170
5171 name = S_GET_NAME (sym);
5172 s = strchr (name, '[');
5173 if (s != (char *) NULL)
5174 {
5175 unsigned int len;
5176 char *snew;
5177
5178 len = s - name;
5179 snew = xmalloc (len + 1);
5180 memcpy (snew, name, len);
5181 snew[len] = '\0';
5182
5183 S_SET_NAME (sym, snew);
5184 }
5185 }
5186
5187 if (set_end != (symbolS *) NULL)
5188 {
5189 SA_SET_SYM_ENDNDX (set_end, sym);
5190 set_end = NULL;
5191 }
5192
5193 if (SF_GET_FUNCTION (sym))
5194 {
5195 if (ppc_last_function != (symbolS *) NULL)
5196 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5197 ppc_last_function = sym;
809ffe0d 5198 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5199 {
6386f3a7 5200 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5201 SA_SET_SYM_FSIZE (sym,
5202 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5203 }
5204 }
5205 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5206 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5207 {
5208 if (ppc_last_function == (symbolS *) NULL)
5209 as_bad (_(".ef with no preceding .function"));
5210 else
5211 {
5212 set_end = ppc_last_function;
5213 ppc_last_function = NULL;
5214
5215 /* We don't have a C_EFCN symbol, but we need to force the
5216 COFF backend to believe that it has seen one. */
5217 coff_last_function = NULL;
5218 }
5219 }
5220
670ec21d 5221 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5222 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5223 && S_GET_STORAGE_CLASS (sym) != C_FILE
5224 && S_GET_STORAGE_CLASS (sym) != C_FCN
5225 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5226 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5227 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5228 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5229 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5230 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5231 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5232
5233 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5234 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5235 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5236 {
5237 int i;
5238 union internal_auxent *a;
5239
5240 /* Create a csect aux. */
5241 i = S_GET_NUMBER_AUXILIARY (sym);
5242 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5243 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5244 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5245 {
5246 /* This is the TOC table. */
5247 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5248 a->x_csect.x_scnlen.l = 0;
5249 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5250 }
809ffe0d 5251 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5252 {
5253 /* This is a csect symbol. x_scnlen is the size of the
5254 csect. */
809ffe0d 5255 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5256 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5257 S_GET_SEGMENT (sym))
5258 - S_GET_VALUE (sym));
5259 else
5260 {
6386f3a7 5261 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5262 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5263 - S_GET_VALUE (sym));
5264 }
809ffe0d 5265 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5266 }
5267 else if (S_GET_SEGMENT (sym) == bss_section)
5268 {
5269 /* This is a common symbol. */
809ffe0d
ILT		 5270 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5271 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5272 if (S_IS_EXTERNAL (sym))
96d56e9f 5273 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5274 else
96d56e9f 5275 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5276 }
5277 else if (S_GET_SEGMENT (sym) == absolute_section)
5278 {
5279 /* This is an absolute symbol. The csect will be created by
99a814a1 5280 ppc_adjust_symtab. */
b34976b6 5281 ppc_saw_abs = TRUE;
252b5132 5282 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5283 if (symbol_get_tc (sym)->symbol_class == -1)
5284 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5285 }
5286 else if (! S_IS_DEFINED (sym))
5287 {
5288 /* This is an external symbol. */
5289 a->x_csect.x_scnlen.l = 0;
5290 a->x_csect.x_smtyp = XTY_ER;
5291 }
96d56e9f 5292 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5293 {
5294 symbolS *next;
5295
5296 /* This is a TOC definition. x_scnlen is the size of the
5297 TOC entry. */
5298 next = symbol_next (sym);
96d56e9f 5299 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5300 next = symbol_next (next);
5301 if (next == (symbolS *) NULL
96d56e9f 5302 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5303 {
5304 if (ppc_after_toc_frag == (fragS *) NULL)
5305 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5306 data_section)
5307 - S_GET_VALUE (sym));
5308 else
5309 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5310 - S_GET_VALUE (sym));
5311 }
5312 else
5313 {
6386f3a7 5314 resolve_symbol_value (next);
252b5132
RH		 5315 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5316 - S_GET_VALUE (sym));
5317 }
5318 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5319 }
5320 else
5321 {
5322 symbolS *csect;
5323
5324 /* This is a normal symbol definition. x_scnlen is the
5325 symbol index of the containing csect. */
5326 if (S_GET_SEGMENT (sym) == text_section)
5327 csect = ppc_text_csects;
5328 else if (S_GET_SEGMENT (sym) == data_section)
5329 csect = ppc_data_csects;
5330 else
5331 abort ();
5332
5333 /* Skip the initial dummy symbol. */
809ffe0d 5334 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5335
5336 if (csect == (symbolS *) NULL)
5337 {
5338 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5339 a->x_csect.x_scnlen.l = 0;
5340 }
5341 else
5342 {
809ffe0d 5343 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5344 {
6386f3a7 5345 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5346 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5347 > S_GET_VALUE (sym))
252b5132 5348 break;
809ffe0d 5349 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5350 }
5351
809ffe0d
ILT		 5352 a->x_csect.x_scnlen.p =
5353 coffsymbol (symbol_get_bfdsym (csect))->native;
5354 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5355 1;
252b5132
RH		 5356 }
5357 a->x_csect.x_smtyp = XTY_LD;
5358 }
81d4177b 5359
252b5132
RH		 5360 a->x_csect.x_parmhash = 0;
5361 a->x_csect.x_snhash = 0;
96d56e9f 5362 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5363 a->x_csect.x_smclas = XMC_PR;
5364 else
96d56e9f 5365 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5366 a->x_csect.x_stab = 0;
5367 a->x_csect.x_snstab = 0;
5368
5369 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5370 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5371 }
5372 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5373 {
5374 /* We want the value to be the symbol index of the referenced
5375 csect symbol. BFD will do that for us if we set the right
5376 flags. */
b782de16
AM		 5377 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5378 combined_entry_type *c = coffsymbol (bsym)->native;
5379
5380 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5381 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5382 }
5383 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5384 {
5385 symbolS *block;
5386 symbolS *csect;
5387
5388 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5389 block = symbol_get_tc (sym)->within;
5390 csect = symbol_get_tc (block)->within;
6386f3a7 5391 resolve_symbol_value (csect);
252b5132
RH		 5392 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5393 }
5394 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5395 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5396 {
5397 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5398 BFD will do that for us if we set the right flags. We have
5399 already set the value correctly. */
809ffe0d 5400 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5401 }
5402
5403 return 0;
5404}
5405
5406/* Adjust the symbol table. This creates csect symbols for all
5407 absolute symbols. */
5408
5409void
98027b10 5410ppc_adjust_symtab (void)
252b5132
RH		 5411{
5412 symbolS *sym;
5413
5414 if (! ppc_saw_abs)
5415 return;
5416
5417 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5418 {
5419 symbolS *csect;
5420 int i;
5421 union internal_auxent *a;
5422
5423 if (S_GET_SEGMENT (sym) != absolute_section)
5424 continue;
5425
5426 csect = symbol_create (".abs[XO]", absolute_section,
5427 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5428 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5429 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5430 i = S_GET_NUMBER_AUXILIARY (csect);
5431 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5432 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5433 a->x_csect.x_scnlen.l = 0;
5434 a->x_csect.x_smtyp = XTY_SD;
5435 a->x_csect.x_parmhash = 0;
5436 a->x_csect.x_snhash = 0;
5437 a->x_csect.x_smclas = XMC_XO;
5438 a->x_csect.x_stab = 0;
5439 a->x_csect.x_snstab = 0;
5440
5441 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5442
5443 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5444 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5445 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5446 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5447 }
5448
b34976b6 5449 ppc_saw_abs = FALSE;
252b5132
RH		 5450}
5451
5452/* Set the VMA for a section. This is called on all the sections in
5453 turn. */
5454
5455void
98027b10 5456ppc_frob_section (asection *sec)
252b5132 5457{
931e13a6 5458 static bfd_vma vma = 0;
252b5132 5459
931e13a6 5460 vma = md_section_align (sec, vma);
252b5132
RH		 5461 bfd_set_section_vma (stdoutput, sec, vma);
5462 vma += bfd_section_size (stdoutput, sec);
5463}
5464
5465#endif /* OBJ_XCOFF */
5466\f
252b5132 5467char *
98027b10 5468md_atof (int type, char *litp, int *sizep)
252b5132 5469{
499ac353 5470 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5471}
5472
5473/* Write a value out to the object file, using the appropriate
5474 endianness. */
5475
5476void
98027b10 5477md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5478{
5479 if (target_big_endian)
5480 number_to_chars_bigendian (buf, val, n);
5481 else
5482 number_to_chars_littleendian (buf, val, n);
5483}
5484
5485/* Align a section (I don't know why this is machine dependent). */
5486
5487valueT
3aeeedbb 5488md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5489{
3aeeedbb
AM		 5490#ifdef OBJ_ELF
5491 return addr;
5492#else
252b5132
RH		 5493 int align = bfd_get_section_alignment (stdoutput, seg);
5494
5495 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5496#endif
252b5132
RH		 5497}
5498
5499/* We don't have any form of relaxing. */
5500
5501int
98027b10
AM		 5502md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5503 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5504{
5505 abort ();
5506 return 0;
5507}
5508
5509/* Convert a machine dependent frag. We never generate these. */
5510
5511void
98027b10
AM		 5512md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5513 asection *sec ATTRIBUTE_UNUSED,
5514 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5515{
5516 abort ();
5517}
5518
5519/* We have no need to default values of symbols. */
5520
252b5132 5521symbolS *
98027b10 5522md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5523{
5524 return 0;
5525}
5526\f
5527/* Functions concerning relocs. */
5528
5529/* The location from which a PC relative jump should be calculated,
5530 given a PC relative reloc. */
5531
5532long
98027b10 5533md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5534{
5535 return fixp->fx_frag->fr_address + fixp->fx_where;
5536}
5537
5538#ifdef OBJ_XCOFF
5539
5540/* This is called to see whether a fixup should be adjusted to use a
5541 section symbol. We take the opportunity to change a fixup against
5542 a symbol in the TOC subsegment into a reloc against the
5543 corresponding .tc symbol. */
5544
5545int
98027b10 5546ppc_fix_adjustable (fixS *fix)
252b5132 5547{
b782de16
AM		 5548 valueT val = resolve_symbol_value (fix->fx_addsy);
5549 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5550 TC_SYMFIELD_TYPE *tc;
5551
5552 if (symseg == absolute_section)
5553 return 0;
252b5132 5554
252b5132 5555 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5556 && fix->fx_addsy != ppc_toc_csect
b782de16 5557 && symseg == data_section
252b5132
RH		 5558 && val >= ppc_toc_frag->fr_address
5559 && (ppc_after_toc_frag == (fragS *) NULL
5560 || val < ppc_after_toc_frag->fr_address))
5561 {
5562 symbolS *sy;
5563
5564 for (sy = symbol_next (ppc_toc_csect);
5565 sy != (symbolS *) NULL;
5566 sy = symbol_next (sy))
5567 {
b782de16
AM		 5568 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5569
96d56e9f 5570 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5571 continue;
96d56e9f 5572 if (sy_tc->symbol_class != XMC_TC)
252b5132 5573 break;
b782de16 5574 if (val == resolve_symbol_value (sy))
252b5132
RH		 5575 {
5576 fix->fx_addsy = sy;
5577 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5578 return 0;
5579 }
5580 }
5581
5582 as_bad_where (fix->fx_file, fix->fx_line,
5583 _("symbol in .toc does not match any .tc"));
5584 }
5585
5586 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5587 tc = symbol_get_tc (fix->fx_addsy);
5588 if (tc->subseg == 0
96d56e9f
NC		 5589 && tc->symbol_class != XMC_TC0
5590 && tc->symbol_class != XMC_TC
b782de16 5591 && symseg != bss_section
252b5132 5592 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5593 && (symseg != data_section
252b5132
RH		 5594 || ppc_toc_csect == NULL
5595 || val < ppc_toc_frag->fr_address
5596 || (ppc_after_toc_frag != NULL
5597 && val >= ppc_after_toc_frag->fr_address)))
5598 {
5599 symbolS *csect;
b782de16 5600 symbolS *next_csect;
252b5132 5601
b782de16 5602 if (symseg == text_section)
252b5132 5603 csect = ppc_text_csects;
b782de16 5604 else if (symseg == data_section)
252b5132
RH		 5605 csect = ppc_data_csects;
5606 else
5607 abort ();
5608
5609 /* Skip the initial dummy symbol. */
809ffe0d 5610 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5611
5612 if (csect != (symbolS *) NULL)
5613 {
b782de16
AM		 5614 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5615 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5616 {
5617 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5618 have to look through the full symbol table to see
5619 whether this is the csect we want. Note that we will
5620 only get here if the csect has zero length. */
b782de16
AM		 5621 if (symbol_get_frag (csect)->fr_address == val
5622 && S_GET_VALUE (csect) == val)
252b5132
RH		 5623 {
5624 symbolS *scan;
5625
809ffe0d 5626 for (scan = symbol_next (csect);
252b5132 5627 scan != NULL;
809ffe0d 5628 scan = symbol_next (scan))
252b5132 5629 {
809ffe0d 5630 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5631 break;
5632 if (scan == fix->fx_addsy)
5633 break;
5634 }
5635
5636 /* If we found the symbol before the next csect
99a814a1 5637 symbol, then this is the csect we want. */
252b5132
RH		 5638 if (scan == fix->fx_addsy)
5639 break;
5640 }
5641
b782de16 5642 csect = next_csect;
252b5132
RH		 5643 }
5644
b782de16 5645 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5646 fix->fx_addsy = csect;
5647 }
b782de16 5648 return 0;
252b5132
RH		 5649 }
5650
5651 /* Adjust a reloc against a .lcomm symbol to be against the base
5652 .lcomm. */
b782de16 5653 if (symseg == bss_section
252b5132
RH		 5654 && ! S_IS_EXTERNAL (fix->fx_addsy))
5655 {
b782de16
AM		 5656 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5657
5658 fix->fx_offset += val - resolve_symbol_value (sy);
5659 fix->fx_addsy = sy;
252b5132
RH		 5660 }
5661
5662 return 0;
5663}
5664
5665/* A reloc from one csect to another must be kept. The assembler
5666 will, of course, keep relocs between sections, and it will keep
5667 absolute relocs, but we need to force it to keep PC relative relocs
5668 between two csects in the same section. */
5669
5670int
98027b10 5671ppc_force_relocation (fixS *fix)
252b5132
RH		 5672{
5673 /* At this point fix->fx_addsy should already have been converted to
5674 a csect symbol. If the csect does not include the fragment, then
5675 we need to force the relocation. */
5676 if (fix->fx_pcrel
5677 && fix->fx_addsy != NULL
809ffe0d
ILT		 5678 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5679 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5680 > fix->fx_frag->fr_address)
5681 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5682 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5683 <= fix->fx_frag->fr_address))))
5684 return 1;
5685
ae6063d4 5686 return generic_force_reloc (fix);
252b5132
RH		 5687}
5688
5689#endif /* OBJ_XCOFF */
5690
0baf16f2 5691#ifdef OBJ_ELF
a161fe53
AM		 5692/* If this function returns non-zero, it guarantees that a relocation
5693 will be emitted for a fixup. */
5694
5695int
98027b10 5696ppc_force_relocation (fixS *fix)
a161fe53
AM		 5697{
5698 /* Branch prediction relocations must force a relocation, as must
5699 the vtable description relocs. */
5700 switch (fix->fx_r_type)
5701 {
5702 case BFD_RELOC_PPC_B16_BRTAKEN:
5703 case BFD_RELOC_PPC_B16_BRNTAKEN:
5704 case BFD_RELOC_PPC_BA16_BRTAKEN:
5705 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5706 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5707 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5708 return 1;
5709 default:
5710 break;
5711 }
5712
cdba85ec
AM		 5713 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5714 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5715 return 1;
5716
ae6063d4 5717 return generic_force_reloc (fix);
a161fe53
AM		 5718}
5719
0baf16f2 5720int
98027b10 5721ppc_fix_adjustable (fixS *fix)
252b5132 5722{
0baf16f2
AM		 5723 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5724 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5725 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5726 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5727 && fix->fx_r_type != BFD_RELOC_GPREL16
5728 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5729 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5730 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5731 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5732}
0baf16f2 5733#endif
252b5132 5734
3aeeedbb
AM		 5735/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5736 rs_align_code frag. */
5737
5738void
5739ppc_handle_align (struct frag *fragP)
5740{
5741 valueT count = (fragP->fr_next->fr_address
5742 - (fragP->fr_address + fragP->fr_fix));
5743
5744 if (count != 0 && (count & 3) == 0)
5745 {
5746 char *dest = fragP->fr_literal + fragP->fr_fix;
5747
5748 fragP->fr_var = 4;
5749 md_number_to_chars (dest, 0x60000000, 4);
5750
42240548
PB		 5751 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5752 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5753 {
42240548
PB		 5754 /* For power6 and power7, we want the last nop to be a group
5755 terminating one. Do this by inserting an rs_fill frag immediately
5756 after this one, with its address set to the last nop location.
5757 This will automatically reduce the number of nops in the current
5758 frag by one. */
3aeeedbb
AM		 5759 if (count > 4)
5760 {
5761 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5762
5763 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5764 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5765 group_nop->fr_fix = 0;
5766 group_nop->fr_offset = 1;
5767 group_nop->fr_type = rs_fill;
5768 fragP->fr_next = group_nop;
5769 dest = group_nop->fr_literal;
5770 }
5771
42240548
PB		 5772 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5773 /* power7 group terminating nop: "ori 2,2,0". */
5774 md_number_to_chars (dest, 0x60420000, 4);
5775 else
5776 /* power6 group terminating nop: "ori 1,1,0". */
5777 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5778 }
5779 }
5780}
5781
252b5132
RH		 5782/* Apply a fixup to the object code. This is called for all the
5783 fixups we generated by the call to fix_new_exp, above. In the call
5784 above we used a reloc code which was the largest legal reloc code
5785 plus the operand index. Here we undo that to recover the operand
5786 index. At this point all symbol values should be fully resolved,
5787 and we attempt to completely resolve the reloc. If we can not do
5788 that, we determine the correct reloc code and put it back in the
5789 fixup. */
5790
94f592af 5791void
98027b10 5792md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5793{
94f592af 5794 valueT value = * valP;
252b5132
RH		 5795
5796#ifdef OBJ_ELF
94f592af 5797 if (fixP->fx_addsy != NULL)
252b5132 5798 {
a161fe53 5799 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5800 if (fixP->fx_pcrel)
5801 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5802 }
5803 else
94f592af 5804 fixP->fx_done = 1;
252b5132 5805#else
a161fe53 5806 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5807 the symbol values. If we are doing this relocation the code in
5808 write.c is going to call bfd_install_relocation, which is also
5809 going to use the symbol value. That means that if the reloc is
5810 fully resolved we want to use *valP since bfd_install_relocation is
5811 not being used.
9f0eb232
RS		 5812 However, if the reloc is not fully resolved we do not want to
5813 use *valP, and must use fx_offset instead. If the relocation
5814 is PC-relative, we then need to re-apply md_pcrel_from_section
5815 to this new relocation value. */
94f592af
NC		 5816 if (fixP->fx_addsy == (symbolS *) NULL)
5817 fixP->fx_done = 1;
5818
252b5132 5819 else
9f0eb232
RS		 5820 {
5821 value = fixP->fx_offset;
5822 if (fixP->fx_pcrel)
5823 value -= md_pcrel_from_section (fixP, seg);
5824 }
a161fe53
AM		 5825#endif
5826
5827 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5828 {
a161fe53
AM		 5829 /* We can't actually support subtracting a symbol. */
5830 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5831 }
252b5132 5832
94f592af 5833 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5834 {
5835 int opindex;
5836 const struct powerpc_operand *operand;
5837 char *where;
5838 unsigned long insn;
5839
94f592af 5840 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5841
5842 operand = &powerpc_operands[opindex];
5843
5844#ifdef OBJ_XCOFF
0baf16f2
AM		 5845 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5846 does not generate a reloc. It uses the offset of `sym' within its
5847 csect. Other usages, such as `.long sym', generate relocs. This
5848 is the documented behaviour of non-TOC symbols. */
252b5132 5849 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5850 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5851 && operand->shift == 0
2b3c4602 5852 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5853 && fixP->fx_addsy != NULL
5854 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5855 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5856 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5857 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5858 {
94f592af
NC		 5859 value = fixP->fx_offset;
5860 fixP->fx_done = 1;
252b5132
RH		 5861 }
5862#endif
5863
5864 /* Fetch the instruction, insert the fully resolved operand
5865 value, and stuff the instruction back again. */
94f592af 5866 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5867 if (target_big_endian)
5868 insn = bfd_getb32 ((unsigned char *) where);
5869 else
5870 insn = bfd_getl32 ((unsigned char *) where);
5871 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5872 fixP->tc_fix_data.ppc_cpu,
94f592af 5873 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5874 if (target_big_endian)
5875 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5876 else
5877 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5878
94f592af
NC		 5879 if (fixP->fx_done)
5880 /* Nothing else to do here. */
5881 return;
252b5132 5882
9c2799c2 5883 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5884
252b5132
RH		 5885 /* Determine a BFD reloc value based on the operand information.
5886 We are only prepared to turn a few of the operands into
0baf16f2 5887 relocs. */
11b37b7b 5888 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5889 && operand->bitm == 0x3fffffc
11b37b7b 5890 && operand->shift == 0)
94f592af 5891 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5892 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5893 && operand->bitm == 0xfffc
11b37b7b 5894 && operand->shift == 0)
95210096
AM		 5895 {
5896 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5897#ifdef OBJ_XCOFF
5898 fixP->fx_size = 2;
5899 if (target_big_endian)
5900 fixP->fx_where += 2;
5901#endif
5902 }
11b37b7b 5903 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5904 && operand->bitm == 0x3fffffc
11b37b7b 5905 && operand->shift == 0)
94f592af 5906 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5907 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5908 && operand->bitm == 0xfffc
11b37b7b 5909 && operand->shift == 0)
95210096
AM		 5910 {
5911 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5912#ifdef OBJ_XCOFF
5913 fixP->fx_size = 2;
5914 if (target_big_endian)
5915 fixP->fx_where += 2;
5916#endif
5917 }
0baf16f2 5918#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5919 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5920 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5921 && operand->shift == 0)
11b37b7b 5922 {
a7fc733f
AM		 5923 if (ppc_is_toc_sym (fixP->fx_addsy))
5924 {
5925 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5926#ifdef OBJ_ELF
a7fc733f
AM		 5927 if (ppc_obj64
5928 && (operand->flags & PPC_OPERAND_DS) != 0)
5929 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5930#endif
5931 }
5932 else
5933 {
5934 fixP->fx_r_type = BFD_RELOC_16;
5935#ifdef OBJ_ELF
5936 if (ppc_obj64
5937 && (operand->flags & PPC_OPERAND_DS) != 0)
5938 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5939#endif
a7fc733f 5940 }
94f592af 5941 fixP->fx_size = 2;
11b37b7b 5942 if (target_big_endian)
94f592af 5943 fixP->fx_where += 2;
11b37b7b 5944 }
0baf16f2 5945#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5946 else
252b5132
RH		 5947 {
5948 char *sfile;
5949 unsigned int sline;
5950
5951 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5952 symbol. */
94f592af
NC		 5953 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5954 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5955 _("unresolved expression that must be resolved"));
5956 else
94f592af 5957 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5958 _("unsupported relocation against %s"),
94f592af
NC		 5959 S_GET_NAME (fixP->fx_addsy));
5960 fixP->fx_done = 1;
5961 return;
252b5132
RH		 5962 }
5963 }
5964 else
5965 {
5966#ifdef OBJ_ELF
94f592af 5967 ppc_elf_validate_fix (fixP, seg);
252b5132 5968#endif
94f592af 5969 switch (fixP->fx_r_type)
252b5132 5970 {
252b5132 5971 case BFD_RELOC_CTOR:
2b3c4602 5972 if (ppc_obj64)
9c7977b3
AM		 5973 goto ctor64;
5974 /* fall through */
5975
0baf16f2 5976 case BFD_RELOC_32:
94f592af
NC		 5977 if (fixP->fx_pcrel)
5978 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5979 /* fall through */
252b5132
RH		 5980
5981 case BFD_RELOC_RVA:
5982 case BFD_RELOC_32_PCREL:
252b5132 5983 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5984 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5985 value, 4);
5986 break;
5987
7f6d05e8 5988 case BFD_RELOC_64:
9c7977b3 5989 ctor64:
94f592af
NC		 5990 if (fixP->fx_pcrel)
5991 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5992 /* fall through */
0baf16f2 5993
7f6d05e8 5994 case BFD_RELOC_64_PCREL:
94f592af 5995 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5996 value, 8);
81d4177b 5997 break;
0baf16f2 5998
252b5132
RH		 5999 case BFD_RELOC_GPREL16:
6000 case BFD_RELOC_16_GOT_PCREL:
6001 case BFD_RELOC_16_GOTOFF:
6002 case BFD_RELOC_LO16_GOTOFF:
6003 case BFD_RELOC_HI16_GOTOFF:
6004 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6005 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6006 case BFD_RELOC_LO16_BASEREL:
6007 case BFD_RELOC_HI16_BASEREL:
6008 case BFD_RELOC_HI16_S_BASEREL:
6009 case BFD_RELOC_PPC_EMB_NADDR16:
6010 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6011 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6012 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6013 case BFD_RELOC_PPC_EMB_SDAI16:
6014 case BFD_RELOC_PPC_EMB_SDA2REL:
6015 case BFD_RELOC_PPC_EMB_SDA2I16:
6016 case BFD_RELOC_PPC_EMB_RELSEC16:
6017 case BFD_RELOC_PPC_EMB_RELST_LO:
6018 case BFD_RELOC_PPC_EMB_RELST_HI:
6019 case BFD_RELOC_PPC_EMB_RELST_HA:
6020 case BFD_RELOC_PPC_EMB_RELSDA:
6021 case BFD_RELOC_PPC_TOC16:
0baf16f2 6022#ifdef OBJ_ELF
0baf16f2
AM		 6023 case BFD_RELOC_PPC64_TOC16_LO:
6024 case BFD_RELOC_PPC64_TOC16_HI:
6025 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6026#endif
94f592af 6027 if (fixP->fx_pcrel)
252b5132 6028 {
94f592af
NC		 6029 if (fixP->fx_addsy != NULL)
6030 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6031 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6032 bfd_get_reloc_code_name (fixP->fx_r_type),
6033 S_GET_NAME (fixP->fx_addsy));
252b5132 6034 else
94f592af 6035 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6036 _("cannot emit PC relative %s relocation"),
94f592af 6037 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6038 }
6039
94f592af 6040 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6041 value, 2);
6042 break;
6043
3c9d25f4
AM		 6044 case BFD_RELOC_16:
6045 if (fixP->fx_pcrel)
6046 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6047 /* fall through */
6048
6049 case BFD_RELOC_16_PCREL:
6050 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6051 value, 2);
6052 break;
6053
6054 case BFD_RELOC_LO16:
6055 if (fixP->fx_pcrel)
6056 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6057 /* fall through */
6058
6059 case BFD_RELOC_LO16_PCREL:
6060 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6061 value, 2);
6062 break;
6063
252b5132
RH		 6064 /* This case happens when you write, for example,
6065 lis %r3,(L1-L2)@ha
6066 where L1 and L2 are defined later. */
6067 case BFD_RELOC_HI16:
94f592af 6068 if (fixP->fx_pcrel)
3c9d25f4
AM		 6069 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6070 /* fall through */
6071
6072 case BFD_RELOC_HI16_PCREL:
94f592af 6073 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6074 PPC_HI (value), 2);
252b5132 6075 break;
0baf16f2 6076
252b5132 6077 case BFD_RELOC_HI16_S:
94f592af 6078 if (fixP->fx_pcrel)
3c9d25f4
AM		 6079 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6080 /* fall through */
6081
6082 case BFD_RELOC_HI16_S_PCREL:
94f592af 6083 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6084 PPC_HA (value), 2);
6085 break;
6086
c865e45b
RS		 6087#ifdef OBJ_XCOFF
6088 case BFD_RELOC_NONE:
6089 break;
6090#endif
6091
0baf16f2 6092#ifdef OBJ_ELF
0baf16f2 6093 case BFD_RELOC_PPC64_HIGHER:
94f592af 6094 if (fixP->fx_pcrel)
0baf16f2 6095 abort ();
94f592af 6096 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6097 PPC_HIGHER (value), 2);
252b5132
RH		 6098 break;
6099
0baf16f2 6100 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6101 if (fixP->fx_pcrel)
0baf16f2 6102 abort ();
94f592af 6103 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6104 PPC_HIGHERA (value), 2);
6105 break;
6106
6107 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6108 if (fixP->fx_pcrel)
0baf16f2 6109 abort ();
94f592af 6110 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6111 PPC_HIGHEST (value), 2);
6112 break;
6113
6114 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6115 if (fixP->fx_pcrel)
0baf16f2 6116 abort ();
94f592af 6117 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6118 PPC_HIGHESTA (value), 2);
6119 break;
6120
6121 case BFD_RELOC_PPC64_ADDR16_DS:
6122 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6123 case BFD_RELOC_PPC64_GOT16_DS:
6124 case BFD_RELOC_PPC64_GOT16_LO_DS:
6125 case BFD_RELOC_PPC64_PLT16_LO_DS:
6126 case BFD_RELOC_PPC64_SECTOFF_DS:
6127 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6128 case BFD_RELOC_PPC64_TOC16_DS:
6129 case BFD_RELOC_PPC64_TOC16_LO_DS:
6130 case BFD_RELOC_PPC64_PLTGOT16_DS:
6131 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6132 if (fixP->fx_pcrel)
0baf16f2
AM		 6133 abort ();
6134 {
2132e3a3 6135 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6136 unsigned long val, mask;
0baf16f2
AM		 6137
6138 if (target_big_endian)
adadcc0c 6139 val = bfd_getb32 (where - 2);
0baf16f2 6140 else
adadcc0c
AM		 6141 val = bfd_getl32 (where);
6142 mask = 0xfffc;
6143 /* lq insns reserve the four lsbs. */
6144 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6145 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6146 mask = 0xfff0;
6147 val |= value & mask;
0baf16f2
AM		 6148 if (target_big_endian)
6149 bfd_putb16 ((bfd_vma) val, where);
6150 else
6151 bfd_putl16 ((bfd_vma) val, where);
6152 }
6153 break;
cdba85ec 6154
ba0b2174
AM		 6155 case BFD_RELOC_PPC_B16_BRTAKEN:
6156 case BFD_RELOC_PPC_B16_BRNTAKEN:
6157 case BFD_RELOC_PPC_BA16_BRTAKEN:
6158 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6159 break;
6160
cdba85ec 6161 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6162 case BFD_RELOC_PPC_TLSGD:
6163 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6164 break;
6165
cdba85ec
AM		 6166 case BFD_RELOC_PPC_DTPMOD:
6167 case BFD_RELOC_PPC_TPREL16:
6168 case BFD_RELOC_PPC_TPREL16_LO:
6169 case BFD_RELOC_PPC_TPREL16_HI:
6170 case BFD_RELOC_PPC_TPREL16_HA:
6171 case BFD_RELOC_PPC_TPREL:
6172 case BFD_RELOC_PPC_DTPREL16:
6173 case BFD_RELOC_PPC_DTPREL16_LO:
6174 case BFD_RELOC_PPC_DTPREL16_HI:
6175 case BFD_RELOC_PPC_DTPREL16_HA:
6176 case BFD_RELOC_PPC_DTPREL:
6177 case BFD_RELOC_PPC_GOT_TLSGD16:
6178 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6179 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6180 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6181 case BFD_RELOC_PPC_GOT_TLSLD16:
6182 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6183 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6184 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6185 case BFD_RELOC_PPC_GOT_TPREL16:
6186 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6187 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6188 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6189 case BFD_RELOC_PPC_GOT_DTPREL16:
6190 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6191 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6192 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6193 case BFD_RELOC_PPC64_TPREL16_DS:
6194 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6195 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6196 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6197 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6198 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6199 case BFD_RELOC_PPC64_DTPREL16_DS:
6200 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6201 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6202 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6203 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6204 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6205 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6206 break;
0baf16f2 6207#endif
252b5132 6208 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6209 bytes, rather than 2, so offset it here appropriately. */
252b5132 6210 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6211 if (fixP->fx_pcrel)
252b5132
RH		 6212 abort ();
6213
94f592af 6214 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6215 + ((target_big_endian) ? 2 : 0),
6216 value, 2);
6217 break;
6218
6219 case BFD_RELOC_8:
94f592af 6220 if (fixP->fx_pcrel)
31a91399
NC		 6221 {
6222 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6223 ".byte <undefined_symbol> - ." */
31a91399
NC		 6224 if (fixP->fx_addsy)
6225 as_bad (_("Unable to handle reference to symbol %s"),
6226 S_GET_NAME (fixP->fx_addsy));
6227 else
6228 as_bad (_("Unable to resolve expression"));
6229 fixP->fx_done = 1;
6230 }
6231 else
6232 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6233 value, 1);
252b5132
RH		 6234 break;
6235
6236 case BFD_RELOC_24_PLT_PCREL:
6237 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6238 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6239 abort ();
6240
94f592af 6241 if (fixP->fx_done)
99a814a1
AM		 6242 {
6243 char *where;
6244 unsigned long insn;
6245
6246 /* Fetch the instruction, insert the fully resolved operand
6247 value, and stuff the instruction back again. */
94f592af 6248 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6249 if (target_big_endian)
6250 insn = bfd_getb32 ((unsigned char *) where);
6251 else
6252 insn = bfd_getl32 ((unsigned char *) where);
6253 if ((value & 3) != 0)
94f592af 6254 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6255 _("must branch to an address a multiple of 4"));
6256 if ((offsetT) value < -0x40000000
6257 || (offsetT) value >= 0x40000000)
94f592af 6258 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6259 _("@local or @plt branch destination is too far away, %ld bytes"),
6260 (long) value);
6261 insn = insn | (value & 0x03fffffc);
6262 if (target_big_endian)
6263 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6264 else
6265 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6266 }
252b5132
RH		 6267 break;
6268
6269 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6270 fixP->fx_done = 0;
6271 if (fixP->fx_addsy
6272 && !S_IS_DEFINED (fixP->fx_addsy)
6273 && !S_IS_WEAK (fixP->fx_addsy))
6274 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6275 break;
6276
6277 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6278 fixP->fx_done = 0;
252b5132
RH		 6279 break;
6280
0baf16f2 6281#ifdef OBJ_ELF
0baf16f2
AM		 6282 /* Generated by reference to `sym@tocbase'. The sym is
6283 ignored by the linker. */
6284 case BFD_RELOC_PPC64_TOC:
94f592af 6285 fixP->fx_done = 0;
0baf16f2 6286 break;
0baf16f2 6287#endif
252b5132 6288 default:
bc805888 6289 fprintf (stderr,
94f592af 6290 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6291 fflush (stderr);
252b5132
RH		 6292 abort ();
6293 }
6294 }
6295
6296#ifdef OBJ_ELF
94f592af 6297 fixP->fx_addnumber = value;
4e6935a6
AM		 6298
6299 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6300 from the section contents. If we are going to be emitting a reloc
6301 then the section contents are immaterial, so don't warn if they
6302 happen to overflow. Leave such warnings to ld. */
6303 if (!fixP->fx_done)
6304 fixP->fx_no_overflow = 1;
252b5132 6305#else
94f592af
NC		 6306 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6307 fixP->fx_addnumber = 0;
252b5132
RH		 6308 else
6309 {
6310#ifdef TE_PE
94f592af 6311 fixP->fx_addnumber = 0;
252b5132 6312#else
8edcbfcd
TG		 6313 /* We want to use the offset within the toc, not the actual VMA
6314 of the symbol. */
94f592af 6315 fixP->fx_addnumber =
8edcbfcd
TG		 6316 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6317 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6318#endif
6319 }
6320#endif
252b5132
RH		 6321}
6322
6323/* Generate a reloc for a fixup. */
6324
6325arelent *
98027b10 6326tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6327{
6328 arelent *reloc;
6329
6330 reloc = (arelent *) xmalloc (sizeof (arelent));
6331
49309057
ILT		 6332 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6333 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6334 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6335 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6336 if (reloc->howto == (reloc_howto_type *) NULL)
6337 {
6338 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6339 _("reloc %d not supported by object file format"),
6340 (int) fixp->fx_r_type);
252b5132
RH		 6341 return NULL;
6342 }
6343 reloc->addend = fixp->fx_addnumber;
6344
6345 return reloc;
6346}
75e21f08
JJ		 6347
6348void
98027b10 6349ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6350{
6351 cfi_add_CFA_def_cfa (1, 0);
6352}
6353
6354int
1df69f4f 6355tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6356{
6357 unsigned int regnum = -1;
6358 unsigned int i;
6359 const char *p;
6360 char *q;
6361 static struct { char *name; int dw2regnum; } regnames[] =
6362 {
6363 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6364 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6365 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6366 { "spe_acc", 111 }, { "spefscr", 112 }
6367 };
6368
6369 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6370 if (strcmp (regnames[i].name, regname) == 0)
6371 return regnames[i].dw2regnum;
6372
6373 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6374 {
6375 p = regname + 1 + (regname[1] == '.');
6376 regnum = strtoul (p, &q, 10);
6377 if (p == q || *q || regnum >= 32)
6378 return -1;
6379 if (regname[0] == 'f')
b7d7dc63 6380 regnum += 32;
75e21f08 6381 else if (regname[0] == 'v')
b7d7dc63 6382 regnum += 77;
75e21f08
JJ		 6383 }
6384 else if (regname[0] == 'c' && regname[1] == 'r')
6385 {
6386 p = regname + 2 + (regname[2] == '.');
6387 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6388 return -1;
75e21f08
JJ		 6389 regnum = p[0] - '0' + 68;
6390 }
6391 return regnum;
6392}
A mirror of the official binutils-gdb repository