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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH
27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH
32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH
52#endif
53#endif
54
0baf16f2
AM
55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM
68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM
71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM
75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM
78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM
80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM
82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM
87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM
89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM
91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH
94
95#ifdef OBJ_XCOFF
98027b10
AM
96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH
118#endif
119
120#ifdef OBJ_ELF
98027b10
AM
121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH
124#endif
125
126#ifdef TE_PE
98027b10
AM
127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH
138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ
178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
252b5132
RH
181\f
182/* The target specific pseudo-ops which we support. */
183
184const pseudo_typeS md_pseudo_table[] =
185{
186 /* Pseudo-ops which must be overridden. */
187 { "byte", ppc_byte, 0 },
188
189#ifdef OBJ_XCOFF
190 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
191 legitimately belong in the obj-*.c file. However, XCOFF is based
192 on COFF, and is only implemented for the RS/6000. We just use
193 obj-coff.c, and add what we need here. */
194 { "comm", ppc_comm, 0 },
195 { "lcomm", ppc_comm, 1 },
196 { "bb", ppc_bb, 0 },
197 { "bc", ppc_bc, 0 },
198 { "bf", ppc_bf, 0 },
199 { "bi", ppc_biei, 0 },
200 { "bs", ppc_bs, 0 },
201 { "csect", ppc_csect, 0 },
202 { "data", ppc_section, 'd' },
203 { "eb", ppc_eb, 0 },
204 { "ec", ppc_ec, 0 },
205 { "ef", ppc_ef, 0 },
206 { "ei", ppc_biei, 1 },
207 { "es", ppc_es, 0 },
208 { "extern", ppc_extern, 0 },
209 { "function", ppc_function, 0 },
210 { "lglobl", ppc_lglobl, 0 },
211 { "rename", ppc_rename, 0 },
212 { "section", ppc_named_section, 0 },
213 { "stabx", ppc_stabx, 0 },
214 { "text", ppc_section, 't' },
215 { "toc", ppc_toc, 0 },
216 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 217 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH
218 { "word", ppc_xcoff_cons, 1 },
219 { "short", ppc_xcoff_cons, 1 },
220 { "vbyte", ppc_vbyte, 0 },
221#endif
222
223#ifdef OBJ_ELF
0baf16f2
AM
224 { "llong", ppc_elf_cons, 8 },
225 { "quad", ppc_elf_cons, 8 },
252b5132
RH
226 { "long", ppc_elf_cons, 4 },
227 { "word", ppc_elf_cons, 2 },
228 { "short", ppc_elf_cons, 2 },
229 { "rdata", ppc_elf_rdata, 0 },
230 { "rodata", ppc_elf_rdata, 0 },
231 { "lcomm", ppc_elf_lcomm, 0 },
232#endif
233
234#ifdef TE_PE
99a814a1 235 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
236 { "previous", ppc_previous, 0 },
237 { "pdata", ppc_pdata, 0 },
238 { "ydata", ppc_ydata, 0 },
239 { "reldata", ppc_reldata, 0 },
240 { "rdata", ppc_rdata, 0 },
241 { "ualong", ppc_ualong, 0 },
242 { "znop", ppc_znop, 0 },
243 { "comm", ppc_pe_comm, 0 },
244 { "lcomm", ppc_pe_comm, 1 },
245 { "section", ppc_pe_section, 0 },
246 { "function", ppc_pe_function,0 },
247 { "tocd", ppc_pe_tocd, 0 },
248#endif
249
0baf16f2 250#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 251 { "tc", ppc_tc, 0 },
0baf16f2
AM
252 { "machine", ppc_machine, 0 },
253#endif
252b5132
RH
254
255 { NULL, NULL, 0 }
256};
257
258\f
99a814a1
AM
259/* Predefined register names if -mregnames (or default for Windows NT).
260 In general, there are lots of them, in an attempt to be compatible
261 with a number of other Windows NT assemblers. */
252b5132
RH
262
263/* Structure to hold information about predefined registers. */
264struct pd_reg
265 {
266 char *name;
267 int value;
268 };
269
270/* List of registers that are pre-defined:
271
272 Each general register has predefined names of the form:
273 1. r<reg_num> which has the value <reg_num>.
274 2. r.<reg_num> which has the value <reg_num>.
275
252b5132
RH
276 Each floating point register has predefined names of the form:
277 1. f<reg_num> which has the value <reg_num>.
278 2. f.<reg_num> which has the value <reg_num>.
279
7a899fff
C
280 Each vector unit register has predefined names of the form:
281 1. v<reg_num> which has the value <reg_num>.
282 2. v.<reg_num> which has the value <reg_num>.
283
252b5132
RH
284 Each condition register has predefined names of the form:
285 1. cr<reg_num> which has the value <reg_num>.
286 2. cr.<reg_num> which has the value <reg_num>.
287
288 There are individual registers as well:
289 sp or r.sp has the value 1
290 rtoc or r.toc has the value 2
291 fpscr has the value 0
292 xer has the value 1
293 lr has the value 8
294 ctr has the value 9
295 pmr has the value 0
296 dar has the value 19
297 dsisr has the value 18
298 dec has the value 22
299 sdr1 has the value 25
300 srr0 has the value 26
301 srr1 has the value 27
302
81d4177b 303 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH
304
305static const struct pd_reg pre_defined_registers[] =
306{
307 { "cr.0", 0 }, /* Condition Registers */
308 { "cr.1", 1 },
309 { "cr.2", 2 },
310 { "cr.3", 3 },
311 { "cr.4", 4 },
312 { "cr.5", 5 },
313 { "cr.6", 6 },
314 { "cr.7", 7 },
315
316 { "cr0", 0 },
317 { "cr1", 1 },
318 { "cr2", 2 },
319 { "cr3", 3 },
320 { "cr4", 4 },
321 { "cr5", 5 },
322 { "cr6", 6 },
323 { "cr7", 7 },
324
325 { "ctr", 9 },
326
327 { "dar", 19 }, /* Data Access Register */
328 { "dec", 22 }, /* Decrementer */
329 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
330
331 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH
332 { "f.1", 1 },
333 { "f.10", 10 },
334 { "f.11", 11 },
335 { "f.12", 12 },
336 { "f.13", 13 },
337 { "f.14", 14 },
338 { "f.15", 15 },
339 { "f.16", 16 },
340 { "f.17", 17 },
341 { "f.18", 18 },
342 { "f.19", 19 },
343 { "f.2", 2 },
344 { "f.20", 20 },
345 { "f.21", 21 },
346 { "f.22", 22 },
347 { "f.23", 23 },
348 { "f.24", 24 },
349 { "f.25", 25 },
350 { "f.26", 26 },
351 { "f.27", 27 },
352 { "f.28", 28 },
353 { "f.29", 29 },
354 { "f.3", 3 },
252b5132
RH
355 { "f.30", 30 },
356 { "f.31", 31 },
81d4177b
KH
357 { "f.4", 4 },
358 { "f.5", 5 },
359 { "f.6", 6 },
360 { "f.7", 7 },
361 { "f.8", 8 },
362 { "f.9", 9 },
363
364 { "f0", 0 },
365 { "f1", 1 },
366 { "f10", 10 },
367 { "f11", 11 },
368 { "f12", 12 },
369 { "f13", 13 },
370 { "f14", 14 },
371 { "f15", 15 },
372 { "f16", 16 },
373 { "f17", 17 },
374 { "f18", 18 },
375 { "f19", 19 },
376 { "f2", 2 },
377 { "f20", 20 },
378 { "f21", 21 },
379 { "f22", 22 },
380 { "f23", 23 },
381 { "f24", 24 },
382 { "f25", 25 },
383 { "f26", 26 },
384 { "f27", 27 },
385 { "f28", 28 },
386 { "f29", 29 },
387 { "f3", 3 },
252b5132
RH
388 { "f30", 30 },
389 { "f31", 31 },
81d4177b
KH
390 { "f4", 4 },
391 { "f5", 5 },
392 { "f6", 6 },
393 { "f7", 7 },
394 { "f8", 8 },
395 { "f9", 9 },
252b5132
RH
396
397 { "fpscr", 0 },
398
c3d65c1c
BE
399 /* Quantization registers used with pair single instructions. */
400 { "gqr.0", 0 },
401 { "gqr.1", 1 },
402 { "gqr.2", 2 },
403 { "gqr.3", 3 },
404 { "gqr.4", 4 },
405 { "gqr.5", 5 },
406 { "gqr.6", 6 },
407 { "gqr.7", 7 },
408 { "gqr0", 0 },
409 { "gqr1", 1 },
410 { "gqr2", 2 },
411 { "gqr3", 3 },
412 { "gqr4", 4 },
413 { "gqr5", 5 },
414 { "gqr6", 6 },
415 { "gqr7", 7 },
416
252b5132
RH
417 { "lr", 8 }, /* Link Register */
418
419 { "pmr", 0 },
420
421 { "r.0", 0 }, /* General Purpose Registers */
422 { "r.1", 1 },
423 { "r.10", 10 },
424 { "r.11", 11 },
425 { "r.12", 12 },
426 { "r.13", 13 },
427 { "r.14", 14 },
428 { "r.15", 15 },
429 { "r.16", 16 },
430 { "r.17", 17 },
431 { "r.18", 18 },
432 { "r.19", 19 },
433 { "r.2", 2 },
434 { "r.20", 20 },
435 { "r.21", 21 },
436 { "r.22", 22 },
437 { "r.23", 23 },
438 { "r.24", 24 },
439 { "r.25", 25 },
440 { "r.26", 26 },
441 { "r.27", 27 },
442 { "r.28", 28 },
443 { "r.29", 29 },
444 { "r.3", 3 },
445 { "r.30", 30 },
446 { "r.31", 31 },
447 { "r.4", 4 },
448 { "r.5", 5 },
449 { "r.6", 6 },
450 { "r.7", 7 },
451 { "r.8", 8 },
452 { "r.9", 9 },
453
454 { "r.sp", 1 }, /* Stack Pointer */
455
456 { "r.toc", 2 }, /* Pointer to the table of contents */
457
458 { "r0", 0 }, /* More general purpose registers */
459 { "r1", 1 },
460 { "r10", 10 },
461 { "r11", 11 },
462 { "r12", 12 },
463 { "r13", 13 },
464 { "r14", 14 },
465 { "r15", 15 },
466 { "r16", 16 },
467 { "r17", 17 },
468 { "r18", 18 },
469 { "r19", 19 },
470 { "r2", 2 },
471 { "r20", 20 },
472 { "r21", 21 },
473 { "r22", 22 },
474 { "r23", 23 },
475 { "r24", 24 },
476 { "r25", 25 },
477 { "r26", 26 },
478 { "r27", 27 },
479 { "r28", 28 },
480 { "r29", 29 },
481 { "r3", 3 },
482 { "r30", 30 },
483 { "r31", 31 },
484 { "r4", 4 },
485 { "r5", 5 },
486 { "r6", 6 },
487 { "r7", 7 },
488 { "r8", 8 },
489 { "r9", 9 },
490
491 { "rtoc", 2 }, /* Table of contents */
492
493 { "sdr1", 25 }, /* Storage Description Register 1 */
494
495 { "sp", 1 },
496
497 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
498 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 499
7a899fff 500 { "v.0", 0 }, /* Vector registers */
81d4177b
KH
501 { "v.1", 1 },
502 { "v.10", 10 },
503 { "v.11", 11 },
504 { "v.12", 12 },
505 { "v.13", 13 },
506 { "v.14", 14 },
507 { "v.15", 15 },
508 { "v.16", 16 },
509 { "v.17", 17 },
510 { "v.18", 18 },
511 { "v.19", 19 },
512 { "v.2", 2 },
513 { "v.20", 20 },
514 { "v.21", 21 },
515 { "v.22", 22 },
516 { "v.23", 23 },
517 { "v.24", 24 },
518 { "v.25", 25 },
519 { "v.26", 26 },
520 { "v.27", 27 },
521 { "v.28", 28 },
522 { "v.29", 29 },
523 { "v.3", 3 },
7a899fff
C
524 { "v.30", 30 },
525 { "v.31", 31 },
81d4177b
KH
526 { "v.4", 4 },
527 { "v.5", 5 },
528 { "v.6", 6 },
529 { "v.7", 7 },
530 { "v.8", 8 },
531 { "v.9", 9 },
7a899fff
C
532
533 { "v0", 0 },
81d4177b
KH
534 { "v1", 1 },
535 { "v10", 10 },
536 { "v11", 11 },
537 { "v12", 12 },
538 { "v13", 13 },
539 { "v14", 14 },
540 { "v15", 15 },
541 { "v16", 16 },
542 { "v17", 17 },
543 { "v18", 18 },
544 { "v19", 19 },
545 { "v2", 2 },
546 { "v20", 20 },
547 { "v21", 21 },
548 { "v22", 22 },
549 { "v23", 23 },
550 { "v24", 24 },
551 { "v25", 25 },
552 { "v26", 26 },
553 { "v27", 27 },
554 { "v28", 28 },
555 { "v29", 29 },
556 { "v3", 3 },
7a899fff
C
557 { "v30", 30 },
558 { "v31", 31 },
81d4177b
KH
559 { "v4", 4 },
560 { "v5", 5 },
561 { "v6", 6 },
562 { "v7", 7 },
563 { "v8", 8 },
7a899fff 564 { "v9", 9 },
252b5132
RH
565
566 { "xer", 1 },
567
568};
569
bc805888 570#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH
571
572/* Given NAME, find the register number associated with that name, return
573 the integer value associated with the given name or -1 on failure. */
574
252b5132 575static int
98027b10 576reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH
577{
578 int middle, low, high;
579 int cmp;
580
581 low = 0;
582 high = regcount - 1;
583
584 do
585 {
586 middle = (low + high) / 2;
587 cmp = strcasecmp (name, regs[middle].name);
588 if (cmp < 0)
589 high = middle - 1;
590 else if (cmp > 0)
591 low = middle + 1;
592 else
593 return regs[middle].value;
594 }
595 while (low <= high);
596
597 return -1;
598}
599
600/*
99a814a1 601 * Summary of register_name.
252b5132
RH
602 *
603 * in: Input_line_pointer points to 1st char of operand.
604 *
605 * out: A expressionS.
606 * The operand may have been a register: in this case, X_op == O_register,
607 * X_add_number is set to the register number, and truth is returned.
608 * Input_line_pointer->(next non-blank) char after operand, or is in its
609 * original state.
610 */
611
b34976b6 612static bfd_boolean
98027b10 613register_name (expressionS *expressionP)
252b5132
RH
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH
623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH
627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM
631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH
636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH
641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM
645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH
649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH
657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
98027b10 680ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH
681{
682 int val;
683
684 if (! cr_operand)
685 return 0;
686
13abbae3
AM
687 if (*name == '%')
688 ++name;
252b5132
RH
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM
706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH
709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH
720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH
727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH
730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH
789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ
796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM
804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ
806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH
810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH
818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM
822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE
847 /* Do all PPC750s have paired single ops? */
848 else if (strcmp (arg, "750cl") == 0)
849 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM
850 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
851 else if (strcmp (arg, "403") == 0
852 || strcmp (arg, "405") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
854 | PPC_OPCODE_403 | PPC_OPCODE_32);
855 else if (strcmp (arg, "440") == 0)
856 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
857 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
858 else if (strcmp (arg, "7400") == 0
859 || strcmp (arg, "7410") == 0
860 || strcmp (arg, "7450") == 0
861 || strcmp (arg, "7455") == 0)
862 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
863 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ
864 else if (strcmp (arg, "e300") == 0)
865 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
866 | PPC_OPCODE_E300);
69c040df
AM
867 else if (strcmp (arg, "altivec") == 0)
868 {
869 if (ppc_cpu == 0)
870 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
871 else
872 ppc_cpu |= PPC_OPCODE_ALTIVEC;
873 }
874 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
875 {
876 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
877 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
878 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
879 | PPC_OPCODE_RFMCI);
880 }
881 else if (strcmp (arg, "spe") == 0)
882 {
883 if (ppc_cpu == 0)
884 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
885 else
886 ppc_cpu |= PPC_OPCODE_SPE;
887 }
888 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
889 620. */
890 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
891 {
892 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
893 }
894 else if (strcmp (arg, "ppc64bridge") == 0)
895 {
896 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
897 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
898 }
899 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
900 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
901 {
902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
903 }
904 /* -mbooke64 means enable 64-bit BookE support. */
905 else if (strcmp (arg, "booke64") == 0)
906 {
907 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
908 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
909 }
910 else if (strcmp (arg, "power4") == 0)
911 {
912 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
913 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
914 }
b0648eec
AM
915 else if (strcmp (arg, "power5") == 0)
916 {
917 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
918 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
919 | PPC_OPCODE_POWER5);
920 }
9622b051
AM
921 else if (strcmp (arg, "power6") == 0)
922 {
923 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
924 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
925 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
926 }
ede602d7
AM
927 else if (strcmp (arg, "cell") == 0)
928 {
929 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
930 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
931 | PPC_OPCODE_CELL);
932 }
69c040df
AM
933 /* -mcom means assemble for the common intersection between Power
934 and PowerPC. At present, we just allow the union, rather
935 than the intersection. */
936 else if (strcmp (arg, "com") == 0)
937 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
938 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
939 else if (strcmp (arg, "any") == 0)
940 ppc_cpu |= PPC_OPCODE_ANY;
941 else
942 return 0;
943
944 return 1;
945}
946
252b5132 947int
98027b10 948md_parse_option (int c, char *arg)
252b5132
RH
949{
950 switch (c)
951 {
952 case 'u':
953 /* -u means that any undefined symbols should be treated as
954 external, which is the default for gas anyhow. */
955 break;
956
957#ifdef OBJ_ELF
958 case 'l':
959 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 960 sake, recognize -be also. */
252b5132
RH
961 if (strcmp (arg, "e") == 0)
962 {
963 target_big_endian = 0;
964 set_target_endian = 1;
965 }
966 else
967 return 0;
968
969 break;
970
971 case 'b':
972 if (strcmp (arg, "e") == 0)
973 {
974 target_big_endian = 1;
975 set_target_endian = 1;
976 }
977 else
978 return 0;
979
980 break;
981
982 case 'K':
99a814a1 983 /* Recognize -K PIC. */
252b5132
RH
984 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
985 {
986 shlib = SHLIB_PIC;
987 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
988 }
989 else
990 return 0;
991
992 break;
993#endif
994
7f6d05e8
CP
995 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
996 case 'a':
997 if (strcmp (arg, "64") == 0)
2a98c3a6
AM
998 {
999#ifdef BFD64
1000 ppc_obj64 = 1;
1001#else
1002 as_fatal (_("%s unsupported"), "-a64");
1003#endif
1004 }
7f6d05e8 1005 else if (strcmp (arg, "32") == 0)
2b3c4602 1006 ppc_obj64 = 0;
7f6d05e8
CP
1007 else
1008 return 0;
1009 break;
81d4177b 1010
252b5132 1011 case 'm':
69c040df
AM
1012 if (parse_cpu (arg))
1013 ;
252b5132
RH
1014
1015 else if (strcmp (arg, "regnames") == 0)
b34976b6 1016 reg_names_p = TRUE;
252b5132
RH
1017
1018 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1019 reg_names_p = FALSE;
252b5132
RH
1020
1021#ifdef OBJ_ELF
99a814a1
AM
1022 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1023 that require relocation. */
252b5132
RH
1024 else if (strcmp (arg, "relocatable") == 0)
1025 {
5d6f4f16 1026 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
1027 ppc_flags |= EF_PPC_RELOCATABLE;
1028 }
1029
1030 else if (strcmp (arg, "relocatable-lib") == 0)
1031 {
5d6f4f16 1032 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
1033 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1034 }
1035
99a814a1 1036 /* -memb, set embedded bit. */
252b5132
RH
1037 else if (strcmp (arg, "emb") == 0)
1038 ppc_flags |= EF_PPC_EMB;
1039
99a814a1
AM
1040 /* -mlittle/-mbig set the endianess. */
1041 else if (strcmp (arg, "little") == 0
1042 || strcmp (arg, "little-endian") == 0)
252b5132
RH
1043 {
1044 target_big_endian = 0;
1045 set_target_endian = 1;
1046 }
1047
1048 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1049 {
1050 target_big_endian = 1;
1051 set_target_endian = 1;
1052 }
1053
1054 else if (strcmp (arg, "solaris") == 0)
1055 {
b34976b6 1056 msolaris = TRUE;
252b5132
RH
1057 ppc_comment_chars = ppc_solaris_comment_chars;
1058 }
1059
1060 else if (strcmp (arg, "no-solaris") == 0)
1061 {
b34976b6 1062 msolaris = FALSE;
252b5132
RH
1063 ppc_comment_chars = ppc_eabi_comment_chars;
1064 }
1065#endif
1066 else
1067 {
1068 as_bad (_("invalid switch -m%s"), arg);
1069 return 0;
1070 }
1071 break;
1072
1073#ifdef OBJ_ELF
1074 /* -V: SVR4 argument to print version ID. */
1075 case 'V':
1076 print_version_id ();
1077 break;
1078
1079 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1080 should be emitted or not. FIXME: Not implemented. */
1081 case 'Q':
1082 break;
1083
1084 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1085 rather than .stabs.excl, which is ignored by the linker.
1086 FIXME: Not implemented. */
1087 case 's':
1088 if (arg)
1089 return 0;
1090
1091 break;
1092#endif
1093
1094 default:
1095 return 0;
1096 }
1097
1098 return 1;
1099}
1100
1101void
98027b10 1102md_show_usage (FILE *stream)
252b5132 1103{
bc805888 1104 fprintf (stream, _("\
252b5132 1105PowerPC options:\n\
df12615d
AM
1106-a32 generate ELF32/XCOFF32\n\
1107-a64 generate ELF64/XCOFF64\n\
252b5132 1108-u ignored\n\
23e1d84c
AM
1109-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1110-mpwr generate code for POWER (RIOS1)\n\
1111-m601 generate code for PowerPC 601\n\
418c1742 1112-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1113 generate code for PowerPC 603/604\n\
df12615d 1114-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1115-m440 generate code for PowerPC 440\n\
f5c120c5 1116-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE
1117 generate code for PowerPC 7400/7410/7450/7455\n\
1118-m750cl generate code for PowerPC 750cl\n"));
df12615d 1119 fprintf (stream, _("\
23e1d84c 1120-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1121-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG
1122-mbooke64 generate code for 64-bit PowerPC BookE\n\
1123-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1124-mpower4 generate code for Power4 architecture\n\
b0648eec 1125-mpower5 generate code for Power5 architecture\n\
9622b051 1126-mpower6 generate code for Power6 architecture\n\
ede602d7 1127-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1128-mcom generate code Power/PowerPC common instructions\n\
df12615d 1129-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1130 fprintf (stream, _("\
df12615d 1131-maltivec generate code for AltiVec\n\
36ae0db3 1132-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1133-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM
1134-mspe generate code for Motorola SPE instructions\n\
1135-mregnames Allow symbolic names for registers\n\
1136-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1137#ifdef OBJ_ELF
bc805888 1138 fprintf (stream, _("\
252b5132
RH
1139-mrelocatable support for GCC's -mrelocatble option\n\
1140-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1141-memb set PPC_EMB bit in ELF flags\n\
df12615d 1142-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1143 generate code for a little endian machine\n\
df12615d
AM
1144-mbig, -mbig-endian, -b, -be\n\
1145 generate code for a big endian machine\n\
252b5132
RH
1146-msolaris generate code for Solaris\n\
1147-mno-solaris do not generate code for Solaris\n\
1148-V print assembler version number\n\
1149-Qy, -Qn ignored\n"));
1150#endif
1151}
1152\f
1153/* Set ppc_cpu if it is not already set. */
1154
1155static void
98027b10 1156ppc_set_cpu (void)
252b5132
RH
1157{
1158 const char *default_os = TARGET_OS;
1159 const char *default_cpu = TARGET_CPU;
1160
3c9030c1 1161 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1162 {
2a98c3a6 1163 if (ppc_obj64)
3c9030c1 1164 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM
1165 else if (strncmp (default_os, "aix", 3) == 0
1166 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1168 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1170 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1171 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1172 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1173 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1174 else
99a814a1
AM
1175 as_fatal (_("Unknown default cpu = %s, os = %s"),
1176 default_cpu, default_os);
252b5132
RH
1177 }
1178}
1179
9232bbb0
AM
1180/* Figure out the BFD architecture to use. This function and ppc_mach
1181 are called well before md_begin, when the output file is opened. */
252b5132
RH
1182
1183enum bfd_architecture
98027b10 1184ppc_arch (void)
252b5132
RH
1185{
1186 const char *default_cpu = TARGET_CPU;
1187 ppc_set_cpu ();
1188
1189 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1190 return bfd_arch_powerpc;
1191 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1192 return bfd_arch_rs6000;
1193 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1194 {
1195 if (strcmp (default_cpu, "rs6000") == 0)
1196 return bfd_arch_rs6000;
0baf16f2 1197 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH
1198 return bfd_arch_powerpc;
1199 }
1200
1201 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1202 return bfd_arch_unknown;
1203}
1204
7f6d05e8 1205unsigned long
98027b10 1206ppc_mach (void)
7f6d05e8 1207{
2a98c3a6
AM
1208 if (ppc_obj64)
1209 return bfd_mach_ppc64;
1210 else if (ppc_arch () == bfd_arch_rs6000)
1211 return bfd_mach_rs6k;
1212 else
1213 return bfd_mach_ppc;
7f6d05e8
CP
1214}
1215
81d4177b 1216extern char*
98027b10 1217ppc_target_format (void)
7f6d05e8
CP
1218{
1219#ifdef OBJ_COFF
1220#ifdef TE_PE
99a814a1 1221 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1222#elif TE_POWERMAC
0baf16f2 1223 return "xcoff-powermac";
7f6d05e8 1224#else
eb1e0e80 1225# ifdef TE_AIX5
2b3c4602 1226 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# else
2b3c4602 1228 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1229# endif
7f6d05e8 1230#endif
7f6d05e8
CP
1231#endif
1232#ifdef OBJ_ELF
9d8504b1
PB
1233# ifdef TE_VXWORKS
1234 return "elf32-powerpc-vxworks";
1235# else
0baf16f2 1236 return (target_big_endian
2b3c4602
AM
1237 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1238 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1239# endif
7f6d05e8
CP
1240#endif
1241}
1242
69c040df
AM
1243/* Insert opcodes and macros into hash tables. Called at startup and
1244 for .cpu pseudo. */
252b5132 1245
69c040df
AM
1246static void
1247ppc_setup_opcodes (void)
252b5132 1248{
98027b10 1249 const struct powerpc_opcode *op;
252b5132
RH
1250 const struct powerpc_opcode *op_end;
1251 const struct powerpc_macro *macro;
1252 const struct powerpc_macro *macro_end;
b84bf58a 1253 bfd_boolean bad_insn = FALSE;
8dbcd839 1254 unsigned long prev_opcode = 0;
252b5132 1255
69c040df
AM
1256 if (ppc_hash != NULL)
1257 hash_die (ppc_hash);
1258 if (ppc_macro_hash != NULL)
1259 hash_die (ppc_macro_hash);
252b5132
RH
1260
1261 /* Insert the opcodes into a hash table. */
1262 ppc_hash = hash_new ();
1263
c43a438d 1264 if (ENABLE_CHECKING)
b84bf58a 1265 {
c43a438d 1266 unsigned int i;
b84bf58a 1267
c43a438d
AM
1268 /* Check operand masks. Code here and in the disassembler assumes
1269 all the 1's in the mask are contiguous. */
1270 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1271 {
c43a438d
AM
1272 unsigned long mask = powerpc_operands[i].bitm;
1273 unsigned long right_bit;
1274 unsigned int j;
1275
1276 right_bit = mask & -mask;
1277 mask += right_bit;
1278 right_bit = mask & -mask;
1279 if (mask != right_bit)
1280 {
1281 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1282 bad_insn = TRUE;
1283 }
1284 for (j = i + 1; j < num_powerpc_operands; ++j)
1285 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1286 sizeof (powerpc_operands[0])) == 0)
1287 {
1288 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1289 j, i);
1290 bad_insn = TRUE;
1291 }
b84bf58a
AM
1292 }
1293 }
1294
252b5132
RH
1295 op_end = powerpc_opcodes + powerpc_num_opcodes;
1296 for (op = powerpc_opcodes; op < op_end; op++)
1297 {
c43a438d 1298 if (ENABLE_CHECKING)
b84bf58a 1299 {
c43a438d
AM
1300 const unsigned char *o;
1301 unsigned long omask = op->mask;
8dbcd839
PB
1302 unsigned long major_opcode = PPC_OP (op->opcode);
1303
1304 /* The major opcodes had better be sorted. Code in the disassembler
1305 assumes the insns are sorted according to major opcode. */
1306 if (major_opcode < prev_opcode)
1307 {
1308 as_bad (_("major opcode is not sorted for %s"),
1309 op->name);
1310 bad_insn = TRUE;
1311 }
1312 prev_opcode = major_opcode;
c43a438d
AM
1313
1314 /* The mask had better not trim off opcode bits. */
1315 if ((op->opcode & omask) != op->opcode)
1316 {
1317 as_bad (_("mask trims opcode bits for %s"),
1318 op->name);
1319 bad_insn = TRUE;
1320 }
1321
1322 /* The operands must not overlap the opcode or each other. */
1323 for (o = op->operands; *o; ++o)
1324 if (*o >= num_powerpc_operands)
1325 {
1326 as_bad (_("operand index error for %s"),
1327 op->name);
1328 bad_insn = TRUE;
1329 }
1330 else
b84bf58a 1331 {
c43a438d
AM
1332 const struct powerpc_operand *operand = &powerpc_operands[*o];
1333 if (operand->shift >= 0)
b84bf58a 1334 {
c43a438d
AM
1335 unsigned long mask = operand->bitm << operand->shift;
1336 if (omask & mask)
1337 {
1338 as_bad (_("operand %d overlap in %s"),
1339 (int) (o - op->operands), op->name);
1340 bad_insn = TRUE;
1341 }
1342 omask |= mask;
b84bf58a 1343 }
b84bf58a 1344 }
c43a438d 1345 }
252b5132 1346
2b3c4602 1347 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1348 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM
1349 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1350 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1351 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC
1352 /* Certain instructions (eg: extsw) do not exist in the
1353 32-bit BookE instruction set, but they do exist in the
1354 64-bit BookE instruction set, and other PPC instruction
1355 sets. Check to see if the opcode has the BOOKE64 flag set.
1356 If it does make sure that the target CPU is not the BookE32. */
1357 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1358 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1359 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM
1360 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1361 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM
1362 == (ppc_cpu & PPC_OPCODE_POWER4)))
1363 && ((op->flags & PPC_OPCODE_POWER5) == 0
1364 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM
1365 == (ppc_cpu & PPC_OPCODE_POWER5)))
1366 && ((op->flags & PPC_OPCODE_POWER6) == 0
1367 || ((op->flags & PPC_OPCODE_POWER6)
1368 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH
1369 {
1370 const char *retval;
1371
98027b10 1372 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1373 if (retval != NULL)
252b5132 1374 {
99a814a1 1375 /* Ignore Power duplicates for -m601. */
252b5132
RH
1376 if ((ppc_cpu & PPC_OPCODE_601) != 0
1377 && (op->flags & PPC_OPCODE_POWER) != 0)
1378 continue;
1379
b84bf58a 1380 as_bad (_("duplicate instruction %s"),
99a814a1 1381 op->name);
b84bf58a 1382 bad_insn = TRUE;
252b5132
RH
1383 }
1384 }
1385 }
1386
3c9030c1
AM
1387 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1388 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1389 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1390
252b5132
RH
1391 /* Insert the macros into a hash table. */
1392 ppc_macro_hash = hash_new ();
1393
1394 macro_end = powerpc_macros + powerpc_num_macros;
1395 for (macro = powerpc_macros; macro < macro_end; macro++)
1396 {
1397 if ((macro->flags & ppc_cpu) != 0)
1398 {
1399 const char *retval;
1400
98027b10 1401 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH
1402 if (retval != (const char *) NULL)
1403 {
b84bf58a
AM
1404 as_bad (_("duplicate macro %s"), macro->name);
1405 bad_insn = TRUE;
252b5132
RH
1406 }
1407 }
1408 }
1409
b84bf58a 1410 if (bad_insn)
252b5132 1411 abort ();
69c040df
AM
1412}
1413
1414/* This function is called when the assembler starts up. It is called
1415 after the options have been parsed and the output file has been
1416 opened. */
1417
1418void
98027b10 1419md_begin (void)
69c040df
AM
1420{
1421 ppc_set_cpu ();
1422
1423 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1424
1425#ifdef OBJ_ELF
1426 /* Set the ELF flags if desired. */
1427 if (ppc_flags && !msolaris)
1428 bfd_set_private_flags (stdoutput, ppc_flags);
1429#endif
1430
1431 ppc_setup_opcodes ();
252b5132 1432
67c1ffbe 1433 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1434 by the user. */
252b5132
RH
1435 if (!set_target_endian)
1436 {
1437 set_target_endian = 1;
1438 target_big_endian = PPC_BIG_ENDIAN;
1439 }
1440
1441#ifdef OBJ_XCOFF
1442 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1443
1444 /* Create dummy symbols to serve as initial csects. This forces the
1445 text csects to precede the data csects. These symbols will not
1446 be output. */
1447 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1448 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1449 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1450 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH
1451#endif
1452
1453#ifdef TE_PE
1454
1455 ppc_current_section = text_section;
81d4177b 1456 ppc_previous_section = 0;
252b5132
RH
1457
1458#endif
1459}
1460
6a0c61b7 1461void
98027b10 1462ppc_cleanup (void)
6a0c61b7 1463{
dc1d03fc 1464#ifdef OBJ_ELF
6a0c61b7
EZ
1465 if (ppc_apuinfo_list == NULL)
1466 return;
1467
1468 /* Ok, so write the section info out. We have this layout:
1469
1470 byte data what
1471 ---- ---- ----
1472 0 8 length of "APUinfo\0"
1473 4 (n*4) number of APU's (4 bytes each)
1474 8 2 note type 2
1475 12 "APUinfo\0" name
1476 20 APU#1 first APU's info
1477 24 APU#2 second APU's info
1478 ... ...
1479 */
1480 {
1481 char *p;
1482 asection *seg = now_seg;
1483 subsegT subseg = now_subseg;
1484 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1485 unsigned int i;
6a0c61b7
EZ
1486
1487 /* Create the .PPC.EMB.apuinfo section. */
1488 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1489 bfd_set_section_flags (stdoutput,
1490 apuinfo_secp,
e1a9cb8e 1491 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ
1492
1493 p = frag_more (4);
1494 md_number_to_chars (p, (valueT) 8, 4);
1495
1496 p = frag_more (4);
e98d298c 1497 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ
1498
1499 p = frag_more (4);
1500 md_number_to_chars (p, (valueT) 2, 4);
1501
1502 p = frag_more (8);
1503 strcpy (p, "APUinfo");
1504
1505 for (i = 0; i < ppc_apuinfo_num; i++)
1506 {
b34976b6
AM
1507 p = frag_more (4);
1508 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ
1509 }
1510
1511 frag_align (2, 0, 0);
1512
1513 /* We probably can't restore the current segment, for there likely
1514 isn't one yet... */
1515 if (seg && subseg)
1516 subseg_set (seg, subseg);
1517 }
dc1d03fc 1518#endif
6a0c61b7
EZ
1519}
1520
252b5132
RH
1521/* Insert an operand value into an instruction. */
1522
1523static unsigned long
a1867a27
AM
1524ppc_insert_operand (unsigned long insn,
1525 const struct powerpc_operand *operand,
1526 offsetT val,
1527 char *file,
1528 unsigned int line)
252b5132 1529{
b84bf58a 1530 long min, max, right;
eb42fac1 1531
b84bf58a
AM
1532 max = operand->bitm;
1533 right = max & -max;
1534 min = 0;
1535
1536 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1537 {
b84bf58a 1538 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM
1539 max = (max >> 1) & -right;
1540 min = ~max & -right;
b84bf58a 1541 }
252b5132 1542
b84bf58a 1543 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1544 max++;
252b5132 1545
b84bf58a 1546 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM
1547 {
1548 long tmp = min;
1549 min = -max;
1550 max = -tmp;
1551 }
b84bf58a 1552
a1867a27
AM
1553 if (min <= max)
1554 {
1555 /* Some people write constants with the sign extension done by
1556 hand but only up to 32 bits. This shouldn't really be valid,
1557 but, to permit this code to assemble on a 64-bit host, we
1558 sign extend the 32-bit value to 64 bits if so doing makes the
1559 value valid. */
1560 if (val > max
1561 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1562 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1563 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1564 val = val - 0x80000000 - 0x80000000;
1565
1566 /* Similarly, people write expressions like ~(1<<15), and expect
1567 this to be OK for a 32-bit unsigned value. */
1568 else if (val < min
1569 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1570 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1571 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1572 val = val + 0x80000000 + 0x80000000;
1573
1574 else if (val < min
1575 || val > max
1576 || (val & (right - 1)) != 0)
1577 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1578 }
b84bf58a 1579
252b5132
RH
1580 if (operand->insert)
1581 {
1582 const char *errmsg;
1583
1584 errmsg = NULL;
2b3c4602 1585 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1586 if (errmsg != (const char *) NULL)
0baf16f2 1587 as_bad_where (file, line, errmsg);
252b5132
RH
1588 }
1589 else
b84bf58a 1590 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH
1591
1592 return insn;
1593}
1594
1595\f
1596#ifdef OBJ_ELF
1597/* Parse @got, etc. and return the desired relocation. */
1598static bfd_reloc_code_real_type
98027b10 1599ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH
1600{
1601 struct map_bfd {
1602 char *string;
b7d7dc63
AM
1603 unsigned int length : 8;
1604 unsigned int valid32 : 1;
1605 unsigned int valid64 : 1;
1606 unsigned int reloc;
252b5132
RH
1607 };
1608
1609 char ident[20];
1610 char *str = *str_p;
1611 char *str2;
1612 int ch;
1613 int len;
15c1449b 1614 const struct map_bfd *ptr;
252b5132 1615
b7d7dc63
AM
1616#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1617#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1618#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1619
15c1449b 1620 static const struct map_bfd mapping[] = {
b7d7dc63
AM
1621 MAP ("l", BFD_RELOC_LO16),
1622 MAP ("h", BFD_RELOC_HI16),
1623 MAP ("ha", BFD_RELOC_HI16_S),
1624 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1625 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1626 MAP ("got", BFD_RELOC_16_GOTOFF),
1627 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1628 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1629 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1630 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1631 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1632 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1633 MAP ("copy", BFD_RELOC_PPC_COPY),
1634 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1635 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1636 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1637 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1638 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1639 MAP ("tls", BFD_RELOC_PPC_TLS),
1640 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1641 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1642 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1643 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1644 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1645 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1646 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1647 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1648 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1649 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1650 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1651 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1652 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1653 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1654 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1655 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1656 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1657 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1658 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1659 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1660 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1661 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1662 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1663 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1664 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1665 MAP32 ("fixup", BFD_RELOC_CTOR),
1666 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1667 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1668 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1669 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1670 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1671 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1672 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1673 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1674 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1675 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1676 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1677 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1678 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1679 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1680 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1681 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1682 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1683 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1684 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1685 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1686 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1687 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1688 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1689 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1690 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1691 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1692 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1693 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1694 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1695 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1696 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1697 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1698 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1699 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1700 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1701 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1702 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1703 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1704 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1705 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1706 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH
1707 };
1708
1709 if (*str++ != '@')
1710 return BFD_RELOC_UNUSED;
1711
1712 for (ch = *str, str2 = ident;
1713 (str2 < ident + sizeof (ident) - 1
3882b010 1714 && (ISALNUM (ch) || ch == '@'));
252b5132
RH
1715 ch = *++str)
1716 {
3882b010 1717 *str2++ = TOLOWER (ch);
252b5132
RH
1718 }
1719
1720 *str2 = '\0';
1721 len = str2 - ident;
1722
1723 ch = ident[0];
1724 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1725 if (ch == ptr->string[0]
1726 && len == ptr->length
b7d7dc63
AM
1727 && memcmp (ident, ptr->string, ptr->length) == 0
1728 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1729 {
15c1449b
AM
1730 int reloc = ptr->reloc;
1731
cdba85ec 1732 if (!ppc_obj64)
5f6db75a
AM
1733 if (exp_p->X_add_number != 0
1734 && (reloc == (int) BFD_RELOC_16_GOTOFF
1735 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1736 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1737 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1738 as_warn (_("identifier+constant@got means identifier@got+constant"));
1739
1740 /* Now check for identifier@suffix+constant. */
1741 if (*str == '-' || *str == '+')
252b5132 1742 {
5f6db75a
AM
1743 char *orig_line = input_line_pointer;
1744 expressionS new_exp;
1745
1746 input_line_pointer = str;
1747 expression (&new_exp);
1748 if (new_exp.X_op == O_constant)
252b5132 1749 {
5f6db75a
AM
1750 exp_p->X_add_number += new_exp.X_add_number;
1751 str = input_line_pointer;
252b5132 1752 }
5f6db75a
AM
1753
1754 if (&input_line_pointer != str_p)
1755 input_line_pointer = orig_line;
252b5132 1756 }
252b5132 1757 *str_p = str;
0baf16f2 1758
2b3c4602 1759 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM
1760 && exp_p->X_op == O_symbol
1761 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1762 {
9f2b53d7
AM
1763 /* Change the symbol so that the dummy .TOC. symbol can be
1764 omitted from the object file. */
0baf16f2
AM
1765 exp_p->X_add_symbol = &abs_symbol;
1766 }
1767
15c1449b 1768 return (bfd_reloc_code_real_type) reloc;
252b5132
RH
1769 }
1770
1771 return BFD_RELOC_UNUSED;
1772}
1773
99a814a1
AM
1774/* Like normal .long/.short/.word, except support @got, etc.
1775 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1776static void
98027b10 1777ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH
1778{
1779 expressionS exp;
1780 bfd_reloc_code_real_type reloc;
1781
1782 if (is_it_end_of_statement ())
1783 {
1784 demand_empty_rest_of_line ();
1785 return;
1786 }
1787
1788 do
1789 {
1790 expression (&exp);
1791 if (exp.X_op == O_symbol
1792 && *input_line_pointer == '@'
99a814a1
AM
1793 && (reloc = ppc_elf_suffix (&input_line_pointer,
1794 &exp)) != BFD_RELOC_UNUSED)
252b5132 1795 {
99a814a1
AM
1796 reloc_howto_type *reloc_howto;
1797 int size;
1798
1799 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1800 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH
1801
1802 if (size > nbytes)
0baf16f2
AM
1803 {
1804 as_bad (_("%s relocations do not fit in %d bytes\n"),
1805 reloc_howto->name, nbytes);
1806 }
252b5132
RH
1807 else
1808 {
0baf16f2
AM
1809 char *p;
1810 int offset;
252b5132 1811
0baf16f2
AM
1812 p = frag_more (nbytes);
1813 offset = 0;
1814 if (target_big_endian)
1815 offset = nbytes - size;
99a814a1
AM
1816 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1817 &exp, 0, reloc);
252b5132
RH
1818 }
1819 }
1820 else
1821 emit_expr (&exp, (unsigned int) nbytes);
1822 }
1823 while (*input_line_pointer++ == ',');
1824
99a814a1
AM
1825 /* Put terminator back into stream. */
1826 input_line_pointer--;
252b5132
RH
1827 demand_empty_rest_of_line ();
1828}
1829
1830/* Solaris pseduo op to change to the .rodata section. */
1831static void
98027b10 1832ppc_elf_rdata (int xxx)
252b5132
RH
1833{
1834 char *save_line = input_line_pointer;
1835 static char section[] = ".rodata\n";
1836
99a814a1 1837 /* Just pretend this is .section .rodata */
252b5132
RH
1838 input_line_pointer = section;
1839 obj_elf_section (xxx);
1840
1841 input_line_pointer = save_line;
1842}
1843
99a814a1 1844/* Pseudo op to make file scope bss items. */
252b5132 1845static void
98027b10 1846ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1847{
98027b10
AM
1848 char *name;
1849 char c;
1850 char *p;
252b5132 1851 offsetT size;
98027b10 1852 symbolS *symbolP;
252b5132
RH
1853 offsetT align;
1854 segT old_sec;
1855 int old_subsec;
1856 char *pfrag;
1857 int align2;
1858
1859 name = input_line_pointer;
1860 c = get_symbol_end ();
1861
99a814a1 1862 /* just after name is now '\0'. */
252b5132
RH
1863 p = input_line_pointer;
1864 *p = c;
1865 SKIP_WHITESPACE ();
1866 if (*input_line_pointer != ',')
1867 {
1868 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1869 ignore_rest_of_line ();
1870 return;
1871 }
1872
1873 input_line_pointer++; /* skip ',' */
1874 if ((size = get_absolute_expression ()) < 0)
1875 {
1876 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1877 ignore_rest_of_line ();
1878 return;
1879 }
1880
1881 /* The third argument to .lcomm is the alignment. */
1882 if (*input_line_pointer != ',')
1883 align = 8;
1884 else
1885 {
1886 ++input_line_pointer;
1887 align = get_absolute_expression ();
1888 if (align <= 0)
1889 {
1890 as_warn (_("ignoring bad alignment"));
1891 align = 8;
1892 }
1893 }
1894
1895 *p = 0;
1896 symbolP = symbol_find_or_make (name);
1897 *p = c;
1898
1899 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1900 {
1901 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1902 S_GET_NAME (symbolP));
1903 ignore_rest_of_line ();
1904 return;
1905 }
1906
1907 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1908 {
1909 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1910 S_GET_NAME (symbolP),
1911 (long) S_GET_VALUE (symbolP),
1912 (long) size);
1913
1914 ignore_rest_of_line ();
1915 return;
1916 }
1917
99a814a1 1918 /* Allocate_bss. */
252b5132
RH
1919 old_sec = now_seg;
1920 old_subsec = now_subseg;
1921 if (align)
1922 {
99a814a1 1923 /* Convert to a power of 2 alignment. */
252b5132
RH
1924 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1925 if (align != 1)
1926 {
1927 as_bad (_("Common alignment not a power of 2"));
1928 ignore_rest_of_line ();
1929 return;
1930 }
1931 }
1932 else
1933 align2 = 0;
1934
1935 record_alignment (bss_section, align2);
1936 subseg_set (bss_section, 0);
1937 if (align2)
1938 frag_align (align2, 0, 0);
1939 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT
1940 symbol_get_frag (symbolP)->fr_symbol = 0;
1941 symbol_set_frag (symbolP, frag_now);
252b5132
RH
1942 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1943 (char *) 0);
1944 *pfrag = 0;
1945 S_SET_SIZE (symbolP, size);
1946 S_SET_SEGMENT (symbolP, bss_section);
1947 subseg_set (old_sec, old_subsec);
1948 demand_empty_rest_of_line ();
1949}
1950
1951/* Validate any relocations emitted for -mrelocatable, possibly adding
1952 fixups for word relocations in writable segments, so we can adjust
1953 them at runtime. */
1954static void
98027b10 1955ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH
1956{
1957 if (fixp->fx_done || fixp->fx_pcrel)
1958 return;
1959
1960 switch (shlib)
1961 {
1962 case SHLIB_NONE:
1963 case SHLIB_PIC:
1964 return;
1965
5d6f4f16 1966 case SHLIB_MRELOCATABLE:
252b5132
RH
1967 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1968 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1969 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1970 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1971 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1972 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH
1973 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1974 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1975 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1976 && (seg->flags & SEC_LOAD) != 0
252b5132
RH
1977 && strcmp (segment_name (seg), ".got2") != 0
1978 && strcmp (segment_name (seg), ".dtors") != 0
1979 && strcmp (segment_name (seg), ".ctors") != 0
1980 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH
1981 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1982 && strcmp (segment_name (seg), ".eh_frame") != 0
1983 && strcmp (segment_name (seg), ".ex_shared") != 0)
1984 {
1985 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1986 || fixp->fx_r_type != BFD_RELOC_CTOR)
1987 {
1988 as_bad_where (fixp->fx_file, fixp->fx_line,
1989 _("Relocation cannot be done when using -mrelocatable"));
1990 }
1991 }
1992 return;
1993 }
1994}
0baf16f2 1995
7e8d4ab4
AM
1996/* Prevent elf_frob_file_before_adjust removing a weak undefined
1997 function descriptor sym if the corresponding code sym is used. */
1998
1999void
98027b10 2000ppc_frob_file_before_adjust (void)
0baf16f2 2001{
7e8d4ab4 2002 symbolS *symp;
9232bbb0 2003 asection *toc;
0baf16f2 2004
7e8d4ab4
AM
2005 if (!ppc_obj64)
2006 return;
2007
2008 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2009 {
7e8d4ab4
AM
2010 const char *name;
2011 char *dotname;
2012 symbolS *dotsym;
2013 size_t len;
2014
2015 name = S_GET_NAME (symp);
2016 if (name[0] == '.')
2017 continue;
2018
2019 if (! S_IS_WEAK (symp)
2020 || S_IS_DEFINED (symp))
2021 continue;
2022
2023 len = strlen (name) + 1;
2024 dotname = xmalloc (len + 1);
2025 dotname[0] = '.';
2026 memcpy (dotname + 1, name, len);
461b725f 2027 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM
2028 free (dotname);
2029 if (dotsym != NULL && (symbol_used_p (dotsym)
2030 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC
2031 symbol_mark_used (symp);
2032
0baf16f2
AM
2033 }
2034
9232bbb0
AM
2035 toc = bfd_get_section_by_name (stdoutput, ".toc");
2036 if (toc != NULL
2037 && bfd_section_size (stdoutput, toc) > 0x10000)
2038 as_warn (_("TOC section size exceeds 64k"));
2039
7e8d4ab4
AM
2040 /* Don't emit .TOC. symbol. */
2041 symp = symbol_find (".TOC.");
2042 if (symp != NULL)
2043 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2044}
252b5132
RH
2045#endif /* OBJ_ELF */
2046\f
2047#ifdef TE_PE
2048
2049/*
99a814a1 2050 * Summary of parse_toc_entry.
252b5132
RH
2051 *
2052 * in: Input_line_pointer points to the '[' in one of:
2053 *
2054 * [toc] [tocv] [toc32] [toc64]
2055 *
2056 * Anything else is an error of one kind or another.
2057 *
81d4177b 2058 * out:
252b5132
RH
2059 * return value: success or failure
2060 * toc_kind: kind of toc reference
2061 * input_line_pointer:
2062 * success: first char after the ']'
2063 * failure: unchanged
2064 *
2065 * settings:
2066 *
2067 * [toc] - rv == success, toc_kind = default_toc
2068 * [tocv] - rv == success, toc_kind = data_in_toc
2069 * [toc32] - rv == success, toc_kind = must_be_32
2070 * [toc64] - rv == success, toc_kind = must_be_64
2071 *
2072 */
2073
81d4177b
KH
2074enum toc_size_qualifier
2075{
252b5132
RH
2076 default_toc, /* The toc cell constructed should be the system default size */
2077 data_in_toc, /* This is a direct reference to a toc cell */
2078 must_be_32, /* The toc cell constructed must be 32 bits wide */
2079 must_be_64 /* The toc cell constructed must be 64 bits wide */
2080};
2081
2082static int
98027b10 2083parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH
2084{
2085 char *start;
2086 char *toc_spec;
2087 char c;
2088 enum toc_size_qualifier t;
2089
99a814a1 2090 /* Save the input_line_pointer. */
252b5132
RH
2091 start = input_line_pointer;
2092
99a814a1 2093 /* Skip over the '[' , and whitespace. */
252b5132
RH
2094 ++input_line_pointer;
2095 SKIP_WHITESPACE ();
81d4177b 2096
99a814a1 2097 /* Find the spelling of the operand. */
252b5132
RH
2098 toc_spec = input_line_pointer;
2099 c = get_symbol_end ();
2100
99a814a1 2101 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH
2102 {
2103 t = default_toc;
2104 }
99a814a1 2105 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH
2106 {
2107 t = data_in_toc;
2108 }
99a814a1 2109 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH
2110 {
2111 t = must_be_32;
2112 }
99a814a1 2113 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH
2114 {
2115 t = must_be_64;
2116 }
2117 else
2118 {
2119 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM
2120 *input_line_pointer = c;
2121 input_line_pointer = start;
252b5132
RH
2122 return 0;
2123 }
2124
99a814a1
AM
2125 /* Now find the ']'. */
2126 *input_line_pointer = c;
252b5132 2127
81d4177b
KH
2128 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2129 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH
2130
2131 if (c != ']')
2132 {
2133 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2134 input_line_pointer = start;
252b5132
RH
2135 return 0;
2136 }
2137
99a814a1 2138 *toc_kind = t;
252b5132
RH
2139 return 1;
2140}
2141#endif
2142\f
2143
dc1d03fc 2144#ifdef OBJ_ELF
6a0c61b7
EZ
2145#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2146static void
98027b10 2147ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ
2148{
2149 unsigned int i;
2150
2151 /* Check we don't already exist. */
2152 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2153 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2154 return;
b34976b6 2155
6a0c61b7
EZ
2156 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2157 {
2158 if (ppc_apuinfo_num_alloc == 0)
2159 {
2160 ppc_apuinfo_num_alloc = 4;
2161 ppc_apuinfo_list = (unsigned long *)
2162 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2163 }
2164 else
2165 {
2166 ppc_apuinfo_num_alloc += 4;
2167 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2168 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2169 }
2170 }
dc1d03fc 2171 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ
2172}
2173#undef APUID
dc1d03fc 2174#endif
6a0c61b7
EZ
2175\f
2176
252b5132
RH
2177/* We need to keep a list of fixups. We can't simply generate them as
2178 we go, because that would require us to first create the frag, and
2179 that would screw up references to ``.''. */
2180
2181struct ppc_fixup
2182{
2183 expressionS exp;
2184 int opindex;
2185 bfd_reloc_code_real_type reloc;
2186};
2187
2188#define MAX_INSN_FIXUPS (5)
2189
2190/* This routine is called for each instruction to be assembled. */
2191
2192void
98027b10 2193md_assemble (char *str)
252b5132
RH
2194{
2195 char *s;
2196 const struct powerpc_opcode *opcode;
2197 unsigned long insn;
2198 const unsigned char *opindex_ptr;
2199 int skip_optional;
2200 int need_paren;
2201 int next_opindex;
2202 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2203 int fc;
2204 char *f;
09b935ac 2205 int addr_mod;
252b5132
RH
2206 int i;
2207#ifdef OBJ_ELF
2208 bfd_reloc_code_real_type reloc;
2209#endif
2210
2211 /* Get the opcode. */
3882b010 2212 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH
2213 ;
2214 if (*s != '\0')
2215 *s++ = '\0';
2216
2217 /* Look up the opcode in the hash table. */
2218 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2219 if (opcode == (const struct powerpc_opcode *) NULL)
2220 {
2221 const struct powerpc_macro *macro;
2222
2223 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2224 if (macro == (const struct powerpc_macro *) NULL)
2225 as_bad (_("Unrecognized opcode: `%s'"), str);
2226 else
2227 ppc_macro (s, macro);
2228
2229 return;
2230 }
2231
2232 insn = opcode->opcode;
2233
2234 str = s;
3882b010 2235 while (ISSPACE (*str))
252b5132
RH
2236 ++str;
2237
2238 /* PowerPC operands are just expressions. The only real issue is
2239 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW
2240 an optional operand separate the operands only with commas (in some
2241 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2242 have optional operands). Most instructions with optional operands
2243 have only one. Those that have more than one optional operand can
2244 take either all their operands or none. So, before we start seriously
2245 parsing the operands, we check to see if we have optional operands,
2246 and if we do, we count the number of commas to see which operands
2247 have been omitted. */
252b5132
RH
2248 skip_optional = 0;
2249 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2250 {
2251 const struct powerpc_operand *operand;
2252
2253 operand = &powerpc_operands[*opindex_ptr];
2254 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2255 {
2256 unsigned int opcount;
7fe9cf6b
NC
2257 unsigned int num_operands_expected;
2258 unsigned int i;
252b5132
RH
2259
2260 /* There is an optional operand. Count the number of
2261 commas in the input line. */
2262 if (*str == '\0')
2263 opcount = 0;
2264 else
2265 {
2266 opcount = 1;
2267 s = str;
2268 while ((s = strchr (s, ',')) != (char *) NULL)
2269 {
2270 ++opcount;
2271 ++s;
2272 }
2273 }
2274
7fe9cf6b
NC
2275 /* Compute the number of expected operands.
2276 Do not count fake operands. */
2277 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2278 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2279 ++ num_operands_expected;
2280
252b5132
RH
2281 /* If there are fewer operands in the line then are called
2282 for by the instruction, we want to skip the optional
1f6c9eb0 2283 operands. */
7fe9cf6b 2284 if (opcount < num_operands_expected)
252b5132
RH
2285 skip_optional = 1;
2286
2287 break;
2288 }
2289 }
2290
2291 /* Gather the operands. */
2292 need_paren = 0;
2293 next_opindex = 0;
2294 fc = 0;
2295 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2296 {
2297 const struct powerpc_operand *operand;
2298 const char *errmsg;
2299 char *hold;
2300 expressionS ex;
2301 char endc;
2302
2303 if (next_opindex == 0)
2304 operand = &powerpc_operands[*opindex_ptr];
2305 else
2306 {
2307 operand = &powerpc_operands[next_opindex];
2308 next_opindex = 0;
2309 }
252b5132
RH
2310 errmsg = NULL;
2311
2312 /* If this is a fake operand, then we do not expect anything
2313 from the input. */
2314 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2315 {
2b3c4602 2316 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2317 if (errmsg != (const char *) NULL)
2318 as_bad (errmsg);
2319 continue;
2320 }
2321
2322 /* If this is an optional operand, and we are skipping it, just
2323 insert a zero. */
2324 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2325 && skip_optional)
2326 {
2327 if (operand->insert)
2328 {
2b3c4602 2329 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2330 if (errmsg != (const char *) NULL)
2331 as_bad (errmsg);
2332 }
2333 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2334 next_opindex = *opindex_ptr + 1;
2335 continue;
2336 }
2337
2338 /* Gather the operand. */
2339 hold = input_line_pointer;
2340 input_line_pointer = str;
2341
2342#ifdef TE_PE
81d4177b 2343 if (*input_line_pointer == '[')
252b5132
RH
2344 {
2345 /* We are expecting something like the second argument here:
99a814a1
AM
2346 *
2347 * lwz r4,[toc].GS.0.static_int(rtoc)
2348 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2349 * The argument following the `]' must be a symbol name, and the
2350 * register must be the toc register: 'rtoc' or '2'
2351 *
2352 * The effect is to 0 as the displacement field
2353 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2354 * the appropriate variation) reloc against it based on the symbol.
2355 * The linker will build the toc, and insert the resolved toc offset.
2356 *
2357 * Note:
2358 * o The size of the toc entry is currently assumed to be
2359 * 32 bits. This should not be assumed to be a hard coded
2360 * number.
2361 * o In an effort to cope with a change from 32 to 64 bits,
2362 * there are also toc entries that are specified to be
2363 * either 32 or 64 bits:
2364 * lwz r4,[toc32].GS.0.static_int(rtoc)
2365 * lwz r4,[toc64].GS.0.static_int(rtoc)
2366 * These demand toc entries of the specified size, and the
2367 * instruction probably requires it.
2368 */
252b5132
RH
2369
2370 int valid_toc;
2371 enum toc_size_qualifier toc_kind;
2372 bfd_reloc_code_real_type toc_reloc;
2373
99a814a1
AM
2374 /* Go parse off the [tocXX] part. */
2375 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2376
81d4177b 2377 if (!valid_toc)
252b5132 2378 {
99a814a1
AM
2379 /* Note: message has already been issued.
2380 FIXME: what sort of recovery should we do?
2381 demand_rest_of_line (); return; ? */
252b5132
RH
2382 }
2383
99a814a1
AM
2384 /* Now get the symbol following the ']'. */
2385 expression (&ex);
252b5132
RH
2386
2387 switch (toc_kind)
2388 {
2389 case default_toc:
99a814a1
AM
2390 /* In this case, we may not have seen the symbol yet,
2391 since it is allowed to appear on a .extern or .globl
2392 or just be a label in the .data section. */
252b5132
RH
2393 toc_reloc = BFD_RELOC_PPC_TOC16;
2394 break;
2395 case data_in_toc:
99a814a1
AM
2396 /* 1. The symbol must be defined and either in the toc
2397 section, or a global.
2398 2. The reloc generated must have the TOCDEFN flag set
2399 in upper bit mess of the reloc type.
2400 FIXME: It's a little confusing what the tocv
2401 qualifier can be used for. At the very least, I've
2402 seen three uses, only one of which I'm sure I can
2403 explain. */
81d4177b
KH
2404 if (ex.X_op == O_symbol)
2405 {
252b5132 2406 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT
2407 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2408 != tocdata_section)
252b5132 2409 {
99a814a1 2410 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH
2411 }
2412 }
2413
2414 toc_reloc = BFD_RELOC_PPC_TOC16;
2415 break;
2416 case must_be_32:
99a814a1
AM
2417 /* FIXME: these next two specifically specify 32/64 bit
2418 toc entries. We don't support them today. Is this
2419 the right way to say that? */
252b5132
RH
2420 toc_reloc = BFD_RELOC_UNUSED;
2421 as_bad (_("Unimplemented toc32 expression modifier"));
2422 break;
2423 case must_be_64:
99a814a1 2424 /* FIXME: see above. */
252b5132
RH
2425 toc_reloc = BFD_RELOC_UNUSED;
2426 as_bad (_("Unimplemented toc64 expression modifier"));
2427 break;
2428 default:
bc805888 2429 fprintf (stderr,
99a814a1
AM
2430 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2431 toc_kind);
bc805888 2432 abort ();
252b5132
RH
2433 break;
2434 }
2435
2436 /* We need to generate a fixup for this expression. */
2437 if (fc >= MAX_INSN_FIXUPS)
2438 as_fatal (_("too many fixups"));
2439
2440 fixups[fc].reloc = toc_reloc;
2441 fixups[fc].exp = ex;
2442 fixups[fc].opindex = *opindex_ptr;
2443 ++fc;
2444
99a814a1
AM
2445 /* Ok. We've set up the fixup for the instruction. Now make it
2446 look like the constant 0 was found here. */
252b5132
RH
2447 ex.X_unsigned = 1;
2448 ex.X_op = O_constant;
2449 ex.X_add_number = 0;
2450 ex.X_add_symbol = NULL;
2451 ex.X_op_symbol = NULL;
2452 }
2453
2454 else
2455#endif /* TE_PE */
2456 {
2ad068be
AM
2457 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2458 || !register_name (&ex))
252b5132 2459 {
13abbae3
AM
2460 char save_lex = lex_type['%'];
2461
252b5132 2462 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM
2463 {
2464 cr_operand = TRUE;
2465 lex_type['%'] |= LEX_BEGIN_NAME;
2466 }
252b5132 2467 expression (&ex);
b34976b6 2468 cr_operand = FALSE;
13abbae3 2469 lex_type['%'] = save_lex;
252b5132
RH
2470 }
2471 }
2472
2473 str = input_line_pointer;
2474 input_line_pointer = hold;
2475
2476 if (ex.X_op == O_illegal)
2477 as_bad (_("illegal operand"));
2478 else if (ex.X_op == O_absent)
2479 as_bad (_("missing operand"));
2480 else if (ex.X_op == O_register)
2481 {
2482 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2483 (char *) NULL, 0);
2484 }
2485 else if (ex.X_op == O_constant)
2486 {
2487#ifdef OBJ_ELF
81d4177b 2488 /* Allow @HA, @L, @H on constants. */
252b5132
RH
2489 char *orig_str = str;
2490
2491 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2492 switch (reloc)
2493 {
2494 default:
2495 str = orig_str;
2496 break;
2497
2498 case BFD_RELOC_LO16:
2499 /* X_unsigned is the default, so if the user has done
0baf16f2
AM
2500 something which cleared it, we always produce a
2501 signed value. */
2502 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH
2503 ex.X_add_number &= 0xffff;
2504 else
0baf16f2 2505 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH
2506 break;
2507
2508 case BFD_RELOC_HI16:
0baf16f2
AM
2509 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2510 ex.X_add_number = PPC_HI (ex.X_add_number);
2511 else
2512 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH
2513 break;
2514
2515 case BFD_RELOC_HI16_S:
0baf16f2
AM
2516 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2517 ex.X_add_number = PPC_HA (ex.X_add_number);
2518 else
2519 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2520 break;
2521
0baf16f2
AM
2522 case BFD_RELOC_PPC64_HIGHER:
2523 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2524 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2525 else
2526 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2527 break;
2528
2529 case BFD_RELOC_PPC64_HIGHER_S:
2530 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2531 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2532 else
2533 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2534 break;
0baf16f2
AM
2535
2536 case BFD_RELOC_PPC64_HIGHEST:
2537 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2538 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2539 else
2540 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2541 break;
2542
2543 case BFD_RELOC_PPC64_HIGHEST_S:
2544 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2545 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2546 else
2547 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2548 break;
252b5132 2549 }
0baf16f2 2550#endif /* OBJ_ELF */
252b5132
RH
2551 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2552 (char *) NULL, 0);
2553 }
2554#ifdef OBJ_ELF
2555 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2556 {
cdba85ec
AM
2557 /* Some TLS tweaks. */
2558 switch (reloc)
2559 {
2560 default:
2561 break;
2562 case BFD_RELOC_PPC_TLS:
2563 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2564 (char *) NULL, 0);
2565 break;
2566 /* We'll only use the 32 (or 64) bit form of these relocations
2567 in constants. Instructions get the 16 bit form. */
2568 case BFD_RELOC_PPC_DTPREL:
2569 reloc = BFD_RELOC_PPC_DTPREL16;
2570 break;
2571 case BFD_RELOC_PPC_TPREL:
2572 reloc = BFD_RELOC_PPC_TPREL16;
2573 break;
2574 }
2575
99a814a1
AM
2576 /* For the absolute forms of branches, convert the PC
2577 relative form back into the absolute. */
252b5132
RH
2578 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2579 {
2580 switch (reloc)
2581 {
2582 case BFD_RELOC_PPC_B26:
2583 reloc = BFD_RELOC_PPC_BA26;
2584 break;
2585 case BFD_RELOC_PPC_B16:
2586 reloc = BFD_RELOC_PPC_BA16;
2587 break;
2588 case BFD_RELOC_PPC_B16_BRTAKEN:
2589 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2590 break;
2591 case BFD_RELOC_PPC_B16_BRNTAKEN:
2592 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2593 break;
2594 default:
2595 break;
2596 }
2597 }
2598
2b3c4602 2599 if (ppc_obj64
adadcc0c 2600 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM
2601 {
2602 switch (reloc)
2603 {
2604 case BFD_RELOC_16:
2605 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2606 break;
2607 case BFD_RELOC_LO16:
2608 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2609 break;
2610 case BFD_RELOC_16_GOTOFF:
2611 reloc = BFD_RELOC_PPC64_GOT16_DS;
2612 break;
2613 case BFD_RELOC_LO16_GOTOFF:
2614 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2615 break;
2616 case BFD_RELOC_LO16_PLTOFF:
2617 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2618 break;
1cfc59d5 2619 case BFD_RELOC_16_BASEREL:
0baf16f2
AM
2620 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2621 break;
2622 case BFD_RELOC_LO16_BASEREL:
2623 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2624 break;
2625 case BFD_RELOC_PPC_TOC16:
2626 reloc = BFD_RELOC_PPC64_TOC16_DS;
2627 break;
2628 case BFD_RELOC_PPC64_TOC16_LO:
2629 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2630 break;
2631 case BFD_RELOC_PPC64_PLTGOT16:
2632 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2633 break;
2634 case BFD_RELOC_PPC64_PLTGOT16_LO:
2635 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2636 break;
cdba85ec
AM
2637 case BFD_RELOC_PPC_DTPREL16:
2638 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2639 break;
2640 case BFD_RELOC_PPC_DTPREL16_LO:
2641 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2642 break;
2643 case BFD_RELOC_PPC_TPREL16:
2644 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2645 break;
2646 case BFD_RELOC_PPC_TPREL16_LO:
2647 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2648 break;
2649 case BFD_RELOC_PPC_GOT_DTPREL16:
2650 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2651 case BFD_RELOC_PPC_GOT_TPREL16:
2652 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2653 break;
0baf16f2
AM
2654 default:
2655 as_bad (_("unsupported relocation for DS offset field"));
2656 break;
2657 }
2658 }
2659
252b5132
RH
2660 /* We need to generate a fixup for this expression. */
2661 if (fc >= MAX_INSN_FIXUPS)
2662 as_fatal (_("too many fixups"));
2663 fixups[fc].exp = ex;
2664 fixups[fc].opindex = 0;
2665 fixups[fc].reloc = reloc;
2666 ++fc;
2667 }
2668#endif /* OBJ_ELF */
2669
2670 else
2671 {
2672 /* We need to generate a fixup for this expression. */
2673 if (fc >= MAX_INSN_FIXUPS)
2674 as_fatal (_("too many fixups"));
2675 fixups[fc].exp = ex;
2676 fixups[fc].opindex = *opindex_ptr;
2677 fixups[fc].reloc = BFD_RELOC_UNUSED;
2678 ++fc;
2679 }
2680
2681 if (need_paren)
2682 {
2683 endc = ')';
2684 need_paren = 0;
c3d65c1c
BE
2685 /* If expecting more operands, then we want to see "),". */
2686 if (*str == endc && opindex_ptr[1] != 0)
2687 {
2688 do
2689 ++str;
2690 while (ISSPACE (*str));
2691 endc = ',';
2692 }
252b5132
RH
2693 }
2694 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2695 {
2696 endc = '(';
2697 need_paren = 1;
2698 }
2699 else
2700 endc = ',';
2701
2702 /* The call to expression should have advanced str past any
2703 whitespace. */
2704 if (*str != endc
2705 && (endc != ',' || *str != '\0'))
2706 {
2707 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2708 break;
2709 }
2710
2711 if (*str != '\0')
2712 ++str;
2713 }
2714
3882b010 2715 while (ISSPACE (*str))
252b5132
RH
2716 ++str;
2717
2718 if (*str != '\0')
2719 as_bad (_("junk at end of line: `%s'"), str);
2720
dc1d03fc 2721#ifdef OBJ_ELF
6a0c61b7
EZ
2722 /* Do we need/want a APUinfo section? */
2723 if (ppc_cpu & (PPC_OPCODE_SPE
2724 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2725 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2726 | PPC_OPCODE_RFMCI))
2727 {
2728 /* These are all version "1". */
2729 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2730 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2731 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2732 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2733 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2734 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2735 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2736 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2737 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2738 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2739 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2740 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2741 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2742 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2743 }
dc1d03fc 2744#endif
6a0c61b7 2745
252b5132
RH
2746 /* Write out the instruction. */
2747 f = frag_more (4);
09b935ac
AM
2748 addr_mod = frag_now_fix () & 3;
2749 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2750 as_bad (_("instruction address is not a multiple of 4"));
2751 frag_now->insn_addr = addr_mod;
2752 frag_now->has_code = 1;
252b5132
RH
2753 md_number_to_chars (f, insn, 4);
2754
5d6f4f16
GK
2755#ifdef OBJ_ELF
2756 dwarf2_emit_insn (4);
2757#endif
2758
252b5132
RH
2759 /* Create any fixups. At this point we do not use a
2760 bfd_reloc_code_real_type, but instead just use the
2761 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2762 handle fixups for any operand type, although that is admittedly
2763 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2764 md_apply_fix. */
252b5132
RH
2765 for (i = 0; i < fc; i++)
2766 {
2767 const struct powerpc_operand *operand;
2768
2769 operand = &powerpc_operands[fixups[i].opindex];
2770 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2771 {
99a814a1 2772 reloc_howto_type *reloc_howto;
252b5132
RH
2773 int size;
2774 int offset;
2775 fixS *fixP;
2776
99a814a1 2777 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH
2778 if (!reloc_howto)
2779 abort ();
2780
2781 size = bfd_get_reloc_size (reloc_howto);
2782 offset = target_big_endian ? (4 - size) : 0;
2783
2784 if (size < 1 || size > 4)
bc805888 2785 abort ();
252b5132 2786
99a814a1
AM
2787 fixP = fix_new_exp (frag_now,
2788 f - frag_now->fr_literal + offset,
2789 size,
2790 &fixups[i].exp,
2791 reloc_howto->pc_relative,
252b5132
RH
2792 fixups[i].reloc);
2793
2794 /* Turn off complaints that the addend is too large for things like
2795 foo+100000@ha. */
2796 switch (fixups[i].reloc)
2797 {
2798 case BFD_RELOC_16_GOTOFF:
2799 case BFD_RELOC_PPC_TOC16:
2800 case BFD_RELOC_LO16:
2801 case BFD_RELOC_HI16:
2802 case BFD_RELOC_HI16_S:
0baf16f2 2803#ifdef OBJ_ELF
0baf16f2
AM
2804 case BFD_RELOC_PPC64_HIGHER:
2805 case BFD_RELOC_PPC64_HIGHER_S:
2806 case BFD_RELOC_PPC64_HIGHEST:
2807 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2808#endif
252b5132
RH
2809 fixP->fx_no_overflow = 1;
2810 break;
2811 default:
2812 break;
2813 }
2814 }
2815 else
99a814a1
AM
2816 fix_new_exp (frag_now,
2817 f - frag_now->fr_literal,
2818 4,
252b5132
RH
2819 &fixups[i].exp,
2820 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2821 ((bfd_reloc_code_real_type)
99a814a1 2822 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH
2823 }
2824}
2825
2826/* Handle a macro. Gather all the operands, transform them as
2827 described by the macro, and call md_assemble recursively. All the
2828 operands are separated by commas; we don't accept parentheses
2829 around operands here. */
2830
2831static void
98027b10 2832ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH
2833{
2834 char *operands[10];
2835 unsigned int count;
2836 char *s;
2837 unsigned int len;
2838 const char *format;
db557034 2839 unsigned int arg;
252b5132
RH
2840 char *send;
2841 char *complete;
2842
2843 /* Gather the users operands into the operands array. */
2844 count = 0;
2845 s = str;
2846 while (1)
2847 {
2848 if (count >= sizeof operands / sizeof operands[0])
2849 break;
2850 operands[count++] = s;
2851 s = strchr (s, ',');
2852 if (s == (char *) NULL)
2853 break;
2854 *s++ = '\0';
81d4177b 2855 }
252b5132
RH
2856
2857 if (count != macro->operands)
2858 {
2859 as_bad (_("wrong number of operands"));
2860 return;
2861 }
2862
2863 /* Work out how large the string must be (the size is unbounded
2864 because it includes user input). */
2865 len = 0;
2866 format = macro->format;
2867 while (*format != '\0')
2868 {
2869 if (*format != '%')
2870 {
2871 ++len;
2872 ++format;
2873 }
2874 else
2875 {
2876 arg = strtol (format + 1, &send, 10);
db557034 2877 know (send != format && arg < count);
252b5132
RH
2878 len += strlen (operands[arg]);
2879 format = send;
2880 }
2881 }
2882
2883 /* Put the string together. */
2884 complete = s = (char *) alloca (len + 1);
2885 format = macro->format;
2886 while (*format != '\0')
2887 {
2888 if (*format != '%')
2889 *s++ = *format++;
2890 else
2891 {
2892 arg = strtol (format + 1, &send, 10);
2893 strcpy (s, operands[arg]);
2894 s += strlen (s);
2895 format = send;
2896 }
2897 }
2898 *s = '\0';
2899
2900 /* Assemble the constructed instruction. */
2901 md_assemble (complete);
81d4177b 2902}
252b5132
RH
2903\f
2904#ifdef OBJ_ELF
99a814a1 2905/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH
2906
2907int
98027b10 2908ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH
2909{
2910 if (letter == 'e')
2911 return SHF_EXCLUDE;
2912
13ae64f3 2913 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2914 return -1;
252b5132
RH
2915}
2916
2917int
98027b10 2918ppc_section_word (char *str, size_t len)
252b5132 2919{
9de8d8f1
RH
2920 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2921 return SHF_EXCLUDE;
252b5132 2922
9de8d8f1 2923 return -1;
252b5132
RH
2924}
2925
2926int
98027b10 2927ppc_section_type (char *str, size_t len)
252b5132 2928{
9de8d8f1
RH
2929 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2930 return SHT_ORDERED;
252b5132 2931
9de8d8f1 2932 return -1;
252b5132
RH
2933}
2934
2935int
98027b10 2936ppc_section_flags (int flags, int attr, int type)
252b5132
RH
2937{
2938 if (type == SHT_ORDERED)
2939 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2940
2941 if (attr & SHF_EXCLUDE)
2942 flags |= SEC_EXCLUDE;
2943
2944 return flags;
2945}
2946#endif /* OBJ_ELF */
2947
2948\f
2949/* Pseudo-op handling. */
2950
2951/* The .byte pseudo-op. This is similar to the normal .byte
2952 pseudo-op, but it can also take a single ASCII string. */
2953
2954static void
98027b10 2955ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
2956{
2957 if (*input_line_pointer != '\"')
2958 {
2959 cons (1);
2960 return;
2961 }
2962
2963 /* Gather characters. A real double quote is doubled. Unusual
2964 characters are not permitted. */
2965 ++input_line_pointer;
2966 while (1)
2967 {
2968 char c;
2969
2970 c = *input_line_pointer++;
2971
2972 if (c == '\"')
2973 {
2974 if (*input_line_pointer != '\"')
2975 break;
2976 ++input_line_pointer;
2977 }
2978
2979 FRAG_APPEND_1_CHAR (c);
2980 }
2981
2982 demand_empty_rest_of_line ();
2983}
2984\f
2985#ifdef OBJ_XCOFF
2986
2987/* XCOFF specific pseudo-op handling. */
2988
2989/* This is set if we are creating a .stabx symbol, since we don't want
2990 to handle symbol suffixes for such symbols. */
b34976b6 2991static bfd_boolean ppc_stab_symbol;
252b5132
RH
2992
2993/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2994 symbols in the .bss segment as though they were local common
67c1ffbe 2995 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2996 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH
2997
2998static void
98027b10 2999ppc_comm (int lcomm)
252b5132
RH
3000{
3001 asection *current_seg = now_seg;
3002 subsegT current_subseg = now_subseg;
3003 char *name;
3004 char endc;
3005 char *end_name;
3006 offsetT size;
3007 offsetT align;
3008 symbolS *lcomm_sym = NULL;
3009 symbolS *sym;
3010 char *pfrag;
3011
3012 name = input_line_pointer;
3013 endc = get_symbol_end ();
3014 end_name = input_line_pointer;
3015 *end_name = endc;
3016
3017 if (*input_line_pointer != ',')
3018 {
3019 as_bad (_("missing size"));
3020 ignore_rest_of_line ();
3021 return;
3022 }
3023 ++input_line_pointer;
3024
3025 size = get_absolute_expression ();
3026 if (size < 0)
3027 {
3028 as_bad (_("negative size"));
3029 ignore_rest_of_line ();
3030 return;
3031 }
3032
3033 if (! lcomm)
3034 {
3035 /* The third argument to .comm is the alignment. */
3036 if (*input_line_pointer != ',')
1ad63b2f 3037 align = 2;
252b5132
RH
3038 else
3039 {
3040 ++input_line_pointer;
3041 align = get_absolute_expression ();
3042 if (align <= 0)
3043 {
3044 as_warn (_("ignoring bad alignment"));
1ad63b2f 3045 align = 2;
252b5132
RH
3046 }
3047 }
3048 }
3049 else
3050 {
3051 char *lcomm_name;
3052 char lcomm_endc;
3053
1ad63b2f 3054 if (size <= 4)
252b5132
RH
3055 align = 2;
3056 else
3057 align = 3;
3058
3059 /* The third argument to .lcomm appears to be the real local
3060 common symbol to create. References to the symbol named in
3061 the first argument are turned into references to the third
3062 argument. */
3063 if (*input_line_pointer != ',')
3064 {
3065 as_bad (_("missing real symbol name"));
3066 ignore_rest_of_line ();
3067 return;
3068 }
3069 ++input_line_pointer;
3070
3071 lcomm_name = input_line_pointer;
3072 lcomm_endc = get_symbol_end ();
81d4177b 3073
252b5132
RH
3074 lcomm_sym = symbol_find_or_make (lcomm_name);
3075
3076 *input_line_pointer = lcomm_endc;
3077 }
3078
3079 *end_name = '\0';
3080 sym = symbol_find_or_make (name);
3081 *end_name = endc;
3082
3083 if (S_IS_DEFINED (sym)
3084 || S_GET_VALUE (sym) != 0)
3085 {
3086 as_bad (_("attempt to redefine symbol"));
3087 ignore_rest_of_line ();
3088 return;
3089 }
81d4177b 3090
252b5132 3091 record_alignment (bss_section, align);
81d4177b 3092
252b5132
RH
3093 if (! lcomm
3094 || ! S_IS_DEFINED (lcomm_sym))
3095 {
3096 symbolS *def_sym;
3097 offsetT def_size;
3098
3099 if (! lcomm)
3100 {
3101 def_sym = sym;
3102 def_size = size;
3103 S_SET_EXTERNAL (sym);
3104 }
3105 else
3106 {
809ffe0d 3107 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH
3108 def_sym = lcomm_sym;
3109 def_size = 0;
3110 }
3111
3112 subseg_set (bss_section, 1);
3113 frag_align (align, 0, 0);
81d4177b 3114
809ffe0d 3115 symbol_set_frag (def_sym, frag_now);
252b5132
RH
3116 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3117 def_size, (char *) NULL);
3118 *pfrag = 0;
3119 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3120 symbol_get_tc (def_sym)->align = align;
252b5132
RH
3121 }
3122 else if (lcomm)
3123 {
3124 /* Align the size of lcomm_sym. */
809ffe0d
ILT
3125 symbol_get_frag (lcomm_sym)->fr_offset =
3126 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3127 &~ ((1 << align) - 1));
809ffe0d
ILT
3128 if (align > symbol_get_tc (lcomm_sym)->align)
3129 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH
3130 }
3131
3132 if (lcomm)
3133 {
3134 /* Make sym an offset from lcomm_sym. */
3135 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT
3136 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3137 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3138 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH
3139 }
3140
3141 subseg_set (current_seg, current_subseg);
3142
3143 demand_empty_rest_of_line ();
3144}
3145
3146/* The .csect pseudo-op. This switches us into a different
3147 subsegment. The first argument is a symbol whose value is the
3148 start of the .csect. In COFF, csect symbols get special aux
3149 entries defined by the x_csect field of union internal_auxent. The
3150 optional second argument is the alignment (the default is 2). */
3151
3152static void
98027b10 3153ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3154{
3155 char *name;
3156 char endc;
3157 symbolS *sym;
931e13a6 3158 offsetT align;
252b5132
RH
3159
3160 name = input_line_pointer;
3161 endc = get_symbol_end ();
81d4177b 3162
252b5132
RH
3163 sym = symbol_find_or_make (name);
3164
3165 *input_line_pointer = endc;
3166
3167 if (S_GET_NAME (sym)[0] == '\0')
3168 {
3169 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3170 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH
3171 }
3172
931e13a6 3173 align = 2;
252b5132
RH
3174 if (*input_line_pointer == ',')
3175 {
3176 ++input_line_pointer;
931e13a6 3177 align = get_absolute_expression ();
252b5132
RH
3178 }
3179
931e13a6
AM
3180 ppc_change_csect (sym, align);
3181
252b5132
RH
3182 demand_empty_rest_of_line ();
3183}
3184
3185/* Change to a different csect. */
3186
3187static void
98027b10 3188ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH
3189{
3190 if (S_IS_DEFINED (sym))
809ffe0d 3191 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH
3192 else
3193 {
3194 symbolS **list_ptr;
3195 int after_toc;
3196 int hold_chunksize;
3197 symbolS *list;
931e13a6
AM
3198 int is_code;
3199 segT sec;
252b5132
RH
3200
3201 /* This is a new csect. We need to look at the symbol class to
3202 figure out whether it should go in the text section or the
3203 data section. */
3204 after_toc = 0;
931e13a6 3205 is_code = 0;
809ffe0d 3206 switch (symbol_get_tc (sym)->class)
252b5132
RH
3207 {
3208 case XMC_PR:
3209 case XMC_RO:
3210 case XMC_DB:
3211 case XMC_GL:
3212 case XMC_XO:
3213 case XMC_SV:
3214 case XMC_TI:
3215 case XMC_TB:
3216 S_SET_SEGMENT (sym, text_section);
809ffe0d 3217 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH
3218 ++ppc_text_subsegment;
3219 list_ptr = &ppc_text_csects;
931e13a6 3220 is_code = 1;
252b5132
RH
3221 break;
3222 case XMC_RW:
3223 case XMC_TC0:
3224 case XMC_TC:
3225 case XMC_DS:
3226 case XMC_UA:
3227 case XMC_BS:
3228 case XMC_UC:
3229 if (ppc_toc_csect != NULL
809ffe0d
ILT
3230 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3231 == ppc_data_subsegment))
252b5132
RH
3232 after_toc = 1;
3233 S_SET_SEGMENT (sym, data_section);
809ffe0d 3234 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH
3235 ++ppc_data_subsegment;
3236 list_ptr = &ppc_data_csects;
3237 break;
3238 default:
3239 abort ();
3240 }
3241
3242 /* We set the obstack chunk size to a small value before
99a814a1
AM
3243 changing subsegments, so that we don't use a lot of memory
3244 space for what may be a small section. */
252b5132
RH
3245 hold_chunksize = chunksize;
3246 chunksize = 64;
3247
931e13a6
AM
3248 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3249 symbol_get_tc (sym)->subseg);
252b5132
RH
3250
3251 chunksize = hold_chunksize;
3252
3253 if (after_toc)
3254 ppc_after_toc_frag = frag_now;
3255
931e13a6
AM
3256 record_alignment (sec, align);
3257 if (is_code)
3258 frag_align_code (align, 0);
3259 else
3260 frag_align (align, 0, 0);
3261
809ffe0d 3262 symbol_set_frag (sym, frag_now);
252b5132
RH
3263 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3264
931e13a6 3265 symbol_get_tc (sym)->align = align;
809ffe0d
ILT
3266 symbol_get_tc (sym)->output = 1;
3267 symbol_get_tc (sym)->within = sym;
81d4177b 3268
252b5132 3269 for (list = *list_ptr;
809ffe0d
ILT
3270 symbol_get_tc (list)->next != (symbolS *) NULL;
3271 list = symbol_get_tc (list)->next)
252b5132 3272 ;
809ffe0d 3273 symbol_get_tc (list)->next = sym;
81d4177b 3274
252b5132 3275 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3276 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3277 &symbol_lastP);
252b5132
RH
3278 }
3279
3280 ppc_current_csect = sym;
3281}
3282
3283/* This function handles the .text and .data pseudo-ops. These
3284 pseudo-ops aren't really used by XCOFF; we implement them for the
3285 convenience of people who aren't used to XCOFF. */
3286
3287static void
98027b10 3288ppc_section (int type)
252b5132
RH
3289{
3290 const char *name;
3291 symbolS *sym;
3292
3293 if (type == 't')
3294 name = ".text[PR]";
3295 else if (type == 'd')
3296 name = ".data[RW]";
3297 else
3298 abort ();
3299
3300 sym = symbol_find_or_make (name);
3301
931e13a6 3302 ppc_change_csect (sym, 2);
252b5132
RH
3303
3304 demand_empty_rest_of_line ();
3305}
3306
3307/* This function handles the .section pseudo-op. This is mostly to
3308 give an error, since XCOFF only supports .text, .data and .bss, but
3309 we do permit the user to name the text or data section. */
3310
3311static void
98027b10 3312ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3313{
3314 char *user_name;
3315 const char *real_name;
3316 char c;
3317 symbolS *sym;
3318
3319 user_name = input_line_pointer;
3320 c = get_symbol_end ();
3321
3322 if (strcmp (user_name, ".text") == 0)
3323 real_name = ".text[PR]";
3324 else if (strcmp (user_name, ".data") == 0)
3325 real_name = ".data[RW]";
3326 else
3327 {
3328 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3329 *input_line_pointer = c;
3330 ignore_rest_of_line ();
3331 return;
3332 }
3333
3334 *input_line_pointer = c;
3335
3336 sym = symbol_find_or_make (real_name);
3337
931e13a6 3338 ppc_change_csect (sym, 2);
252b5132
RH
3339
3340 demand_empty_rest_of_line ();
3341}
3342
3343/* The .extern pseudo-op. We create an undefined symbol. */
3344
3345static void
98027b10 3346ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3347{
3348 char *name;
3349 char endc;
3350
3351 name = input_line_pointer;
3352 endc = get_symbol_end ();
3353
3354 (void) symbol_find_or_make (name);
3355
3356 *input_line_pointer = endc;
3357
3358 demand_empty_rest_of_line ();
3359}
3360
3361/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3362
3363static void
98027b10 3364ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3365{
3366 char *name;
3367 char endc;
3368 symbolS *sym;
3369
3370 name = input_line_pointer;
3371 endc = get_symbol_end ();
3372
3373 sym = symbol_find_or_make (name);
3374
3375 *input_line_pointer = endc;
3376
809ffe0d 3377 symbol_get_tc (sym)->output = 1;
252b5132
RH
3378
3379 demand_empty_rest_of_line ();
3380}
3381
3382/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3383 although I don't know why it bothers. */
3384
3385static void
98027b10 3386ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3387{
3388 char *name;
3389 char endc;
3390 symbolS *sym;
3391 int len;
3392
3393 name = input_line_pointer;
3394 endc = get_symbol_end ();
3395
3396 sym = symbol_find_or_make (name);
3397
3398 *input_line_pointer = endc;
3399
3400 if (*input_line_pointer != ',')
3401 {
3402 as_bad (_("missing rename string"));
3403 ignore_rest_of_line ();
3404 return;
3405 }
3406 ++input_line_pointer;
3407
809ffe0d 3408 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH
3409
3410 demand_empty_rest_of_line ();
3411}
3412
3413/* The .stabx pseudo-op. This is similar to a normal .stabs
3414 pseudo-op, but slightly different. A sample is
3415 .stabx "main:F-1",.main,142,0
3416 The first argument is the symbol name to create. The second is the
3417 value, and the third is the storage class. The fourth seems to be
3418 always zero, and I am assuming it is the type. */
3419
3420static void
98027b10 3421ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3422{
3423 char *name;
3424 int len;
3425 symbolS *sym;
3426 expressionS exp;
3427
3428 name = demand_copy_C_string (&len);
3429
3430 if (*input_line_pointer != ',')
3431 {
3432 as_bad (_("missing value"));
3433 return;
3434 }
3435 ++input_line_pointer;
3436
b34976b6 3437 ppc_stab_symbol = TRUE;
252b5132 3438 sym = symbol_make (name);
b34976b6 3439 ppc_stab_symbol = FALSE;
252b5132 3440
809ffe0d 3441 symbol_get_tc (sym)->real_name = name;
252b5132
RH
3442
3443 (void) expression (&exp);
3444
3445 switch (exp.X_op)
3446 {
3447 case O_illegal:
3448 case O_absent:
3449 case O_big:
3450 as_bad (_("illegal .stabx expression; zero assumed"));
3451 exp.X_add_number = 0;
3452 /* Fall through. */
3453 case O_constant:
3454 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3455 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH
3456 break;
3457
3458 case O_symbol:
3459 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3460 symbol_set_value_expression (sym, &exp);
252b5132
RH
3461 else
3462 {
3463 S_SET_VALUE (sym,
3464 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3465 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH
3466 }
3467 break;
3468
3469 default:
3470 /* The value is some complex expression. This will probably
99a814a1
AM
3471 fail at some later point, but this is probably the right
3472 thing to do here. */
809ffe0d 3473 symbol_set_value_expression (sym, &exp);
252b5132
RH
3474 break;
3475 }
3476
3477 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3478 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3479
3480 if (*input_line_pointer != ',')
3481 {
3482 as_bad (_("missing class"));
3483 return;
3484 }
3485 ++input_line_pointer;
3486
3487 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3488
3489 if (*input_line_pointer != ',')
3490 {
3491 as_bad (_("missing type"));
3492 return;
3493 }
3494 ++input_line_pointer;
3495
3496 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3497
809ffe0d 3498 symbol_get_tc (sym)->output = 1;
252b5132 3499
6877bb43 3500 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3501
809ffe0d 3502 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3503
41ea10b1 3504 /* In this case :
99a814a1 3505
41ea10b1
TR
3506 .bs name
3507 .stabx "z",arrays_,133,0
3508 .es
99a814a1 3509
41ea10b1 3510 .comm arrays_,13768,3
99a814a1 3511
41ea10b1
TR
3512 resolve_symbol_value will copy the exp's "within" into sym's when the
3513 offset is 0. Since this seems to be corner case problem,
3514 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3515 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM
3516
3517 if (exp.X_op == O_symbol)
41ea10b1
TR
3518 {
3519 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3520 }
6877bb43 3521 }
99a814a1 3522
252b5132
RH
3523 if (exp.X_op != O_symbol
3524 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3525 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3526 ppc_frob_label (sym);
3527 else
3528 {
3529 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3530 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3531 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3532 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
3533 }
3534
3535 demand_empty_rest_of_line ();
3536}
3537
3538/* The .function pseudo-op. This takes several arguments. The first
3539 argument seems to be the external name of the symbol. The second
67c1ffbe 3540 argument seems to be the label for the start of the function. gcc
252b5132
RH
3541 uses the same name for both. I have no idea what the third and
3542 fourth arguments are meant to be. The optional fifth argument is
3543 an expression for the size of the function. In COFF this symbol
3544 gets an aux entry like that used for a csect. */
3545
3546static void
98027b10 3547ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3548{
3549 char *name;
3550 char endc;
3551 char *s;
3552 symbolS *ext_sym;
3553 symbolS *lab_sym;
3554
3555 name = input_line_pointer;
3556 endc = get_symbol_end ();
3557
3558 /* Ignore any [PR] suffix. */
3559 name = ppc_canonicalize_symbol_name (name);
3560 s = strchr (name, '[');
3561 if (s != (char *) NULL
3562 && strcmp (s + 1, "PR]") == 0)
3563 *s = '\0';
3564
3565 ext_sym = symbol_find_or_make (name);
3566
3567 *input_line_pointer = endc;
3568
3569 if (*input_line_pointer != ',')
3570 {
3571 as_bad (_("missing symbol name"));
3572 ignore_rest_of_line ();
3573 return;
3574 }
3575 ++input_line_pointer;
3576
3577 name = input_line_pointer;
3578 endc = get_symbol_end ();
3579
3580 lab_sym = symbol_find_or_make (name);
3581
3582 *input_line_pointer = endc;
3583
3584 if (ext_sym != lab_sym)
3585 {
809ffe0d
ILT
3586 expressionS exp;
3587
3588 exp.X_op = O_symbol;
3589 exp.X_add_symbol = lab_sym;
3590 exp.X_op_symbol = NULL;
3591 exp.X_add_number = 0;
3592 exp.X_unsigned = 0;
3593 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH
3594 }
3595
809ffe0d
ILT
3596 if (symbol_get_tc (ext_sym)->class == -1)
3597 symbol_get_tc (ext_sym)->class = XMC_PR;
3598 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH
3599
3600 if (*input_line_pointer == ',')
3601 {
3602 expressionS ignore;
3603
3604 /* Ignore the third argument. */
3605 ++input_line_pointer;
3606 expression (&ignore);
3607 if (*input_line_pointer == ',')
3608 {
3609 /* Ignore the fourth argument. */
3610 ++input_line_pointer;
3611 expression (&ignore);
3612 if (*input_line_pointer == ',')
3613 {
3614 /* The fifth argument is the function size. */
3615 ++input_line_pointer;
809ffe0d
ILT
3616 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3617 absolute_section,
3618 (valueT) 0,
3619 &zero_address_frag);
3620 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH
3621 }
3622 }
3623 }
3624
3625 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3626 SF_SET_FUNCTION (ext_sym);
3627 SF_SET_PROCESS (ext_sym);
3628 coff_add_linesym (ext_sym);
3629
3630 demand_empty_rest_of_line ();
3631}
3632
3633/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR
3634 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3635 with the correct line number */
5d6255fe 3636
8642cce8 3637static symbolS *saved_bi_sym = 0;
252b5132
RH
3638
3639static void
98027b10 3640ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3641{
3642 symbolS *sym;
3643
3644 sym = symbol_make (".bf");
3645 S_SET_SEGMENT (sym, text_section);
809ffe0d 3646 symbol_set_frag (sym, frag_now);
252b5132
RH
3647 S_SET_VALUE (sym, frag_now_fix ());
3648 S_SET_STORAGE_CLASS (sym, C_FCN);
3649
3650 coff_line_base = get_absolute_expression ();
3651
3652 S_SET_NUMBER_AUXILIARY (sym, 1);
3653 SA_SET_SYM_LNNO (sym, coff_line_base);
3654
8642cce8 3655 /* Line number for bi. */
5d6255fe 3656 if (saved_bi_sym)
8642cce8
TR
3657 {
3658 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3659 saved_bi_sym = 0;
3660 }
5d6255fe 3661
8642cce8 3662
809ffe0d 3663 symbol_get_tc (sym)->output = 1;
252b5132
RH
3664
3665 ppc_frob_label (sym);
3666
3667 demand_empty_rest_of_line ();
3668}
3669
3670/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3671 ".ef", except that the line number is absolute, not relative to the
3672 most recent ".bf" symbol. */
3673
3674static void
98027b10 3675ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3676{
3677 symbolS *sym;
3678
3679 sym = symbol_make (".ef");
3680 S_SET_SEGMENT (sym, text_section);
809ffe0d 3681 symbol_set_frag (sym, frag_now);
252b5132
RH
3682 S_SET_VALUE (sym, frag_now_fix ());
3683 S_SET_STORAGE_CLASS (sym, C_FCN);
3684 S_SET_NUMBER_AUXILIARY (sym, 1);
3685 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3686 symbol_get_tc (sym)->output = 1;
252b5132
RH
3687
3688 ppc_frob_label (sym);
3689
3690 demand_empty_rest_of_line ();
3691}
3692
3693/* The .bi and .ei pseudo-ops. These take a string argument and
3694 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR
3695 the symbol list. The value of .bi will be know when the next .bf
3696 is encountered. */
252b5132
RH
3697
3698static void
98027b10 3699ppc_biei (int ei)
252b5132
RH
3700{
3701 static symbolS *last_biei;
3702
3703 char *name;
3704 int len;
3705 symbolS *sym;
3706 symbolS *look;
3707
3708 name = demand_copy_C_string (&len);
3709
3710 /* The value of these symbols is actually file offset. Here we set
3711 the value to the index into the line number entries. In
3712 ppc_frob_symbols we set the fix_line field, which will cause BFD
3713 to do the right thing. */
3714
3715 sym = symbol_make (name);
3716 /* obj-coff.c currently only handles line numbers correctly in the
3717 .text section. */
3718 S_SET_SEGMENT (sym, text_section);
3719 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3720 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3721
3722 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3723 symbol_get_tc (sym)->output = 1;
81d4177b 3724
8642cce8 3725 /* Save bi. */
5d6255fe 3726 if (ei)
8642cce8
TR
3727 saved_bi_sym = 0;
3728 else
3729 saved_bi_sym = sym;
3730
252b5132
RH
3731 for (look = last_biei ? last_biei : symbol_rootP;
3732 (look != (symbolS *) NULL
3733 && (S_GET_STORAGE_CLASS (look) == C_FILE
3734 || S_GET_STORAGE_CLASS (look) == C_BINCL
3735 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3736 look = symbol_next (look))
3737 ;
3738 if (look != (symbolS *) NULL)
3739 {
3740 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3741 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3742 last_biei = sym;
3743 }
3744
3745 demand_empty_rest_of_line ();
3746}
3747
3748/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3749 There is one argument, which is a csect symbol. The value of the
3750 .bs symbol is the index of this csect symbol. */
3751
3752static void
98027b10 3753ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3754{
3755 char *name;
3756 char endc;
3757 symbolS *csect;
3758 symbolS *sym;
3759
3760 if (ppc_current_block != NULL)
3761 as_bad (_("nested .bs blocks"));
3762
3763 name = input_line_pointer;
3764 endc = get_symbol_end ();
3765
3766 csect = symbol_find_or_make (name);
3767
3768 *input_line_pointer = endc;
3769
3770 sym = symbol_make (".bs");
3771 S_SET_SEGMENT (sym, now_seg);
3772 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT
3773 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3774 symbol_get_tc (sym)->output = 1;
252b5132 3775
809ffe0d 3776 symbol_get_tc (sym)->within = csect;
252b5132
RH
3777
3778 ppc_frob_label (sym);
3779
3780 ppc_current_block = sym;
3781
3782 demand_empty_rest_of_line ();
3783}
3784
3785/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3786
3787static void
98027b10 3788ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3789{
3790 symbolS *sym;
3791
3792 if (ppc_current_block == NULL)
3793 as_bad (_(".es without preceding .bs"));
3794
3795 sym = symbol_make (".es");
3796 S_SET_SEGMENT (sym, now_seg);
3797 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT
3798 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3799 symbol_get_tc (sym)->output = 1;
252b5132
RH
3800
3801 ppc_frob_label (sym);
3802
3803 ppc_current_block = NULL;
3804
3805 demand_empty_rest_of_line ();
3806}
3807
3808/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3809 line number. */
3810
3811static void
98027b10 3812ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3813{
3814 symbolS *sym;
3815
3816 sym = symbol_make (".bb");
3817 S_SET_SEGMENT (sym, text_section);
809ffe0d 3818 symbol_set_frag (sym, frag_now);
252b5132
RH
3819 S_SET_VALUE (sym, frag_now_fix ());
3820 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3821
3822 S_SET_NUMBER_AUXILIARY (sym, 1);
3823 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3824
809ffe0d 3825 symbol_get_tc (sym)->output = 1;
252b5132
RH
3826
3827 SF_SET_PROCESS (sym);
3828
3829 ppc_frob_label (sym);
3830
3831 demand_empty_rest_of_line ();
3832}
3833
3834/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3835 line number. */
3836
3837static void
98027b10 3838ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3839{
3840 symbolS *sym;
3841
3842 sym = symbol_make (".eb");
3843 S_SET_SEGMENT (sym, text_section);
809ffe0d 3844 symbol_set_frag (sym, frag_now);
252b5132
RH
3845 S_SET_VALUE (sym, frag_now_fix ());
3846 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3847 S_SET_NUMBER_AUXILIARY (sym, 1);
3848 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3849 symbol_get_tc (sym)->output = 1;
252b5132
RH
3850
3851 SF_SET_PROCESS (sym);
3852
3853 ppc_frob_label (sym);
3854
3855 demand_empty_rest_of_line ();
3856}
3857
3858/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3859 specified name. */
3860
3861static void
98027b10 3862ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3863{
3864 char *name;
3865 int len;
3866 symbolS *sym;
3867
3868 name = demand_copy_C_string (&len);
3869 sym = symbol_make (name);
3870 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3871 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3872 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3873 S_SET_VALUE (sym, 0);
809ffe0d 3874 symbol_get_tc (sym)->output = 1;
252b5132
RH
3875
3876 ppc_frob_label (sym);
3877
3878 demand_empty_rest_of_line ();
3879}
3880
3881/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3882
3883static void
98027b10 3884ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3885{
3886 symbolS *sym;
3887
3888 sym = symbol_make (".ec");
3889 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3890 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3891 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3892 S_SET_VALUE (sym, 0);
809ffe0d 3893 symbol_get_tc (sym)->output = 1;
252b5132
RH
3894
3895 ppc_frob_label (sym);
3896
3897 demand_empty_rest_of_line ();
3898}
3899
3900/* The .toc pseudo-op. Switch to the .toc subsegment. */
3901
3902static void
98027b10 3903ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
3904{
3905 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3906 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH
3907 else
3908 {
3909 subsegT subseg;
3910 symbolS *sym;
3911 symbolS *list;
81d4177b 3912
252b5132
RH
3913 subseg = ppc_data_subsegment;
3914 ++ppc_data_subsegment;
3915
3916 subseg_new (segment_name (data_section), subseg);
3917 ppc_toc_frag = frag_now;
3918
3919 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3920 symbol_set_frag (sym, frag_now);
252b5132
RH
3921 S_SET_SEGMENT (sym, data_section);
3922 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3923 symbol_get_tc (sym)->subseg = subseg;
3924 symbol_get_tc (sym)->output = 1;
3925 symbol_get_tc (sym)->within = sym;
252b5132
RH
3926
3927 ppc_toc_csect = sym;
81d4177b 3928
252b5132 3929 for (list = ppc_data_csects;
809ffe0d
ILT
3930 symbol_get_tc (list)->next != (symbolS *) NULL;
3931 list = symbol_get_tc (list)->next)
252b5132 3932 ;
809ffe0d 3933 symbol_get_tc (list)->next = sym;
252b5132
RH
3934
3935 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3936 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3937 &symbol_lastP);
252b5132
RH
3938 }
3939
3940 ppc_current_csect = ppc_toc_csect;
3941
3942 demand_empty_rest_of_line ();
3943}
3944
3945/* The AIX assembler automatically aligns the operands of a .long or
3946 .short pseudo-op, and we want to be compatible. */
3947
3948static void
98027b10 3949ppc_xcoff_cons (int log_size)
252b5132
RH
3950{
3951 frag_align (log_size, 0, 0);
3952 record_alignment (now_seg, log_size);
3953 cons (1 << log_size);
3954}
3955
3956static void
98027b10 3957ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH
3958{
3959 expressionS exp;
3960 int byte_count;
3961
3962 (void) expression (&exp);
3963
3964 if (exp.X_op != O_constant)
3965 {
3966 as_bad (_("non-constant byte count"));
3967 return;
3968 }
3969
3970 byte_count = exp.X_add_number;
3971
3972 if (*input_line_pointer != ',')
3973 {
3974 as_bad (_("missing value"));
3975 return;
3976 }
3977
3978 ++input_line_pointer;
3979 cons (byte_count);
3980}
3981
3982#endif /* OBJ_XCOFF */
0baf16f2 3983#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
3984\f
3985/* The .tc pseudo-op. This is used when generating either XCOFF or
3986 ELF. This takes two or more arguments.
3987
3988 When generating XCOFF output, the first argument is the name to
3989 give to this location in the toc; this will be a symbol with class
0baf16f2 3990 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3991 this location in the TOC; often there is just one more argument, a
1049f94e 3992 relocatable symbol reference. The size of the value to store
0baf16f2
AM
3993 depends on target word size. A 32-bit target uses 4-byte values, a
3994 64-bit target uses 8-byte values.
252b5132
RH
3995
3996 When not generating XCOFF output, the arguments are the same, but
3997 the first argument is simply ignored. */
3998
3999static void
98027b10 4000ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4001{
4002#ifdef OBJ_XCOFF
4003
4004 /* Define the TOC symbol name. */
4005 {
4006 char *name;
4007 char endc;
4008 symbolS *sym;
4009
4010 if (ppc_toc_csect == (symbolS *) NULL
4011 || ppc_toc_csect != ppc_current_csect)
4012 {
4013 as_bad (_(".tc not in .toc section"));
4014 ignore_rest_of_line ();
4015 return;
4016 }
4017
4018 name = input_line_pointer;
4019 endc = get_symbol_end ();
4020
4021 sym = symbol_find_or_make (name);
4022
4023 *input_line_pointer = endc;
4024
4025 if (S_IS_DEFINED (sym))
4026 {
4027 symbolS *label;
4028
809ffe0d
ILT
4029 label = symbol_get_tc (ppc_current_csect)->within;
4030 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH
4031 {
4032 as_bad (_(".tc with no label"));
4033 ignore_rest_of_line ();
4034 return;
4035 }
4036
4037 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4038 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH
4039 S_SET_VALUE (label, S_GET_VALUE (sym));
4040
4041 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4042 ++input_line_pointer;
4043
4044 return;
4045 }
4046
4047 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4048 symbol_set_frag (sym, frag_now);
252b5132 4049 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
4050 symbol_get_tc (sym)->class = XMC_TC;
4051 symbol_get_tc (sym)->output = 1;
252b5132
RH
4052
4053 ppc_frob_label (sym);
4054 }
4055
0baf16f2
AM
4056#endif /* OBJ_XCOFF */
4057#ifdef OBJ_ELF
9c7977b3 4058 int align;
252b5132
RH
4059
4060 /* Skip the TOC symbol name. */
4061 while (is_part_of_name (*input_line_pointer)
4062 || *input_line_pointer == '['
4063 || *input_line_pointer == ']'
4064 || *input_line_pointer == '{'
4065 || *input_line_pointer == '}')
4066 ++input_line_pointer;
4067
0baf16f2 4068 /* Align to a four/eight byte boundary. */
2b3c4602 4069 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM
4070 frag_align (align, 0, 0);
4071 record_alignment (now_seg, align);
0baf16f2 4072#endif /* OBJ_ELF */
252b5132
RH
4073
4074 if (*input_line_pointer != ',')
4075 demand_empty_rest_of_line ();
4076 else
4077 {
4078 ++input_line_pointer;
2b3c4602 4079 cons (ppc_obj64 ? 8 : 4);
252b5132
RH
4080 }
4081}
0baf16f2
AM
4082
4083/* Pseudo-op .machine. */
0baf16f2
AM
4084
4085static void
98027b10 4086ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4087{
69c040df
AM
4088 char *cpu_string;
4089#define MAX_HISTORY 100
4090 static unsigned long *cpu_history;
4091 static int curr_hist;
4092
4093 SKIP_WHITESPACE ();
4094
4095 if (*input_line_pointer == '"')
4096 {
4097 int len;
4098 cpu_string = demand_copy_C_string (&len);
4099 }
4100 else
4101 {
4102 char c;
4103 cpu_string = input_line_pointer;
4104 c = get_symbol_end ();
4105 cpu_string = xstrdup (cpu_string);
4106 *input_line_pointer = c;
4107 }
4108
4109 if (cpu_string != NULL)
4110 {
4111 unsigned long old_cpu = ppc_cpu;
4112 char *p;
4113
4114 for (p = cpu_string; *p != 0; p++)
4115 *p = TOLOWER (*p);
4116
4117 if (strcmp (cpu_string, "push") == 0)
4118 {
4119 if (cpu_history == NULL)
4120 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4121
4122 if (curr_hist >= MAX_HISTORY)
4123 as_bad (_(".machine stack overflow"));
4124 else
4125 cpu_history[curr_hist++] = ppc_cpu;
4126 }
4127 else if (strcmp (cpu_string, "pop") == 0)
4128 {
4129 if (curr_hist <= 0)
4130 as_bad (_(".machine stack underflow"));
4131 else
4132 ppc_cpu = cpu_history[--curr_hist];
4133 }
4134 else if (parse_cpu (cpu_string))
4135 ;
4136 else
4137 as_bad (_("invalid machine `%s'"), cpu_string);
4138
4139 if (ppc_cpu != old_cpu)
4140 ppc_setup_opcodes ();
4141 }
4142
4143 demand_empty_rest_of_line ();
0baf16f2
AM
4144}
4145
4146/* See whether a symbol is in the TOC section. */
4147
4148static int
98027b10 4149ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM
4150{
4151#ifdef OBJ_XCOFF
4152 return symbol_get_tc (sym)->class == XMC_TC;
4153#endif
4154#ifdef OBJ_ELF
4155 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4156 if (ppc_obj64)
0baf16f2
AM
4157 return strcmp (sname, ".toc") == 0;
4158 else
4159 return strcmp (sname, ".got") == 0;
4160#endif
4161}
4162#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH
4163\f
4164#ifdef TE_PE
4165
99a814a1 4166/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
4167
4168/* Set the current section. */
4169static void
98027b10 4170ppc_set_current_section (segT new)
252b5132
RH
4171{
4172 ppc_previous_section = ppc_current_section;
4173 ppc_current_section = new;
4174}
4175
4176/* pseudo-op: .previous
4177 behaviour: toggles the current section with the previous section.
4178 errors: None
99a814a1
AM
4179 warnings: "No previous section" */
4180
252b5132 4181static void
98027b10 4182ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4183{
4184 symbolS *tmp;
4185
81d4177b 4186 if (ppc_previous_section == NULL)
252b5132 4187 {
99a814a1 4188 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH
4189 return;
4190 }
4191
99a814a1 4192 subseg_set (ppc_previous_section, 0);
252b5132 4193
99a814a1 4194 ppc_set_current_section (ppc_previous_section);
252b5132
RH
4195}
4196
4197/* pseudo-op: .pdata
4198 behaviour: predefined read only data section
b34976b6 4199 double word aligned
252b5132
RH
4200 errors: None
4201 warnings: None
4202 initial: .section .pdata "adr3"
b34976b6 4203 a - don't know -- maybe a misprint
252b5132
RH
4204 d - initialized data
4205 r - readable
4206 3 - double word aligned (that would be 4 byte boundary)
4207
4208 commentary:
4209 Tag index tables (also known as the function table) for exception
99a814a1 4210 handling, debugging, etc. */
252b5132 4211
252b5132 4212static void
98027b10 4213ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4214{
81d4177b 4215 if (pdata_section == 0)
252b5132
RH
4216 {
4217 pdata_section = subseg_new (".pdata", 0);
81d4177b 4218
252b5132
RH
4219 bfd_set_section_flags (stdoutput, pdata_section,
4220 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4221 | SEC_READONLY | SEC_DATA ));
81d4177b 4222
252b5132
RH
4223 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4224 }
4225 else
4226 {
99a814a1 4227 pdata_section = subseg_new (".pdata", 0);
252b5132 4228 }
99a814a1 4229 ppc_set_current_section (pdata_section);
252b5132
RH
4230}
4231
4232/* pseudo-op: .ydata
4233 behaviour: predefined read only data section
b34976b6 4234 double word aligned
252b5132
RH
4235 errors: None
4236 warnings: None
4237 initial: .section .ydata "drw3"
b34976b6 4238 a - don't know -- maybe a misprint
252b5132
RH
4239 d - initialized data
4240 r - readable
4241 3 - double word aligned (that would be 4 byte boundary)
4242 commentary:
4243 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM
4244 debugging, etc. */
4245
252b5132 4246static void
98027b10 4247ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4248{
81d4177b 4249 if (ydata_section == 0)
252b5132
RH
4250 {
4251 ydata_section = subseg_new (".ydata", 0);
4252 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM
4253 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4254 | SEC_READONLY | SEC_DATA ));
252b5132
RH
4255
4256 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4257 }
4258 else
4259 {
4260 ydata_section = subseg_new (".ydata", 0);
4261 }
99a814a1 4262 ppc_set_current_section (ydata_section);
252b5132
RH
4263}
4264
4265/* pseudo-op: .reldata
4266 behaviour: predefined read write data section
b34976b6 4267 double word aligned (4-byte)
252b5132
RH
4268 FIXME: relocation is applied to it
4269 FIXME: what's the difference between this and .data?
4270 errors: None
4271 warnings: None
4272 initial: .section .reldata "drw3"
4273 d - initialized data
4274 r - readable
4275 w - writeable
4276 3 - double word aligned (that would be 8 byte boundary)
4277
4278 commentary:
4279 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM
4280 function descriptors, etc. */
4281
252b5132 4282static void
98027b10 4283ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4284{
4285 if (reldata_section == 0)
4286 {
4287 reldata_section = subseg_new (".reldata", 0);
4288
4289 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM
4290 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4291 | SEC_DATA));
252b5132
RH
4292
4293 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4294 }
4295 else
4296 {
4297 reldata_section = subseg_new (".reldata", 0);
4298 }
99a814a1 4299 ppc_set_current_section (reldata_section);
252b5132
RH
4300}
4301
4302/* pseudo-op: .rdata
4303 behaviour: predefined read only data section
b34976b6 4304 double word aligned
252b5132
RH
4305 errors: None
4306 warnings: None
4307 initial: .section .rdata "dr3"
4308 d - initialized data
4309 r - readable
99a814a1
AM
4310 3 - double word aligned (that would be 4 byte boundary) */
4311
252b5132 4312static void
98027b10 4313ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4314{
4315 if (rdata_section == 0)
4316 {
4317 rdata_section = subseg_new (".rdata", 0);
4318 bfd_set_section_flags (stdoutput, rdata_section,
4319 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4320 | SEC_READONLY | SEC_DATA ));
4321
4322 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4323 }
4324 else
4325 {
4326 rdata_section = subseg_new (".rdata", 0);
4327 }
99a814a1 4328 ppc_set_current_section (rdata_section);
252b5132
RH
4329}
4330
4331/* pseudo-op: .ualong
81d4177b 4332 behaviour: much like .int, with the exception that no alignment is
b34976b6 4333 performed.
252b5132
RH
4334 FIXME: test the alignment statement
4335 errors: None
99a814a1
AM
4336 warnings: None */
4337
252b5132 4338static void
98027b10 4339ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4340{
99a814a1
AM
4341 /* Try for long. */
4342 cons (4);
252b5132
RH
4343}
4344
4345/* pseudo-op: .znop <symbol name>
4346 behaviour: Issue a nop instruction
b34976b6 4347 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH
4348 the supplied symbol name.
4349 errors: None
99a814a1
AM
4350 warnings: Missing symbol name */
4351
252b5132 4352static void
98027b10 4353ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4354{
4355 unsigned long insn;
4356 const struct powerpc_opcode *opcode;
4357 expressionS ex;
4358 char *f;
252b5132 4359 symbolS *sym;
252b5132
RH
4360 char *symbol_name;
4361 char c;
4362 char *name;
4363 unsigned int exp;
4364 flagword flags;
4365 asection *sec;
4366
99a814a1 4367 /* Strip out the symbol name. */
252b5132
RH
4368 symbol_name = input_line_pointer;
4369 c = get_symbol_end ();
4370
4371 name = xmalloc (input_line_pointer - symbol_name + 1);
4372 strcpy (name, symbol_name);
4373
4374 sym = symbol_find_or_make (name);
4375
4376 *input_line_pointer = c;
4377
4378 SKIP_WHITESPACE ();
4379
4380 /* Look up the opcode in the hash table. */
4381 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4382
99a814a1 4383 /* Stick in the nop. */
252b5132
RH
4384 insn = opcode->opcode;
4385
4386 /* Write out the instruction. */
4387 f = frag_more (4);
4388 md_number_to_chars (f, insn, 4);
4389 fix_new (frag_now,
4390 f - frag_now->fr_literal,
4391 4,
4392 sym,
4393 0,
4394 0,
4395 BFD_RELOC_16_GOT_PCREL);
4396
4397}
4398
81d4177b
KH
4399/* pseudo-op:
4400 behaviour:
4401 errors:
99a814a1
AM
4402 warnings: */
4403
252b5132 4404static void
98027b10 4405ppc_pe_comm (int lcomm)
252b5132 4406{
98027b10
AM
4407 char *name;
4408 char c;
4409 char *p;
252b5132 4410 offsetT temp;
98027b10 4411 symbolS *symbolP;
252b5132
RH
4412 offsetT align;
4413
4414 name = input_line_pointer;
4415 c = get_symbol_end ();
4416
99a814a1 4417 /* just after name is now '\0'. */
252b5132
RH
4418 p = input_line_pointer;
4419 *p = c;
4420 SKIP_WHITESPACE ();
4421 if (*input_line_pointer != ',')
4422 {
4423 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4424 ignore_rest_of_line ();
4425 return;
4426 }
4427
4428 input_line_pointer++; /* skip ',' */
4429 if ((temp = get_absolute_expression ()) < 0)
4430 {
4431 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4432 ignore_rest_of_line ();
4433 return;
4434 }
4435
4436 if (! lcomm)
4437 {
4438 /* The third argument to .comm is the alignment. */
4439 if (*input_line_pointer != ',')
4440 align = 3;
4441 else
4442 {
4443 ++input_line_pointer;
4444 align = get_absolute_expression ();
4445 if (align <= 0)
4446 {
4447 as_warn (_("ignoring bad alignment"));
4448 align = 3;
4449 }
4450 }
4451 }
4452
4453 *p = 0;
4454 symbolP = symbol_find_or_make (name);
4455
4456 *p = c;
4457 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4458 {
4459 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4460 S_GET_NAME (symbolP));
4461 ignore_rest_of_line ();
4462 return;
4463 }
4464
4465 if (S_GET_VALUE (symbolP))
4466 {
4467 if (S_GET_VALUE (symbolP) != (valueT) temp)
4468 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4469 S_GET_NAME (symbolP),
4470 (long) S_GET_VALUE (symbolP),
4471 (long) temp);
4472 }
4473 else
4474 {
4475 S_SET_VALUE (symbolP, (valueT) temp);
4476 S_SET_EXTERNAL (symbolP);
86ebace2 4477 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH
4478 }
4479
4480 demand_empty_rest_of_line ();
4481}
4482
4483/*
4484 * implement the .section pseudo op:
4485 * .section name {, "flags"}
4486 * ^ ^
4487 * | +--- optional flags: 'b' for bss
4488 * | 'i' for info
4489 * +-- section name 'l' for lib
4490 * 'n' for noload
4491 * 'o' for over
4492 * 'w' for data
4493 * 'd' (apparently m88k for data)
4494 * 'x' for text
4495 * But if the argument is not a quoted string, treat it as a
4496 * subsegment number.
4497 *
4498 * FIXME: this is a copy of the section processing from obj-coff.c, with
4499 * additions/changes for the moto-pas assembler support. There are three
4500 * categories:
4501 *
81d4177b 4502 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH
4503 * setting bits that bfd probably neither understands or uses. The
4504 * correct approach (?) will have to incorporate extra fields attached
4505 * to the section to hold the system specific stuff. (krk)
4506 *
4507 * Section Contents:
4508 * 'a' - unknown - referred to in documentation, but no definition supplied
4509 * 'c' - section has code
4510 * 'd' - section has initialized data
4511 * 'u' - section has uninitialized data
4512 * 'i' - section contains directives (info)
4513 * 'n' - section can be discarded
4514 * 'R' - remove section at link time
4515 *
4516 * Section Protection:
4517 * 'r' - section is readable
4518 * 'w' - section is writeable
4519 * 'x' - section is executable
4520 * 's' - section is sharable
4521 *
4522 * Section Alignment:
4523 * '0' - align to byte boundary
4524 * '1' - align to halfword undary
4525 * '2' - align to word boundary
4526 * '3' - align to doubleword boundary
4527 * '4' - align to quadword boundary
4528 * '5' - align to 32 byte boundary
4529 * '6' - align to 64 byte boundary
4530 *
4531 */
4532
4533void
98027b10 4534ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4535{
99a814a1 4536 /* Strip out the section name. */
252b5132
RH
4537 char *section_name;
4538 char c;
4539 char *name;
4540 unsigned int exp;
4541 flagword flags;
4542 segT sec;
4543 int align;
4544
4545 section_name = input_line_pointer;
4546 c = get_symbol_end ();
4547
4548 name = xmalloc (input_line_pointer - section_name + 1);
4549 strcpy (name, section_name);
4550
4551 *input_line_pointer = c;
4552
4553 SKIP_WHITESPACE ();
4554
4555 exp = 0;
4556 flags = SEC_NO_FLAGS;
4557
4558 if (strcmp (name, ".idata$2") == 0)
4559 {
4560 align = 0;
4561 }
4562 else if (strcmp (name, ".idata$3") == 0)
4563 {
4564 align = 0;
4565 }
4566 else if (strcmp (name, ".idata$4") == 0)
4567 {
4568 align = 2;
4569 }
4570 else if (strcmp (name, ".idata$5") == 0)
4571 {
4572 align = 2;
4573 }
4574 else if (strcmp (name, ".idata$6") == 0)
4575 {
4576 align = 1;
4577 }
4578 else
99a814a1
AM
4579 /* Default alignment to 16 byte boundary. */
4580 align = 4;
252b5132
RH
4581
4582 if (*input_line_pointer == ',')
4583 {
4584 ++input_line_pointer;
4585 SKIP_WHITESPACE ();
4586 if (*input_line_pointer != '"')
4587 exp = get_absolute_expression ();
4588 else
4589 {
4590 ++input_line_pointer;
4591 while (*input_line_pointer != '"'
4592 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4593 {
4594 switch (*input_line_pointer)
4595 {
4596 /* Section Contents */
4597 case 'a': /* unknown */
4598 as_bad (_("Unsupported section attribute -- 'a'"));
4599 break;
4600 case 'c': /* code section */
81d4177b 4601 flags |= SEC_CODE;
252b5132
RH
4602 break;
4603 case 'd': /* section has initialized data */
4604 flags |= SEC_DATA;
4605 break;
4606 case 'u': /* section has uninitialized data */
4607 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4608 in winnt.h */
4609 flags |= SEC_ROM;
4610 break;
4611 case 'i': /* section contains directives (info) */
4612 /* FIXME: This is IMAGE_SCN_LNK_INFO
4613 in winnt.h */
4614 flags |= SEC_HAS_CONTENTS;
4615 break;
4616 case 'n': /* section can be discarded */
81d4177b 4617 flags &=~ SEC_LOAD;
252b5132
RH
4618 break;
4619 case 'R': /* Remove section at link time */
4620 flags |= SEC_NEVER_LOAD;
4621 break;
8d452c78 4622#if IFLICT_BRAIN_DAMAGE
252b5132
RH
4623 /* Section Protection */
4624 case 'r': /* section is readable */
4625 flags |= IMAGE_SCN_MEM_READ;
4626 break;
4627 case 'w': /* section is writeable */
4628 flags |= IMAGE_SCN_MEM_WRITE;
4629 break;
4630 case 'x': /* section is executable */
4631 flags |= IMAGE_SCN_MEM_EXECUTE;
4632 break;
4633 case 's': /* section is sharable */
4634 flags |= IMAGE_SCN_MEM_SHARED;
4635 break;
4636
4637 /* Section Alignment */
4638 case '0': /* align to byte boundary */
4639 flags |= IMAGE_SCN_ALIGN_1BYTES;
4640 align = 0;
4641 break;
4642 case '1': /* align to halfword boundary */
4643 flags |= IMAGE_SCN_ALIGN_2BYTES;
4644 align = 1;
4645 break;
4646 case '2': /* align to word boundary */
4647 flags |= IMAGE_SCN_ALIGN_4BYTES;
4648 align = 2;
4649 break;
4650 case '3': /* align to doubleword boundary */
4651 flags |= IMAGE_SCN_ALIGN_8BYTES;
4652 align = 3;
4653 break;
4654 case '4': /* align to quadword boundary */
4655 flags |= IMAGE_SCN_ALIGN_16BYTES;
4656 align = 4;
4657 break;
4658 case '5': /* align to 32 byte boundary */
4659 flags |= IMAGE_SCN_ALIGN_32BYTES;
4660 align = 5;
4661 break;
4662 case '6': /* align to 64 byte boundary */
4663 flags |= IMAGE_SCN_ALIGN_64BYTES;
4664 align = 6;
4665 break;
8d452c78 4666#endif
252b5132 4667 default:
99a814a1
AM
4668 as_bad (_("unknown section attribute '%c'"),
4669 *input_line_pointer);
252b5132
RH
4670 break;
4671 }
4672 ++input_line_pointer;
4673 }
4674 if (*input_line_pointer == '"')
4675 ++input_line_pointer;
4676 }
4677 }
4678
4679 sec = subseg_new (name, (subsegT) exp);
4680
99a814a1 4681 ppc_set_current_section (sec);
252b5132
RH
4682
4683 if (flags != SEC_NO_FLAGS)
4684 {
4685 if (! bfd_set_section_flags (stdoutput, sec, flags))
4686 as_bad (_("error setting flags for \"%s\": %s"),
4687 bfd_section_name (stdoutput, sec),
4688 bfd_errmsg (bfd_get_error ()));
4689 }
4690
99a814a1 4691 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH
4692}
4693
4694static void
98027b10 4695ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4696{
4697 char *name;
4698 char endc;
4699 symbolS *ext_sym;
4700
4701 name = input_line_pointer;
4702 endc = get_symbol_end ();
4703
4704 ext_sym = symbol_find_or_make (name);
4705
4706 *input_line_pointer = endc;
4707
4708 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4709 SF_SET_FUNCTION (ext_sym);
4710 SF_SET_PROCESS (ext_sym);
4711 coff_add_linesym (ext_sym);
4712
4713 demand_empty_rest_of_line ();
4714}
4715
4716static void
98027b10 4717ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4718{
4719 if (tocdata_section == 0)
4720 {
4721 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4722 /* FIXME: section flags won't work. */
252b5132
RH
4723 bfd_set_section_flags (stdoutput, tocdata_section,
4724 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4725 | SEC_READONLY | SEC_DATA));
252b5132
RH
4726
4727 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4728 }
4729 else
4730 {
4731 rdata_section = subseg_new (".tocd", 0);
4732 }
4733
99a814a1 4734 ppc_set_current_section (tocdata_section);
252b5132
RH
4735
4736 demand_empty_rest_of_line ();
4737}
4738
4739/* Don't adjust TOC relocs to use the section symbol. */
4740
4741int
98027b10 4742ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH
4743{
4744 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4745}
4746
4747#endif
4748\f
4749#ifdef OBJ_XCOFF
4750
4751/* XCOFF specific symbol and file handling. */
4752
4753/* Canonicalize the symbol name. We use the to force the suffix, if
4754 any, to use square brackets, and to be in upper case. */
4755
4756char *
98027b10 4757ppc_canonicalize_symbol_name (char *name)
252b5132
RH
4758{
4759 char *s;
4760
4761 if (ppc_stab_symbol)
4762 return name;
4763
4764 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4765 ;
4766 if (*s != '\0')
4767 {
4768 char brac;
4769
4770 if (*s == '[')
4771 brac = ']';
4772 else
4773 {
4774 *s = '[';
4775 brac = '}';
4776 }
4777
4778 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4779 *s = TOUPPER (*s);
252b5132
RH
4780
4781 if (*s == '\0' || s[1] != '\0')
4782 as_bad (_("bad symbol suffix"));
4783
4784 *s = ']';
4785 }
4786
4787 return name;
4788}
4789
4790/* Set the class of a symbol based on the suffix, if any. This is
4791 called whenever a new symbol is created. */
4792
4793void
98027b10 4794ppc_symbol_new_hook (symbolS *sym)
252b5132 4795{
809ffe0d 4796 struct ppc_tc_sy *tc;
252b5132
RH
4797 const char *s;
4798
809ffe0d
ILT
4799 tc = symbol_get_tc (sym);
4800 tc->next = NULL;
4801 tc->output = 0;
4802 tc->class = -1;
4803 tc->real_name = NULL;
4804 tc->subseg = 0;
4805 tc->align = 0;
4806 tc->size = NULL;
4807 tc->within = NULL;
252b5132
RH
4808
4809 if (ppc_stab_symbol)
4810 return;
4811
4812 s = strchr (S_GET_NAME (sym), '[');
4813 if (s == (const char *) NULL)
4814 {
4815 /* There is no suffix. */
4816 return;
4817 }
4818
4819 ++s;
4820
4821 switch (s[0])
4822 {
4823 case 'B':
4824 if (strcmp (s, "BS]") == 0)
809ffe0d 4825 tc->class = XMC_BS;
252b5132
RH
4826 break;
4827 case 'D':
4828 if (strcmp (s, "DB]") == 0)
809ffe0d 4829 tc->class = XMC_DB;
252b5132 4830 else if (strcmp (s, "DS]") == 0)
809ffe0d 4831 tc->class = XMC_DS;
252b5132
RH
4832 break;
4833 case 'G':
4834 if (strcmp (s, "GL]") == 0)
809ffe0d 4835 tc->class = XMC_GL;
252b5132
RH
4836 break;
4837 case 'P':
4838 if (strcmp (s, "PR]") == 0)
809ffe0d 4839 tc->class = XMC_PR;
252b5132
RH
4840 break;
4841 case 'R':
4842 if (strcmp (s, "RO]") == 0)
809ffe0d 4843 tc->class = XMC_RO;
252b5132 4844 else if (strcmp (s, "RW]") == 0)
809ffe0d 4845 tc->class = XMC_RW;
252b5132
RH
4846 break;
4847 case 'S':
4848 if (strcmp (s, "SV]") == 0)
809ffe0d 4849 tc->class = XMC_SV;
252b5132
RH
4850 break;
4851 case 'T':
4852 if (strcmp (s, "TC]") == 0)
809ffe0d 4853 tc->class = XMC_TC;
252b5132 4854 else if (strcmp (s, "TI]") == 0)
809ffe0d 4855 tc->class = XMC_TI;
252b5132 4856 else if (strcmp (s, "TB]") == 0)
809ffe0d 4857 tc->class = XMC_TB;
252b5132 4858 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4859 tc->class = XMC_TC0;
252b5132
RH
4860 break;
4861 case 'U':
4862 if (strcmp (s, "UA]") == 0)
809ffe0d 4863 tc->class = XMC_UA;
252b5132 4864 else if (strcmp (s, "UC]") == 0)
809ffe0d 4865 tc->class = XMC_UC;
252b5132
RH
4866 break;
4867 case 'X':
4868 if (strcmp (s, "XO]") == 0)
809ffe0d 4869 tc->class = XMC_XO;
252b5132
RH
4870 break;
4871 }
4872
809ffe0d 4873 if (tc->class == -1)
252b5132
RH
4874 as_bad (_("Unrecognized symbol suffix"));
4875}
4876
4877/* Set the class of a label based on where it is defined. This
4878 handles symbols without suffixes. Also, move the symbol so that it
4879 follows the csect symbol. */
4880
4881void
98027b10 4882ppc_frob_label (symbolS *sym)
252b5132
RH
4883{
4884 if (ppc_current_csect != (symbolS *) NULL)
4885 {
809ffe0d
ILT
4886 if (symbol_get_tc (sym)->class == -1)
4887 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH
4888
4889 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
4890 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4891 &symbol_rootP, &symbol_lastP);
4892 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4893 }
07a53e5c
RH
4894
4895#ifdef OBJ_ELF
4896 dwarf2_emit_label (sym);
4897#endif
252b5132
RH
4898}
4899
4900/* This variable is set by ppc_frob_symbol if any absolute symbols are
4901 seen. It tells ppc_adjust_symtab whether it needs to look through
4902 the symbols. */
4903
b34976b6 4904static bfd_boolean ppc_saw_abs;
252b5132
RH
4905
4906/* Change the name of a symbol just before writing it out. Set the
4907 real name if the .rename pseudo-op was used. Otherwise, remove any
4908 class suffix. Return 1 if the symbol should not be included in the
4909 symbol table. */
4910
4911int
98027b10 4912ppc_frob_symbol (symbolS *sym)
252b5132
RH
4913{
4914 static symbolS *ppc_last_function;
4915 static symbolS *set_end;
4916
4917 /* Discard symbols that should not be included in the output symbol
4918 table. */
809ffe0d
ILT
4919 if (! symbol_used_in_reloc_p (sym)
4920 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4921 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4922 && ! symbol_get_tc (sym)->output
252b5132
RH
4923 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4924 return 1;
4925
a161fe53
AM
4926 /* This one will disappear anyway. Don't make a csect sym for it. */
4927 if (sym == abs_section_sym)
4928 return 1;
4929
809ffe0d
ILT
4930 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4931 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH
4932 else
4933 {
4934 const char *name;
4935 const char *s;
4936
4937 name = S_GET_NAME (sym);
4938 s = strchr (name, '[');
4939 if (s != (char *) NULL)
4940 {
4941 unsigned int len;
4942 char *snew;
4943
4944 len = s - name;
4945 snew = xmalloc (len + 1);
4946 memcpy (snew, name, len);
4947 snew[len] = '\0';
4948
4949 S_SET_NAME (sym, snew);
4950 }
4951 }
4952
4953 if (set_end != (symbolS *) NULL)
4954 {
4955 SA_SET_SYM_ENDNDX (set_end, sym);
4956 set_end = NULL;
4957 }
4958
4959 if (SF_GET_FUNCTION (sym))
4960 {
4961 if (ppc_last_function != (symbolS *) NULL)
4962 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4963 ppc_last_function = sym;
809ffe0d 4964 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4965 {
6386f3a7 4966 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT
4967 SA_SET_SYM_FSIZE (sym,
4968 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH
4969 }
4970 }
4971 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4972 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4973 {
4974 if (ppc_last_function == (symbolS *) NULL)
4975 as_bad (_(".ef with no preceding .function"));
4976 else
4977 {
4978 set_end = ppc_last_function;
4979 ppc_last_function = NULL;
4980
4981 /* We don't have a C_EFCN symbol, but we need to force the
4982 COFF backend to believe that it has seen one. */
4983 coff_last_function = NULL;
4984 }
4985 }
4986
670ec21d 4987 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4988 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH
4989 && S_GET_STORAGE_CLASS (sym) != C_FILE
4990 && S_GET_STORAGE_CLASS (sym) != C_FCN
4991 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4992 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4993 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4994 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4995 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4996 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4997 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4998
4999 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5000 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5001 {
5002 int i;
5003 union internal_auxent *a;
5004
5005 /* Create a csect aux. */
5006 i = S_GET_NUMBER_AUXILIARY (sym);
5007 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT
5008 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5009 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH
5010 {
5011 /* This is the TOC table. */
5012 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5013 a->x_csect.x_scnlen.l = 0;
5014 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5015 }
809ffe0d 5016 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH
5017 {
5018 /* This is a csect symbol. x_scnlen is the size of the
5019 csect. */
809ffe0d 5020 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH
5021 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5022 S_GET_SEGMENT (sym))
5023 - S_GET_VALUE (sym));
5024 else
5025 {
6386f3a7 5026 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5027 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH
5028 - S_GET_VALUE (sym));
5029 }
809ffe0d 5030 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH
5031 }
5032 else if (S_GET_SEGMENT (sym) == bss_section)
5033 {
5034 /* This is a common symbol. */
809ffe0d
ILT
5035 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5036 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5037 if (S_IS_EXTERNAL (sym))
809ffe0d 5038 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5039 else
809ffe0d 5040 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH
5041 }
5042 else if (S_GET_SEGMENT (sym) == absolute_section)
5043 {
5044 /* This is an absolute symbol. The csect will be created by
99a814a1 5045 ppc_adjust_symtab. */
b34976b6 5046 ppc_saw_abs = TRUE;
252b5132 5047 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT
5048 if (symbol_get_tc (sym)->class == -1)
5049 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH
5050 }
5051 else if (! S_IS_DEFINED (sym))
5052 {
5053 /* This is an external symbol. */
5054 a->x_csect.x_scnlen.l = 0;
5055 a->x_csect.x_smtyp = XTY_ER;
5056 }
809ffe0d 5057 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH
5058 {
5059 symbolS *next;
5060
5061 /* This is a TOC definition. x_scnlen is the size of the
5062 TOC entry. */
5063 next = symbol_next (sym);
809ffe0d 5064 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH
5065 next = symbol_next (next);
5066 if (next == (symbolS *) NULL
809ffe0d 5067 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH
5068 {
5069 if (ppc_after_toc_frag == (fragS *) NULL)
5070 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5071 data_section)
5072 - S_GET_VALUE (sym));
5073 else
5074 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5075 - S_GET_VALUE (sym));
5076 }
5077 else
5078 {
6386f3a7 5079 resolve_symbol_value (next);
252b5132
RH
5080 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5081 - S_GET_VALUE (sym));
5082 }
5083 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5084 }
5085 else
5086 {
5087 symbolS *csect;
5088
5089 /* This is a normal symbol definition. x_scnlen is the
5090 symbol index of the containing csect. */
5091 if (S_GET_SEGMENT (sym) == text_section)
5092 csect = ppc_text_csects;
5093 else if (S_GET_SEGMENT (sym) == data_section)
5094 csect = ppc_data_csects;
5095 else
5096 abort ();
5097
5098 /* Skip the initial dummy symbol. */
809ffe0d 5099 csect = symbol_get_tc (csect)->next;
252b5132
RH
5100
5101 if (csect == (symbolS *) NULL)
5102 {
5103 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5104 a->x_csect.x_scnlen.l = 0;
5105 }
5106 else
5107 {
809ffe0d 5108 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5109 {
6386f3a7 5110 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT
5111 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5112 > S_GET_VALUE (sym))
252b5132 5113 break;
809ffe0d 5114 csect = symbol_get_tc (csect)->next;
252b5132
RH
5115 }
5116
809ffe0d
ILT
5117 a->x_csect.x_scnlen.p =
5118 coffsymbol (symbol_get_bfdsym (csect))->native;
5119 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5120 1;
252b5132
RH
5121 }
5122 a->x_csect.x_smtyp = XTY_LD;
5123 }
81d4177b 5124
252b5132
RH
5125 a->x_csect.x_parmhash = 0;
5126 a->x_csect.x_snhash = 0;
809ffe0d 5127 if (symbol_get_tc (sym)->class == -1)
252b5132
RH
5128 a->x_csect.x_smclas = XMC_PR;
5129 else
809ffe0d 5130 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH
5131 a->x_csect.x_stab = 0;
5132 a->x_csect.x_snstab = 0;
5133
5134 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5135 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH
5136 }
5137 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5138 {
5139 /* We want the value to be the symbol index of the referenced
5140 csect symbol. BFD will do that for us if we set the right
5141 flags. */
b782de16
AM
5142 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5143 combined_entry_type *c = coffsymbol (bsym)->native;
5144
5145 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5146 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH
5147 }
5148 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5149 {
5150 symbolS *block;
5151 symbolS *csect;
5152
5153 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT
5154 block = symbol_get_tc (sym)->within;
5155 csect = symbol_get_tc (block)->within;
6386f3a7 5156 resolve_symbol_value (csect);
252b5132
RH
5157 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5158 }
5159 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5160 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5161 {
5162 /* We want the value to be a file offset into the line numbers.
99a814a1
AM
5163 BFD will do that for us if we set the right flags. We have
5164 already set the value correctly. */
809ffe0d 5165 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH
5166 }
5167
5168 return 0;
5169}
5170
5171/* Adjust the symbol table. This creates csect symbols for all
5172 absolute symbols. */
5173
5174void
98027b10 5175ppc_adjust_symtab (void)
252b5132
RH
5176{
5177 symbolS *sym;
5178
5179 if (! ppc_saw_abs)
5180 return;
5181
5182 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5183 {
5184 symbolS *csect;
5185 int i;
5186 union internal_auxent *a;
5187
5188 if (S_GET_SEGMENT (sym) != absolute_section)
5189 continue;
5190
5191 csect = symbol_create (".abs[XO]", absolute_section,
5192 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5193 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH
5194 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5195 i = S_GET_NUMBER_AUXILIARY (csect);
5196 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5197 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH
5198 a->x_csect.x_scnlen.l = 0;
5199 a->x_csect.x_smtyp = XTY_SD;
5200 a->x_csect.x_parmhash = 0;
5201 a->x_csect.x_snhash = 0;
5202 a->x_csect.x_smclas = XMC_XO;
5203 a->x_csect.x_stab = 0;
5204 a->x_csect.x_snstab = 0;
5205
5206 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5207
5208 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT
5209 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5210 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5211 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH
5212 }
5213
b34976b6 5214 ppc_saw_abs = FALSE;
252b5132
RH
5215}
5216
5217/* Set the VMA for a section. This is called on all the sections in
5218 turn. */
5219
5220void
98027b10 5221ppc_frob_section (asection *sec)
252b5132 5222{
931e13a6 5223 static bfd_vma vma = 0;
252b5132 5224
931e13a6 5225 vma = md_section_align (sec, vma);
252b5132
RH
5226 bfd_set_section_vma (stdoutput, sec, vma);
5227 vma += bfd_section_size (stdoutput, sec);
5228}
5229
5230#endif /* OBJ_XCOFF */
5231\f
252b5132 5232char *
98027b10 5233md_atof (int type, char *litp, int *sizep)
252b5132 5234{
499ac353 5235 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH
5236}
5237
5238/* Write a value out to the object file, using the appropriate
5239 endianness. */
5240
5241void
98027b10 5242md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH
5243{
5244 if (target_big_endian)
5245 number_to_chars_bigendian (buf, val, n);
5246 else
5247 number_to_chars_littleendian (buf, val, n);
5248}
5249
5250/* Align a section (I don't know why this is machine dependent). */
5251
5252valueT
3aeeedbb 5253md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5254{
3aeeedbb
AM
5255#ifdef OBJ_ELF
5256 return addr;
5257#else
252b5132
RH
5258 int align = bfd_get_section_alignment (stdoutput, seg);
5259
5260 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5261#endif
252b5132
RH
5262}
5263
5264/* We don't have any form of relaxing. */
5265
5266int
98027b10
AM
5267md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5268 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH
5269{
5270 abort ();
5271 return 0;
5272}
5273
5274/* Convert a machine dependent frag. We never generate these. */
5275
5276void
98027b10
AM
5277md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5278 asection *sec ATTRIBUTE_UNUSED,
5279 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH
5280{
5281 abort ();
5282}
5283
5284/* We have no need to default values of symbols. */
5285
252b5132 5286symbolS *
98027b10 5287md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH
5288{
5289 return 0;
5290}
5291\f
5292/* Functions concerning relocs. */
5293
5294/* The location from which a PC relative jump should be calculated,
5295 given a PC relative reloc. */
5296
5297long
98027b10 5298md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH
5299{
5300 return fixp->fx_frag->fr_address + fixp->fx_where;
5301}
5302
5303#ifdef OBJ_XCOFF
5304
5305/* This is called to see whether a fixup should be adjusted to use a
5306 section symbol. We take the opportunity to change a fixup against
5307 a symbol in the TOC subsegment into a reloc against the
5308 corresponding .tc symbol. */
5309
5310int
98027b10 5311ppc_fix_adjustable (fixS *fix)
252b5132 5312{
b782de16
AM
5313 valueT val = resolve_symbol_value (fix->fx_addsy);
5314 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5315 TC_SYMFIELD_TYPE *tc;
5316
5317 if (symseg == absolute_section)
5318 return 0;
252b5132 5319
252b5132 5320 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5321 && fix->fx_addsy != ppc_toc_csect
b782de16 5322 && symseg == data_section
252b5132
RH
5323 && val >= ppc_toc_frag->fr_address
5324 && (ppc_after_toc_frag == (fragS *) NULL
5325 || val < ppc_after_toc_frag->fr_address))
5326 {
5327 symbolS *sy;
5328
5329 for (sy = symbol_next (ppc_toc_csect);
5330 sy != (symbolS *) NULL;
5331 sy = symbol_next (sy))
5332 {
b782de16
AM
5333 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5334
5335 if (sy_tc->class == XMC_TC0)
252b5132 5336 continue;
b782de16 5337 if (sy_tc->class != XMC_TC)
252b5132 5338 break;
b782de16 5339 if (val == resolve_symbol_value (sy))
252b5132
RH
5340 {
5341 fix->fx_addsy = sy;
5342 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5343 return 0;
5344 }
5345 }
5346
5347 as_bad_where (fix->fx_file, fix->fx_line,
5348 _("symbol in .toc does not match any .tc"));
5349 }
5350
5351 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM
5352 tc = symbol_get_tc (fix->fx_addsy);
5353 if (tc->subseg == 0
5354 && tc->class != XMC_TC0
5355 && tc->class != XMC_TC
5356 && symseg != bss_section
252b5132 5357 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5358 && (symseg != data_section
252b5132
RH
5359 || ppc_toc_csect == NULL
5360 || val < ppc_toc_frag->fr_address
5361 || (ppc_after_toc_frag != NULL
5362 && val >= ppc_after_toc_frag->fr_address)))
5363 {
5364 symbolS *csect;
b782de16 5365 symbolS *next_csect;
252b5132 5366
b782de16 5367 if (symseg == text_section)
252b5132 5368 csect = ppc_text_csects;
b782de16 5369 else if (symseg == data_section)
252b5132
RH
5370 csect = ppc_data_csects;
5371 else
5372 abort ();
5373
5374 /* Skip the initial dummy symbol. */
809ffe0d 5375 csect = symbol_get_tc (csect)->next;
252b5132
RH
5376
5377 if (csect != (symbolS *) NULL)
5378 {
b782de16
AM
5379 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5380 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH
5381 {
5382 /* If the csect address equals the symbol value, then we
99a814a1
AM
5383 have to look through the full symbol table to see
5384 whether this is the csect we want. Note that we will
5385 only get here if the csect has zero length. */
b782de16
AM
5386 if (symbol_get_frag (csect)->fr_address == val
5387 && S_GET_VALUE (csect) == val)
252b5132
RH
5388 {
5389 symbolS *scan;
5390
809ffe0d 5391 for (scan = symbol_next (csect);
252b5132 5392 scan != NULL;
809ffe0d 5393 scan = symbol_next (scan))
252b5132 5394 {
809ffe0d 5395 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH
5396 break;
5397 if (scan == fix->fx_addsy)
5398 break;
5399 }
5400
5401 /* If we found the symbol before the next csect
99a814a1 5402 symbol, then this is the csect we want. */
252b5132
RH
5403 if (scan == fix->fx_addsy)
5404 break;
5405 }
5406
b782de16 5407 csect = next_csect;
252b5132
RH
5408 }
5409
b782de16 5410 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH
5411 fix->fx_addsy = csect;
5412 }
b782de16 5413 return 0;
252b5132
RH
5414 }
5415
5416 /* Adjust a reloc against a .lcomm symbol to be against the base
5417 .lcomm. */
b782de16 5418 if (symseg == bss_section
252b5132
RH
5419 && ! S_IS_EXTERNAL (fix->fx_addsy))
5420 {
b782de16
AM
5421 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5422
5423 fix->fx_offset += val - resolve_symbol_value (sy);
5424 fix->fx_addsy = sy;
252b5132
RH
5425 }
5426
5427 return 0;
5428}
5429
5430/* A reloc from one csect to another must be kept. The assembler
5431 will, of course, keep relocs between sections, and it will keep
5432 absolute relocs, but we need to force it to keep PC relative relocs
5433 between two csects in the same section. */
5434
5435int
98027b10 5436ppc_force_relocation (fixS *fix)
252b5132
RH
5437{
5438 /* At this point fix->fx_addsy should already have been converted to
5439 a csect symbol. If the csect does not include the fragment, then
5440 we need to force the relocation. */
5441 if (fix->fx_pcrel
5442 && fix->fx_addsy != NULL
809ffe0d
ILT
5443 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5444 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5445 > fix->fx_frag->fr_address)
5446 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5447 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH
5448 <= fix->fx_frag->fr_address))))
5449 return 1;
5450
ae6063d4 5451 return generic_force_reloc (fix);
252b5132
RH
5452}
5453
5454#endif /* OBJ_XCOFF */
5455
0baf16f2 5456#ifdef OBJ_ELF
a161fe53
AM
5457/* If this function returns non-zero, it guarantees that a relocation
5458 will be emitted for a fixup. */
5459
5460int
98027b10 5461ppc_force_relocation (fixS *fix)
a161fe53
AM
5462{
5463 /* Branch prediction relocations must force a relocation, as must
5464 the vtable description relocs. */
5465 switch (fix->fx_r_type)
5466 {
5467 case BFD_RELOC_PPC_B16_BRTAKEN:
5468 case BFD_RELOC_PPC_B16_BRNTAKEN:
5469 case BFD_RELOC_PPC_BA16_BRTAKEN:
5470 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5471 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5472 case BFD_RELOC_PPC64_TOC:
a161fe53
AM
5473 return 1;
5474 default:
5475 break;
5476 }
5477
cdba85ec
AM
5478 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5479 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5480 return 1;
5481
ae6063d4 5482 return generic_force_reloc (fix);
a161fe53
AM
5483}
5484
0baf16f2 5485int
98027b10 5486ppc_fix_adjustable (fixS *fix)
252b5132 5487{
0baf16f2
AM
5488 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5489 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5490 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5491 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5492 && fix->fx_r_type != BFD_RELOC_GPREL16
5493 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5494 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5495 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5496 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5497}
0baf16f2 5498#endif
252b5132 5499
3aeeedbb
AM
5500/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5501 rs_align_code frag. */
5502
5503void
5504ppc_handle_align (struct frag *fragP)
5505{
5506 valueT count = (fragP->fr_next->fr_address
5507 - (fragP->fr_address + fragP->fr_fix));
5508
5509 if (count != 0 && (count & 3) == 0)
5510 {
5511 char *dest = fragP->fr_literal + fragP->fr_fix;
5512
5513 fragP->fr_var = 4;
5514 md_number_to_chars (dest, 0x60000000, 4);
5515
5516 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5517 {
5518 /* For power6, we want the last nop to be a group terminating
5519 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5520 immediately after this one, with its address set to the last
5521 nop location. This will automatically reduce the number of
5522 nops in the current frag by one. */
5523 if (count > 4)
5524 {
5525 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5526
5527 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5528 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5529 group_nop->fr_fix = 0;
5530 group_nop->fr_offset = 1;
5531 group_nop->fr_type = rs_fill;
5532 fragP->fr_next = group_nop;
5533 dest = group_nop->fr_literal;
5534 }
5535
5536 md_number_to_chars (dest, 0x60210000, 4);
5537 }
5538 }
5539}
5540
252b5132
RH
5541/* Apply a fixup to the object code. This is called for all the
5542 fixups we generated by the call to fix_new_exp, above. In the call
5543 above we used a reloc code which was the largest legal reloc code
5544 plus the operand index. Here we undo that to recover the operand
5545 index. At this point all symbol values should be fully resolved,
5546 and we attempt to completely resolve the reloc. If we can not do
5547 that, we determine the correct reloc code and put it back in the
5548 fixup. */
5549
94f592af 5550void
98027b10 5551md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5552{
94f592af 5553 valueT value = * valP;
252b5132
RH
5554
5555#ifdef OBJ_ELF
94f592af 5556 if (fixP->fx_addsy != NULL)
252b5132 5557 {
a161fe53 5558 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC
5559 if (fixP->fx_pcrel)
5560 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH
5561 }
5562 else
94f592af 5563 fixP->fx_done = 1;
252b5132 5564#else
a161fe53 5565 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM
5566 the symbol values. If we are doing this relocation the code in
5567 write.c is going to call bfd_install_relocation, which is also
5568 going to use the symbol value. That means that if the reloc is
5569 fully resolved we want to use *valP since bfd_install_relocation is
5570 not being used.
252b5132 5571 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM
5572 *valP, and must use fx_offset instead. However, if the reloc
5573 is PC relative, we do want to use *valP since it includes the
252b5132 5574 result of md_pcrel_from. This is confusing. */
94f592af
NC
5575 if (fixP->fx_addsy == (symbolS *) NULL)
5576 fixP->fx_done = 1;
5577
5578 else if (fixP->fx_pcrel)
5579 ;
5580
252b5132 5581 else
a161fe53
AM
5582 value = fixP->fx_offset;
5583#endif
5584
5585 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5586 {
a161fe53
AM
5587 /* We can't actually support subtracting a symbol. */
5588 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5589 }
252b5132 5590
94f592af 5591 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH
5592 {
5593 int opindex;
5594 const struct powerpc_operand *operand;
5595 char *where;
5596 unsigned long insn;
5597
94f592af 5598 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH
5599
5600 operand = &powerpc_operands[opindex];
5601
5602#ifdef OBJ_XCOFF
0baf16f2
AM
5603 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5604 does not generate a reloc. It uses the offset of `sym' within its
5605 csect. Other usages, such as `.long sym', generate relocs. This
5606 is the documented behaviour of non-TOC symbols. */
252b5132 5607 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5608 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5609 && operand->shift == 0
2b3c4602 5610 && (operand->insert == NULL || ppc_obj64)
94f592af
NC
5611 && fixP->fx_addsy != NULL
5612 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5613 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5614 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5615 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5616 {
94f592af
NC
5617 value = fixP->fx_offset;
5618 fixP->fx_done = 1;
252b5132
RH
5619 }
5620#endif
5621
5622 /* Fetch the instruction, insert the fully resolved operand
5623 value, and stuff the instruction back again. */
94f592af 5624 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
5625 if (target_big_endian)
5626 insn = bfd_getb32 ((unsigned char *) where);
5627 else
5628 insn = bfd_getl32 ((unsigned char *) where);
5629 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5630 fixP->fx_file, fixP->fx_line);
252b5132
RH
5631 if (target_big_endian)
5632 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5633 else
5634 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5635
94f592af
NC
5636 if (fixP->fx_done)
5637 /* Nothing else to do here. */
5638 return;
252b5132 5639
94f592af 5640 assert (fixP->fx_addsy != NULL);
0baf16f2 5641
252b5132
RH
5642 /* Determine a BFD reloc value based on the operand information.
5643 We are only prepared to turn a few of the operands into
0baf16f2 5644 relocs. */
11b37b7b 5645 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5646 && operand->bitm == 0x3fffffc
11b37b7b 5647 && operand->shift == 0)
94f592af 5648 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5649 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5650 && operand->bitm == 0xfffc
11b37b7b 5651 && operand->shift == 0)
95210096
AM
5652 {
5653 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5654#ifdef OBJ_XCOFF
5655 fixP->fx_size = 2;
5656 if (target_big_endian)
5657 fixP->fx_where += 2;
5658#endif
5659 }
11b37b7b 5660 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5661 && operand->bitm == 0x3fffffc
11b37b7b 5662 && operand->shift == 0)
94f592af 5663 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5664 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5665 && operand->bitm == 0xfffc
11b37b7b 5666 && operand->shift == 0)
95210096
AM
5667 {
5668 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5669#ifdef OBJ_XCOFF
5670 fixP->fx_size = 2;
5671 if (target_big_endian)
5672 fixP->fx_where += 2;
5673#endif
5674 }
0baf16f2 5675#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5676 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5677 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5678 && operand->shift == 0)
11b37b7b 5679 {
a7fc733f
AM
5680 if (ppc_is_toc_sym (fixP->fx_addsy))
5681 {
5682 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5683#ifdef OBJ_ELF
a7fc733f
AM
5684 if (ppc_obj64
5685 && (operand->flags & PPC_OPERAND_DS) != 0)
5686 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5687#endif
5688 }
5689 else
5690 {
5691 fixP->fx_r_type = BFD_RELOC_16;
5692#ifdef OBJ_ELF
5693 if (ppc_obj64
5694 && (operand->flags & PPC_OPERAND_DS) != 0)
5695 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5696#endif
a7fc733f 5697 }
94f592af 5698 fixP->fx_size = 2;
11b37b7b 5699 if (target_big_endian)
94f592af 5700 fixP->fx_where += 2;
11b37b7b 5701 }
0baf16f2 5702#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5703 else
252b5132
RH
5704 {
5705 char *sfile;
5706 unsigned int sline;
5707
5708 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5709 symbol. */
94f592af
NC
5710 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5711 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
5712 _("unresolved expression that must be resolved"));
5713 else
94f592af 5714 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5715 _("unsupported relocation against %s"),
94f592af
NC
5716 S_GET_NAME (fixP->fx_addsy));
5717 fixP->fx_done = 1;
5718 return;
252b5132
RH
5719 }
5720 }
5721 else
5722 {
5723#ifdef OBJ_ELF
94f592af 5724 ppc_elf_validate_fix (fixP, seg);
252b5132 5725#endif
94f592af 5726 switch (fixP->fx_r_type)
252b5132 5727 {
252b5132 5728 case BFD_RELOC_CTOR:
2b3c4602 5729 if (ppc_obj64)
9c7977b3
AM
5730 goto ctor64;
5731 /* fall through */
5732
0baf16f2 5733 case BFD_RELOC_32:
94f592af
NC
5734 if (fixP->fx_pcrel)
5735 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5736 /* fall through */
252b5132
RH
5737
5738 case BFD_RELOC_RVA:
5739 case BFD_RELOC_32_PCREL:
252b5132 5740 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5741 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5742 value, 4);
5743 break;
5744
7f6d05e8 5745 case BFD_RELOC_64:
9c7977b3 5746 ctor64:
94f592af
NC
5747 if (fixP->fx_pcrel)
5748 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5749 /* fall through */
0baf16f2 5750
7f6d05e8 5751 case BFD_RELOC_64_PCREL:
94f592af 5752 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5753 value, 8);
81d4177b 5754 break;
0baf16f2 5755
252b5132
RH
5756 case BFD_RELOC_GPREL16:
5757 case BFD_RELOC_16_GOT_PCREL:
5758 case BFD_RELOC_16_GOTOFF:
5759 case BFD_RELOC_LO16_GOTOFF:
5760 case BFD_RELOC_HI16_GOTOFF:
5761 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5762 case BFD_RELOC_16_BASEREL:
252b5132
RH
5763 case BFD_RELOC_LO16_BASEREL:
5764 case BFD_RELOC_HI16_BASEREL:
5765 case BFD_RELOC_HI16_S_BASEREL:
5766 case BFD_RELOC_PPC_EMB_NADDR16:
5767 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5768 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5769 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5770 case BFD_RELOC_PPC_EMB_SDAI16:
5771 case BFD_RELOC_PPC_EMB_SDA2REL:
5772 case BFD_RELOC_PPC_EMB_SDA2I16:
5773 case BFD_RELOC_PPC_EMB_RELSEC16:
5774 case BFD_RELOC_PPC_EMB_RELST_LO:
5775 case BFD_RELOC_PPC_EMB_RELST_HI:
5776 case BFD_RELOC_PPC_EMB_RELST_HA:
5777 case BFD_RELOC_PPC_EMB_RELSDA:
5778 case BFD_RELOC_PPC_TOC16:
0baf16f2 5779#ifdef OBJ_ELF
0baf16f2
AM
5780 case BFD_RELOC_PPC64_TOC16_LO:
5781 case BFD_RELOC_PPC64_TOC16_HI:
5782 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5783#endif
94f592af 5784 if (fixP->fx_pcrel)
252b5132 5785 {
94f592af
NC
5786 if (fixP->fx_addsy != NULL)
5787 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5788 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC
5789 bfd_get_reloc_code_name (fixP->fx_r_type),
5790 S_GET_NAME (fixP->fx_addsy));
252b5132 5791 else
94f592af 5792 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5793 _("cannot emit PC relative %s relocation"),
94f592af 5794 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH
5795 }
5796
94f592af 5797 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5798 value, 2);
5799 break;
5800
3c9d25f4
AM
5801 case BFD_RELOC_16:
5802 if (fixP->fx_pcrel)
5803 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5804 /* fall through */
5805
5806 case BFD_RELOC_16_PCREL:
5807 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5808 value, 2);
5809 break;
5810
5811 case BFD_RELOC_LO16:
5812 if (fixP->fx_pcrel)
5813 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5814 /* fall through */
5815
5816 case BFD_RELOC_LO16_PCREL:
5817 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5818 value, 2);
5819 break;
5820
252b5132
RH
5821 /* This case happens when you write, for example,
5822 lis %r3,(L1-L2)@ha
5823 where L1 and L2 are defined later. */
5824 case BFD_RELOC_HI16:
94f592af 5825 if (fixP->fx_pcrel)
3c9d25f4
AM
5826 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5827 /* fall through */
5828
5829 case BFD_RELOC_HI16_PCREL:
94f592af 5830 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5831 PPC_HI (value), 2);
252b5132 5832 break;
0baf16f2 5833
252b5132 5834 case BFD_RELOC_HI16_S:
94f592af 5835 if (fixP->fx_pcrel)
3c9d25f4
AM
5836 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5837 /* fall through */
5838
5839 case BFD_RELOC_HI16_S_PCREL:
94f592af 5840 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5841 PPC_HA (value), 2);
5842 break;
5843
5844#ifdef OBJ_ELF
0baf16f2 5845 case BFD_RELOC_PPC64_HIGHER:
94f592af 5846 if (fixP->fx_pcrel)
0baf16f2 5847 abort ();
94f592af 5848 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5849 PPC_HIGHER (value), 2);
252b5132
RH
5850 break;
5851
0baf16f2 5852 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5853 if (fixP->fx_pcrel)
0baf16f2 5854 abort ();
94f592af 5855 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5856 PPC_HIGHERA (value), 2);
5857 break;
5858
5859 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5860 if (fixP->fx_pcrel)
0baf16f2 5861 abort ();
94f592af 5862 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5863 PPC_HIGHEST (value), 2);
5864 break;
5865
5866 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5867 if (fixP->fx_pcrel)
0baf16f2 5868 abort ();
94f592af 5869 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5870 PPC_HIGHESTA (value), 2);
5871 break;
5872
5873 case BFD_RELOC_PPC64_ADDR16_DS:
5874 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5875 case BFD_RELOC_PPC64_GOT16_DS:
5876 case BFD_RELOC_PPC64_GOT16_LO_DS:
5877 case BFD_RELOC_PPC64_PLT16_LO_DS:
5878 case BFD_RELOC_PPC64_SECTOFF_DS:
5879 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5880 case BFD_RELOC_PPC64_TOC16_DS:
5881 case BFD_RELOC_PPC64_TOC16_LO_DS:
5882 case BFD_RELOC_PPC64_PLTGOT16_DS:
5883 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5884 if (fixP->fx_pcrel)
0baf16f2
AM
5885 abort ();
5886 {
2132e3a3 5887 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5888 unsigned long val, mask;
0baf16f2
AM
5889
5890 if (target_big_endian)
adadcc0c 5891 val = bfd_getb32 (where - 2);
0baf16f2 5892 else
adadcc0c
AM
5893 val = bfd_getl32 (where);
5894 mask = 0xfffc;
5895 /* lq insns reserve the four lsbs. */
5896 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5897 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM
5898 mask = 0xfff0;
5899 val |= value & mask;
0baf16f2
AM
5900 if (target_big_endian)
5901 bfd_putb16 ((bfd_vma) val, where);
5902 else
5903 bfd_putl16 ((bfd_vma) val, where);
5904 }
5905 break;
cdba85ec 5906
ba0b2174
AM
5907 case BFD_RELOC_PPC_B16_BRTAKEN:
5908 case BFD_RELOC_PPC_B16_BRNTAKEN:
5909 case BFD_RELOC_PPC_BA16_BRTAKEN:
5910 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5911 break;
5912
cdba85ec 5913 case BFD_RELOC_PPC_TLS:
7c1d0959
L
5914 break;
5915
cdba85ec
AM
5916 case BFD_RELOC_PPC_DTPMOD:
5917 case BFD_RELOC_PPC_TPREL16:
5918 case BFD_RELOC_PPC_TPREL16_LO:
5919 case BFD_RELOC_PPC_TPREL16_HI:
5920 case BFD_RELOC_PPC_TPREL16_HA:
5921 case BFD_RELOC_PPC_TPREL:
5922 case BFD_RELOC_PPC_DTPREL16:
5923 case BFD_RELOC_PPC_DTPREL16_LO:
5924 case BFD_RELOC_PPC_DTPREL16_HI:
5925 case BFD_RELOC_PPC_DTPREL16_HA:
5926 case BFD_RELOC_PPC_DTPREL:
5927 case BFD_RELOC_PPC_GOT_TLSGD16:
5928 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5929 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5930 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5931 case BFD_RELOC_PPC_GOT_TLSLD16:
5932 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5933 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5934 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5935 case BFD_RELOC_PPC_GOT_TPREL16:
5936 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5937 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5938 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5939 case BFD_RELOC_PPC_GOT_DTPREL16:
5940 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5941 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5942 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5943 case BFD_RELOC_PPC64_TPREL16_DS:
5944 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5945 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5946 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5947 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5948 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5949 case BFD_RELOC_PPC64_DTPREL16_DS:
5950 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5951 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5952 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5953 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5954 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5955 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5956 break;
0baf16f2 5957#endif
252b5132 5958 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5959 bytes, rather than 2, so offset it here appropriately. */
252b5132 5960 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5961 if (fixP->fx_pcrel)
252b5132
RH
5962 abort ();
5963
94f592af 5964 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH
5965 + ((target_big_endian) ? 2 : 0),
5966 value, 2);
5967 break;
5968
5969 case BFD_RELOC_8:
94f592af 5970 if (fixP->fx_pcrel)
31a91399
NC
5971 {
5972 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5973 ".byte <undefined_symbol> - ." */
31a91399
NC
5974 if (fixP->fx_addsy)
5975 as_bad (_("Unable to handle reference to symbol %s"),
5976 S_GET_NAME (fixP->fx_addsy));
5977 else
5978 as_bad (_("Unable to resolve expression"));
5979 fixP->fx_done = 1;
5980 }
5981 else
5982 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5983 value, 1);
252b5132
RH
5984 break;
5985
5986 case BFD_RELOC_24_PLT_PCREL:
5987 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5988 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH
5989 abort ();
5990
94f592af 5991 if (fixP->fx_done)
99a814a1
AM
5992 {
5993 char *where;
5994 unsigned long insn;
5995
5996 /* Fetch the instruction, insert the fully resolved operand
5997 value, and stuff the instruction back again. */
94f592af 5998 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM
5999 if (target_big_endian)
6000 insn = bfd_getb32 ((unsigned char *) where);
6001 else
6002 insn = bfd_getl32 ((unsigned char *) where);
6003 if ((value & 3) != 0)
94f592af 6004 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
6005 _("must branch to an address a multiple of 4"));
6006 if ((offsetT) value < -0x40000000
6007 || (offsetT) value >= 0x40000000)
94f592af 6008 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
6009 _("@local or @plt branch destination is too far away, %ld bytes"),
6010 (long) value);
6011 insn = insn | (value & 0x03fffffc);
6012 if (target_big_endian)
6013 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6014 else
6015 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6016 }
252b5132
RH
6017 break;
6018
6019 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC
6020 fixP->fx_done = 0;
6021 if (fixP->fx_addsy
6022 && !S_IS_DEFINED (fixP->fx_addsy)
6023 && !S_IS_WEAK (fixP->fx_addsy))
6024 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH
6025 break;
6026
6027 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6028 fixP->fx_done = 0;
252b5132
RH
6029 break;
6030
0baf16f2 6031#ifdef OBJ_ELF
0baf16f2
AM
6032 /* Generated by reference to `sym@tocbase'. The sym is
6033 ignored by the linker. */
6034 case BFD_RELOC_PPC64_TOC:
94f592af 6035 fixP->fx_done = 0;
0baf16f2 6036 break;
0baf16f2 6037#endif
252b5132 6038 default:
bc805888 6039 fprintf (stderr,
94f592af 6040 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6041 fflush (stderr);
252b5132
RH
6042 abort ();
6043 }
6044 }
6045
6046#ifdef OBJ_ELF
94f592af 6047 fixP->fx_addnumber = value;
4e6935a6
AM
6048
6049 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6050 from the section contents. If we are going to be emitting a reloc
6051 then the section contents are immaterial, so don't warn if they
6052 happen to overflow. Leave such warnings to ld. */
6053 if (!fixP->fx_done)
6054 fixP->fx_no_overflow = 1;
252b5132 6055#else
94f592af
NC
6056 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6057 fixP->fx_addnumber = 0;
252b5132
RH
6058 else
6059 {
6060#ifdef TE_PE
94f592af 6061 fixP->fx_addnumber = 0;
252b5132 6062#else
8edcbfcd
TG
6063 /* We want to use the offset within the toc, not the actual VMA
6064 of the symbol. */
94f592af 6065 fixP->fx_addnumber =
8edcbfcd
TG
6066 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6067 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH
6068#endif
6069 }
6070#endif
252b5132
RH
6071}
6072
6073/* Generate a reloc for a fixup. */
6074
6075arelent *
98027b10 6076tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH
6077{
6078 arelent *reloc;
6079
6080 reloc = (arelent *) xmalloc (sizeof (arelent));
6081
49309057
ILT
6082 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6083 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
6084 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6085 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6086 if (reloc->howto == (reloc_howto_type *) NULL)
6087 {
6088 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM
6089 _("reloc %d not supported by object file format"),
6090 (int) fixp->fx_r_type);
252b5132
RH
6091 return NULL;
6092 }
6093 reloc->addend = fixp->fx_addnumber;
6094
6095 return reloc;
6096}
75e21f08
JJ
6097
6098void
98027b10 6099ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ
6100{
6101 cfi_add_CFA_def_cfa (1, 0);
6102}
6103
6104int
1df69f4f 6105tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ
6106{
6107 unsigned int regnum = -1;
6108 unsigned int i;
6109 const char *p;
6110 char *q;
6111 static struct { char *name; int dw2regnum; } regnames[] =
6112 {
6113 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6114 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6115 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ
6116 { "spe_acc", 111 }, { "spefscr", 112 }
6117 };
6118
6119 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6120 if (strcmp (regnames[i].name, regname) == 0)
6121 return regnames[i].dw2regnum;
6122
6123 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6124 {
6125 p = regname + 1 + (regname[1] == '.');
6126 regnum = strtoul (p, &q, 10);
6127 if (p == q || *q || regnum >= 32)
6128 return -1;
6129 if (regname[0] == 'f')
b7d7dc63 6130 regnum += 32;
75e21f08 6131 else if (regname[0] == 'v')
b7d7dc63 6132 regnum += 77;
75e21f08
JJ
6133 }
6134 else if (regname[0] == 'c' && regname[1] == 'r')
6135 {
6136 p = regname + 2 + (regname[2] == '.');
6137 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6138 return -1;
75e21f08
JJ
6139 regnum = p[0] - '0' + 68;
6140 }
6141 return regnum;
6142}