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Reorder some power9 insns
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b90efa5b 2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132 862
d02603dc 863 c = get_symbol_name (&name);
252b5132
RH		 864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
98027b10 1081md_parse_option (int c, char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015 1283 generate code for PowerPC 7400/7410/7450/7455\n\
ef5a96d5
AM		 1284-m750cl generate code for PowerPC 750cl\n\
1285-m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
df12615d 1286 fprintf (stream, _("\
ce3d2015
AM		 1287-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1288-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1289-mbooke generate code for 32-bit PowerPC BookE\n\
1290-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1291-mpower4, -mpwr4 generate code for Power4 architecture\n\
1292-mpower5, -mpwr5, -mpwr5x\n\
1293 generate code for Power5 architecture\n\
1294-mpower6, -mpwr6 generate code for Power6 architecture\n\
1295-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1296-mpower8, -mpwr8 generate code for Power8 architecture\n\
a680de9a 1297-mpower9, -mpwr9 generate code for Power9 architecture\n\
ce3d2015
AM		 1298-mcell generate code for Cell Broadband Engine architecture\n\
1299-mcom generate code Power/PowerPC common instructions\n\
1300-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1301 fprintf (stream, _("\
ce3d2015
AM		 1302-maltivec generate code for AltiVec\n\
1303-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1304-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1305-me300 generate code for PowerPC e300 family\n\
1306-me500, -me500x2 generate code for Motorola e500 core complex\n\
1307-me500mc, generate code for Freescale e500mc core complex\n\
1308-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1309-me5500, generate code for Freescale e5500 core complex\n\
1310-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1311-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1312-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1313-mtitan generate code for AppliedMicro Titan core complex\n\
1314-mregnames Allow symbolic names for registers\n\
1315-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1316#ifdef OBJ_ELF
bc805888 1317 fprintf (stream, _("\
ce3d2015
AM		 1318-mrelocatable support for GCC's -mrelocatble option\n\
1319-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1320-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1321-mlittle, -mlittle-endian, -le\n\
ce3d2015 1322 generate code for a little endian machine\n\
b8b738ac 1323-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1324 generate code for a big endian machine\n\
1325-msolaris generate code for Solaris\n\
1326-mno-solaris do not generate code for Solaris\n\
b8b738ac 1327-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1328-V print assembler version number\n\
1329-Qy, -Qn ignored\n"));
252b5132 1330#endif
cef4f754 1331 fprintf (stream, _("\
bf7279d5
AM		 1332-nops=count when aligning, more than COUNT nops uses a branch\n\
1333-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1334}
1335\f
1336/* Set ppc_cpu if it is not already set. */
1337
1338static void
98027b10 1339ppc_set_cpu (void)
252b5132
RH		 1340{
1341 const char *default_os = TARGET_OS;
1342 const char *default_cpu = TARGET_CPU;
1343
7102e95e 1344 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1345 {
2a98c3a6 1346 if (ppc_obj64)
bdc70b4a 1347 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1348 else if (strncmp (default_os, "aix", 3) == 0
1349 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1350 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1351 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1352 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1353 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1354 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1355 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1356 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1357 else
d6ed37ed 1358 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1359 default_cpu, default_os);
252b5132
RH		 1360 }
1361}
1362
9232bbb0
AM		 1363/* Figure out the BFD architecture to use. This function and ppc_mach
1364 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1365
1366enum bfd_architecture
98027b10 1367ppc_arch (void)
252b5132
RH		 1368{
1369 const char *default_cpu = TARGET_CPU;
1370 ppc_set_cpu ();
1371
1372 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1373 return bfd_arch_powerpc;
b9c361e0
JL		 1374 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1375 return bfd_arch_powerpc;
1376 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1377 return bfd_arch_rs6000;
b9c361e0 1378 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1379 {
1380 if (strcmp (default_cpu, "rs6000") == 0)
1381 return bfd_arch_rs6000;
0baf16f2 1382 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1383 return bfd_arch_powerpc;
1384 }
1385
d6ed37ed 1386 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1387 return bfd_arch_unknown;
1388}
1389
7f6d05e8 1390unsigned long
98027b10 1391ppc_mach (void)
7f6d05e8 1392{
2a98c3a6
AM		 1393 if (ppc_obj64)
1394 return bfd_mach_ppc64;
1395 else if (ppc_arch () == bfd_arch_rs6000)
1396 return bfd_mach_rs6k;
ce3d2015
AM		 1397 else if (ppc_cpu & PPC_OPCODE_TITAN)
1398 return bfd_mach_ppc_titan;
b9c361e0
JL		 1399 else if (ppc_cpu & PPC_OPCODE_VLE)
1400 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1401 else
1402 return bfd_mach_ppc;
7f6d05e8
CP		 1403}
1404
81d4177b 1405extern char*
98027b10 1406ppc_target_format (void)
7f6d05e8
CP		 1407{
1408#ifdef OBJ_COFF
1409#ifdef TE_PE
99a814a1 1410 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1411#elif TE_POWERMAC
0baf16f2 1412 return "xcoff-powermac";
7f6d05e8 1413#else
eb1e0e80 1414# ifdef TE_AIX5
edc1d652 1415 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1416# else
edc1d652 1417 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1418# endif
7f6d05e8 1419#endif
7f6d05e8
CP		 1420#endif
1421#ifdef OBJ_ELF
edc1d652
AM		 1422# ifdef TE_FreeBSD
1423 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1424# elif defined (TE_VXWORKS)
9d8504b1
PB		 1425 return "elf32-powerpc-vxworks";
1426# else
0baf16f2 1427 return (target_big_endian
2b3c4602
AM		 1428 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1429 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1430# endif
7f6d05e8
CP		 1431#endif
1432}
1433
b9c361e0
JL		 1434/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1435 Return TRUE if there's a problem, otherwise FALSE. */
1436
1437static bfd_boolean
1438insn_validate (const struct powerpc_opcode *op)
1439{
1440 const unsigned char *o;
1441 unsigned long omask = op->mask;
1442
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1445 {
1446 as_bad (_("mask trims opcode bits for %s"), op->name);
1447 return TRUE;
1448 }
1449
1450 /* The operands must not overlap the opcode or each other. */
1451 for (o = op->operands; *o; ++o)
1452 {
1453 if (*o >= num_powerpc_operands)
1454 {
1455 as_bad (_("operand index error for %s"), op->name);
1456 return TRUE;
1457 }
1458 else
1459 {
1460 const struct powerpc_operand *operand = &powerpc_operands[*o];
b6518b38 1461 if (operand->shift != (int) PPC_OPSHIFT_INV)
b9c361e0
JL		 1462 {
1463 unsigned long mask;
1464
1465 if (operand->shift >= 0)
1466 mask = operand->bitm << operand->shift;
1467 else
1468 mask = operand->bitm >> -operand->shift;
1469 if (omask & mask)
1470 {
1471 as_bad (_("operand %d overlap in %s"),
1472 (int) (o - op->operands), op->name);
1473 return TRUE;
1474 }
1475 omask |= mask;
1476 }
1477 }
1478 }
1479 return FALSE;
1480}
1481
69c040df 1482/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1483 for .machine pseudo. */
252b5132 1484
69c040df
AM		 1485static void
1486ppc_setup_opcodes (void)
252b5132 1487{
98027b10 1488 const struct powerpc_opcode *op;
252b5132
RH		 1489 const struct powerpc_opcode *op_end;
1490 const struct powerpc_macro *macro;
1491 const struct powerpc_macro *macro_end;
b84bf58a 1492 bfd_boolean bad_insn = FALSE;
252b5132 1493
69c040df
AM		 1494 if (ppc_hash != NULL)
1495 hash_die (ppc_hash);
1496 if (ppc_macro_hash != NULL)
1497 hash_die (ppc_macro_hash);
252b5132
RH		 1498
1499 /* Insert the opcodes into a hash table. */
1500 ppc_hash = hash_new ();
1501
c43a438d 1502 if (ENABLE_CHECKING)
b84bf58a 1503 {
c43a438d 1504 unsigned int i;
b84bf58a 1505
3b8b57a9
AM		 1506 /* An index into powerpc_operands is stored in struct fix
1507 fx_pcrel_adjust which is 8 bits wide. */
1508 gas_assert (num_powerpc_operands < 256);
1509
c43a438d
AM		 1510 /* Check operand masks. Code here and in the disassembler assumes
1511 all the 1's in the mask are contiguous. */
1512 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1513 {
c43a438d
AM		 1514 unsigned long mask = powerpc_operands[i].bitm;
1515 unsigned long right_bit;
1516 unsigned int j;
1517
1518 right_bit = mask & -mask;
1519 mask += right_bit;
1520 right_bit = mask & -mask;
1521 if (mask != right_bit)
1522 {
1523 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1524 bad_insn = TRUE;
1525 }
1526 for (j = i + 1; j < num_powerpc_operands; ++j)
1527 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1528 sizeof (powerpc_operands[0])) == 0)
1529 {
1530 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1531 j, i);
1532 bad_insn = TRUE;
1533 }
b84bf58a
AM		 1534 }
1535 }
1536
252b5132
RH		 1537 op_end = powerpc_opcodes + powerpc_num_opcodes;
1538 for (op = powerpc_opcodes; op < op_end; op++)
1539 {
c43a438d 1540 if (ENABLE_CHECKING)
b84bf58a 1541 {
d815f1a9 1542 if (op != powerpc_opcodes)
8dbcd839 1543 {
b9c361e0
JL		 1544 int old_opcode = PPC_OP (op[-1].opcode);
1545 int new_opcode = PPC_OP (op[0].opcode);
1546
1547#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1548 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1549 op->name, (unsigned int) (op - powerpc_opcodes),
1550 (unsigned int) new_opcode, (unsigned int) op->opcode,
1551 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1552#endif
1553
d815f1a9
AM		 1554 /* The major opcodes had better be sorted. Code in the
1555 disassembler assumes the insns are sorted according to
1556 major opcode. */
b9c361e0 1557 if (new_opcode < old_opcode)
d815f1a9
AM		 1558 {
1559 as_bad (_("major opcode is not sorted for %s"),
1560 op->name);
1561 bad_insn = TRUE;
1562 }
8dbcd839 1563 }
b9c361e0
JL		 1564 bad_insn |= insn_validate (op);
1565 }
c43a438d 1566
b9c361e0
JL		 1567 if ((ppc_cpu & op->flags) != 0
1568 && !(ppc_cpu & op->deprecated))
1569 {
1570 const char *retval;
1571
1572 retval = hash_insert (ppc_hash, op->name, (void *) op);
1573 if (retval != NULL)
c43a438d 1574 {
b9c361e0 1575 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1576 op->name);
1577 bad_insn = TRUE;
1578 }
b9c361e0
JL		 1579 }
1580 }
c43a438d 1581
b9c361e0
JL		 1582 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1583 for (op = powerpc_opcodes; op < op_end; op++)
1584 hash_insert (ppc_hash, op->name, (void *) op);
1585
1586 op_end = vle_opcodes + vle_num_opcodes;
1587 for (op = vle_opcodes; op < op_end; op++)
1588 {
1589 if (ENABLE_CHECKING)
1590 {
1591 if (op != vle_opcodes)
1592 {
1593 unsigned old_seg, new_seg;
1594
1595 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1596 old_seg = VLE_OP_TO_SEG (old_seg);
1597 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1598 new_seg = VLE_OP_TO_SEG (new_seg);
1599
1600#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1601 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1602 op->name, (unsigned int) (op - powerpc_opcodes),
1603 (unsigned int) new_seg, (unsigned int) op->opcode,
1604 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1605#endif
1606 /* The major opcodes had better be sorted. Code in the
1607 disassembler assumes the insns are sorted according to
1608 major opcode. */
1609 if (new_seg < old_seg)
1610 {
1611 as_bad (_("major opcode is not sorted for %s"),
1612 op->name);
1613 bad_insn = TRUE;
1614 }
1615 }
1616
1617 bad_insn |= insn_validate (op);
c43a438d 1618 }
252b5132 1619
bdc70b4a 1620 if ((ppc_cpu & op->flags) != 0
1cb0a767 1621 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1622 {
1623 const char *retval;
1624
98027b10 1625 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1626 if (retval != NULL)
252b5132 1627 {
b84bf58a 1628 as_bad (_("duplicate instruction %s"),
99a814a1 1629 op->name);
b84bf58a 1630 bad_insn = TRUE;
252b5132
RH		 1631 }
1632 }
1633 }
1634
b9c361e0
JL		 1635 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1636 for (op = vle_opcodes; op < op_end; op++)
98027b10 1637 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1638
252b5132
RH		 1639 /* Insert the macros into a hash table. */
1640 ppc_macro_hash = hash_new ();
1641
1642 macro_end = powerpc_macros + powerpc_num_macros;
1643 for (macro = powerpc_macros; macro < macro_end; macro++)
1644 {
33740db9 1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1646 {
1647 const char *retval;
1648
98027b10 1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1650 if (retval != (const char *) NULL)
1651 {
b84bf58a
AM		 1652 as_bad (_("duplicate macro %s"), macro->name);
1653 bad_insn = TRUE;
252b5132
RH		 1654 }
1655 }
1656 }
1657
b84bf58a 1658 if (bad_insn)
252b5132 1659 abort ();
69c040df
AM		 1660}
1661
1662/* This function is called when the assembler starts up. It is called
1663 after the options have been parsed and the output file has been
1664 opened. */
1665
1666void
98027b10 1667md_begin (void)
69c040df
AM		 1668{
1669 ppc_set_cpu ();
1670
1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1673
1674#ifdef OBJ_ELF
1675 /* Set the ELF flags if desired. */
1676 if (ppc_flags && !msolaris)
1677 bfd_set_private_flags (stdoutput, ppc_flags);
1678#endif
1679
1680 ppc_setup_opcodes ();
252b5132 1681
67c1ffbe 1682 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1683 by the user. */
252b5132
RH		 1684 if (!set_target_endian)
1685 {
1686 set_target_endian = 1;
1687 target_big_endian = PPC_BIG_ENDIAN;
1688 }
1689
1690#ifdef OBJ_XCOFF
1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1692
1693 /* Create dummy symbols to serve as initial csects. This forces the
1694 text csects to precede the data csects. These symbols will not
1695 be output. */
1696 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1698 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1700#endif
1701
1702#ifdef TE_PE
1703
1704 ppc_current_section = text_section;
81d4177b 1705 ppc_previous_section = 0;
252b5132
RH		 1706
1707#endif
1708}
1709
6a0c61b7 1710void
98027b10 1711ppc_cleanup (void)
6a0c61b7 1712{
dc1d03fc 1713#ifdef OBJ_ELF
6a0c61b7
EZ		 1714 if (ppc_apuinfo_list == NULL)
1715 return;
1716
1717 /* Ok, so write the section info out. We have this layout:
1718
1719 byte data what
1720 ---- ---- ----
1721 0 8 length of "APUinfo\0"
1722 4 (n*4) number of APU's (4 bytes each)
1723 8 2 note type 2
1724 12 "APUinfo\0" name
1725 20 APU#1 first APU's info
1726 24 APU#2 second APU's info
1727 ... ...
1728 */
1729 {
1730 char *p;
1731 asection *seg = now_seg;
1732 subsegT subseg = now_subseg;
1733 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1734 unsigned int i;
6a0c61b7
EZ		 1735
1736 /* Create the .PPC.EMB.apuinfo section. */
1737 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1738 bfd_set_section_flags (stdoutput,
1739 apuinfo_secp,
e1a9cb8e 1740 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1741
1742 p = frag_more (4);
1743 md_number_to_chars (p, (valueT) 8, 4);
1744
1745 p = frag_more (4);
e98d298c 1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1747
1748 p = frag_more (4);
1749 md_number_to_chars (p, (valueT) 2, 4);
1750
1751 p = frag_more (8);
1752 strcpy (p, "APUinfo");
1753
1754 for (i = 0; i < ppc_apuinfo_num; i++)
1755 {
b34976b6
AM		 1756 p = frag_more (4);
1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1758 }
1759
1760 frag_align (2, 0, 0);
1761
1762 /* We probably can't restore the current segment, for there likely
1763 isn't one yet... */
1764 if (seg && subseg)
1765 subseg_set (seg, subseg);
1766 }
dc1d03fc 1767#endif
6a0c61b7
EZ		 1768}
1769
252b5132
RH		 1770/* Insert an operand value into an instruction. */
1771
1772static unsigned long
a1867a27
AM		 1773ppc_insert_operand (unsigned long insn,
1774 const struct powerpc_operand *operand,
1775 offsetT val,
91d6fa6a 1776 ppc_cpu_t cpu,
a1867a27
AM		 1777 char *file,
1778 unsigned int line)
252b5132 1779{
b84bf58a 1780 long min, max, right;
eb42fac1 1781
b84bf58a
AM		 1782 max = operand->bitm;
1783 right = max & -max;
1784 min = 0;
1785
a47622ac 1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1787 {
a47622ac
AM		 1788 /* Extend the allowed range for addis to [-65536, 65535].
1789 Similarly for some VLE high part insns. For 64-bit it
1790 would be good to disable this for signed fields since the
1791 value is sign extended into the high 32 bits of the register.
1792 If the value is, say, an address, then we might care about
1793 the high bits. However, gcc as of 2014-06 uses unsigned
1794 values when loading the high part of 64-bit constants using
1795 lis.
1796 Use the same extended range for cmpli, to allow at least
1797 [-32768, 65535]. */
1798 min = ~max & -right;
1799 }
1800 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1801 {
1802 max = (max >> 1) & -right;
931774a9 1803 min = ~max & -right;
b84bf58a 1804 }
252b5132 1805
b84bf58a 1806 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1807 max++;
252b5132 1808
b84bf58a 1809 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1810 {
1811 long tmp = min;
1812 min = -max;
1813 max = -tmp;
1814 }
b84bf58a 1815
a1867a27
AM		 1816 if (min <= max)
1817 {
1818 /* Some people write constants with the sign extension done by
1819 hand but only up to 32 bits. This shouldn't really be valid,
1820 but, to permit this code to assemble on a 64-bit host, we
1821 sign extend the 32-bit value to 64 bits if so doing makes the
1822 value valid. */
1823 if (val > max
1824 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1825 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1826 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1827 val = val - 0x80000000 - 0x80000000;
1828
1829 /* Similarly, people write expressions like ~(1<<15), and expect
1830 this to be OK for a 32-bit unsigned value. */
1831 else if (val < min
1832 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1833 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1834 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1835 val = val + 0x80000000 + 0x80000000;
1836
1837 else if (val < min
1838 || val > max
1839 || (val & (right - 1)) != 0)
1840 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1841 }
b84bf58a 1842
252b5132
RH		 1843 if (operand->insert)
1844 {
1845 const char *errmsg;
1846
1847 errmsg = NULL;
91d6fa6a 1848 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1849 if (errmsg != (const char *) NULL)
ee2c9aa9 1850 as_bad_where (file, line, "%s", errmsg);
252b5132 1851 }
b9c361e0 1852 else if (operand->shift >= 0)
b84bf58a 1853 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1854 else
1855 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1856
1857 return insn;
1858}
1859
1860\f
1861#ifdef OBJ_ELF
1862/* Parse @got, etc. and return the desired relocation. */
1863static bfd_reloc_code_real_type
98027b10 1864ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1865{
1866 struct map_bfd {
1867 char *string;
b7d7dc63
AM		 1868 unsigned int length : 8;
1869 unsigned int valid32 : 1;
1870 unsigned int valid64 : 1;
1871 unsigned int reloc;
252b5132
RH		 1872 };
1873
1874 char ident[20];
1875 char *str = *str_p;
1876 char *str2;
1877 int ch;
1878 int len;
15c1449b 1879 const struct map_bfd *ptr;
252b5132 1880
b7d7dc63
AM		 1881#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1882#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1883#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1884
15c1449b 1885 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1886 MAP ("l", BFD_RELOC_LO16),
1887 MAP ("h", BFD_RELOC_HI16),
1888 MAP ("ha", BFD_RELOC_HI16_S),
1889 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1890 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1891 MAP ("got", BFD_RELOC_16_GOTOFF),
1892 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1893 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1894 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1895 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1896 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1897 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1898 MAP ("copy", BFD_RELOC_PPC_COPY),
1899 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1900 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1901 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1902 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1903 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1904 MAP ("tls", BFD_RELOC_PPC_TLS),
1905 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1906 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1907 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1908 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1909 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1910 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1911 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1912 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1913 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1914 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1915 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1916 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1917 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1918 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1919 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1920 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1921 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1922 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1923 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1924 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1925 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1926 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1927 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1928 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1929 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1930 MAP32 ("fixup", BFD_RELOC_CTOR),
1931 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1932 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1933 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1934 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1935 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1936 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1937 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1938 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1939 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1940 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1941 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1942 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1943 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1944 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1945 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1946 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1947 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1948 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1949 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1950 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1951 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1952 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1953 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1954 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1955 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1956 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1957 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1958 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1959 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1960 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1961 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1962 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1963 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1964 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1965 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1966 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1967 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1968 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1969 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1970 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1971 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1972 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1973 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1974 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1975 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1976 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1977 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1978 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1979 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1980 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1981 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1982 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1983 };
1984
1985 if (*str++ != '@')
62ebcb5c 1986 return BFD_RELOC_NONE;
252b5132
RH		 1987
1988 for (ch = *str, str2 = ident;
1989 (str2 < ident + sizeof (ident) - 1
3882b010 1990 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1991 ch = *++str)
1992 {
3882b010 1993 *str2++ = TOLOWER (ch);
252b5132
RH		 1994 }
1995
1996 *str2 = '\0';
1997 len = str2 - ident;
1998
1999 ch = ident[0];
2000 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2001 if (ch == ptr->string[0]
2002 && len == ptr->length
b7d7dc63
AM		 2003 && memcmp (ident, ptr->string, ptr->length) == 0
2004 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2005 {
15c1449b
AM		 2006 int reloc = ptr->reloc;
2007
727fc41e
AM		 2008 if (!ppc_obj64 && exp_p->X_add_number != 0)
2009 {
2010 switch (reloc)
2011 {
2012 case BFD_RELOC_16_GOTOFF:
2013 case BFD_RELOC_LO16_GOTOFF:
2014 case BFD_RELOC_HI16_GOTOFF:
2015 case BFD_RELOC_HI16_S_GOTOFF:
2016 as_warn (_("identifier+constant@got means "
2017 "identifier@got+constant"));
2018 break;
2019
2020 case BFD_RELOC_PPC_GOT_TLSGD16:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2022 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2023 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2024 case BFD_RELOC_PPC_GOT_TLSLD16:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2026 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2027 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2028 case BFD_RELOC_PPC_GOT_DTPREL16:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2030 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2031 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2032 case BFD_RELOC_PPC_GOT_TPREL16:
2033 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2034 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2035 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2036 as_bad (_("symbol+offset not supported for got tls"));
2037 break;
2038 }
2039 }
5f6db75a
AM		 2040
2041 /* Now check for identifier@suffix+constant. */
2042 if (*str == '-' || *str == '+')
252b5132 2043 {
5f6db75a
AM		 2044 char *orig_line = input_line_pointer;
2045 expressionS new_exp;
2046
2047 input_line_pointer = str;
2048 expression (&new_exp);
2049 if (new_exp.X_op == O_constant)
252b5132 2050 {
5f6db75a
AM		 2051 exp_p->X_add_number += new_exp.X_add_number;
2052 str = input_line_pointer;
252b5132 2053 }
5f6db75a
AM		 2054
2055 if (&input_line_pointer != str_p)
2056 input_line_pointer = orig_line;
252b5132 2057 }
252b5132 2058 *str_p = str;
0baf16f2 2059
2b3c4602 2060 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2061 && exp_p->X_op == O_symbol
2062 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2063 {
9f2b53d7
AM		 2064 /* Change the symbol so that the dummy .TOC. symbol can be
2065 omitted from the object file. */
0baf16f2
AM		 2066 exp_p->X_add_symbol = &abs_symbol;
2067 }
2068
15c1449b 2069 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2070 }
2071
62ebcb5c 2072 return BFD_RELOC_NONE;
252b5132
RH		 2073}
2074
62ebcb5c 2075/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2076
62ebcb5c
AM		 2077bfd_reloc_code_real_type
2078ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2079{
2080 expression (exp);
2081 if (nbytes >= 2 && *input_line_pointer == '@')
2082 return ppc_elf_suffix (&input_line_pointer, exp);
2083 return BFD_RELOC_NONE;
252b5132
RH		 2084}
2085
bf7279d5
AM		 2086/* Warn when emitting data to code sections, unless we are emitting
2087 a relocation that ld --ppc476-workaround uses to recognise data
2088 *and* there was an unconditional branch prior to the data. */
2089
2090void
2091ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2092 unsigned int nbytes, fixS *fix)
2093{
2094 if (warn_476
2095 && (now_seg->flags & SEC_CODE) != 0
2096 && (nbytes != 4
2097 || fix == NULL
2098 || !(fix->fx_r_type == BFD_RELOC_32
2099 || fix->fx_r_type == BFD_RELOC_CTOR
2100 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2101 || !(last_seg == now_seg && last_subseg == now_subseg)
2102 || !((last_insn & (0x3f << 26)) == (18u << 26)
2103 || ((last_insn & (0x3f << 26)) == (16u << 26)
2104 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2105 || ((last_insn & (0x3f << 26)) == (19u << 26)
2106 && (last_insn & (0x3ff << 1)) == (16u << 1)
2107 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2108 {
2109 /* Flag that we've warned. */
2110 if (fix != NULL)
2111 fix->fx_tcbit = 1;
2112
2113 as_warn (_("data in executable section"));
2114 }
2115}
2116
252b5132
RH		 2117/* Solaris pseduo op to change to the .rodata section. */
2118static void
98027b10 2119ppc_elf_rdata (int xxx)
252b5132
RH		 2120{
2121 char *save_line = input_line_pointer;
2122 static char section[] = ".rodata\n";
2123
99a814a1 2124 /* Just pretend this is .section .rodata */
252b5132
RH		 2125 input_line_pointer = section;
2126 obj_elf_section (xxx);
2127
2128 input_line_pointer = save_line;
2129}
2130
99a814a1 2131/* Pseudo op to make file scope bss items. */
252b5132 2132static void
98027b10 2133ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2134{
98027b10
AM		 2135 char *name;
2136 char c;
2137 char *p;
252b5132 2138 offsetT size;
98027b10 2139 symbolS *symbolP;
252b5132
RH		 2140 offsetT align;
2141 segT old_sec;
2142 int old_subsec;
2143 char *pfrag;
2144 int align2;
2145
d02603dc 2146 c = get_symbol_name (&name);
252b5132 2147
d02603dc 2148 /* Just after name is now '\0'. */
252b5132
RH		 2149 p = input_line_pointer;
2150 *p = c;
d02603dc 2151 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 2152 if (*input_line_pointer != ',')
2153 {
d6ed37ed 2154 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2155 ignore_rest_of_line ();
2156 return;
2157 }
2158
2159 input_line_pointer++; /* skip ',' */
2160 if ((size = get_absolute_expression ()) < 0)
2161 {
2162 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2163 ignore_rest_of_line ();
2164 return;
2165 }
2166
2167 /* The third argument to .lcomm is the alignment. */
2168 if (*input_line_pointer != ',')
2169 align = 8;
2170 else
2171 {
2172 ++input_line_pointer;
2173 align = get_absolute_expression ();
2174 if (align <= 0)
2175 {
2176 as_warn (_("ignoring bad alignment"));
2177 align = 8;
2178 }
2179 }
2180
2181 *p = 0;
2182 symbolP = symbol_find_or_make (name);
2183 *p = c;
2184
2185 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2186 {
d6ed37ed 2187 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2188 S_GET_NAME (symbolP));
2189 ignore_rest_of_line ();
2190 return;
2191 }
2192
2193 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2194 {
d6ed37ed 2195 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2196 S_GET_NAME (symbolP),
2197 (long) S_GET_VALUE (symbolP),
2198 (long) size);
2199
2200 ignore_rest_of_line ();
2201 return;
2202 }
2203
99a814a1 2204 /* Allocate_bss. */
252b5132
RH		 2205 old_sec = now_seg;
2206 old_subsec = now_subseg;
2207 if (align)
2208 {
99a814a1 2209 /* Convert to a power of 2 alignment. */
252b5132
RH		 2210 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2211 if (align != 1)
2212 {
d6ed37ed 2213 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2214 ignore_rest_of_line ();
2215 return;
2216 }
2217 }
2218 else
2219 align2 = 0;
2220
2221 record_alignment (bss_section, align2);
cbe02d4f 2222 subseg_set (bss_section, 1);
252b5132
RH		 2223 if (align2)
2224 frag_align (align2, 0, 0);
2225 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2226 symbol_get_frag (symbolP)->fr_symbol = 0;
2227 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2228 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2229 (char *) 0);
2230 *pfrag = 0;
2231 S_SET_SIZE (symbolP, size);
2232 S_SET_SEGMENT (symbolP, bss_section);
2233 subseg_set (old_sec, old_subsec);
2234 demand_empty_rest_of_line ();
2235}
2236
6911b7dc
AM		 2237/* Pseudo op to set symbol local entry point. */
2238static void
2239ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2240{
d02603dc
NC		 2241 char *name;
2242 char c = get_symbol_name (&name);
6911b7dc
AM		 2243 char *p;
2244 expressionS exp;
2245 symbolS *sym;
2246 asymbol *bfdsym;
2247 elf_symbol_type *elfsym;
2248
2249 p = input_line_pointer;
2250 *p = c;
d02603dc 2251 SKIP_WHITESPACE_AFTER_NAME ();
6911b7dc
AM		 2252 if (*input_line_pointer != ',')
2253 {
2254 *p = 0;
2255 as_bad (_("expected comma after name `%s' in .localentry directive"),
2256 name);
2257 *p = c;
2258 ignore_rest_of_line ();
2259 return;
2260 }
2261 input_line_pointer++;
2262 expression (&exp);
2263 if (exp.X_op == O_absent)
2264 {
2265 as_bad (_("missing expression in .localentry directive"));
2266 exp.X_op = O_constant;
2267 exp.X_add_number = 0;
2268 }
2269 *p = 0;
2270 sym = symbol_find_or_make (name);
2271 *p = c;
2272
2273 if (resolve_expression (&exp)
2274 && exp.X_op == O_constant)
2275 {
2276 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2277
e2b5892e 2278 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2279 as_bad (_(".localentry expression for `%s' "
2280 "is not a valid power of 2"), S_GET_NAME (sym));
2281 else
2282 {
2283 bfdsym = symbol_get_bfdsym (sym);
2284 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2285 gas_assert (elfsym);
2286 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2287 elfsym->internal_elf_sym.st_other |= encoded;
2288 if (ppc_abiversion == 0)
2289 ppc_abiversion = 2;
2290 }
2291 }
2292 else
2293 as_bad (_(".localentry expression for `%s' "
2294 "does not evaluate to a constant"), S_GET_NAME (sym));
2295
2296 demand_empty_rest_of_line ();
2297}
2298
ee67d69a
AM		 2299/* Pseudo op to set ABI version. */
2300static void
2301ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2302{
2303 expressionS exp;
2304
2305 expression (&exp);
2306 if (exp.X_op == O_absent)
2307 {
2308 as_bad (_("missing expression in .abiversion directive"));
2309 exp.X_op = O_constant;
2310 exp.X_add_number = 0;
2311 }
2312
2313 if (resolve_expression (&exp)
2314 && exp.X_op == O_constant)
2315 ppc_abiversion = exp.X_add_number;
2316 else
2317 as_bad (_(".abiversion expression does not evaluate to a constant"));
2318 demand_empty_rest_of_line ();
2319}
2320
2321/* Set ABI version in output file. */
2322void
2323ppc_elf_end (void)
2324{
2325 if (ppc_obj64 && ppc_abiversion != 0)
2326 {
2327 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2328 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2329 }
2330}
2331
252b5132
RH		 2332/* Validate any relocations emitted for -mrelocatable, possibly adding
2333 fixups for word relocations in writable segments, so we can adjust
2334 them at runtime. */
2335static void
98027b10 2336ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2337{
2338 if (fixp->fx_done || fixp->fx_pcrel)
2339 return;
2340
2341 switch (shlib)
2342 {
2343 case SHLIB_NONE:
2344 case SHLIB_PIC:
2345 return;
2346
5d6f4f16 2347 case SHLIB_MRELOCATABLE:
62ebcb5c 2348 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2349 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2351 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2352 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2353 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2355 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2356 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2357 && strcmp (segment_name (seg), ".got2") != 0
2358 && strcmp (segment_name (seg), ".dtors") != 0
2359 && strcmp (segment_name (seg), ".ctors") != 0
2360 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2361 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2362 && strcmp (segment_name (seg), ".eh_frame") != 0
2363 && strcmp (segment_name (seg), ".ex_shared") != 0)
2364 {
2365 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2366 || fixp->fx_r_type != BFD_RELOC_CTOR)
2367 {
2368 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2369 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2370 }
2371 }
2372 return;
2373 }
2374}
0baf16f2 2375
7e8d4ab4
AM		 2376/* Prevent elf_frob_file_before_adjust removing a weak undefined
2377 function descriptor sym if the corresponding code sym is used. */
2378
2379void
98027b10 2380ppc_frob_file_before_adjust (void)
0baf16f2 2381{
7e8d4ab4 2382 symbolS *symp;
9232bbb0 2383 asection *toc;
0baf16f2 2384
7e8d4ab4
AM		 2385 if (!ppc_obj64)
2386 return;
2387
2388 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2389 {
7e8d4ab4
AM		 2390 const char *name;
2391 char *dotname;
2392 symbolS *dotsym;
2393 size_t len;
2394
2395 name = S_GET_NAME (symp);
2396 if (name[0] == '.')
2397 continue;
2398
2399 if (! S_IS_WEAK (symp)
2400 || S_IS_DEFINED (symp))
2401 continue;
2402
2403 len = strlen (name) + 1;
2404 dotname = xmalloc (len + 1);
2405 dotname[0] = '.';
2406 memcpy (dotname + 1, name, len);
461b725f 2407 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2408 free (dotname);
2409 if (dotsym != NULL && (symbol_used_p (dotsym)
2410 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2411 symbol_mark_used (symp);
2412
0baf16f2
AM		 2413 }
2414
9232bbb0
AM		 2415 toc = bfd_get_section_by_name (stdoutput, ".toc");
2416 if (toc != NULL
01efc3af 2417 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2418 && bfd_section_size (stdoutput, toc) > 0x10000)
2419 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2420}
2421
2422/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2423 emitted. Other uses of .TOC. will cause the symbol to be marked
2424 with BSF_KEEP in md_apply_fix. */
9232bbb0 2425
a38a07e0
AM		 2426void
2427ppc_elf_adjust_symtab (void)
2428{
2429 if (ppc_obj64)
2430 {
2431 symbolS *symp;
2432 symp = symbol_find (".TOC.");
2433 if (symp != NULL)
2434 {
2435 asymbol *bsym = symbol_get_bfdsym (symp);
2436 if ((bsym->flags & BSF_KEEP) == 0)
2437 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2438 }
2439 }
0baf16f2 2440}
252b5132
RH		 2441#endif /* OBJ_ELF */
2442\f
2443#ifdef TE_PE
2444
2445/*
99a814a1 2446 * Summary of parse_toc_entry.
252b5132
RH		 2447 *
2448 * in: Input_line_pointer points to the '[' in one of:
2449 *
2450 * [toc] [tocv] [toc32] [toc64]
2451 *
2452 * Anything else is an error of one kind or another.
2453 *
81d4177b 2454 * out:
252b5132
RH		 2455 * return value: success or failure
2456 * toc_kind: kind of toc reference
2457 * input_line_pointer:
2458 * success: first char after the ']'
2459 * failure: unchanged
2460 *
2461 * settings:
2462 *
2463 * [toc] - rv == success, toc_kind = default_toc
2464 * [tocv] - rv == success, toc_kind = data_in_toc
2465 * [toc32] - rv == success, toc_kind = must_be_32
2466 * [toc64] - rv == success, toc_kind = must_be_64
2467 *
2468 */
2469
81d4177b
KH		 2470enum toc_size_qualifier
2471{
252b5132
RH		 2472 default_toc, /* The toc cell constructed should be the system default size */
2473 data_in_toc, /* This is a direct reference to a toc cell */
2474 must_be_32, /* The toc cell constructed must be 32 bits wide */
2475 must_be_64 /* The toc cell constructed must be 64 bits wide */
2476};
2477
2478static int
98027b10 2479parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2480{
2481 char *start;
2482 char *toc_spec;
2483 char c;
2484 enum toc_size_qualifier t;
2485
99a814a1 2486 /* Save the input_line_pointer. */
252b5132
RH		 2487 start = input_line_pointer;
2488
99a814a1 2489 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2490 ++input_line_pointer;
2491 SKIP_WHITESPACE ();
81d4177b 2492
99a814a1 2493 /* Find the spelling of the operand. */
d02603dc 2494 c = get_symbol_name (&toc_spec);
252b5132 2495
99a814a1 2496 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2497 {
2498 t = default_toc;
2499 }
99a814a1 2500 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2501 {
2502 t = data_in_toc;
2503 }
99a814a1 2504 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2505 {
2506 t = must_be_32;
2507 }
99a814a1 2508 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2509 {
2510 t = must_be_64;
2511 }
2512 else
2513 {
2514 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2515 *input_line_pointer = c;
2516 input_line_pointer = start;
252b5132
RH		 2517 return 0;
2518 }
2519
99a814a1
AM		 2520 /* Now find the ']'. */
2521 *input_line_pointer = c;
252b5132 2522
d02603dc 2523 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
81d4177b 2524 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2525
2526 if (c != ']')
2527 {
2528 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2529 input_line_pointer = start;
252b5132
RH		 2530 return 0;
2531 }
2532
99a814a1 2533 *toc_kind = t;
252b5132
RH		 2534 return 1;
2535}
2536#endif
3b8b57a9 2537
3e60bf4d 2538#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2539/* See whether a symbol is in the TOC section. */
2540
2541static int
2542ppc_is_toc_sym (symbolS *sym)
2543{
3e60bf4d 2544#ifdef OBJ_XCOFF
9f6e76f4
TG		 2545 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2546 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2547#endif
3e60bf4d
AM		 2548#ifdef OBJ_ELF
2549 const char *sname = segment_name (S_GET_SEGMENT (sym));
2550 if (ppc_obj64)
2551 return strcmp (sname, ".toc") == 0;
2552 else
2553 return strcmp (sname, ".got") == 0;
2554#endif
2555}
2556#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2557\f
2558
dc1d03fc 2559#ifdef OBJ_ELF
6a0c61b7
EZ		 2560#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2561static void
98027b10 2562ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2563{
2564 unsigned int i;
2565
2566 /* Check we don't already exist. */
2567 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2568 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2569 return;
b34976b6 2570
6a0c61b7
EZ		 2571 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2572 {
2573 if (ppc_apuinfo_num_alloc == 0)
2574 {
2575 ppc_apuinfo_num_alloc = 4;
2576 ppc_apuinfo_list = (unsigned long *)
2577 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2578 }
2579 else
2580 {
2581 ppc_apuinfo_num_alloc += 4;
2582 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2583 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2584 }
2585 }
dc1d03fc 2586 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2587}
2588#undef APUID
dc1d03fc 2589#endif
6a0c61b7
EZ		 2590\f
2591
252b5132
RH		 2592/* We need to keep a list of fixups. We can't simply generate them as
2593 we go, because that would require us to first create the frag, and
2594 that would screw up references to ``.''. */
2595
2596struct ppc_fixup
2597{
2598 expressionS exp;
2599 int opindex;
2600 bfd_reloc_code_real_type reloc;
2601};
2602
2603#define MAX_INSN_FIXUPS (5)
2604
b9c361e0
JL		 2605/* Form I16L. */
2606#define E_OR2I_INSN 0x7000C000
2607#define E_AND2I_DOT_INSN 0x7000C800
2608#define E_OR2IS_INSN 0x7000D000
2609#define E_LIS_INSN 0x7000E000
2610#define E_AND2IS_DOT_INSN 0x7000E800
2611
2612/* Form I16A. */
2613#define E_ADD2I_DOT_INSN 0x70008800
2614#define E_ADD2IS_INSN 0x70009000
2615#define E_CMP16I_INSN 0x70009800
2616#define E_MULL2I_INSN 0x7000A000
2617#define E_CMPL16I_INSN 0x7000A800
2618#define E_CMPH16I_INSN 0x7000B000
2619#define E_CMPHL16I_INSN 0x7000B800
2620
252b5132
RH		 2621/* This routine is called for each instruction to be assembled. */
2622
2623void
98027b10 2624md_assemble (char *str)
252b5132
RH		 2625{
2626 char *s;
2627 const struct powerpc_opcode *opcode;
2628 unsigned long insn;
2629 const unsigned char *opindex_ptr;
2630 int skip_optional;
2631 int need_paren;
2632 int next_opindex;
2633 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2634 int fc;
2635 char *f;
09b935ac 2636 int addr_mod;
252b5132 2637 int i;
b9c361e0 2638 unsigned int insn_length;
252b5132
RH		 2639
2640 /* Get the opcode. */
3882b010 2641 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2642 ;
2643 if (*s != '\0')
2644 *s++ = '\0';
2645
2646 /* Look up the opcode in the hash table. */
2647 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2648 if (opcode == (const struct powerpc_opcode *) NULL)
2649 {
2650 const struct powerpc_macro *macro;
2651
2652 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2653 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2654 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2655 else
2656 ppc_macro (s, macro);
2657
2658 return;
2659 }
2660
2661 insn = opcode->opcode;
2662
2663 str = s;
3882b010 2664 while (ISSPACE (*str))
252b5132
RH		 2665 ++str;
2666
2667 /* PowerPC operands are just expressions. The only real issue is
2668 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2669 an optional operand separate the operands only with commas (in some
2670 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2671 have optional operands). Most instructions with optional operands
2672 have only one. Those that have more than one optional operand can
2673 take either all their operands or none. So, before we start seriously
2674 parsing the operands, we check to see if we have optional operands,
2675 and if we do, we count the number of commas to see which operands
2676 have been omitted. */
252b5132
RH		 2677 skip_optional = 0;
2678 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2679 {
2680 const struct powerpc_operand *operand;
2681
2682 operand = &powerpc_operands[*opindex_ptr];
2683 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2684 {
2685 unsigned int opcount;
7fe9cf6b 2686 unsigned int num_operands_expected;
252b5132
RH		 2687
2688 /* There is an optional operand. Count the number of
2689 commas in the input line. */
2690 if (*str == '\0')
2691 opcount = 0;
2692 else
2693 {
2694 opcount = 1;
2695 s = str;
2696 while ((s = strchr (s, ',')) != (char *) NULL)
2697 {
2698 ++opcount;
2699 ++s;
2700 }
2701 }
2702
7fe9cf6b
NC		 2703 /* Compute the number of expected operands.
2704 Do not count fake operands. */
2705 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2706 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2707 ++ num_operands_expected;
2708
252b5132
RH		 2709 /* If there are fewer operands in the line then are called
2710 for by the instruction, we want to skip the optional
1f6c9eb0 2711 operands. */
7fe9cf6b 2712 if (opcount < num_operands_expected)
252b5132
RH		 2713 skip_optional = 1;
2714
2715 break;
2716 }
2717 }
2718
2719 /* Gather the operands. */
2720 need_paren = 0;
2721 next_opindex = 0;
2722 fc = 0;
2723 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2724 {
2725 const struct powerpc_operand *operand;
2726 const char *errmsg;
2727 char *hold;
2728 expressionS ex;
2729 char endc;
2730
2731 if (next_opindex == 0)
2732 operand = &powerpc_operands[*opindex_ptr];
2733 else
2734 {
2735 operand = &powerpc_operands[next_opindex];
2736 next_opindex = 0;
2737 }
252b5132
RH		 2738 errmsg = NULL;
2739
2740 /* If this is a fake operand, then we do not expect anything
2741 from the input. */
2742 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2743 {
2b3c4602 2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2745 if (errmsg != (const char *) NULL)
ee2c9aa9 2746 as_bad ("%s", errmsg);
252b5132
RH		 2747 continue;
2748 }
2749
2750 /* If this is an optional operand, and we are skipping it, just
2751 insert a zero. */
2752 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2753 && skip_optional)
2754 {
11a0cf2e 2755 long val = ppc_optional_operand_value (operand);
252b5132
RH		 2756 if (operand->insert)
2757 {
11a0cf2e 2758 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
252b5132 2759 if (errmsg != (const char *) NULL)
ee2c9aa9 2760 as_bad ("%s", errmsg);
252b5132 2761 }
11a0cf2e
PB		 2762 else if (operand->shift >= 0)
2763 insn |= ((long) val & operand->bitm) << operand->shift;
2764 else
2765 insn |= ((long) val & operand->bitm) >> -operand->shift;
2766
252b5132
RH		 2767 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2768 next_opindex = *opindex_ptr + 1;
2769 continue;
2770 }
2771
2772 /* Gather the operand. */
2773 hold = input_line_pointer;
2774 input_line_pointer = str;
2775
2776#ifdef TE_PE
81d4177b 2777 if (*input_line_pointer == '[')
252b5132
RH		 2778 {
2779 /* We are expecting something like the second argument here:
99a814a1
AM		 2780 *
2781 * lwz r4,[toc].GS.0.static_int(rtoc)
2782 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2783 * The argument following the `]' must be a symbol name, and the
2784 * register must be the toc register: 'rtoc' or '2'
2785 *
2786 * The effect is to 0 as the displacement field
2787 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2788 * the appropriate variation) reloc against it based on the symbol.
2789 * The linker will build the toc, and insert the resolved toc offset.
2790 *
2791 * Note:
2792 * o The size of the toc entry is currently assumed to be
2793 * 32 bits. This should not be assumed to be a hard coded
2794 * number.
2795 * o In an effort to cope with a change from 32 to 64 bits,
2796 * there are also toc entries that are specified to be
2797 * either 32 or 64 bits:
2798 * lwz r4,[toc32].GS.0.static_int(rtoc)
2799 * lwz r4,[toc64].GS.0.static_int(rtoc)
2800 * These demand toc entries of the specified size, and the
2801 * instruction probably requires it.
2802 */
252b5132
RH		 2803
2804 int valid_toc;
2805 enum toc_size_qualifier toc_kind;
2806 bfd_reloc_code_real_type toc_reloc;
2807
99a814a1
AM		 2808 /* Go parse off the [tocXX] part. */
2809 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2810
81d4177b 2811 if (!valid_toc)
252b5132 2812 {
a5840dce
AM		 2813 ignore_rest_of_line ();
2814 break;
252b5132
RH		 2815 }
2816
99a814a1
AM		 2817 /* Now get the symbol following the ']'. */
2818 expression (&ex);
252b5132
RH		 2819
2820 switch (toc_kind)
2821 {
2822 case default_toc:
99a814a1
AM		 2823 /* In this case, we may not have seen the symbol yet,
2824 since it is allowed to appear on a .extern or .globl
2825 or just be a label in the .data section. */
252b5132
RH		 2826 toc_reloc = BFD_RELOC_PPC_TOC16;
2827 break;
2828 case data_in_toc:
99a814a1
AM		 2829 /* 1. The symbol must be defined and either in the toc
2830 section, or a global.
2831 2. The reloc generated must have the TOCDEFN flag set
2832 in upper bit mess of the reloc type.
2833 FIXME: It's a little confusing what the tocv
2834 qualifier can be used for. At the very least, I've
2835 seen three uses, only one of which I'm sure I can
2836 explain. */
81d4177b
KH		 2837 if (ex.X_op == O_symbol)
2838 {
9c2799c2 2839 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2840 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2841 != tocdata_section)
252b5132 2842 {
99a814a1 2843 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2844 }
2845 }
2846
2847 toc_reloc = BFD_RELOC_PPC_TOC16;
2848 break;
2849 case must_be_32:
99a814a1
AM		 2850 /* FIXME: these next two specifically specify 32/64 bit
2851 toc entries. We don't support them today. Is this
2852 the right way to say that? */
62ebcb5c 2853 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2854 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2855 break;
2856 case must_be_64:
99a814a1 2857 /* FIXME: see above. */
62ebcb5c 2858 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2859 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2860 break;
2861 default:
bc805888 2862 fprintf (stderr,
99a814a1
AM		 2863 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2864 toc_kind);
bc805888 2865 abort ();
252b5132
RH		 2866 break;
2867 }
2868
2869 /* We need to generate a fixup for this expression. */
2870 if (fc >= MAX_INSN_FIXUPS)
2871 as_fatal (_("too many fixups"));
2872
2873 fixups[fc].reloc = toc_reloc;
2874 fixups[fc].exp = ex;
2875 fixups[fc].opindex = *opindex_ptr;
2876 ++fc;
2877
99a814a1
AM		 2878 /* Ok. We've set up the fixup for the instruction. Now make it
2879 look like the constant 0 was found here. */
252b5132
RH		 2880 ex.X_unsigned = 1;
2881 ex.X_op = O_constant;
2882 ex.X_add_number = 0;
2883 ex.X_add_symbol = NULL;
2884 ex.X_op_symbol = NULL;
2885 }
2886
2887 else
2888#endif /* TE_PE */
2889 {
b9c361e0
JL		 2890 if ((reg_names_p
2891 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2892 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2893 || !register_name (&ex))
252b5132 2894 {
13abbae3
AM		 2895 char save_lex = lex_type['%'];
2896
b9c361e0
JL		 2897 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2898 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2899 {
2900 cr_operand = TRUE;
2901 lex_type['%'] |= LEX_BEGIN_NAME;
2902 }
252b5132 2903 expression (&ex);
b34976b6 2904 cr_operand = FALSE;
13abbae3 2905 lex_type['%'] = save_lex;
252b5132
RH		 2906 }
2907 }
2908
2909 str = input_line_pointer;
2910 input_line_pointer = hold;
2911
2912 if (ex.X_op == O_illegal)
2913 as_bad (_("illegal operand"));
2914 else if (ex.X_op == O_absent)
2915 as_bad (_("missing operand"));
2916 else if (ex.X_op == O_register)
2917 {
2918 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2919 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2920 }
2921 else if (ex.X_op == O_constant)
2922 {
2923#ifdef OBJ_ELF
81d4177b 2924 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2925 bfd_reloc_code_real_type reloc;
252b5132
RH		 2926 char *orig_str = str;
2927
62ebcb5c 2928 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2929 switch (reloc)
2930 {
2931 default:
2932 str = orig_str;
2933 break;
2934
2935 case BFD_RELOC_LO16:
f9c6b907
AM		 2936 ex.X_add_number &= 0xffff;
2937 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2938 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2939 break;
2940
2941 case BFD_RELOC_HI16:
f9c6b907
AM		 2942 if (REPORT_OVERFLOW_HI && ppc_obj64)
2943 {
2944 /* PowerPC64 @h is tested for overflow. */
2945 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2946 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2947 {
2948 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2949 ex.X_add_number
2950 = ((addressT) ex.X_add_number ^ sign) - sign;
2951 }
2952 break;
2953 }
2954 /* Fall thru */
2955
2956 case BFD_RELOC_PPC64_ADDR16_HIGH:
2957 ex.X_add_number = PPC_HI (ex.X_add_number);
2958 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2959 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2960 break;
2961
2962 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2963 if (REPORT_OVERFLOW_HI && ppc_obj64)
2964 {
2965 /* PowerPC64 @ha is tested for overflow. */
2966 ex.X_add_number
2967 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2968 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2969 {
2970 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2971 ex.X_add_number
2972 = ((addressT) ex.X_add_number ^ sign) - sign;
2973 }
2974 break;
2975 }
2976 /* Fall thru */
2977
2978 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2979 ex.X_add_number = PPC_HA (ex.X_add_number);
2980 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2981 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2982 break;
2983
0baf16f2 2984 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2985 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2986 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2987 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2988 break;
2989
2990 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2991 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2992 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2993 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2994 break;
0baf16f2
AM		 2995
2996 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2997 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2998 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2999 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 3000 break;
3001
3002 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 3003 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3004 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3005 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3006 break;
252b5132 3007 }
0baf16f2 3008#endif /* OBJ_ELF */
252b5132 3009 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3010 ppc_cpu, (char *) NULL, 0);
252b5132 3011 }
727fc41e 3012 else
252b5132 3013 {
62ebcb5c 3014 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3015#ifdef OBJ_ELF
727fc41e 3016 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3017 {
727fc41e
AM		 3018 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3019 if (sym_name[0] == '.')
3020 ++sym_name;
cdba85ec 3021
727fc41e 3022 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3023 {
727fc41e
AM		 3024 expressionS tls_exp;
3025
3026 hold = input_line_pointer;
3027 input_line_pointer = str + 1;
3028 expression (&tls_exp);
3029 if (tls_exp.X_op == O_symbol)
3030 {
62ebcb5c 3031 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3032 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3033 {
3034 reloc = BFD_RELOC_PPC_TLSGD;
3035 input_line_pointer += 7;
3036 }
3037 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3038 {
3039 reloc = BFD_RELOC_PPC_TLSLD;
3040 input_line_pointer += 7;
3041 }
62ebcb5c 3042 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3043 {
3044 SKIP_WHITESPACE ();
3045 str = input_line_pointer;
3046
3047 if (fc >= MAX_INSN_FIXUPS)
3048 as_fatal (_("too many fixups"));
3049 fixups[fc].exp = tls_exp;
3050 fixups[fc].opindex = *opindex_ptr;
3051 fixups[fc].reloc = reloc;
3052 ++fc;
3053 }
3054 }
3055 input_line_pointer = hold;
252b5132
RH		 3056 }
3057 }
3058
62ebcb5c 3059 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3060 {
727fc41e 3061 /* Some TLS tweaks. */
0baf16f2
AM		 3062 switch (reloc)
3063 {
727fc41e 3064 default:
cdba85ec 3065 break;
727fc41e
AM		 3066
3067 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3068 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3069 as_bad (_("@tls may not be used with \"%s\" operands"),
3070 opcode->name);
3071 else if (operand->shift != 11)
3072 as_bad (_("@tls may only be used in last operand"));
3073 else
3074 insn = ppc_insert_operand (insn, operand,
3075 ppc_obj64 ? 13 : 2,
3076 ppc_cpu, (char *) NULL, 0);
cdba85ec 3077 break;
727fc41e
AM		 3078
3079 /* We'll only use the 32 (or 64) bit form of these relocations
3080 in constants. Instructions get the 16 bit form. */
3081 case BFD_RELOC_PPC_DTPREL:
3082 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3083 break;
727fc41e
AM		 3084 case BFD_RELOC_PPC_TPREL:
3085 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3086 break;
3087 }
727fc41e 3088
a680de9a
PB		 3089 /* addpcis. */
3090 if (opcode->opcode == (19 << 26) + (2 << 1)
3091 && reloc == BFD_RELOC_HI16_S)
3092 reloc = BFD_RELOC_PPC_REL16DX_HA;
3093
b9c361e0
JL		 3094 /* If VLE-mode convert LO/HI/HA relocations. */
3095 if (opcode->flags & PPC_OPCODE_VLE)
3096 {
3097 int tmp_insn = insn & opcode->mask;
3739860c 3098
b9c361e0
JL		 3099 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3100 || tmp_insn == E_AND2I_DOT_INSN
3101 || tmp_insn == E_OR2IS_INSN
3102 || tmp_insn == E_LIS_INSN
3103 || tmp_insn == E_AND2IS_DOT_INSN);
3104
3105
3106 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3107 || tmp_insn == E_ADD2IS_INSN
3108 || tmp_insn == E_CMP16I_INSN
3109 || tmp_insn == E_MULL2I_INSN
3110 || tmp_insn == E_CMPL16I_INSN
3111 || tmp_insn == E_CMPH16I_INSN
3112 || tmp_insn == E_CMPHL16I_INSN);
3113
3114 switch (reloc)
3115 {
3116 default:
3117 break;
3118
3119 case BFD_RELOC_PPC_EMB_SDA21:
3120 reloc = BFD_RELOC_PPC_VLE_SDA21;
3121 break;
3122
3123 case BFD_RELOC_LO16:
3124 if (use_d_reloc)
3125 reloc = BFD_RELOC_PPC_VLE_LO16D;
3126 else if (use_a_reloc)
3127 reloc = BFD_RELOC_PPC_VLE_LO16A;
3128 break;
3129
3130 case BFD_RELOC_HI16:
3131 if (use_d_reloc)
3132 reloc = BFD_RELOC_PPC_VLE_HI16D;
3133 else if (use_a_reloc)
3134 reloc = BFD_RELOC_PPC_VLE_HI16A;
3135 break;
3739860c 3136
b9c361e0
JL		 3137 case BFD_RELOC_HI16_S:
3138 if (use_d_reloc)
3139 reloc = BFD_RELOC_PPC_VLE_HA16D;
3140 else if (use_a_reloc)
3141 reloc = BFD_RELOC_PPC_VLE_HA16A;
3142 break;
3143
3144 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3145 if (use_d_reloc)
3146 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3147 break;
3148
3149 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3150 if (use_d_reloc)
3151 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3152 break;
3153
3154 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3155 if (use_d_reloc)
3156 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3157 break;
3158 }
3159 }
0baf16f2 3160 }
3b8b57a9
AM		 3161#endif /* OBJ_ELF */
3162
62ebcb5c 3163 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3164 ;
3165 /* Determine a BFD reloc value based on the operand information.
3166 We are only prepared to turn a few of the operands into
3167 relocs. */
a0593ad9
AM		 3168 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3169 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3170 && operand->bitm == 0x3fffffc
3171 && operand->shift == 0)
3172 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3173 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3174 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3175 && operand->bitm == 0xfffc
3176 && operand->shift == 0)
3177 reloc = BFD_RELOC_PPC_B16;
3178 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3179 && operand->bitm == 0x1fe
3180 && operand->shift == -1)
3181 reloc = BFD_RELOC_PPC_VLE_REL8;
3182 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3183 && operand->bitm == 0xfffe
3184 && operand->shift == 0)
3185 reloc = BFD_RELOC_PPC_VLE_REL15;
3186 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3187 && operand->bitm == 0x1fffffe
3188 && operand->shift == 0)
3189 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3190 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3191 && (operand->bitm & 0xfff0) == 0xfff0
3192 && operand->shift == 0)
3193 {
f50c47f1 3194 reloc = BFD_RELOC_16;
3e60bf4d 3195#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3196 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3197 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3198 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3199 {
3200 reloc = BFD_RELOC_PPC_TOC16;
3201#ifdef OBJ_ELF
3202 as_warn (_("assuming %s on symbol"),
3203 ppc_obj64 ? "@toc" : "@xgot");
3204#endif
3205 }
3b8b57a9 3206#endif
3b8b57a9 3207 }
a0593ad9
AM		 3208
3209 /* For the absolute forms of branches, convert the PC
3210 relative form back into the absolute. */
3211 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3212 {
3213 switch (reloc)
3214 {
3215 case BFD_RELOC_PPC_B26:
3216 reloc = BFD_RELOC_PPC_BA26;
3217 break;
3218 case BFD_RELOC_PPC_B16:
3219 reloc = BFD_RELOC_PPC_BA16;
3220 break;
3221#ifdef OBJ_ELF
3222 case BFD_RELOC_PPC_B16_BRTAKEN:
3223 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3224 break;
3225 case BFD_RELOC_PPC_B16_BRNTAKEN:
3226 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3227 break;
3228#endif
3229 default:
3230 break;
3231 }
3232 }
3233
3234#ifdef OBJ_ELF
3235 switch (reloc)
3236 {
3237 case BFD_RELOC_PPC_TOC16:
3238 toc_reloc_types |= has_small_toc_reloc;
3239 break;
3240 case BFD_RELOC_PPC64_TOC16_LO:
3241 case BFD_RELOC_PPC64_TOC16_HI:
3242 case BFD_RELOC_PPC64_TOC16_HA:
3243 toc_reloc_types |= has_large_toc_reloc;
3244 break;
3245 default:
3246 break;
3247 }
3248
3249 if (ppc_obj64
3250 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3251 {
3252 switch (reloc)
3253 {
3254 case BFD_RELOC_16:
3255 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3256 break;
3257 case BFD_RELOC_LO16:
3258 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3259 break;
3260 case BFD_RELOC_16_GOTOFF:
3261 reloc = BFD_RELOC_PPC64_GOT16_DS;
3262 break;
3263 case BFD_RELOC_LO16_GOTOFF:
3264 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3265 break;
3266 case BFD_RELOC_LO16_PLTOFF:
3267 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3268 break;
3269 case BFD_RELOC_16_BASEREL:
3270 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3271 break;
3272 case BFD_RELOC_LO16_BASEREL:
3273 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3274 break;
3275 case BFD_RELOC_PPC_TOC16:
3276 reloc = BFD_RELOC_PPC64_TOC16_DS;
3277 break;
3278 case BFD_RELOC_PPC64_TOC16_LO:
3279 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3280 break;
3281 case BFD_RELOC_PPC64_PLTGOT16:
3282 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3283 break;
3284 case BFD_RELOC_PPC64_PLTGOT16_LO:
3285 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3286 break;
3287 case BFD_RELOC_PPC_DTPREL16:
3288 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3289 break;
3290 case BFD_RELOC_PPC_DTPREL16_LO:
3291 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3292 break;
3293 case BFD_RELOC_PPC_TPREL16:
3294 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3295 break;
3296 case BFD_RELOC_PPC_TPREL16_LO:
3297 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3298 break;
3299 case BFD_RELOC_PPC_GOT_DTPREL16:
3300 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3301 case BFD_RELOC_PPC_GOT_TPREL16:
3302 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3303 break;
3304 default:
3305 as_bad (_("unsupported relocation for DS offset field"));
3306 break;
3307 }
3308 }
3309#endif
0baf16f2 3310
252b5132
RH		 3311 /* We need to generate a fixup for this expression. */
3312 if (fc >= MAX_INSN_FIXUPS)
3313 as_fatal (_("too many fixups"));
3314 fixups[fc].exp = ex;
727fc41e 3315 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3316 fixups[fc].reloc = reloc;
3317 ++fc;
3318 }
252b5132
RH		 3319
3320 if (need_paren)
3321 {
3322 endc = ')';
3323 need_paren = 0;
c3d65c1c
BE		 3324 /* If expecting more operands, then we want to see "),". */
3325 if (*str == endc && opindex_ptr[1] != 0)
3326 {
3327 do
3328 ++str;
3329 while (ISSPACE (*str));
3330 endc = ',';
3331 }
252b5132
RH		 3332 }
3333 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3334 {
3335 endc = '(';
3336 need_paren = 1;
3337 }
3338 else
3339 endc = ',';
3340
3341 /* The call to expression should have advanced str past any
3342 whitespace. */
3343 if (*str != endc
3344 && (endc != ',' || *str != '\0'))
3345 {
5a938047
AM		 3346 if (*str == '\0')
3347 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3348 else
3349 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3350 break;
3351 }
3352
3353 if (*str != '\0')
3354 ++str;
3355 }
3356
3882b010 3357 while (ISSPACE (*str))
252b5132
RH		 3358 ++str;
3359
3360 if (*str != '\0')
3361 as_bad (_("junk at end of line: `%s'"), str);
3362
dc1d03fc 3363#ifdef OBJ_ELF
b9c361e0 3364 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3365 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3366 && !ppc_obj64)
6a0c61b7
EZ		 3367 {
3368 /* These are all version "1". */
3369 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3370 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3371 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3372 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3373 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3374 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3375 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3376 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3377 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3378 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3379 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3380 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3381 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3382 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
fbd94057
MR		 3383 /* Only set the VLE flag if the instruction has been pulled via
3384 the VLE instruction set. This way the flag is guaranteed to
3385 be set for VLE-only instructions or for VLE-only processors,
3386 however it'll remain clear for dual-mode instructions on
3387 dual-mode and, more importantly, standard-mode processors. */
3388 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
b9c361e0 3389 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3390 }
dc1d03fc 3391#endif
6a0c61b7 3392
252b5132 3393 /* Write out the instruction. */
b9c361e0
JL		 3394 /* Differentiate between two and four byte insns. */
3395 if (ppc_mach () == bfd_mach_ppc_vle)
3396 {
3397 if (PPC_OP_SE_VLE (insn))
3398 insn_length = 2;
3399 else
3400 insn_length = 4;
3401 addr_mod = frag_now_fix () & 1;
3402 }
3403 else
3404 {
3405 insn_length = 4;
3406 addr_mod = frag_now_fix () & 3;
3407 }
3408 /* All instructions can start on a 2 byte boundary for VLE. */
3409 f = frag_more (insn_length);
09b935ac 3410 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3411 {
3412 if (ppc_mach() == bfd_mach_ppc_vle)
3413 as_bad (_("instruction address is not a multiple of 2"));
3414 else
3415 as_bad (_("instruction address is not a multiple of 4"));
3416 }
09b935ac
AM		 3417 frag_now->insn_addr = addr_mod;
3418 frag_now->has_code = 1;
b9c361e0 3419 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3420 last_insn = insn;
3421 last_seg = now_seg;
3422 last_subseg = now_subseg;
252b5132 3423
5d6f4f16 3424#ifdef OBJ_ELF
b9c361e0 3425 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3426#endif
3427
3b8b57a9 3428 /* Create any fixups. */
252b5132
RH		 3429 for (i = 0; i < fc; i++)
3430 {
3b8b57a9 3431 fixS *fixP;
62ebcb5c 3432 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3433 {
99a814a1 3434 reloc_howto_type *reloc_howto;
252b5132
RH		 3435 int size;
3436 int offset;
252b5132 3437
99a814a1 3438 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3439 if (!reloc_howto)
3440 abort ();
3441
3442 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3443 offset = target_big_endian ? (insn_length - size) : 0;
252b5132 3444
99a814a1
AM		 3445 fixP = fix_new_exp (frag_now,
3446 f - frag_now->fr_literal + offset,
3447 size,
3448 &fixups[i].exp,
3449 reloc_howto->pc_relative,
252b5132 3450 fixups[i].reloc);
252b5132
RH		 3451 }
3452 else
727fc41e
AM		 3453 {
3454 const struct powerpc_operand *operand;
3455
3456 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3457 fixP = fix_new_exp (frag_now,
3458 f - frag_now->fr_literal,
3459 insn_length,
3460 &fixups[i].exp,
3461 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3462 BFD_RELOC_NONE);
727fc41e 3463 }
3b8b57a9 3464 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3465 }
3466}
3467
3468/* Handle a macro. Gather all the operands, transform them as
3469 described by the macro, and call md_assemble recursively. All the
3470 operands are separated by commas; we don't accept parentheses
3471 around operands here. */
3472
3473static void
98027b10 3474ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3475{
3476 char *operands[10];
3477 unsigned int count;
3478 char *s;
3479 unsigned int len;
3480 const char *format;
db557034 3481 unsigned int arg;
252b5132
RH		 3482 char *send;
3483 char *complete;
3484
3485 /* Gather the users operands into the operands array. */
3486 count = 0;
3487 s = str;
3488 while (1)
3489 {
3490 if (count >= sizeof operands / sizeof operands[0])
3491 break;
3492 operands[count++] = s;
3493 s = strchr (s, ',');
3494 if (s == (char *) NULL)
3495 break;
3496 *s++ = '\0';
81d4177b 3497 }
252b5132
RH		 3498
3499 if (count != macro->operands)
3500 {
3501 as_bad (_("wrong number of operands"));
3502 return;
3503 }
3504
3505 /* Work out how large the string must be (the size is unbounded
3506 because it includes user input). */
3507 len = 0;
3508 format = macro->format;
3509 while (*format != '\0')
3510 {
3511 if (*format != '%')
3512 {
3513 ++len;
3514 ++format;
3515 }
3516 else
3517 {
3518 arg = strtol (format + 1, &send, 10);
db557034 3519 know (send != format && arg < count);
252b5132
RH		 3520 len += strlen (operands[arg]);
3521 format = send;
3522 }
3523 }
3524
3525 /* Put the string together. */
3526 complete = s = (char *) alloca (len + 1);
3527 format = macro->format;
3528 while (*format != '\0')
3529 {
3530 if (*format != '%')
3531 *s++ = *format++;
3532 else
3533 {
3534 arg = strtol (format + 1, &send, 10);
3535 strcpy (s, operands[arg]);
3536 s += strlen (s);
3537 format = send;
3538 }
3539 }
3540 *s = '\0';
3541
3542 /* Assemble the constructed instruction. */
3543 md_assemble (complete);
81d4177b 3544}
252b5132
RH		 3545\f
3546#ifdef OBJ_ELF
18ae9cc1 3547/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3548
3549int
98027b10 3550ppc_section_type (char *str, size_t len)
252b5132 3551{
9de8d8f1
RH		 3552 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3553 return SHT_ORDERED;
252b5132 3554
9de8d8f1 3555 return -1;
252b5132
RH		 3556}
3557
3558int
1239de13 3559ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3560{
3561 if (type == SHT_ORDERED)
3562 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3563
252b5132
RH		 3564 return flags;
3565}
3566#endif /* OBJ_ELF */
3567
3568\f
3569/* Pseudo-op handling. */
3570
3571/* The .byte pseudo-op. This is similar to the normal .byte
3572 pseudo-op, but it can also take a single ASCII string. */
3573
3574static void
98027b10 3575ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3576{
bf7279d5
AM		 3577 int count = 0;
3578
252b5132
RH		 3579 if (*input_line_pointer != '\"')
3580 {
3581 cons (1);
3582 return;
3583 }
3584
3585 /* Gather characters. A real double quote is doubled. Unusual
3586 characters are not permitted. */
3587 ++input_line_pointer;
3588 while (1)
3589 {
3590 char c;
3591
3592 c = *input_line_pointer++;
3593
3594 if (c == '\"')
3595 {
3596 if (*input_line_pointer != '\"')
3597 break;
3598 ++input_line_pointer;
3599 }
3600
3601 FRAG_APPEND_1_CHAR (c);
bf7279d5 3602 ++count;
252b5132
RH		 3603 }
3604
bf7279d5
AM		 3605 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3606 as_warn (_("data in executable section"));
252b5132
RH		 3607 demand_empty_rest_of_line ();
3608}
3609\f
3610#ifdef OBJ_XCOFF
3611
3612/* XCOFF specific pseudo-op handling. */
3613
3614/* This is set if we are creating a .stabx symbol, since we don't want
3615 to handle symbol suffixes for such symbols. */
b34976b6 3616static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3617
3618/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3619 symbols in the .bss segment as though they were local common
67c1ffbe 3620 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3621 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3622
3623static void
98027b10 3624ppc_comm (int lcomm)
252b5132
RH		 3625{
3626 asection *current_seg = now_seg;
3627 subsegT current_subseg = now_subseg;
3628 char *name;
3629 char endc;
3630 char *end_name;
3631 offsetT size;
3632 offsetT align;
3633 symbolS *lcomm_sym = NULL;
3634 symbolS *sym;
3635 char *pfrag;
3636
d02603dc 3637 endc = get_symbol_name (&name);
252b5132 3638 end_name = input_line_pointer;
d02603dc 3639 (void) restore_line_pointer (endc);
252b5132
RH		 3640
3641 if (*input_line_pointer != ',')
3642 {
3643 as_bad (_("missing size"));
3644 ignore_rest_of_line ();
3645 return;
3646 }
3647 ++input_line_pointer;
3648
3649 size = get_absolute_expression ();
3650 if (size < 0)
3651 {
3652 as_bad (_("negative size"));
3653 ignore_rest_of_line ();
3654 return;
3655 }
3656
3657 if (! lcomm)
3658 {
3659 /* The third argument to .comm is the alignment. */
3660 if (*input_line_pointer != ',')
1ad63b2f 3661 align = 2;
252b5132
RH		 3662 else
3663 {
3664 ++input_line_pointer;
3665 align = get_absolute_expression ();
3666 if (align <= 0)
3667 {
3668 as_warn (_("ignoring bad alignment"));
1ad63b2f 3669 align = 2;
252b5132
RH		 3670 }
3671 }
3672 }
3673 else
3674 {
3675 char *lcomm_name;
3676 char lcomm_endc;
3677
252b5132
RH		 3678 /* The third argument to .lcomm appears to be the real local
3679 common symbol to create. References to the symbol named in
3680 the first argument are turned into references to the third
3681 argument. */
3682 if (*input_line_pointer != ',')
3683 {
3684 as_bad (_("missing real symbol name"));
3685 ignore_rest_of_line ();
3686 return;
3687 }
3688 ++input_line_pointer;
3689
d02603dc 3690 lcomm_endc = get_symbol_name (&lcomm_name);
81d4177b 3691
252b5132
RH		 3692 lcomm_sym = symbol_find_or_make (lcomm_name);
3693
d02603dc 3694 (void) restore_line_pointer (lcomm_endc);
3c02c47f
DE		 3695
3696 /* The fourth argument to .lcomm is the alignment. */
3697 if (*input_line_pointer != ',')
3698 {
3699 if (size <= 4)
3700 align = 2;
3701 else
3702 align = 3;
3703 }
3704 else
3705 {
3706 ++input_line_pointer;
3707 align = get_absolute_expression ();
3708 if (align <= 0)
3709 {
3710 as_warn (_("ignoring bad alignment"));
3711 align = 2;
3712 }
3713 }
252b5132
RH		 3714 }
3715
3716 *end_name = '\0';
3717 sym = symbol_find_or_make (name);
3718 *end_name = endc;
3719
3720 if (S_IS_DEFINED (sym)
3721 || S_GET_VALUE (sym) != 0)
3722 {
3723 as_bad (_("attempt to redefine symbol"));
3724 ignore_rest_of_line ();
3725 return;
3726 }
81d4177b 3727
252b5132 3728 record_alignment (bss_section, align);
81d4177b 3729
252b5132
RH		 3730 if (! lcomm
3731 || ! S_IS_DEFINED (lcomm_sym))
3732 {
3733 symbolS *def_sym;
3734 offsetT def_size;
3735
3736 if (! lcomm)
3737 {
3738 def_sym = sym;
3739 def_size = size;
3740 S_SET_EXTERNAL (sym);
3741 }
3742 else
3743 {
809ffe0d 3744 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3745 def_sym = lcomm_sym;
3746 def_size = 0;
3747 }
3748
3749 subseg_set (bss_section, 1);
3750 frag_align (align, 0, 0);
81d4177b 3751
809ffe0d 3752 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3753 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3754 def_size, (char *) NULL);
3755 *pfrag = 0;
3756 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3757 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3758 }
3759 else if (lcomm)
3760 {
3761 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3762 symbol_get_frag (lcomm_sym)->fr_offset =
3763 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3764 &~ ((1 << align) - 1));
809ffe0d
ILT		 3765 if (align > symbol_get_tc (lcomm_sym)->align)
3766 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3767 }
3768
3769 if (lcomm)
3770 {
3771 /* Make sym an offset from lcomm_sym. */
3772 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3773 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3774 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3775 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3776 }
3777
3778 subseg_set (current_seg, current_subseg);
3779
3780 demand_empty_rest_of_line ();
3781}
3782
3783/* The .csect pseudo-op. This switches us into a different
3784 subsegment. The first argument is a symbol whose value is the
3785 start of the .csect. In COFF, csect symbols get special aux
3786 entries defined by the x_csect field of union internal_auxent. The
3787 optional second argument is the alignment (the default is 2). */
3788
3789static void
98027b10 3790ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3791{
3792 char *name;
3793 char endc;
3794 symbolS *sym;
931e13a6 3795 offsetT align;
252b5132 3796
d02603dc 3797 endc = get_symbol_name (&name);
81d4177b 3798
252b5132
RH		 3799 sym = symbol_find_or_make (name);
3800
d02603dc 3801 (void) restore_line_pointer (endc);
252b5132
RH		 3802
3803 if (S_GET_NAME (sym)[0] == '\0')
3804 {
3805 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3806 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3807 }
3808
931e13a6 3809 align = 2;
252b5132
RH		 3810 if (*input_line_pointer == ',')
3811 {
3812 ++input_line_pointer;
931e13a6 3813 align = get_absolute_expression ();
252b5132
RH		 3814 }
3815
931e13a6
AM		 3816 ppc_change_csect (sym, align);
3817
252b5132
RH		 3818 demand_empty_rest_of_line ();
3819}
3820
3821/* Change to a different csect. */
3822
3823static void
98027b10 3824ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3825{
3826 if (S_IS_DEFINED (sym))
809ffe0d 3827 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3828 else
3829 {
3830 symbolS **list_ptr;
3831 int after_toc;
3832 int hold_chunksize;
3833 symbolS *list;
931e13a6
AM		 3834 int is_code;
3835 segT sec;
252b5132
RH		 3836
3837 /* This is a new csect. We need to look at the symbol class to
3838 figure out whether it should go in the text section or the
3839 data section. */
3840 after_toc = 0;
931e13a6 3841 is_code = 0;
96d56e9f 3842 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3843 {
3844 case XMC_PR:
3845 case XMC_RO:
3846 case XMC_DB:
3847 case XMC_GL:
3848 case XMC_XO:
3849 case XMC_SV:
3850 case XMC_TI:
3851 case XMC_TB:
3852 S_SET_SEGMENT (sym, text_section);
809ffe0d 3853 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3854 ++ppc_text_subsegment;
3855 list_ptr = &ppc_text_csects;
931e13a6 3856 is_code = 1;
252b5132
RH		 3857 break;
3858 case XMC_RW:
3859 case XMC_TC0:
3860 case XMC_TC:
3861 case XMC_DS:
3862 case XMC_UA:
3863 case XMC_BS:
3864 case XMC_UC:
3865 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3866 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3867 == ppc_data_subsegment))
252b5132
RH		 3868 after_toc = 1;
3869 S_SET_SEGMENT (sym, data_section);
809ffe0d 3870 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3871 ++ppc_data_subsegment;
3872 list_ptr = &ppc_data_csects;
3873 break;
3874 default:
3875 abort ();
3876 }
3877
3878 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3879 changing subsegments, so that we don't use a lot of memory
3880 space for what may be a small section. */
252b5132
RH		 3881 hold_chunksize = chunksize;
3882 chunksize = 64;
3883
931e13a6
AM		 3884 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3885 symbol_get_tc (sym)->subseg);
252b5132
RH		 3886
3887 chunksize = hold_chunksize;
3888
3889 if (after_toc)
3890 ppc_after_toc_frag = frag_now;
3891
931e13a6
AM		 3892 record_alignment (sec, align);
3893 if (is_code)
3894 frag_align_code (align, 0);
3895 else
3896 frag_align (align, 0, 0);
3897
809ffe0d 3898 symbol_set_frag (sym, frag_now);
252b5132
RH		 3899 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3900
931e13a6 3901 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3902 symbol_get_tc (sym)->output = 1;
3903 symbol_get_tc (sym)->within = sym;
81d4177b 3904
252b5132 3905 for (list = *list_ptr;
809ffe0d
ILT		 3906 symbol_get_tc (list)->next != (symbolS *) NULL;
3907 list = symbol_get_tc (list)->next)
252b5132 3908 ;
809ffe0d 3909 symbol_get_tc (list)->next = sym;
81d4177b 3910
252b5132 3911 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3912 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3913 &symbol_lastP);
252b5132
RH		 3914 }
3915
3916 ppc_current_csect = sym;
3917}
3918
85645aed
TG		 3919static void
3920ppc_change_debug_section (unsigned int idx, subsegT subseg)
3921{
3922 segT sec;
3923 flagword oldflags;
3924 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3925
3926 sec = subseg_new (dw->name, subseg);
3927 oldflags = bfd_get_section_flags (stdoutput, sec);
3928 if (oldflags == SEC_NO_FLAGS)
3929 {
3930 /* Just created section. */
3931 gas_assert (dw_sections[idx].sect == NULL);
3932
3933 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3934 bfd_set_section_alignment (stdoutput, sec, 0);
3935 dw_sections[idx].sect = sec;
3936 }
3937
3938 /* Not anymore in a csect. */
3939 ppc_current_csect = NULL;
3940}
3941
3942/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3943 .dwsect flag [, opt-label ]
3944*/
3945
3946static void
3947ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3948{
3949 offsetT flag;
3950 symbolS *opt_label;
3951 const struct xcoff_dwsect_name *dw;
3952 struct dw_subsection *subseg;
3953 struct dw_section *dws;
3954 int i;
3955
3956 /* Find section. */
3957 flag = get_absolute_expression ();
3958 dw = NULL;
3959 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3960 if (xcoff_dwsect_names[i].flag == flag)
3961 {
3962 dw = &xcoff_dwsect_names[i];
3963 break;
3964 }
3965
3966 /* Parse opt-label. */
3967 if (*input_line_pointer == ',')
3968 {
d02603dc 3969 char *label;
85645aed
TG		 3970 char c;
3971
3972 ++input_line_pointer;
3973
d02603dc 3974 c = get_symbol_name (&label);
85645aed 3975 opt_label = symbol_find_or_make (label);
d02603dc 3976 (void) restore_line_pointer (c);
85645aed
TG		 3977 }
3978 else
3979 opt_label = NULL;
3980
3981 demand_empty_rest_of_line ();
3982
3983 /* Return now in case of unknown subsection. */
3984 if (dw == NULL)
3985 {
d6ed37ed 3986 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3987 (unsigned)flag);
3988 return;
3989 }
3990
3991 /* Find the subsection. */
3992 dws = &dw_sections[i];
3993 subseg = NULL;
3994 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3995 {
3996 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3997 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3998 {
3999 as_bad (_("label %s was not defined in this dwarf section"),
4000 S_GET_NAME (opt_label));
4001 subseg = dws->anon_subseg;
4002 opt_label = NULL;
4003 }
4004 else
4005 subseg = symbol_get_tc (opt_label)->u.dw;
4006 }
4007
4008 if (subseg != NULL)
4009 {
4010 /* Switch to the subsection. */
4011 ppc_change_debug_section (i, subseg->subseg);
4012 }
4013 else
4014 {
4015 /* Create a new dw subsection. */
4016 subseg = (struct dw_subsection *)
4017 xmalloc (sizeof (struct dw_subsection));
4018
4019 if (opt_label == NULL)
4020 {
4021 /* The anonymous one. */
4022 subseg->subseg = 0;
4023 subseg->link = NULL;
4024 dws->anon_subseg = subseg;
4025 }
4026 else
4027 {
4028 /* A named one. */
4029 if (dws->list_subseg != NULL)
4030 subseg->subseg = dws->list_subseg->subseg + 1;
4031 else
4032 subseg->subseg = 1;
4033
4034 subseg->link = dws->list_subseg;
4035 dws->list_subseg = subseg;
4036 symbol_get_tc (opt_label)->u.dw = subseg;
4037 }
4038
4039 ppc_change_debug_section (i, subseg->subseg);
4040
4041 if (dw->def_size)
4042 {
4043 /* Add the length field. */
4044 expressionS *exp = &subseg->end_exp;
4045 int sz;
4046
4047 if (opt_label != NULL)
4048 symbol_set_value_now (opt_label);
4049
4050 /* Add the length field. Note that according to the AIX assembler
4051 manual, the size of the length field is 4 for powerpc32 but
4052 12 for powerpc64. */
4053 if (ppc_obj64)
4054 {
4055 /* Write the 64bit marker. */
4056 md_number_to_chars (frag_more (4), -1, 4);
4057 }
4058
4059 exp->X_op = O_subtract;
4060 exp->X_op_symbol = symbol_temp_new_now ();
4061 exp->X_add_symbol = symbol_temp_make ();
4062
4063 sz = ppc_obj64 ? 8 : 4;
4064 exp->X_add_number = -sz;
4065 emit_expr (exp, sz);
4066 }
4067 }
4068}
4069
252b5132
RH		 4070/* This function handles the .text and .data pseudo-ops. These
4071 pseudo-ops aren't really used by XCOFF; we implement them for the
4072 convenience of people who aren't used to XCOFF. */
4073
4074static void
98027b10 4075ppc_section (int type)
252b5132
RH		 4076{
4077 const char *name;
4078 symbolS *sym;
4079
4080 if (type == 't')
4081 name = ".text[PR]";
4082 else if (type == 'd')
4083 name = ".data[RW]";
4084 else
4085 abort ();
4086
4087 sym = symbol_find_or_make (name);
4088
931e13a6 4089 ppc_change_csect (sym, 2);
252b5132
RH		 4090
4091 demand_empty_rest_of_line ();
4092}
4093
4094/* This function handles the .section pseudo-op. This is mostly to
4095 give an error, since XCOFF only supports .text, .data and .bss, but
4096 we do permit the user to name the text or data section. */
4097
4098static void
98027b10 4099ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4100{
4101 char *user_name;
4102 const char *real_name;
4103 char c;
4104 symbolS *sym;
4105
d02603dc 4106 c = get_symbol_name (&user_name);
252b5132
RH		 4107
4108 if (strcmp (user_name, ".text") == 0)
4109 real_name = ".text[PR]";
4110 else if (strcmp (user_name, ".data") == 0)
4111 real_name = ".data[RW]";
4112 else
4113 {
d6ed37ed 4114 as_bad (_("the XCOFF file format does not support arbitrary sections"));
d02603dc 4115 (void) restore_line_pointer (c);
252b5132
RH		 4116 ignore_rest_of_line ();
4117 return;
4118 }
4119
d02603dc 4120 (void) restore_line_pointer (c);
252b5132
RH		 4121
4122 sym = symbol_find_or_make (real_name);
4123
931e13a6 4124 ppc_change_csect (sym, 2);
252b5132
RH		 4125
4126 demand_empty_rest_of_line ();
4127}
4128
4129/* The .extern pseudo-op. We create an undefined symbol. */
4130
4131static void
98027b10 4132ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4133{
4134 char *name;
4135 char endc;
4136
d02603dc 4137 endc = get_symbol_name (&name);
252b5132
RH		 4138
4139 (void) symbol_find_or_make (name);
4140
d02603dc 4141 (void) restore_line_pointer (endc);
252b5132
RH		 4142
4143 demand_empty_rest_of_line ();
4144}
4145
4146/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4147
4148static void
98027b10 4149ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4150{
4151 char *name;
4152 char endc;
4153 symbolS *sym;
4154
d02603dc 4155 endc = get_symbol_name (&name);
252b5132
RH		 4156
4157 sym = symbol_find_or_make (name);
4158
d02603dc 4159 (void) restore_line_pointer (endc);
252b5132 4160
809ffe0d 4161 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4162
4163 demand_empty_rest_of_line ();
4164}
4165
c865e45b
RS		 4166/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4167 relocations at the beginning of the current csect.
4168
4169 (In principle, there's no reason why the relocations _have_ to be at
4170 the beginning. Anywhere in the csect would do. However, inserting
4171 at the beginning is what the native assmebler does, and it helps to
4172 deal with cases where the .ref statements follow the section contents.)
4173
4174 ??? .refs don't work for empty .csects. However, the native assembler
4175 doesn't report an error in this case, and neither yet do we. */
4176
4177static void
4178ppc_ref (int ignore ATTRIBUTE_UNUSED)
4179{
4180 char *name;
4181 char c;
4182
4183 if (ppc_current_csect == NULL)
4184 {
4185 as_bad (_(".ref outside .csect"));
4186 ignore_rest_of_line ();
4187 return;
4188 }
4189
4190 do
4191 {
d02603dc 4192 c = get_symbol_name (&name);
c865e45b
RS		 4193
4194 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4195 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4196
4197 *input_line_pointer = c;
d02603dc 4198 SKIP_WHITESPACE_AFTER_NAME ();
c865e45b
RS		 4199 c = *input_line_pointer;
4200 if (c == ',')
4201 {
4202 input_line_pointer++;
4203 SKIP_WHITESPACE ();
4204 if (is_end_of_line[(unsigned char) *input_line_pointer])
4205 {
4206 as_bad (_("missing symbol name"));
4207 ignore_rest_of_line ();
4208 return;
4209 }
4210 }
4211 }
4212 while (c == ',');
4213
4214 demand_empty_rest_of_line ();
4215}
4216
252b5132
RH		 4217/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4218 although I don't know why it bothers. */
4219
4220static void
98027b10 4221ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4222{
4223 char *name;
4224 char endc;
4225 symbolS *sym;
4226 int len;
4227
d02603dc 4228 endc = get_symbol_name (&name);
252b5132
RH		 4229
4230 sym = symbol_find_or_make (name);
4231
d02603dc 4232 (void) restore_line_pointer (endc);
252b5132
RH		 4233
4234 if (*input_line_pointer != ',')
4235 {
4236 as_bad (_("missing rename string"));
4237 ignore_rest_of_line ();
4238 return;
4239 }
4240 ++input_line_pointer;
4241
809ffe0d 4242 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4243
4244 demand_empty_rest_of_line ();
4245}
4246
4247/* The .stabx pseudo-op. This is similar to a normal .stabs
4248 pseudo-op, but slightly different. A sample is
4249 .stabx "main:F-1",.main,142,0
4250 The first argument is the symbol name to create. The second is the
4251 value, and the third is the storage class. The fourth seems to be
4252 always zero, and I am assuming it is the type. */
4253
4254static void
98027b10 4255ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4256{
4257 char *name;
4258 int len;
4259 symbolS *sym;
4260 expressionS exp;
4261
4262 name = demand_copy_C_string (&len);
4263
4264 if (*input_line_pointer != ',')
4265 {
4266 as_bad (_("missing value"));
4267 return;
4268 }
4269 ++input_line_pointer;
4270
b34976b6 4271 ppc_stab_symbol = TRUE;
252b5132 4272 sym = symbol_make (name);
b34976b6 4273 ppc_stab_symbol = FALSE;
252b5132 4274
809ffe0d 4275 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4276
4277 (void) expression (&exp);
4278
4279 switch (exp.X_op)
4280 {
4281 case O_illegal:
4282 case O_absent:
4283 case O_big:
4284 as_bad (_("illegal .stabx expression; zero assumed"));
4285 exp.X_add_number = 0;
4286 /* Fall through. */
4287 case O_constant:
4288 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4289 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4290 break;
4291
4292 case O_symbol:
4293 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4294 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4295 else
4296 {
4297 S_SET_VALUE (sym,
4298 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4299 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4300 }
4301 break;
4302
4303 default:
4304 /* The value is some complex expression. This will probably
99a814a1
AM		 4305 fail at some later point, but this is probably the right
4306 thing to do here. */
809ffe0d 4307 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4308 break;
4309 }
4310
4311 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4312 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4313
4314 if (*input_line_pointer != ',')
4315 {
4316 as_bad (_("missing class"));
4317 return;
4318 }
4319 ++input_line_pointer;
4320
4321 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4322
4323 if (*input_line_pointer != ',')
4324 {
4325 as_bad (_("missing type"));
4326 return;
4327 }
4328 ++input_line_pointer;
4329
4330 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4331
809ffe0d 4332 symbol_get_tc (sym)->output = 1;
252b5132 4333
c734e7e3
TG		 4334 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4335 {
4336 /* In this case :
252b5132 4337
c734e7e3
TG		 4338 .bs name
4339 .stabx "z",arrays_,133,0
4340 .es
99a814a1 4341
c734e7e3 4342 .comm arrays_,13768,3
99a814a1 4343
c734e7e3
TG		 4344 resolve_symbol_value will copy the exp's "within" into sym's when the
4345 offset is 0. Since this seems to be corner case problem,
4346 only do the correction for storage class C_STSYM. A better solution
4347 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4348
c734e7e3
TG		 4349 if (exp.X_op == O_symbol)
4350 {
4351 if (ppc_current_block == NULL)
4352 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4353
c734e7e3
TG		 4354 symbol_get_tc (sym)->within = ppc_current_block;
4355 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4356 }
4357 }
99a814a1 4358
252b5132
RH		 4359 if (exp.X_op != O_symbol
4360 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4361 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4362 ppc_frob_label (sym);
4363 else
4364 {
4365 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4366 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4367 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4368 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4369 }
4370
4371 demand_empty_rest_of_line ();
4372}
4373
4374/* The .function pseudo-op. This takes several arguments. The first
4375 argument seems to be the external name of the symbol. The second
67c1ffbe 4376 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4377 uses the same name for both. I have no idea what the third and
4378 fourth arguments are meant to be. The optional fifth argument is
4379 an expression for the size of the function. In COFF this symbol
4380 gets an aux entry like that used for a csect. */
4381
4382static void
98027b10 4383ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4384{
4385 char *name;
4386 char endc;
4387 char *s;
4388 symbolS *ext_sym;
4389 symbolS *lab_sym;
4390
d02603dc 4391 endc = get_symbol_name (&name);
252b5132
RH		 4392
4393 /* Ignore any [PR] suffix. */
4394 name = ppc_canonicalize_symbol_name (name);
4395 s = strchr (name, '[');
4396 if (s != (char *) NULL
4397 && strcmp (s + 1, "PR]") == 0)
4398 *s = '\0';
4399
4400 ext_sym = symbol_find_or_make (name);
4401
d02603dc 4402 (void) restore_line_pointer (endc);
252b5132
RH		 4403
4404 if (*input_line_pointer != ',')
4405 {
4406 as_bad (_("missing symbol name"));
4407 ignore_rest_of_line ();
4408 return;
4409 }
4410 ++input_line_pointer;
4411
d02603dc 4412 endc = get_symbol_name (&name);
252b5132
RH		 4413
4414 lab_sym = symbol_find_or_make (name);
4415
d02603dc 4416 (void) restore_line_pointer (endc);
252b5132
RH		 4417
4418 if (ext_sym != lab_sym)
4419 {
809ffe0d
ILT		 4420 expressionS exp;
4421
4422 exp.X_op = O_symbol;
4423 exp.X_add_symbol = lab_sym;
4424 exp.X_op_symbol = NULL;
4425 exp.X_add_number = 0;
4426 exp.X_unsigned = 0;
4427 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4428 }
4429
96d56e9f
NC		 4430 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4431 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4432 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4433
4434 if (*input_line_pointer == ',')
4435 {
91d6fa6a 4436 expressionS exp;
252b5132
RH		 4437
4438 /* Ignore the third argument. */
4439 ++input_line_pointer;
91d6fa6a 4440 expression (& exp);
252b5132
RH		 4441 if (*input_line_pointer == ',')
4442 {
4443 /* Ignore the fourth argument. */
4444 ++input_line_pointer;
91d6fa6a 4445 expression (& exp);
252b5132
RH		 4446 if (*input_line_pointer == ',')
4447 {
4448 /* The fifth argument is the function size. */
4449 ++input_line_pointer;
85645aed
TG		 4450 symbol_get_tc (ext_sym)->u.size = symbol_new
4451 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4452 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4453 }
4454 }
4455 }
4456
4457 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4458 SF_SET_FUNCTION (ext_sym);
4459 SF_SET_PROCESS (ext_sym);
4460 coff_add_linesym (ext_sym);
4461
4462 demand_empty_rest_of_line ();
4463}
4464
4465/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4466 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4467 with the correct line number */
5d6255fe 4468
8642cce8 4469static symbolS *saved_bi_sym = 0;
252b5132
RH		 4470
4471static void
98027b10 4472ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4473{
4474 symbolS *sym;
4475
4476 sym = symbol_make (".bf");
4477 S_SET_SEGMENT (sym, text_section);
809ffe0d 4478 symbol_set_frag (sym, frag_now);
252b5132
RH		 4479 S_SET_VALUE (sym, frag_now_fix ());
4480 S_SET_STORAGE_CLASS (sym, C_FCN);
4481
4482 coff_line_base = get_absolute_expression ();
4483
4484 S_SET_NUMBER_AUXILIARY (sym, 1);
4485 SA_SET_SYM_LNNO (sym, coff_line_base);
4486
8642cce8 4487 /* Line number for bi. */
5d6255fe 4488 if (saved_bi_sym)
8642cce8
TR		 4489 {
4490 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4491 saved_bi_sym = 0;
4492 }
5d6255fe 4493
8642cce8 4494
809ffe0d 4495 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4496
4497 ppc_frob_label (sym);
4498
4499 demand_empty_rest_of_line ();
4500}
4501
4502/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4503 ".ef", except that the line number is absolute, not relative to the
4504 most recent ".bf" symbol. */
4505
4506static void
98027b10 4507ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4508{
4509 symbolS *sym;
4510
4511 sym = symbol_make (".ef");
4512 S_SET_SEGMENT (sym, text_section);
809ffe0d 4513 symbol_set_frag (sym, frag_now);
252b5132
RH		 4514 S_SET_VALUE (sym, frag_now_fix ());
4515 S_SET_STORAGE_CLASS (sym, C_FCN);
4516 S_SET_NUMBER_AUXILIARY (sym, 1);
4517 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4518 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4519
4520 ppc_frob_label (sym);
4521
4522 demand_empty_rest_of_line ();
4523}
4524
4525/* The .bi and .ei pseudo-ops. These take a string argument and
4526 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4527 the symbol list. The value of .bi will be know when the next .bf
4528 is encountered. */
252b5132
RH		 4529
4530static void
98027b10 4531ppc_biei (int ei)
252b5132
RH		 4532{
4533 static symbolS *last_biei;
4534
4535 char *name;
4536 int len;
4537 symbolS *sym;
4538 symbolS *look;
4539
4540 name = demand_copy_C_string (&len);
4541
4542 /* The value of these symbols is actually file offset. Here we set
4543 the value to the index into the line number entries. In
4544 ppc_frob_symbols we set the fix_line field, which will cause BFD
4545 to do the right thing. */
4546
4547 sym = symbol_make (name);
4548 /* obj-coff.c currently only handles line numbers correctly in the
4549 .text section. */
4550 S_SET_SEGMENT (sym, text_section);
4551 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4552 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4553
4554 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4555 symbol_get_tc (sym)->output = 1;
81d4177b 4556
8642cce8 4557 /* Save bi. */
5d6255fe 4558 if (ei)
8642cce8
TR		 4559 saved_bi_sym = 0;
4560 else
4561 saved_bi_sym = sym;
4562
252b5132
RH		 4563 for (look = last_biei ? last_biei : symbol_rootP;
4564 (look != (symbolS *) NULL
4565 && (S_GET_STORAGE_CLASS (look) == C_FILE
4566 || S_GET_STORAGE_CLASS (look) == C_BINCL
4567 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4568 look = symbol_next (look))
4569 ;
4570 if (look != (symbolS *) NULL)
4571 {
4572 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4573 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4574 last_biei = sym;
4575 }
4576
4577 demand_empty_rest_of_line ();
4578}
4579
4580/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4581 There is one argument, which is a csect symbol. The value of the
4582 .bs symbol is the index of this csect symbol. */
4583
4584static void
98027b10 4585ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4586{
4587 char *name;
4588 char endc;
4589 symbolS *csect;
4590 symbolS *sym;
4591
4592 if (ppc_current_block != NULL)
4593 as_bad (_("nested .bs blocks"));
4594
d02603dc 4595 endc = get_symbol_name (&name);
252b5132
RH		 4596
4597 csect = symbol_find_or_make (name);
4598
d02603dc 4599 (void) restore_line_pointer (endc);
252b5132
RH		 4600
4601 sym = symbol_make (".bs");
4602 S_SET_SEGMENT (sym, now_seg);
4603 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4604 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4605 symbol_get_tc (sym)->output = 1;
252b5132 4606
809ffe0d 4607 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4608
4609 ppc_frob_label (sym);
4610
4611 ppc_current_block = sym;
4612
4613 demand_empty_rest_of_line ();
4614}
4615
4616/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4617
4618static void
98027b10 4619ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4620{
4621 symbolS *sym;
4622
4623 if (ppc_current_block == NULL)
4624 as_bad (_(".es without preceding .bs"));
4625
4626 sym = symbol_make (".es");
4627 S_SET_SEGMENT (sym, now_seg);
4628 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4629 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4630 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4631
4632 ppc_frob_label (sym);
4633
4634 ppc_current_block = NULL;
4635
4636 demand_empty_rest_of_line ();
4637}
4638
4639/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4640 line number. */
4641
4642static void
98027b10 4643ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4644{
4645 symbolS *sym;
4646
4647 sym = symbol_make (".bb");
4648 S_SET_SEGMENT (sym, text_section);
809ffe0d 4649 symbol_set_frag (sym, frag_now);
252b5132
RH		 4650 S_SET_VALUE (sym, frag_now_fix ());
4651 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4652
4653 S_SET_NUMBER_AUXILIARY (sym, 1);
4654 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4655
809ffe0d 4656 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4657
4658 SF_SET_PROCESS (sym);
4659
4660 ppc_frob_label (sym);
4661
4662 demand_empty_rest_of_line ();
4663}
4664
4665/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4666 line number. */
4667
4668static void
98027b10 4669ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4670{
4671 symbolS *sym;
4672
4673 sym = symbol_make (".eb");
4674 S_SET_SEGMENT (sym, text_section);
809ffe0d 4675 symbol_set_frag (sym, frag_now);
252b5132
RH		 4676 S_SET_VALUE (sym, frag_now_fix ());
4677 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4678 S_SET_NUMBER_AUXILIARY (sym, 1);
4679 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4680 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4681
4682 SF_SET_PROCESS (sym);
4683
4684 ppc_frob_label (sym);
4685
4686 demand_empty_rest_of_line ();
4687}
4688
4689/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4690 specified name. */
4691
4692static void
98027b10 4693ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4694{
4695 char *name;
4696 int len;
4697 symbolS *sym;
4698
4699 name = demand_copy_C_string (&len);
4700 sym = symbol_make (name);
4701 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4702 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4703 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4704 S_SET_VALUE (sym, 0);
809ffe0d 4705 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4706
4707 ppc_frob_label (sym);
4708
4709 demand_empty_rest_of_line ();
4710}
4711
4712/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4713
4714static void
98027b10 4715ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4716{
4717 symbolS *sym;
4718
4719 sym = symbol_make (".ec");
4720 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4721 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4722 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4723 S_SET_VALUE (sym, 0);
809ffe0d 4724 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4725
4726 ppc_frob_label (sym);
4727
4728 demand_empty_rest_of_line ();
4729}
4730
4731/* The .toc pseudo-op. Switch to the .toc subsegment. */
4732
4733static void
98027b10 4734ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4735{
4736 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4737 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4738 else
4739 {
4740 subsegT subseg;
4741 symbolS *sym;
4742 symbolS *list;
81d4177b 4743
252b5132
RH		 4744 subseg = ppc_data_subsegment;
4745 ++ppc_data_subsegment;
4746
4747 subseg_new (segment_name (data_section), subseg);
4748 ppc_toc_frag = frag_now;
4749
4750 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4751 symbol_set_frag (sym, frag_now);
252b5132
RH		 4752 S_SET_SEGMENT (sym, data_section);
4753 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4754 symbol_get_tc (sym)->subseg = subseg;
4755 symbol_get_tc (sym)->output = 1;
4756 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4757
4758 ppc_toc_csect = sym;
81d4177b 4759
252b5132 4760 for (list = ppc_data_csects;
809ffe0d
ILT		 4761 symbol_get_tc (list)->next != (symbolS *) NULL;
4762 list = symbol_get_tc (list)->next)
252b5132 4763 ;
809ffe0d 4764 symbol_get_tc (list)->next = sym;
252b5132
RH		 4765
4766 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4767 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4768 &symbol_lastP);
252b5132
RH		 4769 }
4770
4771 ppc_current_csect = ppc_toc_csect;
4772
4773 demand_empty_rest_of_line ();
4774}
4775
4776/* The AIX assembler automatically aligns the operands of a .long or
4777 .short pseudo-op, and we want to be compatible. */
4778
4779static void
98027b10 4780ppc_xcoff_cons (int log_size)
252b5132
RH		 4781{
4782 frag_align (log_size, 0, 0);
4783 record_alignment (now_seg, log_size);
4784 cons (1 << log_size);
4785}
4786
4787static void
98027b10 4788ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4789{
4790 expressionS exp;
4791 int byte_count;
4792
4793 (void) expression (&exp);
4794
4795 if (exp.X_op != O_constant)
4796 {
4797 as_bad (_("non-constant byte count"));
4798 return;
4799 }
4800
4801 byte_count = exp.X_add_number;
4802
4803 if (*input_line_pointer != ',')
4804 {
4805 as_bad (_("missing value"));
4806 return;
4807 }
4808
4809 ++input_line_pointer;
4810 cons (byte_count);
4811}
4812
85645aed
TG		 4813void
4814ppc_xcoff_end (void)
4815{
4816 int i;
4817
4818 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4819 {
4820 struct dw_section *dws = &dw_sections[i];
4821 struct dw_subsection *dwss;
4822
4823 if (dws->anon_subseg)
4824 {
4825 dwss = dws->anon_subseg;
4826 dwss->link = dws->list_subseg;
4827 }
4828 else
4829 dwss = dws->list_subseg;
4830
4831 for (; dwss != NULL; dwss = dwss->link)
4832 if (dwss->end_exp.X_add_symbol != NULL)
4833 {
4834 subseg_set (dws->sect, dwss->subseg);
4835 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4836 }
4837 }
4838}
4839
252b5132 4840#endif /* OBJ_XCOFF */
0baf16f2 4841#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4842\f
4843/* The .tc pseudo-op. This is used when generating either XCOFF or
4844 ELF. This takes two or more arguments.
4845
4846 When generating XCOFF output, the first argument is the name to
4847 give to this location in the toc; this will be a symbol with class
0baf16f2 4848 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4849 this location in the TOC; often there is just one more argument, a
1049f94e 4850 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4851 depends on target word size. A 32-bit target uses 4-byte values, a
4852 64-bit target uses 8-byte values.
252b5132
RH		 4853
4854 When not generating XCOFF output, the arguments are the same, but
4855 the first argument is simply ignored. */
4856
4857static void
98027b10 4858ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4859{
4860#ifdef OBJ_XCOFF
4861
4862 /* Define the TOC symbol name. */
4863 {
4864 char *name;
4865 char endc;
4866 symbolS *sym;
4867
4868 if (ppc_toc_csect == (symbolS *) NULL
4869 || ppc_toc_csect != ppc_current_csect)
4870 {
4871 as_bad (_(".tc not in .toc section"));
4872 ignore_rest_of_line ();
4873 return;
4874 }
4875
d02603dc 4876 endc = get_symbol_name (&name);
252b5132
RH		 4877
4878 sym = symbol_find_or_make (name);
4879
d02603dc 4880 (void) restore_line_pointer (endc);
252b5132
RH		 4881
4882 if (S_IS_DEFINED (sym))
4883 {
4884 symbolS *label;
4885
809ffe0d 4886 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4887 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4888 {
4889 as_bad (_(".tc with no label"));
4890 ignore_rest_of_line ();
4891 return;
4892 }
4893
4894 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4895 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4896 S_SET_VALUE (label, S_GET_VALUE (sym));
4897
4898 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4899 ++input_line_pointer;
4900
4901 return;
4902 }
4903
4904 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4905 symbol_set_frag (sym, frag_now);
252b5132 4906 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4907 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4908 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4909
4910 ppc_frob_label (sym);
4911 }
4912
0baf16f2
AM		 4913#endif /* OBJ_XCOFF */
4914#ifdef OBJ_ELF
9c7977b3 4915 int align;
252b5132
RH		 4916
4917 /* Skip the TOC symbol name. */
4918 while (is_part_of_name (*input_line_pointer)
d13d4015 4919 || *input_line_pointer == ' '
252b5132
RH		 4920 || *input_line_pointer == '['
4921 || *input_line_pointer == ']'
4922 || *input_line_pointer == '{'
4923 || *input_line_pointer == '}')
4924 ++input_line_pointer;
4925
0baf16f2 4926 /* Align to a four/eight byte boundary. */
2b3c4602 4927 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4928 frag_align (align, 0, 0);
4929 record_alignment (now_seg, align);
0baf16f2 4930#endif /* OBJ_ELF */
252b5132
RH		 4931
4932 if (*input_line_pointer != ',')
4933 demand_empty_rest_of_line ();
4934 else
4935 {
4936 ++input_line_pointer;
2b3c4602 4937 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4938 }
4939}
0baf16f2
AM		 4940
4941/* Pseudo-op .machine. */
0baf16f2
AM		 4942
4943static void
98027b10 4944ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4945{
d02603dc 4946 char c;
69c040df
AM		 4947 char *cpu_string;
4948#define MAX_HISTORY 100
fa452fa6 4949 static ppc_cpu_t *cpu_history;
69c040df
AM		 4950 static int curr_hist;
4951
4952 SKIP_WHITESPACE ();
4953
d02603dc
NC		 4954 c = get_symbol_name (&cpu_string);
4955 cpu_string = xstrdup (cpu_string);
4956 (void) restore_line_pointer (c);
69c040df
AM		 4957
4958 if (cpu_string != NULL)
4959 {
fa452fa6 4960 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4961 ppc_cpu_t new_cpu;
69c040df
AM		 4962 char *p;
4963
4964 for (p = cpu_string; *p != 0; p++)
4965 *p = TOLOWER (*p);
4966
4967 if (strcmp (cpu_string, "push") == 0)
4968 {
4969 if (cpu_history == NULL)
4970 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4971
4972 if (curr_hist >= MAX_HISTORY)
4973 as_bad (_(".machine stack overflow"));
4974 else
4975 cpu_history[curr_hist++] = ppc_cpu;
4976 }
4977 else if (strcmp (cpu_string, "pop") == 0)
4978 {
4979 if (curr_hist <= 0)
4980 as_bad (_(".machine stack underflow"));
4981 else
4982 ppc_cpu = cpu_history[--curr_hist];
4983 }
776fc418 4984 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4985 ppc_cpu = new_cpu;
69c040df
AM		 4986 else
4987 as_bad (_("invalid machine `%s'"), cpu_string);
4988
4989 if (ppc_cpu != old_cpu)
4990 ppc_setup_opcodes ();
4991 }
4992
4993 demand_empty_rest_of_line ();
0baf16f2 4994}
0baf16f2 4995#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4996\f
4997#ifdef TE_PE
4998
99a814a1 4999/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 5000
5001/* Set the current section. */
5002static void
98027b10 5003ppc_set_current_section (segT new)
252b5132
RH		 5004{
5005 ppc_previous_section = ppc_current_section;
5006 ppc_current_section = new;
5007}
5008
5009/* pseudo-op: .previous
5010 behaviour: toggles the current section with the previous section.
5011 errors: None
99a814a1
AM		 5012 warnings: "No previous section" */
5013
252b5132 5014static void
98027b10 5015ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5016{
81d4177b 5017 if (ppc_previous_section == NULL)
252b5132 5018 {
d6ed37ed 5019 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5020 return;
5021 }
5022
99a814a1 5023 subseg_set (ppc_previous_section, 0);
252b5132 5024
99a814a1 5025 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5026}
5027
5028/* pseudo-op: .pdata
5029 behaviour: predefined read only data section
b34976b6 5030 double word aligned
252b5132
RH		 5031 errors: None
5032 warnings: None
5033 initial: .section .pdata "adr3"
b34976b6 5034 a - don't know -- maybe a misprint
252b5132
RH		 5035 d - initialized data
5036 r - readable
5037 3 - double word aligned (that would be 4 byte boundary)
5038
5039 commentary:
5040 Tag index tables (also known as the function table) for exception
99a814a1 5041 handling, debugging, etc. */
252b5132 5042
252b5132 5043static void
98027b10 5044ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5045{
81d4177b 5046 if (pdata_section == 0)
252b5132
RH		 5047 {
5048 pdata_section = subseg_new (".pdata", 0);
81d4177b 5049
252b5132
RH		 5050 bfd_set_section_flags (stdoutput, pdata_section,
5051 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5052 | SEC_READONLY | SEC_DATA ));
81d4177b 5053
252b5132
RH		 5054 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5055 }
5056 else
5057 {
99a814a1 5058 pdata_section = subseg_new (".pdata", 0);
252b5132 5059 }
99a814a1 5060 ppc_set_current_section (pdata_section);
252b5132
RH		 5061}
5062
5063/* pseudo-op: .ydata
5064 behaviour: predefined read only data section
b34976b6 5065 double word aligned
252b5132
RH		 5066 errors: None
5067 warnings: None
5068 initial: .section .ydata "drw3"
b34976b6 5069 a - don't know -- maybe a misprint
252b5132
RH		 5070 d - initialized data
5071 r - readable
5072 3 - double word aligned (that would be 4 byte boundary)
5073 commentary:
5074 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5075 debugging, etc. */
5076
252b5132 5077static void
98027b10 5078ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5079{
81d4177b 5080 if (ydata_section == 0)
252b5132
RH		 5081 {
5082 ydata_section = subseg_new (".ydata", 0);
5083 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5084 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5085 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5086
5087 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5088 }
5089 else
5090 {
5091 ydata_section = subseg_new (".ydata", 0);
5092 }
99a814a1 5093 ppc_set_current_section (ydata_section);
252b5132
RH		 5094}
5095
5096/* pseudo-op: .reldata
5097 behaviour: predefined read write data section
b34976b6 5098 double word aligned (4-byte)
252b5132
RH		 5099 FIXME: relocation is applied to it
5100 FIXME: what's the difference between this and .data?
5101 errors: None
5102 warnings: None
5103 initial: .section .reldata "drw3"
5104 d - initialized data
5105 r - readable
5106 w - writeable
5107 3 - double word aligned (that would be 8 byte boundary)
5108
5109 commentary:
5110 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5111 function descriptors, etc. */
5112
252b5132 5113static void
98027b10 5114ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5115{
5116 if (reldata_section == 0)
5117 {
5118 reldata_section = subseg_new (".reldata", 0);
5119
5120 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5121 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5122 | SEC_DATA));
252b5132
RH		 5123
5124 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5125 }
5126 else
5127 {
5128 reldata_section = subseg_new (".reldata", 0);
5129 }
99a814a1 5130 ppc_set_current_section (reldata_section);
252b5132
RH		 5131}
5132
5133/* pseudo-op: .rdata
5134 behaviour: predefined read only data section
b34976b6 5135 double word aligned
252b5132
RH		 5136 errors: None
5137 warnings: None
5138 initial: .section .rdata "dr3"
5139 d - initialized data
5140 r - readable
99a814a1
AM		 5141 3 - double word aligned (that would be 4 byte boundary) */
5142
252b5132 5143static void
98027b10 5144ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5145{
5146 if (rdata_section == 0)
5147 {
5148 rdata_section = subseg_new (".rdata", 0);
5149 bfd_set_section_flags (stdoutput, rdata_section,
5150 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5151 | SEC_READONLY | SEC_DATA ));
5152
5153 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5154 }
5155 else
5156 {
5157 rdata_section = subseg_new (".rdata", 0);
5158 }
99a814a1 5159 ppc_set_current_section (rdata_section);
252b5132
RH		 5160}
5161
5162/* pseudo-op: .ualong
81d4177b 5163 behaviour: much like .int, with the exception that no alignment is
b34976b6 5164 performed.
252b5132
RH		 5165 FIXME: test the alignment statement
5166 errors: None
99a814a1
AM		 5167 warnings: None */
5168
252b5132 5169static void
98027b10 5170ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5171{
99a814a1
AM		 5172 /* Try for long. */
5173 cons (4);
252b5132
RH		 5174}
5175
5176/* pseudo-op: .znop <symbol name>
5177 behaviour: Issue a nop instruction
b34976b6 5178 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5179 the supplied symbol name.
5180 errors: None
99a814a1
AM		 5181 warnings: Missing symbol name */
5182
252b5132 5183static void
98027b10 5184ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5185{
5186 unsigned long insn;
5187 const struct powerpc_opcode *opcode;
252b5132 5188 char *f;
252b5132 5189 symbolS *sym;
252b5132
RH		 5190 char *symbol_name;
5191 char c;
5192 char *name;
252b5132 5193
99a814a1 5194 /* Strip out the symbol name. */
d02603dc 5195 c = get_symbol_name (&symbol_name);
252b5132
RH		 5196
5197 name = xmalloc (input_line_pointer - symbol_name + 1);
5198 strcpy (name, symbol_name);
5199
5200 sym = symbol_find_or_make (name);
5201
5202 *input_line_pointer = c;
5203
d02603dc 5204 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5205
5206 /* Look up the opcode in the hash table. */
5207 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5208
99a814a1 5209 /* Stick in the nop. */
252b5132
RH		 5210 insn = opcode->opcode;
5211
5212 /* Write out the instruction. */
5213 f = frag_more (4);
5214 md_number_to_chars (f, insn, 4);
5215 fix_new (frag_now,
5216 f - frag_now->fr_literal,
5217 4,
5218 sym,
5219 0,
5220 0,
5221 BFD_RELOC_16_GOT_PCREL);
5222
5223}
5224
81d4177b
KH		 5225/* pseudo-op:
5226 behaviour:
5227 errors:
99a814a1
AM		 5228 warnings: */
5229
252b5132 5230static void
98027b10 5231ppc_pe_comm (int lcomm)
252b5132 5232{
98027b10
AM		 5233 char *name;
5234 char c;
5235 char *p;
252b5132 5236 offsetT temp;
98027b10 5237 symbolS *symbolP;
252b5132
RH		 5238 offsetT align;
5239
d02603dc 5240 c = get_symbol_name (&name);
252b5132 5241
99a814a1 5242 /* just after name is now '\0'. */
252b5132
RH		 5243 p = input_line_pointer;
5244 *p = c;
d02603dc 5245 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5246 if (*input_line_pointer != ',')
5247 {
d6ed37ed 5248 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5249 ignore_rest_of_line ();
5250 return;
5251 }
5252
5253 input_line_pointer++; /* skip ',' */
5254 if ((temp = get_absolute_expression ()) < 0)
5255 {
5256 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5257 ignore_rest_of_line ();
5258 return;
5259 }
5260
5261 if (! lcomm)
5262 {
5263 /* The third argument to .comm is the alignment. */
5264 if (*input_line_pointer != ',')
5265 align = 3;
5266 else
5267 {
5268 ++input_line_pointer;
5269 align = get_absolute_expression ();
5270 if (align <= 0)
5271 {
5272 as_warn (_("ignoring bad alignment"));
5273 align = 3;
5274 }
5275 }
5276 }
5277
5278 *p = 0;
5279 symbolP = symbol_find_or_make (name);
5280
5281 *p = c;
5282 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5283 {
d6ed37ed 5284 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5285 S_GET_NAME (symbolP));
5286 ignore_rest_of_line ();
5287 return;
5288 }
5289
5290 if (S_GET_VALUE (symbolP))
5291 {
5292 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5293 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5294 S_GET_NAME (symbolP),
5295 (long) S_GET_VALUE (symbolP),
5296 (long) temp);
5297 }
5298 else
5299 {
5300 S_SET_VALUE (symbolP, (valueT) temp);
5301 S_SET_EXTERNAL (symbolP);
86ebace2 5302 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5303 }
5304
5305 demand_empty_rest_of_line ();
5306}
5307
5308/*
5309 * implement the .section pseudo op:
5310 * .section name {, "flags"}
5311 * ^ ^
5312 * | +--- optional flags: 'b' for bss
5313 * | 'i' for info
5314 * +-- section name 'l' for lib
5315 * 'n' for noload
5316 * 'o' for over
5317 * 'w' for data
5318 * 'd' (apparently m88k for data)
5319 * 'x' for text
5320 * But if the argument is not a quoted string, treat it as a
5321 * subsegment number.
5322 *
5323 * FIXME: this is a copy of the section processing from obj-coff.c, with
5324 * additions/changes for the moto-pas assembler support. There are three
5325 * categories:
5326 *
81d4177b 5327 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5328 * setting bits that bfd probably neither understands or uses. The
5329 * correct approach (?) will have to incorporate extra fields attached
5330 * to the section to hold the system specific stuff. (krk)
5331 *
5332 * Section Contents:
5333 * 'a' - unknown - referred to in documentation, but no definition supplied
5334 * 'c' - section has code
5335 * 'd' - section has initialized data
5336 * 'u' - section has uninitialized data
5337 * 'i' - section contains directives (info)
5338 * 'n' - section can be discarded
5339 * 'R' - remove section at link time
5340 *
5341 * Section Protection:
5342 * 'r' - section is readable
5343 * 'w' - section is writeable
5344 * 'x' - section is executable
5345 * 's' - section is sharable
5346 *
5347 * Section Alignment:
5348 * '0' - align to byte boundary
5349 * '1' - align to halfword undary
5350 * '2' - align to word boundary
5351 * '3' - align to doubleword boundary
5352 * '4' - align to quadword boundary
5353 * '5' - align to 32 byte boundary
5354 * '6' - align to 64 byte boundary
5355 *
5356 */
5357
5358void
98027b10 5359ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5360{
99a814a1 5361 /* Strip out the section name. */
252b5132
RH		 5362 char *section_name;
5363 char c;
5364 char *name;
5365 unsigned int exp;
5366 flagword flags;
5367 segT sec;
5368 int align;
5369
d02603dc 5370 c = get_symbol_name (&section_name);
252b5132
RH		 5371
5372 name = xmalloc (input_line_pointer - section_name + 1);
5373 strcpy (name, section_name);
5374
5375 *input_line_pointer = c;
5376
d02603dc 5377 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5378
5379 exp = 0;
5380 flags = SEC_NO_FLAGS;
5381
5382 if (strcmp (name, ".idata$2") == 0)
5383 {
5384 align = 0;
5385 }
5386 else if (strcmp (name, ".idata$3") == 0)
5387 {
5388 align = 0;
5389 }
5390 else if (strcmp (name, ".idata$4") == 0)
5391 {
5392 align = 2;
5393 }
5394 else if (strcmp (name, ".idata$5") == 0)
5395 {
5396 align = 2;
5397 }
5398 else if (strcmp (name, ".idata$6") == 0)
5399 {
5400 align = 1;
5401 }
5402 else
99a814a1
AM		 5403 /* Default alignment to 16 byte boundary. */
5404 align = 4;
252b5132
RH		 5405
5406 if (*input_line_pointer == ',')
5407 {
5408 ++input_line_pointer;
5409 SKIP_WHITESPACE ();
5410 if (*input_line_pointer != '"')
5411 exp = get_absolute_expression ();
5412 else
5413 {
5414 ++input_line_pointer;
5415 while (*input_line_pointer != '"'
5416 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5417 {
5418 switch (*input_line_pointer)
5419 {
5420 /* Section Contents */
5421 case 'a': /* unknown */
d6ed37ed 5422 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5423 break;
5424 case 'c': /* code section */
81d4177b 5425 flags |= SEC_CODE;
252b5132
RH		 5426 break;
5427 case 'd': /* section has initialized data */
5428 flags |= SEC_DATA;
5429 break;
5430 case 'u': /* section has uninitialized data */
5431 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5432 in winnt.h */
5433 flags |= SEC_ROM;
5434 break;
5435 case 'i': /* section contains directives (info) */
5436 /* FIXME: This is IMAGE_SCN_LNK_INFO
5437 in winnt.h */
5438 flags |= SEC_HAS_CONTENTS;
5439 break;
5440 case 'n': /* section can be discarded */
81d4177b 5441 flags &=~ SEC_LOAD;
252b5132
RH		 5442 break;
5443 case 'R': /* Remove section at link time */
5444 flags |= SEC_NEVER_LOAD;
5445 break;
8d452c78 5446#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5447 /* Section Protection */
5448 case 'r': /* section is readable */
5449 flags |= IMAGE_SCN_MEM_READ;
5450 break;
5451 case 'w': /* section is writeable */
5452 flags |= IMAGE_SCN_MEM_WRITE;
5453 break;
5454 case 'x': /* section is executable */
5455 flags |= IMAGE_SCN_MEM_EXECUTE;
5456 break;
5457 case 's': /* section is sharable */
5458 flags |= IMAGE_SCN_MEM_SHARED;
5459 break;
5460
5461 /* Section Alignment */
5462 case '0': /* align to byte boundary */
5463 flags |= IMAGE_SCN_ALIGN_1BYTES;
5464 align = 0;
5465 break;
5466 case '1': /* align to halfword boundary */
5467 flags |= IMAGE_SCN_ALIGN_2BYTES;
5468 align = 1;
5469 break;
5470 case '2': /* align to word boundary */
5471 flags |= IMAGE_SCN_ALIGN_4BYTES;
5472 align = 2;
5473 break;
5474 case '3': /* align to doubleword boundary */
5475 flags |= IMAGE_SCN_ALIGN_8BYTES;
5476 align = 3;
5477 break;
5478 case '4': /* align to quadword boundary */
5479 flags |= IMAGE_SCN_ALIGN_16BYTES;
5480 align = 4;
5481 break;
5482 case '5': /* align to 32 byte boundary */
5483 flags |= IMAGE_SCN_ALIGN_32BYTES;
5484 align = 5;
5485 break;
5486 case '6': /* align to 64 byte boundary */
5487 flags |= IMAGE_SCN_ALIGN_64BYTES;
5488 align = 6;
5489 break;
8d452c78 5490#endif
252b5132 5491 default:
99a814a1
AM		 5492 as_bad (_("unknown section attribute '%c'"),
5493 *input_line_pointer);
252b5132
RH		 5494 break;
5495 }
5496 ++input_line_pointer;
5497 }
5498 if (*input_line_pointer == '"')
5499 ++input_line_pointer;
5500 }
5501 }
5502
5503 sec = subseg_new (name, (subsegT) exp);
5504
99a814a1 5505 ppc_set_current_section (sec);
252b5132
RH		 5506
5507 if (flags != SEC_NO_FLAGS)
5508 {
5509 if (! bfd_set_section_flags (stdoutput, sec, flags))
5510 as_bad (_("error setting flags for \"%s\": %s"),
5511 bfd_section_name (stdoutput, sec),
5512 bfd_errmsg (bfd_get_error ()));
5513 }
5514
99a814a1 5515 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5516}
5517
5518static void
98027b10 5519ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5520{
5521 char *name;
5522 char endc;
5523 symbolS *ext_sym;
5524
d02603dc 5525 endc = get_symbol_name (&name);
252b5132
RH		 5526
5527 ext_sym = symbol_find_or_make (name);
5528
d02603dc 5529 (void) restore_line_pointer (endc);
252b5132
RH		 5530
5531 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5532 SF_SET_FUNCTION (ext_sym);
5533 SF_SET_PROCESS (ext_sym);
5534 coff_add_linesym (ext_sym);
5535
5536 demand_empty_rest_of_line ();
5537}
5538
5539static void
98027b10 5540ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5541{
5542 if (tocdata_section == 0)
5543 {
5544 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5545 /* FIXME: section flags won't work. */
252b5132
RH		 5546 bfd_set_section_flags (stdoutput, tocdata_section,
5547 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5548 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5549
5550 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5551 }
5552 else
5553 {
5554 rdata_section = subseg_new (".tocd", 0);
5555 }
5556
99a814a1 5557 ppc_set_current_section (tocdata_section);
252b5132
RH		 5558
5559 demand_empty_rest_of_line ();
5560}
5561
5562/* Don't adjust TOC relocs to use the section symbol. */
5563
5564int
98027b10 5565ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5566{
5567 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5568}
5569
5570#endif
5571\f
5572#ifdef OBJ_XCOFF
5573
5574/* XCOFF specific symbol and file handling. */
5575
5576/* Canonicalize the symbol name. We use the to force the suffix, if
5577 any, to use square brackets, and to be in upper case. */
5578
5579char *
98027b10 5580ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5581{
5582 char *s;
5583
5584 if (ppc_stab_symbol)
5585 return name;
5586
5587 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5588 ;
5589 if (*s != '\0')
5590 {
5591 char brac;
5592
5593 if (*s == '[')
5594 brac = ']';
5595 else
5596 {
5597 *s = '[';
5598 brac = '}';
5599 }
5600
5601 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5602 *s = TOUPPER (*s);
252b5132
RH		 5603
5604 if (*s == '\0' || s[1] != '\0')
5605 as_bad (_("bad symbol suffix"));
5606
5607 *s = ']';
5608 }
5609
5610 return name;
5611}
5612
5613/* Set the class of a symbol based on the suffix, if any. This is
5614 called whenever a new symbol is created. */
5615
5616void
98027b10 5617ppc_symbol_new_hook (symbolS *sym)
252b5132 5618{
809ffe0d 5619 struct ppc_tc_sy *tc;
252b5132
RH		 5620 const char *s;
5621
809ffe0d
ILT		 5622 tc = symbol_get_tc (sym);
5623 tc->next = NULL;
5624 tc->output = 0;
96d56e9f 5625 tc->symbol_class = -1;
809ffe0d
ILT		 5626 tc->real_name = NULL;
5627 tc->subseg = 0;
5628 tc->align = 0;
85645aed
TG		 5629 tc->u.size = NULL;
5630 tc->u.dw = NULL;
809ffe0d 5631 tc->within = NULL;
252b5132
RH		 5632
5633 if (ppc_stab_symbol)
5634 return;
5635
5636 s = strchr (S_GET_NAME (sym), '[');
5637 if (s == (const char *) NULL)
5638 {
5639 /* There is no suffix. */
5640 return;
5641 }
5642
5643 ++s;
5644
5645 switch (s[0])
5646 {
5647 case 'B':
5648 if (strcmp (s, "BS]") == 0)
96d56e9f 5649 tc->symbol_class = XMC_BS;
252b5132
RH		 5650 break;
5651 case 'D':
5652 if (strcmp (s, "DB]") == 0)
96d56e9f 5653 tc->symbol_class = XMC_DB;
252b5132 5654 else if (strcmp (s, "DS]") == 0)
96d56e9f 5655 tc->symbol_class = XMC_DS;
252b5132
RH		 5656 break;
5657 case 'G':
5658 if (strcmp (s, "GL]") == 0)
96d56e9f 5659 tc->symbol_class = XMC_GL;
252b5132
RH		 5660 break;
5661 case 'P':
5662 if (strcmp (s, "PR]") == 0)
96d56e9f 5663 tc->symbol_class = XMC_PR;
252b5132
RH		 5664 break;
5665 case 'R':
5666 if (strcmp (s, "RO]") == 0)
96d56e9f 5667 tc->symbol_class = XMC_RO;
252b5132 5668 else if (strcmp (s, "RW]") == 0)
96d56e9f 5669 tc->symbol_class = XMC_RW;
252b5132
RH		 5670 break;
5671 case 'S':
5672 if (strcmp (s, "SV]") == 0)
96d56e9f 5673 tc->symbol_class = XMC_SV;
252b5132
RH		 5674 break;
5675 case 'T':
5676 if (strcmp (s, "TC]") == 0)
96d56e9f 5677 tc->symbol_class = XMC_TC;
252b5132 5678 else if (strcmp (s, "TI]") == 0)
96d56e9f 5679 tc->symbol_class = XMC_TI;
252b5132 5680 else if (strcmp (s, "TB]") == 0)
96d56e9f 5681 tc->symbol_class = XMC_TB;
252b5132 5682 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5683 tc->symbol_class = XMC_TC0;
252b5132
RH		 5684 break;
5685 case 'U':
5686 if (strcmp (s, "UA]") == 0)
96d56e9f 5687 tc->symbol_class = XMC_UA;
252b5132 5688 else if (strcmp (s, "UC]") == 0)
96d56e9f 5689 tc->symbol_class = XMC_UC;
252b5132
RH		 5690 break;
5691 case 'X':
5692 if (strcmp (s, "XO]") == 0)
96d56e9f 5693 tc->symbol_class = XMC_XO;
252b5132
RH		 5694 break;
5695 }
5696
96d56e9f 5697 if (tc->symbol_class == -1)
d6ed37ed 5698 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5699}
5700
5701/* Set the class of a label based on where it is defined. This
5702 handles symbols without suffixes. Also, move the symbol so that it
5703 follows the csect symbol. */
5704
5705void
98027b10 5706ppc_frob_label (symbolS *sym)
252b5132
RH		 5707{
5708 if (ppc_current_csect != (symbolS *) NULL)
5709 {
96d56e9f
NC		 5710 if (symbol_get_tc (sym)->symbol_class == -1)
5711 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5712
5713 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5714 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5715 &symbol_rootP, &symbol_lastP);
5716 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5717 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5718 }
07a53e5c
RH		 5719
5720#ifdef OBJ_ELF
5721 dwarf2_emit_label (sym);
5722#endif
252b5132
RH		 5723}
5724
5725/* This variable is set by ppc_frob_symbol if any absolute symbols are
5726 seen. It tells ppc_adjust_symtab whether it needs to look through
5727 the symbols. */
5728
b34976b6 5729static bfd_boolean ppc_saw_abs;
252b5132
RH		 5730
5731/* Change the name of a symbol just before writing it out. Set the
5732 real name if the .rename pseudo-op was used. Otherwise, remove any
5733 class suffix. Return 1 if the symbol should not be included in the
5734 symbol table. */
5735
5736int
98027b10 5737ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5738{
5739 static symbolS *ppc_last_function;
5740 static symbolS *set_end;
5741
5742 /* Discard symbols that should not be included in the output symbol
5743 table. */
809ffe0d
ILT		 5744 if (! symbol_used_in_reloc_p (sym)
5745 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5746 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5747 && ! symbol_get_tc (sym)->output
252b5132
RH		 5748 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5749 return 1;
5750
a161fe53
AM		 5751 /* This one will disappear anyway. Don't make a csect sym for it. */
5752 if (sym == abs_section_sym)
5753 return 1;
5754
809ffe0d
ILT		 5755 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5756 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5757 else
5758 {
5759 const char *name;
5760 const char *s;
5761
5762 name = S_GET_NAME (sym);
5763 s = strchr (name, '[');
5764 if (s != (char *) NULL)
5765 {
5766 unsigned int len;
5767 char *snew;
5768
5769 len = s - name;
5770 snew = xmalloc (len + 1);
5771 memcpy (snew, name, len);
5772 snew[len] = '\0';
5773
5774 S_SET_NAME (sym, snew);
5775 }
5776 }
5777
5778 if (set_end != (symbolS *) NULL)
5779 {
5780 SA_SET_SYM_ENDNDX (set_end, sym);
5781 set_end = NULL;
5782 }
5783
5784 if (SF_GET_FUNCTION (sym))
5785 {
5786 if (ppc_last_function != (symbolS *) NULL)
5787 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5788 ppc_last_function = sym;
85645aed 5789 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5790 {
85645aed 5791 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5792 SA_SET_SYM_FSIZE (sym,
85645aed 5793 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5794 }
5795 }
5796 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5797 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5798 {
5799 if (ppc_last_function == (symbolS *) NULL)
5800 as_bad (_(".ef with no preceding .function"));
5801 else
5802 {
5803 set_end = ppc_last_function;
5804 ppc_last_function = NULL;
5805
5806 /* We don't have a C_EFCN symbol, but we need to force the
5807 COFF backend to believe that it has seen one. */
5808 coff_last_function = NULL;
5809 }
5810 }
5811
670ec21d 5812 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5813 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5814 && S_GET_STORAGE_CLASS (sym) != C_FILE
5815 && S_GET_STORAGE_CLASS (sym) != C_FCN
5816 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5817 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5818 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5819 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5820 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5821 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5822 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5823
5824 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5825 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5826 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5827 {
5828 int i;
5829 union internal_auxent *a;
5830
5831 /* Create a csect aux. */
5832 i = S_GET_NUMBER_AUXILIARY (sym);
5833 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5834 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5835 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5836 {
5837 /* This is the TOC table. */
5838 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5839 a->x_csect.x_scnlen.l = 0;
5840 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5841 }
809ffe0d 5842 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5843 {
5844 /* This is a csect symbol. x_scnlen is the size of the
5845 csect. */
809ffe0d 5846 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5847 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5848 S_GET_SEGMENT (sym))
5849 - S_GET_VALUE (sym));
5850 else
5851 {
6386f3a7 5852 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5853 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5854 - S_GET_VALUE (sym));
5855 }
809ffe0d 5856 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5857 }
5858 else if (S_GET_SEGMENT (sym) == bss_section)
5859 {
5860 /* This is a common symbol. */
809ffe0d
ILT		 5861 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5862 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5863 if (S_IS_EXTERNAL (sym))
96d56e9f 5864 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5865 else
96d56e9f 5866 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5867 }
5868 else if (S_GET_SEGMENT (sym) == absolute_section)
5869 {
5870 /* This is an absolute symbol. The csect will be created by
99a814a1 5871 ppc_adjust_symtab. */
b34976b6 5872 ppc_saw_abs = TRUE;
252b5132 5873 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5874 if (symbol_get_tc (sym)->symbol_class == -1)
5875 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5876 }
5877 else if (! S_IS_DEFINED (sym))
5878 {
5879 /* This is an external symbol. */
5880 a->x_csect.x_scnlen.l = 0;
5881 a->x_csect.x_smtyp = XTY_ER;
5882 }
96d56e9f 5883 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5884 {
5885 symbolS *next;
5886
5887 /* This is a TOC definition. x_scnlen is the size of the
5888 TOC entry. */
5889 next = symbol_next (sym);
96d56e9f 5890 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5891 next = symbol_next (next);
5892 if (next == (symbolS *) NULL
96d56e9f 5893 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5894 {
5895 if (ppc_after_toc_frag == (fragS *) NULL)
5896 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5897 data_section)
5898 - S_GET_VALUE (sym));
5899 else
5900 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5901 - S_GET_VALUE (sym));
5902 }
5903 else
5904 {
6386f3a7 5905 resolve_symbol_value (next);
252b5132
RH		 5906 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5907 - S_GET_VALUE (sym));
5908 }
5909 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5910 }
5911 else
5912 {
5913 symbolS *csect;
5914
5915 /* This is a normal symbol definition. x_scnlen is the
5916 symbol index of the containing csect. */
5917 if (S_GET_SEGMENT (sym) == text_section)
5918 csect = ppc_text_csects;
5919 else if (S_GET_SEGMENT (sym) == data_section)
5920 csect = ppc_data_csects;
5921 else
5922 abort ();
5923
5924 /* Skip the initial dummy symbol. */
809ffe0d 5925 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5926
5927 if (csect == (symbolS *) NULL)
5928 {
5929 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5930 a->x_csect.x_scnlen.l = 0;
5931 }
5932 else
5933 {
809ffe0d 5934 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5935 {
6386f3a7 5936 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5937 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5938 > S_GET_VALUE (sym))
252b5132 5939 break;
809ffe0d 5940 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5941 }
5942
809ffe0d
ILT		 5943 a->x_csect.x_scnlen.p =
5944 coffsymbol (symbol_get_bfdsym (csect))->native;
5945 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5946 1;
252b5132
RH		 5947 }
5948 a->x_csect.x_smtyp = XTY_LD;
5949 }
81d4177b 5950
252b5132
RH		 5951 a->x_csect.x_parmhash = 0;
5952 a->x_csect.x_snhash = 0;
96d56e9f 5953 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5954 a->x_csect.x_smclas = XMC_PR;
5955 else
96d56e9f 5956 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5957 a->x_csect.x_stab = 0;
5958 a->x_csect.x_snstab = 0;
5959
5960 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5961 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5962 }
5963 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5964 {
5965 /* We want the value to be the symbol index of the referenced
5966 csect symbol. BFD will do that for us if we set the right
5967 flags. */
b782de16
AM		 5968 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5969 combined_entry_type *c = coffsymbol (bsym)->native;
5970
5971 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5972 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5973 }
5974 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5975 {
5976 symbolS *block;
c734e7e3 5977 valueT base;
252b5132 5978
809ffe0d 5979 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5980 if (block)
5981 {
5982 /* The value is the offset from the enclosing csect. */
5983 symbolS *csect;
5984
5985 csect = symbol_get_tc (block)->within;
5986 resolve_symbol_value (csect);
5987 base = S_GET_VALUE (csect);
5988 }
5989 else
5990 base = 0;
5991
5992 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5993 }
5994 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5995 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5996 {
5997 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5998 BFD will do that for us if we set the right flags. We have
5999 already set the value correctly. */
809ffe0d 6000 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6001 }
6002
6003 return 0;
6004}
6005
6006/* Adjust the symbol table. This creates csect symbols for all
6007 absolute symbols. */
6008
6009void
98027b10 6010ppc_adjust_symtab (void)
252b5132
RH		 6011{
6012 symbolS *sym;
6013
6014 if (! ppc_saw_abs)
6015 return;
6016
6017 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6018 {
6019 symbolS *csect;
6020 int i;
6021 union internal_auxent *a;
6022
6023 if (S_GET_SEGMENT (sym) != absolute_section)
6024 continue;
6025
6026 csect = symbol_create (".abs[XO]", absolute_section,
6027 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6028 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6029 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6030 i = S_GET_NUMBER_AUXILIARY (csect);
6031 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6032 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6033 a->x_csect.x_scnlen.l = 0;
6034 a->x_csect.x_smtyp = XTY_SD;
6035 a->x_csect.x_parmhash = 0;
6036 a->x_csect.x_snhash = 0;
6037 a->x_csect.x_smclas = XMC_XO;
6038 a->x_csect.x_stab = 0;
6039 a->x_csect.x_snstab = 0;
6040
6041 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6042
6043 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6044 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6045 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6046 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6047 }
6048
b34976b6 6049 ppc_saw_abs = FALSE;
252b5132
RH		 6050}
6051
6052/* Set the VMA for a section. This is called on all the sections in
6053 turn. */
6054
6055void
98027b10 6056ppc_frob_section (asection *sec)
252b5132 6057{
931e13a6 6058 static bfd_vma vma = 0;
252b5132 6059
85645aed
TG		 6060 /* Dwarf sections start at 0. */
6061 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6062 return;
6063
931e13a6 6064 vma = md_section_align (sec, vma);
252b5132
RH		 6065 bfd_set_section_vma (stdoutput, sec, vma);
6066 vma += bfd_section_size (stdoutput, sec);
6067}
6068
6069#endif /* OBJ_XCOFF */
6070\f
252b5132 6071char *
98027b10 6072md_atof (int type, char *litp, int *sizep)
252b5132 6073{
499ac353 6074 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6075}
6076
6077/* Write a value out to the object file, using the appropriate
6078 endianness. */
6079
6080void
98027b10 6081md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6082{
6083 if (target_big_endian)
6084 number_to_chars_bigendian (buf, val, n);
6085 else
6086 number_to_chars_littleendian (buf, val, n);
6087}
6088
6089/* Align a section (I don't know why this is machine dependent). */
6090
6091valueT
3aeeedbb 6092md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6093{
3aeeedbb
AM		 6094#ifdef OBJ_ELF
6095 return addr;
6096#else
252b5132
RH		 6097 int align = bfd_get_section_alignment (stdoutput, seg);
6098
8d3842cd 6099 return ((addr + (1 << align) - 1) & -(1 << align));
3aeeedbb 6100#endif
252b5132
RH		 6101}
6102
6103/* We don't have any form of relaxing. */
6104
6105int
98027b10
AM		 6106md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6107 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6108{
6109 abort ();
6110 return 0;
6111}
6112
6113/* Convert a machine dependent frag. We never generate these. */
6114
6115void
98027b10
AM		 6116md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6117 asection *sec ATTRIBUTE_UNUSED,
6118 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6119{
6120 abort ();
6121}
6122
6123/* We have no need to default values of symbols. */
6124
252b5132 6125symbolS *
98027b10 6126md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6127{
6128 return 0;
6129}
6130\f
6131/* Functions concerning relocs. */
6132
6133/* The location from which a PC relative jump should be calculated,
6134 given a PC relative reloc. */
6135
6136long
98027b10 6137md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6138{
6139 return fixp->fx_frag->fr_address + fixp->fx_where;
6140}
6141
6142#ifdef OBJ_XCOFF
6143
6144/* This is called to see whether a fixup should be adjusted to use a
6145 section symbol. We take the opportunity to change a fixup against
6146 a symbol in the TOC subsegment into a reloc against the
6147 corresponding .tc symbol. */
6148
6149int
98027b10 6150ppc_fix_adjustable (fixS *fix)
252b5132 6151{
b782de16
AM		 6152 valueT val = resolve_symbol_value (fix->fx_addsy);
6153 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6154 TC_SYMFIELD_TYPE *tc;
6155
6156 if (symseg == absolute_section)
6157 return 0;
252b5132 6158
85645aed
TG		 6159 /* Always adjust symbols in debugging sections. */
6160 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6161 return 1;
6162
252b5132 6163 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6164 && fix->fx_addsy != ppc_toc_csect
b782de16 6165 && symseg == data_section
252b5132
RH		 6166 && val >= ppc_toc_frag->fr_address
6167 && (ppc_after_toc_frag == (fragS *) NULL
6168 || val < ppc_after_toc_frag->fr_address))
6169 {
6170 symbolS *sy;
6171
6172 for (sy = symbol_next (ppc_toc_csect);
6173 sy != (symbolS *) NULL;
6174 sy = symbol_next (sy))
6175 {
b782de16
AM		 6176 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6177
96d56e9f 6178 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6179 continue;
96d56e9f 6180 if (sy_tc->symbol_class != XMC_TC)
252b5132 6181 break;
b782de16 6182 if (val == resolve_symbol_value (sy))
252b5132
RH		 6183 {
6184 fix->fx_addsy = sy;
6185 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6186 return 0;
6187 }
6188 }
6189
6190 as_bad_where (fix->fx_file, fix->fx_line,
6191 _("symbol in .toc does not match any .tc"));
6192 }
6193
6194 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6195 tc = symbol_get_tc (fix->fx_addsy);
6196 if (tc->subseg == 0
96d56e9f
NC		 6197 && tc->symbol_class != XMC_TC0
6198 && tc->symbol_class != XMC_TC
b782de16 6199 && symseg != bss_section
252b5132 6200 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6201 && (symseg != data_section
252b5132
RH		 6202 || ppc_toc_csect == NULL
6203 || val < ppc_toc_frag->fr_address
6204 || (ppc_after_toc_frag != NULL
6205 && val >= ppc_after_toc_frag->fr_address)))
6206 {
2fb4b302 6207 symbolS *csect = tc->within;
252b5132 6208
2fb4b302
TG		 6209 /* If the symbol was not declared by a label (eg: a section symbol),
6210 use the section instead of the csect. This doesn't happen in
6211 normal AIX assembly code. */
6212 if (csect == NULL)
6213 csect = seg_info (symseg)->sym;
252b5132 6214
2fb4b302
TG		 6215 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6216 fix->fx_addsy = csect;
252b5132 6217
b782de16 6218 return 0;
252b5132
RH		 6219 }
6220
6221 /* Adjust a reloc against a .lcomm symbol to be against the base
6222 .lcomm. */
b782de16 6223 if (symseg == bss_section
252b5132
RH		 6224 && ! S_IS_EXTERNAL (fix->fx_addsy))
6225 {
b782de16
AM		 6226 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6227
6228 fix->fx_offset += val - resolve_symbol_value (sy);
6229 fix->fx_addsy = sy;
252b5132
RH		 6230 }
6231
6232 return 0;
6233}
6234
6235/* A reloc from one csect to another must be kept. The assembler
6236 will, of course, keep relocs between sections, and it will keep
6237 absolute relocs, but we need to force it to keep PC relative relocs
6238 between two csects in the same section. */
6239
6240int
98027b10 6241ppc_force_relocation (fixS *fix)
252b5132
RH		 6242{
6243 /* At this point fix->fx_addsy should already have been converted to
6244 a csect symbol. If the csect does not include the fragment, then
6245 we need to force the relocation. */
6246 if (fix->fx_pcrel
6247 && fix->fx_addsy != NULL
809ffe0d
ILT		 6248 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6249 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6250 > fix->fx_frag->fr_address)
6251 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6252 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6253 <= fix->fx_frag->fr_address))))
6254 return 1;
6255
ae6063d4 6256 return generic_force_reloc (fix);
252b5132
RH		 6257}
6258
2fb4b302
TG		 6259void
6260ppc_new_dot_label (symbolS *sym)
6261{
6262 /* Anchor this label to the current csect for relocations. */
6263 symbol_get_tc (sym)->within = ppc_current_csect;
6264}
6265
252b5132
RH		 6266#endif /* OBJ_XCOFF */
6267
0baf16f2 6268#ifdef OBJ_ELF
a161fe53
AM		 6269/* If this function returns non-zero, it guarantees that a relocation
6270 will be emitted for a fixup. */
6271
6272int
98027b10 6273ppc_force_relocation (fixS *fix)
a161fe53
AM		 6274{
6275 /* Branch prediction relocations must force a relocation, as must
6276 the vtable description relocs. */
6277 switch (fix->fx_r_type)
6278 {
6279 case BFD_RELOC_PPC_B16_BRTAKEN:
6280 case BFD_RELOC_PPC_B16_BRNTAKEN:
6281 case BFD_RELOC_PPC_BA16_BRTAKEN:
6282 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6283 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6284 case BFD_RELOC_PPC64_TOC:
a161fe53 6285 return 1;
6911b7dc
AM		 6286 case BFD_RELOC_PPC_B26:
6287 case BFD_RELOC_PPC_BA26:
6288 case BFD_RELOC_PPC_B16:
6289 case BFD_RELOC_PPC_BA16:
6290 /* All branch fixups targeting a localentry symbol must
6291 force a relocation. */
6292 if (fix->fx_addsy)
6293 {
6294 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6295 elf_symbol_type *elfsym
6296 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6297 gas_assert (elfsym);
6298 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6299 return 1;
6300 }
6301 break;
a161fe53
AM		 6302 default:
6303 break;
6304 }
6305
cdba85ec
AM		 6306 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6307 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6308 return 1;
6309
ae6063d4 6310 return generic_force_reloc (fix);
a161fe53
AM		 6311}
6312
0baf16f2 6313int
98027b10 6314ppc_fix_adjustable (fixS *fix)
252b5132 6315{
6911b7dc
AM		 6316 switch (fix->fx_r_type)
6317 {
6318 /* All branch fixups targeting a localentry symbol must
6319 continue using the symbol. */
6320 case BFD_RELOC_PPC_B26:
6321 case BFD_RELOC_PPC_BA26:
6322 case BFD_RELOC_PPC_B16:
6323 case BFD_RELOC_PPC_BA16:
6324 case BFD_RELOC_PPC_B16_BRTAKEN:
6325 case BFD_RELOC_PPC_B16_BRNTAKEN:
6326 case BFD_RELOC_PPC_BA16_BRTAKEN:
6327 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6328 if (fix->fx_addsy)
6329 {
6330 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6331 elf_symbol_type *elfsym
6332 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6333 gas_assert (elfsym);
6334 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6335 return 0;
6336 }
6337 break;
6338 default:
6339 break;
6340 }
6341
0baf16f2
AM		 6342 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6343 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6344 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6345 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6346 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6347 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6348 && fix->fx_r_type != BFD_RELOC_GPREL16
6349 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6350 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6351 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6352 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6353}
0baf16f2 6354#endif
252b5132 6355
b9c361e0
JL		 6356void
6357ppc_frag_check (struct frag *fragP)
6358{
6359 if (!fragP->has_code)
6360 return;
6361
6362 if (ppc_mach() == bfd_mach_ppc_vle)
6363 {
6364 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6365 as_bad (_("instruction address is not a multiple of 2"));
6366 }
6367 else
6368 {
6369 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6370 as_bad (_("instruction address is not a multiple of 4"));
6371 }
6372}
6373
3aeeedbb
AM		 6374/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6375 rs_align_code frag. */
6376
6377void
6378ppc_handle_align (struct frag *fragP)
6379{
6380 valueT count = (fragP->fr_next->fr_address
6381 - (fragP->fr_address + fragP->fr_fix));
6382
b9c361e0
JL		 6383 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6384 {
6385 char *dest = fragP->fr_literal + fragP->fr_fix;
6386
6387 fragP->fr_var = 2;
6388 md_number_to_chars (dest, 0x4400, 2);
6389 }
6390 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6391 {
6392 char *dest = fragP->fr_literal + fragP->fr_fix;
6393
6394 fragP->fr_var = 4;
cef4f754
AM		 6395
6396 if (count > 4 * nop_limit && count < 0x2000000)
6397 {
6398 struct frag *rest;
6399
6400 /* Make a branch, then follow with nops. Insert another
6401 frag to handle the nops. */
6402 md_number_to_chars (dest, 0x48000000 + count, 4);
6403 count -= 4;
6404 if (count == 0)
6405 return;
6406
6407 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6408 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6409 fragP->fr_next = rest;
6410 fragP = rest;
6411 rest->fr_address += rest->fr_fix + 4;
6412 rest->fr_fix = 0;
6413 /* If we leave the next frag as rs_align_code we'll come here
6414 again, resulting in a bunch of branches rather than a
6415 branch followed by nops. */
6416 rest->fr_type = rs_align;
6417 dest = rest->fr_literal;
6418 }
6419
3aeeedbb
AM		 6420 md_number_to_chars (dest, 0x60000000, 4);
6421
42240548 6422 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1 6423 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
a680de9a
PB		 6424 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6425 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
3aeeedbb 6426 {
a680de9a
PB		 6427 /* For power6, power7, power8 and power9, we want the last nop to be
6428 a group terminating one. Do this by inserting an rs_fill frag
6429 immediately after this one, with its address set to the last nop
6430 location. This will automatically reduce the number of nops in
6431 the current frag by one. */
3aeeedbb
AM		 6432 if (count > 4)
6433 {
6434 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6435
6436 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6437 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6438 group_nop->fr_fix = 0;
6439 group_nop->fr_offset = 1;
6440 group_nop->fr_type = rs_fill;
6441 fragP->fr_next = group_nop;
6442 dest = group_nop->fr_literal;
6443 }
6444
5817ffd1 6445 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
a680de9a
PB		 6446 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6447 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
aea77599
AM		 6448 {
6449 if (ppc_cpu & PPC_OPCODE_E500MC)
6450 /* e500mc group terminating nop: "ori 0,0,0". */
6451 md_number_to_chars (dest, 0x60000000, 4);
6452 else
a680de9a 6453 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6454 md_number_to_chars (dest, 0x60420000, 4);
6455 }
42240548
PB		 6456 else
6457 /* power6 group terminating nop: "ori 1,1,0". */
6458 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6459 }
6460 }
6461}
6462
252b5132 6463/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6464 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6465
94f592af 6466void
62ebcb5c 6467md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6468{
94f592af 6469 valueT value = * valP;
5656a981 6470 offsetT fieldval;
a680de9a 6471 unsigned long insn = 0;
5656a981 6472 const struct powerpc_operand *operand;
252b5132
RH		 6473
6474#ifdef OBJ_ELF
94f592af 6475 if (fixP->fx_addsy != NULL)
252b5132 6476 {
a161fe53 6477 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6478 if (fixP->fx_pcrel)
6479 value += fixP->fx_frag->fr_address + fixP->fx_where;
a680de9a
PB		 6480
6481 if (fixP->fx_addsy == abs_section_sym)
6482 fixP->fx_done = 1;
252b5132
RH		 6483 }
6484 else
94f592af 6485 fixP->fx_done = 1;
252b5132 6486#else
a161fe53 6487 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6488 the symbol values. If we are doing this relocation the code in
6489 write.c is going to call bfd_install_relocation, which is also
6490 going to use the symbol value. That means that if the reloc is
6491 fully resolved we want to use *valP since bfd_install_relocation is
6492 not being used.
9f0eb232
RS		 6493 However, if the reloc is not fully resolved we do not want to
6494 use *valP, and must use fx_offset instead. If the relocation
6495 is PC-relative, we then need to re-apply md_pcrel_from_section
6496 to this new relocation value. */
94f592af
NC		 6497 if (fixP->fx_addsy == (symbolS *) NULL)
6498 fixP->fx_done = 1;
6499
252b5132 6500 else
9f0eb232
RS		 6501 {
6502 value = fixP->fx_offset;
6503 if (fixP->fx_pcrel)
6504 value -= md_pcrel_from_section (fixP, seg);
6505 }
a161fe53
AM		 6506#endif
6507
6508 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6509 {
a161fe53
AM		 6510 /* We can't actually support subtracting a symbol. */
6511 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6512 }
252b5132 6513
5656a981 6514 operand = NULL;
3b8b57a9 6515 if (fixP->fx_pcrel_adjust != 0)
252b5132 6516 {
5656a981 6517 /* This is a fixup on an instruction. */
3b8b57a9 6518 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6519
5656a981 6520 operand = &powerpc_operands[opindex];
252b5132 6521#ifdef OBJ_XCOFF
0baf16f2
AM		 6522 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6523 does not generate a reloc. It uses the offset of `sym' within its
6524 csect. Other usages, such as `.long sym', generate relocs. This
6525 is the documented behaviour of non-TOC symbols. */
252b5132 6526 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6527 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6528 && operand->shift == 0
2b3c4602 6529 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6530 && fixP->fx_addsy != NULL
6531 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6532 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6533 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6534 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6535 {
94f592af
NC		 6536 value = fixP->fx_offset;
6537 fixP->fx_done = 1;
252b5132 6538 }
ac21e7da
TG		 6539
6540 /* During parsing of instructions, a TOC16 reloc is generated for
6541 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6542 in the toc. But at parse time, SYM may be not yet defined, so
6543 check again here. */
6544 if (fixP->fx_r_type == BFD_RELOC_16
6545 && fixP->fx_addsy != NULL
6546 && ppc_is_toc_sym (fixP->fx_addsy))
6547 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6548#endif
5656a981
AM		 6549 }
6550
6551 /* Calculate value to be stored in field. */
6552 fieldval = value;
6553 switch (fixP->fx_r_type)
6554 {
1ec2d25e 6555#ifdef OBJ_ELF
5656a981
AM		 6556 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6557 case BFD_RELOC_PPC_VLE_LO16A:
6558 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6559#endif
5656a981
AM		 6560 case BFD_RELOC_LO16:
6561 case BFD_RELOC_LO16_PCREL:
6562 fieldval = value & 0xffff;
6563 sign_extend_16:
6564 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6565 fieldval = SEX16 (fieldval);
5656a981
AM		 6566 fixP->fx_no_overflow = 1;
6567 break;
3c9d25f4 6568
f9c6b907
AM		 6569 case BFD_RELOC_HI16:
6570 case BFD_RELOC_HI16_PCREL:
5656a981 6571#ifdef OBJ_ELF
f9c6b907
AM		 6572 if (REPORT_OVERFLOW_HI && ppc_obj64)
6573 {
6574 fieldval = value >> 16;
6575 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6576 {
6577 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6578 fieldval = ((valueT) fieldval ^ sign) - sign;
6579 }
6580 break;
6581 }
6582 /* Fall thru */
6583
5656a981
AM		 6584 case BFD_RELOC_PPC_VLE_HI16A:
6585 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6586 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6587#endif
5656a981
AM		 6588 fieldval = PPC_HI (value);
6589 goto sign_extend_16;
0baf16f2 6590
f9c6b907
AM		 6591 case BFD_RELOC_HI16_S:
6592 case BFD_RELOC_HI16_S_PCREL:
a680de9a 6593 case BFD_RELOC_PPC_REL16DX_HA:
5656a981 6594#ifdef OBJ_ELF
f9c6b907
AM		 6595 if (REPORT_OVERFLOW_HI && ppc_obj64)
6596 {
6597 fieldval = (value + 0x8000) >> 16;
6598 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6599 {
6600 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6601 fieldval = ((valueT) fieldval ^ sign) - sign;
6602 }
6603 break;
6604 }
6605 /* Fall thru */
6606
5656a981
AM		 6607 case BFD_RELOC_PPC_VLE_HA16A:
6608 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6609 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6610#endif
5656a981
AM		 6611 fieldval = PPC_HA (value);
6612 goto sign_extend_16;
0baf16f2 6613
3b8b57a9 6614#ifdef OBJ_ELF
5656a981
AM		 6615 case BFD_RELOC_PPC64_HIGHER:
6616 fieldval = PPC_HIGHER (value);
6617 goto sign_extend_16;
252b5132 6618
5656a981
AM		 6619 case BFD_RELOC_PPC64_HIGHER_S:
6620 fieldval = PPC_HIGHERA (value);
6621 goto sign_extend_16;
0baf16f2 6622
5656a981
AM		 6623 case BFD_RELOC_PPC64_HIGHEST:
6624 fieldval = PPC_HIGHEST (value);
6625 goto sign_extend_16;
0baf16f2 6626
5656a981
AM		 6627 case BFD_RELOC_PPC64_HIGHEST_S:
6628 fieldval = PPC_HIGHESTA (value);
6629 goto sign_extend_16;
6630#endif
6631
6632 default:
6633 break;
6634 }
6635
6636 if (operand != NULL)
6637 {
6638 /* Handle relocs in an insn. */
6639 char *where;
0baf16f2 6640
5656a981
AM		 6641 switch (fixP->fx_r_type)
6642 {
7fa9fcb6 6643#ifdef OBJ_ELF
3b8b57a9
AM		 6644 /* The following relocs can't be calculated by the assembler.
6645 Leave the field zero. */
cdba85ec
AM		 6646 case BFD_RELOC_PPC_TPREL16:
6647 case BFD_RELOC_PPC_TPREL16_LO:
6648 case BFD_RELOC_PPC_TPREL16_HI:
6649 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6650 case BFD_RELOC_PPC_DTPREL16:
6651 case BFD_RELOC_PPC_DTPREL16_LO:
6652 case BFD_RELOC_PPC_DTPREL16_HI:
6653 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6654 case BFD_RELOC_PPC_GOT_TLSGD16:
6655 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6656 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6657 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6658 case BFD_RELOC_PPC_GOT_TLSLD16:
6659 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6660 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6661 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6662 case BFD_RELOC_PPC_GOT_TPREL16:
6663 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6664 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6665 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6666 case BFD_RELOC_PPC_GOT_DTPREL16:
6667 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6668 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6669 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6670 case BFD_RELOC_PPC64_TPREL16_DS:
6671 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6672 case BFD_RELOC_PPC64_TPREL16_HIGH:
6673 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6674 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6675 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6676 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6677 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6678 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6679 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6680 case BFD_RELOC_PPC64_DTPREL16_DS:
6681 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6682 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6683 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6684 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6685 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6686 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6687 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6688 fieldval = 0;
cdba85ec 6689 break;
3b8b57a9
AM		 6690
6691 /* These also should leave the field zero for the same
6692 reason. Note that older versions of gas wrote values
6693 here. If we want to go back to the old behaviour, then
6694 all _LO and _LO_DS cases will need to be treated like
6695 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6696 case BFD_RELOC_16_GOTOFF:
6697 case BFD_RELOC_LO16_GOTOFF:
6698 case BFD_RELOC_HI16_GOTOFF:
6699 case BFD_RELOC_HI16_S_GOTOFF:
6700 case BFD_RELOC_LO16_PLTOFF:
6701 case BFD_RELOC_HI16_PLTOFF:
6702 case BFD_RELOC_HI16_S_PLTOFF:
6703 case BFD_RELOC_GPREL16:
6704 case BFD_RELOC_16_BASEREL:
6705 case BFD_RELOC_LO16_BASEREL:
6706 case BFD_RELOC_HI16_BASEREL:
6707 case BFD_RELOC_HI16_S_BASEREL:
6708 case BFD_RELOC_PPC_TOC16:
6709 case BFD_RELOC_PPC64_TOC16_LO:
6710 case BFD_RELOC_PPC64_TOC16_HI:
6711 case BFD_RELOC_PPC64_TOC16_HA:
6712 case BFD_RELOC_PPC64_PLTGOT16:
6713 case BFD_RELOC_PPC64_PLTGOT16_LO:
6714 case BFD_RELOC_PPC64_PLTGOT16_HI:
6715 case BFD_RELOC_PPC64_PLTGOT16_HA:
6716 case BFD_RELOC_PPC64_GOT16_DS:
6717 case BFD_RELOC_PPC64_GOT16_LO_DS:
6718 case BFD_RELOC_PPC64_PLT16_LO_DS:
6719 case BFD_RELOC_PPC64_SECTOFF_DS:
6720 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6721 case BFD_RELOC_PPC64_TOC16_DS:
6722 case BFD_RELOC_PPC64_TOC16_LO_DS:
6723 case BFD_RELOC_PPC64_PLTGOT16_DS:
6724 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6725 case BFD_RELOC_PPC_EMB_NADDR16:
6726 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6727 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6728 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6729 case BFD_RELOC_PPC_EMB_SDAI16:
6730 case BFD_RELOC_PPC_EMB_SDA2I16:
6731 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6732 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6733 case BFD_RELOC_PPC_EMB_MRKREF:
6734 case BFD_RELOC_PPC_EMB_RELSEC16:
6735 case BFD_RELOC_PPC_EMB_RELST_LO:
6736 case BFD_RELOC_PPC_EMB_RELST_HI:
6737 case BFD_RELOC_PPC_EMB_RELST_HA:
6738 case BFD_RELOC_PPC_EMB_BIT_FLD:
6739 case BFD_RELOC_PPC_EMB_RELSDA:
6740 case BFD_RELOC_PPC_VLE_SDA21:
6741 case BFD_RELOC_PPC_VLE_SDA21_LO:
6742 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6743 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6744 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6745 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6746 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6747 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6748 gas_assert (fixP->fx_addsy != NULL);
6749 /* Fall thru */
6750
6751 case BFD_RELOC_PPC_TLS:
6752 case BFD_RELOC_PPC_TLSGD:
6753 case BFD_RELOC_PPC_TLSLD:
6754 fieldval = 0;
3b8b57a9 6755 break;
7fa9fcb6
TG		 6756#endif
6757
6758#ifdef OBJ_XCOFF
6759 case BFD_RELOC_PPC_B16:
6760 /* Adjust the offset to the instruction boundary. */
6761 fieldval += 2;
6762 break;
6763#endif
252b5132 6764
f728387b
AM		 6765 case BFD_RELOC_VTABLE_INHERIT:
6766 case BFD_RELOC_VTABLE_ENTRY:
6767 case BFD_RELOC_PPC_DTPMOD:
6768 case BFD_RELOC_PPC_TPREL:
6769 case BFD_RELOC_PPC_DTPREL:
6770 case BFD_RELOC_PPC_COPY:
6771 case BFD_RELOC_PPC_GLOB_DAT:
6772 case BFD_RELOC_32_PLT_PCREL:
6773 case BFD_RELOC_PPC_EMB_NADDR32:
6774 case BFD_RELOC_PPC64_TOC:
6775 case BFD_RELOC_CTOR:
6776 case BFD_RELOC_32:
6777 case BFD_RELOC_32_PCREL:
6778 case BFD_RELOC_RVA:
6779 case BFD_RELOC_64:
6780 case BFD_RELOC_64_PCREL:
6781 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6782 as_bad_where (fixP->fx_file, fixP->fx_line,
6783 _("%s unsupported as instruction fixup"),
6784 bfd_get_reloc_code_name (fixP->fx_r_type));
6785 fixP->fx_done = 1;
6786 return;
6787
3b8b57a9 6788 default:
252b5132 6789 break;
3b8b57a9 6790 }
252b5132 6791
3b8b57a9
AM		 6792#ifdef OBJ_ELF
6793/* powerpc uses RELA style relocs, so if emitting a reloc the field
6794 contents can stay at zero. */
6795#define APPLY_RELOC fixP->fx_done
6796#else
6797#define APPLY_RELOC 1
6798#endif
6799 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6800 {
6801 /* Fetch the instruction, insert the fully resolved operand
6802 value, and stuff the instruction back again. */
6803 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6804 if (target_big_endian)
31a91399 6805 {
3b8b57a9
AM		 6806 if (fixP->fx_size == 4)
6807 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6808 else
3b8b57a9 6809 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6810 }
6811 else
3b8b57a9
AM		 6812 {
6813 if (fixP->fx_size == 4)
6814 insn = bfd_getl32 ((unsigned char *) where);
6815 else
6816 insn = bfd_getl16 ((unsigned char *) where);
6817 }
6818 insn = ppc_insert_operand (insn, operand, fieldval,
6819 fixP->tc_fix_data.ppc_cpu,
6820 fixP->fx_file, fixP->fx_line);
6821 if (target_big_endian)
6822 {
6823 if (fixP->fx_size == 4)
6824 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6825 else
6826 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6827 }
6828 else
6829 {
6830 if (fixP->fx_size == 4)
6831 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6832 else
6833 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6834 }
6835 }
6836
6837 if (fixP->fx_done)
6838 /* Nothing else to do here. */
6839 return;
6840
6841 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6842 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9
AM		 6843 {
6844 char *sfile;
6845 unsigned int sline;
6846
6847 /* Use expr_symbol_where to see if this is an expression
6848 symbol. */
6849 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6850 as_bad_where (fixP->fx_file, fixP->fx_line,
6851 _("unresolved expression that must be resolved"));
6852 else
6853 as_bad_where (fixP->fx_file, fixP->fx_line,
6854 _("unsupported relocation against %s"),
6855 S_GET_NAME (fixP->fx_addsy));
6856 fixP->fx_done = 1;
6857 return;
6858 }
6859 }
6860 else
6861 {
6862 /* Handle relocs in data. */
6863 switch (fixP->fx_r_type)
6864 {
252b5132 6865 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6866 if (fixP->fx_addsy
6867 && !S_IS_DEFINED (fixP->fx_addsy)
6868 && !S_IS_WEAK (fixP->fx_addsy))
6869 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6870 /* Fall thru */
252b5132
RH		 6871
6872 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6873 fixP->fx_done = 0;
252b5132
RH		 6874 break;
6875
0baf16f2 6876#ifdef OBJ_ELF
3b8b57a9
AM		 6877 /* These can appear with @l etc. in data. */
6878 case BFD_RELOC_LO16:
3b8b57a9 6879 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6880 case BFD_RELOC_HI16:
3b8b57a9 6881 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6882 case BFD_RELOC_HI16_S:
3b8b57a9 6883 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6884 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6885 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6886 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6887 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6888 case BFD_RELOC_PPC64_ADDR16_HIGH:
6889 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6890 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6891 break;
6892
6893 case BFD_RELOC_PPC_DTPMOD:
6894 case BFD_RELOC_PPC_TPREL:
6895 case BFD_RELOC_PPC_DTPREL:
6896 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6897 break;
6898
6899 /* Just punt all of these to the linker. */
6900 case BFD_RELOC_PPC_B16_BRTAKEN:
6901 case BFD_RELOC_PPC_B16_BRNTAKEN:
6902 case BFD_RELOC_16_GOTOFF:
6903 case BFD_RELOC_LO16_GOTOFF:
6904 case BFD_RELOC_HI16_GOTOFF:
6905 case BFD_RELOC_HI16_S_GOTOFF:
6906 case BFD_RELOC_LO16_PLTOFF:
6907 case BFD_RELOC_HI16_PLTOFF:
6908 case BFD_RELOC_HI16_S_PLTOFF:
6909 case BFD_RELOC_PPC_COPY:
6910 case BFD_RELOC_PPC_GLOB_DAT:
6911 case BFD_RELOC_16_BASEREL:
6912 case BFD_RELOC_LO16_BASEREL:
6913 case BFD_RELOC_HI16_BASEREL:
6914 case BFD_RELOC_HI16_S_BASEREL:
6915 case BFD_RELOC_PPC_TLS:
6916 case BFD_RELOC_PPC_DTPREL16_LO:
6917 case BFD_RELOC_PPC_DTPREL16_HI:
6918 case BFD_RELOC_PPC_DTPREL16_HA:
6919 case BFD_RELOC_PPC_TPREL16_LO:
6920 case BFD_RELOC_PPC_TPREL16_HI:
6921 case BFD_RELOC_PPC_TPREL16_HA:
6922 case BFD_RELOC_PPC_GOT_TLSGD16:
6923 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6924 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6925 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6926 case BFD_RELOC_PPC_GOT_TLSLD16:
6927 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6928 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6929 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6930 case BFD_RELOC_PPC_GOT_DTPREL16:
6931 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6932 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6933 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6934 case BFD_RELOC_PPC_GOT_TPREL16:
6935 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6936 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6937 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6938 case BFD_RELOC_24_PLT_PCREL:
6939 case BFD_RELOC_PPC_LOCAL24PC:
6940 case BFD_RELOC_32_PLT_PCREL:
6941 case BFD_RELOC_GPREL16:
6942 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6943 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6944 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6945 case BFD_RELOC_PPC_EMB_NADDR32:
6946 case BFD_RELOC_PPC_EMB_NADDR16:
6947 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6948 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6949 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6950 case BFD_RELOC_PPC_EMB_SDAI16:
6951 case BFD_RELOC_PPC_EMB_SDA2REL:
6952 case BFD_RELOC_PPC_EMB_SDA2I16:
6953 case BFD_RELOC_PPC_EMB_SDA21:
6954 case BFD_RELOC_PPC_VLE_SDA21_LO:
6955 case BFD_RELOC_PPC_EMB_MRKREF:
6956 case BFD_RELOC_PPC_EMB_RELSEC16:
6957 case BFD_RELOC_PPC_EMB_RELST_LO:
6958 case BFD_RELOC_PPC_EMB_RELST_HI:
6959 case BFD_RELOC_PPC_EMB_RELST_HA:
6960 case BFD_RELOC_PPC_EMB_BIT_FLD:
6961 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6962 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6963 case BFD_RELOC_PPC_TOC16:
6964 case BFD_RELOC_PPC64_TOC16_LO:
6965 case BFD_RELOC_PPC64_TOC16_HI:
6966 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6967 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6968 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6969 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6970 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6971 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6972 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6973 case BFD_RELOC_PPC64_TPREL16_HIGH:
6974 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6975 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6976 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6977 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6978 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6979 fixP->fx_done = 0;
0baf16f2 6980 break;
0baf16f2 6981#endif
3b8b57a9
AM		 6982
6983#ifdef OBJ_XCOFF
6984 case BFD_RELOC_NONE:
3b8b57a9 6985#endif
5656a981
AM		 6986 case BFD_RELOC_CTOR:
6987 case BFD_RELOC_32:
6988 case BFD_RELOC_32_PCREL:
6989 case BFD_RELOC_RVA:
6990 case BFD_RELOC_64:
6991 case BFD_RELOC_64_PCREL:
6992 case BFD_RELOC_16:
6993 case BFD_RELOC_16_PCREL:
6994 case BFD_RELOC_8:
6995 break;
3b8b57a9 6996
252b5132 6997 default:
bc805888 6998 fprintf (stderr,
94f592af 6999 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 7000 fflush (stderr);
252b5132
RH		 7001 abort ();
7002 }
46b596ff 7003
5656a981 7004 if (fixP->fx_size && APPLY_RELOC)
46b596ff 7005 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 7006 fieldval, fixP->fx_size);
bf7279d5
AM		 7007 if (warn_476
7008 && (seg->flags & SEC_CODE) != 0
7009 && fixP->fx_size == 4
7010 && fixP->fx_done
7011 && !fixP->fx_tcbit
7012 && (fixP->fx_r_type == BFD_RELOC_32
7013 || fixP->fx_r_type == BFD_RELOC_CTOR
7014 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7015 as_warn_where (fixP->fx_file, fixP->fx_line,
7016 _("data in executable section"));
5656a981
AM		 7017 }
7018
7019 /* We are only able to convert some relocs to pc-relative. */
7020 if (!fixP->fx_done && fixP->fx_pcrel)
7021 {
7022 switch (fixP->fx_r_type)
7023 {
7024 case BFD_RELOC_LO16:
7025 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7026 break;
7027
7028 case BFD_RELOC_HI16:
7029 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7030 break;
7031
7032 case BFD_RELOC_HI16_S:
7033 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7034 break;
7035
7036 case BFD_RELOC_64:
7037 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7038 break;
7039
7040 case BFD_RELOC_32:
7041 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7042 break;
7043
7044 case BFD_RELOC_16:
7045 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7046 break;
7047
7048 /* Some of course are already pc-relative. */
7049 case BFD_RELOC_LO16_PCREL:
7050 case BFD_RELOC_HI16_PCREL:
7051 case BFD_RELOC_HI16_S_PCREL:
a680de9a 7052 case BFD_RELOC_PPC_REL16DX_HA:
5656a981
AM		 7053 case BFD_RELOC_64_PCREL:
7054 case BFD_RELOC_32_PCREL:
7055 case BFD_RELOC_16_PCREL:
7056 case BFD_RELOC_PPC_B16:
7057 case BFD_RELOC_PPC_B16_BRTAKEN:
7058 case BFD_RELOC_PPC_B16_BRNTAKEN:
7059 case BFD_RELOC_PPC_B26:
7060 case BFD_RELOC_PPC_LOCAL24PC:
7061 case BFD_RELOC_24_PLT_PCREL:
7062 case BFD_RELOC_32_PLT_PCREL:
7063 case BFD_RELOC_64_PLT_PCREL:
7064 case BFD_RELOC_PPC_VLE_REL8:
7065 case BFD_RELOC_PPC_VLE_REL15:
7066 case BFD_RELOC_PPC_VLE_REL24:
7067 break;
7068
7069 default:
7070 if (fixP->fx_addsy)
7071 {
7072 char *sfile;
7073 unsigned int sline;
7074
7075 /* Use expr_symbol_where to see if this is an
7076 expression symbol. */
7077 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7078 as_bad_where (fixP->fx_file, fixP->fx_line,
7079 _("unresolved expression that must"
7080 " be resolved"));
7081 else
7082 as_bad_where (fixP->fx_file, fixP->fx_line,
7083 _("cannot emit PC relative %s relocation"
7084 " against %s"),
7085 bfd_get_reloc_code_name (fixP->fx_r_type),
7086 S_GET_NAME (fixP->fx_addsy));
7087 }
7088 else
7089 as_bad_where (fixP->fx_file, fixP->fx_line,
7090 _("unable to resolve expression"));
7091 fixP->fx_done = 1;
7092 break;
7093 }
252b5132
RH		 7094 }
7095
7096#ifdef OBJ_ELF
3b8b57a9 7097 ppc_elf_validate_fix (fixP, seg);
94f592af 7098 fixP->fx_addnumber = value;
4e6935a6
AM		 7099
7100 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7101 from the section contents. If we are going to be emitting a reloc
7102 then the section contents are immaterial, so don't warn if they
7103 happen to overflow. Leave such warnings to ld. */
7104 if (!fixP->fx_done)
a38a07e0
AM		 7105 {
7106 fixP->fx_no_overflow = 1;
7107
7108 /* Arrange to emit .TOC. as a normal symbol if used in anything
7109 but .TOC.@tocbase. */
7110 if (ppc_obj64
7111 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7112 && fixP->fx_addsy != NULL
7113 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7114 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7115 }
252b5132 7116#else
94f592af
NC		 7117 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7118 fixP->fx_addnumber = 0;
252b5132
RH		 7119 else
7120 {
7121#ifdef TE_PE
94f592af 7122 fixP->fx_addnumber = 0;
252b5132 7123#else
8edcbfcd
TG		 7124 /* We want to use the offset within the toc, not the actual VMA
7125 of the symbol. */
94f592af 7126 fixP->fx_addnumber =
8edcbfcd
TG		 7127 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7128 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7129 /* Set *valP to avoid errors. */
7130 *valP = value;
252b5132
RH		 7131#endif
7132 }
7133#endif
252b5132
RH		 7134}
7135
7136/* Generate a reloc for a fixup. */
7137
7138arelent *
98027b10 7139tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7140{
7141 arelent *reloc;
7142
7143 reloc = (arelent *) xmalloc (sizeof (arelent));
7144
49309057
ILT		 7145 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7146 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7147 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7148 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7149 if (reloc->howto == (reloc_howto_type *) NULL)
7150 {
7151 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7152 _("reloc %d not supported by object file format"),
7153 (int) fixp->fx_r_type);
252b5132
RH		 7154 return NULL;
7155 }
7156 reloc->addend = fixp->fx_addnumber;
7157
7158 return reloc;
7159}
75e21f08
JJ		 7160
7161void
98027b10 7162ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7163{
7164 cfi_add_CFA_def_cfa (1, 0);
7165}
7166
7167int
1df69f4f 7168tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7169{
7170 unsigned int regnum = -1;
7171 unsigned int i;
7172 const char *p;
7173 char *q;
7174 static struct { char *name; int dw2regnum; } regnames[] =
7175 {
7176 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7177 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7178 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7179 { "spe_acc", 111 }, { "spefscr", 112 }
7180 };
7181
7182 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7183 if (strcmp (regnames[i].name, regname) == 0)
7184 return regnames[i].dw2regnum;
7185
7186 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7187 {
7188 p = regname + 1 + (regname[1] == '.');
7189 regnum = strtoul (p, &q, 10);
7190 if (p == q || *q || regnum >= 32)
7191 return -1;
7192 if (regname[0] == 'f')
b7d7dc63 7193 regnum += 32;
75e21f08 7194 else if (regname[0] == 'v')
b7d7dc63 7195 regnum += 77;
75e21f08
JJ		 7196 }
7197 else if (regname[0] == 'c' && regname[1] == 'r')
7198 {
7199 p = regname + 2 + (regname[2] == '.');
7200 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7201 return -1;
75e21f08
JJ		 7202 regnum = p[0] - '0' + 68;
7203 }
7204 return regnum;
7205}
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