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[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
b34976b6 87static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 88static void ppc_set_cpu PARAMS ((void));
89static unsigned long ppc_insert_operand
90 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
91 offsetT val, char *file, unsigned int line));
92static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
93static void ppc_byte PARAMS ((int));
0baf16f2
AM		 94
95#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 96static int ppc_is_toc_sym PARAMS ((symbolS *sym));
97static void ppc_tc PARAMS ((int));
0baf16f2
AM		 98static void ppc_machine PARAMS ((int));
99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
102static void ppc_comm PARAMS ((int));
103static void ppc_bb PARAMS ((int));
104static void ppc_bc PARAMS ((int));
105static void ppc_bf PARAMS ((int));
106static void ppc_biei PARAMS ((int));
107static void ppc_bs PARAMS ((int));
108static void ppc_eb PARAMS ((int));
109static void ppc_ec PARAMS ((int));
110static void ppc_ef PARAMS ((int));
111static void ppc_es PARAMS ((int));
112static void ppc_csect PARAMS ((int));
931e13a6 113static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 114static void ppc_function PARAMS ((int));
115static void ppc_extern PARAMS ((int));
116static void ppc_lglobl PARAMS ((int));
117static void ppc_section PARAMS ((int));
118static void ppc_named_section PARAMS ((int));
119static void ppc_stabx PARAMS ((int));
120static void ppc_rename PARAMS ((int));
121static void ppc_toc PARAMS ((int));
122static void ppc_xcoff_cons PARAMS ((int));
123static void ppc_vbyte PARAMS ((int));
124#endif
125
126#ifdef OBJ_ELF
127static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
128static void ppc_elf_cons PARAMS ((int));
129static void ppc_elf_rdata PARAMS ((int));
130static void ppc_elf_lcomm PARAMS ((int));
131static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 132static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 133#endif
134
135#ifdef TE_PE
136static void ppc_set_current_section PARAMS ((segT));
137static void ppc_previous PARAMS ((int));
138static void ppc_pdata PARAMS ((int));
139static void ppc_ydata PARAMS ((int));
140static void ppc_reldata PARAMS ((int));
141static void ppc_rdata PARAMS ((int));
142static void ppc_ualong PARAMS ((int));
143static void ppc_znop PARAMS ((int));
144static void ppc_pe_comm PARAMS ((int));
145static void ppc_pe_section PARAMS ((int));
146static void ppc_pe_function PARAMS ((int));
147static void ppc_pe_tocd PARAMS ((int));
148#endif
149\f
150/* Generic assembler global variables which must be defined by all
151 targets. */
152
153#ifdef OBJ_ELF
154/* This string holds the chars that always start a comment. If the
155 pre-processor is disabled, these aren't very useful. The macro
156 tc_comment_chars points to this. We use this, rather than the
157 usual comment_chars, so that we can switch for Solaris conventions. */
158static const char ppc_solaris_comment_chars[] = "#!";
159static const char ppc_eabi_comment_chars[] = "#";
160
161#ifdef TARGET_SOLARIS_COMMENT
162const char *ppc_comment_chars = ppc_solaris_comment_chars;
163#else
164const char *ppc_comment_chars = ppc_eabi_comment_chars;
165#endif
166#else
167const char comment_chars[] = "#";
168#endif
169
170/* Characters which start a comment at the beginning of a line. */
171const char line_comment_chars[] = "#";
172
173/* Characters which may be used to separate multiple commands on a
174 single line. */
175const char line_separator_chars[] = ";";
176
177/* Characters which are used to indicate an exponent in a floating
178 point number. */
179const char EXP_CHARS[] = "eE";
180
181/* Characters which mean that a number is a floating point constant,
182 as in 0d1.0. */
183const char FLT_CHARS[] = "dD";
5ce8663f 184
5e02f92e 185/* Anything that can start an operand needs to be mentioned here,
ac805826 186 to stop the input scrubber eating whitespace. */
5e02f92e 187const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 188
189/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
190int ppc_cie_data_alignment;
252b5132
RH		 191\f
192/* The target specific pseudo-ops which we support. */
193
194const pseudo_typeS md_pseudo_table[] =
195{
196 /* Pseudo-ops which must be overridden. */
197 { "byte", ppc_byte, 0 },
198
199#ifdef OBJ_XCOFF
200 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
201 legitimately belong in the obj-*.c file. However, XCOFF is based
202 on COFF, and is only implemented for the RS/6000. We just use
203 obj-coff.c, and add what we need here. */
204 { "comm", ppc_comm, 0 },
205 { "lcomm", ppc_comm, 1 },
206 { "bb", ppc_bb, 0 },
207 { "bc", ppc_bc, 0 },
208 { "bf", ppc_bf, 0 },
209 { "bi", ppc_biei, 0 },
210 { "bs", ppc_bs, 0 },
211 { "csect", ppc_csect, 0 },
212 { "data", ppc_section, 'd' },
213 { "eb", ppc_eb, 0 },
214 { "ec", ppc_ec, 0 },
215 { "ef", ppc_ef, 0 },
216 { "ei", ppc_biei, 1 },
217 { "es", ppc_es, 0 },
218 { "extern", ppc_extern, 0 },
219 { "function", ppc_function, 0 },
220 { "lglobl", ppc_lglobl, 0 },
221 { "rename", ppc_rename, 0 },
222 { "section", ppc_named_section, 0 },
223 { "stabx", ppc_stabx, 0 },
224 { "text", ppc_section, 't' },
225 { "toc", ppc_toc, 0 },
226 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 227 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 228 { "word", ppc_xcoff_cons, 1 },
229 { "short", ppc_xcoff_cons, 1 },
230 { "vbyte", ppc_vbyte, 0 },
231#endif
232
233#ifdef OBJ_ELF
0baf16f2
AM		 234 { "llong", ppc_elf_cons, 8 },
235 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 236 { "long", ppc_elf_cons, 4 },
237 { "word", ppc_elf_cons, 2 },
238 { "short", ppc_elf_cons, 2 },
239 { "rdata", ppc_elf_rdata, 0 },
240 { "rodata", ppc_elf_rdata, 0 },
241 { "lcomm", ppc_elf_lcomm, 0 },
242#endif
243
244#ifdef TE_PE
99a814a1 245 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 246 { "previous", ppc_previous, 0 },
247 { "pdata", ppc_pdata, 0 },
248 { "ydata", ppc_ydata, 0 },
249 { "reldata", ppc_reldata, 0 },
250 { "rdata", ppc_rdata, 0 },
251 { "ualong", ppc_ualong, 0 },
252 { "znop", ppc_znop, 0 },
253 { "comm", ppc_pe_comm, 0 },
254 { "lcomm", ppc_pe_comm, 1 },
255 { "section", ppc_pe_section, 0 },
256 { "function", ppc_pe_function,0 },
257 { "tocd", ppc_pe_tocd, 0 },
258#endif
259
0baf16f2 260#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 261 { "tc", ppc_tc, 0 },
0baf16f2
AM		 262 { "machine", ppc_machine, 0 },
263#endif
252b5132
RH		 264
265 { NULL, NULL, 0 }
266};
267
268\f
99a814a1
AM		 269/* Predefined register names if -mregnames (or default for Windows NT).
270 In general, there are lots of them, in an attempt to be compatible
271 with a number of other Windows NT assemblers. */
252b5132
RH		 272
273/* Structure to hold information about predefined registers. */
274struct pd_reg
275 {
276 char *name;
277 int value;
278 };
279
280/* List of registers that are pre-defined:
281
282 Each general register has predefined names of the form:
283 1. r<reg_num> which has the value <reg_num>.
284 2. r.<reg_num> which has the value <reg_num>.
285
252b5132
RH		 286 Each floating point register has predefined names of the form:
287 1. f<reg_num> which has the value <reg_num>.
288 2. f.<reg_num> which has the value <reg_num>.
289
7a899fff
C		 290 Each vector unit register has predefined names of the form:
291 1. v<reg_num> which has the value <reg_num>.
292 2. v.<reg_num> which has the value <reg_num>.
293
252b5132
RH		 294 Each condition register has predefined names of the form:
295 1. cr<reg_num> which has the value <reg_num>.
296 2. cr.<reg_num> which has the value <reg_num>.
297
298 There are individual registers as well:
299 sp or r.sp has the value 1
300 rtoc or r.toc has the value 2
301 fpscr has the value 0
302 xer has the value 1
303 lr has the value 8
304 ctr has the value 9
305 pmr has the value 0
306 dar has the value 19
307 dsisr has the value 18
308 dec has the value 22
309 sdr1 has the value 25
310 srr0 has the value 26
311 srr1 has the value 27
312
81d4177b 313 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 314
315static const struct pd_reg pre_defined_registers[] =
316{
317 { "cr.0", 0 }, /* Condition Registers */
318 { "cr.1", 1 },
319 { "cr.2", 2 },
320 { "cr.3", 3 },
321 { "cr.4", 4 },
322 { "cr.5", 5 },
323 { "cr.6", 6 },
324 { "cr.7", 7 },
325
326 { "cr0", 0 },
327 { "cr1", 1 },
328 { "cr2", 2 },
329 { "cr3", 3 },
330 { "cr4", 4 },
331 { "cr5", 5 },
332 { "cr6", 6 },
333 { "cr7", 7 },
334
335 { "ctr", 9 },
336
337 { "dar", 19 }, /* Data Access Register */
338 { "dec", 22 }, /* Decrementer */
339 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
340
341 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 342 { "f.1", 1 },
343 { "f.10", 10 },
344 { "f.11", 11 },
345 { "f.12", 12 },
346 { "f.13", 13 },
347 { "f.14", 14 },
348 { "f.15", 15 },
349 { "f.16", 16 },
350 { "f.17", 17 },
351 { "f.18", 18 },
352 { "f.19", 19 },
353 { "f.2", 2 },
354 { "f.20", 20 },
355 { "f.21", 21 },
356 { "f.22", 22 },
357 { "f.23", 23 },
358 { "f.24", 24 },
359 { "f.25", 25 },
360 { "f.26", 26 },
361 { "f.27", 27 },
362 { "f.28", 28 },
363 { "f.29", 29 },
364 { "f.3", 3 },
252b5132
RH		 365 { "f.30", 30 },
366 { "f.31", 31 },
81d4177b
KH		 367 { "f.4", 4 },
368 { "f.5", 5 },
369 { "f.6", 6 },
370 { "f.7", 7 },
371 { "f.8", 8 },
372 { "f.9", 9 },
373
374 { "f0", 0 },
375 { "f1", 1 },
376 { "f10", 10 },
377 { "f11", 11 },
378 { "f12", 12 },
379 { "f13", 13 },
380 { "f14", 14 },
381 { "f15", 15 },
382 { "f16", 16 },
383 { "f17", 17 },
384 { "f18", 18 },
385 { "f19", 19 },
386 { "f2", 2 },
387 { "f20", 20 },
388 { "f21", 21 },
389 { "f22", 22 },
390 { "f23", 23 },
391 { "f24", 24 },
392 { "f25", 25 },
393 { "f26", 26 },
394 { "f27", 27 },
395 { "f28", 28 },
396 { "f29", 29 },
397 { "f3", 3 },
252b5132
RH		 398 { "f30", 30 },
399 { "f31", 31 },
81d4177b
KH		 400 { "f4", 4 },
401 { "f5", 5 },
402 { "f6", 6 },
403 { "f7", 7 },
404 { "f8", 8 },
405 { "f9", 9 },
252b5132
RH		 406
407 { "fpscr", 0 },
408
409 { "lr", 8 }, /* Link Register */
410
411 { "pmr", 0 },
412
413 { "r.0", 0 }, /* General Purpose Registers */
414 { "r.1", 1 },
415 { "r.10", 10 },
416 { "r.11", 11 },
417 { "r.12", 12 },
418 { "r.13", 13 },
419 { "r.14", 14 },
420 { "r.15", 15 },
421 { "r.16", 16 },
422 { "r.17", 17 },
423 { "r.18", 18 },
424 { "r.19", 19 },
425 { "r.2", 2 },
426 { "r.20", 20 },
427 { "r.21", 21 },
428 { "r.22", 22 },
429 { "r.23", 23 },
430 { "r.24", 24 },
431 { "r.25", 25 },
432 { "r.26", 26 },
433 { "r.27", 27 },
434 { "r.28", 28 },
435 { "r.29", 29 },
436 { "r.3", 3 },
437 { "r.30", 30 },
438 { "r.31", 31 },
439 { "r.4", 4 },
440 { "r.5", 5 },
441 { "r.6", 6 },
442 { "r.7", 7 },
443 { "r.8", 8 },
444 { "r.9", 9 },
445
446 { "r.sp", 1 }, /* Stack Pointer */
447
448 { "r.toc", 2 }, /* Pointer to the table of contents */
449
450 { "r0", 0 }, /* More general purpose registers */
451 { "r1", 1 },
452 { "r10", 10 },
453 { "r11", 11 },
454 { "r12", 12 },
455 { "r13", 13 },
456 { "r14", 14 },
457 { "r15", 15 },
458 { "r16", 16 },
459 { "r17", 17 },
460 { "r18", 18 },
461 { "r19", 19 },
462 { "r2", 2 },
463 { "r20", 20 },
464 { "r21", 21 },
465 { "r22", 22 },
466 { "r23", 23 },
467 { "r24", 24 },
468 { "r25", 25 },
469 { "r26", 26 },
470 { "r27", 27 },
471 { "r28", 28 },
472 { "r29", 29 },
473 { "r3", 3 },
474 { "r30", 30 },
475 { "r31", 31 },
476 { "r4", 4 },
477 { "r5", 5 },
478 { "r6", 6 },
479 { "r7", 7 },
480 { "r8", 8 },
481 { "r9", 9 },
482
483 { "rtoc", 2 }, /* Table of contents */
484
485 { "sdr1", 25 }, /* Storage Description Register 1 */
486
487 { "sp", 1 },
488
489 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
490 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 491
7a899fff 492 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 493 { "v.1", 1 },
494 { "v.10", 10 },
495 { "v.11", 11 },
496 { "v.12", 12 },
497 { "v.13", 13 },
498 { "v.14", 14 },
499 { "v.15", 15 },
500 { "v.16", 16 },
501 { "v.17", 17 },
502 { "v.18", 18 },
503 { "v.19", 19 },
504 { "v.2", 2 },
505 { "v.20", 20 },
506 { "v.21", 21 },
507 { "v.22", 22 },
508 { "v.23", 23 },
509 { "v.24", 24 },
510 { "v.25", 25 },
511 { "v.26", 26 },
512 { "v.27", 27 },
513 { "v.28", 28 },
514 { "v.29", 29 },
515 { "v.3", 3 },
7a899fff
C		 516 { "v.30", 30 },
517 { "v.31", 31 },
81d4177b
KH		 518 { "v.4", 4 },
519 { "v.5", 5 },
520 { "v.6", 6 },
521 { "v.7", 7 },
522 { "v.8", 8 },
523 { "v.9", 9 },
7a899fff
C		 524
525 { "v0", 0 },
81d4177b
KH		 526 { "v1", 1 },
527 { "v10", 10 },
528 { "v11", 11 },
529 { "v12", 12 },
530 { "v13", 13 },
531 { "v14", 14 },
532 { "v15", 15 },
533 { "v16", 16 },
534 { "v17", 17 },
535 { "v18", 18 },
536 { "v19", 19 },
537 { "v2", 2 },
538 { "v20", 20 },
539 { "v21", 21 },
540 { "v22", 22 },
541 { "v23", 23 },
542 { "v24", 24 },
543 { "v25", 25 },
544 { "v26", 26 },
545 { "v27", 27 },
546 { "v28", 28 },
547 { "v29", 29 },
548 { "v3", 3 },
7a899fff
C		 549 { "v30", 30 },
550 { "v31", 31 },
81d4177b
KH		 551 { "v4", 4 },
552 { "v5", 5 },
553 { "v6", 6 },
554 { "v7", 7 },
555 { "v8", 8 },
7a899fff 556 { "v9", 9 },
252b5132
RH		 557
558 { "xer", 1 },
559
560};
561
bc805888 562#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 563
564/* Given NAME, find the register number associated with that name, return
565 the integer value associated with the given name or -1 on failure. */
566
567static int reg_name_search
568 PARAMS ((const struct pd_reg *, int, const char * name));
569
570static int
571reg_name_search (regs, regcount, name)
572 const struct pd_reg *regs;
573 int regcount;
574 const char *name;
575{
576 int middle, low, high;
577 int cmp;
578
579 low = 0;
580 high = regcount - 1;
581
582 do
583 {
584 middle = (low + high) / 2;
585 cmp = strcasecmp (name, regs[middle].name);
586 if (cmp < 0)
587 high = middle - 1;
588 else if (cmp > 0)
589 low = middle + 1;
590 else
591 return regs[middle].value;
592 }
593 while (low <= high);
594
595 return -1;
596}
597
598/*
99a814a1 599 * Summary of register_name.
252b5132
RH		 600 *
601 * in: Input_line_pointer points to 1st char of operand.
602 *
603 * out: A expressionS.
604 * The operand may have been a register: in this case, X_op == O_register,
605 * X_add_number is set to the register number, and truth is returned.
606 * Input_line_pointer->(next non-blank) char after operand, or is in its
607 * original state.
608 */
609
b34976b6 610static bfd_boolean
252b5132
RH		 611register_name (expressionP)
612 expressionS *expressionP;
613{
614 int reg_number;
615 char *name;
616 char *start;
617 char c;
618
99a814a1 619 /* Find the spelling of the operand. */
252b5132 620 start = name = input_line_pointer;
3882b010 621 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 622 name = ++input_line_pointer;
623
3882b010 624 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 625 return FALSE;
252b5132
RH		 626
627 c = get_symbol_end ();
628 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
629
468cced8
AM		 630 /* Put back the delimiting char. */
631 *input_line_pointer = c;
632
99a814a1 633 /* Look to see if it's in the register table. */
81d4177b 634 if (reg_number >= 0)
252b5132
RH		 635 {
636 expressionP->X_op = O_register;
637 expressionP->X_add_number = reg_number;
81d4177b 638
99a814a1 639 /* Make the rest nice. */
252b5132
RH		 640 expressionP->X_add_symbol = NULL;
641 expressionP->X_op_symbol = NULL;
b34976b6 642 return TRUE;
252b5132 643 }
468cced8
AM		 644
645 /* Reset the line as if we had not done anything. */
646 input_line_pointer = start;
b34976b6 647 return FALSE;
252b5132
RH		 648}
649\f
650/* This function is called for each symbol seen in an expression. It
651 handles the special parsing which PowerPC assemblers are supposed
652 to use for condition codes. */
653
654/* Whether to do the special parsing. */
b34976b6 655static bfd_boolean cr_operand;
252b5132
RH		 656
657/* Names to recognize in a condition code. This table is sorted. */
658static const struct pd_reg cr_names[] =
659{
660 { "cr0", 0 },
661 { "cr1", 1 },
662 { "cr2", 2 },
663 { "cr3", 3 },
664 { "cr4", 4 },
665 { "cr5", 5 },
666 { "cr6", 6 },
667 { "cr7", 7 },
668 { "eq", 2 },
669 { "gt", 1 },
670 { "lt", 0 },
671 { "so", 3 },
672 { "un", 3 }
673};
674
675/* Parsing function. This returns non-zero if it recognized an
676 expression. */
677
678int
679ppc_parse_name (name, expr)
680 const char *name;
681 expressionS *expr;
682{
683 int val;
684
685 if (! cr_operand)
686 return 0;
687
688 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
689 name);
690 if (val < 0)
691 return 0;
692
693 expr->X_op = O_constant;
694 expr->X_add_number = val;
695
696 return 1;
697}
698\f
699/* Local variables. */
700
701/* The type of processor we are assembling for. This is one or more
702 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 703static unsigned long ppc_cpu = 0;
252b5132 704
2b3c4602
AM		 705/* Whether to target xcoff64/elf64. */
706static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 707
252b5132
RH		 708/* Opcode hash table. */
709static struct hash_control *ppc_hash;
710
711/* Macro hash table. */
712static struct hash_control *ppc_macro_hash;
713
714#ifdef OBJ_ELF
99a814a1 715/* What type of shared library support to use. */
5d6f4f16 716static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 717
99a814a1 718/* Flags to set in the elf header. */
252b5132
RH		 719static flagword ppc_flags = 0;
720
721/* Whether this is Solaris or not. */
722#ifdef TARGET_SOLARIS_COMMENT
b34976b6 723#define SOLARIS_P TRUE
252b5132 724#else
b34976b6 725#define SOLARIS_P FALSE
252b5132
RH		 726#endif
727
b34976b6 728static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 729#endif
730
731#ifdef OBJ_XCOFF
732
733/* The RS/6000 assembler uses the .csect pseudo-op to generate code
734 using a bunch of different sections. These assembler sections,
735 however, are all encompassed within the .text or .data sections of
736 the final output file. We handle this by using different
737 subsegments within these main segments. */
738
739/* Next subsegment to allocate within the .text segment. */
740static subsegT ppc_text_subsegment = 2;
741
742/* Linked list of csects in the text section. */
743static symbolS *ppc_text_csects;
744
745/* Next subsegment to allocate within the .data segment. */
746static subsegT ppc_data_subsegment = 2;
747
748/* Linked list of csects in the data section. */
749static symbolS *ppc_data_csects;
750
751/* The current csect. */
752static symbolS *ppc_current_csect;
753
754/* The RS/6000 assembler uses a TOC which holds addresses of functions
755 and variables. Symbols are put in the TOC with the .tc pseudo-op.
756 A special relocation is used when accessing TOC entries. We handle
757 the TOC as a subsegment within the .data segment. We set it up if
758 we see a .toc pseudo-op, and save the csect symbol here. */
759static symbolS *ppc_toc_csect;
760
761/* The first frag in the TOC subsegment. */
762static fragS *ppc_toc_frag;
763
764/* The first frag in the first subsegment after the TOC in the .data
765 segment. NULL if there are no subsegments after the TOC. */
766static fragS *ppc_after_toc_frag;
767
768/* The current static block. */
769static symbolS *ppc_current_block;
770
771/* The COFF debugging section; set by md_begin. This is not the
772 .debug section, but is instead the secret BFD section which will
773 cause BFD to set the section number of a symbol to N_DEBUG. */
774static asection *ppc_coff_debug_section;
775
776#endif /* OBJ_XCOFF */
777
778#ifdef TE_PE
779
780/* Various sections that we need for PE coff support. */
781static segT ydata_section;
782static segT pdata_section;
783static segT reldata_section;
784static segT rdata_section;
785static segT tocdata_section;
786
81d4177b 787/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 788static segT ppc_previous_section;
789static segT ppc_current_section;
790
791#endif /* TE_PE */
792
793#ifdef OBJ_ELF
794symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 795#define PPC_APUINFO_ISEL 0x40
796#define PPC_APUINFO_PMR 0x41
797#define PPC_APUINFO_RFMCI 0x42
798#define PPC_APUINFO_CACHELCK 0x43
799#define PPC_APUINFO_SPE 0x100
800#define PPC_APUINFO_EFS 0x101
801#define PPC_APUINFO_BRLOCK 0x102
802
b34976b6
AM		 803/*
804 * We keep a list of APUinfo
6a0c61b7
EZ		 805 */
806unsigned long *ppc_apuinfo_list;
807unsigned int ppc_apuinfo_num;
808unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 809#endif /* OBJ_ELF */
810\f
811#ifdef OBJ_ELF
15c1449b 812const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 813#else
15c1449b 814const char *const md_shortopts = "um:";
252b5132 815#endif
15c1449b 816const struct option md_longopts[] = {
252b5132
RH		 817 {NULL, no_argument, NULL, 0}
818};
15c1449b 819const size_t md_longopts_size = sizeof (md_longopts);
252b5132 820
69c040df
AM		 821
822/* Handle -m options that set cpu type, and .machine arg. */
823
824static int
825parse_cpu (const char *arg)
826{
827 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
828 (RIOS2). */
829 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
830 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
831 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
832 else if (strcmp (arg, "pwr") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
834 /* -m601 means to assemble for the PowerPC 601, which includes
835 instructions that are holdovers from the Power. */
836 else if (strcmp (arg, "601") == 0)
837 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
838 | PPC_OPCODE_601 | PPC_OPCODE_32);
839 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
840 PowerPC 603/604. */
841 else if (strcmp (arg, "ppc") == 0
842 || strcmp (arg, "ppc32") == 0
843 || strcmp (arg, "603") == 0
844 || strcmp (arg, "604") == 0)
845 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
846 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
847 else if (strcmp (arg, "403") == 0
848 || strcmp (arg, "405") == 0)
849 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
850 | PPC_OPCODE_403 | PPC_OPCODE_32);
851 else if (strcmp (arg, "440") == 0)
852 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
853 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
854 else if (strcmp (arg, "7400") == 0
855 || strcmp (arg, "7410") == 0
856 || strcmp (arg, "7450") == 0
857 || strcmp (arg, "7455") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
859 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 860 else if (strcmp (arg, "e300") == 0)
861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
862 | PPC_OPCODE_E300);
69c040df
AM		 863 else if (strcmp (arg, "altivec") == 0)
864 {
865 if (ppc_cpu == 0)
866 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
867 else
868 ppc_cpu |= PPC_OPCODE_ALTIVEC;
869 }
870 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
871 {
872 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
873 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
874 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
875 | PPC_OPCODE_RFMCI);
876 }
877 else if (strcmp (arg, "spe") == 0)
878 {
879 if (ppc_cpu == 0)
880 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
881 else
882 ppc_cpu |= PPC_OPCODE_SPE;
883 }
884 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
885 620. */
886 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
887 {
888 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
889 }
890 else if (strcmp (arg, "ppc64bridge") == 0)
891 {
892 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
893 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
894 }
895 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
896 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
897 {
898 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
899 }
900 /* -mbooke64 means enable 64-bit BookE support. */
901 else if (strcmp (arg, "booke64") == 0)
902 {
903 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
904 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
905 }
906 else if (strcmp (arg, "power4") == 0)
907 {
908 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
909 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
910 }
b0648eec
AM		 911 else if (strcmp (arg, "power5") == 0)
912 {
913 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
914 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
915 | PPC_OPCODE_POWER5);
916 }
9622b051
AM		 917 else if (strcmp (arg, "power6") == 0)
918 {
919 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
920 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
921 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
922 }
ede602d7
AM		 923 else if (strcmp (arg, "cell") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
926 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
927 | PPC_OPCODE_CELL);
928 }
69c040df
AM		 929 /* -mcom means assemble for the common intersection between Power
930 and PowerPC. At present, we just allow the union, rather
931 than the intersection. */
932 else if (strcmp (arg, "com") == 0)
933 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
934 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
935 else if (strcmp (arg, "any") == 0)
936 ppc_cpu |= PPC_OPCODE_ANY;
937 else
938 return 0;
939
940 return 1;
941}
942
252b5132
RH		 943int
944md_parse_option (c, arg)
945 int c;
946 char *arg;
947{
948 switch (c)
949 {
950 case 'u':
951 /* -u means that any undefined symbols should be treated as
952 external, which is the default for gas anyhow. */
953 break;
954
955#ifdef OBJ_ELF
956 case 'l':
957 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 958 sake, recognize -be also. */
252b5132
RH		 959 if (strcmp (arg, "e") == 0)
960 {
961 target_big_endian = 0;
962 set_target_endian = 1;
963 }
964 else
965 return 0;
966
967 break;
968
969 case 'b':
970 if (strcmp (arg, "e") == 0)
971 {
972 target_big_endian = 1;
973 set_target_endian = 1;
974 }
975 else
976 return 0;
977
978 break;
979
980 case 'K':
99a814a1 981 /* Recognize -K PIC. */
252b5132
RH		 982 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
983 {
984 shlib = SHLIB_PIC;
985 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
986 }
987 else
988 return 0;
989
990 break;
991#endif
992
7f6d05e8
CP		 993 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
994 case 'a':
995 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 996 {
997#ifdef BFD64
998 ppc_obj64 = 1;
999#else
1000 as_fatal (_("%s unsupported"), "-a64");
1001#endif
1002 }
7f6d05e8 1003 else if (strcmp (arg, "32") == 0)
2b3c4602 1004 ppc_obj64 = 0;
7f6d05e8
CP		 1005 else
1006 return 0;
1007 break;
81d4177b 1008
252b5132 1009 case 'm':
69c040df
AM		 1010 if (parse_cpu (arg))
1011 ;
252b5132
RH		 1012
1013 else if (strcmp (arg, "regnames") == 0)
b34976b6 1014 reg_names_p = TRUE;
252b5132
RH		 1015
1016 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1017 reg_names_p = FALSE;
252b5132
RH		 1018
1019#ifdef OBJ_ELF
99a814a1
AM		 1020 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1021 that require relocation. */
252b5132
RH		 1022 else if (strcmp (arg, "relocatable") == 0)
1023 {
5d6f4f16 1024 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1025 ppc_flags |= EF_PPC_RELOCATABLE;
1026 }
1027
1028 else if (strcmp (arg, "relocatable-lib") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1032 }
1033
99a814a1 1034 /* -memb, set embedded bit. */
252b5132
RH		 1035 else if (strcmp (arg, "emb") == 0)
1036 ppc_flags |= EF_PPC_EMB;
1037
99a814a1
AM		 1038 /* -mlittle/-mbig set the endianess. */
1039 else if (strcmp (arg, "little") == 0
1040 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1041 {
1042 target_big_endian = 0;
1043 set_target_endian = 1;
1044 }
1045
1046 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1047 {
1048 target_big_endian = 1;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "solaris") == 0)
1053 {
b34976b6 1054 msolaris = TRUE;
252b5132
RH		 1055 ppc_comment_chars = ppc_solaris_comment_chars;
1056 }
1057
1058 else if (strcmp (arg, "no-solaris") == 0)
1059 {
b34976b6 1060 msolaris = FALSE;
252b5132
RH		 1061 ppc_comment_chars = ppc_eabi_comment_chars;
1062 }
1063#endif
1064 else
1065 {
1066 as_bad (_("invalid switch -m%s"), arg);
1067 return 0;
1068 }
1069 break;
1070
1071#ifdef OBJ_ELF
1072 /* -V: SVR4 argument to print version ID. */
1073 case 'V':
1074 print_version_id ();
1075 break;
1076
1077 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1078 should be emitted or not. FIXME: Not implemented. */
1079 case 'Q':
1080 break;
1081
1082 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1083 rather than .stabs.excl, which is ignored by the linker.
1084 FIXME: Not implemented. */
1085 case 's':
1086 if (arg)
1087 return 0;
1088
1089 break;
1090#endif
1091
1092 default:
1093 return 0;
1094 }
1095
1096 return 1;
1097}
1098
1099void
1100md_show_usage (stream)
1101 FILE *stream;
1102{
bc805888 1103 fprintf (stream, _("\
252b5132 1104PowerPC options:\n\
df12615d
AM		 1105-a32 generate ELF32/XCOFF32\n\
1106-a64 generate ELF64/XCOFF64\n\
252b5132 1107-u ignored\n\
23e1d84c
AM		 1108-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1109-mpwr generate code for POWER (RIOS1)\n\
1110-m601 generate code for PowerPC 601\n\
418c1742 1111-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1112 generate code for PowerPC 603/604\n\
df12615d 1113-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1114-m440 generate code for PowerPC 440\n\
f5c120c5 1115-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1116 generate code For PowerPC 7400/7410/7450/7455\n"));
1117 fprintf (stream, _("\
23e1d84c 1118-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1119-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1120-mbooke64 generate code for 64-bit PowerPC BookE\n\
1121-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1122-mpower4 generate code for Power4 architecture\n\
b0648eec 1123-mpower5 generate code for Power5 architecture\n\
9622b051 1124-mpower6 generate code for Power6 architecture\n\
ede602d7 1125-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1126-mcom generate code Power/PowerPC common instructions\n\
df12615d 1127-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1128 fprintf (stream, _("\
df12615d 1129-maltivec generate code for AltiVec\n\
36ae0db3 1130-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1131-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1132-mspe generate code for Motorola SPE instructions\n\
1133-mregnames Allow symbolic names for registers\n\
1134-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1135#ifdef OBJ_ELF
bc805888 1136 fprintf (stream, _("\
252b5132
RH		 1137-mrelocatable support for GCC's -mrelocatble option\n\
1138-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1139-memb set PPC_EMB bit in ELF flags\n\
df12615d 1140-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1141 generate code for a little endian machine\n\
df12615d
AM		 1142-mbig, -mbig-endian, -b, -be\n\
1143 generate code for a big endian machine\n\
252b5132
RH		 1144-msolaris generate code for Solaris\n\
1145-mno-solaris do not generate code for Solaris\n\
1146-V print assembler version number\n\
1147-Qy, -Qn ignored\n"));
1148#endif
1149}
1150\f
1151/* Set ppc_cpu if it is not already set. */
1152
1153static void
1154ppc_set_cpu ()
1155{
1156 const char *default_os = TARGET_OS;
1157 const char *default_cpu = TARGET_CPU;
1158
3c9030c1 1159 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1160 {
2a98c3a6 1161 if (ppc_obj64)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1163 else if (strncmp (default_os, "aix", 3) == 0
1164 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1165 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1166 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1168 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1170 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1171 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1172 else
99a814a1
AM		 1173 as_fatal (_("Unknown default cpu = %s, os = %s"),
1174 default_cpu, default_os);
252b5132
RH		 1175 }
1176}
1177
9232bbb0
AM		 1178/* Figure out the BFD architecture to use. This function and ppc_mach
1179 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1180
1181enum bfd_architecture
1182ppc_arch ()
1183{
1184 const char *default_cpu = TARGET_CPU;
1185 ppc_set_cpu ();
1186
1187 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1188 return bfd_arch_powerpc;
1189 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1190 return bfd_arch_rs6000;
1191 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1192 {
1193 if (strcmp (default_cpu, "rs6000") == 0)
1194 return bfd_arch_rs6000;
0baf16f2 1195 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1196 return bfd_arch_powerpc;
1197 }
1198
1199 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1200 return bfd_arch_unknown;
1201}
1202
7f6d05e8
CP		 1203unsigned long
1204ppc_mach ()
1205{
2a98c3a6
AM		 1206 if (ppc_obj64)
1207 return bfd_mach_ppc64;
1208 else if (ppc_arch () == bfd_arch_rs6000)
1209 return bfd_mach_rs6k;
1210 else
1211 return bfd_mach_ppc;
7f6d05e8
CP		 1212}
1213
81d4177b 1214extern char*
99a814a1 1215ppc_target_format ()
7f6d05e8
CP		 1216{
1217#ifdef OBJ_COFF
1218#ifdef TE_PE
99a814a1 1219 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1220#elif TE_POWERMAC
0baf16f2 1221 return "xcoff-powermac";
7f6d05e8 1222#else
eb1e0e80 1223# ifdef TE_AIX5
2b3c4602 1224 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1225# else
2b3c4602 1226 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# endif
7f6d05e8 1228#endif
7f6d05e8
CP		 1229#endif
1230#ifdef OBJ_ELF
9d8504b1
PB		 1231# ifdef TE_VXWORKS
1232 return "elf32-powerpc-vxworks";
1233# else
0baf16f2 1234 return (target_big_endian
2b3c4602
AM		 1235 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1236 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1237# endif
7f6d05e8
CP		 1238#endif
1239}
1240
69c040df
AM		 1241/* Insert opcodes and macros into hash tables. Called at startup and
1242 for .cpu pseudo. */
252b5132 1243
69c040df
AM		 1244static void
1245ppc_setup_opcodes (void)
252b5132
RH		 1246{
1247 register const struct powerpc_opcode *op;
1248 const struct powerpc_opcode *op_end;
1249 const struct powerpc_macro *macro;
1250 const struct powerpc_macro *macro_end;
b84bf58a
AM		 1251 unsigned int i;
1252 bfd_boolean bad_insn = FALSE;
252b5132 1253
69c040df
AM		 1254 if (ppc_hash != NULL)
1255 hash_die (ppc_hash);
1256 if (ppc_macro_hash != NULL)
1257 hash_die (ppc_macro_hash);
252b5132
RH		 1258
1259 /* Insert the opcodes into a hash table. */
1260 ppc_hash = hash_new ();
1261
b84bf58a
AM		 1262 /* Check operand masks. Code here and in the disassembler assumes
1263 all the 1's in the mask are contiguous. */
1264 for (i = 0; i < num_powerpc_operands; ++i)
1265 {
1266 unsigned long mask = powerpc_operands[i].bitm;
1267 unsigned long right_bit;
1268
1269 right_bit = mask & -mask;
1270 mask += right_bit;
1271 right_bit = mask & -mask;
1272 if (mask != right_bit)
1273 {
1274 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1275 bad_insn = TRUE;
1276 }
1277 }
1278
252b5132
RH		 1279 op_end = powerpc_opcodes + powerpc_num_opcodes;
1280 for (op = powerpc_opcodes; op < op_end; op++)
1281 {
b84bf58a
AM		 1282 const unsigned char *o;
1283 unsigned long omask = op->mask;
1284
1285 /* The mask had better not trim off opcode bits. */
1286 if ((op->opcode & omask) != op->opcode)
1287 {
1288 as_bad (_("mask trims opcode bits for %s"),
1289 op->name);
1290 bad_insn = TRUE;
1291 }
1292
1293 /* The operands must not overlap the opcode or each other. */
1294 for (o = op->operands; *o; ++o)
1295 if (*o >= num_powerpc_operands)
1296 {
1297 as_bad (_("operand index error for %s"),
1298 op->name);
1299 bad_insn = TRUE;
1300 }
1301 else
1302 {
1303 const struct powerpc_operand *operand = &powerpc_operands[*o];
1304 if (operand->shift >= 0)
1305 {
1306 unsigned long mask = operand->bitm << operand->shift;
1307 if (omask & mask)
1308 {
1309 as_bad (_("operand %d overlap in %s"),
1310 (int) (o - op->operands), op->name);
1311 bad_insn = TRUE;
1312 }
1313 omask |= mask;
1314 }
1315 }
252b5132 1316
2b3c4602 1317 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1318 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1319 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1320 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1321 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1322 /* Certain instructions (eg: extsw) do not exist in the
1323 32-bit BookE instruction set, but they do exist in the
1324 64-bit BookE instruction set, and other PPC instruction
1325 sets. Check to see if the opcode has the BOOKE64 flag set.
1326 If it does make sure that the target CPU is not the BookE32. */
1327 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1328 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1329 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1330 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1331 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1332 == (ppc_cpu & PPC_OPCODE_POWER4)))
1333 && ((op->flags & PPC_OPCODE_POWER5) == 0
1334 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1335 == (ppc_cpu & PPC_OPCODE_POWER5)))
1336 && ((op->flags & PPC_OPCODE_POWER6) == 0
1337 || ((op->flags & PPC_OPCODE_POWER6)
1338 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1339 {
1340 const char *retval;
1341
1342 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1343 if (retval != NULL)
252b5132 1344 {
99a814a1 1345 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1346 if ((ppc_cpu & PPC_OPCODE_601) != 0
1347 && (op->flags & PPC_OPCODE_POWER) != 0)
1348 continue;
1349
b84bf58a 1350 as_bad (_("duplicate instruction %s"),
99a814a1 1351 op->name);
b84bf58a 1352 bad_insn = TRUE;
252b5132
RH		 1353 }
1354 }
1355 }
1356
3c9030c1
AM		 1357 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1358 for (op = powerpc_opcodes; op < op_end; op++)
1359 hash_insert (ppc_hash, op->name, (PTR) op);
1360
252b5132
RH		 1361 /* Insert the macros into a hash table. */
1362 ppc_macro_hash = hash_new ();
1363
1364 macro_end = powerpc_macros + powerpc_num_macros;
1365 for (macro = powerpc_macros; macro < macro_end; macro++)
1366 {
1367 if ((macro->flags & ppc_cpu) != 0)
1368 {
1369 const char *retval;
1370
1371 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1372 if (retval != (const char *) NULL)
1373 {
b84bf58a
AM		 1374 as_bad (_("duplicate macro %s"), macro->name);
1375 bad_insn = TRUE;
252b5132
RH		 1376 }
1377 }
1378 }
1379
b84bf58a 1380 if (bad_insn)
252b5132 1381 abort ();
69c040df
AM		 1382}
1383
1384/* This function is called when the assembler starts up. It is called
1385 after the options have been parsed and the output file has been
1386 opened. */
1387
1388void
1389md_begin ()
1390{
1391 ppc_set_cpu ();
1392
1393 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1394
1395#ifdef OBJ_ELF
1396 /* Set the ELF flags if desired. */
1397 if (ppc_flags && !msolaris)
1398 bfd_set_private_flags (stdoutput, ppc_flags);
1399#endif
1400
1401 ppc_setup_opcodes ();
252b5132 1402
67c1ffbe 1403 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1404 by the user. */
252b5132
RH		 1405 if (!set_target_endian)
1406 {
1407 set_target_endian = 1;
1408 target_big_endian = PPC_BIG_ENDIAN;
1409 }
1410
1411#ifdef OBJ_XCOFF
1412 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1413
1414 /* Create dummy symbols to serve as initial csects. This forces the
1415 text csects to precede the data csects. These symbols will not
1416 be output. */
1417 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1418 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1419 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1420 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1421#endif
1422
1423#ifdef TE_PE
1424
1425 ppc_current_section = text_section;
81d4177b 1426 ppc_previous_section = 0;
252b5132
RH		 1427
1428#endif
1429}
1430
6a0c61b7
EZ		 1431void
1432ppc_cleanup ()
1433{
dc1d03fc 1434#ifdef OBJ_ELF
6a0c61b7
EZ		 1435 if (ppc_apuinfo_list == NULL)
1436 return;
1437
1438 /* Ok, so write the section info out. We have this layout:
1439
1440 byte data what
1441 ---- ---- ----
1442 0 8 length of "APUinfo\0"
1443 4 (n*4) number of APU's (4 bytes each)
1444 8 2 note type 2
1445 12 "APUinfo\0" name
1446 20 APU#1 first APU's info
1447 24 APU#2 second APU's info
1448 ... ...
1449 */
1450 {
1451 char *p;
1452 asection *seg = now_seg;
1453 subsegT subseg = now_subseg;
1454 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1455 unsigned int i;
6a0c61b7
EZ		 1456
1457 /* Create the .PPC.EMB.apuinfo section. */
1458 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1459 bfd_set_section_flags (stdoutput,
1460 apuinfo_secp,
e1a9cb8e 1461 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1462
1463 p = frag_more (4);
1464 md_number_to_chars (p, (valueT) 8, 4);
1465
1466 p = frag_more (4);
e98d298c 1467 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1468
1469 p = frag_more (4);
1470 md_number_to_chars (p, (valueT) 2, 4);
1471
1472 p = frag_more (8);
1473 strcpy (p, "APUinfo");
1474
1475 for (i = 0; i < ppc_apuinfo_num; i++)
1476 {
b34976b6
AM		 1477 p = frag_more (4);
1478 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1479 }
1480
1481 frag_align (2, 0, 0);
1482
1483 /* We probably can't restore the current segment, for there likely
1484 isn't one yet... */
1485 if (seg && subseg)
1486 subseg_set (seg, subseg);
1487 }
dc1d03fc 1488#endif
6a0c61b7
EZ		 1489}
1490
252b5132
RH		 1491/* Insert an operand value into an instruction. */
1492
1493static unsigned long
1494ppc_insert_operand (insn, operand, val, file, line)
1495 unsigned long insn;
1496 const struct powerpc_operand *operand;
1497 offsetT val;
1498 char *file;
1499 unsigned int line;
1500{
b84bf58a
AM		 1501 long min, max, right;
1502 offsetT test;
1503
1504 max = operand->bitm;
1505 right = max & -max;
1506 min = 0;
1507
1508 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1509 {
b84bf58a
AM		 1510 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1511 max >>= 1;
1512 min = ~(max | ((max & -max) - 1)) ;
252b5132 1513
b84bf58a 1514 if (!ppc_obj64)
252b5132 1515 {
b84bf58a
AM		 1516 /* Some people write 32 bit hex constants with the sign
1517 extension done by hand. This shouldn't really be
1518 valid, but, to permit this code to assemble on a 64
1519 bit host, we sign extend the 32 bit value. */
1520 if (val > 0
1521 && (val & (offsetT) 0x80000000) != 0
1522 && (val & (offsetT) 0xffffffff) == val)
252b5132 1523 {
b84bf58a
AM		 1524 val -= 0x80000000;
1525 val -= 0x80000000;
252b5132
RH		 1526 }
1527 }
b84bf58a 1528 }
252b5132 1529
b84bf58a
AM		 1530 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1531 {
1532 max++;
1533 min++;
252b5132
RH		 1534 }
1535
b84bf58a
AM		 1536 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1537 test = - val;
1538 else
1539 test = val;
1540
1541 if (test < (offsetT) min
1542 || test > (offsetT) max
1543 || (test & (right - 1)) != 0)
1544 as_bad_value_out_of_range (_("operand"),
1545 test, (offsetT) min, (offsetT) max, file, line);
1546
252b5132
RH		 1547 if (operand->insert)
1548 {
1549 const char *errmsg;
1550
1551 errmsg = NULL;
2b3c4602 1552 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1553 if (errmsg != (const char *) NULL)
0baf16f2 1554 as_bad_where (file, line, errmsg);
252b5132
RH		 1555 }
1556 else
b84bf58a 1557 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1558
1559 return insn;
1560}
1561
1562\f
1563#ifdef OBJ_ELF
1564/* Parse @got, etc. and return the desired relocation. */
1565static bfd_reloc_code_real_type
1566ppc_elf_suffix (str_p, exp_p)
1567 char **str_p;
1568 expressionS *exp_p;
1569{
1570 struct map_bfd {
1571 char *string;
b7d7dc63
AM		 1572 unsigned int length : 8;
1573 unsigned int valid32 : 1;
1574 unsigned int valid64 : 1;
1575 unsigned int reloc;
252b5132
RH		 1576 };
1577
1578 char ident[20];
1579 char *str = *str_p;
1580 char *str2;
1581 int ch;
1582 int len;
15c1449b 1583 const struct map_bfd *ptr;
252b5132 1584
b7d7dc63
AM		 1585#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1586#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1587#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1588
15c1449b 1589 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1590 MAP ("l", BFD_RELOC_LO16),
1591 MAP ("h", BFD_RELOC_HI16),
1592 MAP ("ha", BFD_RELOC_HI16_S),
1593 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1594 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1595 MAP ("got", BFD_RELOC_16_GOTOFF),
1596 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1597 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1598 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1599 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1600 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1601 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1602 MAP ("copy", BFD_RELOC_PPC_COPY),
1603 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1604 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1605 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1606 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1607 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1608 MAP ("tls", BFD_RELOC_PPC_TLS),
1609 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1610 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1611 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1612 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1613 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1614 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1615 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1616 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1617 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1618 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1619 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1620 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1621 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1622 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1623 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1624 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1625 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1626 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1627 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1628 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1629 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1630 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1631 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1632 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1633 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1634 MAP32 ("fixup", BFD_RELOC_CTOR),
1635 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1636 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1637 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1638 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1639 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1640 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1641 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1642 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1643 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1644 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1645 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1646 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1647 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1648 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1649 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1650 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1651 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1652 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1653 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1654 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1655 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1656 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1657 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1658 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1659 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1660 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1661 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1662 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1663 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1664 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1665 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1666 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1667 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1668 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1669 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1670 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1671 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1672 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1673 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1674 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1675 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1676 };
1677
1678 if (*str++ != '@')
1679 return BFD_RELOC_UNUSED;
1680
1681 for (ch = *str, str2 = ident;
1682 (str2 < ident + sizeof (ident) - 1
3882b010 1683 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1684 ch = *++str)
1685 {
3882b010 1686 *str2++ = TOLOWER (ch);
252b5132
RH		 1687 }
1688
1689 *str2 = '\0';
1690 len = str2 - ident;
1691
1692 ch = ident[0];
1693 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1694 if (ch == ptr->string[0]
1695 && len == ptr->length
b7d7dc63
AM		 1696 && memcmp (ident, ptr->string, ptr->length) == 0
1697 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1698 {
15c1449b
AM		 1699 int reloc = ptr->reloc;
1700
cdba85ec 1701 if (!ppc_obj64)
5f6db75a
AM		 1702 if (exp_p->X_add_number != 0
1703 && (reloc == (int) BFD_RELOC_16_GOTOFF
1704 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1705 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1706 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1707 as_warn (_("identifier+constant@got means identifier@got+constant"));
1708
1709 /* Now check for identifier@suffix+constant. */
1710 if (*str == '-' || *str == '+')
252b5132 1711 {
5f6db75a
AM		 1712 char *orig_line = input_line_pointer;
1713 expressionS new_exp;
1714
1715 input_line_pointer = str;
1716 expression (&new_exp);
1717 if (new_exp.X_op == O_constant)
252b5132 1718 {
5f6db75a
AM		 1719 exp_p->X_add_number += new_exp.X_add_number;
1720 str = input_line_pointer;
252b5132 1721 }
5f6db75a
AM		 1722
1723 if (&input_line_pointer != str_p)
1724 input_line_pointer = orig_line;
252b5132 1725 }
252b5132 1726 *str_p = str;
0baf16f2 1727
2b3c4602 1728 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1729 && exp_p->X_op == O_symbol
1730 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1731 {
9f2b53d7
AM		 1732 /* Change the symbol so that the dummy .TOC. symbol can be
1733 omitted from the object file. */
0baf16f2
AM		 1734 exp_p->X_add_symbol = &abs_symbol;
1735 }
1736
15c1449b 1737 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1738 }
1739
1740 return BFD_RELOC_UNUSED;
1741}
1742
99a814a1
AM		 1743/* Like normal .long/.short/.word, except support @got, etc.
1744 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1745static void
1746ppc_elf_cons (nbytes)
0baf16f2 1747 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1748{
1749 expressionS exp;
1750 bfd_reloc_code_real_type reloc;
1751
1752 if (is_it_end_of_statement ())
1753 {
1754 demand_empty_rest_of_line ();
1755 return;
1756 }
1757
1758 do
1759 {
1760 expression (&exp);
1761 if (exp.X_op == O_symbol
1762 && *input_line_pointer == '@'
99a814a1
AM		 1763 && (reloc = ppc_elf_suffix (&input_line_pointer,
1764 &exp)) != BFD_RELOC_UNUSED)
252b5132 1765 {
99a814a1
AM		 1766 reloc_howto_type *reloc_howto;
1767 int size;
1768
1769 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1770 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1771
1772 if (size > nbytes)
0baf16f2
AM		 1773 {
1774 as_bad (_("%s relocations do not fit in %d bytes\n"),
1775 reloc_howto->name, nbytes);
1776 }
252b5132
RH		 1777 else
1778 {
0baf16f2
AM		 1779 char *p;
1780 int offset;
252b5132 1781
0baf16f2
AM		 1782 p = frag_more (nbytes);
1783 offset = 0;
1784 if (target_big_endian)
1785 offset = nbytes - size;
99a814a1
AM		 1786 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1787 &exp, 0, reloc);
252b5132
RH		 1788 }
1789 }
1790 else
1791 emit_expr (&exp, (unsigned int) nbytes);
1792 }
1793 while (*input_line_pointer++ == ',');
1794
99a814a1
AM		 1795 /* Put terminator back into stream. */
1796 input_line_pointer--;
252b5132
RH		 1797 demand_empty_rest_of_line ();
1798}
1799
1800/* Solaris pseduo op to change to the .rodata section. */
1801static void
1802ppc_elf_rdata (xxx)
1803 int xxx;
1804{
1805 char *save_line = input_line_pointer;
1806 static char section[] = ".rodata\n";
1807
99a814a1 1808 /* Just pretend this is .section .rodata */
252b5132
RH		 1809 input_line_pointer = section;
1810 obj_elf_section (xxx);
1811
1812 input_line_pointer = save_line;
1813}
1814
99a814a1 1815/* Pseudo op to make file scope bss items. */
252b5132 1816static void
99a814a1 1817ppc_elf_lcomm (xxx)
92161534 1818 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1819{
1820 register char *name;
1821 register char c;
1822 register char *p;
1823 offsetT size;
1824 register symbolS *symbolP;
1825 offsetT align;
1826 segT old_sec;
1827 int old_subsec;
1828 char *pfrag;
1829 int align2;
1830
1831 name = input_line_pointer;
1832 c = get_symbol_end ();
1833
99a814a1 1834 /* just after name is now '\0'. */
252b5132
RH		 1835 p = input_line_pointer;
1836 *p = c;
1837 SKIP_WHITESPACE ();
1838 if (*input_line_pointer != ',')
1839 {
1840 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1841 ignore_rest_of_line ();
1842 return;
1843 }
1844
1845 input_line_pointer++; /* skip ',' */
1846 if ((size = get_absolute_expression ()) < 0)
1847 {
1848 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1849 ignore_rest_of_line ();
1850 return;
1851 }
1852
1853 /* The third argument to .lcomm is the alignment. */
1854 if (*input_line_pointer != ',')
1855 align = 8;
1856 else
1857 {
1858 ++input_line_pointer;
1859 align = get_absolute_expression ();
1860 if (align <= 0)
1861 {
1862 as_warn (_("ignoring bad alignment"));
1863 align = 8;
1864 }
1865 }
1866
1867 *p = 0;
1868 symbolP = symbol_find_or_make (name);
1869 *p = c;
1870
1871 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1872 {
1873 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1874 S_GET_NAME (symbolP));
1875 ignore_rest_of_line ();
1876 return;
1877 }
1878
1879 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1880 {
1881 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1882 S_GET_NAME (symbolP),
1883 (long) S_GET_VALUE (symbolP),
1884 (long) size);
1885
1886 ignore_rest_of_line ();
1887 return;
1888 }
1889
99a814a1 1890 /* Allocate_bss. */
252b5132
RH		 1891 old_sec = now_seg;
1892 old_subsec = now_subseg;
1893 if (align)
1894 {
99a814a1 1895 /* Convert to a power of 2 alignment. */
252b5132
RH		 1896 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1897 if (align != 1)
1898 {
1899 as_bad (_("Common alignment not a power of 2"));
1900 ignore_rest_of_line ();
1901 return;
1902 }
1903 }
1904 else
1905 align2 = 0;
1906
1907 record_alignment (bss_section, align2);
1908 subseg_set (bss_section, 0);
1909 if (align2)
1910 frag_align (align2, 0, 0);
1911 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1912 symbol_get_frag (symbolP)->fr_symbol = 0;
1913 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1914 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1915 (char *) 0);
1916 *pfrag = 0;
1917 S_SET_SIZE (symbolP, size);
1918 S_SET_SEGMENT (symbolP, bss_section);
1919 subseg_set (old_sec, old_subsec);
1920 demand_empty_rest_of_line ();
1921}
1922
1923/* Validate any relocations emitted for -mrelocatable, possibly adding
1924 fixups for word relocations in writable segments, so we can adjust
1925 them at runtime. */
1926static void
1927ppc_elf_validate_fix (fixp, seg)
1928 fixS *fixp;
1929 segT seg;
1930{
1931 if (fixp->fx_done || fixp->fx_pcrel)
1932 return;
1933
1934 switch (shlib)
1935 {
1936 case SHLIB_NONE:
1937 case SHLIB_PIC:
1938 return;
1939
5d6f4f16 1940 case SHLIB_MRELOCATABLE:
252b5132
RH		 1941 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1942 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1943 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1944 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1945 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1946 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1947 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1948 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1949 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1950 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1951 && strcmp (segment_name (seg), ".got2") != 0
1952 && strcmp (segment_name (seg), ".dtors") != 0
1953 && strcmp (segment_name (seg), ".ctors") != 0
1954 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1955 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1956 && strcmp (segment_name (seg), ".eh_frame") != 0
1957 && strcmp (segment_name (seg), ".ex_shared") != 0)
1958 {
1959 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1960 || fixp->fx_r_type != BFD_RELOC_CTOR)
1961 {
1962 as_bad_where (fixp->fx_file, fixp->fx_line,
1963 _("Relocation cannot be done when using -mrelocatable"));
1964 }
1965 }
1966 return;
1967 }
1968}
0baf16f2 1969
7e8d4ab4
AM		 1970/* Prevent elf_frob_file_before_adjust removing a weak undefined
1971 function descriptor sym if the corresponding code sym is used. */
1972
1973void
1974ppc_frob_file_before_adjust ()
0baf16f2 1975{
7e8d4ab4 1976 symbolS *symp;
9232bbb0 1977 asection *toc;
0baf16f2 1978
7e8d4ab4
AM		 1979 if (!ppc_obj64)
1980 return;
1981
1982 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1983 {
7e8d4ab4
AM		 1984 const char *name;
1985 char *dotname;
1986 symbolS *dotsym;
1987 size_t len;
1988
1989 name = S_GET_NAME (symp);
1990 if (name[0] == '.')
1991 continue;
1992
1993 if (! S_IS_WEAK (symp)
1994 || S_IS_DEFINED (symp))
1995 continue;
1996
1997 len = strlen (name) + 1;
1998 dotname = xmalloc (len + 1);
1999 dotname[0] = '.';
2000 memcpy (dotname + 1, name, len);
461b725f 2001 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2002 free (dotname);
2003 if (dotsym != NULL && (symbol_used_p (dotsym)
2004 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2005 symbol_mark_used (symp);
2006
0baf16f2
AM		 2007 }
2008
9232bbb0
AM		 2009 toc = bfd_get_section_by_name (stdoutput, ".toc");
2010 if (toc != NULL
2011 && bfd_section_size (stdoutput, toc) > 0x10000)
2012 as_warn (_("TOC section size exceeds 64k"));
2013
7e8d4ab4
AM		 2014 /* Don't emit .TOC. symbol. */
2015 symp = symbol_find (".TOC.");
2016 if (symp != NULL)
2017 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2018}
252b5132
RH		 2019#endif /* OBJ_ELF */
2020\f
2021#ifdef TE_PE
2022
2023/*
99a814a1 2024 * Summary of parse_toc_entry.
252b5132
RH		 2025 *
2026 * in: Input_line_pointer points to the '[' in one of:
2027 *
2028 * [toc] [tocv] [toc32] [toc64]
2029 *
2030 * Anything else is an error of one kind or another.
2031 *
81d4177b 2032 * out:
252b5132
RH		 2033 * return value: success or failure
2034 * toc_kind: kind of toc reference
2035 * input_line_pointer:
2036 * success: first char after the ']'
2037 * failure: unchanged
2038 *
2039 * settings:
2040 *
2041 * [toc] - rv == success, toc_kind = default_toc
2042 * [tocv] - rv == success, toc_kind = data_in_toc
2043 * [toc32] - rv == success, toc_kind = must_be_32
2044 * [toc64] - rv == success, toc_kind = must_be_64
2045 *
2046 */
2047
81d4177b
KH		 2048enum toc_size_qualifier
2049{
252b5132
RH		 2050 default_toc, /* The toc cell constructed should be the system default size */
2051 data_in_toc, /* This is a direct reference to a toc cell */
2052 must_be_32, /* The toc cell constructed must be 32 bits wide */
2053 must_be_64 /* The toc cell constructed must be 64 bits wide */
2054};
2055
2056static int
99a814a1 2057parse_toc_entry (toc_kind)
252b5132
RH		 2058 enum toc_size_qualifier *toc_kind;
2059{
2060 char *start;
2061 char *toc_spec;
2062 char c;
2063 enum toc_size_qualifier t;
2064
99a814a1 2065 /* Save the input_line_pointer. */
252b5132
RH		 2066 start = input_line_pointer;
2067
99a814a1 2068 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2069 ++input_line_pointer;
2070 SKIP_WHITESPACE ();
81d4177b 2071
99a814a1 2072 /* Find the spelling of the operand. */
252b5132
RH		 2073 toc_spec = input_line_pointer;
2074 c = get_symbol_end ();
2075
99a814a1 2076 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2077 {
2078 t = default_toc;
2079 }
99a814a1 2080 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2081 {
2082 t = data_in_toc;
2083 }
99a814a1 2084 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2085 {
2086 t = must_be_32;
2087 }
99a814a1 2088 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2089 {
2090 t = must_be_64;
2091 }
2092 else
2093 {
2094 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2095 *input_line_pointer = c;
2096 input_line_pointer = start;
252b5132
RH		 2097 return 0;
2098 }
2099
99a814a1
AM		 2100 /* Now find the ']'. */
2101 *input_line_pointer = c;
252b5132 2102
81d4177b
KH		 2103 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2104 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2105
2106 if (c != ']')
2107 {
2108 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2109 input_line_pointer = start;
252b5132
RH		 2110 return 0;
2111 }
2112
99a814a1 2113 *toc_kind = t;
252b5132
RH		 2114 return 1;
2115}
2116#endif
2117\f
2118
dc1d03fc 2119#ifdef OBJ_ELF
6a0c61b7
EZ		 2120#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2121static void
dc1d03fc 2122ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2123 unsigned int apu, version;
2124{
2125 unsigned int i;
2126
2127 /* Check we don't already exist. */
2128 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2129 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2130 return;
b34976b6 2131
6a0c61b7
EZ		 2132 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2133 {
2134 if (ppc_apuinfo_num_alloc == 0)
2135 {
2136 ppc_apuinfo_num_alloc = 4;
2137 ppc_apuinfo_list = (unsigned long *)
2138 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2139 }
2140 else
2141 {
2142 ppc_apuinfo_num_alloc += 4;
2143 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2144 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2145 }
2146 }
dc1d03fc 2147 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2148}
2149#undef APUID
dc1d03fc 2150#endif
6a0c61b7
EZ		 2151\f
2152
252b5132
RH		 2153/* We need to keep a list of fixups. We can't simply generate them as
2154 we go, because that would require us to first create the frag, and
2155 that would screw up references to ``.''. */
2156
2157struct ppc_fixup
2158{
2159 expressionS exp;
2160 int opindex;
2161 bfd_reloc_code_real_type reloc;
2162};
2163
2164#define MAX_INSN_FIXUPS (5)
2165
2166/* This routine is called for each instruction to be assembled. */
2167
2168void
2169md_assemble (str)
2170 char *str;
2171{
2172 char *s;
2173 const struct powerpc_opcode *opcode;
2174 unsigned long insn;
2175 const unsigned char *opindex_ptr;
2176 int skip_optional;
2177 int need_paren;
2178 int next_opindex;
2179 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2180 int fc;
2181 char *f;
09b935ac 2182 int addr_mod;
252b5132
RH		 2183 int i;
2184#ifdef OBJ_ELF
2185 bfd_reloc_code_real_type reloc;
2186#endif
2187
2188 /* Get the opcode. */
3882b010 2189 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2190 ;
2191 if (*s != '\0')
2192 *s++ = '\0';
2193
2194 /* Look up the opcode in the hash table. */
2195 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2196 if (opcode == (const struct powerpc_opcode *) NULL)
2197 {
2198 const struct powerpc_macro *macro;
2199
2200 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2201 if (macro == (const struct powerpc_macro *) NULL)
2202 as_bad (_("Unrecognized opcode: `%s'"), str);
2203 else
2204 ppc_macro (s, macro);
2205
2206 return;
2207 }
2208
2209 insn = opcode->opcode;
2210
2211 str = s;
3882b010 2212 while (ISSPACE (*str))
252b5132
RH		 2213 ++str;
2214
2215 /* PowerPC operands are just expressions. The only real issue is
2216 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2217 an optional operand separate the operands only with commas (in some
2218 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2219 have optional operands). Most instructions with optional operands
2220 have only one. Those that have more than one optional operand can
2221 take either all their operands or none. So, before we start seriously
2222 parsing the operands, we check to see if we have optional operands,
2223 and if we do, we count the number of commas to see which operands
2224 have been omitted. */
252b5132
RH		 2225 skip_optional = 0;
2226 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2227 {
2228 const struct powerpc_operand *operand;
2229
2230 operand = &powerpc_operands[*opindex_ptr];
2231 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2232 {
2233 unsigned int opcount;
7fe9cf6b
NC		 2234 unsigned int num_operands_expected;
2235 unsigned int i;
252b5132
RH		 2236
2237 /* There is an optional operand. Count the number of
2238 commas in the input line. */
2239 if (*str == '\0')
2240 opcount = 0;
2241 else
2242 {
2243 opcount = 1;
2244 s = str;
2245 while ((s = strchr (s, ',')) != (char *) NULL)
2246 {
2247 ++opcount;
2248 ++s;
2249 }
2250 }
2251
7fe9cf6b
NC		 2252 /* Compute the number of expected operands.
2253 Do not count fake operands. */
2254 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2255 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2256 ++ num_operands_expected;
2257
252b5132
RH		 2258 /* If there are fewer operands in the line then are called
2259 for by the instruction, we want to skip the optional
1f6c9eb0 2260 operands. */
7fe9cf6b 2261 if (opcount < num_operands_expected)
252b5132
RH		 2262 skip_optional = 1;
2263
2264 break;
2265 }
2266 }
2267
2268 /* Gather the operands. */
2269 need_paren = 0;
2270 next_opindex = 0;
2271 fc = 0;
2272 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2273 {
2274 const struct powerpc_operand *operand;
2275 const char *errmsg;
2276 char *hold;
2277 expressionS ex;
2278 char endc;
2279
2280 if (next_opindex == 0)
2281 operand = &powerpc_operands[*opindex_ptr];
2282 else
2283 {
2284 operand = &powerpc_operands[next_opindex];
2285 next_opindex = 0;
2286 }
252b5132
RH		 2287 errmsg = NULL;
2288
2289 /* If this is a fake operand, then we do not expect anything
2290 from the input. */
2291 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2292 {
2b3c4602 2293 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2294 if (errmsg != (const char *) NULL)
2295 as_bad (errmsg);
2296 continue;
2297 }
2298
2299 /* If this is an optional operand, and we are skipping it, just
2300 insert a zero. */
2301 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2302 && skip_optional)
2303 {
2304 if (operand->insert)
2305 {
2b3c4602 2306 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2307 if (errmsg != (const char *) NULL)
2308 as_bad (errmsg);
2309 }
2310 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2311 next_opindex = *opindex_ptr + 1;
2312 continue;
2313 }
2314
2315 /* Gather the operand. */
2316 hold = input_line_pointer;
2317 input_line_pointer = str;
2318
2319#ifdef TE_PE
81d4177b 2320 if (*input_line_pointer == '[')
252b5132
RH		 2321 {
2322 /* We are expecting something like the second argument here:
99a814a1
AM		 2323 *
2324 * lwz r4,[toc].GS.0.static_int(rtoc)
2325 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2326 * The argument following the `]' must be a symbol name, and the
2327 * register must be the toc register: 'rtoc' or '2'
2328 *
2329 * The effect is to 0 as the displacement field
2330 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2331 * the appropriate variation) reloc against it based on the symbol.
2332 * The linker will build the toc, and insert the resolved toc offset.
2333 *
2334 * Note:
2335 * o The size of the toc entry is currently assumed to be
2336 * 32 bits. This should not be assumed to be a hard coded
2337 * number.
2338 * o In an effort to cope with a change from 32 to 64 bits,
2339 * there are also toc entries that are specified to be
2340 * either 32 or 64 bits:
2341 * lwz r4,[toc32].GS.0.static_int(rtoc)
2342 * lwz r4,[toc64].GS.0.static_int(rtoc)
2343 * These demand toc entries of the specified size, and the
2344 * instruction probably requires it.
2345 */
252b5132
RH		 2346
2347 int valid_toc;
2348 enum toc_size_qualifier toc_kind;
2349 bfd_reloc_code_real_type toc_reloc;
2350
99a814a1
AM		 2351 /* Go parse off the [tocXX] part. */
2352 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2353
81d4177b 2354 if (!valid_toc)
252b5132 2355 {
99a814a1
AM		 2356 /* Note: message has already been issued.
2357 FIXME: what sort of recovery should we do?
2358 demand_rest_of_line (); return; ? */
252b5132
RH		 2359 }
2360
99a814a1
AM		 2361 /* Now get the symbol following the ']'. */
2362 expression (&ex);
252b5132
RH		 2363
2364 switch (toc_kind)
2365 {
2366 case default_toc:
99a814a1
AM		 2367 /* In this case, we may not have seen the symbol yet,
2368 since it is allowed to appear on a .extern or .globl
2369 or just be a label in the .data section. */
252b5132
RH		 2370 toc_reloc = BFD_RELOC_PPC_TOC16;
2371 break;
2372 case data_in_toc:
99a814a1
AM		 2373 /* 1. The symbol must be defined and either in the toc
2374 section, or a global.
2375 2. The reloc generated must have the TOCDEFN flag set
2376 in upper bit mess of the reloc type.
2377 FIXME: It's a little confusing what the tocv
2378 qualifier can be used for. At the very least, I've
2379 seen three uses, only one of which I'm sure I can
2380 explain. */
81d4177b
KH		 2381 if (ex.X_op == O_symbol)
2382 {
252b5132 2383 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2384 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2385 != tocdata_section)
252b5132 2386 {
99a814a1 2387 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2388 }
2389 }
2390
2391 toc_reloc = BFD_RELOC_PPC_TOC16;
2392 break;
2393 case must_be_32:
99a814a1
AM		 2394 /* FIXME: these next two specifically specify 32/64 bit
2395 toc entries. We don't support them today. Is this
2396 the right way to say that? */
252b5132
RH		 2397 toc_reloc = BFD_RELOC_UNUSED;
2398 as_bad (_("Unimplemented toc32 expression modifier"));
2399 break;
2400 case must_be_64:
99a814a1 2401 /* FIXME: see above. */
252b5132
RH		 2402 toc_reloc = BFD_RELOC_UNUSED;
2403 as_bad (_("Unimplemented toc64 expression modifier"));
2404 break;
2405 default:
bc805888 2406 fprintf (stderr,
99a814a1
AM		 2407 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2408 toc_kind);
bc805888 2409 abort ();
252b5132
RH		 2410 break;
2411 }
2412
2413 /* We need to generate a fixup for this expression. */
2414 if (fc >= MAX_INSN_FIXUPS)
2415 as_fatal (_("too many fixups"));
2416
2417 fixups[fc].reloc = toc_reloc;
2418 fixups[fc].exp = ex;
2419 fixups[fc].opindex = *opindex_ptr;
2420 ++fc;
2421
99a814a1
AM		 2422 /* Ok. We've set up the fixup for the instruction. Now make it
2423 look like the constant 0 was found here. */
252b5132
RH		 2424 ex.X_unsigned = 1;
2425 ex.X_op = O_constant;
2426 ex.X_add_number = 0;
2427 ex.X_add_symbol = NULL;
2428 ex.X_op_symbol = NULL;
2429 }
2430
2431 else
2432#endif /* TE_PE */
2433 {
2434 if (! register_name (&ex))
2435 {
2436 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2437 cr_operand = TRUE;
252b5132 2438 expression (&ex);
b34976b6 2439 cr_operand = FALSE;
252b5132
RH		 2440 }
2441 }
2442
2443 str = input_line_pointer;
2444 input_line_pointer = hold;
2445
2446 if (ex.X_op == O_illegal)
2447 as_bad (_("illegal operand"));
2448 else if (ex.X_op == O_absent)
2449 as_bad (_("missing operand"));
2450 else if (ex.X_op == O_register)
2451 {
2452 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2453 (char *) NULL, 0);
2454 }
2455 else if (ex.X_op == O_constant)
2456 {
2457#ifdef OBJ_ELF
81d4177b 2458 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2459 char *orig_str = str;
2460
2461 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2462 switch (reloc)
2463 {
2464 default:
2465 str = orig_str;
2466 break;
2467
2468 case BFD_RELOC_LO16:
2469 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2470 something which cleared it, we always produce a
2471 signed value. */
2472 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2473 ex.X_add_number &= 0xffff;
2474 else
0baf16f2 2475 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2476 break;
2477
2478 case BFD_RELOC_HI16:
0baf16f2
AM		 2479 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2480 ex.X_add_number = PPC_HI (ex.X_add_number);
2481 else
2482 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2483 break;
2484
2485 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2486 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2487 ex.X_add_number = PPC_HA (ex.X_add_number);
2488 else
2489 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2490 break;
2491
0baf16f2
AM		 2492 case BFD_RELOC_PPC64_HIGHER:
2493 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2494 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2495 else
2496 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2497 break;
2498
2499 case BFD_RELOC_PPC64_HIGHER_S:
2500 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2501 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2502 else
2503 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2504 break;
0baf16f2
AM		 2505
2506 case BFD_RELOC_PPC64_HIGHEST:
2507 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2508 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2509 else
2510 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2511 break;
2512
2513 case BFD_RELOC_PPC64_HIGHEST_S:
2514 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2515 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2516 else
2517 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2518 break;
252b5132 2519 }
0baf16f2 2520#endif /* OBJ_ELF */
252b5132
RH		 2521 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2522 (char *) NULL, 0);
2523 }
2524#ifdef OBJ_ELF
2525 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2526 {
cdba85ec
AM		 2527 /* Some TLS tweaks. */
2528 switch (reloc)
2529 {
2530 default:
2531 break;
2532 case BFD_RELOC_PPC_TLS:
2533 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2534 (char *) NULL, 0);
2535 break;
2536 /* We'll only use the 32 (or 64) bit form of these relocations
2537 in constants. Instructions get the 16 bit form. */
2538 case BFD_RELOC_PPC_DTPREL:
2539 reloc = BFD_RELOC_PPC_DTPREL16;
2540 break;
2541 case BFD_RELOC_PPC_TPREL:
2542 reloc = BFD_RELOC_PPC_TPREL16;
2543 break;
2544 }
2545
99a814a1
AM		 2546 /* For the absolute forms of branches, convert the PC
2547 relative form back into the absolute. */
252b5132
RH		 2548 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2549 {
2550 switch (reloc)
2551 {
2552 case BFD_RELOC_PPC_B26:
2553 reloc = BFD_RELOC_PPC_BA26;
2554 break;
2555 case BFD_RELOC_PPC_B16:
2556 reloc = BFD_RELOC_PPC_BA16;
2557 break;
2558 case BFD_RELOC_PPC_B16_BRTAKEN:
2559 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2560 break;
2561 case BFD_RELOC_PPC_B16_BRNTAKEN:
2562 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2563 break;
2564 default:
2565 break;
2566 }
2567 }
2568
2b3c4602 2569 if (ppc_obj64
adadcc0c 2570 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2571 {
2572 switch (reloc)
2573 {
2574 case BFD_RELOC_16:
2575 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2576 break;
2577 case BFD_RELOC_LO16:
2578 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2579 break;
2580 case BFD_RELOC_16_GOTOFF:
2581 reloc = BFD_RELOC_PPC64_GOT16_DS;
2582 break;
2583 case BFD_RELOC_LO16_GOTOFF:
2584 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2585 break;
2586 case BFD_RELOC_LO16_PLTOFF:
2587 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2588 break;
1cfc59d5 2589 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2590 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2591 break;
2592 case BFD_RELOC_LO16_BASEREL:
2593 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2594 break;
2595 case BFD_RELOC_PPC_TOC16:
2596 reloc = BFD_RELOC_PPC64_TOC16_DS;
2597 break;
2598 case BFD_RELOC_PPC64_TOC16_LO:
2599 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2600 break;
2601 case BFD_RELOC_PPC64_PLTGOT16:
2602 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2603 break;
2604 case BFD_RELOC_PPC64_PLTGOT16_LO:
2605 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2606 break;
cdba85ec
AM		 2607 case BFD_RELOC_PPC_DTPREL16:
2608 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2609 break;
2610 case BFD_RELOC_PPC_DTPREL16_LO:
2611 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2612 break;
2613 case BFD_RELOC_PPC_TPREL16:
2614 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2615 break;
2616 case BFD_RELOC_PPC_TPREL16_LO:
2617 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2618 break;
2619 case BFD_RELOC_PPC_GOT_DTPREL16:
2620 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2621 case BFD_RELOC_PPC_GOT_TPREL16:
2622 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2623 break;
0baf16f2
AM		 2624 default:
2625 as_bad (_("unsupported relocation for DS offset field"));
2626 break;
2627 }
2628 }
2629
252b5132
RH		 2630 /* We need to generate a fixup for this expression. */
2631 if (fc >= MAX_INSN_FIXUPS)
2632 as_fatal (_("too many fixups"));
2633 fixups[fc].exp = ex;
2634 fixups[fc].opindex = 0;
2635 fixups[fc].reloc = reloc;
2636 ++fc;
2637 }
2638#endif /* OBJ_ELF */
2639
2640 else
2641 {
2642 /* We need to generate a fixup for this expression. */
2643 if (fc >= MAX_INSN_FIXUPS)
2644 as_fatal (_("too many fixups"));
2645 fixups[fc].exp = ex;
2646 fixups[fc].opindex = *opindex_ptr;
2647 fixups[fc].reloc = BFD_RELOC_UNUSED;
2648 ++fc;
2649 }
2650
2651 if (need_paren)
2652 {
2653 endc = ')';
2654 need_paren = 0;
2655 }
2656 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2657 {
2658 endc = '(';
2659 need_paren = 1;
2660 }
2661 else
2662 endc = ',';
2663
2664 /* The call to expression should have advanced str past any
2665 whitespace. */
2666 if (*str != endc
2667 && (endc != ',' || *str != '\0'))
2668 {
2669 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2670 break;
2671 }
2672
2673 if (*str != '\0')
2674 ++str;
2675 }
2676
3882b010 2677 while (ISSPACE (*str))
252b5132
RH		 2678 ++str;
2679
2680 if (*str != '\0')
2681 as_bad (_("junk at end of line: `%s'"), str);
2682
dc1d03fc 2683#ifdef OBJ_ELF
6a0c61b7
EZ		 2684 /* Do we need/want a APUinfo section? */
2685 if (ppc_cpu & (PPC_OPCODE_SPE
2686 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2687 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2688 | PPC_OPCODE_RFMCI))
2689 {
2690 /* These are all version "1". */
2691 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2692 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2693 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2694 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2695 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2696 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2697 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2698 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2699 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2700 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2701 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2702 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2703 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2704 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2705 }
dc1d03fc 2706#endif
6a0c61b7 2707
252b5132
RH		 2708 /* Write out the instruction. */
2709 f = frag_more (4);
09b935ac
AM		 2710 addr_mod = frag_now_fix () & 3;
2711 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2712 as_bad (_("instruction address is not a multiple of 4"));
2713 frag_now->insn_addr = addr_mod;
2714 frag_now->has_code = 1;
252b5132
RH		 2715 md_number_to_chars (f, insn, 4);
2716
5d6f4f16
GK		 2717#ifdef OBJ_ELF
2718 dwarf2_emit_insn (4);
2719#endif
2720
252b5132
RH		 2721 /* Create any fixups. At this point we do not use a
2722 bfd_reloc_code_real_type, but instead just use the
2723 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2724 handle fixups for any operand type, although that is admittedly
2725 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2726 md_apply_fix. */
252b5132
RH		 2727 for (i = 0; i < fc; i++)
2728 {
2729 const struct powerpc_operand *operand;
2730
2731 operand = &powerpc_operands[fixups[i].opindex];
2732 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2733 {
99a814a1 2734 reloc_howto_type *reloc_howto;
252b5132
RH		 2735 int size;
2736 int offset;
2737 fixS *fixP;
2738
99a814a1 2739 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2740 if (!reloc_howto)
2741 abort ();
2742
2743 size = bfd_get_reloc_size (reloc_howto);
2744 offset = target_big_endian ? (4 - size) : 0;
2745
2746 if (size < 1 || size > 4)
bc805888 2747 abort ();
252b5132 2748
99a814a1
AM		 2749 fixP = fix_new_exp (frag_now,
2750 f - frag_now->fr_literal + offset,
2751 size,
2752 &fixups[i].exp,
2753 reloc_howto->pc_relative,
252b5132
RH		 2754 fixups[i].reloc);
2755
2756 /* Turn off complaints that the addend is too large for things like
2757 foo+100000@ha. */
2758 switch (fixups[i].reloc)
2759 {
2760 case BFD_RELOC_16_GOTOFF:
2761 case BFD_RELOC_PPC_TOC16:
2762 case BFD_RELOC_LO16:
2763 case BFD_RELOC_HI16:
2764 case BFD_RELOC_HI16_S:
0baf16f2 2765#ifdef OBJ_ELF
0baf16f2
AM		 2766 case BFD_RELOC_PPC64_HIGHER:
2767 case BFD_RELOC_PPC64_HIGHER_S:
2768 case BFD_RELOC_PPC64_HIGHEST:
2769 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2770#endif
252b5132
RH		 2771 fixP->fx_no_overflow = 1;
2772 break;
2773 default:
2774 break;
2775 }
2776 }
2777 else
99a814a1
AM		 2778 fix_new_exp (frag_now,
2779 f - frag_now->fr_literal,
2780 4,
252b5132
RH		 2781 &fixups[i].exp,
2782 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2783 ((bfd_reloc_code_real_type)
99a814a1 2784 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2785 }
2786}
2787
2788/* Handle a macro. Gather all the operands, transform them as
2789 described by the macro, and call md_assemble recursively. All the
2790 operands are separated by commas; we don't accept parentheses
2791 around operands here. */
2792
2793static void
2794ppc_macro (str, macro)
2795 char *str;
2796 const struct powerpc_macro *macro;
2797{
2798 char *operands[10];
2799 unsigned int count;
2800 char *s;
2801 unsigned int len;
2802 const char *format;
2803 int arg;
2804 char *send;
2805 char *complete;
2806
2807 /* Gather the users operands into the operands array. */
2808 count = 0;
2809 s = str;
2810 while (1)
2811 {
2812 if (count >= sizeof operands / sizeof operands[0])
2813 break;
2814 operands[count++] = s;
2815 s = strchr (s, ',');
2816 if (s == (char *) NULL)
2817 break;
2818 *s++ = '\0';
81d4177b 2819 }
252b5132
RH		 2820
2821 if (count != macro->operands)
2822 {
2823 as_bad (_("wrong number of operands"));
2824 return;
2825 }
2826
2827 /* Work out how large the string must be (the size is unbounded
2828 because it includes user input). */
2829 len = 0;
2830 format = macro->format;
2831 while (*format != '\0')
2832 {
2833 if (*format != '%')
2834 {
2835 ++len;
2836 ++format;
2837 }
2838 else
2839 {
2840 arg = strtol (format + 1, &send, 10);
2841 know (send != format && arg >= 0 && arg < count);
2842 len += strlen (operands[arg]);
2843 format = send;
2844 }
2845 }
2846
2847 /* Put the string together. */
2848 complete = s = (char *) alloca (len + 1);
2849 format = macro->format;
2850 while (*format != '\0')
2851 {
2852 if (*format != '%')
2853 *s++ = *format++;
2854 else
2855 {
2856 arg = strtol (format + 1, &send, 10);
2857 strcpy (s, operands[arg]);
2858 s += strlen (s);
2859 format = send;
2860 }
2861 }
2862 *s = '\0';
2863
2864 /* Assemble the constructed instruction. */
2865 md_assemble (complete);
81d4177b 2866}
252b5132
RH		 2867\f
2868#ifdef OBJ_ELF
99a814a1 2869/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2870
2871int
2872ppc_section_letter (letter, ptr_msg)
2873 int letter;
2874 char **ptr_msg;
2875{
2876 if (letter == 'e')
2877 return SHF_EXCLUDE;
2878
13ae64f3 2879 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2880 return -1;
252b5132
RH		 2881}
2882
2883int
9de8d8f1
RH		 2884ppc_section_word (str, len)
2885 char *str;
2886 size_t len;
252b5132 2887{
9de8d8f1
RH		 2888 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2889 return SHF_EXCLUDE;
252b5132 2890
9de8d8f1 2891 return -1;
252b5132
RH		 2892}
2893
2894int
9de8d8f1
RH		 2895ppc_section_type (str, len)
2896 char *str;
2897 size_t len;
252b5132 2898{
9de8d8f1
RH		 2899 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2900 return SHT_ORDERED;
252b5132 2901
9de8d8f1 2902 return -1;
252b5132
RH		 2903}
2904
2905int
2906ppc_section_flags (flags, attr, type)
2907 int flags;
2908 int attr;
2909 int type;
2910{
2911 if (type == SHT_ORDERED)
2912 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2913
2914 if (attr & SHF_EXCLUDE)
2915 flags |= SEC_EXCLUDE;
2916
2917 return flags;
2918}
2919#endif /* OBJ_ELF */
2920
2921\f
2922/* Pseudo-op handling. */
2923
2924/* The .byte pseudo-op. This is similar to the normal .byte
2925 pseudo-op, but it can also take a single ASCII string. */
2926
2927static void
2928ppc_byte (ignore)
92161534 2929 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2930{
2931 if (*input_line_pointer != '\"')
2932 {
2933 cons (1);
2934 return;
2935 }
2936
2937 /* Gather characters. A real double quote is doubled. Unusual
2938 characters are not permitted. */
2939 ++input_line_pointer;
2940 while (1)
2941 {
2942 char c;
2943
2944 c = *input_line_pointer++;
2945
2946 if (c == '\"')
2947 {
2948 if (*input_line_pointer != '\"')
2949 break;
2950 ++input_line_pointer;
2951 }
2952
2953 FRAG_APPEND_1_CHAR (c);
2954 }
2955
2956 demand_empty_rest_of_line ();
2957}
2958\f
2959#ifdef OBJ_XCOFF
2960
2961/* XCOFF specific pseudo-op handling. */
2962
2963/* This is set if we are creating a .stabx symbol, since we don't want
2964 to handle symbol suffixes for such symbols. */
b34976b6 2965static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2966
2967/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2968 symbols in the .bss segment as though they were local common
67c1ffbe 2969 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2970 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2971
2972static void
2973ppc_comm (lcomm)
2974 int lcomm;
2975{
2976 asection *current_seg = now_seg;
2977 subsegT current_subseg = now_subseg;
2978 char *name;
2979 char endc;
2980 char *end_name;
2981 offsetT size;
2982 offsetT align;
2983 symbolS *lcomm_sym = NULL;
2984 symbolS *sym;
2985 char *pfrag;
2986
2987 name = input_line_pointer;
2988 endc = get_symbol_end ();
2989 end_name = input_line_pointer;
2990 *end_name = endc;
2991
2992 if (*input_line_pointer != ',')
2993 {
2994 as_bad (_("missing size"));
2995 ignore_rest_of_line ();
2996 return;
2997 }
2998 ++input_line_pointer;
2999
3000 size = get_absolute_expression ();
3001 if (size < 0)
3002 {
3003 as_bad (_("negative size"));
3004 ignore_rest_of_line ();
3005 return;
3006 }
3007
3008 if (! lcomm)
3009 {
3010 /* The third argument to .comm is the alignment. */
3011 if (*input_line_pointer != ',')
1ad63b2f 3012 align = 2;
252b5132
RH		 3013 else
3014 {
3015 ++input_line_pointer;
3016 align = get_absolute_expression ();
3017 if (align <= 0)
3018 {
3019 as_warn (_("ignoring bad alignment"));
1ad63b2f 3020 align = 2;
252b5132
RH		 3021 }
3022 }
3023 }
3024 else
3025 {
3026 char *lcomm_name;
3027 char lcomm_endc;
3028
1ad63b2f 3029 if (size <= 4)
252b5132
RH		 3030 align = 2;
3031 else
3032 align = 3;
3033
3034 /* The third argument to .lcomm appears to be the real local
3035 common symbol to create. References to the symbol named in
3036 the first argument are turned into references to the third
3037 argument. */
3038 if (*input_line_pointer != ',')
3039 {
3040 as_bad (_("missing real symbol name"));
3041 ignore_rest_of_line ();
3042 return;
3043 }
3044 ++input_line_pointer;
3045
3046 lcomm_name = input_line_pointer;
3047 lcomm_endc = get_symbol_end ();
81d4177b 3048
252b5132
RH		 3049 lcomm_sym = symbol_find_or_make (lcomm_name);
3050
3051 *input_line_pointer = lcomm_endc;
3052 }
3053
3054 *end_name = '\0';
3055 sym = symbol_find_or_make (name);
3056 *end_name = endc;
3057
3058 if (S_IS_DEFINED (sym)
3059 || S_GET_VALUE (sym) != 0)
3060 {
3061 as_bad (_("attempt to redefine symbol"));
3062 ignore_rest_of_line ();
3063 return;
3064 }
81d4177b 3065
252b5132 3066 record_alignment (bss_section, align);
81d4177b 3067
252b5132
RH		 3068 if (! lcomm
3069 || ! S_IS_DEFINED (lcomm_sym))
3070 {
3071 symbolS *def_sym;
3072 offsetT def_size;
3073
3074 if (! lcomm)
3075 {
3076 def_sym = sym;
3077 def_size = size;
3078 S_SET_EXTERNAL (sym);
3079 }
3080 else
3081 {
809ffe0d 3082 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3083 def_sym = lcomm_sym;
3084 def_size = 0;
3085 }
3086
3087 subseg_set (bss_section, 1);
3088 frag_align (align, 0, 0);
81d4177b 3089
809ffe0d 3090 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3091 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3092 def_size, (char *) NULL);
3093 *pfrag = 0;
3094 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3095 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3096 }
3097 else if (lcomm)
3098 {
3099 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3100 symbol_get_frag (lcomm_sym)->fr_offset =
3101 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3102 &~ ((1 << align) - 1));
809ffe0d
ILT		 3103 if (align > symbol_get_tc (lcomm_sym)->align)
3104 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3105 }
3106
3107 if (lcomm)
3108 {
3109 /* Make sym an offset from lcomm_sym. */
3110 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3111 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3112 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3113 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3114 }
3115
3116 subseg_set (current_seg, current_subseg);
3117
3118 demand_empty_rest_of_line ();
3119}
3120
3121/* The .csect pseudo-op. This switches us into a different
3122 subsegment. The first argument is a symbol whose value is the
3123 start of the .csect. In COFF, csect symbols get special aux
3124 entries defined by the x_csect field of union internal_auxent. The
3125 optional second argument is the alignment (the default is 2). */
3126
3127static void
3128ppc_csect (ignore)
5480ccf3 3129 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3130{
3131 char *name;
3132 char endc;
3133 symbolS *sym;
931e13a6 3134 offsetT align;
252b5132
RH		 3135
3136 name = input_line_pointer;
3137 endc = get_symbol_end ();
81d4177b 3138
252b5132
RH		 3139 sym = symbol_find_or_make (name);
3140
3141 *input_line_pointer = endc;
3142
3143 if (S_GET_NAME (sym)[0] == '\0')
3144 {
3145 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3146 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3147 }
3148
931e13a6 3149 align = 2;
252b5132
RH		 3150 if (*input_line_pointer == ',')
3151 {
3152 ++input_line_pointer;
931e13a6 3153 align = get_absolute_expression ();
252b5132
RH		 3154 }
3155
931e13a6
AM		 3156 ppc_change_csect (sym, align);
3157
252b5132
RH		 3158 demand_empty_rest_of_line ();
3159}
3160
3161/* Change to a different csect. */
3162
3163static void
931e13a6 3164ppc_change_csect (sym, align)
252b5132 3165 symbolS *sym;
931e13a6 3166 offsetT align;
252b5132
RH		 3167{
3168 if (S_IS_DEFINED (sym))
809ffe0d 3169 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3170 else
3171 {
3172 symbolS **list_ptr;
3173 int after_toc;
3174 int hold_chunksize;
3175 symbolS *list;
931e13a6
AM		 3176 int is_code;
3177 segT sec;
252b5132
RH		 3178
3179 /* This is a new csect. We need to look at the symbol class to
3180 figure out whether it should go in the text section or the
3181 data section. */
3182 after_toc = 0;
931e13a6 3183 is_code = 0;
809ffe0d 3184 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3185 {
3186 case XMC_PR:
3187 case XMC_RO:
3188 case XMC_DB:
3189 case XMC_GL:
3190 case XMC_XO:
3191 case XMC_SV:
3192 case XMC_TI:
3193 case XMC_TB:
3194 S_SET_SEGMENT (sym, text_section);
809ffe0d 3195 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3196 ++ppc_text_subsegment;
3197 list_ptr = &ppc_text_csects;
931e13a6 3198 is_code = 1;
252b5132
RH		 3199 break;
3200 case XMC_RW:
3201 case XMC_TC0:
3202 case XMC_TC:
3203 case XMC_DS:
3204 case XMC_UA:
3205 case XMC_BS:
3206 case XMC_UC:
3207 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3208 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3209 == ppc_data_subsegment))
252b5132
RH		 3210 after_toc = 1;
3211 S_SET_SEGMENT (sym, data_section);
809ffe0d 3212 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3213 ++ppc_data_subsegment;
3214 list_ptr = &ppc_data_csects;
3215 break;
3216 default:
3217 abort ();
3218 }
3219
3220 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3221 changing subsegments, so that we don't use a lot of memory
3222 space for what may be a small section. */
252b5132
RH		 3223 hold_chunksize = chunksize;
3224 chunksize = 64;
3225
931e13a6
AM		 3226 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3227 symbol_get_tc (sym)->subseg);
252b5132
RH		 3228
3229 chunksize = hold_chunksize;
3230
3231 if (after_toc)
3232 ppc_after_toc_frag = frag_now;
3233
931e13a6
AM		 3234 record_alignment (sec, align);
3235 if (is_code)
3236 frag_align_code (align, 0);
3237 else
3238 frag_align (align, 0, 0);
3239
809ffe0d 3240 symbol_set_frag (sym, frag_now);
252b5132
RH		 3241 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3242
931e13a6 3243 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3244 symbol_get_tc (sym)->output = 1;
3245 symbol_get_tc (sym)->within = sym;
81d4177b 3246
252b5132 3247 for (list = *list_ptr;
809ffe0d
ILT		 3248 symbol_get_tc (list)->next != (symbolS *) NULL;
3249 list = symbol_get_tc (list)->next)
252b5132 3250 ;
809ffe0d 3251 symbol_get_tc (list)->next = sym;
81d4177b 3252
252b5132 3253 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3254 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3255 &symbol_lastP);
252b5132
RH		 3256 }
3257
3258 ppc_current_csect = sym;
3259}
3260
3261/* This function handles the .text and .data pseudo-ops. These
3262 pseudo-ops aren't really used by XCOFF; we implement them for the
3263 convenience of people who aren't used to XCOFF. */
3264
3265static void
3266ppc_section (type)
3267 int type;
3268{
3269 const char *name;
3270 symbolS *sym;
3271
3272 if (type == 't')
3273 name = ".text[PR]";
3274 else if (type == 'd')
3275 name = ".data[RW]";
3276 else
3277 abort ();
3278
3279 sym = symbol_find_or_make (name);
3280
931e13a6 3281 ppc_change_csect (sym, 2);
252b5132
RH		 3282
3283 demand_empty_rest_of_line ();
3284}
3285
3286/* This function handles the .section pseudo-op. This is mostly to
3287 give an error, since XCOFF only supports .text, .data and .bss, but
3288 we do permit the user to name the text or data section. */
3289
3290static void
3291ppc_named_section (ignore)
5480ccf3 3292 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3293{
3294 char *user_name;
3295 const char *real_name;
3296 char c;
3297 symbolS *sym;
3298
3299 user_name = input_line_pointer;
3300 c = get_symbol_end ();
3301
3302 if (strcmp (user_name, ".text") == 0)
3303 real_name = ".text[PR]";
3304 else if (strcmp (user_name, ".data") == 0)
3305 real_name = ".data[RW]";
3306 else
3307 {
3308 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3309 *input_line_pointer = c;
3310 ignore_rest_of_line ();
3311 return;
3312 }
3313
3314 *input_line_pointer = c;
3315
3316 sym = symbol_find_or_make (real_name);
3317
931e13a6 3318 ppc_change_csect (sym, 2);
252b5132
RH		 3319
3320 demand_empty_rest_of_line ();
3321}
3322
3323/* The .extern pseudo-op. We create an undefined symbol. */
3324
3325static void
3326ppc_extern (ignore)
5480ccf3 3327 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3328{
3329 char *name;
3330 char endc;
3331
3332 name = input_line_pointer;
3333 endc = get_symbol_end ();
3334
3335 (void) symbol_find_or_make (name);
3336
3337 *input_line_pointer = endc;
3338
3339 demand_empty_rest_of_line ();
3340}
3341
3342/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3343
3344static void
3345ppc_lglobl (ignore)
5480ccf3 3346 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3347{
3348 char *name;
3349 char endc;
3350 symbolS *sym;
3351
3352 name = input_line_pointer;
3353 endc = get_symbol_end ();
3354
3355 sym = symbol_find_or_make (name);
3356
3357 *input_line_pointer = endc;
3358
809ffe0d 3359 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3360
3361 demand_empty_rest_of_line ();
3362}
3363
3364/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3365 although I don't know why it bothers. */
3366
3367static void
3368ppc_rename (ignore)
5480ccf3 3369 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3370{
3371 char *name;
3372 char endc;
3373 symbolS *sym;
3374 int len;
3375
3376 name = input_line_pointer;
3377 endc = get_symbol_end ();
3378
3379 sym = symbol_find_or_make (name);
3380
3381 *input_line_pointer = endc;
3382
3383 if (*input_line_pointer != ',')
3384 {
3385 as_bad (_("missing rename string"));
3386 ignore_rest_of_line ();
3387 return;
3388 }
3389 ++input_line_pointer;
3390
809ffe0d 3391 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3392
3393 demand_empty_rest_of_line ();
3394}
3395
3396/* The .stabx pseudo-op. This is similar to a normal .stabs
3397 pseudo-op, but slightly different. A sample is
3398 .stabx "main:F-1",.main,142,0
3399 The first argument is the symbol name to create. The second is the
3400 value, and the third is the storage class. The fourth seems to be
3401 always zero, and I am assuming it is the type. */
3402
3403static void
3404ppc_stabx (ignore)
5480ccf3 3405 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3406{
3407 char *name;
3408 int len;
3409 symbolS *sym;
3410 expressionS exp;
3411
3412 name = demand_copy_C_string (&len);
3413
3414 if (*input_line_pointer != ',')
3415 {
3416 as_bad (_("missing value"));
3417 return;
3418 }
3419 ++input_line_pointer;
3420
b34976b6 3421 ppc_stab_symbol = TRUE;
252b5132 3422 sym = symbol_make (name);
b34976b6 3423 ppc_stab_symbol = FALSE;
252b5132 3424
809ffe0d 3425 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3426
3427 (void) expression (&exp);
3428
3429 switch (exp.X_op)
3430 {
3431 case O_illegal:
3432 case O_absent:
3433 case O_big:
3434 as_bad (_("illegal .stabx expression; zero assumed"));
3435 exp.X_add_number = 0;
3436 /* Fall through. */
3437 case O_constant:
3438 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3439 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3440 break;
3441
3442 case O_symbol:
3443 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3444 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3445 else
3446 {
3447 S_SET_VALUE (sym,
3448 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3449 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3450 }
3451 break;
3452
3453 default:
3454 /* The value is some complex expression. This will probably
99a814a1
AM		 3455 fail at some later point, but this is probably the right
3456 thing to do here. */
809ffe0d 3457 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3458 break;
3459 }
3460
3461 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3462 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3463
3464 if (*input_line_pointer != ',')
3465 {
3466 as_bad (_("missing class"));
3467 return;
3468 }
3469 ++input_line_pointer;
3470
3471 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3472
3473 if (*input_line_pointer != ',')
3474 {
3475 as_bad (_("missing type"));
3476 return;
3477 }
3478 ++input_line_pointer;
3479
3480 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3481
809ffe0d 3482 symbol_get_tc (sym)->output = 1;
252b5132 3483
6877bb43 3484 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3485
809ffe0d 3486 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3487
41ea10b1 3488 /* In this case :
99a814a1 3489
41ea10b1
TR		 3490 .bs name
3491 .stabx "z",arrays_,133,0
3492 .es
99a814a1 3493
41ea10b1 3494 .comm arrays_,13768,3
99a814a1 3495
41ea10b1
TR		 3496 resolve_symbol_value will copy the exp's "within" into sym's when the
3497 offset is 0. Since this seems to be corner case problem,
3498 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3499 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3500
3501 if (exp.X_op == O_symbol)
41ea10b1
TR		 3502 {
3503 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3504 }
6877bb43 3505 }
99a814a1 3506
252b5132
RH		 3507 if (exp.X_op != O_symbol
3508 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3509 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3510 ppc_frob_label (sym);
3511 else
3512 {
3513 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3514 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3515 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3516 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3517 }
3518
3519 demand_empty_rest_of_line ();
3520}
3521
3522/* The .function pseudo-op. This takes several arguments. The first
3523 argument seems to be the external name of the symbol. The second
67c1ffbe 3524 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3525 uses the same name for both. I have no idea what the third and
3526 fourth arguments are meant to be. The optional fifth argument is
3527 an expression for the size of the function. In COFF this symbol
3528 gets an aux entry like that used for a csect. */
3529
3530static void
3531ppc_function (ignore)
5480ccf3 3532 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3533{
3534 char *name;
3535 char endc;
3536 char *s;
3537 symbolS *ext_sym;
3538 symbolS *lab_sym;
3539
3540 name = input_line_pointer;
3541 endc = get_symbol_end ();
3542
3543 /* Ignore any [PR] suffix. */
3544 name = ppc_canonicalize_symbol_name (name);
3545 s = strchr (name, '[');
3546 if (s != (char *) NULL
3547 && strcmp (s + 1, "PR]") == 0)
3548 *s = '\0';
3549
3550 ext_sym = symbol_find_or_make (name);
3551
3552 *input_line_pointer = endc;
3553
3554 if (*input_line_pointer != ',')
3555 {
3556 as_bad (_("missing symbol name"));
3557 ignore_rest_of_line ();
3558 return;
3559 }
3560 ++input_line_pointer;
3561
3562 name = input_line_pointer;
3563 endc = get_symbol_end ();
3564
3565 lab_sym = symbol_find_or_make (name);
3566
3567 *input_line_pointer = endc;
3568
3569 if (ext_sym != lab_sym)
3570 {
809ffe0d
ILT		 3571 expressionS exp;
3572
3573 exp.X_op = O_symbol;
3574 exp.X_add_symbol = lab_sym;
3575 exp.X_op_symbol = NULL;
3576 exp.X_add_number = 0;
3577 exp.X_unsigned = 0;
3578 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3579 }
3580
809ffe0d
ILT		 3581 if (symbol_get_tc (ext_sym)->class == -1)
3582 symbol_get_tc (ext_sym)->class = XMC_PR;
3583 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3584
3585 if (*input_line_pointer == ',')
3586 {
3587 expressionS ignore;
3588
3589 /* Ignore the third argument. */
3590 ++input_line_pointer;
3591 expression (&ignore);
3592 if (*input_line_pointer == ',')
3593 {
3594 /* Ignore the fourth argument. */
3595 ++input_line_pointer;
3596 expression (&ignore);
3597 if (*input_line_pointer == ',')
3598 {
3599 /* The fifth argument is the function size. */
3600 ++input_line_pointer;
809ffe0d
ILT		 3601 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3602 absolute_section,
3603 (valueT) 0,
3604 &zero_address_frag);
3605 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3606 }
3607 }
3608 }
3609
3610 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3611 SF_SET_FUNCTION (ext_sym);
3612 SF_SET_PROCESS (ext_sym);
3613 coff_add_linesym (ext_sym);
3614
3615 demand_empty_rest_of_line ();
3616}
3617
3618/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3619 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3620 with the correct line number */
5d6255fe 3621
8642cce8 3622static symbolS *saved_bi_sym = 0;
252b5132
RH		 3623
3624static void
3625ppc_bf (ignore)
5480ccf3 3626 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3627{
3628 symbolS *sym;
3629
3630 sym = symbol_make (".bf");
3631 S_SET_SEGMENT (sym, text_section);
809ffe0d 3632 symbol_set_frag (sym, frag_now);
252b5132
RH		 3633 S_SET_VALUE (sym, frag_now_fix ());
3634 S_SET_STORAGE_CLASS (sym, C_FCN);
3635
3636 coff_line_base = get_absolute_expression ();
3637
3638 S_SET_NUMBER_AUXILIARY (sym, 1);
3639 SA_SET_SYM_LNNO (sym, coff_line_base);
3640
8642cce8 3641 /* Line number for bi. */
5d6255fe 3642 if (saved_bi_sym)
8642cce8
TR		 3643 {
3644 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3645 saved_bi_sym = 0;
3646 }
5d6255fe 3647
8642cce8 3648
809ffe0d 3649 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3650
3651 ppc_frob_label (sym);
3652
3653 demand_empty_rest_of_line ();
3654}
3655
3656/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3657 ".ef", except that the line number is absolute, not relative to the
3658 most recent ".bf" symbol. */
3659
3660static void
3661ppc_ef (ignore)
5480ccf3 3662 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3663{
3664 symbolS *sym;
3665
3666 sym = symbol_make (".ef");
3667 S_SET_SEGMENT (sym, text_section);
809ffe0d 3668 symbol_set_frag (sym, frag_now);
252b5132
RH		 3669 S_SET_VALUE (sym, frag_now_fix ());
3670 S_SET_STORAGE_CLASS (sym, C_FCN);
3671 S_SET_NUMBER_AUXILIARY (sym, 1);
3672 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3673 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3674
3675 ppc_frob_label (sym);
3676
3677 demand_empty_rest_of_line ();
3678}
3679
3680/* The .bi and .ei pseudo-ops. These take a string argument and
3681 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3682 the symbol list. The value of .bi will be know when the next .bf
3683 is encountered. */
252b5132
RH		 3684
3685static void
3686ppc_biei (ei)
3687 int ei;
3688{
3689 static symbolS *last_biei;
3690
3691 char *name;
3692 int len;
3693 symbolS *sym;
3694 symbolS *look;
3695
3696 name = demand_copy_C_string (&len);
3697
3698 /* The value of these symbols is actually file offset. Here we set
3699 the value to the index into the line number entries. In
3700 ppc_frob_symbols we set the fix_line field, which will cause BFD
3701 to do the right thing. */
3702
3703 sym = symbol_make (name);
3704 /* obj-coff.c currently only handles line numbers correctly in the
3705 .text section. */
3706 S_SET_SEGMENT (sym, text_section);
3707 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3708 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3709
3710 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3711 symbol_get_tc (sym)->output = 1;
81d4177b 3712
8642cce8 3713 /* Save bi. */
5d6255fe 3714 if (ei)
8642cce8
TR		 3715 saved_bi_sym = 0;
3716 else
3717 saved_bi_sym = sym;
3718
252b5132
RH		 3719 for (look = last_biei ? last_biei : symbol_rootP;
3720 (look != (symbolS *) NULL
3721 && (S_GET_STORAGE_CLASS (look) == C_FILE
3722 || S_GET_STORAGE_CLASS (look) == C_BINCL
3723 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3724 look = symbol_next (look))
3725 ;
3726 if (look != (symbolS *) NULL)
3727 {
3728 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3729 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3730 last_biei = sym;
3731 }
3732
3733 demand_empty_rest_of_line ();
3734}
3735
3736/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3737 There is one argument, which is a csect symbol. The value of the
3738 .bs symbol is the index of this csect symbol. */
3739
3740static void
3741ppc_bs (ignore)
5480ccf3 3742 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3743{
3744 char *name;
3745 char endc;
3746 symbolS *csect;
3747 symbolS *sym;
3748
3749 if (ppc_current_block != NULL)
3750 as_bad (_("nested .bs blocks"));
3751
3752 name = input_line_pointer;
3753 endc = get_symbol_end ();
3754
3755 csect = symbol_find_or_make (name);
3756
3757 *input_line_pointer = endc;
3758
3759 sym = symbol_make (".bs");
3760 S_SET_SEGMENT (sym, now_seg);
3761 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3762 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3763 symbol_get_tc (sym)->output = 1;
252b5132 3764
809ffe0d 3765 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3766
3767 ppc_frob_label (sym);
3768
3769 ppc_current_block = sym;
3770
3771 demand_empty_rest_of_line ();
3772}
3773
3774/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3775
3776static void
3777ppc_es (ignore)
5480ccf3 3778 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3779{
3780 symbolS *sym;
3781
3782 if (ppc_current_block == NULL)
3783 as_bad (_(".es without preceding .bs"));
3784
3785 sym = symbol_make (".es");
3786 S_SET_SEGMENT (sym, now_seg);
3787 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3788 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3789 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3790
3791 ppc_frob_label (sym);
3792
3793 ppc_current_block = NULL;
3794
3795 demand_empty_rest_of_line ();
3796}
3797
3798/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3799 line number. */
3800
3801static void
3802ppc_bb (ignore)
5480ccf3 3803 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3804{
3805 symbolS *sym;
3806
3807 sym = symbol_make (".bb");
3808 S_SET_SEGMENT (sym, text_section);
809ffe0d 3809 symbol_set_frag (sym, frag_now);
252b5132
RH		 3810 S_SET_VALUE (sym, frag_now_fix ());
3811 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3812
3813 S_SET_NUMBER_AUXILIARY (sym, 1);
3814 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3815
809ffe0d 3816 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3817
3818 SF_SET_PROCESS (sym);
3819
3820 ppc_frob_label (sym);
3821
3822 demand_empty_rest_of_line ();
3823}
3824
3825/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3826 line number. */
3827
3828static void
3829ppc_eb (ignore)
5480ccf3 3830 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3831{
3832 symbolS *sym;
3833
3834 sym = symbol_make (".eb");
3835 S_SET_SEGMENT (sym, text_section);
809ffe0d 3836 symbol_set_frag (sym, frag_now);
252b5132
RH		 3837 S_SET_VALUE (sym, frag_now_fix ());
3838 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3839 S_SET_NUMBER_AUXILIARY (sym, 1);
3840 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3841 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3842
3843 SF_SET_PROCESS (sym);
3844
3845 ppc_frob_label (sym);
3846
3847 demand_empty_rest_of_line ();
3848}
3849
3850/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3851 specified name. */
3852
3853static void
3854ppc_bc (ignore)
5480ccf3 3855 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3856{
3857 char *name;
3858 int len;
3859 symbolS *sym;
3860
3861 name = demand_copy_C_string (&len);
3862 sym = symbol_make (name);
3863 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3864 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3865 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3866 S_SET_VALUE (sym, 0);
809ffe0d 3867 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3868
3869 ppc_frob_label (sym);
3870
3871 demand_empty_rest_of_line ();
3872}
3873
3874/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3875
3876static void
3877ppc_ec (ignore)
5480ccf3 3878 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3879{
3880 symbolS *sym;
3881
3882 sym = symbol_make (".ec");
3883 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3884 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3885 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3886 S_SET_VALUE (sym, 0);
809ffe0d 3887 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3888
3889 ppc_frob_label (sym);
3890
3891 demand_empty_rest_of_line ();
3892}
3893
3894/* The .toc pseudo-op. Switch to the .toc subsegment. */
3895
3896static void
3897ppc_toc (ignore)
5480ccf3 3898 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3899{
3900 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3901 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3902 else
3903 {
3904 subsegT subseg;
3905 symbolS *sym;
3906 symbolS *list;
81d4177b 3907
252b5132
RH		 3908 subseg = ppc_data_subsegment;
3909 ++ppc_data_subsegment;
3910
3911 subseg_new (segment_name (data_section), subseg);
3912 ppc_toc_frag = frag_now;
3913
3914 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3915 symbol_set_frag (sym, frag_now);
252b5132
RH		 3916 S_SET_SEGMENT (sym, data_section);
3917 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3918 symbol_get_tc (sym)->subseg = subseg;
3919 symbol_get_tc (sym)->output = 1;
3920 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3921
3922 ppc_toc_csect = sym;
81d4177b 3923
252b5132 3924 for (list = ppc_data_csects;
809ffe0d
ILT		 3925 symbol_get_tc (list)->next != (symbolS *) NULL;
3926 list = symbol_get_tc (list)->next)
252b5132 3927 ;
809ffe0d 3928 symbol_get_tc (list)->next = sym;
252b5132
RH		 3929
3930 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3931 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3932 &symbol_lastP);
252b5132
RH		 3933 }
3934
3935 ppc_current_csect = ppc_toc_csect;
3936
3937 demand_empty_rest_of_line ();
3938}
3939
3940/* The AIX assembler automatically aligns the operands of a .long or
3941 .short pseudo-op, and we want to be compatible. */
3942
3943static void
3944ppc_xcoff_cons (log_size)
3945 int log_size;
3946{
3947 frag_align (log_size, 0, 0);
3948 record_alignment (now_seg, log_size);
3949 cons (1 << log_size);
3950}
3951
3952static void
3953ppc_vbyte (dummy)
5480ccf3 3954 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3955{
3956 expressionS exp;
3957 int byte_count;
3958
3959 (void) expression (&exp);
3960
3961 if (exp.X_op != O_constant)
3962 {
3963 as_bad (_("non-constant byte count"));
3964 return;
3965 }
3966
3967 byte_count = exp.X_add_number;
3968
3969 if (*input_line_pointer != ',')
3970 {
3971 as_bad (_("missing value"));
3972 return;
3973 }
3974
3975 ++input_line_pointer;
3976 cons (byte_count);
3977}
3978
3979#endif /* OBJ_XCOFF */
0baf16f2 3980#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3981\f
3982/* The .tc pseudo-op. This is used when generating either XCOFF or
3983 ELF. This takes two or more arguments.
3984
3985 When generating XCOFF output, the first argument is the name to
3986 give to this location in the toc; this will be a symbol with class
0baf16f2 3987 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3988 this location in the TOC; often there is just one more argument, a
1049f94e 3989 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3990 depends on target word size. A 32-bit target uses 4-byte values, a
3991 64-bit target uses 8-byte values.
252b5132
RH		 3992
3993 When not generating XCOFF output, the arguments are the same, but
3994 the first argument is simply ignored. */
3995
3996static void
3997ppc_tc (ignore)
92161534 3998 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3999{
4000#ifdef OBJ_XCOFF
4001
4002 /* Define the TOC symbol name. */
4003 {
4004 char *name;
4005 char endc;
4006 symbolS *sym;
4007
4008 if (ppc_toc_csect == (symbolS *) NULL
4009 || ppc_toc_csect != ppc_current_csect)
4010 {
4011 as_bad (_(".tc not in .toc section"));
4012 ignore_rest_of_line ();
4013 return;
4014 }
4015
4016 name = input_line_pointer;
4017 endc = get_symbol_end ();
4018
4019 sym = symbol_find_or_make (name);
4020
4021 *input_line_pointer = endc;
4022
4023 if (S_IS_DEFINED (sym))
4024 {
4025 symbolS *label;
4026
809ffe0d
ILT		 4027 label = symbol_get_tc (ppc_current_csect)->within;
4028 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4029 {
4030 as_bad (_(".tc with no label"));
4031 ignore_rest_of_line ();
4032 return;
4033 }
4034
4035 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4036 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4037 S_SET_VALUE (label, S_GET_VALUE (sym));
4038
4039 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4040 ++input_line_pointer;
4041
4042 return;
4043 }
4044
4045 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4046 symbol_set_frag (sym, frag_now);
252b5132 4047 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4048 symbol_get_tc (sym)->class = XMC_TC;
4049 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4050
4051 ppc_frob_label (sym);
4052 }
4053
0baf16f2
AM		 4054#endif /* OBJ_XCOFF */
4055#ifdef OBJ_ELF
9c7977b3 4056 int align;
252b5132
RH		 4057
4058 /* Skip the TOC symbol name. */
4059 while (is_part_of_name (*input_line_pointer)
4060 || *input_line_pointer == '['
4061 || *input_line_pointer == ']'
4062 || *input_line_pointer == '{'
4063 || *input_line_pointer == '}')
4064 ++input_line_pointer;
4065
0baf16f2 4066 /* Align to a four/eight byte boundary. */
2b3c4602 4067 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4068 frag_align (align, 0, 0);
4069 record_alignment (now_seg, align);
0baf16f2 4070#endif /* OBJ_ELF */
252b5132
RH		 4071
4072 if (*input_line_pointer != ',')
4073 demand_empty_rest_of_line ();
4074 else
4075 {
4076 ++input_line_pointer;
2b3c4602 4077 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4078 }
4079}
0baf16f2
AM		 4080
4081/* Pseudo-op .machine. */
0baf16f2
AM		 4082
4083static void
4084ppc_machine (ignore)
4085 int ignore ATTRIBUTE_UNUSED;
4086{
69c040df
AM		 4087 char *cpu_string;
4088#define MAX_HISTORY 100
4089 static unsigned long *cpu_history;
4090 static int curr_hist;
4091
4092 SKIP_WHITESPACE ();
4093
4094 if (*input_line_pointer == '"')
4095 {
4096 int len;
4097 cpu_string = demand_copy_C_string (&len);
4098 }
4099 else
4100 {
4101 char c;
4102 cpu_string = input_line_pointer;
4103 c = get_symbol_end ();
4104 cpu_string = xstrdup (cpu_string);
4105 *input_line_pointer = c;
4106 }
4107
4108 if (cpu_string != NULL)
4109 {
4110 unsigned long old_cpu = ppc_cpu;
4111 char *p;
4112
4113 for (p = cpu_string; *p != 0; p++)
4114 *p = TOLOWER (*p);
4115
4116 if (strcmp (cpu_string, "push") == 0)
4117 {
4118 if (cpu_history == NULL)
4119 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4120
4121 if (curr_hist >= MAX_HISTORY)
4122 as_bad (_(".machine stack overflow"));
4123 else
4124 cpu_history[curr_hist++] = ppc_cpu;
4125 }
4126 else if (strcmp (cpu_string, "pop") == 0)
4127 {
4128 if (curr_hist <= 0)
4129 as_bad (_(".machine stack underflow"));
4130 else
4131 ppc_cpu = cpu_history[--curr_hist];
4132 }
4133 else if (parse_cpu (cpu_string))
4134 ;
4135 else
4136 as_bad (_("invalid machine `%s'"), cpu_string);
4137
4138 if (ppc_cpu != old_cpu)
4139 ppc_setup_opcodes ();
4140 }
4141
4142 demand_empty_rest_of_line ();
0baf16f2
AM		 4143}
4144
4145/* See whether a symbol is in the TOC section. */
4146
4147static int
4148ppc_is_toc_sym (sym)
4149 symbolS *sym;
4150{
4151#ifdef OBJ_XCOFF
4152 return symbol_get_tc (sym)->class == XMC_TC;
4153#endif
4154#ifdef OBJ_ELF
4155 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4156 if (ppc_obj64)
0baf16f2
AM		 4157 return strcmp (sname, ".toc") == 0;
4158 else
4159 return strcmp (sname, ".got") == 0;
4160#endif
4161}
4162#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4163\f
4164#ifdef TE_PE
4165
99a814a1 4166/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4167
4168/* Set the current section. */
4169static void
4170ppc_set_current_section (new)
4171 segT new;
4172{
4173 ppc_previous_section = ppc_current_section;
4174 ppc_current_section = new;
4175}
4176
4177/* pseudo-op: .previous
4178 behaviour: toggles the current section with the previous section.
4179 errors: None
99a814a1
AM		 4180 warnings: "No previous section" */
4181
252b5132 4182static void
99a814a1 4183ppc_previous (ignore)
5480ccf3 4184 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4185{
4186 symbolS *tmp;
4187
81d4177b 4188 if (ppc_previous_section == NULL)
252b5132 4189 {
99a814a1 4190 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4191 return;
4192 }
4193
99a814a1 4194 subseg_set (ppc_previous_section, 0);
252b5132 4195
99a814a1 4196 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4197}
4198
4199/* pseudo-op: .pdata
4200 behaviour: predefined read only data section
b34976b6 4201 double word aligned
252b5132
RH		 4202 errors: None
4203 warnings: None
4204 initial: .section .pdata "adr3"
b34976b6 4205 a - don't know -- maybe a misprint
252b5132
RH		 4206 d - initialized data
4207 r - readable
4208 3 - double word aligned (that would be 4 byte boundary)
4209
4210 commentary:
4211 Tag index tables (also known as the function table) for exception
99a814a1 4212 handling, debugging, etc. */
252b5132 4213
252b5132 4214static void
99a814a1 4215ppc_pdata (ignore)
5480ccf3 4216 int ignore ATTRIBUTE_UNUSED;
252b5132 4217{
81d4177b 4218 if (pdata_section == 0)
252b5132
RH		 4219 {
4220 pdata_section = subseg_new (".pdata", 0);
81d4177b 4221
252b5132
RH		 4222 bfd_set_section_flags (stdoutput, pdata_section,
4223 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4224 | SEC_READONLY | SEC_DATA ));
81d4177b 4225
252b5132
RH		 4226 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4227 }
4228 else
4229 {
99a814a1 4230 pdata_section = subseg_new (".pdata", 0);
252b5132 4231 }
99a814a1 4232 ppc_set_current_section (pdata_section);
252b5132
RH		 4233}
4234
4235/* pseudo-op: .ydata
4236 behaviour: predefined read only data section
b34976b6 4237 double word aligned
252b5132
RH		 4238 errors: None
4239 warnings: None
4240 initial: .section .ydata "drw3"
b34976b6 4241 a - don't know -- maybe a misprint
252b5132
RH		 4242 d - initialized data
4243 r - readable
4244 3 - double word aligned (that would be 4 byte boundary)
4245 commentary:
4246 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4247 debugging, etc. */
4248
252b5132 4249static void
99a814a1 4250ppc_ydata (ignore)
5480ccf3 4251 int ignore ATTRIBUTE_UNUSED;
252b5132 4252{
81d4177b 4253 if (ydata_section == 0)
252b5132
RH		 4254 {
4255 ydata_section = subseg_new (".ydata", 0);
4256 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4257 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4258 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4259
4260 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4261 }
4262 else
4263 {
4264 ydata_section = subseg_new (".ydata", 0);
4265 }
99a814a1 4266 ppc_set_current_section (ydata_section);
252b5132
RH		 4267}
4268
4269/* pseudo-op: .reldata
4270 behaviour: predefined read write data section
b34976b6 4271 double word aligned (4-byte)
252b5132
RH		 4272 FIXME: relocation is applied to it
4273 FIXME: what's the difference between this and .data?
4274 errors: None
4275 warnings: None
4276 initial: .section .reldata "drw3"
4277 d - initialized data
4278 r - readable
4279 w - writeable
4280 3 - double word aligned (that would be 8 byte boundary)
4281
4282 commentary:
4283 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4284 function descriptors, etc. */
4285
252b5132 4286static void
99a814a1 4287ppc_reldata (ignore)
5480ccf3 4288 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4289{
4290 if (reldata_section == 0)
4291 {
4292 reldata_section = subseg_new (".reldata", 0);
4293
4294 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4295 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4296 | SEC_DATA));
252b5132
RH		 4297
4298 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4299 }
4300 else
4301 {
4302 reldata_section = subseg_new (".reldata", 0);
4303 }
99a814a1 4304 ppc_set_current_section (reldata_section);
252b5132
RH		 4305}
4306
4307/* pseudo-op: .rdata
4308 behaviour: predefined read only data section
b34976b6 4309 double word aligned
252b5132
RH		 4310 errors: None
4311 warnings: None
4312 initial: .section .rdata "dr3"
4313 d - initialized data
4314 r - readable
99a814a1
AM		 4315 3 - double word aligned (that would be 4 byte boundary) */
4316
252b5132 4317static void
99a814a1 4318ppc_rdata (ignore)
5480ccf3 4319 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4320{
4321 if (rdata_section == 0)
4322 {
4323 rdata_section = subseg_new (".rdata", 0);
4324 bfd_set_section_flags (stdoutput, rdata_section,
4325 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4326 | SEC_READONLY | SEC_DATA ));
4327
4328 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4329 }
4330 else
4331 {
4332 rdata_section = subseg_new (".rdata", 0);
4333 }
99a814a1 4334 ppc_set_current_section (rdata_section);
252b5132
RH		 4335}
4336
4337/* pseudo-op: .ualong
81d4177b 4338 behaviour: much like .int, with the exception that no alignment is
b34976b6 4339 performed.
252b5132
RH		 4340 FIXME: test the alignment statement
4341 errors: None
99a814a1
AM		 4342 warnings: None */
4343
252b5132 4344static void
99a814a1 4345ppc_ualong (ignore)
5480ccf3 4346 int ignore ATTRIBUTE_UNUSED;
252b5132 4347{
99a814a1
AM		 4348 /* Try for long. */
4349 cons (4);
252b5132
RH		 4350}
4351
4352/* pseudo-op: .znop <symbol name>
4353 behaviour: Issue a nop instruction
b34976b6 4354 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4355 the supplied symbol name.
4356 errors: None
99a814a1
AM		 4357 warnings: Missing symbol name */
4358
252b5132 4359static void
99a814a1 4360ppc_znop (ignore)
5480ccf3 4361 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4362{
4363 unsigned long insn;
4364 const struct powerpc_opcode *opcode;
4365 expressionS ex;
4366 char *f;
252b5132 4367 symbolS *sym;
252b5132
RH		 4368 char *symbol_name;
4369 char c;
4370 char *name;
4371 unsigned int exp;
4372 flagword flags;
4373 asection *sec;
4374
99a814a1 4375 /* Strip out the symbol name. */
252b5132
RH		 4376 symbol_name = input_line_pointer;
4377 c = get_symbol_end ();
4378
4379 name = xmalloc (input_line_pointer - symbol_name + 1);
4380 strcpy (name, symbol_name);
4381
4382 sym = symbol_find_or_make (name);
4383
4384 *input_line_pointer = c;
4385
4386 SKIP_WHITESPACE ();
4387
4388 /* Look up the opcode in the hash table. */
4389 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4390
99a814a1 4391 /* Stick in the nop. */
252b5132
RH		 4392 insn = opcode->opcode;
4393
4394 /* Write out the instruction. */
4395 f = frag_more (4);
4396 md_number_to_chars (f, insn, 4);
4397 fix_new (frag_now,
4398 f - frag_now->fr_literal,
4399 4,
4400 sym,
4401 0,
4402 0,
4403 BFD_RELOC_16_GOT_PCREL);
4404
4405}
4406
81d4177b
KH		 4407/* pseudo-op:
4408 behaviour:
4409 errors:
99a814a1
AM		 4410 warnings: */
4411
252b5132 4412static void
99a814a1 4413ppc_pe_comm (lcomm)
252b5132
RH		 4414 int lcomm;
4415{
4416 register char *name;
4417 register char c;
4418 register char *p;
4419 offsetT temp;
4420 register symbolS *symbolP;
4421 offsetT align;
4422
4423 name = input_line_pointer;
4424 c = get_symbol_end ();
4425
99a814a1 4426 /* just after name is now '\0'. */
252b5132
RH		 4427 p = input_line_pointer;
4428 *p = c;
4429 SKIP_WHITESPACE ();
4430 if (*input_line_pointer != ',')
4431 {
4432 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4433 ignore_rest_of_line ();
4434 return;
4435 }
4436
4437 input_line_pointer++; /* skip ',' */
4438 if ((temp = get_absolute_expression ()) < 0)
4439 {
4440 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4441 ignore_rest_of_line ();
4442 return;
4443 }
4444
4445 if (! lcomm)
4446 {
4447 /* The third argument to .comm is the alignment. */
4448 if (*input_line_pointer != ',')
4449 align = 3;
4450 else
4451 {
4452 ++input_line_pointer;
4453 align = get_absolute_expression ();
4454 if (align <= 0)
4455 {
4456 as_warn (_("ignoring bad alignment"));
4457 align = 3;
4458 }
4459 }
4460 }
4461
4462 *p = 0;
4463 symbolP = symbol_find_or_make (name);
4464
4465 *p = c;
4466 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4467 {
4468 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4469 S_GET_NAME (symbolP));
4470 ignore_rest_of_line ();
4471 return;
4472 }
4473
4474 if (S_GET_VALUE (symbolP))
4475 {
4476 if (S_GET_VALUE (symbolP) != (valueT) temp)
4477 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4478 S_GET_NAME (symbolP),
4479 (long) S_GET_VALUE (symbolP),
4480 (long) temp);
4481 }
4482 else
4483 {
4484 S_SET_VALUE (symbolP, (valueT) temp);
4485 S_SET_EXTERNAL (symbolP);
86ebace2 4486 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4487 }
4488
4489 demand_empty_rest_of_line ();
4490}
4491
4492/*
4493 * implement the .section pseudo op:
4494 * .section name {, "flags"}
4495 * ^ ^
4496 * | +--- optional flags: 'b' for bss
4497 * | 'i' for info
4498 * +-- section name 'l' for lib
4499 * 'n' for noload
4500 * 'o' for over
4501 * 'w' for data
4502 * 'd' (apparently m88k for data)
4503 * 'x' for text
4504 * But if the argument is not a quoted string, treat it as a
4505 * subsegment number.
4506 *
4507 * FIXME: this is a copy of the section processing from obj-coff.c, with
4508 * additions/changes for the moto-pas assembler support. There are three
4509 * categories:
4510 *
81d4177b 4511 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4512 * setting bits that bfd probably neither understands or uses. The
4513 * correct approach (?) will have to incorporate extra fields attached
4514 * to the section to hold the system specific stuff. (krk)
4515 *
4516 * Section Contents:
4517 * 'a' - unknown - referred to in documentation, but no definition supplied
4518 * 'c' - section has code
4519 * 'd' - section has initialized data
4520 * 'u' - section has uninitialized data
4521 * 'i' - section contains directives (info)
4522 * 'n' - section can be discarded
4523 * 'R' - remove section at link time
4524 *
4525 * Section Protection:
4526 * 'r' - section is readable
4527 * 'w' - section is writeable
4528 * 'x' - section is executable
4529 * 's' - section is sharable
4530 *
4531 * Section Alignment:
4532 * '0' - align to byte boundary
4533 * '1' - align to halfword undary
4534 * '2' - align to word boundary
4535 * '3' - align to doubleword boundary
4536 * '4' - align to quadword boundary
4537 * '5' - align to 32 byte boundary
4538 * '6' - align to 64 byte boundary
4539 *
4540 */
4541
4542void
4543ppc_pe_section (ignore)
5480ccf3 4544 int ignore ATTRIBUTE_UNUSED;
252b5132 4545{
99a814a1 4546 /* Strip out the section name. */
252b5132
RH		 4547 char *section_name;
4548 char c;
4549 char *name;
4550 unsigned int exp;
4551 flagword flags;
4552 segT sec;
4553 int align;
4554
4555 section_name = input_line_pointer;
4556 c = get_symbol_end ();
4557
4558 name = xmalloc (input_line_pointer - section_name + 1);
4559 strcpy (name, section_name);
4560
4561 *input_line_pointer = c;
4562
4563 SKIP_WHITESPACE ();
4564
4565 exp = 0;
4566 flags = SEC_NO_FLAGS;
4567
4568 if (strcmp (name, ".idata$2") == 0)
4569 {
4570 align = 0;
4571 }
4572 else if (strcmp (name, ".idata$3") == 0)
4573 {
4574 align = 0;
4575 }
4576 else if (strcmp (name, ".idata$4") == 0)
4577 {
4578 align = 2;
4579 }
4580 else if (strcmp (name, ".idata$5") == 0)
4581 {
4582 align = 2;
4583 }
4584 else if (strcmp (name, ".idata$6") == 0)
4585 {
4586 align = 1;
4587 }
4588 else
99a814a1
AM		 4589 /* Default alignment to 16 byte boundary. */
4590 align = 4;
252b5132
RH		 4591
4592 if (*input_line_pointer == ',')
4593 {
4594 ++input_line_pointer;
4595 SKIP_WHITESPACE ();
4596 if (*input_line_pointer != '"')
4597 exp = get_absolute_expression ();
4598 else
4599 {
4600 ++input_line_pointer;
4601 while (*input_line_pointer != '"'
4602 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4603 {
4604 switch (*input_line_pointer)
4605 {
4606 /* Section Contents */
4607 case 'a': /* unknown */
4608 as_bad (_("Unsupported section attribute -- 'a'"));
4609 break;
4610 case 'c': /* code section */
81d4177b 4611 flags |= SEC_CODE;
252b5132
RH		 4612 break;
4613 case 'd': /* section has initialized data */
4614 flags |= SEC_DATA;
4615 break;
4616 case 'u': /* section has uninitialized data */
4617 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4618 in winnt.h */
4619 flags |= SEC_ROM;
4620 break;
4621 case 'i': /* section contains directives (info) */
4622 /* FIXME: This is IMAGE_SCN_LNK_INFO
4623 in winnt.h */
4624 flags |= SEC_HAS_CONTENTS;
4625 break;
4626 case 'n': /* section can be discarded */
81d4177b 4627 flags &=~ SEC_LOAD;
252b5132
RH		 4628 break;
4629 case 'R': /* Remove section at link time */
4630 flags |= SEC_NEVER_LOAD;
4631 break;
4632
4633 /* Section Protection */
4634 case 'r': /* section is readable */
4635 flags |= IMAGE_SCN_MEM_READ;
4636 break;
4637 case 'w': /* section is writeable */
4638 flags |= IMAGE_SCN_MEM_WRITE;
4639 break;
4640 case 'x': /* section is executable */
4641 flags |= IMAGE_SCN_MEM_EXECUTE;
4642 break;
4643 case 's': /* section is sharable */
4644 flags |= IMAGE_SCN_MEM_SHARED;
4645 break;
4646
4647 /* Section Alignment */
4648 case '0': /* align to byte boundary */
4649 flags |= IMAGE_SCN_ALIGN_1BYTES;
4650 align = 0;
4651 break;
4652 case '1': /* align to halfword boundary */
4653 flags |= IMAGE_SCN_ALIGN_2BYTES;
4654 align = 1;
4655 break;
4656 case '2': /* align to word boundary */
4657 flags |= IMAGE_SCN_ALIGN_4BYTES;
4658 align = 2;
4659 break;
4660 case '3': /* align to doubleword boundary */
4661 flags |= IMAGE_SCN_ALIGN_8BYTES;
4662 align = 3;
4663 break;
4664 case '4': /* align to quadword boundary */
4665 flags |= IMAGE_SCN_ALIGN_16BYTES;
4666 align = 4;
4667 break;
4668 case '5': /* align to 32 byte boundary */
4669 flags |= IMAGE_SCN_ALIGN_32BYTES;
4670 align = 5;
4671 break;
4672 case '6': /* align to 64 byte boundary */
4673 flags |= IMAGE_SCN_ALIGN_64BYTES;
4674 align = 6;
4675 break;
4676
4677 default:
99a814a1
AM		 4678 as_bad (_("unknown section attribute '%c'"),
4679 *input_line_pointer);
252b5132
RH		 4680 break;
4681 }
4682 ++input_line_pointer;
4683 }
4684 if (*input_line_pointer == '"')
4685 ++input_line_pointer;
4686 }
4687 }
4688
4689 sec = subseg_new (name, (subsegT) exp);
4690
99a814a1 4691 ppc_set_current_section (sec);
252b5132
RH		 4692
4693 if (flags != SEC_NO_FLAGS)
4694 {
4695 if (! bfd_set_section_flags (stdoutput, sec, flags))
4696 as_bad (_("error setting flags for \"%s\": %s"),
4697 bfd_section_name (stdoutput, sec),
4698 bfd_errmsg (bfd_get_error ()));
4699 }
4700
99a814a1 4701 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4702
4703}
4704
4705static void
4706ppc_pe_function (ignore)
5480ccf3 4707 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4708{
4709 char *name;
4710 char endc;
4711 symbolS *ext_sym;
4712
4713 name = input_line_pointer;
4714 endc = get_symbol_end ();
4715
4716 ext_sym = symbol_find_or_make (name);
4717
4718 *input_line_pointer = endc;
4719
4720 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4721 SF_SET_FUNCTION (ext_sym);
4722 SF_SET_PROCESS (ext_sym);
4723 coff_add_linesym (ext_sym);
4724
4725 demand_empty_rest_of_line ();
4726}
4727
4728static void
4729ppc_pe_tocd (ignore)
5480ccf3 4730 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4731{
4732 if (tocdata_section == 0)
4733 {
4734 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4735 /* FIXME: section flags won't work. */
252b5132
RH		 4736 bfd_set_section_flags (stdoutput, tocdata_section,
4737 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4738 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4739
4740 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4741 }
4742 else
4743 {
4744 rdata_section = subseg_new (".tocd", 0);
4745 }
4746
99a814a1 4747 ppc_set_current_section (tocdata_section);
252b5132
RH		 4748
4749 demand_empty_rest_of_line ();
4750}
4751
4752/* Don't adjust TOC relocs to use the section symbol. */
4753
4754int
4755ppc_pe_fix_adjustable (fix)
4756 fixS *fix;
4757{
4758 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4759}
4760
4761#endif
4762\f
4763#ifdef OBJ_XCOFF
4764
4765/* XCOFF specific symbol and file handling. */
4766
4767/* Canonicalize the symbol name. We use the to force the suffix, if
4768 any, to use square brackets, and to be in upper case. */
4769
4770char *
4771ppc_canonicalize_symbol_name (name)
4772 char *name;
4773{
4774 char *s;
4775
4776 if (ppc_stab_symbol)
4777 return name;
4778
4779 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4780 ;
4781 if (*s != '\0')
4782 {
4783 char brac;
4784
4785 if (*s == '[')
4786 brac = ']';
4787 else
4788 {
4789 *s = '[';
4790 brac = '}';
4791 }
4792
4793 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4794 *s = TOUPPER (*s);
252b5132
RH		 4795
4796 if (*s == '\0' || s[1] != '\0')
4797 as_bad (_("bad symbol suffix"));
4798
4799 *s = ']';
4800 }
4801
4802 return name;
4803}
4804
4805/* Set the class of a symbol based on the suffix, if any. This is
4806 called whenever a new symbol is created. */
4807
4808void
4809ppc_symbol_new_hook (sym)
4810 symbolS *sym;
4811{
809ffe0d 4812 struct ppc_tc_sy *tc;
252b5132
RH		 4813 const char *s;
4814
809ffe0d
ILT		 4815 tc = symbol_get_tc (sym);
4816 tc->next = NULL;
4817 tc->output = 0;
4818 tc->class = -1;
4819 tc->real_name = NULL;
4820 tc->subseg = 0;
4821 tc->align = 0;
4822 tc->size = NULL;
4823 tc->within = NULL;
252b5132
RH		 4824
4825 if (ppc_stab_symbol)
4826 return;
4827
4828 s = strchr (S_GET_NAME (sym), '[');
4829 if (s == (const char *) NULL)
4830 {
4831 /* There is no suffix. */
4832 return;
4833 }
4834
4835 ++s;
4836
4837 switch (s[0])
4838 {
4839 case 'B':
4840 if (strcmp (s, "BS]") == 0)
809ffe0d 4841 tc->class = XMC_BS;
252b5132
RH		 4842 break;
4843 case 'D':
4844 if (strcmp (s, "DB]") == 0)
809ffe0d 4845 tc->class = XMC_DB;
252b5132 4846 else if (strcmp (s, "DS]") == 0)
809ffe0d 4847 tc->class = XMC_DS;
252b5132
RH		 4848 break;
4849 case 'G':
4850 if (strcmp (s, "GL]") == 0)
809ffe0d 4851 tc->class = XMC_GL;
252b5132
RH		 4852 break;
4853 case 'P':
4854 if (strcmp (s, "PR]") == 0)
809ffe0d 4855 tc->class = XMC_PR;
252b5132
RH		 4856 break;
4857 case 'R':
4858 if (strcmp (s, "RO]") == 0)
809ffe0d 4859 tc->class = XMC_RO;
252b5132 4860 else if (strcmp (s, "RW]") == 0)
809ffe0d 4861 tc->class = XMC_RW;
252b5132
RH		 4862 break;
4863 case 'S':
4864 if (strcmp (s, "SV]") == 0)
809ffe0d 4865 tc->class = XMC_SV;
252b5132
RH		 4866 break;
4867 case 'T':
4868 if (strcmp (s, "TC]") == 0)
809ffe0d 4869 tc->class = XMC_TC;
252b5132 4870 else if (strcmp (s, "TI]") == 0)
809ffe0d 4871 tc->class = XMC_TI;
252b5132 4872 else if (strcmp (s, "TB]") == 0)
809ffe0d 4873 tc->class = XMC_TB;
252b5132 4874 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4875 tc->class = XMC_TC0;
252b5132
RH		 4876 break;
4877 case 'U':
4878 if (strcmp (s, "UA]") == 0)
809ffe0d 4879 tc->class = XMC_UA;
252b5132 4880 else if (strcmp (s, "UC]") == 0)
809ffe0d 4881 tc->class = XMC_UC;
252b5132
RH		 4882 break;
4883 case 'X':
4884 if (strcmp (s, "XO]") == 0)
809ffe0d 4885 tc->class = XMC_XO;
252b5132
RH		 4886 break;
4887 }
4888
809ffe0d 4889 if (tc->class == -1)
252b5132
RH		 4890 as_bad (_("Unrecognized symbol suffix"));
4891}
4892
4893/* Set the class of a label based on where it is defined. This
4894 handles symbols without suffixes. Also, move the symbol so that it
4895 follows the csect symbol. */
4896
4897void
4898ppc_frob_label (sym)
4899 symbolS *sym;
4900{
4901 if (ppc_current_csect != (symbolS *) NULL)
4902 {
809ffe0d
ILT		 4903 if (symbol_get_tc (sym)->class == -1)
4904 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4905
4906 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4907 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4908 &symbol_rootP, &symbol_lastP);
4909 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4910 }
07a53e5c
RH		 4911
4912#ifdef OBJ_ELF
4913 dwarf2_emit_label (sym);
4914#endif
252b5132
RH		 4915}
4916
4917/* This variable is set by ppc_frob_symbol if any absolute symbols are
4918 seen. It tells ppc_adjust_symtab whether it needs to look through
4919 the symbols. */
4920
b34976b6 4921static bfd_boolean ppc_saw_abs;
252b5132
RH		 4922
4923/* Change the name of a symbol just before writing it out. Set the
4924 real name if the .rename pseudo-op was used. Otherwise, remove any
4925 class suffix. Return 1 if the symbol should not be included in the
4926 symbol table. */
4927
4928int
4929ppc_frob_symbol (sym)
4930 symbolS *sym;
4931{
4932 static symbolS *ppc_last_function;
4933 static symbolS *set_end;
4934
4935 /* Discard symbols that should not be included in the output symbol
4936 table. */
809ffe0d
ILT		 4937 if (! symbol_used_in_reloc_p (sym)
4938 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4939 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4940 && ! symbol_get_tc (sym)->output
252b5132
RH		 4941 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4942 return 1;
4943
a161fe53
AM		 4944 /* This one will disappear anyway. Don't make a csect sym for it. */
4945 if (sym == abs_section_sym)
4946 return 1;
4947
809ffe0d
ILT		 4948 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4949 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4950 else
4951 {
4952 const char *name;
4953 const char *s;
4954
4955 name = S_GET_NAME (sym);
4956 s = strchr (name, '[');
4957 if (s != (char *) NULL)
4958 {
4959 unsigned int len;
4960 char *snew;
4961
4962 len = s - name;
4963 snew = xmalloc (len + 1);
4964 memcpy (snew, name, len);
4965 snew[len] = '\0';
4966
4967 S_SET_NAME (sym, snew);
4968 }
4969 }
4970
4971 if (set_end != (symbolS *) NULL)
4972 {
4973 SA_SET_SYM_ENDNDX (set_end, sym);
4974 set_end = NULL;
4975 }
4976
4977 if (SF_GET_FUNCTION (sym))
4978 {
4979 if (ppc_last_function != (symbolS *) NULL)
4980 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4981 ppc_last_function = sym;
809ffe0d 4982 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4983 {
6386f3a7 4984 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4985 SA_SET_SYM_FSIZE (sym,
4986 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4987 }
4988 }
4989 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4990 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4991 {
4992 if (ppc_last_function == (symbolS *) NULL)
4993 as_bad (_(".ef with no preceding .function"));
4994 else
4995 {
4996 set_end = ppc_last_function;
4997 ppc_last_function = NULL;
4998
4999 /* We don't have a C_EFCN symbol, but we need to force the
5000 COFF backend to believe that it has seen one. */
5001 coff_last_function = NULL;
5002 }
5003 }
5004
670ec21d 5005 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5006 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5007 && S_GET_STORAGE_CLASS (sym) != C_FILE
5008 && S_GET_STORAGE_CLASS (sym) != C_FCN
5009 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5010 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5011 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5012 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5013 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5014 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5015 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5016
5017 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5018 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5019 {
5020 int i;
5021 union internal_auxent *a;
5022
5023 /* Create a csect aux. */
5024 i = S_GET_NUMBER_AUXILIARY (sym);
5025 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5026 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5027 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5028 {
5029 /* This is the TOC table. */
5030 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5031 a->x_csect.x_scnlen.l = 0;
5032 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5033 }
809ffe0d 5034 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5035 {
5036 /* This is a csect symbol. x_scnlen is the size of the
5037 csect. */
809ffe0d 5038 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5039 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5040 S_GET_SEGMENT (sym))
5041 - S_GET_VALUE (sym));
5042 else
5043 {
6386f3a7 5044 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5045 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5046 - S_GET_VALUE (sym));
5047 }
809ffe0d 5048 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5049 }
5050 else if (S_GET_SEGMENT (sym) == bss_section)
5051 {
5052 /* This is a common symbol. */
809ffe0d
ILT		 5053 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5054 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5055 if (S_IS_EXTERNAL (sym))
809ffe0d 5056 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5057 else
809ffe0d 5058 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5059 }
5060 else if (S_GET_SEGMENT (sym) == absolute_section)
5061 {
5062 /* This is an absolute symbol. The csect will be created by
99a814a1 5063 ppc_adjust_symtab. */
b34976b6 5064 ppc_saw_abs = TRUE;
252b5132 5065 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5066 if (symbol_get_tc (sym)->class == -1)
5067 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5068 }
5069 else if (! S_IS_DEFINED (sym))
5070 {
5071 /* This is an external symbol. */
5072 a->x_csect.x_scnlen.l = 0;
5073 a->x_csect.x_smtyp = XTY_ER;
5074 }
809ffe0d 5075 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5076 {
5077 symbolS *next;
5078
5079 /* This is a TOC definition. x_scnlen is the size of the
5080 TOC entry. */
5081 next = symbol_next (sym);
809ffe0d 5082 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5083 next = symbol_next (next);
5084 if (next == (symbolS *) NULL
809ffe0d 5085 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5086 {
5087 if (ppc_after_toc_frag == (fragS *) NULL)
5088 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5089 data_section)
5090 - S_GET_VALUE (sym));
5091 else
5092 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5093 - S_GET_VALUE (sym));
5094 }
5095 else
5096 {
6386f3a7 5097 resolve_symbol_value (next);
252b5132
RH		 5098 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5099 - S_GET_VALUE (sym));
5100 }
5101 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5102 }
5103 else
5104 {
5105 symbolS *csect;
5106
5107 /* This is a normal symbol definition. x_scnlen is the
5108 symbol index of the containing csect. */
5109 if (S_GET_SEGMENT (sym) == text_section)
5110 csect = ppc_text_csects;
5111 else if (S_GET_SEGMENT (sym) == data_section)
5112 csect = ppc_data_csects;
5113 else
5114 abort ();
5115
5116 /* Skip the initial dummy symbol. */
809ffe0d 5117 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5118
5119 if (csect == (symbolS *) NULL)
5120 {
5121 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5122 a->x_csect.x_scnlen.l = 0;
5123 }
5124 else
5125 {
809ffe0d 5126 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5127 {
6386f3a7 5128 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5129 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5130 > S_GET_VALUE (sym))
252b5132 5131 break;
809ffe0d 5132 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5133 }
5134
809ffe0d
ILT		 5135 a->x_csect.x_scnlen.p =
5136 coffsymbol (symbol_get_bfdsym (csect))->native;
5137 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5138 1;
252b5132
RH		 5139 }
5140 a->x_csect.x_smtyp = XTY_LD;
5141 }
81d4177b 5142
252b5132
RH		 5143 a->x_csect.x_parmhash = 0;
5144 a->x_csect.x_snhash = 0;
809ffe0d 5145 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5146 a->x_csect.x_smclas = XMC_PR;
5147 else
809ffe0d 5148 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5149 a->x_csect.x_stab = 0;
5150 a->x_csect.x_snstab = 0;
5151
5152 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5153 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5154 }
5155 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5156 {
5157 /* We want the value to be the symbol index of the referenced
5158 csect symbol. BFD will do that for us if we set the right
5159 flags. */
b782de16
AM		 5160 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5161 combined_entry_type *c = coffsymbol (bsym)->native;
5162
5163 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5164 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5165 }
5166 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5167 {
5168 symbolS *block;
5169 symbolS *csect;
5170
5171 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5172 block = symbol_get_tc (sym)->within;
5173 csect = symbol_get_tc (block)->within;
6386f3a7 5174 resolve_symbol_value (csect);
252b5132
RH		 5175 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5176 }
5177 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5178 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5179 {
5180 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5181 BFD will do that for us if we set the right flags. We have
5182 already set the value correctly. */
809ffe0d 5183 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5184 }
5185
5186 return 0;
5187}
5188
5189/* Adjust the symbol table. This creates csect symbols for all
5190 absolute symbols. */
5191
5192void
5193ppc_adjust_symtab ()
5194{
5195 symbolS *sym;
5196
5197 if (! ppc_saw_abs)
5198 return;
5199
5200 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5201 {
5202 symbolS *csect;
5203 int i;
5204 union internal_auxent *a;
5205
5206 if (S_GET_SEGMENT (sym) != absolute_section)
5207 continue;
5208
5209 csect = symbol_create (".abs[XO]", absolute_section,
5210 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5211 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5212 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5213 i = S_GET_NUMBER_AUXILIARY (csect);
5214 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5215 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5216 a->x_csect.x_scnlen.l = 0;
5217 a->x_csect.x_smtyp = XTY_SD;
5218 a->x_csect.x_parmhash = 0;
5219 a->x_csect.x_snhash = 0;
5220 a->x_csect.x_smclas = XMC_XO;
5221 a->x_csect.x_stab = 0;
5222 a->x_csect.x_snstab = 0;
5223
5224 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5225
5226 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5227 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5228 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5229 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5230 }
5231
b34976b6 5232 ppc_saw_abs = FALSE;
252b5132
RH		 5233}
5234
5235/* Set the VMA for a section. This is called on all the sections in
5236 turn. */
5237
5238void
5239ppc_frob_section (sec)
5240 asection *sec;
5241{
931e13a6 5242 static bfd_vma vma = 0;
252b5132 5243
931e13a6 5244 vma = md_section_align (sec, vma);
252b5132
RH		 5245 bfd_set_section_vma (stdoutput, sec, vma);
5246 vma += bfd_section_size (stdoutput, sec);
5247}
5248
5249#endif /* OBJ_XCOFF */
5250\f
5251/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5252 of type TYPE, and store the appropriate bytes in *LITP. The number
5253 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5254 returned, or NULL on OK. */
5255
5256char *
5257md_atof (type, litp, sizep)
5258 int type;
5259 char *litp;
5260 int *sizep;
5261{
5262 int prec;
5263 LITTLENUM_TYPE words[4];
5264 char *t;
5265 int i;
5266
5267 switch (type)
5268 {
5269 case 'f':
5270 prec = 2;
5271 break;
5272
5273 case 'd':
5274 prec = 4;
5275 break;
5276
5277 default:
5278 *sizep = 0;
5279 return _("bad call to md_atof");
5280 }
5281
5282 t = atof_ieee (input_line_pointer, type, words);
5283 if (t)
5284 input_line_pointer = t;
5285
5286 *sizep = prec * 2;
5287
5288 if (target_big_endian)
5289 {
5290 for (i = 0; i < prec; i++)
5291 {
5292 md_number_to_chars (litp, (valueT) words[i], 2);
5293 litp += 2;
5294 }
5295 }
5296 else
5297 {
5298 for (i = prec - 1; i >= 0; i--)
5299 {
5300 md_number_to_chars (litp, (valueT) words[i], 2);
5301 litp += 2;
5302 }
5303 }
81d4177b 5304
252b5132
RH		 5305 return NULL;
5306}
5307
5308/* Write a value out to the object file, using the appropriate
5309 endianness. */
5310
5311void
5312md_number_to_chars (buf, val, n)
5313 char *buf;
5314 valueT val;
5315 int n;
5316{
5317 if (target_big_endian)
5318 number_to_chars_bigendian (buf, val, n);
5319 else
5320 number_to_chars_littleendian (buf, val, n);
5321}
5322
5323/* Align a section (I don't know why this is machine dependent). */
5324
5325valueT
3aeeedbb 5326md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5327{
3aeeedbb
AM		 5328#ifdef OBJ_ELF
5329 return addr;
5330#else
252b5132
RH		 5331 int align = bfd_get_section_alignment (stdoutput, seg);
5332
5333 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5334#endif
252b5132
RH		 5335}
5336
5337/* We don't have any form of relaxing. */
5338
5339int
5340md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5341 fragS *fragp ATTRIBUTE_UNUSED;
5342 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5343{
5344 abort ();
5345 return 0;
5346}
5347
5348/* Convert a machine dependent frag. We never generate these. */
5349
5350void
5351md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5352 bfd *abfd ATTRIBUTE_UNUSED;
5353 asection *sec ATTRIBUTE_UNUSED;
5354 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5355{
5356 abort ();
5357}
5358
5359/* We have no need to default values of symbols. */
5360
252b5132
RH		 5361symbolS *
5362md_undefined_symbol (name)
92161534 5363 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5364{
5365 return 0;
5366}
5367\f
5368/* Functions concerning relocs. */
5369
5370/* The location from which a PC relative jump should be calculated,
5371 given a PC relative reloc. */
5372
5373long
5374md_pcrel_from_section (fixp, sec)
5375 fixS *fixp;
92161534 5376 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5377{
5378 return fixp->fx_frag->fr_address + fixp->fx_where;
5379}
5380
5381#ifdef OBJ_XCOFF
5382
5383/* This is called to see whether a fixup should be adjusted to use a
5384 section symbol. We take the opportunity to change a fixup against
5385 a symbol in the TOC subsegment into a reloc against the
5386 corresponding .tc symbol. */
5387
5388int
5389ppc_fix_adjustable (fix)
5390 fixS *fix;
5391{
b782de16
AM		 5392 valueT val = resolve_symbol_value (fix->fx_addsy);
5393 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5394 TC_SYMFIELD_TYPE *tc;
5395
5396 if (symseg == absolute_section)
5397 return 0;
252b5132 5398
252b5132 5399 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5400 && fix->fx_addsy != ppc_toc_csect
b782de16 5401 && symseg == data_section
252b5132
RH		 5402 && val >= ppc_toc_frag->fr_address
5403 && (ppc_after_toc_frag == (fragS *) NULL
5404 || val < ppc_after_toc_frag->fr_address))
5405 {
5406 symbolS *sy;
5407
5408 for (sy = symbol_next (ppc_toc_csect);
5409 sy != (symbolS *) NULL;
5410 sy = symbol_next (sy))
5411 {
b782de16
AM		 5412 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5413
5414 if (sy_tc->class == XMC_TC0)
252b5132 5415 continue;
b782de16 5416 if (sy_tc->class != XMC_TC)
252b5132 5417 break;
b782de16 5418 if (val == resolve_symbol_value (sy))
252b5132
RH		 5419 {
5420 fix->fx_addsy = sy;
5421 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5422 return 0;
5423 }
5424 }
5425
5426 as_bad_where (fix->fx_file, fix->fx_line,
5427 _("symbol in .toc does not match any .tc"));
5428 }
5429
5430 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5431 tc = symbol_get_tc (fix->fx_addsy);
5432 if (tc->subseg == 0
5433 && tc->class != XMC_TC0
5434 && tc->class != XMC_TC
5435 && symseg != bss_section
252b5132 5436 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5437 && (symseg != data_section
252b5132
RH		 5438 || ppc_toc_csect == NULL
5439 || val < ppc_toc_frag->fr_address
5440 || (ppc_after_toc_frag != NULL
5441 && val >= ppc_after_toc_frag->fr_address)))
5442 {
5443 symbolS *csect;
b782de16 5444 symbolS *next_csect;
252b5132 5445
b782de16 5446 if (symseg == text_section)
252b5132 5447 csect = ppc_text_csects;
b782de16 5448 else if (symseg == data_section)
252b5132
RH		 5449 csect = ppc_data_csects;
5450 else
5451 abort ();
5452
5453 /* Skip the initial dummy symbol. */
809ffe0d 5454 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5455
5456 if (csect != (symbolS *) NULL)
5457 {
b782de16
AM		 5458 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5459 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5460 {
5461 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5462 have to look through the full symbol table to see
5463 whether this is the csect we want. Note that we will
5464 only get here if the csect has zero length. */
b782de16
AM		 5465 if (symbol_get_frag (csect)->fr_address == val
5466 && S_GET_VALUE (csect) == val)
252b5132
RH		 5467 {
5468 symbolS *scan;
5469
809ffe0d 5470 for (scan = symbol_next (csect);
252b5132 5471 scan != NULL;
809ffe0d 5472 scan = symbol_next (scan))
252b5132 5473 {
809ffe0d 5474 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5475 break;
5476 if (scan == fix->fx_addsy)
5477 break;
5478 }
5479
5480 /* If we found the symbol before the next csect
99a814a1 5481 symbol, then this is the csect we want. */
252b5132
RH		 5482 if (scan == fix->fx_addsy)
5483 break;
5484 }
5485
b782de16 5486 csect = next_csect;
252b5132
RH		 5487 }
5488
b782de16 5489 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5490 fix->fx_addsy = csect;
5491 }
b782de16 5492 return 0;
252b5132
RH		 5493 }
5494
5495 /* Adjust a reloc against a .lcomm symbol to be against the base
5496 .lcomm. */
b782de16 5497 if (symseg == bss_section
252b5132
RH		 5498 && ! S_IS_EXTERNAL (fix->fx_addsy))
5499 {
b782de16
AM		 5500 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5501
5502 fix->fx_offset += val - resolve_symbol_value (sy);
5503 fix->fx_addsy = sy;
252b5132
RH		 5504 }
5505
5506 return 0;
5507}
5508
5509/* A reloc from one csect to another must be kept. The assembler
5510 will, of course, keep relocs between sections, and it will keep
5511 absolute relocs, but we need to force it to keep PC relative relocs
5512 between two csects in the same section. */
5513
5514int
5515ppc_force_relocation (fix)
5516 fixS *fix;
5517{
5518 /* At this point fix->fx_addsy should already have been converted to
5519 a csect symbol. If the csect does not include the fragment, then
5520 we need to force the relocation. */
5521 if (fix->fx_pcrel
5522 && fix->fx_addsy != NULL
809ffe0d
ILT		 5523 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5524 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5525 > fix->fx_frag->fr_address)
5526 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5527 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5528 <= fix->fx_frag->fr_address))))
5529 return 1;
5530
ae6063d4 5531 return generic_force_reloc (fix);
252b5132
RH		 5532}
5533
5534#endif /* OBJ_XCOFF */
5535
0baf16f2 5536#ifdef OBJ_ELF
a161fe53
AM		 5537/* If this function returns non-zero, it guarantees that a relocation
5538 will be emitted for a fixup. */
5539
5540int
5541ppc_force_relocation (fix)
5542 fixS *fix;
5543{
5544 /* Branch prediction relocations must force a relocation, as must
5545 the vtable description relocs. */
5546 switch (fix->fx_r_type)
5547 {
5548 case BFD_RELOC_PPC_B16_BRTAKEN:
5549 case BFD_RELOC_PPC_B16_BRNTAKEN:
5550 case BFD_RELOC_PPC_BA16_BRTAKEN:
5551 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5552 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5553 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5554 return 1;
5555 default:
5556 break;
5557 }
5558
cdba85ec
AM		 5559 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5560 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5561 return 1;
5562
ae6063d4 5563 return generic_force_reloc (fix);
a161fe53
AM		 5564}
5565
0baf16f2
AM		 5566int
5567ppc_fix_adjustable (fix)
5568 fixS *fix;
252b5132 5569{
0baf16f2
AM		 5570 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5571 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5572 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5573 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5574 && fix->fx_r_type != BFD_RELOC_GPREL16
5575 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5576 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5577 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5578 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5579}
0baf16f2 5580#endif
252b5132 5581
3aeeedbb
AM		 5582/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5583 rs_align_code frag. */
5584
5585void
5586ppc_handle_align (struct frag *fragP)
5587{
5588 valueT count = (fragP->fr_next->fr_address
5589 - (fragP->fr_address + fragP->fr_fix));
5590
5591 if (count != 0 && (count & 3) == 0)
5592 {
5593 char *dest = fragP->fr_literal + fragP->fr_fix;
5594
5595 fragP->fr_var = 4;
5596 md_number_to_chars (dest, 0x60000000, 4);
5597
5598 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5599 {
5600 /* For power6, we want the last nop to be a group terminating
5601 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5602 immediately after this one, with its address set to the last
5603 nop location. This will automatically reduce the number of
5604 nops in the current frag by one. */
5605 if (count > 4)
5606 {
5607 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5608
5609 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5610 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5611 group_nop->fr_fix = 0;
5612 group_nop->fr_offset = 1;
5613 group_nop->fr_type = rs_fill;
5614 fragP->fr_next = group_nop;
5615 dest = group_nop->fr_literal;
5616 }
5617
5618 md_number_to_chars (dest, 0x60210000, 4);
5619 }
5620 }
5621}
5622
252b5132
RH		 5623/* Apply a fixup to the object code. This is called for all the
5624 fixups we generated by the call to fix_new_exp, above. In the call
5625 above we used a reloc code which was the largest legal reloc code
5626 plus the operand index. Here we undo that to recover the operand
5627 index. At this point all symbol values should be fully resolved,
5628 and we attempt to completely resolve the reloc. If we can not do
5629 that, we determine the correct reloc code and put it back in the
5630 fixup. */
5631
94f592af 5632void
55cf6793 5633md_apply_fix (fixP, valP, seg)
94f592af
NC		 5634 fixS *fixP;
5635 valueT * valP;
0baf16f2 5636 segT seg ATTRIBUTE_UNUSED;
252b5132 5637{
94f592af 5638 valueT value = * valP;
252b5132
RH		 5639
5640#ifdef OBJ_ELF
94f592af 5641 if (fixP->fx_addsy != NULL)
252b5132 5642 {
a161fe53 5643 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5644 if (fixP->fx_pcrel)
5645 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5646 }
5647 else
94f592af 5648 fixP->fx_done = 1;
252b5132 5649#else
a161fe53 5650 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5651 the symbol values. If we are doing this relocation the code in
5652 write.c is going to call bfd_install_relocation, which is also
5653 going to use the symbol value. That means that if the reloc is
5654 fully resolved we want to use *valP since bfd_install_relocation is
5655 not being used.
252b5132 5656 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5657 *valP, and must use fx_offset instead. However, if the reloc
5658 is PC relative, we do want to use *valP since it includes the
252b5132 5659 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5660 if (fixP->fx_addsy == (symbolS *) NULL)
5661 fixP->fx_done = 1;
5662
5663 else if (fixP->fx_pcrel)
5664 ;
5665
252b5132 5666 else
a161fe53
AM		 5667 value = fixP->fx_offset;
5668#endif
5669
5670 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5671 {
a161fe53
AM		 5672 /* We can't actually support subtracting a symbol. */
5673 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5674 }
252b5132 5675
94f592af 5676 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5677 {
5678 int opindex;
5679 const struct powerpc_operand *operand;
5680 char *where;
5681 unsigned long insn;
5682
94f592af 5683 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5684
5685 operand = &powerpc_operands[opindex];
5686
5687#ifdef OBJ_XCOFF
0baf16f2
AM		 5688 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5689 does not generate a reloc. It uses the offset of `sym' within its
5690 csect. Other usages, such as `.long sym', generate relocs. This
5691 is the documented behaviour of non-TOC symbols. */
252b5132 5692 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5693 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5694 && operand->shift == 0
2b3c4602 5695 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5696 && fixP->fx_addsy != NULL
5697 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5698 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5699 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5700 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5701 {
94f592af
NC		 5702 value = fixP->fx_offset;
5703 fixP->fx_done = 1;
252b5132
RH		 5704 }
5705#endif
5706
5707 /* Fetch the instruction, insert the fully resolved operand
5708 value, and stuff the instruction back again. */
94f592af 5709 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5710 if (target_big_endian)
5711 insn = bfd_getb32 ((unsigned char *) where);
5712 else
5713 insn = bfd_getl32 ((unsigned char *) where);
5714 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5715 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5716 if (target_big_endian)
5717 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5718 else
5719 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5720
94f592af
NC		 5721 if (fixP->fx_done)
5722 /* Nothing else to do here. */
5723 return;
252b5132 5724
94f592af 5725 assert (fixP->fx_addsy != NULL);
0baf16f2 5726
252b5132
RH		 5727 /* Determine a BFD reloc value based on the operand information.
5728 We are only prepared to turn a few of the operands into
0baf16f2 5729 relocs. */
11b37b7b 5730 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5731 && operand->bitm == 0x3fffffc
11b37b7b 5732 && operand->shift == 0)
94f592af 5733 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5734 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5735 && operand->bitm == 0xfffc
11b37b7b 5736 && operand->shift == 0)
95210096
AM		 5737 {
5738 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5739#ifdef OBJ_XCOFF
5740 fixP->fx_size = 2;
5741 if (target_big_endian)
5742 fixP->fx_where += 2;
5743#endif
5744 }
11b37b7b 5745 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5746 && operand->bitm == 0x3fffffc
11b37b7b 5747 && operand->shift == 0)
94f592af 5748 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5749 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5750 && operand->bitm == 0xfffc
11b37b7b 5751 && operand->shift == 0)
95210096
AM		 5752 {
5753 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5754#ifdef OBJ_XCOFF
5755 fixP->fx_size = 2;
5756 if (target_big_endian)
5757 fixP->fx_where += 2;
5758#endif
5759 }
0baf16f2 5760#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5761 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5762 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5763 && operand->shift == 0)
11b37b7b 5764 {
a7fc733f
AM		 5765 if (ppc_is_toc_sym (fixP->fx_addsy))
5766 {
5767 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5768#ifdef OBJ_ELF
a7fc733f
AM		 5769 if (ppc_obj64
5770 && (operand->flags & PPC_OPERAND_DS) != 0)
5771 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5772#endif
5773 }
5774 else
5775 {
5776 fixP->fx_r_type = BFD_RELOC_16;
5777#ifdef OBJ_ELF
5778 if (ppc_obj64
5779 && (operand->flags & PPC_OPERAND_DS) != 0)
5780 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5781#endif
a7fc733f 5782 }
94f592af 5783 fixP->fx_size = 2;
11b37b7b 5784 if (target_big_endian)
94f592af 5785 fixP->fx_where += 2;
11b37b7b 5786 }
0baf16f2 5787#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5788 else
252b5132
RH		 5789 {
5790 char *sfile;
5791 unsigned int sline;
5792
5793 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5794 symbol. */
94f592af
NC		 5795 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5796 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5797 _("unresolved expression that must be resolved"));
5798 else
94f592af 5799 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5800 _("unsupported relocation against %s"),
94f592af
NC		 5801 S_GET_NAME (fixP->fx_addsy));
5802 fixP->fx_done = 1;
5803 return;
252b5132
RH		 5804 }
5805 }
5806 else
5807 {
5808#ifdef OBJ_ELF
94f592af 5809 ppc_elf_validate_fix (fixP, seg);
252b5132 5810#endif
94f592af 5811 switch (fixP->fx_r_type)
252b5132 5812 {
252b5132 5813 case BFD_RELOC_CTOR:
2b3c4602 5814 if (ppc_obj64)
9c7977b3
AM		 5815 goto ctor64;
5816 /* fall through */
5817
0baf16f2 5818 case BFD_RELOC_32:
94f592af
NC		 5819 if (fixP->fx_pcrel)
5820 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5821 /* fall through */
252b5132
RH		 5822
5823 case BFD_RELOC_RVA:
5824 case BFD_RELOC_32_PCREL:
252b5132 5825 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5826 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5827 value, 4);
5828 break;
5829
7f6d05e8 5830 case BFD_RELOC_64:
9c7977b3 5831 ctor64:
94f592af
NC		 5832 if (fixP->fx_pcrel)
5833 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5834 /* fall through */
0baf16f2 5835
7f6d05e8 5836 case BFD_RELOC_64_PCREL:
94f592af 5837 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5838 value, 8);
81d4177b 5839 break;
0baf16f2 5840
252b5132
RH		 5841 case BFD_RELOC_GPREL16:
5842 case BFD_RELOC_16_GOT_PCREL:
5843 case BFD_RELOC_16_GOTOFF:
5844 case BFD_RELOC_LO16_GOTOFF:
5845 case BFD_RELOC_HI16_GOTOFF:
5846 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5847 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5848 case BFD_RELOC_LO16_BASEREL:
5849 case BFD_RELOC_HI16_BASEREL:
5850 case BFD_RELOC_HI16_S_BASEREL:
5851 case BFD_RELOC_PPC_EMB_NADDR16:
5852 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5853 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5854 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5855 case BFD_RELOC_PPC_EMB_SDAI16:
5856 case BFD_RELOC_PPC_EMB_SDA2REL:
5857 case BFD_RELOC_PPC_EMB_SDA2I16:
5858 case BFD_RELOC_PPC_EMB_RELSEC16:
5859 case BFD_RELOC_PPC_EMB_RELST_LO:
5860 case BFD_RELOC_PPC_EMB_RELST_HI:
5861 case BFD_RELOC_PPC_EMB_RELST_HA:
5862 case BFD_RELOC_PPC_EMB_RELSDA:
5863 case BFD_RELOC_PPC_TOC16:
0baf16f2 5864#ifdef OBJ_ELF
0baf16f2
AM		 5865 case BFD_RELOC_PPC64_TOC16_LO:
5866 case BFD_RELOC_PPC64_TOC16_HI:
5867 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5868#endif
94f592af 5869 if (fixP->fx_pcrel)
252b5132 5870 {
94f592af
NC		 5871 if (fixP->fx_addsy != NULL)
5872 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5873 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5874 bfd_get_reloc_code_name (fixP->fx_r_type),
5875 S_GET_NAME (fixP->fx_addsy));
252b5132 5876 else
94f592af 5877 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5878 _("cannot emit PC relative %s relocation"),
94f592af 5879 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5880 }
5881
94f592af 5882 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5883 value, 2);
5884 break;
5885
3c9d25f4
AM		 5886 case BFD_RELOC_16:
5887 if (fixP->fx_pcrel)
5888 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5889 /* fall through */
5890
5891 case BFD_RELOC_16_PCREL:
5892 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5893 value, 2);
5894 break;
5895
5896 case BFD_RELOC_LO16:
5897 if (fixP->fx_pcrel)
5898 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5899 /* fall through */
5900
5901 case BFD_RELOC_LO16_PCREL:
5902 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5903 value, 2);
5904 break;
5905
252b5132
RH		 5906 /* This case happens when you write, for example,
5907 lis %r3,(L1-L2)@ha
5908 where L1 and L2 are defined later. */
5909 case BFD_RELOC_HI16:
94f592af 5910 if (fixP->fx_pcrel)
3c9d25f4
AM		 5911 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5912 /* fall through */
5913
5914 case BFD_RELOC_HI16_PCREL:
94f592af 5915 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5916 PPC_HI (value), 2);
252b5132 5917 break;
0baf16f2 5918
252b5132 5919 case BFD_RELOC_HI16_S:
94f592af 5920 if (fixP->fx_pcrel)
3c9d25f4
AM		 5921 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5922 /* fall through */
5923
5924 case BFD_RELOC_HI16_S_PCREL:
94f592af 5925 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5926 PPC_HA (value), 2);
5927 break;
5928
5929#ifdef OBJ_ELF
0baf16f2 5930 case BFD_RELOC_PPC64_HIGHER:
94f592af 5931 if (fixP->fx_pcrel)
0baf16f2 5932 abort ();
94f592af 5933 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5934 PPC_HIGHER (value), 2);
252b5132
RH		 5935 break;
5936
0baf16f2 5937 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5938 if (fixP->fx_pcrel)
0baf16f2 5939 abort ();
94f592af 5940 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5941 PPC_HIGHERA (value), 2);
5942 break;
5943
5944 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5945 if (fixP->fx_pcrel)
0baf16f2 5946 abort ();
94f592af 5947 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5948 PPC_HIGHEST (value), 2);
5949 break;
5950
5951 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5952 if (fixP->fx_pcrel)
0baf16f2 5953 abort ();
94f592af 5954 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5955 PPC_HIGHESTA (value), 2);
5956 break;
5957
5958 case BFD_RELOC_PPC64_ADDR16_DS:
5959 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5960 case BFD_RELOC_PPC64_GOT16_DS:
5961 case BFD_RELOC_PPC64_GOT16_LO_DS:
5962 case BFD_RELOC_PPC64_PLT16_LO_DS:
5963 case BFD_RELOC_PPC64_SECTOFF_DS:
5964 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5965 case BFD_RELOC_PPC64_TOC16_DS:
5966 case BFD_RELOC_PPC64_TOC16_LO_DS:
5967 case BFD_RELOC_PPC64_PLTGOT16_DS:
5968 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5969 if (fixP->fx_pcrel)
0baf16f2
AM		 5970 abort ();
5971 {
2132e3a3 5972 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5973 unsigned long val, mask;
0baf16f2
AM		 5974
5975 if (target_big_endian)
adadcc0c 5976 val = bfd_getb32 (where - 2);
0baf16f2 5977 else
adadcc0c
AM		 5978 val = bfd_getl32 (where);
5979 mask = 0xfffc;
5980 /* lq insns reserve the four lsbs. */
5981 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5982 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5983 mask = 0xfff0;
5984 val |= value & mask;
0baf16f2
AM		 5985 if (target_big_endian)
5986 bfd_putb16 ((bfd_vma) val, where);
5987 else
5988 bfd_putl16 ((bfd_vma) val, where);
5989 }
5990 break;
cdba85ec 5991
ba0b2174
AM		 5992 case BFD_RELOC_PPC_B16_BRTAKEN:
5993 case BFD_RELOC_PPC_B16_BRNTAKEN:
5994 case BFD_RELOC_PPC_BA16_BRTAKEN:
5995 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5996 break;
5997
cdba85ec 5998 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5999 break;
6000
cdba85ec
AM		 6001 case BFD_RELOC_PPC_DTPMOD:
6002 case BFD_RELOC_PPC_TPREL16:
6003 case BFD_RELOC_PPC_TPREL16_LO:
6004 case BFD_RELOC_PPC_TPREL16_HI:
6005 case BFD_RELOC_PPC_TPREL16_HA:
6006 case BFD_RELOC_PPC_TPREL:
6007 case BFD_RELOC_PPC_DTPREL16:
6008 case BFD_RELOC_PPC_DTPREL16_LO:
6009 case BFD_RELOC_PPC_DTPREL16_HI:
6010 case BFD_RELOC_PPC_DTPREL16_HA:
6011 case BFD_RELOC_PPC_DTPREL:
6012 case BFD_RELOC_PPC_GOT_TLSGD16:
6013 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6014 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6015 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6016 case BFD_RELOC_PPC_GOT_TLSLD16:
6017 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6018 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6019 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6020 case BFD_RELOC_PPC_GOT_TPREL16:
6021 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6022 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6023 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6024 case BFD_RELOC_PPC_GOT_DTPREL16:
6025 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6026 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6027 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6028 case BFD_RELOC_PPC64_TPREL16_DS:
6029 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6030 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6031 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6032 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6033 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6034 case BFD_RELOC_PPC64_DTPREL16_DS:
6035 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6036 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6037 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6038 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6039 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6040 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6041 break;
0baf16f2 6042#endif
252b5132 6043 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6044 bytes, rather than 2, so offset it here appropriately. */
252b5132 6045 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6046 if (fixP->fx_pcrel)
252b5132
RH		 6047 abort ();
6048
94f592af 6049 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6050 + ((target_big_endian) ? 2 : 0),
6051 value, 2);
6052 break;
6053
6054 case BFD_RELOC_8:
94f592af 6055 if (fixP->fx_pcrel)
31a91399
NC		 6056 {
6057 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6058 ".byte <undefined_symbol> - ." */
31a91399
NC		 6059 if (fixP->fx_addsy)
6060 as_bad (_("Unable to handle reference to symbol %s"),
6061 S_GET_NAME (fixP->fx_addsy));
6062 else
6063 as_bad (_("Unable to resolve expression"));
6064 fixP->fx_done = 1;
6065 }
6066 else
6067 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6068 value, 1);
252b5132
RH		 6069 break;
6070
6071 case BFD_RELOC_24_PLT_PCREL:
6072 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6073 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6074 abort ();
6075
94f592af 6076 if (fixP->fx_done)
99a814a1
AM		 6077 {
6078 char *where;
6079 unsigned long insn;
6080
6081 /* Fetch the instruction, insert the fully resolved operand
6082 value, and stuff the instruction back again. */
94f592af 6083 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6084 if (target_big_endian)
6085 insn = bfd_getb32 ((unsigned char *) where);
6086 else
6087 insn = bfd_getl32 ((unsigned char *) where);
6088 if ((value & 3) != 0)
94f592af 6089 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6090 _("must branch to an address a multiple of 4"));
6091 if ((offsetT) value < -0x40000000
6092 || (offsetT) value >= 0x40000000)
94f592af 6093 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6094 _("@local or @plt branch destination is too far away, %ld bytes"),
6095 (long) value);
6096 insn = insn | (value & 0x03fffffc);
6097 if (target_big_endian)
6098 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6099 else
6100 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6101 }
252b5132
RH		 6102 break;
6103
6104 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6105 fixP->fx_done = 0;
6106 if (fixP->fx_addsy
6107 && !S_IS_DEFINED (fixP->fx_addsy)
6108 && !S_IS_WEAK (fixP->fx_addsy))
6109 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6110 break;
6111
6112 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6113 fixP->fx_done = 0;
252b5132
RH		 6114 break;
6115
0baf16f2 6116#ifdef OBJ_ELF
0baf16f2
AM		 6117 /* Generated by reference to `sym@tocbase'. The sym is
6118 ignored by the linker. */
6119 case BFD_RELOC_PPC64_TOC:
94f592af 6120 fixP->fx_done = 0;
0baf16f2 6121 break;
0baf16f2 6122#endif
252b5132 6123 default:
bc805888 6124 fprintf (stderr,
94f592af 6125 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6126 fflush (stderr);
252b5132
RH		 6127 abort ();
6128 }
6129 }
6130
6131#ifdef OBJ_ELF
94f592af 6132 fixP->fx_addnumber = value;
4e6935a6
AM		 6133
6134 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6135 from the section contents. If we are going to be emitting a reloc
6136 then the section contents are immaterial, so don't warn if they
6137 happen to overflow. Leave such warnings to ld. */
6138 if (!fixP->fx_done)
6139 fixP->fx_no_overflow = 1;
252b5132 6140#else
94f592af
NC		 6141 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6142 fixP->fx_addnumber = 0;
252b5132
RH		 6143 else
6144 {
6145#ifdef TE_PE
94f592af 6146 fixP->fx_addnumber = 0;
252b5132
RH		 6147#else
6148 /* We want to use the offset within the data segment of the
6149 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6150 fixP->fx_addnumber =
6151 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6152#endif
6153 }
6154#endif
252b5132
RH		 6155}
6156
6157/* Generate a reloc for a fixup. */
6158
6159arelent *
6160tc_gen_reloc (seg, fixp)
92161534 6161 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6162 fixS *fixp;
6163{
6164 arelent *reloc;
6165
6166 reloc = (arelent *) xmalloc (sizeof (arelent));
6167
49309057
ILT		 6168 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6169 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6170 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6171 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6172 if (reloc->howto == (reloc_howto_type *) NULL)
6173 {
6174 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6175 _("reloc %d not supported by object file format"),
6176 (int) fixp->fx_r_type);
252b5132
RH		 6177 return NULL;
6178 }
6179 reloc->addend = fixp->fx_addnumber;
6180
6181 return reloc;
6182}
75e21f08
JJ		 6183
6184void
6185ppc_cfi_frame_initial_instructions ()
6186{
6187 cfi_add_CFA_def_cfa (1, 0);
6188}
6189
6190int
1df69f4f 6191tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6192{
6193 unsigned int regnum = -1;
6194 unsigned int i;
6195 const char *p;
6196 char *q;
6197 static struct { char *name; int dw2regnum; } regnames[] =
6198 {
6199 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6200 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6201 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6202 { "spe_acc", 111 }, { "spefscr", 112 }
6203 };
6204
6205 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6206 if (strcmp (regnames[i].name, regname) == 0)
6207 return regnames[i].dw2regnum;
6208
6209 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6210 {
6211 p = regname + 1 + (regname[1] == '.');
6212 regnum = strtoul (p, &q, 10);
6213 if (p == q || *q || regnum >= 32)
6214 return -1;
6215 if (regname[0] == 'f')
b7d7dc63 6216 regnum += 32;
75e21f08 6217 else if (regname[0] == 'v')
b7d7dc63 6218 regnum += 77;
75e21f08
JJ		 6219 }
6220 else if (regname[0] == 'c' && regname[1] == 'r')
6221 {
6222 p = regname + 2 + (regname[2] == '.');
6223 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6224 return -1;
75e21f08
JJ		 6225 regnum = p[0] - '0' + 68;
6226 }
6227 return regnum;
6228}
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