]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/config/tc-ppc.c
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* value.c (value_contents_writeable): Use value_contents_raw.
[thirdparty/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2132e3a3 3 2004, 2005 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC		 187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
b0648eec
AM		 909 else if (strcmp (arg, "power5") == 0)
910 {
911 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
912 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
913 | PPC_OPCODE_POWER5);
914 }
69c040df
AM		 915 /* -mcom means assemble for the common intersection between Power
916 and PowerPC. At present, we just allow the union, rather
917 than the intersection. */
918 else if (strcmp (arg, "com") == 0)
919 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
920 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
921 else if (strcmp (arg, "any") == 0)
922 ppc_cpu |= PPC_OPCODE_ANY;
923 else
924 return 0;
925
926 return 1;
927}
928
252b5132
RH		 929int
930md_parse_option (c, arg)
931 int c;
932 char *arg;
933{
934 switch (c)
935 {
936 case 'u':
937 /* -u means that any undefined symbols should be treated as
938 external, which is the default for gas anyhow. */
939 break;
940
941#ifdef OBJ_ELF
942 case 'l':
943 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 944 sake, recognize -be also. */
252b5132
RH		 945 if (strcmp (arg, "e") == 0)
946 {
947 target_big_endian = 0;
948 set_target_endian = 1;
949 }
950 else
951 return 0;
952
953 break;
954
955 case 'b':
956 if (strcmp (arg, "e") == 0)
957 {
958 target_big_endian = 1;
959 set_target_endian = 1;
960 }
961 else
962 return 0;
963
964 break;
965
966 case 'K':
99a814a1 967 /* Recognize -K PIC. */
252b5132
RH		 968 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
969 {
970 shlib = SHLIB_PIC;
971 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
972 }
973 else
974 return 0;
975
976 break;
977#endif
978
7f6d05e8
CP		 979 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
980 case 'a':
981 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 982 {
983#ifdef BFD64
984 ppc_obj64 = 1;
985#else
986 as_fatal (_("%s unsupported"), "-a64");
987#endif
988 }
7f6d05e8 989 else if (strcmp (arg, "32") == 0)
2b3c4602 990 ppc_obj64 = 0;
7f6d05e8
CP		 991 else
992 return 0;
993 break;
81d4177b 994
252b5132 995 case 'm':
69c040df
AM		 996 if (parse_cpu (arg))
997 ;
252b5132
RH		 998
999 else if (strcmp (arg, "regnames") == 0)
b34976b6 1000 reg_names_p = TRUE;
252b5132
RH		 1001
1002 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1003 reg_names_p = FALSE;
252b5132
RH		 1004
1005#ifdef OBJ_ELF
99a814a1
AM		 1006 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1007 that require relocation. */
252b5132
RH		 1008 else if (strcmp (arg, "relocatable") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1011 ppc_flags |= EF_PPC_RELOCATABLE;
1012 }
1013
1014 else if (strcmp (arg, "relocatable-lib") == 0)
1015 {
5d6f4f16 1016 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1017 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1018 }
1019
99a814a1 1020 /* -memb, set embedded bit. */
252b5132
RH		 1021 else if (strcmp (arg, "emb") == 0)
1022 ppc_flags |= EF_PPC_EMB;
1023
99a814a1
AM		 1024 /* -mlittle/-mbig set the endianess. */
1025 else if (strcmp (arg, "little") == 0
1026 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1027 {
1028 target_big_endian = 0;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1033 {
1034 target_big_endian = 1;
1035 set_target_endian = 1;
1036 }
1037
1038 else if (strcmp (arg, "solaris") == 0)
1039 {
b34976b6 1040 msolaris = TRUE;
252b5132
RH		 1041 ppc_comment_chars = ppc_solaris_comment_chars;
1042 }
1043
1044 else if (strcmp (arg, "no-solaris") == 0)
1045 {
b34976b6 1046 msolaris = FALSE;
252b5132
RH		 1047 ppc_comment_chars = ppc_eabi_comment_chars;
1048 }
1049#endif
1050 else
1051 {
1052 as_bad (_("invalid switch -m%s"), arg);
1053 return 0;
1054 }
1055 break;
1056
1057#ifdef OBJ_ELF
1058 /* -V: SVR4 argument to print version ID. */
1059 case 'V':
1060 print_version_id ();
1061 break;
1062
1063 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1064 should be emitted or not. FIXME: Not implemented. */
1065 case 'Q':
1066 break;
1067
1068 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1069 rather than .stabs.excl, which is ignored by the linker.
1070 FIXME: Not implemented. */
1071 case 's':
1072 if (arg)
1073 return 0;
1074
1075 break;
1076#endif
1077
1078 default:
1079 return 0;
1080 }
1081
1082 return 1;
1083}
1084
1085void
1086md_show_usage (stream)
1087 FILE *stream;
1088{
bc805888 1089 fprintf (stream, _("\
252b5132 1090PowerPC options:\n\
df12615d
AM		 1091-a32 generate ELF32/XCOFF32\n\
1092-a64 generate ELF64/XCOFF64\n\
252b5132 1093-u ignored\n\
23e1d84c
AM		 1094-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1095-mpwr generate code for POWER (RIOS1)\n\
1096-m601 generate code for PowerPC 601\n\
418c1742 1097-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1098 generate code for PowerPC 603/604\n\
df12615d 1099-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1100-m440 generate code for PowerPC 440\n\
f5c120c5 1101-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1102 generate code For PowerPC 7400/7410/7450/7455\n"));
1103 fprintf (stream, _("\
23e1d84c 1104-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1105-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1106-mbooke64 generate code for 64-bit PowerPC BookE\n\
1107-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1108-mpower4 generate code for Power4 architecture\n\
b0648eec 1109-mpower5 generate code for Power5 architecture\n\
252b5132 1110-mcom generate code Power/PowerPC common instructions\n\
df12615d 1111-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1112 fprintf (stream, _("\
df12615d 1113-maltivec generate code for AltiVec\n\
6a0c61b7 1114-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1115-mspe generate code for Motorola SPE instructions\n\
1116-mregnames Allow symbolic names for registers\n\
1117-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1118#ifdef OBJ_ELF
bc805888 1119 fprintf (stream, _("\
252b5132
RH		 1120-mrelocatable support for GCC's -mrelocatble option\n\
1121-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1122-memb set PPC_EMB bit in ELF flags\n\
df12615d 1123-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1124 generate code for a little endian machine\n\
df12615d
AM		 1125-mbig, -mbig-endian, -b, -be\n\
1126 generate code for a big endian machine\n\
252b5132
RH		 1127-msolaris generate code for Solaris\n\
1128-mno-solaris do not generate code for Solaris\n\
1129-V print assembler version number\n\
1130-Qy, -Qn ignored\n"));
1131#endif
1132}
1133\f
1134/* Set ppc_cpu if it is not already set. */
1135
1136static void
1137ppc_set_cpu ()
1138{
1139 const char *default_os = TARGET_OS;
1140 const char *default_cpu = TARGET_CPU;
1141
3c9030c1 1142 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1143 {
2a98c3a6 1144 if (ppc_obj64)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1146 else if (strncmp (default_os, "aix", 3) == 0
1147 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1148 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1149 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1150 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1151 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1152 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1153 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1154 {
1155 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1156 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1157 else
3c9030c1 1158 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1159 }
252b5132 1160 else
99a814a1
AM		 1161 as_fatal (_("Unknown default cpu = %s, os = %s"),
1162 default_cpu, default_os);
252b5132
RH		 1163 }
1164}
1165
9232bbb0
AM		 1166/* Figure out the BFD architecture to use. This function and ppc_mach
1167 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1168
1169enum bfd_architecture
1170ppc_arch ()
1171{
1172 const char *default_cpu = TARGET_CPU;
1173 ppc_set_cpu ();
1174
1175 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1176 return bfd_arch_powerpc;
1177 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1178 return bfd_arch_rs6000;
1179 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1180 {
1181 if (strcmp (default_cpu, "rs6000") == 0)
1182 return bfd_arch_rs6000;
0baf16f2 1183 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1184 return bfd_arch_powerpc;
1185 }
1186
1187 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1188 return bfd_arch_unknown;
1189}
1190
7f6d05e8
CP		 1191unsigned long
1192ppc_mach ()
1193{
2a98c3a6
AM		 1194 if (ppc_obj64)
1195 return bfd_mach_ppc64;
1196 else if (ppc_arch () == bfd_arch_rs6000)
1197 return bfd_mach_rs6k;
1198 else
1199 return bfd_mach_ppc;
7f6d05e8
CP		 1200}
1201
81d4177b 1202extern char*
99a814a1 1203ppc_target_format ()
7f6d05e8
CP		 1204{
1205#ifdef OBJ_COFF
1206#ifdef TE_PE
99a814a1 1207 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1208#elif TE_POWERMAC
0baf16f2 1209 return "xcoff-powermac";
7f6d05e8 1210#else
eb1e0e80 1211# ifdef TE_AIX5
2b3c4602 1212 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1213# else
2b3c4602 1214 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1215# endif
7f6d05e8 1216#endif
7f6d05e8
CP		 1217#endif
1218#ifdef OBJ_ELF
9d8504b1
PB		 1219# ifdef TE_VXWORKS
1220 return "elf32-powerpc-vxworks";
1221# else
0baf16f2 1222 return (target_big_endian
2b3c4602
AM		 1223 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1224 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1225# endif
7f6d05e8
CP		 1226#endif
1227}
1228
69c040df
AM		 1229/* Insert opcodes and macros into hash tables. Called at startup and
1230 for .cpu pseudo. */
252b5132 1231
69c040df
AM		 1232static void
1233ppc_setup_opcodes (void)
252b5132
RH		 1234{
1235 register const struct powerpc_opcode *op;
1236 const struct powerpc_opcode *op_end;
1237 const struct powerpc_macro *macro;
1238 const struct powerpc_macro *macro_end;
b34976b6 1239 bfd_boolean dup_insn = FALSE;
252b5132 1240
69c040df
AM		 1241 if (ppc_hash != NULL)
1242 hash_die (ppc_hash);
1243 if (ppc_macro_hash != NULL)
1244 hash_die (ppc_macro_hash);
252b5132
RH		 1245
1246 /* Insert the opcodes into a hash table. */
1247 ppc_hash = hash_new ();
1248
1249 op_end = powerpc_opcodes + powerpc_num_opcodes;
1250 for (op = powerpc_opcodes; op < op_end; op++)
1251 {
1252 know ((op->opcode & op->mask) == op->opcode);
1253
2b3c4602 1254 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1255 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1256 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1257 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1258 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1259 /* Certain instructions (eg: extsw) do not exist in the
1260 32-bit BookE instruction set, but they do exist in the
1261 64-bit BookE instruction set, and other PPC instruction
1262 sets. Check to see if the opcode has the BOOKE64 flag set.
1263 If it does make sure that the target CPU is not the BookE32. */
1264 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1265 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1266 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1267 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1268 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1269 == (ppc_cpu & PPC_OPCODE_POWER4)))
1270 && ((op->flags & PPC_OPCODE_POWER5) == 0
1271 || ((op->flags & PPC_OPCODE_POWER5)
1272 == (ppc_cpu & PPC_OPCODE_POWER5))))
252b5132
RH		 1273 {
1274 const char *retval;
1275
1276 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1277 if (retval != NULL)
252b5132 1278 {
99a814a1 1279 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1280 if ((ppc_cpu & PPC_OPCODE_601) != 0
1281 && (op->flags & PPC_OPCODE_POWER) != 0)
1282 continue;
1283
99a814a1
AM		 1284 as_bad (_("Internal assembler error for instruction %s"),
1285 op->name);
b34976b6 1286 dup_insn = TRUE;
252b5132
RH		 1287 }
1288 }
1289 }
1290
3c9030c1
AM		 1291 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1292 for (op = powerpc_opcodes; op < op_end; op++)
1293 hash_insert (ppc_hash, op->name, (PTR) op);
1294
252b5132
RH		 1295 /* Insert the macros into a hash table. */
1296 ppc_macro_hash = hash_new ();
1297
1298 macro_end = powerpc_macros + powerpc_num_macros;
1299 for (macro = powerpc_macros; macro < macro_end; macro++)
1300 {
1301 if ((macro->flags & ppc_cpu) != 0)
1302 {
1303 const char *retval;
1304
1305 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1306 if (retval != (const char *) NULL)
1307 {
1308 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1309 dup_insn = TRUE;
252b5132
RH		 1310 }
1311 }
1312 }
1313
1314 if (dup_insn)
1315 abort ();
69c040df
AM		 1316}
1317
1318/* This function is called when the assembler starts up. It is called
1319 after the options have been parsed and the output file has been
1320 opened. */
1321
1322void
1323md_begin ()
1324{
1325 ppc_set_cpu ();
1326
1327 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1328
1329#ifdef OBJ_ELF
1330 /* Set the ELF flags if desired. */
1331 if (ppc_flags && !msolaris)
1332 bfd_set_private_flags (stdoutput, ppc_flags);
1333#endif
1334
1335 ppc_setup_opcodes ();
252b5132 1336
67c1ffbe 1337 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1338 by the user. */
252b5132
RH		 1339 if (!set_target_endian)
1340 {
1341 set_target_endian = 1;
1342 target_big_endian = PPC_BIG_ENDIAN;
1343 }
1344
1345#ifdef OBJ_XCOFF
1346 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1347
1348 /* Create dummy symbols to serve as initial csects. This forces the
1349 text csects to precede the data csects. These symbols will not
1350 be output. */
1351 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1352 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1353 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1354 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1355#endif
1356
1357#ifdef TE_PE
1358
1359 ppc_current_section = text_section;
81d4177b 1360 ppc_previous_section = 0;
252b5132
RH		 1361
1362#endif
1363}
1364
6a0c61b7
EZ		 1365void
1366ppc_cleanup ()
1367{
dc1d03fc 1368#ifdef OBJ_ELF
6a0c61b7
EZ		 1369 if (ppc_apuinfo_list == NULL)
1370 return;
1371
1372 /* Ok, so write the section info out. We have this layout:
1373
1374 byte data what
1375 ---- ---- ----
1376 0 8 length of "APUinfo\0"
1377 4 (n*4) number of APU's (4 bytes each)
1378 8 2 note type 2
1379 12 "APUinfo\0" name
1380 20 APU#1 first APU's info
1381 24 APU#2 second APU's info
1382 ... ...
1383 */
1384 {
1385 char *p;
1386 asection *seg = now_seg;
1387 subsegT subseg = now_subseg;
1388 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1389 unsigned int i;
6a0c61b7
EZ		 1390
1391 /* Create the .PPC.EMB.apuinfo section. */
1392 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1393 bfd_set_section_flags (stdoutput,
1394 apuinfo_secp,
e1a9cb8e 1395 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1396
1397 p = frag_more (4);
1398 md_number_to_chars (p, (valueT) 8, 4);
1399
1400 p = frag_more (4);
e98d298c 1401 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1402
1403 p = frag_more (4);
1404 md_number_to_chars (p, (valueT) 2, 4);
1405
1406 p = frag_more (8);
1407 strcpy (p, "APUinfo");
1408
1409 for (i = 0; i < ppc_apuinfo_num; i++)
1410 {
b34976b6
AM		 1411 p = frag_more (4);
1412 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1413 }
1414
1415 frag_align (2, 0, 0);
1416
1417 /* We probably can't restore the current segment, for there likely
1418 isn't one yet... */
1419 if (seg && subseg)
1420 subseg_set (seg, subseg);
1421 }
dc1d03fc 1422#endif
6a0c61b7
EZ		 1423}
1424
252b5132
RH		 1425/* Insert an operand value into an instruction. */
1426
1427static unsigned long
1428ppc_insert_operand (insn, operand, val, file, line)
1429 unsigned long insn;
1430 const struct powerpc_operand *operand;
1431 offsetT val;
1432 char *file;
1433 unsigned int line;
1434{
1435 if (operand->bits != 32)
1436 {
1437 long min, max;
1438 offsetT test;
1439
1440 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1441 {
d0e9a01c 1442 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1443 max = (1 << operand->bits) - 1;
1444 else
1445 max = (1 << (operand->bits - 1)) - 1;
1446 min = - (1 << (operand->bits - 1));
1447
2b3c4602 1448 if (!ppc_obj64)
252b5132
RH		 1449 {
1450 /* Some people write 32 bit hex constants with the sign
1451 extension done by hand. This shouldn't really be
1452 valid, but, to permit this code to assemble on a 64
1453 bit host, we sign extend the 32 bit value. */
1454 if (val > 0
92161534
ILT		 1455 && (val & (offsetT) 0x80000000) != 0
1456 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1457 {
1458 val -= 0x80000000;
1459 val -= 0x80000000;
1460 }
1461 }
1462 }
1463 else
1464 {
1465 max = (1 << operand->bits) - 1;
1466 min = 0;
1467 }
1468
1469 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1470 test = - val;
1471 else
1472 test = val;
1473
1474 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1475 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1476 }
1477
1478 if (operand->insert)
1479 {
1480 const char *errmsg;
1481
1482 errmsg = NULL;
2b3c4602 1483 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1484 if (errmsg != (const char *) NULL)
0baf16f2 1485 as_bad_where (file, line, errmsg);
252b5132
RH		 1486 }
1487 else
1488 insn |= (((long) val & ((1 << operand->bits) - 1))
1489 << operand->shift);
1490
1491 return insn;
1492}
1493
1494\f
1495#ifdef OBJ_ELF
1496/* Parse @got, etc. and return the desired relocation. */
1497static bfd_reloc_code_real_type
1498ppc_elf_suffix (str_p, exp_p)
1499 char **str_p;
1500 expressionS *exp_p;
1501{
1502 struct map_bfd {
1503 char *string;
b7d7dc63
AM		 1504 unsigned int length : 8;
1505 unsigned int valid32 : 1;
1506 unsigned int valid64 : 1;
1507 unsigned int reloc;
252b5132
RH		 1508 };
1509
1510 char ident[20];
1511 char *str = *str_p;
1512 char *str2;
1513 int ch;
1514 int len;
15c1449b 1515 const struct map_bfd *ptr;
252b5132 1516
b7d7dc63
AM		 1517#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1518#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1519#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1520
15c1449b 1521 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1522 MAP ("l", BFD_RELOC_LO16),
1523 MAP ("h", BFD_RELOC_HI16),
1524 MAP ("ha", BFD_RELOC_HI16_S),
1525 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1526 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1527 MAP ("got", BFD_RELOC_16_GOTOFF),
1528 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1529 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1530 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1531 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1532 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1533 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1534 MAP ("copy", BFD_RELOC_PPC_COPY),
1535 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1536 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1537 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1538 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1539 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1540 MAP ("tls", BFD_RELOC_PPC_TLS),
1541 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1542 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1543 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1544 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1545 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1546 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1547 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1548 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1549 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1550 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1551 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1552 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1553 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1554 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1555 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1556 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1557 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1558 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1559 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1560 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1561 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1562 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1563 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1564 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1565 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1566 MAP32 ("fixup", BFD_RELOC_CTOR),
1567 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1568 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1569 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1570 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1571 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1572 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1573 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1574 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1575 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1576 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1577 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1578 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1579 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1580 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1581 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1582 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1583 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1584 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1585 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1586 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1587 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1588 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1589 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1590 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1591 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1592 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1593 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1594 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1595 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1596 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1597 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1598 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1599 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1600 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1601 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1602 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1603 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1604 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1605 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1606 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1607 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1608 };
1609
1610 if (*str++ != '@')
1611 return BFD_RELOC_UNUSED;
1612
1613 for (ch = *str, str2 = ident;
1614 (str2 < ident + sizeof (ident) - 1
3882b010 1615 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1616 ch = *++str)
1617 {
3882b010 1618 *str2++ = TOLOWER (ch);
252b5132
RH		 1619 }
1620
1621 *str2 = '\0';
1622 len = str2 - ident;
1623
1624 ch = ident[0];
1625 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1626 if (ch == ptr->string[0]
1627 && len == ptr->length
b7d7dc63
AM		 1628 && memcmp (ident, ptr->string, ptr->length) == 0
1629 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1630 {
15c1449b
AM		 1631 int reloc = ptr->reloc;
1632
cdba85ec 1633 if (!ppc_obj64)
5f6db75a
AM		 1634 if (exp_p->X_add_number != 0
1635 && (reloc == (int) BFD_RELOC_16_GOTOFF
1636 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1637 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1638 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1639 as_warn (_("identifier+constant@got means identifier@got+constant"));
1640
1641 /* Now check for identifier@suffix+constant. */
1642 if (*str == '-' || *str == '+')
252b5132 1643 {
5f6db75a
AM		 1644 char *orig_line = input_line_pointer;
1645 expressionS new_exp;
1646
1647 input_line_pointer = str;
1648 expression (&new_exp);
1649 if (new_exp.X_op == O_constant)
252b5132 1650 {
5f6db75a
AM		 1651 exp_p->X_add_number += new_exp.X_add_number;
1652 str = input_line_pointer;
252b5132 1653 }
5f6db75a
AM		 1654
1655 if (&input_line_pointer != str_p)
1656 input_line_pointer = orig_line;
252b5132 1657 }
252b5132 1658 *str_p = str;
0baf16f2 1659
2b3c4602 1660 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1661 && exp_p->X_op == O_symbol
1662 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1663 {
9f2b53d7
AM		 1664 /* Change the symbol so that the dummy .TOC. symbol can be
1665 omitted from the object file. */
0baf16f2
AM		 1666 exp_p->X_add_symbol = &abs_symbol;
1667 }
1668
15c1449b 1669 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1670 }
1671
1672 return BFD_RELOC_UNUSED;
1673}
1674
99a814a1
AM		 1675/* Like normal .long/.short/.word, except support @got, etc.
1676 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1677static void
1678ppc_elf_cons (nbytes)
0baf16f2 1679 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1680{
1681 expressionS exp;
1682 bfd_reloc_code_real_type reloc;
1683
1684 if (is_it_end_of_statement ())
1685 {
1686 demand_empty_rest_of_line ();
1687 return;
1688 }
1689
1690 do
1691 {
1692 expression (&exp);
1693 if (exp.X_op == O_symbol
1694 && *input_line_pointer == '@'
99a814a1
AM		 1695 && (reloc = ppc_elf_suffix (&input_line_pointer,
1696 &exp)) != BFD_RELOC_UNUSED)
252b5132 1697 {
99a814a1
AM		 1698 reloc_howto_type *reloc_howto;
1699 int size;
1700
1701 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1702 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1703
1704 if (size > nbytes)
0baf16f2
AM		 1705 {
1706 as_bad (_("%s relocations do not fit in %d bytes\n"),
1707 reloc_howto->name, nbytes);
1708 }
252b5132
RH		 1709 else
1710 {
0baf16f2
AM		 1711 char *p;
1712 int offset;
252b5132 1713
0baf16f2
AM		 1714 p = frag_more (nbytes);
1715 offset = 0;
1716 if (target_big_endian)
1717 offset = nbytes - size;
99a814a1
AM		 1718 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1719 &exp, 0, reloc);
252b5132
RH		 1720 }
1721 }
1722 else
1723 emit_expr (&exp, (unsigned int) nbytes);
1724 }
1725 while (*input_line_pointer++ == ',');
1726
99a814a1
AM		 1727 /* Put terminator back into stream. */
1728 input_line_pointer--;
252b5132
RH		 1729 demand_empty_rest_of_line ();
1730}
1731
1732/* Solaris pseduo op to change to the .rodata section. */
1733static void
1734ppc_elf_rdata (xxx)
1735 int xxx;
1736{
1737 char *save_line = input_line_pointer;
1738 static char section[] = ".rodata\n";
1739
99a814a1 1740 /* Just pretend this is .section .rodata */
252b5132
RH		 1741 input_line_pointer = section;
1742 obj_elf_section (xxx);
1743
1744 input_line_pointer = save_line;
1745}
1746
99a814a1 1747/* Pseudo op to make file scope bss items. */
252b5132 1748static void
99a814a1 1749ppc_elf_lcomm (xxx)
92161534 1750 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1751{
1752 register char *name;
1753 register char c;
1754 register char *p;
1755 offsetT size;
1756 register symbolS *symbolP;
1757 offsetT align;
1758 segT old_sec;
1759 int old_subsec;
1760 char *pfrag;
1761 int align2;
1762
1763 name = input_line_pointer;
1764 c = get_symbol_end ();
1765
99a814a1 1766 /* just after name is now '\0'. */
252b5132
RH		 1767 p = input_line_pointer;
1768 *p = c;
1769 SKIP_WHITESPACE ();
1770 if (*input_line_pointer != ',')
1771 {
1772 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1773 ignore_rest_of_line ();
1774 return;
1775 }
1776
1777 input_line_pointer++; /* skip ',' */
1778 if ((size = get_absolute_expression ()) < 0)
1779 {
1780 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1781 ignore_rest_of_line ();
1782 return;
1783 }
1784
1785 /* The third argument to .lcomm is the alignment. */
1786 if (*input_line_pointer != ',')
1787 align = 8;
1788 else
1789 {
1790 ++input_line_pointer;
1791 align = get_absolute_expression ();
1792 if (align <= 0)
1793 {
1794 as_warn (_("ignoring bad alignment"));
1795 align = 8;
1796 }
1797 }
1798
1799 *p = 0;
1800 symbolP = symbol_find_or_make (name);
1801 *p = c;
1802
1803 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1804 {
1805 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1806 S_GET_NAME (symbolP));
1807 ignore_rest_of_line ();
1808 return;
1809 }
1810
1811 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1812 {
1813 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1814 S_GET_NAME (symbolP),
1815 (long) S_GET_VALUE (symbolP),
1816 (long) size);
1817
1818 ignore_rest_of_line ();
1819 return;
1820 }
1821
99a814a1 1822 /* Allocate_bss. */
252b5132
RH		 1823 old_sec = now_seg;
1824 old_subsec = now_subseg;
1825 if (align)
1826 {
99a814a1 1827 /* Convert to a power of 2 alignment. */
252b5132
RH		 1828 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1829 if (align != 1)
1830 {
1831 as_bad (_("Common alignment not a power of 2"));
1832 ignore_rest_of_line ();
1833 return;
1834 }
1835 }
1836 else
1837 align2 = 0;
1838
1839 record_alignment (bss_section, align2);
1840 subseg_set (bss_section, 0);
1841 if (align2)
1842 frag_align (align2, 0, 0);
1843 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1844 symbol_get_frag (symbolP)->fr_symbol = 0;
1845 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1846 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1847 (char *) 0);
1848 *pfrag = 0;
1849 S_SET_SIZE (symbolP, size);
1850 S_SET_SEGMENT (symbolP, bss_section);
1851 subseg_set (old_sec, old_subsec);
1852 demand_empty_rest_of_line ();
1853}
1854
1855/* Validate any relocations emitted for -mrelocatable, possibly adding
1856 fixups for word relocations in writable segments, so we can adjust
1857 them at runtime. */
1858static void
1859ppc_elf_validate_fix (fixp, seg)
1860 fixS *fixp;
1861 segT seg;
1862{
1863 if (fixp->fx_done || fixp->fx_pcrel)
1864 return;
1865
1866 switch (shlib)
1867 {
1868 case SHLIB_NONE:
1869 case SHLIB_PIC:
1870 return;
1871
5d6f4f16 1872 case SHLIB_MRELOCATABLE:
252b5132
RH		 1873 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1874 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1875 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1876 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1877 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1878 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1879 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1880 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1881 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1882 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1883 && strcmp (segment_name (seg), ".got2") != 0
1884 && strcmp (segment_name (seg), ".dtors") != 0
1885 && strcmp (segment_name (seg), ".ctors") != 0
1886 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1887 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1888 && strcmp (segment_name (seg), ".eh_frame") != 0
1889 && strcmp (segment_name (seg), ".ex_shared") != 0)
1890 {
1891 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1892 || fixp->fx_r_type != BFD_RELOC_CTOR)
1893 {
1894 as_bad_where (fixp->fx_file, fixp->fx_line,
1895 _("Relocation cannot be done when using -mrelocatable"));
1896 }
1897 }
1898 return;
1899 }
1900}
0baf16f2 1901
7e8d4ab4
AM		 1902/* Prevent elf_frob_file_before_adjust removing a weak undefined
1903 function descriptor sym if the corresponding code sym is used. */
1904
1905void
1906ppc_frob_file_before_adjust ()
0baf16f2 1907{
7e8d4ab4 1908 symbolS *symp;
9232bbb0 1909 asection *toc;
0baf16f2 1910
7e8d4ab4
AM		 1911 if (!ppc_obj64)
1912 return;
1913
1914 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1915 {
7e8d4ab4
AM		 1916 const char *name;
1917 char *dotname;
1918 symbolS *dotsym;
1919 size_t len;
1920
1921 name = S_GET_NAME (symp);
1922 if (name[0] == '.')
1923 continue;
1924
1925 if (! S_IS_WEAK (symp)
1926 || S_IS_DEFINED (symp))
1927 continue;
1928
1929 len = strlen (name) + 1;
1930 dotname = xmalloc (len + 1);
1931 dotname[0] = '.';
1932 memcpy (dotname + 1, name, len);
1933 dotsym = symbol_find (dotname);
1934 free (dotname);
1935 if (dotsym != NULL && (symbol_used_p (dotsym)
1936 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1937 symbol_mark_used (symp);
1938
0baf16f2
AM		 1939 }
1940
9232bbb0
AM		 1941 toc = bfd_get_section_by_name (stdoutput, ".toc");
1942 if (toc != NULL
1943 && bfd_section_size (stdoutput, toc) > 0x10000)
1944 as_warn (_("TOC section size exceeds 64k"));
1945
7e8d4ab4
AM		 1946 /* Don't emit .TOC. symbol. */
1947 symp = symbol_find (".TOC.");
1948 if (symp != NULL)
1949 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1950}
252b5132
RH		 1951#endif /* OBJ_ELF */
1952\f
1953#ifdef TE_PE
1954
1955/*
99a814a1 1956 * Summary of parse_toc_entry.
252b5132
RH		 1957 *
1958 * in: Input_line_pointer points to the '[' in one of:
1959 *
1960 * [toc] [tocv] [toc32] [toc64]
1961 *
1962 * Anything else is an error of one kind or another.
1963 *
81d4177b 1964 * out:
252b5132
RH		 1965 * return value: success or failure
1966 * toc_kind: kind of toc reference
1967 * input_line_pointer:
1968 * success: first char after the ']'
1969 * failure: unchanged
1970 *
1971 * settings:
1972 *
1973 * [toc] - rv == success, toc_kind = default_toc
1974 * [tocv] - rv == success, toc_kind = data_in_toc
1975 * [toc32] - rv == success, toc_kind = must_be_32
1976 * [toc64] - rv == success, toc_kind = must_be_64
1977 *
1978 */
1979
81d4177b
KH		 1980enum toc_size_qualifier
1981{
252b5132
RH		 1982 default_toc, /* The toc cell constructed should be the system default size */
1983 data_in_toc, /* This is a direct reference to a toc cell */
1984 must_be_32, /* The toc cell constructed must be 32 bits wide */
1985 must_be_64 /* The toc cell constructed must be 64 bits wide */
1986};
1987
1988static int
99a814a1 1989parse_toc_entry (toc_kind)
252b5132
RH		 1990 enum toc_size_qualifier *toc_kind;
1991{
1992 char *start;
1993 char *toc_spec;
1994 char c;
1995 enum toc_size_qualifier t;
1996
99a814a1 1997 /* Save the input_line_pointer. */
252b5132
RH		 1998 start = input_line_pointer;
1999
99a814a1 2000 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2001 ++input_line_pointer;
2002 SKIP_WHITESPACE ();
81d4177b 2003
99a814a1 2004 /* Find the spelling of the operand. */
252b5132
RH		 2005 toc_spec = input_line_pointer;
2006 c = get_symbol_end ();
2007
99a814a1 2008 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2009 {
2010 t = default_toc;
2011 }
99a814a1 2012 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2013 {
2014 t = data_in_toc;
2015 }
99a814a1 2016 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2017 {
2018 t = must_be_32;
2019 }
99a814a1 2020 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2021 {
2022 t = must_be_64;
2023 }
2024 else
2025 {
2026 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2027 *input_line_pointer = c;
2028 input_line_pointer = start;
252b5132
RH		 2029 return 0;
2030 }
2031
99a814a1
AM		 2032 /* Now find the ']'. */
2033 *input_line_pointer = c;
252b5132 2034
81d4177b
KH		 2035 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2036 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2037
2038 if (c != ']')
2039 {
2040 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2041 input_line_pointer = start;
252b5132
RH		 2042 return 0;
2043 }
2044
99a814a1 2045 *toc_kind = t;
252b5132
RH		 2046 return 1;
2047}
2048#endif
2049\f
2050
dc1d03fc 2051#ifdef OBJ_ELF
6a0c61b7
EZ		 2052#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2053static void
dc1d03fc 2054ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2055 unsigned int apu, version;
2056{
2057 unsigned int i;
2058
2059 /* Check we don't already exist. */
2060 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2061 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2062 return;
b34976b6 2063
6a0c61b7
EZ		 2064 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2065 {
2066 if (ppc_apuinfo_num_alloc == 0)
2067 {
2068 ppc_apuinfo_num_alloc = 4;
2069 ppc_apuinfo_list = (unsigned long *)
2070 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2071 }
2072 else
2073 {
2074 ppc_apuinfo_num_alloc += 4;
2075 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2076 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2077 }
2078 }
dc1d03fc 2079 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2080}
2081#undef APUID
dc1d03fc 2082#endif
6a0c61b7
EZ		 2083\f
2084
252b5132
RH		 2085/* We need to keep a list of fixups. We can't simply generate them as
2086 we go, because that would require us to first create the frag, and
2087 that would screw up references to ``.''. */
2088
2089struct ppc_fixup
2090{
2091 expressionS exp;
2092 int opindex;
2093 bfd_reloc_code_real_type reloc;
2094};
2095
2096#define MAX_INSN_FIXUPS (5)
2097
2098/* This routine is called for each instruction to be assembled. */
2099
2100void
2101md_assemble (str)
2102 char *str;
2103{
2104 char *s;
2105 const struct powerpc_opcode *opcode;
2106 unsigned long insn;
2107 const unsigned char *opindex_ptr;
2108 int skip_optional;
2109 int need_paren;
2110 int next_opindex;
2111 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2112 int fc;
2113 char *f;
09b935ac 2114 int addr_mod;
252b5132
RH		 2115 int i;
2116#ifdef OBJ_ELF
2117 bfd_reloc_code_real_type reloc;
2118#endif
2119
2120 /* Get the opcode. */
3882b010 2121 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2122 ;
2123 if (*s != '\0')
2124 *s++ = '\0';
2125
2126 /* Look up the opcode in the hash table. */
2127 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2128 if (opcode == (const struct powerpc_opcode *) NULL)
2129 {
2130 const struct powerpc_macro *macro;
2131
2132 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2133 if (macro == (const struct powerpc_macro *) NULL)
2134 as_bad (_("Unrecognized opcode: `%s'"), str);
2135 else
2136 ppc_macro (s, macro);
2137
2138 return;
2139 }
2140
2141 insn = opcode->opcode;
2142
2143 str = s;
3882b010 2144 while (ISSPACE (*str))
252b5132
RH		 2145 ++str;
2146
2147 /* PowerPC operands are just expressions. The only real issue is
2148 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2149 an optional operand separate the operands only with commas (in some
2150 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2151 have optional operands). Most instructions with optional operands
2152 have only one. Those that have more than one optional operand can
2153 take either all their operands or none. So, before we start seriously
2154 parsing the operands, we check to see if we have optional operands,
2155 and if we do, we count the number of commas to see which operands
2156 have been omitted. */
252b5132
RH		 2157 skip_optional = 0;
2158 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2159 {
2160 const struct powerpc_operand *operand;
2161
2162 operand = &powerpc_operands[*opindex_ptr];
2163 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2164 {
2165 unsigned int opcount;
7fe9cf6b
NC		 2166 unsigned int num_operands_expected;
2167 unsigned int i;
252b5132
RH		 2168
2169 /* There is an optional operand. Count the number of
2170 commas in the input line. */
2171 if (*str == '\0')
2172 opcount = 0;
2173 else
2174 {
2175 opcount = 1;
2176 s = str;
2177 while ((s = strchr (s, ',')) != (char *) NULL)
2178 {
2179 ++opcount;
2180 ++s;
2181 }
2182 }
2183
7fe9cf6b
NC		 2184 /* Compute the number of expected operands.
2185 Do not count fake operands. */
2186 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2187 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2188 ++ num_operands_expected;
2189
252b5132
RH		 2190 /* If there are fewer operands in the line then are called
2191 for by the instruction, we want to skip the optional
1f6c9eb0 2192 operands. */
7fe9cf6b 2193 if (opcount < num_operands_expected)
252b5132
RH		 2194 skip_optional = 1;
2195
2196 break;
2197 }
2198 }
2199
2200 /* Gather the operands. */
2201 need_paren = 0;
2202 next_opindex = 0;
2203 fc = 0;
2204 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2205 {
2206 const struct powerpc_operand *operand;
2207 const char *errmsg;
2208 char *hold;
2209 expressionS ex;
2210 char endc;
2211
2212 if (next_opindex == 0)
2213 operand = &powerpc_operands[*opindex_ptr];
2214 else
2215 {
2216 operand = &powerpc_operands[next_opindex];
2217 next_opindex = 0;
2218 }
252b5132
RH		 2219 errmsg = NULL;
2220
2221 /* If this is a fake operand, then we do not expect anything
2222 from the input. */
2223 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2224 {
2b3c4602 2225 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2226 if (errmsg != (const char *) NULL)
2227 as_bad (errmsg);
2228 continue;
2229 }
2230
2231 /* If this is an optional operand, and we are skipping it, just
2232 insert a zero. */
2233 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2234 && skip_optional)
2235 {
2236 if (operand->insert)
2237 {
2b3c4602 2238 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2239 if (errmsg != (const char *) NULL)
2240 as_bad (errmsg);
2241 }
2242 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2243 next_opindex = *opindex_ptr + 1;
2244 continue;
2245 }
2246
2247 /* Gather the operand. */
2248 hold = input_line_pointer;
2249 input_line_pointer = str;
2250
2251#ifdef TE_PE
81d4177b 2252 if (*input_line_pointer == '[')
252b5132
RH		 2253 {
2254 /* We are expecting something like the second argument here:
99a814a1
AM		 2255 *
2256 * lwz r4,[toc].GS.0.static_int(rtoc)
2257 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2258 * The argument following the `]' must be a symbol name, and the
2259 * register must be the toc register: 'rtoc' or '2'
2260 *
2261 * The effect is to 0 as the displacement field
2262 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2263 * the appropriate variation) reloc against it based on the symbol.
2264 * The linker will build the toc, and insert the resolved toc offset.
2265 *
2266 * Note:
2267 * o The size of the toc entry is currently assumed to be
2268 * 32 bits. This should not be assumed to be a hard coded
2269 * number.
2270 * o In an effort to cope with a change from 32 to 64 bits,
2271 * there are also toc entries that are specified to be
2272 * either 32 or 64 bits:
2273 * lwz r4,[toc32].GS.0.static_int(rtoc)
2274 * lwz r4,[toc64].GS.0.static_int(rtoc)
2275 * These demand toc entries of the specified size, and the
2276 * instruction probably requires it.
2277 */
252b5132
RH		 2278
2279 int valid_toc;
2280 enum toc_size_qualifier toc_kind;
2281 bfd_reloc_code_real_type toc_reloc;
2282
99a814a1
AM		 2283 /* Go parse off the [tocXX] part. */
2284 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2285
81d4177b 2286 if (!valid_toc)
252b5132 2287 {
99a814a1
AM		 2288 /* Note: message has already been issued.
2289 FIXME: what sort of recovery should we do?
2290 demand_rest_of_line (); return; ? */
252b5132
RH		 2291 }
2292
99a814a1
AM		 2293 /* Now get the symbol following the ']'. */
2294 expression (&ex);
252b5132
RH		 2295
2296 switch (toc_kind)
2297 {
2298 case default_toc:
99a814a1
AM		 2299 /* In this case, we may not have seen the symbol yet,
2300 since it is allowed to appear on a .extern or .globl
2301 or just be a label in the .data section. */
252b5132
RH		 2302 toc_reloc = BFD_RELOC_PPC_TOC16;
2303 break;
2304 case data_in_toc:
99a814a1
AM		 2305 /* 1. The symbol must be defined and either in the toc
2306 section, or a global.
2307 2. The reloc generated must have the TOCDEFN flag set
2308 in upper bit mess of the reloc type.
2309 FIXME: It's a little confusing what the tocv
2310 qualifier can be used for. At the very least, I've
2311 seen three uses, only one of which I'm sure I can
2312 explain. */
81d4177b
KH		 2313 if (ex.X_op == O_symbol)
2314 {
252b5132 2315 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2316 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2317 != tocdata_section)
252b5132 2318 {
99a814a1 2319 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2320 }
2321 }
2322
2323 toc_reloc = BFD_RELOC_PPC_TOC16;
2324 break;
2325 case must_be_32:
99a814a1
AM		 2326 /* FIXME: these next two specifically specify 32/64 bit
2327 toc entries. We don't support them today. Is this
2328 the right way to say that? */
252b5132
RH		 2329 toc_reloc = BFD_RELOC_UNUSED;
2330 as_bad (_("Unimplemented toc32 expression modifier"));
2331 break;
2332 case must_be_64:
99a814a1 2333 /* FIXME: see above. */
252b5132
RH		 2334 toc_reloc = BFD_RELOC_UNUSED;
2335 as_bad (_("Unimplemented toc64 expression modifier"));
2336 break;
2337 default:
bc805888 2338 fprintf (stderr,
99a814a1
AM		 2339 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2340 toc_kind);
bc805888 2341 abort ();
252b5132
RH		 2342 break;
2343 }
2344
2345 /* We need to generate a fixup for this expression. */
2346 if (fc >= MAX_INSN_FIXUPS)
2347 as_fatal (_("too many fixups"));
2348
2349 fixups[fc].reloc = toc_reloc;
2350 fixups[fc].exp = ex;
2351 fixups[fc].opindex = *opindex_ptr;
2352 ++fc;
2353
99a814a1
AM		 2354 /* Ok. We've set up the fixup for the instruction. Now make it
2355 look like the constant 0 was found here. */
252b5132
RH		 2356 ex.X_unsigned = 1;
2357 ex.X_op = O_constant;
2358 ex.X_add_number = 0;
2359 ex.X_add_symbol = NULL;
2360 ex.X_op_symbol = NULL;
2361 }
2362
2363 else
2364#endif /* TE_PE */
2365 {
2366 if (! register_name (&ex))
2367 {
2368 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2369 cr_operand = TRUE;
252b5132 2370 expression (&ex);
b34976b6 2371 cr_operand = FALSE;
252b5132
RH		 2372 }
2373 }
2374
2375 str = input_line_pointer;
2376 input_line_pointer = hold;
2377
2378 if (ex.X_op == O_illegal)
2379 as_bad (_("illegal operand"));
2380 else if (ex.X_op == O_absent)
2381 as_bad (_("missing operand"));
2382 else if (ex.X_op == O_register)
2383 {
2384 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2385 (char *) NULL, 0);
2386 }
2387 else if (ex.X_op == O_constant)
2388 {
2389#ifdef OBJ_ELF
81d4177b 2390 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2391 char *orig_str = str;
2392
2393 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2394 switch (reloc)
2395 {
2396 default:
2397 str = orig_str;
2398 break;
2399
2400 case BFD_RELOC_LO16:
2401 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2402 something which cleared it, we always produce a
2403 signed value. */
2404 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2405 ex.X_add_number &= 0xffff;
2406 else
0baf16f2 2407 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2408 break;
2409
2410 case BFD_RELOC_HI16:
0baf16f2
AM		 2411 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2412 ex.X_add_number = PPC_HI (ex.X_add_number);
2413 else
2414 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2415 break;
2416
2417 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2418 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2419 ex.X_add_number = PPC_HA (ex.X_add_number);
2420 else
2421 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2422 break;
2423
0baf16f2
AM		 2424 case BFD_RELOC_PPC64_HIGHER:
2425 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2426 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2427 else
2428 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2429 break;
2430
2431 case BFD_RELOC_PPC64_HIGHER_S:
2432 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2433 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2434 else
2435 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2436 break;
0baf16f2
AM		 2437
2438 case BFD_RELOC_PPC64_HIGHEST:
2439 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2440 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2441 else
2442 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2443 break;
2444
2445 case BFD_RELOC_PPC64_HIGHEST_S:
2446 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2447 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2448 else
2449 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2450 break;
252b5132 2451 }
0baf16f2 2452#endif /* OBJ_ELF */
252b5132
RH		 2453 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2454 (char *) NULL, 0);
2455 }
2456#ifdef OBJ_ELF
2457 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2458 {
cdba85ec
AM		 2459 /* Some TLS tweaks. */
2460 switch (reloc)
2461 {
2462 default:
2463 break;
2464 case BFD_RELOC_PPC_TLS:
2465 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2466 (char *) NULL, 0);
2467 break;
2468 /* We'll only use the 32 (or 64) bit form of these relocations
2469 in constants. Instructions get the 16 bit form. */
2470 case BFD_RELOC_PPC_DTPREL:
2471 reloc = BFD_RELOC_PPC_DTPREL16;
2472 break;
2473 case BFD_RELOC_PPC_TPREL:
2474 reloc = BFD_RELOC_PPC_TPREL16;
2475 break;
2476 }
2477
99a814a1
AM		 2478 /* For the absolute forms of branches, convert the PC
2479 relative form back into the absolute. */
252b5132
RH		 2480 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2481 {
2482 switch (reloc)
2483 {
2484 case BFD_RELOC_PPC_B26:
2485 reloc = BFD_RELOC_PPC_BA26;
2486 break;
2487 case BFD_RELOC_PPC_B16:
2488 reloc = BFD_RELOC_PPC_BA16;
2489 break;
2490 case BFD_RELOC_PPC_B16_BRTAKEN:
2491 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2492 break;
2493 case BFD_RELOC_PPC_B16_BRNTAKEN:
2494 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2495 break;
2496 default:
2497 break;
2498 }
2499 }
2500
2b3c4602 2501 if (ppc_obj64
adadcc0c 2502 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2503 {
2504 switch (reloc)
2505 {
2506 case BFD_RELOC_16:
2507 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2508 break;
2509 case BFD_RELOC_LO16:
2510 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2511 break;
2512 case BFD_RELOC_16_GOTOFF:
2513 reloc = BFD_RELOC_PPC64_GOT16_DS;
2514 break;
2515 case BFD_RELOC_LO16_GOTOFF:
2516 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2517 break;
2518 case BFD_RELOC_LO16_PLTOFF:
2519 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2520 break;
1cfc59d5 2521 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2522 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2523 break;
2524 case BFD_RELOC_LO16_BASEREL:
2525 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2526 break;
2527 case BFD_RELOC_PPC_TOC16:
2528 reloc = BFD_RELOC_PPC64_TOC16_DS;
2529 break;
2530 case BFD_RELOC_PPC64_TOC16_LO:
2531 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2532 break;
2533 case BFD_RELOC_PPC64_PLTGOT16:
2534 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2535 break;
2536 case BFD_RELOC_PPC64_PLTGOT16_LO:
2537 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2538 break;
cdba85ec
AM		 2539 case BFD_RELOC_PPC_DTPREL16:
2540 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2541 break;
2542 case BFD_RELOC_PPC_DTPREL16_LO:
2543 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2544 break;
2545 case BFD_RELOC_PPC_TPREL16:
2546 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2547 break;
2548 case BFD_RELOC_PPC_TPREL16_LO:
2549 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2550 break;
2551 case BFD_RELOC_PPC_GOT_DTPREL16:
2552 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2553 case BFD_RELOC_PPC_GOT_TPREL16:
2554 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2555 break;
0baf16f2
AM		 2556 default:
2557 as_bad (_("unsupported relocation for DS offset field"));
2558 break;
2559 }
2560 }
2561
252b5132
RH		 2562 /* We need to generate a fixup for this expression. */
2563 if (fc >= MAX_INSN_FIXUPS)
2564 as_fatal (_("too many fixups"));
2565 fixups[fc].exp = ex;
2566 fixups[fc].opindex = 0;
2567 fixups[fc].reloc = reloc;
2568 ++fc;
2569 }
2570#endif /* OBJ_ELF */
2571
2572 else
2573 {
2574 /* We need to generate a fixup for this expression. */
2575 if (fc >= MAX_INSN_FIXUPS)
2576 as_fatal (_("too many fixups"));
2577 fixups[fc].exp = ex;
2578 fixups[fc].opindex = *opindex_ptr;
2579 fixups[fc].reloc = BFD_RELOC_UNUSED;
2580 ++fc;
2581 }
2582
2583 if (need_paren)
2584 {
2585 endc = ')';
2586 need_paren = 0;
2587 }
2588 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2589 {
2590 endc = '(';
2591 need_paren = 1;
2592 }
2593 else
2594 endc = ',';
2595
2596 /* The call to expression should have advanced str past any
2597 whitespace. */
2598 if (*str != endc
2599 && (endc != ',' || *str != '\0'))
2600 {
2601 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2602 break;
2603 }
2604
2605 if (*str != '\0')
2606 ++str;
2607 }
2608
3882b010 2609 while (ISSPACE (*str))
252b5132
RH		 2610 ++str;
2611
2612 if (*str != '\0')
2613 as_bad (_("junk at end of line: `%s'"), str);
2614
dc1d03fc 2615#ifdef OBJ_ELF
6a0c61b7
EZ		 2616 /* Do we need/want a APUinfo section? */
2617 if (ppc_cpu & (PPC_OPCODE_SPE
2618 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2619 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2620 | PPC_OPCODE_RFMCI))
2621 {
2622 /* These are all version "1". */
2623 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2624 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2625 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2626 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2627 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2628 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2629 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2630 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2631 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2632 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2633 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2634 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2635 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2636 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2637 }
dc1d03fc 2638#endif
6a0c61b7 2639
252b5132
RH		 2640 /* Write out the instruction. */
2641 f = frag_more (4);
09b935ac
AM		 2642 addr_mod = frag_now_fix () & 3;
2643 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2644 as_bad (_("instruction address is not a multiple of 4"));
2645 frag_now->insn_addr = addr_mod;
2646 frag_now->has_code = 1;
252b5132
RH		 2647 md_number_to_chars (f, insn, 4);
2648
5d6f4f16
GK		 2649#ifdef OBJ_ELF
2650 dwarf2_emit_insn (4);
2651#endif
2652
252b5132
RH		 2653 /* Create any fixups. At this point we do not use a
2654 bfd_reloc_code_real_type, but instead just use the
2655 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2656 handle fixups for any operand type, although that is admittedly
2657 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2658 md_apply_fix. */
252b5132
RH		 2659 for (i = 0; i < fc; i++)
2660 {
2661 const struct powerpc_operand *operand;
2662
2663 operand = &powerpc_operands[fixups[i].opindex];
2664 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2665 {
99a814a1 2666 reloc_howto_type *reloc_howto;
252b5132
RH		 2667 int size;
2668 int offset;
2669 fixS *fixP;
2670
99a814a1 2671 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2672 if (!reloc_howto)
2673 abort ();
2674
2675 size = bfd_get_reloc_size (reloc_howto);
2676 offset = target_big_endian ? (4 - size) : 0;
2677
2678 if (size < 1 || size > 4)
bc805888 2679 abort ();
252b5132 2680
99a814a1
AM		 2681 fixP = fix_new_exp (frag_now,
2682 f - frag_now->fr_literal + offset,
2683 size,
2684 &fixups[i].exp,
2685 reloc_howto->pc_relative,
252b5132
RH		 2686 fixups[i].reloc);
2687
2688 /* Turn off complaints that the addend is too large for things like
2689 foo+100000@ha. */
2690 switch (fixups[i].reloc)
2691 {
2692 case BFD_RELOC_16_GOTOFF:
2693 case BFD_RELOC_PPC_TOC16:
2694 case BFD_RELOC_LO16:
2695 case BFD_RELOC_HI16:
2696 case BFD_RELOC_HI16_S:
0baf16f2 2697#ifdef OBJ_ELF
0baf16f2
AM		 2698 case BFD_RELOC_PPC64_HIGHER:
2699 case BFD_RELOC_PPC64_HIGHER_S:
2700 case BFD_RELOC_PPC64_HIGHEST:
2701 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2702#endif
252b5132
RH		 2703 fixP->fx_no_overflow = 1;
2704 break;
2705 default:
2706 break;
2707 }
2708 }
2709 else
99a814a1
AM		 2710 fix_new_exp (frag_now,
2711 f - frag_now->fr_literal,
2712 4,
252b5132
RH		 2713 &fixups[i].exp,
2714 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2715 ((bfd_reloc_code_real_type)
99a814a1 2716 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2717 }
2718}
2719
2720/* Handle a macro. Gather all the operands, transform them as
2721 described by the macro, and call md_assemble recursively. All the
2722 operands are separated by commas; we don't accept parentheses
2723 around operands here. */
2724
2725static void
2726ppc_macro (str, macro)
2727 char *str;
2728 const struct powerpc_macro *macro;
2729{
2730 char *operands[10];
2731 unsigned int count;
2732 char *s;
2733 unsigned int len;
2734 const char *format;
2735 int arg;
2736 char *send;
2737 char *complete;
2738
2739 /* Gather the users operands into the operands array. */
2740 count = 0;
2741 s = str;
2742 while (1)
2743 {
2744 if (count >= sizeof operands / sizeof operands[0])
2745 break;
2746 operands[count++] = s;
2747 s = strchr (s, ',');
2748 if (s == (char *) NULL)
2749 break;
2750 *s++ = '\0';
81d4177b 2751 }
252b5132
RH		 2752
2753 if (count != macro->operands)
2754 {
2755 as_bad (_("wrong number of operands"));
2756 return;
2757 }
2758
2759 /* Work out how large the string must be (the size is unbounded
2760 because it includes user input). */
2761 len = 0;
2762 format = macro->format;
2763 while (*format != '\0')
2764 {
2765 if (*format != '%')
2766 {
2767 ++len;
2768 ++format;
2769 }
2770 else
2771 {
2772 arg = strtol (format + 1, &send, 10);
2773 know (send != format && arg >= 0 && arg < count);
2774 len += strlen (operands[arg]);
2775 format = send;
2776 }
2777 }
2778
2779 /* Put the string together. */
2780 complete = s = (char *) alloca (len + 1);
2781 format = macro->format;
2782 while (*format != '\0')
2783 {
2784 if (*format != '%')
2785 *s++ = *format++;
2786 else
2787 {
2788 arg = strtol (format + 1, &send, 10);
2789 strcpy (s, operands[arg]);
2790 s += strlen (s);
2791 format = send;
2792 }
2793 }
2794 *s = '\0';
2795
2796 /* Assemble the constructed instruction. */
2797 md_assemble (complete);
81d4177b 2798}
252b5132
RH		 2799\f
2800#ifdef OBJ_ELF
99a814a1 2801/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2802
2803int
2804ppc_section_letter (letter, ptr_msg)
2805 int letter;
2806 char **ptr_msg;
2807{
2808 if (letter == 'e')
2809 return SHF_EXCLUDE;
2810
13ae64f3 2811 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2812 return -1;
252b5132
RH		 2813}
2814
2815int
9de8d8f1
RH		 2816ppc_section_word (str, len)
2817 char *str;
2818 size_t len;
252b5132 2819{
9de8d8f1
RH		 2820 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2821 return SHF_EXCLUDE;
252b5132 2822
9de8d8f1 2823 return -1;
252b5132
RH		 2824}
2825
2826int
9de8d8f1
RH		 2827ppc_section_type (str, len)
2828 char *str;
2829 size_t len;
252b5132 2830{
9de8d8f1
RH		 2831 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2832 return SHT_ORDERED;
252b5132 2833
9de8d8f1 2834 return -1;
252b5132
RH		 2835}
2836
2837int
2838ppc_section_flags (flags, attr, type)
2839 int flags;
2840 int attr;
2841 int type;
2842{
2843 if (type == SHT_ORDERED)
2844 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2845
2846 if (attr & SHF_EXCLUDE)
2847 flags |= SEC_EXCLUDE;
2848
2849 return flags;
2850}
2851#endif /* OBJ_ELF */
2852
2853\f
2854/* Pseudo-op handling. */
2855
2856/* The .byte pseudo-op. This is similar to the normal .byte
2857 pseudo-op, but it can also take a single ASCII string. */
2858
2859static void
2860ppc_byte (ignore)
92161534 2861 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2862{
2863 if (*input_line_pointer != '\"')
2864 {
2865 cons (1);
2866 return;
2867 }
2868
2869 /* Gather characters. A real double quote is doubled. Unusual
2870 characters are not permitted. */
2871 ++input_line_pointer;
2872 while (1)
2873 {
2874 char c;
2875
2876 c = *input_line_pointer++;
2877
2878 if (c == '\"')
2879 {
2880 if (*input_line_pointer != '\"')
2881 break;
2882 ++input_line_pointer;
2883 }
2884
2885 FRAG_APPEND_1_CHAR (c);
2886 }
2887
2888 demand_empty_rest_of_line ();
2889}
2890\f
2891#ifdef OBJ_XCOFF
2892
2893/* XCOFF specific pseudo-op handling. */
2894
2895/* This is set if we are creating a .stabx symbol, since we don't want
2896 to handle symbol suffixes for such symbols. */
b34976b6 2897static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2898
2899/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2900 symbols in the .bss segment as though they were local common
67c1ffbe 2901 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2902 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2903
2904static void
2905ppc_comm (lcomm)
2906 int lcomm;
2907{
2908 asection *current_seg = now_seg;
2909 subsegT current_subseg = now_subseg;
2910 char *name;
2911 char endc;
2912 char *end_name;
2913 offsetT size;
2914 offsetT align;
2915 symbolS *lcomm_sym = NULL;
2916 symbolS *sym;
2917 char *pfrag;
2918
2919 name = input_line_pointer;
2920 endc = get_symbol_end ();
2921 end_name = input_line_pointer;
2922 *end_name = endc;
2923
2924 if (*input_line_pointer != ',')
2925 {
2926 as_bad (_("missing size"));
2927 ignore_rest_of_line ();
2928 return;
2929 }
2930 ++input_line_pointer;
2931
2932 size = get_absolute_expression ();
2933 if (size < 0)
2934 {
2935 as_bad (_("negative size"));
2936 ignore_rest_of_line ();
2937 return;
2938 }
2939
2940 if (! lcomm)
2941 {
2942 /* The third argument to .comm is the alignment. */
2943 if (*input_line_pointer != ',')
1ad63b2f 2944 align = 2;
252b5132
RH		 2945 else
2946 {
2947 ++input_line_pointer;
2948 align = get_absolute_expression ();
2949 if (align <= 0)
2950 {
2951 as_warn (_("ignoring bad alignment"));
1ad63b2f 2952 align = 2;
252b5132
RH		 2953 }
2954 }
2955 }
2956 else
2957 {
2958 char *lcomm_name;
2959 char lcomm_endc;
2960
1ad63b2f 2961 if (size <= 4)
252b5132
RH		 2962 align = 2;
2963 else
2964 align = 3;
2965
2966 /* The third argument to .lcomm appears to be the real local
2967 common symbol to create. References to the symbol named in
2968 the first argument are turned into references to the third
2969 argument. */
2970 if (*input_line_pointer != ',')
2971 {
2972 as_bad (_("missing real symbol name"));
2973 ignore_rest_of_line ();
2974 return;
2975 }
2976 ++input_line_pointer;
2977
2978 lcomm_name = input_line_pointer;
2979 lcomm_endc = get_symbol_end ();
81d4177b 2980
252b5132
RH		 2981 lcomm_sym = symbol_find_or_make (lcomm_name);
2982
2983 *input_line_pointer = lcomm_endc;
2984 }
2985
2986 *end_name = '\0';
2987 sym = symbol_find_or_make (name);
2988 *end_name = endc;
2989
2990 if (S_IS_DEFINED (sym)
2991 || S_GET_VALUE (sym) != 0)
2992 {
2993 as_bad (_("attempt to redefine symbol"));
2994 ignore_rest_of_line ();
2995 return;
2996 }
81d4177b 2997
252b5132 2998 record_alignment (bss_section, align);
81d4177b 2999
252b5132
RH		 3000 if (! lcomm
3001 || ! S_IS_DEFINED (lcomm_sym))
3002 {
3003 symbolS *def_sym;
3004 offsetT def_size;
3005
3006 if (! lcomm)
3007 {
3008 def_sym = sym;
3009 def_size = size;
3010 S_SET_EXTERNAL (sym);
3011 }
3012 else
3013 {
809ffe0d 3014 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3015 def_sym = lcomm_sym;
3016 def_size = 0;
3017 }
3018
3019 subseg_set (bss_section, 1);
3020 frag_align (align, 0, 0);
81d4177b 3021
809ffe0d 3022 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3023 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3024 def_size, (char *) NULL);
3025 *pfrag = 0;
3026 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3027 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3028 }
3029 else if (lcomm)
3030 {
3031 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3032 symbol_get_frag (lcomm_sym)->fr_offset =
3033 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3034 &~ ((1 << align) - 1));
809ffe0d
ILT		 3035 if (align > symbol_get_tc (lcomm_sym)->align)
3036 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3037 }
3038
3039 if (lcomm)
3040 {
3041 /* Make sym an offset from lcomm_sym. */
3042 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3043 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3044 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3045 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3046 }
3047
3048 subseg_set (current_seg, current_subseg);
3049
3050 demand_empty_rest_of_line ();
3051}
3052
3053/* The .csect pseudo-op. This switches us into a different
3054 subsegment. The first argument is a symbol whose value is the
3055 start of the .csect. In COFF, csect symbols get special aux
3056 entries defined by the x_csect field of union internal_auxent. The
3057 optional second argument is the alignment (the default is 2). */
3058
3059static void
3060ppc_csect (ignore)
5480ccf3 3061 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3062{
3063 char *name;
3064 char endc;
3065 symbolS *sym;
931e13a6 3066 offsetT align;
252b5132
RH		 3067
3068 name = input_line_pointer;
3069 endc = get_symbol_end ();
81d4177b 3070
252b5132
RH		 3071 sym = symbol_find_or_make (name);
3072
3073 *input_line_pointer = endc;
3074
3075 if (S_GET_NAME (sym)[0] == '\0')
3076 {
3077 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3078 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3079 }
3080
931e13a6 3081 align = 2;
252b5132
RH		 3082 if (*input_line_pointer == ',')
3083 {
3084 ++input_line_pointer;
931e13a6 3085 align = get_absolute_expression ();
252b5132
RH		 3086 }
3087
931e13a6
AM		 3088 ppc_change_csect (sym, align);
3089
252b5132
RH		 3090 demand_empty_rest_of_line ();
3091}
3092
3093/* Change to a different csect. */
3094
3095static void
931e13a6 3096ppc_change_csect (sym, align)
252b5132 3097 symbolS *sym;
931e13a6 3098 offsetT align;
252b5132
RH		 3099{
3100 if (S_IS_DEFINED (sym))
809ffe0d 3101 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3102 else
3103 {
3104 symbolS **list_ptr;
3105 int after_toc;
3106 int hold_chunksize;
3107 symbolS *list;
931e13a6
AM		 3108 int is_code;
3109 segT sec;
252b5132
RH		 3110
3111 /* This is a new csect. We need to look at the symbol class to
3112 figure out whether it should go in the text section or the
3113 data section. */
3114 after_toc = 0;
931e13a6 3115 is_code = 0;
809ffe0d 3116 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3117 {
3118 case XMC_PR:
3119 case XMC_RO:
3120 case XMC_DB:
3121 case XMC_GL:
3122 case XMC_XO:
3123 case XMC_SV:
3124 case XMC_TI:
3125 case XMC_TB:
3126 S_SET_SEGMENT (sym, text_section);
809ffe0d 3127 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3128 ++ppc_text_subsegment;
3129 list_ptr = &ppc_text_csects;
931e13a6 3130 is_code = 1;
252b5132
RH		 3131 break;
3132 case XMC_RW:
3133 case XMC_TC0:
3134 case XMC_TC:
3135 case XMC_DS:
3136 case XMC_UA:
3137 case XMC_BS:
3138 case XMC_UC:
3139 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3140 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3141 == ppc_data_subsegment))
252b5132
RH		 3142 after_toc = 1;
3143 S_SET_SEGMENT (sym, data_section);
809ffe0d 3144 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3145 ++ppc_data_subsegment;
3146 list_ptr = &ppc_data_csects;
3147 break;
3148 default:
3149 abort ();
3150 }
3151
3152 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3153 changing subsegments, so that we don't use a lot of memory
3154 space for what may be a small section. */
252b5132
RH		 3155 hold_chunksize = chunksize;
3156 chunksize = 64;
3157
931e13a6
AM		 3158 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3159 symbol_get_tc (sym)->subseg);
252b5132
RH		 3160
3161 chunksize = hold_chunksize;
3162
3163 if (after_toc)
3164 ppc_after_toc_frag = frag_now;
3165
931e13a6
AM		 3166 record_alignment (sec, align);
3167 if (is_code)
3168 frag_align_code (align, 0);
3169 else
3170 frag_align (align, 0, 0);
3171
809ffe0d 3172 symbol_set_frag (sym, frag_now);
252b5132
RH		 3173 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3174
931e13a6 3175 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3176 symbol_get_tc (sym)->output = 1;
3177 symbol_get_tc (sym)->within = sym;
81d4177b 3178
252b5132 3179 for (list = *list_ptr;
809ffe0d
ILT		 3180 symbol_get_tc (list)->next != (symbolS *) NULL;
3181 list = symbol_get_tc (list)->next)
252b5132 3182 ;
809ffe0d 3183 symbol_get_tc (list)->next = sym;
81d4177b 3184
252b5132 3185 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3186 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3187 &symbol_lastP);
252b5132
RH		 3188 }
3189
3190 ppc_current_csect = sym;
3191}
3192
3193/* This function handles the .text and .data pseudo-ops. These
3194 pseudo-ops aren't really used by XCOFF; we implement them for the
3195 convenience of people who aren't used to XCOFF. */
3196
3197static void
3198ppc_section (type)
3199 int type;
3200{
3201 const char *name;
3202 symbolS *sym;
3203
3204 if (type == 't')
3205 name = ".text[PR]";
3206 else if (type == 'd')
3207 name = ".data[RW]";
3208 else
3209 abort ();
3210
3211 sym = symbol_find_or_make (name);
3212
931e13a6 3213 ppc_change_csect (sym, 2);
252b5132
RH		 3214
3215 demand_empty_rest_of_line ();
3216}
3217
3218/* This function handles the .section pseudo-op. This is mostly to
3219 give an error, since XCOFF only supports .text, .data and .bss, but
3220 we do permit the user to name the text or data section. */
3221
3222static void
3223ppc_named_section (ignore)
5480ccf3 3224 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3225{
3226 char *user_name;
3227 const char *real_name;
3228 char c;
3229 symbolS *sym;
3230
3231 user_name = input_line_pointer;
3232 c = get_symbol_end ();
3233
3234 if (strcmp (user_name, ".text") == 0)
3235 real_name = ".text[PR]";
3236 else if (strcmp (user_name, ".data") == 0)
3237 real_name = ".data[RW]";
3238 else
3239 {
3240 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3241 *input_line_pointer = c;
3242 ignore_rest_of_line ();
3243 return;
3244 }
3245
3246 *input_line_pointer = c;
3247
3248 sym = symbol_find_or_make (real_name);
3249
931e13a6 3250 ppc_change_csect (sym, 2);
252b5132
RH		 3251
3252 demand_empty_rest_of_line ();
3253}
3254
3255/* The .extern pseudo-op. We create an undefined symbol. */
3256
3257static void
3258ppc_extern (ignore)
5480ccf3 3259 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3260{
3261 char *name;
3262 char endc;
3263
3264 name = input_line_pointer;
3265 endc = get_symbol_end ();
3266
3267 (void) symbol_find_or_make (name);
3268
3269 *input_line_pointer = endc;
3270
3271 demand_empty_rest_of_line ();
3272}
3273
3274/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3275
3276static void
3277ppc_lglobl (ignore)
5480ccf3 3278 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3279{
3280 char *name;
3281 char endc;
3282 symbolS *sym;
3283
3284 name = input_line_pointer;
3285 endc = get_symbol_end ();
3286
3287 sym = symbol_find_or_make (name);
3288
3289 *input_line_pointer = endc;
3290
809ffe0d 3291 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3292
3293 demand_empty_rest_of_line ();
3294}
3295
3296/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3297 although I don't know why it bothers. */
3298
3299static void
3300ppc_rename (ignore)
5480ccf3 3301 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3302{
3303 char *name;
3304 char endc;
3305 symbolS *sym;
3306 int len;
3307
3308 name = input_line_pointer;
3309 endc = get_symbol_end ();
3310
3311 sym = symbol_find_or_make (name);
3312
3313 *input_line_pointer = endc;
3314
3315 if (*input_line_pointer != ',')
3316 {
3317 as_bad (_("missing rename string"));
3318 ignore_rest_of_line ();
3319 return;
3320 }
3321 ++input_line_pointer;
3322
809ffe0d 3323 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3324
3325 demand_empty_rest_of_line ();
3326}
3327
3328/* The .stabx pseudo-op. This is similar to a normal .stabs
3329 pseudo-op, but slightly different. A sample is
3330 .stabx "main:F-1",.main,142,0
3331 The first argument is the symbol name to create. The second is the
3332 value, and the third is the storage class. The fourth seems to be
3333 always zero, and I am assuming it is the type. */
3334
3335static void
3336ppc_stabx (ignore)
5480ccf3 3337 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3338{
3339 char *name;
3340 int len;
3341 symbolS *sym;
3342 expressionS exp;
3343
3344 name = demand_copy_C_string (&len);
3345
3346 if (*input_line_pointer != ',')
3347 {
3348 as_bad (_("missing value"));
3349 return;
3350 }
3351 ++input_line_pointer;
3352
b34976b6 3353 ppc_stab_symbol = TRUE;
252b5132 3354 sym = symbol_make (name);
b34976b6 3355 ppc_stab_symbol = FALSE;
252b5132 3356
809ffe0d 3357 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3358
3359 (void) expression (&exp);
3360
3361 switch (exp.X_op)
3362 {
3363 case O_illegal:
3364 case O_absent:
3365 case O_big:
3366 as_bad (_("illegal .stabx expression; zero assumed"));
3367 exp.X_add_number = 0;
3368 /* Fall through. */
3369 case O_constant:
3370 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3371 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3372 break;
3373
3374 case O_symbol:
3375 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3376 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3377 else
3378 {
3379 S_SET_VALUE (sym,
3380 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3381 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3382 }
3383 break;
3384
3385 default:
3386 /* The value is some complex expression. This will probably
99a814a1
AM		 3387 fail at some later point, but this is probably the right
3388 thing to do here. */
809ffe0d 3389 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3390 break;
3391 }
3392
3393 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3394 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3395
3396 if (*input_line_pointer != ',')
3397 {
3398 as_bad (_("missing class"));
3399 return;
3400 }
3401 ++input_line_pointer;
3402
3403 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3404
3405 if (*input_line_pointer != ',')
3406 {
3407 as_bad (_("missing type"));
3408 return;
3409 }
3410 ++input_line_pointer;
3411
3412 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3413
809ffe0d 3414 symbol_get_tc (sym)->output = 1;
252b5132 3415
6877bb43 3416 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3417
809ffe0d 3418 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3419
41ea10b1 3420 /* In this case :
99a814a1 3421
41ea10b1
TR		 3422 .bs name
3423 .stabx "z",arrays_,133,0
3424 .es
99a814a1 3425
41ea10b1 3426 .comm arrays_,13768,3
99a814a1 3427
41ea10b1
TR		 3428 resolve_symbol_value will copy the exp's "within" into sym's when the
3429 offset is 0. Since this seems to be corner case problem,
3430 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3431 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3432
3433 if (exp.X_op == O_symbol)
41ea10b1
TR		 3434 {
3435 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3436 }
6877bb43 3437 }
99a814a1 3438
252b5132
RH		 3439 if (exp.X_op != O_symbol
3440 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3441 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3442 ppc_frob_label (sym);
3443 else
3444 {
3445 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3446 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3447 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3448 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3449 }
3450
3451 demand_empty_rest_of_line ();
3452}
3453
3454/* The .function pseudo-op. This takes several arguments. The first
3455 argument seems to be the external name of the symbol. The second
67c1ffbe 3456 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3457 uses the same name for both. I have no idea what the third and
3458 fourth arguments are meant to be. The optional fifth argument is
3459 an expression for the size of the function. In COFF this symbol
3460 gets an aux entry like that used for a csect. */
3461
3462static void
3463ppc_function (ignore)
5480ccf3 3464 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3465{
3466 char *name;
3467 char endc;
3468 char *s;
3469 symbolS *ext_sym;
3470 symbolS *lab_sym;
3471
3472 name = input_line_pointer;
3473 endc = get_symbol_end ();
3474
3475 /* Ignore any [PR] suffix. */
3476 name = ppc_canonicalize_symbol_name (name);
3477 s = strchr (name, '[');
3478 if (s != (char *) NULL
3479 && strcmp (s + 1, "PR]") == 0)
3480 *s = '\0';
3481
3482 ext_sym = symbol_find_or_make (name);
3483
3484 *input_line_pointer = endc;
3485
3486 if (*input_line_pointer != ',')
3487 {
3488 as_bad (_("missing symbol name"));
3489 ignore_rest_of_line ();
3490 return;
3491 }
3492 ++input_line_pointer;
3493
3494 name = input_line_pointer;
3495 endc = get_symbol_end ();
3496
3497 lab_sym = symbol_find_or_make (name);
3498
3499 *input_line_pointer = endc;
3500
3501 if (ext_sym != lab_sym)
3502 {
809ffe0d
ILT		 3503 expressionS exp;
3504
3505 exp.X_op = O_symbol;
3506 exp.X_add_symbol = lab_sym;
3507 exp.X_op_symbol = NULL;
3508 exp.X_add_number = 0;
3509 exp.X_unsigned = 0;
3510 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3511 }
3512
809ffe0d
ILT		 3513 if (symbol_get_tc (ext_sym)->class == -1)
3514 symbol_get_tc (ext_sym)->class = XMC_PR;
3515 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3516
3517 if (*input_line_pointer == ',')
3518 {
3519 expressionS ignore;
3520
3521 /* Ignore the third argument. */
3522 ++input_line_pointer;
3523 expression (&ignore);
3524 if (*input_line_pointer == ',')
3525 {
3526 /* Ignore the fourth argument. */
3527 ++input_line_pointer;
3528 expression (&ignore);
3529 if (*input_line_pointer == ',')
3530 {
3531 /* The fifth argument is the function size. */
3532 ++input_line_pointer;
809ffe0d
ILT		 3533 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3534 absolute_section,
3535 (valueT) 0,
3536 &zero_address_frag);
3537 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3538 }
3539 }
3540 }
3541
3542 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3543 SF_SET_FUNCTION (ext_sym);
3544 SF_SET_PROCESS (ext_sym);
3545 coff_add_linesym (ext_sym);
3546
3547 demand_empty_rest_of_line ();
3548}
3549
3550/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3551 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3552 with the correct line number */
5d6255fe 3553
8642cce8 3554static symbolS *saved_bi_sym = 0;
252b5132
RH		 3555
3556static void
3557ppc_bf (ignore)
5480ccf3 3558 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3559{
3560 symbolS *sym;
3561
3562 sym = symbol_make (".bf");
3563 S_SET_SEGMENT (sym, text_section);
809ffe0d 3564 symbol_set_frag (sym, frag_now);
252b5132
RH		 3565 S_SET_VALUE (sym, frag_now_fix ());
3566 S_SET_STORAGE_CLASS (sym, C_FCN);
3567
3568 coff_line_base = get_absolute_expression ();
3569
3570 S_SET_NUMBER_AUXILIARY (sym, 1);
3571 SA_SET_SYM_LNNO (sym, coff_line_base);
3572
8642cce8 3573 /* Line number for bi. */
5d6255fe 3574 if (saved_bi_sym)
8642cce8
TR		 3575 {
3576 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3577 saved_bi_sym = 0;
3578 }
5d6255fe 3579
8642cce8 3580
809ffe0d 3581 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3582
3583 ppc_frob_label (sym);
3584
3585 demand_empty_rest_of_line ();
3586}
3587
3588/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3589 ".ef", except that the line number is absolute, not relative to the
3590 most recent ".bf" symbol. */
3591
3592static void
3593ppc_ef (ignore)
5480ccf3 3594 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3595{
3596 symbolS *sym;
3597
3598 sym = symbol_make (".ef");
3599 S_SET_SEGMENT (sym, text_section);
809ffe0d 3600 symbol_set_frag (sym, frag_now);
252b5132
RH		 3601 S_SET_VALUE (sym, frag_now_fix ());
3602 S_SET_STORAGE_CLASS (sym, C_FCN);
3603 S_SET_NUMBER_AUXILIARY (sym, 1);
3604 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3605 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3606
3607 ppc_frob_label (sym);
3608
3609 demand_empty_rest_of_line ();
3610}
3611
3612/* The .bi and .ei pseudo-ops. These take a string argument and
3613 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3614 the symbol list. The value of .bi will be know when the next .bf
3615 is encountered. */
252b5132
RH		 3616
3617static void
3618ppc_biei (ei)
3619 int ei;
3620{
3621 static symbolS *last_biei;
3622
3623 char *name;
3624 int len;
3625 symbolS *sym;
3626 symbolS *look;
3627
3628 name = demand_copy_C_string (&len);
3629
3630 /* The value of these symbols is actually file offset. Here we set
3631 the value to the index into the line number entries. In
3632 ppc_frob_symbols we set the fix_line field, which will cause BFD
3633 to do the right thing. */
3634
3635 sym = symbol_make (name);
3636 /* obj-coff.c currently only handles line numbers correctly in the
3637 .text section. */
3638 S_SET_SEGMENT (sym, text_section);
3639 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3640 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3641
3642 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3643 symbol_get_tc (sym)->output = 1;
81d4177b 3644
8642cce8 3645 /* Save bi. */
5d6255fe 3646 if (ei)
8642cce8
TR		 3647 saved_bi_sym = 0;
3648 else
3649 saved_bi_sym = sym;
3650
252b5132
RH		 3651 for (look = last_biei ? last_biei : symbol_rootP;
3652 (look != (symbolS *) NULL
3653 && (S_GET_STORAGE_CLASS (look) == C_FILE
3654 || S_GET_STORAGE_CLASS (look) == C_BINCL
3655 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3656 look = symbol_next (look))
3657 ;
3658 if (look != (symbolS *) NULL)
3659 {
3660 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3661 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3662 last_biei = sym;
3663 }
3664
3665 demand_empty_rest_of_line ();
3666}
3667
3668/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3669 There is one argument, which is a csect symbol. The value of the
3670 .bs symbol is the index of this csect symbol. */
3671
3672static void
3673ppc_bs (ignore)
5480ccf3 3674 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3675{
3676 char *name;
3677 char endc;
3678 symbolS *csect;
3679 symbolS *sym;
3680
3681 if (ppc_current_block != NULL)
3682 as_bad (_("nested .bs blocks"));
3683
3684 name = input_line_pointer;
3685 endc = get_symbol_end ();
3686
3687 csect = symbol_find_or_make (name);
3688
3689 *input_line_pointer = endc;
3690
3691 sym = symbol_make (".bs");
3692 S_SET_SEGMENT (sym, now_seg);
3693 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3694 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3695 symbol_get_tc (sym)->output = 1;
252b5132 3696
809ffe0d 3697 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3698
3699 ppc_frob_label (sym);
3700
3701 ppc_current_block = sym;
3702
3703 demand_empty_rest_of_line ();
3704}
3705
3706/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3707
3708static void
3709ppc_es (ignore)
5480ccf3 3710 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3711{
3712 symbolS *sym;
3713
3714 if (ppc_current_block == NULL)
3715 as_bad (_(".es without preceding .bs"));
3716
3717 sym = symbol_make (".es");
3718 S_SET_SEGMENT (sym, now_seg);
3719 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3720 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3721 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3722
3723 ppc_frob_label (sym);
3724
3725 ppc_current_block = NULL;
3726
3727 demand_empty_rest_of_line ();
3728}
3729
3730/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3731 line number. */
3732
3733static void
3734ppc_bb (ignore)
5480ccf3 3735 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3736{
3737 symbolS *sym;
3738
3739 sym = symbol_make (".bb");
3740 S_SET_SEGMENT (sym, text_section);
809ffe0d 3741 symbol_set_frag (sym, frag_now);
252b5132
RH		 3742 S_SET_VALUE (sym, frag_now_fix ());
3743 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3744
3745 S_SET_NUMBER_AUXILIARY (sym, 1);
3746 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3747
809ffe0d 3748 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3749
3750 SF_SET_PROCESS (sym);
3751
3752 ppc_frob_label (sym);
3753
3754 demand_empty_rest_of_line ();
3755}
3756
3757/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3758 line number. */
3759
3760static void
3761ppc_eb (ignore)
5480ccf3 3762 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3763{
3764 symbolS *sym;
3765
3766 sym = symbol_make (".eb");
3767 S_SET_SEGMENT (sym, text_section);
809ffe0d 3768 symbol_set_frag (sym, frag_now);
252b5132
RH		 3769 S_SET_VALUE (sym, frag_now_fix ());
3770 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3771 S_SET_NUMBER_AUXILIARY (sym, 1);
3772 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3773 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3774
3775 SF_SET_PROCESS (sym);
3776
3777 ppc_frob_label (sym);
3778
3779 demand_empty_rest_of_line ();
3780}
3781
3782/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3783 specified name. */
3784
3785static void
3786ppc_bc (ignore)
5480ccf3 3787 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3788{
3789 char *name;
3790 int len;
3791 symbolS *sym;
3792
3793 name = demand_copy_C_string (&len);
3794 sym = symbol_make (name);
3795 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3796 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3797 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3798 S_SET_VALUE (sym, 0);
809ffe0d 3799 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3800
3801 ppc_frob_label (sym);
3802
3803 demand_empty_rest_of_line ();
3804}
3805
3806/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3807
3808static void
3809ppc_ec (ignore)
5480ccf3 3810 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3811{
3812 symbolS *sym;
3813
3814 sym = symbol_make (".ec");
3815 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3816 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3817 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3818 S_SET_VALUE (sym, 0);
809ffe0d 3819 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3820
3821 ppc_frob_label (sym);
3822
3823 demand_empty_rest_of_line ();
3824}
3825
3826/* The .toc pseudo-op. Switch to the .toc subsegment. */
3827
3828static void
3829ppc_toc (ignore)
5480ccf3 3830 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3831{
3832 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3833 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3834 else
3835 {
3836 subsegT subseg;
3837 symbolS *sym;
3838 symbolS *list;
81d4177b 3839
252b5132
RH		 3840 subseg = ppc_data_subsegment;
3841 ++ppc_data_subsegment;
3842
3843 subseg_new (segment_name (data_section), subseg);
3844 ppc_toc_frag = frag_now;
3845
3846 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3847 symbol_set_frag (sym, frag_now);
252b5132
RH		 3848 S_SET_SEGMENT (sym, data_section);
3849 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3850 symbol_get_tc (sym)->subseg = subseg;
3851 symbol_get_tc (sym)->output = 1;
3852 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3853
3854 ppc_toc_csect = sym;
81d4177b 3855
252b5132 3856 for (list = ppc_data_csects;
809ffe0d
ILT		 3857 symbol_get_tc (list)->next != (symbolS *) NULL;
3858 list = symbol_get_tc (list)->next)
252b5132 3859 ;
809ffe0d 3860 symbol_get_tc (list)->next = sym;
252b5132
RH		 3861
3862 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3863 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3864 &symbol_lastP);
252b5132
RH		 3865 }
3866
3867 ppc_current_csect = ppc_toc_csect;
3868
3869 demand_empty_rest_of_line ();
3870}
3871
3872/* The AIX assembler automatically aligns the operands of a .long or
3873 .short pseudo-op, and we want to be compatible. */
3874
3875static void
3876ppc_xcoff_cons (log_size)
3877 int log_size;
3878{
3879 frag_align (log_size, 0, 0);
3880 record_alignment (now_seg, log_size);
3881 cons (1 << log_size);
3882}
3883
3884static void
3885ppc_vbyte (dummy)
5480ccf3 3886 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3887{
3888 expressionS exp;
3889 int byte_count;
3890
3891 (void) expression (&exp);
3892
3893 if (exp.X_op != O_constant)
3894 {
3895 as_bad (_("non-constant byte count"));
3896 return;
3897 }
3898
3899 byte_count = exp.X_add_number;
3900
3901 if (*input_line_pointer != ',')
3902 {
3903 as_bad (_("missing value"));
3904 return;
3905 }
3906
3907 ++input_line_pointer;
3908 cons (byte_count);
3909}
3910
3911#endif /* OBJ_XCOFF */
0baf16f2 3912#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3913\f
3914/* The .tc pseudo-op. This is used when generating either XCOFF or
3915 ELF. This takes two or more arguments.
3916
3917 When generating XCOFF output, the first argument is the name to
3918 give to this location in the toc; this will be a symbol with class
0baf16f2 3919 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3920 this location in the TOC; often there is just one more argument, a
1049f94e 3921 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3922 depends on target word size. A 32-bit target uses 4-byte values, a
3923 64-bit target uses 8-byte values.
252b5132
RH		 3924
3925 When not generating XCOFF output, the arguments are the same, but
3926 the first argument is simply ignored. */
3927
3928static void
3929ppc_tc (ignore)
92161534 3930 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3931{
3932#ifdef OBJ_XCOFF
3933
3934 /* Define the TOC symbol name. */
3935 {
3936 char *name;
3937 char endc;
3938 symbolS *sym;
3939
3940 if (ppc_toc_csect == (symbolS *) NULL
3941 || ppc_toc_csect != ppc_current_csect)
3942 {
3943 as_bad (_(".tc not in .toc section"));
3944 ignore_rest_of_line ();
3945 return;
3946 }
3947
3948 name = input_line_pointer;
3949 endc = get_symbol_end ();
3950
3951 sym = symbol_find_or_make (name);
3952
3953 *input_line_pointer = endc;
3954
3955 if (S_IS_DEFINED (sym))
3956 {
3957 symbolS *label;
3958
809ffe0d
ILT		 3959 label = symbol_get_tc (ppc_current_csect)->within;
3960 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3961 {
3962 as_bad (_(".tc with no label"));
3963 ignore_rest_of_line ();
3964 return;
3965 }
3966
3967 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3968 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3969 S_SET_VALUE (label, S_GET_VALUE (sym));
3970
3971 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3972 ++input_line_pointer;
3973
3974 return;
3975 }
3976
3977 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3978 symbol_set_frag (sym, frag_now);
252b5132 3979 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3980 symbol_get_tc (sym)->class = XMC_TC;
3981 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3982
3983 ppc_frob_label (sym);
3984 }
3985
0baf16f2
AM		 3986#endif /* OBJ_XCOFF */
3987#ifdef OBJ_ELF
9c7977b3 3988 int align;
252b5132
RH		 3989
3990 /* Skip the TOC symbol name. */
3991 while (is_part_of_name (*input_line_pointer)
3992 || *input_line_pointer == '['
3993 || *input_line_pointer == ']'
3994 || *input_line_pointer == '{'
3995 || *input_line_pointer == '}')
3996 ++input_line_pointer;
3997
0baf16f2 3998 /* Align to a four/eight byte boundary. */
2b3c4602 3999 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4000 frag_align (align, 0, 0);
4001 record_alignment (now_seg, align);
0baf16f2 4002#endif /* OBJ_ELF */
252b5132
RH		 4003
4004 if (*input_line_pointer != ',')
4005 demand_empty_rest_of_line ();
4006 else
4007 {
4008 ++input_line_pointer;
2b3c4602 4009 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4010 }
4011}
0baf16f2
AM		 4012
4013/* Pseudo-op .machine. */
0baf16f2
AM		 4014
4015static void
4016ppc_machine (ignore)
4017 int ignore ATTRIBUTE_UNUSED;
4018{
69c040df
AM		 4019 char *cpu_string;
4020#define MAX_HISTORY 100
4021 static unsigned long *cpu_history;
4022 static int curr_hist;
4023
4024 SKIP_WHITESPACE ();
4025
4026 if (*input_line_pointer == '"')
4027 {
4028 int len;
4029 cpu_string = demand_copy_C_string (&len);
4030 }
4031 else
4032 {
4033 char c;
4034 cpu_string = input_line_pointer;
4035 c = get_symbol_end ();
4036 cpu_string = xstrdup (cpu_string);
4037 *input_line_pointer = c;
4038 }
4039
4040 if (cpu_string != NULL)
4041 {
4042 unsigned long old_cpu = ppc_cpu;
4043 char *p;
4044
4045 for (p = cpu_string; *p != 0; p++)
4046 *p = TOLOWER (*p);
4047
4048 if (strcmp (cpu_string, "push") == 0)
4049 {
4050 if (cpu_history == NULL)
4051 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4052
4053 if (curr_hist >= MAX_HISTORY)
4054 as_bad (_(".machine stack overflow"));
4055 else
4056 cpu_history[curr_hist++] = ppc_cpu;
4057 }
4058 else if (strcmp (cpu_string, "pop") == 0)
4059 {
4060 if (curr_hist <= 0)
4061 as_bad (_(".machine stack underflow"));
4062 else
4063 ppc_cpu = cpu_history[--curr_hist];
4064 }
4065 else if (parse_cpu (cpu_string))
4066 ;
4067 else
4068 as_bad (_("invalid machine `%s'"), cpu_string);
4069
4070 if (ppc_cpu != old_cpu)
4071 ppc_setup_opcodes ();
4072 }
4073
4074 demand_empty_rest_of_line ();
0baf16f2
AM		 4075}
4076
4077/* See whether a symbol is in the TOC section. */
4078
4079static int
4080ppc_is_toc_sym (sym)
4081 symbolS *sym;
4082{
4083#ifdef OBJ_XCOFF
4084 return symbol_get_tc (sym)->class == XMC_TC;
4085#endif
4086#ifdef OBJ_ELF
4087 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4088 if (ppc_obj64)
0baf16f2
AM		 4089 return strcmp (sname, ".toc") == 0;
4090 else
4091 return strcmp (sname, ".got") == 0;
4092#endif
4093}
4094#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4095\f
4096#ifdef TE_PE
4097
99a814a1 4098/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4099
4100/* Set the current section. */
4101static void
4102ppc_set_current_section (new)
4103 segT new;
4104{
4105 ppc_previous_section = ppc_current_section;
4106 ppc_current_section = new;
4107}
4108
4109/* pseudo-op: .previous
4110 behaviour: toggles the current section with the previous section.
4111 errors: None
99a814a1
AM		 4112 warnings: "No previous section" */
4113
252b5132 4114static void
99a814a1 4115ppc_previous (ignore)
5480ccf3 4116 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4117{
4118 symbolS *tmp;
4119
81d4177b 4120 if (ppc_previous_section == NULL)
252b5132 4121 {
99a814a1 4122 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4123 return;
4124 }
4125
99a814a1 4126 subseg_set (ppc_previous_section, 0);
252b5132 4127
99a814a1 4128 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4129}
4130
4131/* pseudo-op: .pdata
4132 behaviour: predefined read only data section
b34976b6 4133 double word aligned
252b5132
RH		 4134 errors: None
4135 warnings: None
4136 initial: .section .pdata "adr3"
b34976b6 4137 a - don't know -- maybe a misprint
252b5132
RH		 4138 d - initialized data
4139 r - readable
4140 3 - double word aligned (that would be 4 byte boundary)
4141
4142 commentary:
4143 Tag index tables (also known as the function table) for exception
99a814a1 4144 handling, debugging, etc. */
252b5132 4145
252b5132 4146static void
99a814a1 4147ppc_pdata (ignore)
5480ccf3 4148 int ignore ATTRIBUTE_UNUSED;
252b5132 4149{
81d4177b 4150 if (pdata_section == 0)
252b5132
RH		 4151 {
4152 pdata_section = subseg_new (".pdata", 0);
81d4177b 4153
252b5132
RH		 4154 bfd_set_section_flags (stdoutput, pdata_section,
4155 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4156 | SEC_READONLY | SEC_DATA ));
81d4177b 4157
252b5132
RH		 4158 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4159 }
4160 else
4161 {
99a814a1 4162 pdata_section = subseg_new (".pdata", 0);
252b5132 4163 }
99a814a1 4164 ppc_set_current_section (pdata_section);
252b5132
RH		 4165}
4166
4167/* pseudo-op: .ydata
4168 behaviour: predefined read only data section
b34976b6 4169 double word aligned
252b5132
RH		 4170 errors: None
4171 warnings: None
4172 initial: .section .ydata "drw3"
b34976b6 4173 a - don't know -- maybe a misprint
252b5132
RH		 4174 d - initialized data
4175 r - readable
4176 3 - double word aligned (that would be 4 byte boundary)
4177 commentary:
4178 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4179 debugging, etc. */
4180
252b5132 4181static void
99a814a1 4182ppc_ydata (ignore)
5480ccf3 4183 int ignore ATTRIBUTE_UNUSED;
252b5132 4184{
81d4177b 4185 if (ydata_section == 0)
252b5132
RH		 4186 {
4187 ydata_section = subseg_new (".ydata", 0);
4188 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4189 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4190 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4191
4192 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4193 }
4194 else
4195 {
4196 ydata_section = subseg_new (".ydata", 0);
4197 }
99a814a1 4198 ppc_set_current_section (ydata_section);
252b5132
RH		 4199}
4200
4201/* pseudo-op: .reldata
4202 behaviour: predefined read write data section
b34976b6 4203 double word aligned (4-byte)
252b5132
RH		 4204 FIXME: relocation is applied to it
4205 FIXME: what's the difference between this and .data?
4206 errors: None
4207 warnings: None
4208 initial: .section .reldata "drw3"
4209 d - initialized data
4210 r - readable
4211 w - writeable
4212 3 - double word aligned (that would be 8 byte boundary)
4213
4214 commentary:
4215 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4216 function descriptors, etc. */
4217
252b5132 4218static void
99a814a1 4219ppc_reldata (ignore)
5480ccf3 4220 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4221{
4222 if (reldata_section == 0)
4223 {
4224 reldata_section = subseg_new (".reldata", 0);
4225
4226 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4227 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4228 | SEC_DATA));
252b5132
RH		 4229
4230 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4231 }
4232 else
4233 {
4234 reldata_section = subseg_new (".reldata", 0);
4235 }
99a814a1 4236 ppc_set_current_section (reldata_section);
252b5132
RH		 4237}
4238
4239/* pseudo-op: .rdata
4240 behaviour: predefined read only data section
b34976b6 4241 double word aligned
252b5132
RH		 4242 errors: None
4243 warnings: None
4244 initial: .section .rdata "dr3"
4245 d - initialized data
4246 r - readable
99a814a1
AM		 4247 3 - double word aligned (that would be 4 byte boundary) */
4248
252b5132 4249static void
99a814a1 4250ppc_rdata (ignore)
5480ccf3 4251 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4252{
4253 if (rdata_section == 0)
4254 {
4255 rdata_section = subseg_new (".rdata", 0);
4256 bfd_set_section_flags (stdoutput, rdata_section,
4257 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4258 | SEC_READONLY | SEC_DATA ));
4259
4260 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4261 }
4262 else
4263 {
4264 rdata_section = subseg_new (".rdata", 0);
4265 }
99a814a1 4266 ppc_set_current_section (rdata_section);
252b5132
RH		 4267}
4268
4269/* pseudo-op: .ualong
81d4177b 4270 behaviour: much like .int, with the exception that no alignment is
b34976b6 4271 performed.
252b5132
RH		 4272 FIXME: test the alignment statement
4273 errors: None
99a814a1
AM		 4274 warnings: None */
4275
252b5132 4276static void
99a814a1 4277ppc_ualong (ignore)
5480ccf3 4278 int ignore ATTRIBUTE_UNUSED;
252b5132 4279{
99a814a1
AM		 4280 /* Try for long. */
4281 cons (4);
252b5132
RH		 4282}
4283
4284/* pseudo-op: .znop <symbol name>
4285 behaviour: Issue a nop instruction
b34976b6 4286 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4287 the supplied symbol name.
4288 errors: None
99a814a1
AM		 4289 warnings: Missing symbol name */
4290
252b5132 4291static void
99a814a1 4292ppc_znop (ignore)
5480ccf3 4293 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4294{
4295 unsigned long insn;
4296 const struct powerpc_opcode *opcode;
4297 expressionS ex;
4298 char *f;
252b5132 4299 symbolS *sym;
252b5132
RH		 4300 char *symbol_name;
4301 char c;
4302 char *name;
4303 unsigned int exp;
4304 flagword flags;
4305 asection *sec;
4306
99a814a1 4307 /* Strip out the symbol name. */
252b5132
RH		 4308 symbol_name = input_line_pointer;
4309 c = get_symbol_end ();
4310
4311 name = xmalloc (input_line_pointer - symbol_name + 1);
4312 strcpy (name, symbol_name);
4313
4314 sym = symbol_find_or_make (name);
4315
4316 *input_line_pointer = c;
4317
4318 SKIP_WHITESPACE ();
4319
4320 /* Look up the opcode in the hash table. */
4321 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4322
99a814a1 4323 /* Stick in the nop. */
252b5132
RH		 4324 insn = opcode->opcode;
4325
4326 /* Write out the instruction. */
4327 f = frag_more (4);
4328 md_number_to_chars (f, insn, 4);
4329 fix_new (frag_now,
4330 f - frag_now->fr_literal,
4331 4,
4332 sym,
4333 0,
4334 0,
4335 BFD_RELOC_16_GOT_PCREL);
4336
4337}
4338
81d4177b
KH		 4339/* pseudo-op:
4340 behaviour:
4341 errors:
99a814a1
AM		 4342 warnings: */
4343
252b5132 4344static void
99a814a1 4345ppc_pe_comm (lcomm)
252b5132
RH		 4346 int lcomm;
4347{
4348 register char *name;
4349 register char c;
4350 register char *p;
4351 offsetT temp;
4352 register symbolS *symbolP;
4353 offsetT align;
4354
4355 name = input_line_pointer;
4356 c = get_symbol_end ();
4357
99a814a1 4358 /* just after name is now '\0'. */
252b5132
RH		 4359 p = input_line_pointer;
4360 *p = c;
4361 SKIP_WHITESPACE ();
4362 if (*input_line_pointer != ',')
4363 {
4364 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4365 ignore_rest_of_line ();
4366 return;
4367 }
4368
4369 input_line_pointer++; /* skip ',' */
4370 if ((temp = get_absolute_expression ()) < 0)
4371 {
4372 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4373 ignore_rest_of_line ();
4374 return;
4375 }
4376
4377 if (! lcomm)
4378 {
4379 /* The third argument to .comm is the alignment. */
4380 if (*input_line_pointer != ',')
4381 align = 3;
4382 else
4383 {
4384 ++input_line_pointer;
4385 align = get_absolute_expression ();
4386 if (align <= 0)
4387 {
4388 as_warn (_("ignoring bad alignment"));
4389 align = 3;
4390 }
4391 }
4392 }
4393
4394 *p = 0;
4395 symbolP = symbol_find_or_make (name);
4396
4397 *p = c;
4398 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4399 {
4400 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4401 S_GET_NAME (symbolP));
4402 ignore_rest_of_line ();
4403 return;
4404 }
4405
4406 if (S_GET_VALUE (symbolP))
4407 {
4408 if (S_GET_VALUE (symbolP) != (valueT) temp)
4409 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4410 S_GET_NAME (symbolP),
4411 (long) S_GET_VALUE (symbolP),
4412 (long) temp);
4413 }
4414 else
4415 {
4416 S_SET_VALUE (symbolP, (valueT) temp);
4417 S_SET_EXTERNAL (symbolP);
4418 }
4419
4420 demand_empty_rest_of_line ();
4421}
4422
4423/*
4424 * implement the .section pseudo op:
4425 * .section name {, "flags"}
4426 * ^ ^
4427 * | +--- optional flags: 'b' for bss
4428 * | 'i' for info
4429 * +-- section name 'l' for lib
4430 * 'n' for noload
4431 * 'o' for over
4432 * 'w' for data
4433 * 'd' (apparently m88k for data)
4434 * 'x' for text
4435 * But if the argument is not a quoted string, treat it as a
4436 * subsegment number.
4437 *
4438 * FIXME: this is a copy of the section processing from obj-coff.c, with
4439 * additions/changes for the moto-pas assembler support. There are three
4440 * categories:
4441 *
81d4177b 4442 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4443 * setting bits that bfd probably neither understands or uses. The
4444 * correct approach (?) will have to incorporate extra fields attached
4445 * to the section to hold the system specific stuff. (krk)
4446 *
4447 * Section Contents:
4448 * 'a' - unknown - referred to in documentation, but no definition supplied
4449 * 'c' - section has code
4450 * 'd' - section has initialized data
4451 * 'u' - section has uninitialized data
4452 * 'i' - section contains directives (info)
4453 * 'n' - section can be discarded
4454 * 'R' - remove section at link time
4455 *
4456 * Section Protection:
4457 * 'r' - section is readable
4458 * 'w' - section is writeable
4459 * 'x' - section is executable
4460 * 's' - section is sharable
4461 *
4462 * Section Alignment:
4463 * '0' - align to byte boundary
4464 * '1' - align to halfword undary
4465 * '2' - align to word boundary
4466 * '3' - align to doubleword boundary
4467 * '4' - align to quadword boundary
4468 * '5' - align to 32 byte boundary
4469 * '6' - align to 64 byte boundary
4470 *
4471 */
4472
4473void
4474ppc_pe_section (ignore)
5480ccf3 4475 int ignore ATTRIBUTE_UNUSED;
252b5132 4476{
99a814a1 4477 /* Strip out the section name. */
252b5132
RH		 4478 char *section_name;
4479 char c;
4480 char *name;
4481 unsigned int exp;
4482 flagword flags;
4483 segT sec;
4484 int align;
4485
4486 section_name = input_line_pointer;
4487 c = get_symbol_end ();
4488
4489 name = xmalloc (input_line_pointer - section_name + 1);
4490 strcpy (name, section_name);
4491
4492 *input_line_pointer = c;
4493
4494 SKIP_WHITESPACE ();
4495
4496 exp = 0;
4497 flags = SEC_NO_FLAGS;
4498
4499 if (strcmp (name, ".idata$2") == 0)
4500 {
4501 align = 0;
4502 }
4503 else if (strcmp (name, ".idata$3") == 0)
4504 {
4505 align = 0;
4506 }
4507 else if (strcmp (name, ".idata$4") == 0)
4508 {
4509 align = 2;
4510 }
4511 else if (strcmp (name, ".idata$5") == 0)
4512 {
4513 align = 2;
4514 }
4515 else if (strcmp (name, ".idata$6") == 0)
4516 {
4517 align = 1;
4518 }
4519 else
99a814a1
AM		 4520 /* Default alignment to 16 byte boundary. */
4521 align = 4;
252b5132
RH		 4522
4523 if (*input_line_pointer == ',')
4524 {
4525 ++input_line_pointer;
4526 SKIP_WHITESPACE ();
4527 if (*input_line_pointer != '"')
4528 exp = get_absolute_expression ();
4529 else
4530 {
4531 ++input_line_pointer;
4532 while (*input_line_pointer != '"'
4533 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4534 {
4535 switch (*input_line_pointer)
4536 {
4537 /* Section Contents */
4538 case 'a': /* unknown */
4539 as_bad (_("Unsupported section attribute -- 'a'"));
4540 break;
4541 case 'c': /* code section */
81d4177b 4542 flags |= SEC_CODE;
252b5132
RH		 4543 break;
4544 case 'd': /* section has initialized data */
4545 flags |= SEC_DATA;
4546 break;
4547 case 'u': /* section has uninitialized data */
4548 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4549 in winnt.h */
4550 flags |= SEC_ROM;
4551 break;
4552 case 'i': /* section contains directives (info) */
4553 /* FIXME: This is IMAGE_SCN_LNK_INFO
4554 in winnt.h */
4555 flags |= SEC_HAS_CONTENTS;
4556 break;
4557 case 'n': /* section can be discarded */
81d4177b 4558 flags &=~ SEC_LOAD;
252b5132
RH		 4559 break;
4560 case 'R': /* Remove section at link time */
4561 flags |= SEC_NEVER_LOAD;
4562 break;
4563
4564 /* Section Protection */
4565 case 'r': /* section is readable */
4566 flags |= IMAGE_SCN_MEM_READ;
4567 break;
4568 case 'w': /* section is writeable */
4569 flags |= IMAGE_SCN_MEM_WRITE;
4570 break;
4571 case 'x': /* section is executable */
4572 flags |= IMAGE_SCN_MEM_EXECUTE;
4573 break;
4574 case 's': /* section is sharable */
4575 flags |= IMAGE_SCN_MEM_SHARED;
4576 break;
4577
4578 /* Section Alignment */
4579 case '0': /* align to byte boundary */
4580 flags |= IMAGE_SCN_ALIGN_1BYTES;
4581 align = 0;
4582 break;
4583 case '1': /* align to halfword boundary */
4584 flags |= IMAGE_SCN_ALIGN_2BYTES;
4585 align = 1;
4586 break;
4587 case '2': /* align to word boundary */
4588 flags |= IMAGE_SCN_ALIGN_4BYTES;
4589 align = 2;
4590 break;
4591 case '3': /* align to doubleword boundary */
4592 flags |= IMAGE_SCN_ALIGN_8BYTES;
4593 align = 3;
4594 break;
4595 case '4': /* align to quadword boundary */
4596 flags |= IMAGE_SCN_ALIGN_16BYTES;
4597 align = 4;
4598 break;
4599 case '5': /* align to 32 byte boundary */
4600 flags |= IMAGE_SCN_ALIGN_32BYTES;
4601 align = 5;
4602 break;
4603 case '6': /* align to 64 byte boundary */
4604 flags |= IMAGE_SCN_ALIGN_64BYTES;
4605 align = 6;
4606 break;
4607
4608 default:
99a814a1
AM		 4609 as_bad (_("unknown section attribute '%c'"),
4610 *input_line_pointer);
252b5132
RH		 4611 break;
4612 }
4613 ++input_line_pointer;
4614 }
4615 if (*input_line_pointer == '"')
4616 ++input_line_pointer;
4617 }
4618 }
4619
4620 sec = subseg_new (name, (subsegT) exp);
4621
99a814a1 4622 ppc_set_current_section (sec);
252b5132
RH		 4623
4624 if (flags != SEC_NO_FLAGS)
4625 {
4626 if (! bfd_set_section_flags (stdoutput, sec, flags))
4627 as_bad (_("error setting flags for \"%s\": %s"),
4628 bfd_section_name (stdoutput, sec),
4629 bfd_errmsg (bfd_get_error ()));
4630 }
4631
99a814a1 4632 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4633
4634}
4635
4636static void
4637ppc_pe_function (ignore)
5480ccf3 4638 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4639{
4640 char *name;
4641 char endc;
4642 symbolS *ext_sym;
4643
4644 name = input_line_pointer;
4645 endc = get_symbol_end ();
4646
4647 ext_sym = symbol_find_or_make (name);
4648
4649 *input_line_pointer = endc;
4650
4651 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4652 SF_SET_FUNCTION (ext_sym);
4653 SF_SET_PROCESS (ext_sym);
4654 coff_add_linesym (ext_sym);
4655
4656 demand_empty_rest_of_line ();
4657}
4658
4659static void
4660ppc_pe_tocd (ignore)
5480ccf3 4661 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4662{
4663 if (tocdata_section == 0)
4664 {
4665 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4666 /* FIXME: section flags won't work. */
252b5132
RH		 4667 bfd_set_section_flags (stdoutput, tocdata_section,
4668 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4669 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4670
4671 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4672 }
4673 else
4674 {
4675 rdata_section = subseg_new (".tocd", 0);
4676 }
4677
99a814a1 4678 ppc_set_current_section (tocdata_section);
252b5132
RH		 4679
4680 demand_empty_rest_of_line ();
4681}
4682
4683/* Don't adjust TOC relocs to use the section symbol. */
4684
4685int
4686ppc_pe_fix_adjustable (fix)
4687 fixS *fix;
4688{
4689 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4690}
4691
4692#endif
4693\f
4694#ifdef OBJ_XCOFF
4695
4696/* XCOFF specific symbol and file handling. */
4697
4698/* Canonicalize the symbol name. We use the to force the suffix, if
4699 any, to use square brackets, and to be in upper case. */
4700
4701char *
4702ppc_canonicalize_symbol_name (name)
4703 char *name;
4704{
4705 char *s;
4706
4707 if (ppc_stab_symbol)
4708 return name;
4709
4710 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4711 ;
4712 if (*s != '\0')
4713 {
4714 char brac;
4715
4716 if (*s == '[')
4717 brac = ']';
4718 else
4719 {
4720 *s = '[';
4721 brac = '}';
4722 }
4723
4724 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4725 *s = TOUPPER (*s);
252b5132
RH		 4726
4727 if (*s == '\0' || s[1] != '\0')
4728 as_bad (_("bad symbol suffix"));
4729
4730 *s = ']';
4731 }
4732
4733 return name;
4734}
4735
4736/* Set the class of a symbol based on the suffix, if any. This is
4737 called whenever a new symbol is created. */
4738
4739void
4740ppc_symbol_new_hook (sym)
4741 symbolS *sym;
4742{
809ffe0d 4743 struct ppc_tc_sy *tc;
252b5132
RH		 4744 const char *s;
4745
809ffe0d
ILT		 4746 tc = symbol_get_tc (sym);
4747 tc->next = NULL;
4748 tc->output = 0;
4749 tc->class = -1;
4750 tc->real_name = NULL;
4751 tc->subseg = 0;
4752 tc->align = 0;
4753 tc->size = NULL;
4754 tc->within = NULL;
252b5132
RH		 4755
4756 if (ppc_stab_symbol)
4757 return;
4758
4759 s = strchr (S_GET_NAME (sym), '[');
4760 if (s == (const char *) NULL)
4761 {
4762 /* There is no suffix. */
4763 return;
4764 }
4765
4766 ++s;
4767
4768 switch (s[0])
4769 {
4770 case 'B':
4771 if (strcmp (s, "BS]") == 0)
809ffe0d 4772 tc->class = XMC_BS;
252b5132
RH		 4773 break;
4774 case 'D':
4775 if (strcmp (s, "DB]") == 0)
809ffe0d 4776 tc->class = XMC_DB;
252b5132 4777 else if (strcmp (s, "DS]") == 0)
809ffe0d 4778 tc->class = XMC_DS;
252b5132
RH		 4779 break;
4780 case 'G':
4781 if (strcmp (s, "GL]") == 0)
809ffe0d 4782 tc->class = XMC_GL;
252b5132
RH		 4783 break;
4784 case 'P':
4785 if (strcmp (s, "PR]") == 0)
809ffe0d 4786 tc->class = XMC_PR;
252b5132
RH		 4787 break;
4788 case 'R':
4789 if (strcmp (s, "RO]") == 0)
809ffe0d 4790 tc->class = XMC_RO;
252b5132 4791 else if (strcmp (s, "RW]") == 0)
809ffe0d 4792 tc->class = XMC_RW;
252b5132
RH		 4793 break;
4794 case 'S':
4795 if (strcmp (s, "SV]") == 0)
809ffe0d 4796 tc->class = XMC_SV;
252b5132
RH		 4797 break;
4798 case 'T':
4799 if (strcmp (s, "TC]") == 0)
809ffe0d 4800 tc->class = XMC_TC;
252b5132 4801 else if (strcmp (s, "TI]") == 0)
809ffe0d 4802 tc->class = XMC_TI;
252b5132 4803 else if (strcmp (s, "TB]") == 0)
809ffe0d 4804 tc->class = XMC_TB;
252b5132 4805 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4806 tc->class = XMC_TC0;
252b5132
RH		 4807 break;
4808 case 'U':
4809 if (strcmp (s, "UA]") == 0)
809ffe0d 4810 tc->class = XMC_UA;
252b5132 4811 else if (strcmp (s, "UC]") == 0)
809ffe0d 4812 tc->class = XMC_UC;
252b5132
RH		 4813 break;
4814 case 'X':
4815 if (strcmp (s, "XO]") == 0)
809ffe0d 4816 tc->class = XMC_XO;
252b5132
RH		 4817 break;
4818 }
4819
809ffe0d 4820 if (tc->class == -1)
252b5132
RH		 4821 as_bad (_("Unrecognized symbol suffix"));
4822}
4823
4824/* Set the class of a label based on where it is defined. This
4825 handles symbols without suffixes. Also, move the symbol so that it
4826 follows the csect symbol. */
4827
4828void
4829ppc_frob_label (sym)
4830 symbolS *sym;
4831{
4832 if (ppc_current_csect != (symbolS *) NULL)
4833 {
809ffe0d
ILT		 4834 if (symbol_get_tc (sym)->class == -1)
4835 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4836
4837 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4838 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4839 &symbol_rootP, &symbol_lastP);
4840 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4841 }
4842}
4843
4844/* This variable is set by ppc_frob_symbol if any absolute symbols are
4845 seen. It tells ppc_adjust_symtab whether it needs to look through
4846 the symbols. */
4847
b34976b6 4848static bfd_boolean ppc_saw_abs;
252b5132
RH		 4849
4850/* Change the name of a symbol just before writing it out. Set the
4851 real name if the .rename pseudo-op was used. Otherwise, remove any
4852 class suffix. Return 1 if the symbol should not be included in the
4853 symbol table. */
4854
4855int
4856ppc_frob_symbol (sym)
4857 symbolS *sym;
4858{
4859 static symbolS *ppc_last_function;
4860 static symbolS *set_end;
4861
4862 /* Discard symbols that should not be included in the output symbol
4863 table. */
809ffe0d
ILT		 4864 if (! symbol_used_in_reloc_p (sym)
4865 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4866 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4867 && ! symbol_get_tc (sym)->output
252b5132
RH		 4868 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4869 return 1;
4870
a161fe53
AM		 4871 /* This one will disappear anyway. Don't make a csect sym for it. */
4872 if (sym == abs_section_sym)
4873 return 1;
4874
809ffe0d
ILT		 4875 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4876 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4877 else
4878 {
4879 const char *name;
4880 const char *s;
4881
4882 name = S_GET_NAME (sym);
4883 s = strchr (name, '[');
4884 if (s != (char *) NULL)
4885 {
4886 unsigned int len;
4887 char *snew;
4888
4889 len = s - name;
4890 snew = xmalloc (len + 1);
4891 memcpy (snew, name, len);
4892 snew[len] = '\0';
4893
4894 S_SET_NAME (sym, snew);
4895 }
4896 }
4897
4898 if (set_end != (symbolS *) NULL)
4899 {
4900 SA_SET_SYM_ENDNDX (set_end, sym);
4901 set_end = NULL;
4902 }
4903
4904 if (SF_GET_FUNCTION (sym))
4905 {
4906 if (ppc_last_function != (symbolS *) NULL)
4907 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4908 ppc_last_function = sym;
809ffe0d 4909 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4910 {
6386f3a7 4911 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4912 SA_SET_SYM_FSIZE (sym,
4913 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4914 }
4915 }
4916 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4917 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4918 {
4919 if (ppc_last_function == (symbolS *) NULL)
4920 as_bad (_(".ef with no preceding .function"));
4921 else
4922 {
4923 set_end = ppc_last_function;
4924 ppc_last_function = NULL;
4925
4926 /* We don't have a C_EFCN symbol, but we need to force the
4927 COFF backend to believe that it has seen one. */
4928 coff_last_function = NULL;
4929 }
4930 }
4931
670ec21d 4932 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4933 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4934 && S_GET_STORAGE_CLASS (sym) != C_FILE
4935 && S_GET_STORAGE_CLASS (sym) != C_FCN
4936 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4937 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4938 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4939 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4940 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4941 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4942 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4943
4944 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4945 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4946 {
4947 int i;
4948 union internal_auxent *a;
4949
4950 /* Create a csect aux. */
4951 i = S_GET_NUMBER_AUXILIARY (sym);
4952 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4953 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4954 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4955 {
4956 /* This is the TOC table. */
4957 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4958 a->x_csect.x_scnlen.l = 0;
4959 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4960 }
809ffe0d 4961 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4962 {
4963 /* This is a csect symbol. x_scnlen is the size of the
4964 csect. */
809ffe0d 4965 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4966 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4967 S_GET_SEGMENT (sym))
4968 - S_GET_VALUE (sym));
4969 else
4970 {
6386f3a7 4971 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4972 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4973 - S_GET_VALUE (sym));
4974 }
809ffe0d 4975 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4976 }
4977 else if (S_GET_SEGMENT (sym) == bss_section)
4978 {
4979 /* This is a common symbol. */
809ffe0d
ILT		 4980 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4981 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4982 if (S_IS_EXTERNAL (sym))
809ffe0d 4983 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4984 else
809ffe0d 4985 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4986 }
4987 else if (S_GET_SEGMENT (sym) == absolute_section)
4988 {
4989 /* This is an absolute symbol. The csect will be created by
99a814a1 4990 ppc_adjust_symtab. */
b34976b6 4991 ppc_saw_abs = TRUE;
252b5132 4992 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4993 if (symbol_get_tc (sym)->class == -1)
4994 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4995 }
4996 else if (! S_IS_DEFINED (sym))
4997 {
4998 /* This is an external symbol. */
4999 a->x_csect.x_scnlen.l = 0;
5000 a->x_csect.x_smtyp = XTY_ER;
5001 }
809ffe0d 5002 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5003 {
5004 symbolS *next;
5005
5006 /* This is a TOC definition. x_scnlen is the size of the
5007 TOC entry. */
5008 next = symbol_next (sym);
809ffe0d 5009 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5010 next = symbol_next (next);
5011 if (next == (symbolS *) NULL
809ffe0d 5012 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5013 {
5014 if (ppc_after_toc_frag == (fragS *) NULL)
5015 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5016 data_section)
5017 - S_GET_VALUE (sym));
5018 else
5019 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5020 - S_GET_VALUE (sym));
5021 }
5022 else
5023 {
6386f3a7 5024 resolve_symbol_value (next);
252b5132
RH		 5025 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5026 - S_GET_VALUE (sym));
5027 }
5028 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5029 }
5030 else
5031 {
5032 symbolS *csect;
5033
5034 /* This is a normal symbol definition. x_scnlen is the
5035 symbol index of the containing csect. */
5036 if (S_GET_SEGMENT (sym) == text_section)
5037 csect = ppc_text_csects;
5038 else if (S_GET_SEGMENT (sym) == data_section)
5039 csect = ppc_data_csects;
5040 else
5041 abort ();
5042
5043 /* Skip the initial dummy symbol. */
809ffe0d 5044 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5045
5046 if (csect == (symbolS *) NULL)
5047 {
5048 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5049 a->x_csect.x_scnlen.l = 0;
5050 }
5051 else
5052 {
809ffe0d 5053 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5054 {
6386f3a7 5055 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5056 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5057 > S_GET_VALUE (sym))
252b5132 5058 break;
809ffe0d 5059 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5060 }
5061
809ffe0d
ILT		 5062 a->x_csect.x_scnlen.p =
5063 coffsymbol (symbol_get_bfdsym (csect))->native;
5064 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5065 1;
252b5132
RH		 5066 }
5067 a->x_csect.x_smtyp = XTY_LD;
5068 }
81d4177b 5069
252b5132
RH		 5070 a->x_csect.x_parmhash = 0;
5071 a->x_csect.x_snhash = 0;
809ffe0d 5072 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5073 a->x_csect.x_smclas = XMC_PR;
5074 else
809ffe0d 5075 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5076 a->x_csect.x_stab = 0;
5077 a->x_csect.x_snstab = 0;
5078
5079 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5080 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5081 }
5082 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5083 {
5084 /* We want the value to be the symbol index of the referenced
5085 csect symbol. BFD will do that for us if we set the right
5086 flags. */
b782de16
AM		 5087 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5088 combined_entry_type *c = coffsymbol (bsym)->native;
5089
5090 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5091 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5092 }
5093 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5094 {
5095 symbolS *block;
5096 symbolS *csect;
5097
5098 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5099 block = symbol_get_tc (sym)->within;
5100 csect = symbol_get_tc (block)->within;
6386f3a7 5101 resolve_symbol_value (csect);
252b5132
RH		 5102 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5103 }
5104 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5105 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5106 {
5107 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5108 BFD will do that for us if we set the right flags. We have
5109 already set the value correctly. */
809ffe0d 5110 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5111 }
5112
5113 return 0;
5114}
5115
5116/* Adjust the symbol table. This creates csect symbols for all
5117 absolute symbols. */
5118
5119void
5120ppc_adjust_symtab ()
5121{
5122 symbolS *sym;
5123
5124 if (! ppc_saw_abs)
5125 return;
5126
5127 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5128 {
5129 symbolS *csect;
5130 int i;
5131 union internal_auxent *a;
5132
5133 if (S_GET_SEGMENT (sym) != absolute_section)
5134 continue;
5135
5136 csect = symbol_create (".abs[XO]", absolute_section,
5137 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5138 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5139 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5140 i = S_GET_NUMBER_AUXILIARY (csect);
5141 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5142 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5143 a->x_csect.x_scnlen.l = 0;
5144 a->x_csect.x_smtyp = XTY_SD;
5145 a->x_csect.x_parmhash = 0;
5146 a->x_csect.x_snhash = 0;
5147 a->x_csect.x_smclas = XMC_XO;
5148 a->x_csect.x_stab = 0;
5149 a->x_csect.x_snstab = 0;
5150
5151 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5152
5153 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5154 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5155 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5156 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5157 }
5158
b34976b6 5159 ppc_saw_abs = FALSE;
252b5132
RH		 5160}
5161
5162/* Set the VMA for a section. This is called on all the sections in
5163 turn. */
5164
5165void
5166ppc_frob_section (sec)
5167 asection *sec;
5168{
931e13a6 5169 static bfd_vma vma = 0;
252b5132 5170
931e13a6 5171 vma = md_section_align (sec, vma);
252b5132
RH		 5172 bfd_set_section_vma (stdoutput, sec, vma);
5173 vma += bfd_section_size (stdoutput, sec);
5174}
5175
5176#endif /* OBJ_XCOFF */
5177\f
5178/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5179 of type TYPE, and store the appropriate bytes in *LITP. The number
5180 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5181 returned, or NULL on OK. */
5182
5183char *
5184md_atof (type, litp, sizep)
5185 int type;
5186 char *litp;
5187 int *sizep;
5188{
5189 int prec;
5190 LITTLENUM_TYPE words[4];
5191 char *t;
5192 int i;
5193
5194 switch (type)
5195 {
5196 case 'f':
5197 prec = 2;
5198 break;
5199
5200 case 'd':
5201 prec = 4;
5202 break;
5203
5204 default:
5205 *sizep = 0;
5206 return _("bad call to md_atof");
5207 }
5208
5209 t = atof_ieee (input_line_pointer, type, words);
5210 if (t)
5211 input_line_pointer = t;
5212
5213 *sizep = prec * 2;
5214
5215 if (target_big_endian)
5216 {
5217 for (i = 0; i < prec; i++)
5218 {
5219 md_number_to_chars (litp, (valueT) words[i], 2);
5220 litp += 2;
5221 }
5222 }
5223 else
5224 {
5225 for (i = prec - 1; i >= 0; i--)
5226 {
5227 md_number_to_chars (litp, (valueT) words[i], 2);
5228 litp += 2;
5229 }
5230 }
81d4177b 5231
252b5132
RH		 5232 return NULL;
5233}
5234
5235/* Write a value out to the object file, using the appropriate
5236 endianness. */
5237
5238void
5239md_number_to_chars (buf, val, n)
5240 char *buf;
5241 valueT val;
5242 int n;
5243{
5244 if (target_big_endian)
5245 number_to_chars_bigendian (buf, val, n);
5246 else
5247 number_to_chars_littleendian (buf, val, n);
5248}
5249
5250/* Align a section (I don't know why this is machine dependent). */
5251
5252valueT
5253md_section_align (seg, addr)
5254 asection *seg;
5255 valueT addr;
5256{
5257 int align = bfd_get_section_alignment (stdoutput, seg);
5258
5259 return ((addr + (1 << align) - 1) & (-1 << align));
5260}
5261
5262/* We don't have any form of relaxing. */
5263
5264int
5265md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5266 fragS *fragp ATTRIBUTE_UNUSED;
5267 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5268{
5269 abort ();
5270 return 0;
5271}
5272
5273/* Convert a machine dependent frag. We never generate these. */
5274
5275void
5276md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5277 bfd *abfd ATTRIBUTE_UNUSED;
5278 asection *sec ATTRIBUTE_UNUSED;
5279 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5280{
5281 abort ();
5282}
5283
5284/* We have no need to default values of symbols. */
5285
252b5132
RH		 5286symbolS *
5287md_undefined_symbol (name)
92161534 5288 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5289{
5290 return 0;
5291}
5292\f
5293/* Functions concerning relocs. */
5294
5295/* The location from which a PC relative jump should be calculated,
5296 given a PC relative reloc. */
5297
5298long
5299md_pcrel_from_section (fixp, sec)
5300 fixS *fixp;
92161534 5301 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5302{
5303 return fixp->fx_frag->fr_address + fixp->fx_where;
5304}
5305
5306#ifdef OBJ_XCOFF
5307
5308/* This is called to see whether a fixup should be adjusted to use a
5309 section symbol. We take the opportunity to change a fixup against
5310 a symbol in the TOC subsegment into a reloc against the
5311 corresponding .tc symbol. */
5312
5313int
5314ppc_fix_adjustable (fix)
5315 fixS *fix;
5316{
b782de16
AM		 5317 valueT val = resolve_symbol_value (fix->fx_addsy);
5318 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5319 TC_SYMFIELD_TYPE *tc;
5320
5321 if (symseg == absolute_section)
5322 return 0;
252b5132 5323
252b5132 5324 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5325 && fix->fx_addsy != ppc_toc_csect
b782de16 5326 && symseg == data_section
252b5132
RH		 5327 && val >= ppc_toc_frag->fr_address
5328 && (ppc_after_toc_frag == (fragS *) NULL
5329 || val < ppc_after_toc_frag->fr_address))
5330 {
5331 symbolS *sy;
5332
5333 for (sy = symbol_next (ppc_toc_csect);
5334 sy != (symbolS *) NULL;
5335 sy = symbol_next (sy))
5336 {
b782de16
AM		 5337 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5338
5339 if (sy_tc->class == XMC_TC0)
252b5132 5340 continue;
b782de16 5341 if (sy_tc->class != XMC_TC)
252b5132 5342 break;
b782de16 5343 if (val == resolve_symbol_value (sy))
252b5132
RH		 5344 {
5345 fix->fx_addsy = sy;
5346 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5347 return 0;
5348 }
5349 }
5350
5351 as_bad_where (fix->fx_file, fix->fx_line,
5352 _("symbol in .toc does not match any .tc"));
5353 }
5354
5355 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5356 tc = symbol_get_tc (fix->fx_addsy);
5357 if (tc->subseg == 0
5358 && tc->class != XMC_TC0
5359 && tc->class != XMC_TC
5360 && symseg != bss_section
252b5132 5361 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5362 && (symseg != data_section
252b5132
RH		 5363 || ppc_toc_csect == NULL
5364 || val < ppc_toc_frag->fr_address
5365 || (ppc_after_toc_frag != NULL
5366 && val >= ppc_after_toc_frag->fr_address)))
5367 {
5368 symbolS *csect;
b782de16 5369 symbolS *next_csect;
252b5132 5370
b782de16 5371 if (symseg == text_section)
252b5132 5372 csect = ppc_text_csects;
b782de16 5373 else if (symseg == data_section)
252b5132
RH		 5374 csect = ppc_data_csects;
5375 else
5376 abort ();
5377
5378 /* Skip the initial dummy symbol. */
809ffe0d 5379 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5380
5381 if (csect != (symbolS *) NULL)
5382 {
b782de16
AM		 5383 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5384 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5385 {
5386 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5387 have to look through the full symbol table to see
5388 whether this is the csect we want. Note that we will
5389 only get here if the csect has zero length. */
b782de16
AM		 5390 if (symbol_get_frag (csect)->fr_address == val
5391 && S_GET_VALUE (csect) == val)
252b5132
RH		 5392 {
5393 symbolS *scan;
5394
809ffe0d 5395 for (scan = symbol_next (csect);
252b5132 5396 scan != NULL;
809ffe0d 5397 scan = symbol_next (scan))
252b5132 5398 {
809ffe0d 5399 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5400 break;
5401 if (scan == fix->fx_addsy)
5402 break;
5403 }
5404
5405 /* If we found the symbol before the next csect
99a814a1 5406 symbol, then this is the csect we want. */
252b5132
RH		 5407 if (scan == fix->fx_addsy)
5408 break;
5409 }
5410
b782de16 5411 csect = next_csect;
252b5132
RH		 5412 }
5413
b782de16 5414 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5415 fix->fx_addsy = csect;
5416 }
b782de16 5417 return 0;
252b5132
RH		 5418 }
5419
5420 /* Adjust a reloc against a .lcomm symbol to be against the base
5421 .lcomm. */
b782de16 5422 if (symseg == bss_section
252b5132
RH		 5423 && ! S_IS_EXTERNAL (fix->fx_addsy))
5424 {
b782de16
AM		 5425 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5426
5427 fix->fx_offset += val - resolve_symbol_value (sy);
5428 fix->fx_addsy = sy;
252b5132
RH		 5429 }
5430
5431 return 0;
5432}
5433
5434/* A reloc from one csect to another must be kept. The assembler
5435 will, of course, keep relocs between sections, and it will keep
5436 absolute relocs, but we need to force it to keep PC relative relocs
5437 between two csects in the same section. */
5438
5439int
5440ppc_force_relocation (fix)
5441 fixS *fix;
5442{
5443 /* At this point fix->fx_addsy should already have been converted to
5444 a csect symbol. If the csect does not include the fragment, then
5445 we need to force the relocation. */
5446 if (fix->fx_pcrel
5447 && fix->fx_addsy != NULL
809ffe0d
ILT		 5448 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5449 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5450 > fix->fx_frag->fr_address)
5451 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5452 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5453 <= fix->fx_frag->fr_address))))
5454 return 1;
5455
ae6063d4 5456 return generic_force_reloc (fix);
252b5132
RH		 5457}
5458
5459#endif /* OBJ_XCOFF */
5460
0baf16f2 5461#ifdef OBJ_ELF
a161fe53
AM		 5462/* If this function returns non-zero, it guarantees that a relocation
5463 will be emitted for a fixup. */
5464
5465int
5466ppc_force_relocation (fix)
5467 fixS *fix;
5468{
5469 /* Branch prediction relocations must force a relocation, as must
5470 the vtable description relocs. */
5471 switch (fix->fx_r_type)
5472 {
5473 case BFD_RELOC_PPC_B16_BRTAKEN:
5474 case BFD_RELOC_PPC_B16_BRNTAKEN:
5475 case BFD_RELOC_PPC_BA16_BRTAKEN:
5476 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5477 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5478 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5479 return 1;
5480 default:
5481 break;
5482 }
5483
cdba85ec
AM		 5484 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5485 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5486 return 1;
5487
ae6063d4 5488 return generic_force_reloc (fix);
a161fe53
AM		 5489}
5490
0baf16f2
AM		 5491int
5492ppc_fix_adjustable (fix)
5493 fixS *fix;
252b5132 5494{
0baf16f2
AM		 5495 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5496 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5497 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5498 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5499 && fix->fx_r_type != BFD_RELOC_GPREL16
5500 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5501 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5502 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5503 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5504}
0baf16f2 5505#endif
252b5132
RH		 5506
5507/* Apply a fixup to the object code. This is called for all the
5508 fixups we generated by the call to fix_new_exp, above. In the call
5509 above we used a reloc code which was the largest legal reloc code
5510 plus the operand index. Here we undo that to recover the operand
5511 index. At this point all symbol values should be fully resolved,
5512 and we attempt to completely resolve the reloc. If we can not do
5513 that, we determine the correct reloc code and put it back in the
5514 fixup. */
5515
94f592af 5516void
55cf6793 5517md_apply_fix (fixP, valP, seg)
94f592af
NC		 5518 fixS *fixP;
5519 valueT * valP;
0baf16f2 5520 segT seg ATTRIBUTE_UNUSED;
252b5132 5521{
94f592af 5522 valueT value = * valP;
252b5132
RH		 5523
5524#ifdef OBJ_ELF
94f592af 5525 if (fixP->fx_addsy != NULL)
252b5132 5526 {
a161fe53 5527 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5528 if (fixP->fx_pcrel)
5529 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5530 }
5531 else
94f592af 5532 fixP->fx_done = 1;
252b5132 5533#else
a161fe53 5534 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5535 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5536 doing this relocation the code in write.c is going to call
5537 bfd_install_relocation, which is also going to use the symbol
5538 value. That means that if the reloc is fully resolved we want to
a161fe53 5539 use *valP since bfd_install_relocation is not being used.
252b5132 5540 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5541 *valP, and must use fx_offset instead. However, if the reloc
5542 is PC relative, we do want to use *valP since it includes the
252b5132 5543 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5544 if (fixP->fx_addsy == (symbolS *) NULL)
5545 fixP->fx_done = 1;
5546
5547 else if (fixP->fx_pcrel)
5548 ;
5549
252b5132 5550 else
a161fe53
AM		 5551 value = fixP->fx_offset;
5552#endif
5553
5554 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5555 {
a161fe53
AM		 5556 /* We can't actually support subtracting a symbol. */
5557 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5558 }
252b5132 5559
94f592af 5560 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5561 {
5562 int opindex;
5563 const struct powerpc_operand *operand;
5564 char *where;
5565 unsigned long insn;
5566
94f592af 5567 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5568
5569 operand = &powerpc_operands[opindex];
5570
5571#ifdef OBJ_XCOFF
0baf16f2
AM		 5572 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5573 does not generate a reloc. It uses the offset of `sym' within its
5574 csect. Other usages, such as `.long sym', generate relocs. This
5575 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5576 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5577 && operand->bits == 16
5578 && operand->shift == 0
2b3c4602 5579 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5580 && fixP->fx_addsy != NULL
5581 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5582 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5583 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5584 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5585 {
94f592af
NC		 5586 value = fixP->fx_offset;
5587 fixP->fx_done = 1;
252b5132
RH		 5588 }
5589#endif
5590
5591 /* Fetch the instruction, insert the fully resolved operand
5592 value, and stuff the instruction back again. */
94f592af 5593 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5594 if (target_big_endian)
5595 insn = bfd_getb32 ((unsigned char *) where);
5596 else
5597 insn = bfd_getl32 ((unsigned char *) where);
5598 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5599 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5600 if (target_big_endian)
5601 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5602 else
5603 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5604
94f592af
NC		 5605 if (fixP->fx_done)
5606 /* Nothing else to do here. */
5607 return;
252b5132 5608
94f592af 5609 assert (fixP->fx_addsy != NULL);
0baf16f2 5610
252b5132
RH		 5611 /* Determine a BFD reloc value based on the operand information.
5612 We are only prepared to turn a few of the operands into
0baf16f2 5613 relocs. */
11b37b7b
AM		 5614 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5615 && operand->bits == 26
5616 && operand->shift == 0)
94f592af 5617 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5618 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5619 && operand->bits == 16
5620 && operand->shift == 0)
95210096
AM		 5621 {
5622 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5623#ifdef OBJ_XCOFF
5624 fixP->fx_size = 2;
5625 if (target_big_endian)
5626 fixP->fx_where += 2;
5627#endif
5628 }
11b37b7b
AM		 5629 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5630 && operand->bits == 26
5631 && operand->shift == 0)
94f592af 5632 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5633 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5634 && operand->bits == 16
5635 && operand->shift == 0)
95210096
AM		 5636 {
5637 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5638#ifdef OBJ_XCOFF
5639 fixP->fx_size = 2;
5640 if (target_big_endian)
5641 fixP->fx_where += 2;
5642#endif
5643 }
0baf16f2 5644#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5645 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5646 && operand->bits == 16
a7fc733f 5647 && operand->shift == 0)
11b37b7b 5648 {
a7fc733f
AM		 5649 if (ppc_is_toc_sym (fixP->fx_addsy))
5650 {
5651 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5652#ifdef OBJ_ELF
a7fc733f
AM		 5653 if (ppc_obj64
5654 && (operand->flags & PPC_OPERAND_DS) != 0)
5655 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5656#endif
5657 }
5658 else
5659 {
5660 fixP->fx_r_type = BFD_RELOC_16;
5661#ifdef OBJ_ELF
5662 if (ppc_obj64
5663 && (operand->flags & PPC_OPERAND_DS) != 0)
5664 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5665#endif
a7fc733f 5666 }
94f592af 5667 fixP->fx_size = 2;
11b37b7b 5668 if (target_big_endian)
94f592af 5669 fixP->fx_where += 2;
11b37b7b 5670 }
0baf16f2 5671#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5672 else
252b5132
RH		 5673 {
5674 char *sfile;
5675 unsigned int sline;
5676
5677 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5678 symbol. */
94f592af
NC		 5679 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5680 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5681 _("unresolved expression that must be resolved"));
5682 else
94f592af 5683 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5684 _("unsupported relocation against %s"),
94f592af
NC		 5685 S_GET_NAME (fixP->fx_addsy));
5686 fixP->fx_done = 1;
5687 return;
252b5132
RH		 5688 }
5689 }
5690 else
5691 {
5692#ifdef OBJ_ELF
94f592af 5693 ppc_elf_validate_fix (fixP, seg);
252b5132 5694#endif
94f592af 5695 switch (fixP->fx_r_type)
252b5132 5696 {
252b5132 5697 case BFD_RELOC_CTOR:
2b3c4602 5698 if (ppc_obj64)
9c7977b3
AM		 5699 goto ctor64;
5700 /* fall through */
5701
0baf16f2 5702 case BFD_RELOC_32:
94f592af
NC		 5703 if (fixP->fx_pcrel)
5704 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5705 /* fall through */
252b5132
RH		 5706
5707 case BFD_RELOC_RVA:
5708 case BFD_RELOC_32_PCREL:
252b5132 5709 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5710 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5711 value, 4);
5712 break;
5713
7f6d05e8 5714 case BFD_RELOC_64:
9c7977b3 5715 ctor64:
94f592af
NC		 5716 if (fixP->fx_pcrel)
5717 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5718 /* fall through */
0baf16f2 5719
7f6d05e8 5720 case BFD_RELOC_64_PCREL:
94f592af 5721 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5722 value, 8);
81d4177b 5723 break;
0baf16f2 5724
252b5132
RH		 5725 case BFD_RELOC_GPREL16:
5726 case BFD_RELOC_16_GOT_PCREL:
5727 case BFD_RELOC_16_GOTOFF:
5728 case BFD_RELOC_LO16_GOTOFF:
5729 case BFD_RELOC_HI16_GOTOFF:
5730 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5731 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5732 case BFD_RELOC_LO16_BASEREL:
5733 case BFD_RELOC_HI16_BASEREL:
5734 case BFD_RELOC_HI16_S_BASEREL:
5735 case BFD_RELOC_PPC_EMB_NADDR16:
5736 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5737 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5738 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5739 case BFD_RELOC_PPC_EMB_SDAI16:
5740 case BFD_RELOC_PPC_EMB_SDA2REL:
5741 case BFD_RELOC_PPC_EMB_SDA2I16:
5742 case BFD_RELOC_PPC_EMB_RELSEC16:
5743 case BFD_RELOC_PPC_EMB_RELST_LO:
5744 case BFD_RELOC_PPC_EMB_RELST_HI:
5745 case BFD_RELOC_PPC_EMB_RELST_HA:
5746 case BFD_RELOC_PPC_EMB_RELSDA:
5747 case BFD_RELOC_PPC_TOC16:
0baf16f2 5748#ifdef OBJ_ELF
0baf16f2
AM		 5749 case BFD_RELOC_PPC64_TOC16_LO:
5750 case BFD_RELOC_PPC64_TOC16_HI:
5751 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5752#endif
94f592af 5753 if (fixP->fx_pcrel)
252b5132 5754 {
94f592af
NC		 5755 if (fixP->fx_addsy != NULL)
5756 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5757 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5758 bfd_get_reloc_code_name (fixP->fx_r_type),
5759 S_GET_NAME (fixP->fx_addsy));
252b5132 5760 else
94f592af 5761 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5762 _("cannot emit PC relative %s relocation"),
94f592af 5763 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5764 }
5765
94f592af 5766 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5767 value, 2);
5768 break;
5769
3c9d25f4
AM		 5770 case BFD_RELOC_16:
5771 if (fixP->fx_pcrel)
5772 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5773 /* fall through */
5774
5775 case BFD_RELOC_16_PCREL:
5776 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5777 value, 2);
5778 break;
5779
5780 case BFD_RELOC_LO16:
5781 if (fixP->fx_pcrel)
5782 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5783 /* fall through */
5784
5785 case BFD_RELOC_LO16_PCREL:
5786 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5787 value, 2);
5788 break;
5789
252b5132
RH		 5790 /* This case happens when you write, for example,
5791 lis %r3,(L1-L2)@ha
5792 where L1 and L2 are defined later. */
5793 case BFD_RELOC_HI16:
94f592af 5794 if (fixP->fx_pcrel)
3c9d25f4
AM		 5795 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5796 /* fall through */
5797
5798 case BFD_RELOC_HI16_PCREL:
94f592af 5799 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5800 PPC_HI (value), 2);
252b5132 5801 break;
0baf16f2 5802
252b5132 5803 case BFD_RELOC_HI16_S:
94f592af 5804 if (fixP->fx_pcrel)
3c9d25f4
AM		 5805 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5806 /* fall through */
5807
5808 case BFD_RELOC_HI16_S_PCREL:
94f592af 5809 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5810 PPC_HA (value), 2);
5811 break;
5812
5813#ifdef OBJ_ELF
0baf16f2 5814 case BFD_RELOC_PPC64_HIGHER:
94f592af 5815 if (fixP->fx_pcrel)
0baf16f2 5816 abort ();
94f592af 5817 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5818 PPC_HIGHER (value), 2);
252b5132
RH		 5819 break;
5820
0baf16f2 5821 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5822 if (fixP->fx_pcrel)
0baf16f2 5823 abort ();
94f592af 5824 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5825 PPC_HIGHERA (value), 2);
5826 break;
5827
5828 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5829 if (fixP->fx_pcrel)
0baf16f2 5830 abort ();
94f592af 5831 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5832 PPC_HIGHEST (value), 2);
5833 break;
5834
5835 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5836 if (fixP->fx_pcrel)
0baf16f2 5837 abort ();
94f592af 5838 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5839 PPC_HIGHESTA (value), 2);
5840 break;
5841
5842 case BFD_RELOC_PPC64_ADDR16_DS:
5843 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5844 case BFD_RELOC_PPC64_GOT16_DS:
5845 case BFD_RELOC_PPC64_GOT16_LO_DS:
5846 case BFD_RELOC_PPC64_PLT16_LO_DS:
5847 case BFD_RELOC_PPC64_SECTOFF_DS:
5848 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5849 case BFD_RELOC_PPC64_TOC16_DS:
5850 case BFD_RELOC_PPC64_TOC16_LO_DS:
5851 case BFD_RELOC_PPC64_PLTGOT16_DS:
5852 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5853 if (fixP->fx_pcrel)
0baf16f2
AM		 5854 abort ();
5855 {
2132e3a3 5856 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5857 unsigned long val, mask;
0baf16f2
AM		 5858
5859 if (target_big_endian)
adadcc0c 5860 val = bfd_getb32 (where - 2);
0baf16f2 5861 else
adadcc0c
AM		 5862 val = bfd_getl32 (where);
5863 mask = 0xfffc;
5864 /* lq insns reserve the four lsbs. */
5865 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5866 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5867 mask = 0xfff0;
5868 val |= value & mask;
0baf16f2
AM		 5869 if (target_big_endian)
5870 bfd_putb16 ((bfd_vma) val, where);
5871 else
5872 bfd_putl16 ((bfd_vma) val, where);
5873 }
5874 break;
cdba85ec 5875
ba0b2174
AM		 5876 case BFD_RELOC_PPC_B16_BRTAKEN:
5877 case BFD_RELOC_PPC_B16_BRNTAKEN:
5878 case BFD_RELOC_PPC_BA16_BRTAKEN:
5879 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5880 break;
5881
cdba85ec 5882 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5883 break;
5884
cdba85ec
AM		 5885 case BFD_RELOC_PPC_DTPMOD:
5886 case BFD_RELOC_PPC_TPREL16:
5887 case BFD_RELOC_PPC_TPREL16_LO:
5888 case BFD_RELOC_PPC_TPREL16_HI:
5889 case BFD_RELOC_PPC_TPREL16_HA:
5890 case BFD_RELOC_PPC_TPREL:
5891 case BFD_RELOC_PPC_DTPREL16:
5892 case BFD_RELOC_PPC_DTPREL16_LO:
5893 case BFD_RELOC_PPC_DTPREL16_HI:
5894 case BFD_RELOC_PPC_DTPREL16_HA:
5895 case BFD_RELOC_PPC_DTPREL:
5896 case BFD_RELOC_PPC_GOT_TLSGD16:
5897 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5898 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5899 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5900 case BFD_RELOC_PPC_GOT_TLSLD16:
5901 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5902 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5903 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5904 case BFD_RELOC_PPC_GOT_TPREL16:
5905 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5906 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5907 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5908 case BFD_RELOC_PPC_GOT_DTPREL16:
5909 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5910 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5911 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5912 case BFD_RELOC_PPC64_TPREL16_DS:
5913 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5914 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5915 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5916 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5917 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5918 case BFD_RELOC_PPC64_DTPREL16_DS:
5919 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5920 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5921 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5922 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5923 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5924 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5925 break;
0baf16f2 5926#endif
252b5132 5927 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5928 bytes, rather than 2, so offset it here appropriately. */
252b5132 5929 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5930 if (fixP->fx_pcrel)
252b5132
RH		 5931 abort ();
5932
94f592af 5933 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5934 + ((target_big_endian) ? 2 : 0),
5935 value, 2);
5936 break;
5937
5938 case BFD_RELOC_8:
94f592af 5939 if (fixP->fx_pcrel)
31a91399
NC		 5940 {
5941 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5942 ".byte <undefined_symbol> - ." */
31a91399
NC		 5943 if (fixP->fx_addsy)
5944 as_bad (_("Unable to handle reference to symbol %s"),
5945 S_GET_NAME (fixP->fx_addsy));
5946 else
5947 as_bad (_("Unable to resolve expression"));
5948 fixP->fx_done = 1;
5949 }
5950 else
5951 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5952 value, 1);
252b5132
RH		 5953 break;
5954
5955 case BFD_RELOC_24_PLT_PCREL:
5956 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5957 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5958 abort ();
5959
94f592af 5960 if (fixP->fx_done)
99a814a1
AM		 5961 {
5962 char *where;
5963 unsigned long insn;
5964
5965 /* Fetch the instruction, insert the fully resolved operand
5966 value, and stuff the instruction back again. */
94f592af 5967 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5968 if (target_big_endian)
5969 insn = bfd_getb32 ((unsigned char *) where);
5970 else
5971 insn = bfd_getl32 ((unsigned char *) where);
5972 if ((value & 3) != 0)
94f592af 5973 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5974 _("must branch to an address a multiple of 4"));
5975 if ((offsetT) value < -0x40000000
5976 || (offsetT) value >= 0x40000000)
94f592af 5977 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5978 _("@local or @plt branch destination is too far away, %ld bytes"),
5979 (long) value);
5980 insn = insn | (value & 0x03fffffc);
5981 if (target_big_endian)
5982 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5983 else
5984 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5985 }
252b5132
RH		 5986 break;
5987
5988 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5989 fixP->fx_done = 0;
5990 if (fixP->fx_addsy
5991 && !S_IS_DEFINED (fixP->fx_addsy)
5992 && !S_IS_WEAK (fixP->fx_addsy))
5993 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5994 break;
5995
5996 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5997 fixP->fx_done = 0;
252b5132
RH		 5998 break;
5999
0baf16f2 6000#ifdef OBJ_ELF
0baf16f2
AM		 6001 /* Generated by reference to `sym@tocbase'. The sym is
6002 ignored by the linker. */
6003 case BFD_RELOC_PPC64_TOC:
94f592af 6004 fixP->fx_done = 0;
0baf16f2 6005 break;
0baf16f2 6006#endif
252b5132 6007 default:
bc805888 6008 fprintf (stderr,
94f592af 6009 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6010 fflush (stderr);
252b5132
RH		 6011 abort ();
6012 }
6013 }
6014
6015#ifdef OBJ_ELF
94f592af 6016 fixP->fx_addnumber = value;
252b5132 6017#else
94f592af
NC		 6018 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6019 fixP->fx_addnumber = 0;
252b5132
RH		 6020 else
6021 {
6022#ifdef TE_PE
94f592af 6023 fixP->fx_addnumber = 0;
252b5132
RH		 6024#else
6025 /* We want to use the offset within the data segment of the
6026 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6027 fixP->fx_addnumber =
6028 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6029#endif
6030 }
6031#endif
252b5132
RH		 6032}
6033
6034/* Generate a reloc for a fixup. */
6035
6036arelent *
6037tc_gen_reloc (seg, fixp)
92161534 6038 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6039 fixS *fixp;
6040{
6041 arelent *reloc;
6042
6043 reloc = (arelent *) xmalloc (sizeof (arelent));
6044
49309057
ILT		 6045 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6046 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6047 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6048 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6049 if (reloc->howto == (reloc_howto_type *) NULL)
6050 {
6051 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6052 _("reloc %d not supported by object file format"),
6053 (int) fixp->fx_r_type);
252b5132
RH		 6054 return NULL;
6055 }
6056 reloc->addend = fixp->fx_addnumber;
6057
6058 return reloc;
6059}
75e21f08
JJ		 6060
6061void
6062ppc_cfi_frame_initial_instructions ()
6063{
6064 cfi_add_CFA_def_cfa (1, 0);
6065}
6066
6067int
6068tc_ppc_regname_to_dw2regnum (const char *regname)
6069{
6070 unsigned int regnum = -1;
6071 unsigned int i;
6072 const char *p;
6073 char *q;
6074 static struct { char *name; int dw2regnum; } regnames[] =
6075 {
6076 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6077 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6078 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6079 { "spe_acc", 111 }, { "spefscr", 112 }
6080 };
6081
6082 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6083 if (strcmp (regnames[i].name, regname) == 0)
6084 return regnames[i].dw2regnum;
6085
6086 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6087 {
6088 p = regname + 1 + (regname[1] == '.');
6089 regnum = strtoul (p, &q, 10);
6090 if (p == q || *q || regnum >= 32)
6091 return -1;
6092 if (regname[0] == 'f')
b7d7dc63 6093 regnum += 32;
75e21f08 6094 else if (regname[0] == 'v')
b7d7dc63 6095 regnum += 77;
75e21f08
JJ		 6096 }
6097 else if (regname[0] == 'c' && regname[1] == 'r')
6098 {
6099 p = regname + 2 + (regname[2] == '.');
6100 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6101 return -1;
75e21f08
JJ		 6102 regnum = p[0] - '0' + 68;
6103 }
6104 return regnum;
6105}
A mirror of the official binutils-gdb repository