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99c513f6 1/* tc-rl78.c -- Assembler for the Renesas RL78
6f2750fe 2 Copyright (C) 2011-2016 Free Software Foundation, Inc.
99c513f6
DD
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21#include "as.h"
22#include "struc-symbol.h"
99c513f6
DD
23#include "safe-ctype.h"
24#include "dwarf2dbg.h"
99c513f6
DD
25#include "elf/common.h"
26#include "elf/rl78.h"
27#include "rl78-defs.h"
28#include "filenames.h"
29#include "listing.h"
30#include "sb.h"
31#include "macro.h"
32
33const char comment_chars[] = ";";
34/* Note that input_file.c hand checks for '#' at the beginning of the
35 first line of the input file. This is because the compiler outputs
36 #NO_APP at the beginning of its output. */
37const char line_comment_chars[] = "#";
cbf1fdc9
DD
38/* Use something that isn't going to be needed by any expressions or
39 other syntax. */
40const char line_separator_chars[] = "@";
99c513f6
DD
41
42const char EXP_CHARS[] = "eE";
43const char FLT_CHARS[] = "dD";
44
4046d87a
NC
45/* ELF flags to set in the output file header. */
46static int elf_flags = 0;
47
99c513f6
DD
48/*------------------------------------------------------------------*/
49
50char * rl78_lex_start;
51char * rl78_lex_end;
52
53typedef struct rl78_bytesT
54{
55 char prefix[1];
56 int n_prefix;
57 char base[4];
58 int n_base;
59 char ops[8];
60 int n_ops;
61 struct
62 {
63 expressionS exp;
64 char offset;
65 char nbits;
66 char type; /* RL78REL_*. */
67 int reloc;
68 fixS * fixP;
69 } fixups[2];
70 int n_fixups;
71 struct
72 {
73 char type;
74 char field_pos;
75 char val_ofs;
76 } relax[2];
77 int n_relax;
78 int link_relax;
79 fixS *link_relax_fixP;
80 char times_grown;
81 char times_shrank;
82} rl78_bytesT;
83
84static rl78_bytesT rl78_bytes;
85
0c315784
DD
86void
87rl78_relax (int type, int pos)
88{
89 rl78_bytes.relax[rl78_bytes.n_relax].type = type;
90 rl78_bytes.relax[rl78_bytes.n_relax].field_pos = pos;
91 rl78_bytes.relax[rl78_bytes.n_relax].val_ofs = rl78_bytes.n_base + rl78_bytes.n_ops;
92 rl78_bytes.n_relax ++;
93}
94
9cea966c
DD
95void
96rl78_linkrelax_addr16 (void)
97{
98 rl78_bytes.link_relax |= RL78_RELAXA_ADDR16;
99}
100
101void
102rl78_linkrelax_branch (void)
103{
e896287c 104 rl78_relax (RL78_RELAX_BRANCH, 0);
9cea966c
DD
105 rl78_bytes.link_relax |= RL78_RELAXA_BRA;
106}
107
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DD
108static void
109rl78_fixup (expressionS exp, int offsetbits, int nbits, int type)
110{
111 rl78_bytes.fixups[rl78_bytes.n_fixups].exp = exp;
112 rl78_bytes.fixups[rl78_bytes.n_fixups].offset = offsetbits;
113 rl78_bytes.fixups[rl78_bytes.n_fixups].nbits = nbits;
114 rl78_bytes.fixups[rl78_bytes.n_fixups].type = type;
115 rl78_bytes.fixups[rl78_bytes.n_fixups].reloc = exp.X_md;
116 rl78_bytes.n_fixups ++;
117}
118
119#define rl78_field_fixup(exp, offset, nbits, type) \
120 rl78_fixup (exp, offset + 8 * rl78_bytes.n_prefix), nbits, type)
121
122#define rl78_op_fixup(exp, offset, nbits, type) \
123 rl78_fixup (exp, offset + 8 * (rl78_bytes.n_prefix + rl78_bytes.n_base), nbits, type)
124
125void
126rl78_prefix (int p)
127{
128 rl78_bytes.prefix[0] = p;
129 rl78_bytes.n_prefix = 1;
130}
131
132int
e6c7cdec 133rl78_has_prefix (void)
99c513f6
DD
134{
135 return rl78_bytes.n_prefix;
136}
137
138void
139rl78_base1 (int b1)
140{
141 rl78_bytes.base[0] = b1;
142 rl78_bytes.n_base = 1;
143}
144
145void
146rl78_base2 (int b1, int b2)
147{
148 rl78_bytes.base[0] = b1;
149 rl78_bytes.base[1] = b2;
150 rl78_bytes.n_base = 2;
151}
152
153void
154rl78_base3 (int b1, int b2, int b3)
155{
156 rl78_bytes.base[0] = b1;
157 rl78_bytes.base[1] = b2;
158 rl78_bytes.base[2] = b3;
159 rl78_bytes.n_base = 3;
160}
161
162void
163rl78_base4 (int b1, int b2, int b3, int b4)
164{
165 rl78_bytes.base[0] = b1;
166 rl78_bytes.base[1] = b2;
167 rl78_bytes.base[2] = b3;
168 rl78_bytes.base[3] = b4;
169 rl78_bytes.n_base = 4;
170}
171
172#define F_PRECISION 2
173
174void
175rl78_op (expressionS exp, int nbytes, int type)
176{
177 int v = 0;
178
179 if ((exp.X_op == O_constant || exp.X_op == O_big)
180 && type != RL78REL_PCREL)
181 {
182 if (exp.X_op == O_big && exp.X_add_number <= 0)
183 {
184 LITTLENUM_TYPE w[2];
185 char * ip = rl78_bytes.ops + rl78_bytes.n_ops;
186
187 gen_to_words (w, F_PRECISION, 8);
188 ip[3] = w[0] >> 8;
189 ip[2] = w[0];
190 ip[1] = w[1] >> 8;
191 ip[0] = w[1];
192 rl78_bytes.n_ops += 4;
193 }
194 else
195 {
196 v = exp.X_add_number;
197 while (nbytes)
198 {
199 rl78_bytes.ops[rl78_bytes.n_ops++] =v & 0xff;
200 v >>= 8;
201 nbytes --;
202 }
203 }
204 }
205 else
206 {
4107ae22
DD
207 if (nbytes > 2
208 && exp.X_md == BFD_RELOC_RL78_CODE)
209 exp.X_md = 0;
b3fe4307
NC
210
211 if (nbytes == 1
212 && (exp.X_md == BFD_RELOC_RL78_LO16
213 || exp.X_md == BFD_RELOC_RL78_HI16))
214 as_bad (_("16-bit relocation used in 8-bit operand"));
215
216 if (nbytes == 2
217 && exp.X_md == BFD_RELOC_RL78_HI8)
218 as_bad (_("8-bit relocation used in 16-bit operand"));
219
99c513f6
DD
220 rl78_op_fixup (exp, rl78_bytes.n_ops * 8, nbytes * 8, type);
221 memset (rl78_bytes.ops + rl78_bytes.n_ops, 0, nbytes);
222 rl78_bytes.n_ops += nbytes;
223 }
224}
225
226/* This gets complicated when the field spans bytes, because fields
227 are numbered from the MSB of the first byte as zero, and bits are
228 stored LSB towards the LSB of the byte. Thus, a simple four-bit
229 insertion of 12 at position 4 of 0x00 yields: 0x0b. A three-bit
230 insertion of b'MXL at position 7 is like this:
231
232 - - - - - - - - - - - - - - - -
233 M X L */
234
235void
236rl78_field (int val, int pos, int sz)
237{
238 int valm;
239 int bytep, bitp;
240
241 if (sz > 0)
242 {
243 if (val < 0 || val >= (1 << sz))
244 as_bad (_("Value %d doesn't fit in unsigned %d-bit field"), val, sz);
245 }
246 else
247 {
248 sz = - sz;
249 if (val < -(1 << (sz - 1)) || val >= (1 << (sz - 1)))
250 as_bad (_("Value %d doesn't fit in signed %d-bit field"), val, sz);
251 }
252
253 /* This code points at 'M' in the above example. */
254 bytep = pos / 8;
255 bitp = pos % 8;
256
257 while (bitp + sz > 8)
258 {
259 int ssz = 8 - bitp;
260 int svalm;
261
262 svalm = val >> (sz - ssz);
263 svalm = svalm & ((1 << ssz) - 1);
264 svalm = svalm << (8 - bitp - ssz);
265 gas_assert (bytep < rl78_bytes.n_base);
266 rl78_bytes.base[bytep] |= svalm;
267
268 bitp = 0;
269 sz -= ssz;
270 bytep ++;
271 }
272 valm = val & ((1 << sz) - 1);
273 valm = valm << (8 - bitp - sz);
274 gas_assert (bytep < rl78_bytes.n_base);
275 rl78_bytes.base[bytep] |= valm;
276}
277
278/*------------------------------------------------------------------*/
279
9cea966c
DD
280enum options
281{
282 OPTION_RELAX = OPTION_MD_BASE,
e896287c 283 OPTION_NORELAX,
4046d87a 284 OPTION_G10,
1740ba0c
NC
285 OPTION_G13,
286 OPTION_G14,
856ea05c
KP
287 OPTION_32BIT_DOUBLES,
288 OPTION_64BIT_DOUBLES,
9cea966c
DD
289};
290
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DD
291#define RL78_SHORTOPTS ""
292const char * md_shortopts = RL78_SHORTOPTS;
293
294/* Assembler options. */
295struct option md_longopts[] =
296{
9cea966c 297 {"relax", no_argument, NULL, OPTION_RELAX},
e896287c 298 {"norelax", no_argument, NULL, OPTION_NORELAX},
4046d87a 299 {"mg10", no_argument, NULL, OPTION_G10},
1740ba0c
NC
300 {"mg13", no_argument, NULL, OPTION_G13},
301 {"mg14", no_argument, NULL, OPTION_G14},
302 {"mrl78", no_argument, NULL, OPTION_G14},
856ea05c
KP
303 {"m32bit-doubles", no_argument, NULL, OPTION_32BIT_DOUBLES},
304 {"m64bit-doubles", no_argument, NULL, OPTION_64BIT_DOUBLES},
99c513f6
DD
305 {NULL, no_argument, NULL, 0}
306};
307size_t md_longopts_size = sizeof (md_longopts);
308
309int
17b9d67d 310md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
99c513f6 311{
9cea966c
DD
312 switch (c)
313 {
314 case OPTION_RELAX:
315 linkrelax = 1;
316 return 1;
e896287c
DD
317 case OPTION_NORELAX:
318 linkrelax = 0;
319 return 1;
9cea966c 320
4046d87a 321 case OPTION_G10:
1740ba0c 322 elf_flags &= ~ E_FLAG_RL78_CPU_MASK;
4046d87a
NC
323 elf_flags |= E_FLAG_RL78_G10;
324 return 1;
856ea05c 325
1740ba0c
NC
326 case OPTION_G13:
327 elf_flags &= ~ E_FLAG_RL78_CPU_MASK;
328 elf_flags |= E_FLAG_RL78_G13;
329 return 1;
330
331 case OPTION_G14:
332 elf_flags &= ~ E_FLAG_RL78_CPU_MASK;
333 elf_flags |= E_FLAG_RL78_G14;
334 return 1;
335
856ea05c
KP
336 case OPTION_32BIT_DOUBLES:
337 elf_flags &= ~ E_FLAG_RL78_64BIT_DOUBLES;
338 return 1;
339
340 case OPTION_64BIT_DOUBLES:
341 elf_flags |= E_FLAG_RL78_64BIT_DOUBLES;
342 return 1;
9cea966c 343 }
99c513f6
DD
344 return 0;
345}
346
0952813b
DD
347int
348rl78_isa_g10 (void)
349{
350 return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G10;
351}
352
353int
354rl78_isa_g13 (void)
355{
356 return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G13;
357}
358
359int
360rl78_isa_g14 (void)
361{
362 return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G14;
363}
364
99c513f6 365void
6ff71e76 366md_show_usage (FILE * stream)
99c513f6 367{
856ea05c 368 fprintf (stream, _(" RL78 specific command line options:\n"));
6ff71e76 369 fprintf (stream, _(" --mrelax Enable link time relaxation\n"));
856ea05c 370 fprintf (stream, _(" --mg10 Enable support for G10 variant\n"));
1740ba0c
NC
371 fprintf (stream, _(" --mg13 Selects the G13 core.\n"));
372 fprintf (stream, _(" --mg14 Selects the G14 core [default]\n"));
373 fprintf (stream, _(" --mrl78 Alias for --mg14\n"));
856ea05c 374 fprintf (stream, _(" --m32bit-doubles [default]\n"));
6ff71e76 375 fprintf (stream, _(" --m64bit-doubles Source code uses 64-bit doubles\n"));
99c513f6
DD
376}
377
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DD
378static void
379s_bss (int ignore ATTRIBUTE_UNUSED)
380{
381 int temp;
382
383 temp = get_absolute_expression ();
384 subseg_set (bss_section, (subsegT) temp);
385 demand_empty_rest_of_line ();
386}
387
856ea05c
KP
388static void
389rl78_float_cons (int ignore ATTRIBUTE_UNUSED)
390{
391 if (elf_flags & E_FLAG_RL78_64BIT_DOUBLES)
392 return float_cons ('d');
393 return float_cons ('f');
394}
395
99c513f6
DD
396/* The target specific pseudo-ops which we support. */
397const pseudo_typeS md_pseudo_table[] =
398{
856ea05c
KP
399 /* Our "standard" pseudos. */
400 { "double", rl78_float_cons, 'd' },
401 { "bss", s_bss, 0 },
402 { "3byte", cons, 3 },
403 { "int", cons, 4 },
404 { "word", cons, 4 },
99c513f6
DD
405
406 /* End of list marker. */
407 { NULL, NULL, 0 }
408};
409
aff1a65e
NC
410static symbolS * rl78_abs_sym = NULL;
411
99c513f6
DD
412void
413md_begin (void)
414{
aff1a65e 415 rl78_abs_sym = symbol_make ("__rl78_abs__");
99c513f6
DD
416}
417
418void
419rl78_md_end (void)
420{
421}
422
4046d87a
NC
423/* Set the ELF specific flags. */
424void
425rl78_elf_final_processing (void)
426{
427 elf_elfheader (stdoutput)->e_flags |= elf_flags;
428}
429
99c513f6
DD
430/* Write a value out to the object file, using the appropriate endianness. */
431void
432md_number_to_chars (char * buf, valueT val, int n)
433{
434 number_to_chars_littleendian (buf, val, n);
435}
436
c9d66558 437static void
e0471c16 438require_end_of_expr (const char *fname)
c9d66558
DD
439{
440 while (* input_line_pointer == ' '
441 || * input_line_pointer == '\t')
442 input_line_pointer ++;
443
444 if (! * input_line_pointer
445 || strchr ("\n\r,", * input_line_pointer)
446 || strchr (comment_chars, * input_line_pointer)
447 || strchr (line_comment_chars, * input_line_pointer)
448 || strchr (line_separator_chars, * input_line_pointer))
449 return;
450
451 as_bad (_("%%%s() must be outermost term in expression"), fname);
452}
453
99c513f6
DD
454static struct
455{
e0471c16 456 const char * fname;
99c513f6
DD
457 int reloc;
458}
459reloc_functions[] =
460{
4107ae22 461 { "code", BFD_RELOC_RL78_CODE },
99c513f6
DD
462 { "lo16", BFD_RELOC_RL78_LO16 },
463 { "hi16", BFD_RELOC_RL78_HI16 },
464 { "hi8", BFD_RELOC_RL78_HI8 },
465 { 0, 0 }
466};
467
468void
469md_operand (expressionS * exp ATTRIBUTE_UNUSED)
470{
471 int reloc = 0;
472 int i;
473
474 for (i = 0; reloc_functions[i].fname; i++)
475 {
476 int flen = strlen (reloc_functions[i].fname);
477
478 if (input_line_pointer[0] == '%'
479 && strncasecmp (input_line_pointer + 1, reloc_functions[i].fname, flen) == 0
480 && input_line_pointer[flen + 1] == '(')
481 {
482 reloc = reloc_functions[i].reloc;
483 input_line_pointer += flen + 2;
484 break;
485 }
486 }
487 if (reloc == 0)
488 return;
489
490 expression (exp);
491 if (* input_line_pointer == ')')
492 input_line_pointer ++;
493
494 exp->X_md = reloc;
c9d66558
DD
495
496 require_end_of_expr (reloc_functions[i].fname);
99c513f6
DD
497}
498
499void
500rl78_frag_init (fragS * fragP)
501{
9cea966c
DD
502 if (rl78_bytes.n_relax || rl78_bytes.link_relax)
503 {
325801bd 504 fragP->tc_frag_data = XNEW (rl78_bytesT);
9cea966c
DD
505 memcpy (fragP->tc_frag_data, & rl78_bytes, sizeof (rl78_bytesT));
506 }
507 else
508 fragP->tc_frag_data = 0;
509}
510
511/* When relaxing, we need to output a reloc for any .align directive
512 so that we can retain this alignment as we adjust opcode sizes. */
513void
514rl78_handle_align (fragS * frag)
515{
516 if (linkrelax
517 && (frag->fr_type == rs_align
518 || frag->fr_type == rs_align_code)
519 && frag->fr_address + frag->fr_fix > 0
520 && frag->fr_offset > 0
521 && now_seg != bss_section)
522 {
523 fix_new (frag, frag->fr_fix, 0,
524 &abs_symbol, RL78_RELAXA_ALIGN + frag->fr_offset,
525 0, BFD_RELOC_RL78_RELAX);
526 /* For the purposes of relaxation, this relocation is attached
527 to the byte *after* the alignment - i.e. the byte that must
528 remain aligned. */
529 fix_new (frag->fr_next, 0, 0,
530 &abs_symbol, RL78_RELAXA_ELIGN + frag->fr_offset,
531 0, BFD_RELOC_RL78_RELAX);
532 }
99c513f6
DD
533}
534
6d4af3c2 535const char *
99c513f6
DD
536md_atof (int type, char * litP, int * sizeP)
537{
538 return ieee_md_atof (type, litP, sizeP, target_big_endian);
539}
540
541symbolS *
542md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
543{
544 return NULL;
545}
546
547#define APPEND(B, N_B) \
548 if (rl78_bytes.N_B) \
549 { \
550 memcpy (bytes + idx, rl78_bytes.B, rl78_bytes.N_B); \
551 idx += rl78_bytes.N_B; \
552 }
553
554
555void
556md_assemble (char * str)
557{
558 char * bytes;
559 fragS * frag_then = frag_now;
560 int idx = 0;
561 int i;
562 int rel;
563 expressionS *exp;
564
565 /*printf("\033[32mASM: %s\033[0m\n", str);*/
566
567 dwarf2_emit_insn (0);
568
569 memset (& rl78_bytes, 0, sizeof (rl78_bytes));
570
571 rl78_lex_init (str, str + strlen (str));
572
573 rl78_parse ();
574
9cea966c 575 /* This simplifies the relaxation code. */
0c315784 576 if (rl78_bytes.n_relax || rl78_bytes.link_relax)
9cea966c
DD
577 {
578 int olen = rl78_bytes.n_prefix + rl78_bytes.n_base + rl78_bytes.n_ops;
579 /* We do it this way because we want the frag to have the
0c315784
DD
580 rl78_bytes in it, which we initialize above. The extra bytes
581 are for relaxing. */
582 bytes = frag_more (olen + 3);
9cea966c
DD
583 frag_then = frag_now;
584 frag_variant (rs_machine_dependent,
585 olen /* max_chars */,
586 0 /* var */,
587 olen /* subtype */,
588 0 /* symbol */,
589 0 /* offset */,
590 0 /* opcode */);
591 frag_then->fr_opcode = bytes;
592 frag_then->fr_fix = olen + (bytes - frag_then->fr_literal);
593 frag_then->fr_subtype = olen;
594 frag_then->fr_var = 0;
595 }
596 else
597 {
598 bytes = frag_more (rl78_bytes.n_prefix + rl78_bytes.n_base + rl78_bytes.n_ops);
599 frag_then = frag_now;
600 }
99c513f6
DD
601
602 APPEND (prefix, n_prefix);
603 APPEND (base, n_base);
604 APPEND (ops, n_ops);
605
9cea966c
DD
606 if (rl78_bytes.link_relax)
607 {
608 fixS * f;
609
610 f = fix_new (frag_then,
611 (char *) bytes - frag_then->fr_literal,
612 0,
613 abs_section_sym,
614 rl78_bytes.link_relax | rl78_bytes.n_fixups,
615 0,
616 BFD_RELOC_RL78_RELAX);
617 frag_then->tc_frag_data->link_relax_fixP = f;
618 }
619
99c513f6
DD
620 for (i = 0; i < rl78_bytes.n_fixups; i ++)
621 {
622 /* index: [nbytes][type] */
623 static int reloc_map[5][4] =
624 {
625 { 0, 0 },
626 { BFD_RELOC_8, BFD_RELOC_8_PCREL },
627 { BFD_RELOC_16, BFD_RELOC_16_PCREL },
628 { BFD_RELOC_24, BFD_RELOC_24_PCREL },
629 { BFD_RELOC_32, BFD_RELOC_32_PCREL },
630 };
631 fixS * f;
632
633 idx = rl78_bytes.fixups[i].offset / 8;
634 rel = reloc_map [rl78_bytes.fixups[i].nbits / 8][(int) rl78_bytes.fixups[i].type];
635
636 if (rl78_bytes.fixups[i].reloc)
637 rel = rl78_bytes.fixups[i].reloc;
638
639 if (frag_then->tc_frag_data)
640 exp = & frag_then->tc_frag_data->fixups[i].exp;
641 else
642 exp = & rl78_bytes.fixups[i].exp;
643
644 f = fix_new_exp (frag_then,
645 (char *) bytes + idx - frag_then->fr_literal,
646 rl78_bytes.fixups[i].nbits / 8,
647 exp,
648 rl78_bytes.fixups[i].type == RL78REL_PCREL ? 1 : 0,
649 rel);
650 if (frag_then->tc_frag_data)
651 frag_then->tc_frag_data->fixups[i].fixP = f;
652 }
653}
654
655void
656rl78_cons_fix_new (fragS * frag,
657 int where,
658 int size,
659 expressionS * exp)
660{
661 bfd_reloc_code_real_type type;
c9d66558 662 fixS *fixP;
99c513f6
DD
663
664 switch (size)
665 {
666 case 1:
667 type = BFD_RELOC_8;
668 break;
669 case 2:
670 type = BFD_RELOC_16;
671 break;
672 case 3:
673 type = BFD_RELOC_24;
674 break;
675 case 4:
676 type = BFD_RELOC_32;
677 break;
678 default:
679 as_bad (_("unsupported constant size %d\n"), size);
680 return;
681 }
682
392ca752
DD
683 switch (exp->X_md)
684 {
4107ae22
DD
685 case BFD_RELOC_RL78_CODE:
686 if (size == 2)
687 type = exp->X_md;
688 break;
392ca752
DD
689 case BFD_RELOC_RL78_LO16:
690 case BFD_RELOC_RL78_HI16:
691 if (size != 2)
6ff71e76
NC
692 {
693 /* Fixups to assembler generated expressions do not use %hi or %lo. */
694 if (frag->fr_file)
695 as_bad (_("%%hi16/%%lo16 only applies to .short or .hword"));
696 }
697 else
698 type = exp->X_md;
392ca752
DD
699 break;
700 case BFD_RELOC_RL78_HI8:
701 if (size != 1)
6ff71e76
NC
702 {
703 /* Fixups to assembler generated expressions do not use %hi or %lo. */
704 if (frag->fr_file)
705 as_bad (_("%%hi8 only applies to .byte"));
706 }
707 else
708 type = exp->X_md;
392ca752
DD
709 break;
710 default:
711 break;
712 }
713
99c513f6
DD
714 if (exp->X_op == O_subtract && exp->X_op_symbol)
715 {
716 if (size != 4 && size != 2 && size != 1)
717 as_bad (_("difference of two symbols only supported with .long, .short, or .byte"));
718 else
719 type = BFD_RELOC_RL78_DIFF;
720 }
721
c9d66558
DD
722 fixP = fix_new_exp (frag, where, (int) size, exp, 0, type);
723 switch (exp->X_md)
724 {
725 /* These are intended to have values larger than the container,
726 since the backend puts only the portion we need in it.
727 However, we don't have a backend-specific reloc for them as
728 they're handled with complex relocations. */
729 case BFD_RELOC_RL78_LO16:
730 case BFD_RELOC_RL78_HI16:
731 case BFD_RELOC_RL78_HI8:
732 fixP->fx_no_overflow = 1;
733 break;
734 default:
735 break;
736 }
99c513f6
DD
737}
738
0c315784
DD
739\f
740/*----------------------------------------------------------------------*/
741/* To recap: we estimate everything based on md_estimate_size, then
742 adjust based on rl78_relax_frag. When it all settles, we call
743 md_convert frag to update the bytes. The relaxation types and
744 relocations are in fragP->tc_frag_data, which is a copy of that
745 rl78_bytes.
746
747 Our scheme is as follows: fr_fix has the size of the smallest
748 opcode (like BRA.S). We store the number of total bytes we need in
749 fr_subtype. When we're done relaxing, we use fr_subtype and the
750 existing opcode bytes to figure out what actual opcode we need to
751 put in there. If the fixup isn't resolvable now, we use the
752 maximal size. */
753
754#define TRACE_RELAX 0
755#define tprintf if (TRACE_RELAX) printf
756
757
758typedef enum
759{
760 OT_other,
761 OT_bt,
762 OT_bt_sfr,
763 OT_bt_es,
764 OT_bc,
e896287c
DD
765 OT_bh,
766 OT_sk,
767 OT_call,
768 OT_br,
0c315784
DD
769} op_type_T;
770
771/* We're looking for these types of relaxations:
772
773 BT 00110001 sbit0cc1 addr---- (cc is 10 (BF) or 01 (BT))
774 B~T 00110001 sbit0cc1 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
775
776 BT sfr 00110001 sbit0cc0 sfr----- addr----
777 BT ES: 00010001 00101110 sbit0cc1 addr----
778
779 BC 110111cc addr----
780 B~C 110111cc 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
781
782 BH 01100001 110c0011 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
783 B~H 01100001 110c0011 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
784*/
785
786/* Given the opcode bytes at OP, figure out which opcode it is and
787 return the type of opcode. We use this to re-encode the opcode as
788 a different size later. */
789
790static op_type_T
e896287c 791rl78_opcode_type (char * ops)
0c315784 792{
e896287c
DD
793 unsigned char *op = (unsigned char *)ops;
794
0c315784
DD
795 if (op[0] == 0x31
796 && ((op[1] & 0x0f) == 0x05
797 || (op[1] & 0x0f) == 0x03))
798 return OT_bt;
799
800 if (op[0] == 0x31
801 && ((op[1] & 0x0f) == 0x04
802 || (op[1] & 0x0f) == 0x02))
803 return OT_bt_sfr;
804
805 if (op[0] == 0x11
806 && op[1] == 0x31
807 && ((op[2] & 0x0f) == 0x05
808 || (op[2] & 0x0f) == 0x03))
809 return OT_bt_es;
810
811 if ((op[0] & 0xfc) == 0xdc)
812 return OT_bc;
813
814 if (op[0] == 0x61
815 && (op[1] & 0xef) == 0xc3)
816 return OT_bh;
817
e896287c
DD
818 if (op[0] == 0x61
819 && (op[1] & 0xcf) == 0xc8)
820 return OT_sk;
821
822 if (op[0] == 0x61
823 && (op[1] & 0xef) == 0xe3)
824 return OT_sk;
825
826 if (op[0] == 0xfc)
827 return OT_call;
828
829 if ((op[0] & 0xec) == 0xec)
830 return OT_br;
831
0c315784
DD
832 return OT_other;
833}
834
835/* Returns zero if *addrP has the target address. Else returns nonzero
836 if we cannot compute the target address yet. */
837
838static int
839rl78_frag_fix_value (fragS * fragP,
840 segT segment,
841 int which,
842 addressT * addrP,
843 int need_diff,
844 addressT * sym_addr)
845{
846 addressT addr = 0;
847 rl78_bytesT * b = fragP->tc_frag_data;
848 expressionS * exp = & b->fixups[which].exp;
849
850 if (need_diff && exp->X_op != O_subtract)
851 return 1;
852
853 if (exp->X_add_symbol)
854 {
855 if (S_FORCE_RELOC (exp->X_add_symbol, 1))
856 return 1;
857 if (S_GET_SEGMENT (exp->X_add_symbol) != segment)
858 return 1;
859 addr += S_GET_VALUE (exp->X_add_symbol);
860 }
861
862 if (exp->X_op_symbol)
863 {
864 if (exp->X_op != O_subtract)
865 return 1;
866 if (S_FORCE_RELOC (exp->X_op_symbol, 1))
867 return 1;
868 if (S_GET_SEGMENT (exp->X_op_symbol) != segment)
869 return 1;
870 addr -= S_GET_VALUE (exp->X_op_symbol);
871 }
872 if (sym_addr)
873 * sym_addr = addr;
874 addr += exp->X_add_number;
875 * addrP = addr;
876 return 0;
877}
878
879/* Estimate how big the opcode is after this relax pass. The return
880 value is the difference between fr_fix and the actual size. We
881 compute the total size in rl78_relax_frag and store it in fr_subtype,
6ff71e76 882 so we only need to subtract fx_fix and return it. */
0c315784 883
99c513f6
DD
884int
885md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED)
886{
0c315784
DD
887 int opfixsize;
888 int delta;
889
890 /* This is the size of the opcode that's accounted for in fr_fix. */
891 opfixsize = fragP->fr_fix - (fragP->fr_opcode - fragP->fr_literal);
892 /* This is the size of the opcode that isn't. */
893 delta = (fragP->fr_subtype - opfixsize);
894
895 tprintf (" -> opfixsize %d delta %d\n", opfixsize, delta);
896 return delta;
897}
898
899/* Given the new addresses for this relax pass, figure out how big
900 each opcode must be. We store the total number of bytes needed in
901 fr_subtype. The return value is the difference between the size
902 after the last pass and the size after this pass, so we use the old
903 fr_subtype to calculate the difference. */
904
905int
906rl78_relax_frag (segT segment ATTRIBUTE_UNUSED, fragS * fragP, long stretch)
907{
908 addressT addr0, sym_addr;
909 addressT mypc;
910 int disp;
911 int oldsize = fragP->fr_subtype;
912 int newsize = oldsize;
913 op_type_T optype;
914 int ri;
915
916 mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal);
917
918 /* If we ever get more than one reloc per opcode, this is the one
919 we're relaxing. */
920 ri = 0;
921
922 optype = rl78_opcode_type (fragP->fr_opcode);
923 /* Try to get the target address. */
924 if (rl78_frag_fix_value (fragP, segment, ri, & addr0,
925 fragP->tc_frag_data->relax[ri].type != RL78_RELAX_BRANCH,
926 & sym_addr))
927 {
e896287c
DD
928 /* If we don't expect the linker to do relaxing, don't emit
929 expanded opcodes that only the linker will relax. */
930 if (!linkrelax)
931 return newsize - oldsize;
932
0c315784
DD
933 /* If we don't, we must use the maximum size for the linker. */
934 switch (fragP->tc_frag_data->relax[ri].type)
935 {
936 case RL78_RELAX_BRANCH:
937 switch (optype)
938 {
939 case OT_bt:
940 newsize = 6;
941 break;
942 case OT_bt_sfr:
943 case OT_bt_es:
944 newsize = 7;
945 break;
946 case OT_bc:
947 newsize = 5;
948 break;
949 case OT_bh:
950 newsize = 6;
951 break;
e896287c
DD
952 case OT_sk:
953 newsize = 2;
954 break;
955 default:
0c315784
DD
956 newsize = oldsize;
957 break;
958 }
959 break;
960
961 }
962 fragP->fr_subtype = newsize;
963 tprintf (" -> new %d old %d delta %d (external)\n", newsize, oldsize, newsize-oldsize);
964 return newsize - oldsize;
965 }
966
967 if (sym_addr > mypc)
968 addr0 += stretch;
969
970 switch (fragP->tc_frag_data->relax[ri].type)
971 {
972 case RL78_RELAX_BRANCH:
973 disp = (int) addr0 - (int) mypc;
974
975 switch (optype)
976 {
977 case OT_bt:
978 if (disp >= -128 && (disp - (oldsize-2)) <= 127)
979 newsize = 3;
980 else
981 newsize = 6;
982 break;
983 case OT_bt_sfr:
984 case OT_bt_es:
985 if (disp >= -128 && (disp - (oldsize-3)) <= 127)
986 newsize = 4;
987 else
988 newsize = 7;
989 break;
990 case OT_bc:
991 if (disp >= -128 && (disp - (oldsize-1)) <= 127)
992 newsize = 2;
993 else
994 newsize = 5;
995 break;
996 case OT_bh:
997 if (disp >= -128 && (disp - (oldsize-2)) <= 127)
998 newsize = 3;
999 else
1000 newsize = 6;
1001 break;
e896287c
DD
1002 case OT_sk:
1003 newsize = 2;
1004 break;
1005 default:
0c315784
DD
1006 newsize = oldsize;
1007 break;
1008 }
1009 break;
1010 }
1011
1012 /* This prevents infinite loops in align-heavy sources. */
1013 if (newsize < oldsize)
1014 {
1015 if (fragP->tc_frag_data->times_shrank > 10
1016 && fragP->tc_frag_data->times_grown > 10)
1017 newsize = oldsize;
1018 if (fragP->tc_frag_data->times_shrank < 20)
1019 fragP->tc_frag_data->times_shrank ++;
1020 }
1021 else if (newsize > oldsize)
1022 {
1023 if (fragP->tc_frag_data->times_grown < 20)
1024 fragP->tc_frag_data->times_grown ++;
1025 }
1026
1027 fragP->fr_subtype = newsize;
1028 tprintf (" -> new %d old %d delta %d\n", newsize, oldsize, newsize-oldsize);
1029 return newsize - oldsize;
6ff71e76
NC
1030}
1031
0c315784
DD
1032/* This lets us test for the opcode type and the desired size in a
1033 switch statement. */
1034#define OPCODE(type,size) ((type) * 16 + (size))
1035
1036/* Given the opcode stored in fr_opcode and the number of bytes we
1037 think we need, encode a new opcode. We stored a pointer to the
1038 fixup for this opcode in the tc_frag_data structure. If we can do
1039 the fixup here, we change the relocation type to "none" (we test
1040 for that in tc_gen_reloc) else we change it to the right type for
1041 the new (biggest) opcode. */
1042
1043void
1044md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
1045 segT segment ATTRIBUTE_UNUSED,
1046 fragS * fragP ATTRIBUTE_UNUSED)
1047{
1048 rl78_bytesT * rl78b = fragP->tc_frag_data;
1049 addressT addr0, mypc;
1050 int disp;
1051 int reloc_type, reloc_adjust;
1052 char * op = fragP->fr_opcode;
1053 int keep_reloc = 0;
1054 int ri;
1055 int fi = (rl78b->n_fixups > 1) ? 1 : 0;
1056 fixS * fix = rl78b->fixups[fi].fixP;
1057
1058 /* If we ever get more than one reloc per opcode, this is the one
1059 we're relaxing. */
1060 ri = 0;
1061
1062 /* We used a new frag for this opcode, so the opcode address should
1063 be the frag address. */
1064 mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal);
54f66250 1065 tprintf ("\033[32mmypc: 0x%x\033[0m\n", (int)mypc);
0c315784
DD
1066
1067 /* Try to get the target address. If we fail here, we just use the
1068 largest format. */
1069 if (rl78_frag_fix_value (fragP, segment, 0, & addr0,
54f66250 1070 fragP->tc_frag_data->relax[ri].type != RL78_RELAX_BRANCH, 0))
0c315784
DD
1071 {
1072 /* We don't know the target address. */
1073 keep_reloc = 1;
1074 addr0 = 0;
1075 disp = 0;
1076 tprintf ("unknown addr ? - %x = ?\n", (int)mypc);
1077 }
1078 else
1079 {
1080 /* We know the target address, and it's in addr0. */
1081 disp = (int) addr0 - (int) mypc;
1082 tprintf ("known addr %x - %x = %d\n", (int)addr0, (int)mypc, disp);
1083 }
1084
1085 if (linkrelax)
1086 keep_reloc = 1;
1087
1088 reloc_type = BFD_RELOC_NONE;
1089 reloc_adjust = 0;
1090
1091 switch (fragP->tc_frag_data->relax[ri].type)
1092 {
1093 case RL78_RELAX_BRANCH:
1094 switch (OPCODE (rl78_opcode_type (fragP->fr_opcode), fragP->fr_subtype))
1095 {
1096
1097 case OPCODE (OT_bt, 3): /* BT A,$ - no change. */
1098 disp -= 3;
1099 op[2] = disp;
e896287c 1100 reloc_type = keep_reloc ? BFD_RELOC_8_PCREL : BFD_RELOC_NONE;
0c315784
DD
1101 break;
1102
1103 case OPCODE (OT_bt, 6): /* BT A,$ - long version. */
1104 disp -= 3;
1105 op[1] ^= 0x06; /* toggle conditional. */
1106 op[2] = 3; /* displacement over long branch. */
1107 disp -= 3;
1108 op[3] = 0xEE; /* BR $!addr20 */
1109 op[4] = disp & 0xff;
1110 op[5] = disp >> 8;
1111 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1112 reloc_adjust = 2;
1113 break;
1114
1115 case OPCODE (OT_bt_sfr, 4): /* BT PSW,$ - no change. */
1116 disp -= 4;
1117 op[3] = disp;
e896287c 1118 reloc_type = keep_reloc ? BFD_RELOC_8_PCREL : BFD_RELOC_NONE;
0c315784
DD
1119 break;
1120
1121 case OPCODE (OT_bt_sfr, 7): /* BT PSW,$ - long version. */
1122 disp -= 4;
1123 op[1] ^= 0x06; /* toggle conditional. */
1124 op[3] = 3; /* displacement over long branch. */
1125 disp -= 3;
1126 op[4] = 0xEE; /* BR $!addr20 */
1127 op[5] = disp & 0xff;
1128 op[6] = disp >> 8;
1129 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1130 reloc_adjust = 2;
1131 break;
1132
1133 case OPCODE (OT_bt_es, 4): /* BT ES:[HL],$ - no change. */
1134 disp -= 4;
1135 op[3] = disp;
e896287c 1136 reloc_type = keep_reloc ? BFD_RELOC_8_PCREL : BFD_RELOC_NONE;
0c315784
DD
1137 break;
1138
1139 case OPCODE (OT_bt_es, 7): /* BT PSW,$ - long version. */
1140 disp -= 4;
1141 op[2] ^= 0x06; /* toggle conditional. */
1142 op[3] = 3; /* displacement over long branch. */
1143 disp -= 3;
1144 op[4] = 0xEE; /* BR $!addr20 */
1145 op[5] = disp & 0xff;
1146 op[6] = disp >> 8;
1147 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1148 reloc_adjust = 2;
1149 break;
1150
1151 case OPCODE (OT_bc, 2): /* BC $ - no change. */
1152 disp -= 2;
1153 op[1] = disp;
e896287c 1154 reloc_type = keep_reloc ? BFD_RELOC_8_PCREL : BFD_RELOC_NONE;
0c315784
DD
1155 break;
1156
1157 case OPCODE (OT_bc, 5): /* BC $ - long version. */
1158 disp -= 2;
1159 op[0] ^= 0x02; /* toggle conditional. */
1160 op[1] = 3;
1161 disp -= 3;
1162 op[2] = 0xEE; /* BR $!addr20 */
1163 op[3] = disp & 0xff;
1164 op[4] = disp >> 8;
1165 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1166 reloc_adjust = 2;
1167 break;
1168
1169 case OPCODE (OT_bh, 3): /* BH $ - no change. */
1170 disp -= 3;
1171 op[2] = disp;
e896287c 1172 reloc_type = keep_reloc ? BFD_RELOC_8_PCREL : BFD_RELOC_NONE;
0c315784
DD
1173 break;
1174
1175 case OPCODE (OT_bh, 6): /* BC $ - long version. */
1176 disp -= 3;
1177 op[1] ^= 0x10; /* toggle conditional. */
1178 op[2] = 3;
1179 disp -= 3;
1180 op[3] = 0xEE; /* BR $!addr20 */
1181 op[4] = disp & 0xff;
1182 op[5] = disp >> 8;
1183 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1184 reloc_adjust = 2;
1185 break;
1186
e896287c
DD
1187 case OPCODE (OT_sk, 2): /* SK<cond> - no change */
1188 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1189 break;
3739860c 1190
e896287c
DD
1191 default:
1192 reloc_type = fix ? fix->fx_r_type : BFD_RELOC_NONE;
1193 break;
0c315784
DD
1194 }
1195 break;
1196
1197 default:
1198 if (rl78b->n_fixups)
1199 {
1200 reloc_type = fix->fx_r_type;
1201 reloc_adjust = 0;
1202 }
1203 break;
1204 }
1205
1206 if (rl78b->n_fixups)
1207 {
1208
1209 fix->fx_r_type = reloc_type;
1210 fix->fx_where += reloc_adjust;
1211 switch (reloc_type)
1212 {
1213 case BFD_RELOC_NONE:
1214 fix->fx_size = 0;
1215 break;
1216 case BFD_RELOC_8:
1217 fix->fx_size = 1;
1218 break;
1219 case BFD_RELOC_16_PCREL:
1220 fix->fx_size = 2;
1221 break;
1222 }
1223 }
1224
1225 fragP->fr_fix = fragP->fr_subtype + (fragP->fr_opcode - fragP->fr_literal);
1226 tprintf ("fragP->fr_fix now %ld (%d + (%p - %p)\n", (long) fragP->fr_fix,
1227 fragP->fr_subtype, fragP->fr_opcode, fragP->fr_literal);
1228 fragP->fr_var = 0;
1229
1230 tprintf ("compare 0x%lx vs 0x%lx - 0x%lx = 0x%lx (%p)\n",
1231 (long)fragP->fr_fix,
1232 (long)fragP->fr_next->fr_address, (long)fragP->fr_address,
1233 (long)(fragP->fr_next->fr_address - fragP->fr_address),
1234 fragP->fr_next);
1235
1236 if (fragP->fr_next != NULL
1237 && ((offsetT) (fragP->fr_next->fr_address - fragP->fr_address)
1238 != fragP->fr_fix))
1239 as_bad (_("bad frag at %p : fix %ld addr %ld %ld \n"), fragP,
1240 (long) fragP->fr_fix,
1241 (long) fragP->fr_address, (long) fragP->fr_next->fr_address);
99c513f6 1242}
9cea966c 1243
0c315784
DD
1244/* End of relaxation code.
1245 ----------------------------------------------------------------------*/
1246\f
1247
99c513f6
DD
1248arelent **
1249tc_gen_reloc (asection * seg ATTRIBUTE_UNUSED, fixS * fixp)
1250{
1251 static arelent * reloc[8];
1252 int rp;
99c513f6
DD
1253
1254 if (fixp->fx_r_type == BFD_RELOC_NONE)
1255 {
1256 reloc[0] = NULL;
1257 return reloc;
1258 }
1259
e896287c
DD
1260 if (fixp->fx_r_type == BFD_RELOC_RL78_RELAX && !linkrelax)
1261 {
1262 reloc[0] = NULL;
1263 return reloc;
1264 }
1265
99c513f6
DD
1266 if (fixp->fx_subsy
1267 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1268 {
1269 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
1270 fixp->fx_subsy = NULL;
1271 }
1272
add39d23
TS
1273 reloc[0] = XNEW (arelent);
1274 reloc[0]->sym_ptr_ptr = XNEW (asymbol *);
99c513f6
DD
1275 * reloc[0]->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1276 reloc[0]->address = fixp->fx_frag->fr_address + fixp->fx_where;
1277 reloc[0]->addend = fixp->fx_offset;
1278
1279 if (fixp->fx_r_type == BFD_RELOC_RL78_32_OP
1280 && fixp->fx_subsy)
1281 {
1282 fixp->fx_r_type = BFD_RELOC_RL78_DIFF;
99c513f6
DD
1283 }
1284
1285#define OPX(REL,SYM,ADD) \
add39d23
TS
1286 reloc[rp] = XNEW (arelent); \
1287 reloc[rp]->sym_ptr_ptr = XNEW (asymbol *); \
99c513f6
DD
1288 reloc[rp]->howto = bfd_reloc_type_lookup (stdoutput, REL); \
1289 reloc[rp]->addend = ADD; \
1290 * reloc[rp]->sym_ptr_ptr = SYM; \
1291 reloc[rp]->address = fixp->fx_frag->fr_address + fixp->fx_where; \
1292 reloc[++rp] = NULL
1293#define OPSYM(SYM) OPX(BFD_RELOC_RL78_SYM, SYM, 0)
aff1a65e
NC
1294
1295 /* FIXME: We cannot do the normal thing for an immediate value reloc,
1296 ie creating a RL78_SYM reloc in the *ABS* section with an offset
1297 equal to the immediate value we want to store. This fails because
1298 the reloc processing in bfd_perform_relocation and bfd_install_relocation
1299 will short circuit such relocs and never pass them on to the special
1300 reloc processing code. So instead we create a RL78_SYM reloc against
1301 the __rl78_abs__ symbol and arrange for the linker scripts to place
1302 this symbol at address 0. */
1303#define OPIMM(IMM) OPX (BFD_RELOC_RL78_SYM, symbol_get_bfdsym (rl78_abs_sym), IMM)
3739860c 1304
99c513f6
DD
1305#define OP(OP) OPX(BFD_RELOC_RL78_##OP, *reloc[0]->sym_ptr_ptr, 0)
1306#define SYM0() reloc[0]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_RL78_SYM)
1307
1308 rp = 1;
1309
1310 /* Certain BFD relocations cannot be translated directly into
1311 a single (non-Red Hat) RL78 relocation, but instead need
1312 multiple RL78 relocations - handle them here. */
1313 switch (fixp->fx_r_type)
1314 {
1315 case BFD_RELOC_RL78_DIFF:
1316 SYM0 ();
1317 OPSYM (symbol_get_bfdsym (fixp->fx_subsy));
1318 OP(OP_SUBTRACT);
1319
1320 switch (fixp->fx_size)
1321 {
1322 case 1:
1323 OP(ABS8);
1324 break;
1325 case 2:
1326 OP (ABS16);
1327 break;
1328 case 4:
1329 OP (ABS32);
1330 break;
1331 }
1332 break;
1333
1334 case BFD_RELOC_RL78_NEG32:
1335 SYM0 ();
1336 OP (OP_NEG);
1337 OP (ABS32);
1338 break;
1339
4107ae22 1340 case BFD_RELOC_RL78_CODE:
b3fe4307
NC
1341 reloc[0]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_RL78_16U);
1342 reloc[1] = NULL;
4107ae22
DD
1343 break;
1344
99c513f6
DD
1345 case BFD_RELOC_RL78_LO16:
1346 SYM0 ();
1347 OPIMM (0xffff);
1348 OP (OP_AND);
1349 OP (ABS16);
1350 break;
1351
1352 case BFD_RELOC_RL78_HI16:
1353 SYM0 ();
1354 OPIMM (16);
1355 OP (OP_SHRA);
1356 OP (ABS16);
1357 break;
1358
1359 case BFD_RELOC_RL78_HI8:
1360 SYM0 ();
1361 OPIMM (16);
1362 OP (OP_SHRA);
1363 OPIMM (0xff);
1364 OP (OP_AND);
1365 OP (ABS8);
1366 break;
1367
1368 default:
1369 reloc[0]->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1370 reloc[1] = NULL;
1371 break;
1372 }
1373
1374 return reloc;
1375}
1376
1377int
1378rl78_validate_fix_sub (struct fix * f)
1379{
1380 /* We permit the subtraction of two symbols in a few cases. */
1381 /* mov #sym1-sym2, R3 */
1382 if (f->fx_r_type == BFD_RELOC_RL78_32_OP)
1383 return 1;
1384 /* .long sym1-sym2 */
1385 if (f->fx_r_type == BFD_RELOC_RL78_DIFF
1386 && ! f->fx_pcrel
1387 && (f->fx_size == 4 || f->fx_size == 2 || f->fx_size == 1))
1388 return 1;
1389 return 0;
1390}
1391
1392long
1393md_pcrel_from_section (fixS * fixP, segT sec)
1394{
1395 long rv;
1396
1397 if (fixP->fx_addsy != NULL
1398 && (! S_IS_DEFINED (fixP->fx_addsy)
1399 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
1400 /* The symbol is undefined (or is defined but not in this section).
1401 Let the linker figure it out. */
1402 return 0;
1403
1404 rv = fixP->fx_frag->fr_address + fixP->fx_where;
1405 switch (fixP->fx_r_type)
1406 {
1407 case BFD_RELOC_8_PCREL:
1408 rv += 1;
1409 break;
1410 case BFD_RELOC_16_PCREL:
1411 rv += 2;
1412 break;
1413 default:
1414 break;
1415 }
1416 return rv;
1417}
1418
1419void
1420md_apply_fix (struct fix * f ATTRIBUTE_UNUSED,
1421 valueT * t ATTRIBUTE_UNUSED,
1422 segT s ATTRIBUTE_UNUSED)
1423{
1424 char * op;
1425 unsigned long val;
1426
e896287c
DD
1427 /* We always defer overflow checks for these to the linker, as it
1428 needs to do PLT stuff. */
1429 if (f->fx_r_type == BFD_RELOC_RL78_CODE)
1430 f->fx_no_overflow = 1;
1431
99c513f6
DD
1432 if (f->fx_addsy && S_FORCE_RELOC (f->fx_addsy, 1))
1433 return;
1434 if (f->fx_subsy && S_FORCE_RELOC (f->fx_subsy, 1))
1435 return;
1436
1437 op = f->fx_frag->fr_literal + f->fx_where;
1438 val = (unsigned long) * t;
1439
e896287c
DD
1440 if (f->fx_addsy == NULL)
1441 f->fx_done = 1;
1442
99c513f6
DD
1443 switch (f->fx_r_type)
1444 {
1445 case BFD_RELOC_NONE:
1446 break;
1447
9cea966c 1448 case BFD_RELOC_RL78_RELAX:
e896287c 1449 f->fx_done = 0;
9cea966c
DD
1450 break;
1451
99c513f6 1452 case BFD_RELOC_8_PCREL:
0a899fd5
DD
1453 if ((long)val < -128 || (long)val > 127)
1454 as_bad_where (f->fx_file, f->fx_line,
1455 _("value of %ld too large for 8-bit branch"),
1456 val);
1457 /* Fall through. */
1458 case BFD_RELOC_8:
54f66250 1459 case BFD_RELOC_RL78_SADDR: /* We need to store the 8 LSB, but this works. */
99c513f6
DD
1460 op[0] = val;
1461 break;
1462
99c513f6 1463 case BFD_RELOC_16_PCREL:
0a899fd5
DD
1464 if ((long)val < -32768 || (long)val > 32767)
1465 as_bad_where (f->fx_file, f->fx_line,
1466 _("value of %ld too large for 16-bit branch"),
1467 val);
1468 /* Fall through. */
1469 case BFD_RELOC_16:
4107ae22 1470 case BFD_RELOC_RL78_CODE:
99c513f6
DD
1471 op[0] = val;
1472 op[1] = val >> 8;
1473 break;
1474
1475 case BFD_RELOC_24:
1476 op[0] = val;
1477 op[1] = val >> 8;
1478 op[2] = val >> 16;
1479 break;
1480
1481 case BFD_RELOC_32:
99c513f6
DD
1482 op[0] = val;
1483 op[1] = val >> 8;
1484 op[2] = val >> 16;
1485 op[3] = val >> 24;
1486 break;
1487
3ce3a066
NC
1488 case BFD_RELOC_RL78_DIFF:
1489 op[0] = val;
1490 if (f->fx_size > 1)
1491 op[1] = val >> 8;
1492 if (f->fx_size > 2)
1493 op[2] = val >> 16;
1494 if (f->fx_size > 3)
1495 op[3] = val >> 24;
1496 break;
1497
b3fe4307
NC
1498 case BFD_RELOC_RL78_HI8:
1499 val = val >> 16;
1500 op[0] = val;
1501 break;
1502
1503 case BFD_RELOC_RL78_HI16:
1504 val = val >> 16;
1505 op[0] = val;
1506 op[1] = val >> 8;
1507 break;
1508
1509 case BFD_RELOC_RL78_LO16:
1510 op[0] = val;
1511 op[1] = val >> 8;
1512 break;
1513
99c513f6
DD
1514 default:
1515 as_bad (_("Unknown reloc in md_apply_fix: %s"),
1516 bfd_get_reloc_code_name (f->fx_r_type));
1517 break;
1518 }
1519
99c513f6
DD
1520}
1521
1522valueT
1523md_section_align (segT segment, valueT size)
1524{
1525 int align = bfd_get_section_alignment (stdoutput, segment);
8d3842cd 1526 return ((size + (1 << align) - 1) & -(1 << align));
99c513f6 1527}