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Fix TIC54X buffer overruns
[thirdparty/binutils-gdb.git] / gas / config / tc-tic6x.c
CommitLineData
40b36596 1/* TI C6X assembler.
4b95cf5c 2 Copyright (C) 2010-2014 Free Software Foundation, Inc.
c0621d88
NS		 3 Contributed by Joseph Myers <joseph@codesourcery.com>
4 Bernd Schmidt <bernds@codesourcery.com>
40b36596
JM		 5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23#include "as.h"
24#include "dwarf2dbg.h"
1bce6bd8 25#include "dw2gencfi.h"
40b36596
JM		 26#include "safe-ctype.h"
27#include "subsegs.h"
28#include "opcode/tic6x.h"
59e6276b 29#include "elf/tic6x.h"
41820509 30#include "elf32-tic6x.h"
40b36596
JM		 31
32/* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34#define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35#define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
36
1bce6bd8
PB		 37#define streq(a, b) (strcmp (a, b) == 0)
38
ac145307
BS		 39/* Stuff for .scomm symbols. */
40static segT sbss_section;
41static asection scom_section;
42static asymbol scom_symbol;
43
40b36596
JM		 44const char comment_chars[] = ";";
45const char line_comment_chars[] = "#*;";
46const char line_separator_chars[] = "@";
47
48const char EXP_CHARS[] = "eE";
49const char FLT_CHARS[] = "dDfF";
50
51const char *md_shortopts = "";
52
53enum
54 {
55 OPTION_MARCH = OPTION_MD_BASE,
40b36596 56 OPTION_MBIG_ENDIAN,
41820509 57 OPTION_MLITTLE_ENDIAN,
b5593623
JM		 58 OPTION_MDSBT,
59 OPTION_MNO_DSBT,
87779176
JM		 60 OPTION_MPID,
61 OPTION_MPIC,
62 OPTION_MNO_PIC,
41820509 63 OPTION_MGENERATE_REL
40b36596
JM		 64 };
65
66struct option md_longopts[] =
67 {
68 { "march", required_argument, NULL, OPTION_MARCH },
40b36596
JM		 69 { "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN },
70 { "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN },
b5593623
JM		 71 { "mdsbt", no_argument, NULL, OPTION_MDSBT },
72 { "mno-dsbt", no_argument, NULL, OPTION_MNO_DSBT },
87779176
JM		 73 { "mpid", required_argument, NULL, OPTION_MPID },
74 { "mpic", no_argument, NULL, OPTION_MPIC },
75 { "mno-pic", no_argument, NULL, OPTION_MNO_PIC },
41820509 76 { "mgenerate-rel", no_argument, NULL, OPTION_MGENERATE_REL },
40b36596
JM		 77 { NULL, no_argument, NULL, 0 }
78 };
79size_t md_longopts_size = sizeof (md_longopts);
80
40b36596 81/* The instructions enabled based only on the selected architecture
98d23bef 82 (all instructions, if no architecture specified). */
40b36596
JM		 83static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
84 | TIC6X_INSN_C64X
85 | TIC6X_INSN_C64XP
86 | TIC6X_INSN_C67X
87 | TIC6X_INSN_C67XP
98d23bef 88 | TIC6X_INSN_C674X);
40b36596
JM		 89
90/* The instructions enabled based on the current set of features
91 (architecture, as modified by other options). */
92static unsigned short tic6x_features;
93
75fa6dc1 94/* The architecture attribute value, or C6XABI_Tag_ISA_none if
59e6276b 95 not yet set. */
75fa6dc1 96static int tic6x_arch_attribute = C6XABI_Tag_ISA_none;
59e6276b
JM		 97
98/* Whether any instructions at all have been seen. Once any
99 instructions have been seen, architecture attributes merge into the
100 previous attribute value rather than replacing it. */
101static bfd_boolean tic6x_seen_insns = FALSE;
102
40b36596
JM		 103/* The number of registers in each register file supported by the
104 current architecture. */
105static unsigned int tic6x_num_registers;
106
107/* Whether predication on A0 is possible. */
108static bfd_boolean tic6x_predicate_a0;
109
110/* Whether execute packets can cross fetch packet boundaries. */
111static bfd_boolean tic6x_can_cross_fp_boundary;
112
113/* Whether there are constraints on simultaneous reads and writes of
114 40-bit data. */
115static bfd_boolean tic6x_long_data_constraints;
116
117/* Whether compact instructions are available. */
118static bfd_boolean tic6x_compact_insns;
119
41820509
JM		 120/* Whether to generate RELA relocations. */
121static bfd_boolean tic6x_generate_rela = TRUE;
122
b5593623
JM		 123/* Whether the code uses DSBT addressing. */
124static bfd_boolean tic6x_dsbt;
125
87779176
JM		 126/* Types of position-independent data (attribute values for
127 Tag_ABI_PID). */
128typedef enum
129 {
130 tic6x_pid_no = 0,
131 tic6x_pid_near = 1,
132 tic6x_pid_far = 2
133 } tic6x_pid_type;
134
135/* The type of data addressing used in this code. */
136static tic6x_pid_type tic6x_pid;
137
138/* Whether the code uses position-independent code. */
139static bfd_boolean tic6x_pic;
140
40b36596
JM		 141/* Table of supported architecture variants. */
142typedef struct
143{
144 const char *arch;
59e6276b 145 int attr;
40b36596
JM		 146 unsigned short features;
147} tic6x_arch_table;
148static const tic6x_arch_table tic6x_arches[] =
149 {
75fa6dc1
JM		 150 { "c62x", C6XABI_Tag_ISA_C62X, TIC6X_INSN_C62X },
151 { "c64x", C6XABI_Tag_ISA_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X },
152 { "c64x+", C6XABI_Tag_ISA_C64XP, (TIC6X_INSN_C62X
153 | TIC6X_INSN_C64X
154 | TIC6X_INSN_C64XP) },
155 { "c67x", C6XABI_Tag_ISA_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X },
156 { "c67x+", C6XABI_Tag_ISA_C67XP, (TIC6X_INSN_C62X
157 | TIC6X_INSN_C67X
158 | TIC6X_INSN_C67XP) },
159 { "c674x", C6XABI_Tag_ISA_C674X, (TIC6X_INSN_C62X
160 | TIC6X_INSN_C64X
161 | TIC6X_INSN_C64XP
162 | TIC6X_INSN_C67X
163 | TIC6X_INSN_C67XP
164 | TIC6X_INSN_C674X) }
40b36596
JM		 165 };
166
1bce6bd8
PB		 167/* Caller saved register encodings. The standard frame layout uses this
168 order, starting from the highest address. There must be
169 TIC6X_NUM_UNWIND_REGS values. */
170enum
171{
172 UNWIND_A15,
173 UNWIND_B15,
174 UNWIND_B14,
175 UNWIND_B13,
176 UNWIND_B12,
177 UNWIND_B11,
178 UNWIND_B10,
179 UNWIND_B3,
180 UNWIND_A14,
181 UNWIND_A13,
182 UNWIND_A12,
183 UNWIND_A11,
184 UNWIND_A10
185};
186
187static void tic6x_output_unwinding (bfd_boolean need_extab);
188
189/* Return the frame unwind state for the current function, allocating
190 as necessary. */
191
192static tic6x_unwind_info *tic6x_get_unwind (void)
193{
194 tic6x_unwind_info *unwind;
195
196 unwind = seg_info (now_seg)->tc_segment_info_data.unwind;
197 if (unwind)
198 return unwind;
199
200 unwind = seg_info (now_seg)->tc_segment_info_data.text_unwind;
201 if (unwind)
202 return unwind;
203
204 unwind = (tic6x_unwind_info *)xmalloc (sizeof (tic6x_unwind_info));
205 seg_info (now_seg)->tc_segment_info_data.unwind = unwind;
206 memset (unwind, 0, sizeof (*unwind));
207 return unwind;
208}
209
40b36596
JM		 210/* Update the selected architecture based on ARCH, giving an error if
211 ARCH is an invalid value. Does not call tic6x_update_features; the
212 caller must do that if necessary. */
213
214static void
215tic6x_use_arch (const char *arch)
216{
217 unsigned int i;
218
219 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
220 if (strcmp (arch, tic6x_arches[i].arch) == 0)
221 {
222 tic6x_arch_enable = tic6x_arches[i].features;
59e6276b
JM		 223 if (tic6x_seen_insns)
224 tic6x_arch_attribute
225 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute,
226 tic6x_arches[i].attr);
227 else
228 tic6x_arch_attribute = tic6x_arches[i].attr;
40b36596
JM		 229 return;
230 }
231
232 as_bad (_("unknown architecture '%s'"), arch);
233}
234
87779176
JM		 235/* Table of supported -mpid arguments. */
236typedef struct
237{
238 const char *arg;
239 tic6x_pid_type attr;
240} tic6x_pid_type_table;
241static const tic6x_pid_type_table tic6x_pid_types[] =
242 {
243 { "no", tic6x_pid_no },
244 { "near", tic6x_pid_near },
245 { "far", tic6x_pid_far }
246 };
247
248/* Handle -mpid=ARG. */
249
250static void
251tic6x_use_pid (const char *arg)
252{
253 unsigned int i;
254
255 for (i = 0; i < ARRAY_SIZE (tic6x_pid_types); i++)
256 if (strcmp (arg, tic6x_pid_types[i].arg) == 0)
257 {
258 tic6x_pid = tic6x_pid_types[i].attr;
259 return;
260 }
261
262 as_bad (_("unknown -mpid= argument '%s'"), arg);
263}
264
40b36596
JM		 265/* Parse a target-specific option. */
266
267int
268md_parse_option (int c, char *arg)
269{
270 switch (c)
271 {
272 case OPTION_MARCH:
273 tic6x_use_arch (arg);
274 break;
275
40b36596
JM		 276 case OPTION_MBIG_ENDIAN:
277 target_big_endian = 1;
278 break;
279
280 case OPTION_MLITTLE_ENDIAN:
281 target_big_endian = 0;
282 break;
283
b5593623
JM		 284 case OPTION_MDSBT:
285 tic6x_dsbt = 1;
286 break;
287
288 case OPTION_MNO_DSBT:
289 tic6x_dsbt = 0;
290 break;
291
87779176
JM		 292 case OPTION_MPID:
293 tic6x_use_pid (arg);
294 break;
295
296 case OPTION_MPIC:
297 tic6x_pic = 1;
298 break;
299
300 case OPTION_MNO_PIC:
301 tic6x_pic = 0;
302 break;
303
41820509
JM		 304 case OPTION_MGENERATE_REL:
305 tic6x_generate_rela = FALSE;
306 break;
307
40b36596
JM		 308 default:
309 return 0;
310 }
311 return 1;
312}
313
314void
315md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
316{
317 unsigned int i;
318
319 fputc ('\n', stream);
320 fprintf (stream, _("TMS320C6000 options:\n"));
321 fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n"));
40b36596
JM		 322 fprintf (stream, _(" -mbig-endian generate big-endian code\n"));
323 fprintf (stream, _(" -mlittle-endian generate little-endian code\n"));
b5593623
JM		 324 fprintf (stream, _(" -mdsbt code uses DSBT addressing\n"));
325 fprintf (stream, _(" -mno-dsbt code does not use DSBT addressing\n"));
87779176
JM		 326 fprintf (stream, _(" -mpid=no code uses position-dependent data addressing\n"));
327 fprintf (stream, _(" -mpid=near code uses position-independent data addressing,\n"
328 " GOT accesses use near DP addressing\n"));
329 fprintf (stream, _(" -mpid=far code uses position-independent data addressing,\n"
330 " GOT accesses use far DP addressing\n"));
331 fprintf (stream, _(" -mpic code addressing is position-independent\n"));
332 fprintf (stream, _(" -mno-pic code addressing is position-dependent\n"));
41820509
JM		 333 /* -mgenerate-rel is only for testsuite use and is deliberately
334 undocumented. */
40b36596
JM		 335
336 fputc ('\n', stream);
337 fprintf (stream, _("Supported ARCH values are:"));
338 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
339 fprintf (stream, " %s", tic6x_arches[i].arch);
340 fputc ('\n', stream);
341}
342
343/* Update enabled features based on the current architecture and
344 related settings. */
345static void
346tic6x_update_features (void)
347{
98d23bef 348 tic6x_features = tic6x_arch_enable;
40b36596
JM		 349
350 tic6x_num_registers
351 = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16;
352
353 tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? TRUE : FALSE;
354
355 tic6x_can_cross_fp_boundary
356 = (tic6x_arch_enable
357 & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? TRUE : FALSE;
358
359 tic6x_long_data_constraints
360 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? FALSE : TRUE;
361
362 tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) ? TRUE : FALSE;
363}
364
365/* Do configuration after all options have been parsed. */
366
367void
368tic6x_after_parse_args (void)
369{
370 tic6x_update_features ();
371}
372
1bce6bd8
PB		 373/* Parse a .cantunwind directive. */
374static void
375s_tic6x_cantunwind (int ignored ATTRIBUTE_UNUSED)
376{
377 tic6x_unwind_info *unwind = tic6x_get_unwind ();
378
379 /* GCC sometimes spits out superfluous .cantunwind directives, so ignore
380 them. */
381 if (unwind->data_bytes == 0)
382 return;
383
384 if (unwind->data_bytes != -1)
385 {
386 as_bad (_("unexpected .cantunwind directive"));
387 return;
388 }
389
390 demand_empty_rest_of_line ();
391
392 if (unwind->personality_routine || unwind->personality_index != -1)
393 as_bad (_("personality routine specified for cantunwind frame"));
394
395 unwind->personality_index = -2;
396}
397
398/* Parse a .handlerdata directive. */
399static void
400s_tic6x_handlerdata (int ignored ATTRIBUTE_UNUSED)
401{
402 tic6x_unwind_info *unwind = tic6x_get_unwind ();
403
404 if (!unwind->saved_seg)
405 {
406 as_bad (_("unexpected .handlerdata directive"));
407 return;
408 }
409
410 if (unwind->table_entry || unwind->personality_index == -2)
411 {
412 as_bad (_("duplicate .handlerdata directive"));
413 return;
414 }
415
416 if (unwind->personality_index == -1 && unwind->personality_routine == NULL)
417 {
418 as_bad (_("personality routine required before .handlerdata directive"));
419 return;
420 }
421
422 tic6x_output_unwinding (TRUE);
423}
424
425/* Parse a .endp directive. */
426static void
427s_tic6x_endp (int ignored ATTRIBUTE_UNUSED)
428{
429 tic6x_unwind_info *unwind = tic6x_get_unwind ();
430
431 if (unwind->data_bytes != 0)
432 {
433 /* Output a .exidx entry if we have not already done so.
434 Then switch back to the text section. */
435 if (!unwind->table_entry)
436 tic6x_output_unwinding (FALSE);
437
438 subseg_set (unwind->saved_seg, unwind->saved_subseg);
439 }
440
441 unwind->saved_seg = NULL;
442 unwind->table_entry = NULL;
443 unwind->data_bytes = 0;
444}
445
446/* Parse a .personalityindex directive. */
447static void
448s_tic6x_personalityindex (int ignored ATTRIBUTE_UNUSED)
449{
450 tic6x_unwind_info *unwind = tic6x_get_unwind ();
451 expressionS exp;
452
453 if (unwind->personality_routine || unwind->personality_index != -1)
454 as_bad (_("duplicate .personalityindex directive"));
455
456 expression (&exp);
457
458 if (exp.X_op != O_constant
459 || exp.X_add_number < 0 || exp.X_add_number > 15)
460 {
461 as_bad (_("bad personality routine number"));
462 ignore_rest_of_line ();
463 return;
464 }
465
466 unwind->personality_index = exp.X_add_number;
467
468 demand_empty_rest_of_line ();
469}
40b36596 470
1bce6bd8
PB		 471static void
472s_tic6x_personality (int ignored ATTRIBUTE_UNUSED)
473{
474 char *name, *p, c;
475 tic6x_unwind_info *unwind = tic6x_get_unwind ();
476
477 if (unwind->personality_routine || unwind->personality_index != -1)
478 as_bad (_("duplicate .personality directive"));
479
480 name = input_line_pointer;
481 c = get_symbol_end ();
482 p = input_line_pointer;
483 unwind->personality_routine = symbol_find_or_make (name);
484 *p = c;
485 demand_empty_rest_of_line ();
486}
487
488/* Parse a .arch directive. */
40b36596
JM		 489static void
490s_tic6x_arch (int ignored ATTRIBUTE_UNUSED)
491{
492 char c;
493 char *arch;
494
495 arch = input_line_pointer;
496 while (*input_line_pointer && !ISSPACE (*input_line_pointer))
497 input_line_pointer++;
498 c = *input_line_pointer;
499 *input_line_pointer = 0;
500
501 tic6x_use_arch (arch);
502 tic6x_update_features ();
503 *input_line_pointer = c;
504 demand_empty_rest_of_line ();
505}
506
2fbb87f6
PB		 507/* Parse a .ehtype directive. */
508
509static void
510s_tic6x_ehtype (int ignored ATTRIBUTE_UNUSED)
511{
512 expressionS exp;
513 char *p;
514
515#ifdef md_flush_pending_output
516 md_flush_pending_output ();
517#endif
518
519 if (is_it_end_of_statement ())
520 {
521 demand_empty_rest_of_line ();
522 return;
523 }
524
525#ifdef md_cons_align
526 md_cons_align (4);
527#endif
528
529
530 expression (&exp);
531
532 if (exp.X_op != O_symbol)
533 {
534 as_bad (_("expected symbol"));
535 return;
536 }
537
538 p = frag_more (4);
539 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
540 &exp, 0, BFD_RELOC_C6000_EHTYPE);
541
542 demand_empty_rest_of_line ();
543}
544
40b36596
JM		 545/* Parse a .nocmp directive. */
546
547static void
548s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED)
549{
550 seg_info (now_seg)->tc_segment_info_data.nocmp = TRUE;
551 demand_empty_rest_of_line ();
552}
553
ac145307
BS		 554/* .scomm pseudo-op handler.
555
556 This is a new pseudo-op to handle putting objects in .scommon.
557 By doing this the linker won't need to do any work,
558 and more importantly it removes the implicit -G arg necessary to
559 correctly link the object file. */
560
561static void
562s_tic6x_scomm (int ignore ATTRIBUTE_UNUSED)
563{
564 char *name;
565 char c;
566 char *p;
567 offsetT size;
568 symbolS *symbolP;
569 offsetT align;
570 int align2;
571
572 name = input_line_pointer;
573 c = get_symbol_end ();
574
575 /* Just after name is now '\0'. */
576 p = input_line_pointer;
577 *p = c;
578 SKIP_WHITESPACE ();
579 if (*input_line_pointer != ',')
580 {
581 as_bad (_("expected comma after symbol name"));
582 ignore_rest_of_line ();
583 return;
584 }
585
586 /* Skip ','. */
587 input_line_pointer++;
588 if ((size = get_absolute_expression ()) < 0)
589 {
590 /* xgettext:c-format */
591 as_warn (_("invalid length for .scomm directive"));
592 ignore_rest_of_line ();
593 return;
594 }
595
596 /* The third argument to .scomm is the alignment. */
597 if (*input_line_pointer != ',')
598 align = 8;
599 else
600 {
601 ++input_line_pointer;
602 align = get_absolute_expression ();
603 if (align <= 0)
604 {
605 as_warn (_("alignment is not a positive number"));
606 align = 8;
607 }
608 }
609
610 /* Convert to a power of 2 alignment. */
611 if (align)
612 {
613 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2)
614 continue;
615 if (align != 1)
616 {
617 as_bad (_("alignment is not a power of 2"));
618 ignore_rest_of_line ();
619 return;
620 }
621 }
622 else
623 align2 = 0;
624
625 *p = 0;
626 symbolP = symbol_find_or_make (name);
627 *p = c;
628
629 if (S_IS_DEFINED (symbolP))
630 {
631 /* xgettext:c-format */
632 as_bad (_("attempt to re-define symbol `%s'"),
633 S_GET_NAME (symbolP));
634 ignore_rest_of_line ();
635 return;
636 }
637
638 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
639 {
640 /* xgettext:c-format */
641 as_bad (_("attempt to redefine `%s' with a different length"),
642 S_GET_NAME (symbolP));
643
644 ignore_rest_of_line ();
645 return;
646 }
647
648 if (symbol_get_obj (symbolP)->local)
649 {
650 segT old_sec = now_seg;
651 int old_subsec = now_subseg;
652 char *pfrag;
653
654 record_alignment (sbss_section, align2);
655 subseg_set (sbss_section, 0);
656
657 if (align2)
658 frag_align (align2, 0, 0);
659
660 if (S_GET_SEGMENT (symbolP) == sbss_section)
661 symbol_get_frag (symbolP)->fr_symbol = 0;
662
663 symbol_set_frag (symbolP, frag_now);
664
665 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
666 (char *) 0);
667 *pfrag = 0;
668 S_SET_SIZE (symbolP, size);
669 S_SET_SEGMENT (symbolP, sbss_section);
670 S_CLEAR_EXTERNAL (symbolP);
671 subseg_set (old_sec, old_subsec);
672 }
673 else
674 {
675 S_SET_VALUE (symbolP, (valueT) size);
676 S_SET_ALIGN (symbolP, 1 << align2);
677 S_SET_EXTERNAL (symbolP);
678 S_SET_SEGMENT (symbolP, &scom_section);
679 }
680
681 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
682
683 demand_empty_rest_of_line ();
684}
685
59e6276b
JM		 686/* Track for each attribute whether it has been set explicitly (and so
687 should not have a default value set by the assembler). */
688static bfd_boolean tic6x_attributes_set_explicitly[NUM_KNOWN_OBJ_ATTRIBUTES];
689
690/* Parse a .c6xabi_attribute directive. */
691
692static void
693s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED)
694{
0420f52b 695 int tag = obj_elf_vendor_attribute (OBJ_ATTR_PROC);
59e6276b
JM		 696
697 if (tag < NUM_KNOWN_OBJ_ATTRIBUTES)
698 tic6x_attributes_set_explicitly[tag] = TRUE;
699}
700
701typedef struct
702{
703 const char *name;
704 int tag;
705} tic6x_attribute_table;
706
707static const tic6x_attribute_table tic6x_attributes[] =
708 {
b5593623 709#define TAG(tag, value) { #tag, tag },
59e6276b
JM		 710#include "elf/tic6x-attrs.h"
711#undef TAG
712 };
713
714/* Convert an attribute name to a number. */
715
716int
717tic6x_convert_symbolic_attribute (const char *name)
718{
719 unsigned int i;
720
721 for (i = 0; i < ARRAY_SIZE (tic6x_attributes); i++)
722 if (strcmp (name, tic6x_attributes[i].name) == 0)
723 return tic6x_attributes[i].tag;
724
725 return -1;
726}
727
40b36596
JM		 728const pseudo_typeS md_pseudo_table[] =
729 {
730 { "arch", s_tic6x_arch, 0 },
59e6276b 731 { "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 },
40b36596 732 { "nocmp", s_tic6x_nocmp, 0 },
ac145307 733 { "scomm", s_tic6x_scomm, 0 },
40b36596 734 { "word", cons, 4 },
2fbb87f6 735 { "ehtype", s_tic6x_ehtype, 0 },
1bce6bd8
PB		 736 { "endp", s_tic6x_endp, 0 },
737 { "handlerdata", s_tic6x_handlerdata, 0 },
738 { "personalityindex", s_tic6x_personalityindex, 0 },
739 { "personality", s_tic6x_personality, 0 },
740 { "cantunwind", s_tic6x_cantunwind, 0 },
40b36596
JM		 741 { 0, 0, 0 }
742 };
743
744/* Hash table of opcodes. For each opcode name, this stores a pointer
745 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
746 table entries with that name. */
747static struct hash_control *opcode_hash;
748
749/* Initialize the assembler (called once at assembler startup). */
750
751void
752md_begin (void)
753{
754 tic6x_opcode_id id;
ac145307
BS		 755 flagword applicable;
756 segT seg;
757 subsegT subseg;
40b36596
JM		 758
759 bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0);
760
761 /* Insert opcodes into the hash table. */
762 opcode_hash = hash_new ();
763 for (id = 0; id < tic6x_opcode_max; id++)
764 {
765 const char *errmsg;
766 tic6x_opcode_list *opc = xmalloc (sizeof (tic6x_opcode_list));
767
768 opc->id = id;
769 opc->next = hash_find (opcode_hash, tic6x_opcode_table[id].name);
770 if ((errmsg = hash_jam (opcode_hash, tic6x_opcode_table[id].name, opc))
771 != NULL)
772 as_fatal ("%s", _(errmsg));
773 }
ac145307
BS		 774
775 /* Save the current subseg so we can restore it [it's the default one and
776 we don't want the initial section to be .sbss]. */
777 seg = now_seg;
778 subseg = now_subseg;
779
780 /* The sbss section is for local .scomm symbols. */
781 sbss_section = subseg_new (".bss", 0);
782 seg_info (sbss_section)->bss = 1;
783
784 /* This is copied from perform_an_assembly_pass. */
785 applicable = bfd_applicable_section_flags (stdoutput);
786 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
787
788 subseg_set (seg, subseg);
789
790 /* We must construct a fake section similar to bfd_com_section
791 but with the name .scommon. */
45dfa85a 792 scom_section = *bfd_com_section_ptr;
ac145307
BS		 793 scom_section.name = ".scommon";
794 scom_section.output_section = & scom_section;
795 scom_section.symbol = & scom_symbol;
796 scom_section.symbol_ptr_ptr = & scom_section.symbol;
45dfa85a 797 scom_symbol = * bfd_com_section_ptr->symbol;
ac145307
BS		 798 scom_symbol.name = ".scommon";
799 scom_symbol.section = & scom_section;
40b36596
JM		 800}
801
802/* Whether the current line being parsed had the "||" parallel bars. */
803static bfd_boolean tic6x_line_parallel;
804
805/* Whether the current line being parsed started "||^" to indicate an
806 SPMASKed parallel instruction. */
807static bfd_boolean tic6x_line_spmask;
808
809/* If the current line being parsed had an instruction predicate, the
810 creg value for that predicate (which must be nonzero); otherwise
811 0. */
812static unsigned int tic6x_line_creg;
813
814/* If the current line being parsed had an instruction predicate, the
815 z value for that predicate; otherwise 0. */
816static unsigned int tic6x_line_z;
817
818/* Return 1 (updating input_line_pointer as appropriate) if the line
819 starting with C (immediately before input_line_pointer) starts with
820 pre-opcode text appropriate for this target, 0 otherwise. */
821
822int
823tic6x_unrecognized_line (int c)
824{
825 char *p, *endp;
826 unsigned int z;
827 bfd_boolean areg;
828 bfd_boolean bad_predicate;
829
830 switch (c)
831 {
832 case '|':
833 if (input_line_pointer[0] == '|')
834 {
835 if (input_line_pointer[1] == '^')
836 {
837 tic6x_line_spmask = TRUE;
838 input_line_pointer += 2;
839 }
840 else
841 input_line_pointer += 1;
842 if (tic6x_line_parallel)
843 as_bad (_("multiple '||' on same line"));
844 tic6x_line_parallel = TRUE;
845 if (tic6x_line_creg)
846 as_bad (_("'||' after predicate"));
847 return 1;
848 }
849 return 0;
850
851 case '[':
852 /* If it doesn't look like a predicate at all, just return 0.
853 If it looks like one but not a valid one, give a better
854 error. */
855 p = input_line_pointer;
856 while (*p != ']' && !is_end_of_line[(unsigned char) *p])
857 p++;
858 if (*p != ']')
859 return 0;
860 endp = p + 1;
861 p = input_line_pointer;
862 z = 0;
863 bad_predicate = FALSE;
864 if (*p == '!')
865 {
866 z = 1;
867 p++;
868 }
869 if (*p == 'A' || *p == 'a')
870 areg = TRUE;
871 else if (*p == 'B' || *p == 'b')
872 areg = FALSE;
873 else
874 {
875 areg = TRUE; /* Avoid uninitialized warning. */
876 bad_predicate = TRUE;
877 }
878 if (!bad_predicate)
879 {
880 p++;
881 if (*p != '0' && *p != '1' && *p != '2')
882 bad_predicate = TRUE;
883 else if (p[1] != ']')
884 bad_predicate = TRUE;
885 else
886 input_line_pointer = p + 2;
887 }
888
889 if (tic6x_line_creg)
890 as_bad (_("multiple predicates on same line"));
891
892 if (bad_predicate)
893 {
894 char ctmp = *endp;
895 *endp = 0;
896 as_bad (_("bad predicate '%s'"), input_line_pointer - 1);
897 *endp = ctmp;
898 input_line_pointer = endp;
899 return 1;
900 }
901
902 switch (*p)
903 {
904 case '0':
905 tic6x_line_creg = (areg ? 6 : 1);
906 if (areg && !tic6x_predicate_a0)
907 as_bad (_("predication on A0 not supported on this architecture"));
908 break;
909
910 case '1':
911 tic6x_line_creg = (areg ? 4 : 2);
912 break;
913
914 case '2':
915 tic6x_line_creg = (areg ? 5 : 3);
916 break;
917
918 default:
919 abort ();
920 }
921
922 tic6x_line_z = z;
923 return 1;
924
925 default:
926 return 0;
927 }
928}
929
930/* Do any target-specific handling of a label required. */
931
932void
d99e5b39 933tic6x_frob_label (symbolS *sym)
40b36596 934{
d99e5b39
JM		 935 segment_info_type *si;
936 tic6x_label_list *list;
937
40b36596
JM		 938 if (tic6x_line_parallel)
939 {
940 as_bad (_("label after '||'"));
941 tic6x_line_parallel = FALSE;
942 tic6x_line_spmask = FALSE;
943 }
944 if (tic6x_line_creg)
945 {
946 as_bad (_("label after predicate"));
947 tic6x_line_creg = 0;
948 tic6x_line_z = 0;
949 }
950
d99e5b39
JM		 951 si = seg_info (now_seg);
952 list = si->tc_segment_info_data.label_list;
953 si->tc_segment_info_data.label_list = xmalloc (sizeof (tic6x_label_list));
954 si->tc_segment_info_data.label_list->next = list;
955 si->tc_segment_info_data.label_list->label = sym;
40b36596
JM		 956
957 /* Defining tc_frob_label overrides the ELF definition of
958 obj_frob_label, so we need to apply its effects here. */
959 dwarf2_emit_label (sym);
960}
961
962/* At end-of-line, give errors for start-of-line decorations that
963 needed an instruction but were not followed by one. */
964
965static void
966tic6x_end_of_line (void)
967{
968 if (tic6x_line_parallel)
969 {
970 as_bad (_("'||' not followed by instruction"));
971 tic6x_line_parallel = FALSE;
972 tic6x_line_spmask = FALSE;
973 }
974 if (tic6x_line_creg)
975 {
976 as_bad (_("predicate not followed by instruction"));
977 tic6x_line_creg = 0;
978 tic6x_line_z = 0;
979 }
980}
981
982/* Do any target-specific handling of the start of a logical line. */
983
984void
985tic6x_start_line_hook (void)
986{
987 tic6x_end_of_line ();
988}
989
d99e5b39
JM		 990/* Do target-specific handling immediately after an input file from
991 the command line, and any other inputs it includes, have been
992 read. */
40b36596
JM		 993
994void
995tic6x_cleanup (void)
996{
997 tic6x_end_of_line ();
998}
999
41820509
JM		 1000/* Do target-specific initialization after arguments have been
1001 processed and the output file created. */
1002
1003void
1004tic6x_init_after_args (void)
1005{
1006 elf32_tic6x_set_use_rela_p (stdoutput, tic6x_generate_rela);
1007}
1008
d99e5b39
JM		 1009/* Free LIST of labels (possibly NULL). */
1010
1011static void
1012tic6x_free_label_list (tic6x_label_list *list)
1013{
1014 while (list)
1015 {
1016 tic6x_label_list *old = list;
1017
1018 list = list->next;
1019 free (old);
1020 }
1021}
1022
40b36596
JM		 1023/* Handle a data alignment of N bytes. */
1024
1025void
1026tic6x_cons_align (int n ATTRIBUTE_UNUSED)
1027{
1028 segment_info_type *seginfo = seg_info (now_seg);
1029
1030 /* Data means there is no current execute packet, and that any label
1031 applies to that data rather than a subsequent instruction. */
d99e5b39
JM		 1032 tic6x_free_label_list (seginfo->tc_segment_info_data.label_list);
1033 seginfo->tc_segment_info_data.label_list = NULL;
1034 seginfo->tc_segment_info_data.execute_packet_frag = NULL;
40b36596
JM		 1035 seginfo->tc_segment_info_data.last_insn_lsb = NULL;
1036 seginfo->tc_segment_info_data.spmask_addr = NULL;
38bd8d09 1037 seginfo->tc_segment_info_data.func_units_used = 0;
40b36596
JM		 1038}
1039
d99e5b39
JM		 1040/* Handle an alignment directive. Return TRUE if the
1041 machine-independent frag generation should be skipped. */
1042
1043bfd_boolean
1044tic6x_do_align (int n, char *fill, int len ATTRIBUTE_UNUSED, int max)
1045{
1046 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
1047 them in the md_end pass by inserting NOPs in parallel with
1048 previous instructions. We only do this in sections containing
1049 nothing but instructions. Code alignments of 1 or 2 bytes have
1050 no effect in such sections (but we record them with
1051 machine-dependent frags anyway so they can be skipped or
1052 converted to machine-independent), while those of more than 64
1053 bytes cannot reliably be handled in this way. */
1054 if (n > 0
1055 && max >= 0
1056 && max < (1 << n)
1057 && !need_pass_2
1058 && fill == NULL
1059 && subseg_text_p (now_seg))
1060 {
1061 fragS *align_frag;
1062 char *p;
1063
1064 if (n > 5)
1065 return FALSE;
1066
1067 /* Machine-independent code would generate a frag here, but we
1068 wish to handle it in a machine-dependent way. */
1069 if (frag_now_fix () != 0)
1070 {
1071 if (frag_now->fr_type != rs_machine_dependent)
1072 frag_wane (frag_now);
1073
1074 frag_new (0);
1075 }
1076 frag_grow (32);
1077 align_frag = frag_now;
1078 p = frag_var (rs_machine_dependent, 32, 32, max, NULL, n, NULL);
1079 /* This must be the same as the frag to which a pointer was just
1080 saved. */
1081 if (p != align_frag->fr_literal)
1082 abort ();
1083 align_frag->tc_frag_data.is_insns = FALSE;
1084 return TRUE;
1085 }
1086 else
1087 return FALSE;
1088}
1089
40b36596
JM		 1090/* Types of operand for parsing purposes. These are used as bit-masks
1091 to tell tic6x_parse_operand what forms of operand are
1092 permitted. */
1093#define TIC6X_OP_EXP 0x0001u
1094#define TIC6X_OP_REG 0x0002u
1095#define TIC6X_OP_REGPAIR 0x0004u
1096#define TIC6X_OP_IRP 0x0008u
1097#define TIC6X_OP_NRP 0x0010u
1098/* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
1099 interpreted as an expression, which may be a symbol with the same
1100 name as a register that ends up being implicitly DP-relative. With
1101 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
1102 a register if they match one, and failing that as an expression,
1103 which must be constant. */
1104#define TIC6X_OP_MEM_NOUNREG 0x0020u
1105#define TIC6X_OP_MEM_UNREG 0x0040u
1106#define TIC6X_OP_CTRL 0x0080u
1107#define TIC6X_OP_FUNC_UNIT 0x0100u
1108
1109/* A register or register pair read by the assembler. */
1110typedef struct
1111{
1112 /* The side the register is on (1 or 2). */
1113 unsigned int side;
1114 /* The register number (0 to 31). */
1115 unsigned int num;
1116} tic6x_register;
1117
1118/* Types of modification of a base address. */
1119typedef enum
1120 {
1121 tic6x_mem_mod_none,
1122 tic6x_mem_mod_plus,
1123 tic6x_mem_mod_minus,
1124 tic6x_mem_mod_preinc,
1125 tic6x_mem_mod_predec,
1126 tic6x_mem_mod_postinc,
1127 tic6x_mem_mod_postdec
1128 } tic6x_mem_mod;
1129
1130/* Scaled [] or unscaled () nature of an offset. */
1131typedef enum
1132 {
1133 tic6x_offset_none,
1134 tic6x_offset_scaled,
1135 tic6x_offset_unscaled
1136 } tic6x_mem_scaling;
1137
1138/* A memory operand read by the assembler. */
1139typedef struct
1140{
1141 /* The base register. */
1142 tic6x_register base_reg;
1143 /* How the base register is modified. */
1144 tic6x_mem_mod mod;
1145 /* Whether there is an offset (required with plain "+" and "-"), and
1146 whether it is scaled or unscaled if so. */
1147 tic6x_mem_scaling scaled;
1148 /* Whether the offset is a register (TRUE) or an expression
1149 (FALSE). */
1150 bfd_boolean offset_is_reg;
1151 /* The offset. */
1152 union
1153 {
1154 expressionS exp;
1155 tic6x_register reg;
1156 } offset;
1157} tic6x_mem_ref;
1158
1159/* A functional unit in SPMASK operands read by the assembler. */
1160typedef struct
1161{
1162 /* The basic unit. */
1163 tic6x_func_unit_base base;
1164 /* The side (1 or 2). */
1165 unsigned int side;
1166} tic6x_func_unit_operand;
1167
1168/* An operand read by the assembler. */
1169typedef struct
1170{
1171 /* The syntactic form of the operand, as one of the bit-masks
1172 above. */
1173 unsigned int form;
1174 /* The operand value. */
1175 union
1176 {
1177 /* An expression: TIC6X_OP_EXP. */
1178 expressionS exp;
1179 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
1180 tic6x_register reg;
1181 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
1182 TIC6X_OP_MEM_UNREG. */
1183 tic6x_mem_ref mem;
1184 /* A control register: TIC6X_OP_CTRL. */
1185 tic6x_ctrl_id ctrl;
1186 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
1187 tic6x_func_unit_operand func_unit;
1188 } value;
1189} tic6x_operand;
1190
1191#define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
1192
1193/* Parse a register operand, or part of an operand, starting at *P.
1194 If syntactically OK (including that the number is in the range 0 to
1195 31, but not necessarily in range for this architecture), return
1196 TRUE, putting the register side and number in *REG and update *P to
1197 point immediately after the register number; otherwise return FALSE
1198 without changing *P (but possibly changing *REG). Do not print any
1199 diagnostics. */
1200
1201static bfd_boolean
1202tic6x_parse_register (char **p, tic6x_register *reg)
1203{
1204 char *r = *p;
1205
1206 switch (*r)
1207 {
1208 case 'a':
1209 case 'A':
1210 reg->side = 1;
1211 break;
1212
1213 case 'b':
1214 case 'B':
1215 reg->side = 2;
1216 break;
1217
1218 default:
1219 return FALSE;
1220 }
1221 r++;
1222
1223 if (*r >= '0' && *r <= '9')
1224 {
1225 reg->num = *r - '0';
1226 r++;
1227 }
1228 else
1229 return FALSE;
1230
1231 if (reg->num > 0 && *r >= '0' && *r <= '9')
1232 {
1233 reg->num = reg->num * 10 + (*r - '0');
1234 r++;
1235 }
1236
1237 if (*r >= '0' && *r <= '9')
1238 return FALSE;
1239
1240 if (reg->num >= 32)
1241 return FALSE;
1242 *p = r;
1243 return TRUE;
1244}
1245
1246/* Parse the initial two characters of a functional unit name starting
1247 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
1248 return FALSE. */
1249
1250static bfd_boolean
1251tic6x_parse_func_unit_base (char *p, tic6x_func_unit_base *base,
1252 unsigned int *side)
1253{
1254 bfd_boolean good_func_unit = TRUE;
1255 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
1256 unsigned int maybe_side = 0;
1257
1258 switch (p[0])
1259 {
1260 case 'd':
1261 case 'D':
1262 maybe_base = tic6x_func_unit_d;
1263 break;
1264
1265 case 'l':
1266 case 'L':
1267 maybe_base = tic6x_func_unit_l;
1268 break;
1269
1270 case 'm':
1271 case 'M':
1272 maybe_base = tic6x_func_unit_m;
1273 break;
1274
1275 case 's':
1276 case 'S':
1277 maybe_base = tic6x_func_unit_s;
1278 break;
1279
1280 default:
1281 good_func_unit = FALSE;
1282 break;
1283 }
1284
1285 if (good_func_unit)
1286 switch (p[1])
1287 {
1288 case '1':
1289 maybe_side = 1;
1290 break;
1291
1292 case '2':
1293 maybe_side = 2;
1294 break;
1295
1296 default:
1297 good_func_unit = FALSE;
1298 break;
1299 }
1300
1301 if (good_func_unit)
1302 {
1303 *base = maybe_base;
1304 *side = maybe_side;
1305 }
1306
1307 return good_func_unit;
1308}
1309
1310/* Parse an operand starting at *P. If the operand parses OK, return
1311 TRUE and store the value in *OP; otherwise return FALSE (possibly
1312 changing *OP). In any case, update *P to point to the following
1313 comma or end of line. The possible operand forms are given by
1314 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
1315 starting at STR, length OPC_LEN. */
1316
1317static bfd_boolean
1318tic6x_parse_operand (char **p, tic6x_operand *op, unsigned int op_forms,
1319 char *str, int opc_len, unsigned int opno)
1320{
1321 bfd_boolean operand_parsed = FALSE;
1322 char *q = *p;
1323
1324 if ((op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
1325 == (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
1326 abort ();
1327
1328 /* Check for functional unit names for SPMASK and SPMASKR. */
1329 if (!operand_parsed && (op_forms & TIC6X_OP_FUNC_UNIT))
1330 {
1331 tic6x_func_unit_base base = tic6x_func_unit_nfu;
1332 unsigned int side = 0;
1333
1334 if (tic6x_parse_func_unit_base (q, &base, &side))
1335 {
1336 char *rq = q + 2;
1337
1338 skip_whitespace (rq);
1339 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1340 {
1341 op->form = TIC6X_OP_FUNC_UNIT;
1342 op->value.func_unit.base = base;
1343 op->value.func_unit.side = side;
1344 operand_parsed = TRUE;
1345 q = rq;
1346 }
1347 }
1348 }
1349
1350 /* Check for literal "irp". */
1351 if (!operand_parsed && (op_forms & TIC6X_OP_IRP))
1352 {
1353 if ((q[0] == 'i' || q[0] == 'I')
1354 && (q[1] == 'r' || q[1] == 'R')
1355 && (q[2] == 'p' || q[2] == 'P'))
1356 {
1357 char *rq = q + 3;
1358
1359 skip_whitespace (rq);
1360 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1361 {
1362 op->form = TIC6X_OP_IRP;
1363 operand_parsed = TRUE;
1364 q = rq;
1365 }
1366 }
1367 }
1368
1369 /* Check for literal "nrp". */
1370 if (!operand_parsed && (op_forms & TIC6X_OP_NRP))
1371 {
1372 if ((q[0] == 'n' || q[0] == 'N')
1373 && (q[1] == 'r' || q[1] == 'R')
1374 && (q[2] == 'p' || q[2] == 'P'))
1375 {
1376 char *rq = q + 3;
1377
1378 skip_whitespace (rq);
1379 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1380 {
1381 op->form = TIC6X_OP_NRP;
1382 operand_parsed = TRUE;
1383 q = rq;
1384 }
1385 }
1386 }
1387
1388 /* Check for control register names. */
1389 if (!operand_parsed && (op_forms & TIC6X_OP_CTRL))
1390 {
1391 tic6x_ctrl_id crid;
1392
1393 for (crid = 0; crid < tic6x_ctrl_max; crid++)
1394 {
1395 size_t len = strlen (tic6x_ctrl_table[crid].name);
1396
1397 if (strncasecmp (tic6x_ctrl_table[crid].name, q, len) == 0)
1398 {
1399 char *rq = q + len;
1400
1401 skip_whitespace (rq);
1402 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1403 {
1404 op->form = TIC6X_OP_CTRL;
1405 op->value.ctrl = crid;
1406 operand_parsed = TRUE;
1407 q = rq;
1408 if (!(tic6x_ctrl_table[crid].isa_variants & tic6x_features))
1409 as_bad (_("control register '%s' not supported "
1410 "on this architecture"),
1411 tic6x_ctrl_table[crid].name);
1412 }
1413 }
1414 }
1415 }
1416
1417 /* See if this looks like a memory reference. */
1418 if (!operand_parsed
1419 && (op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)))
1420 {
1421 bfd_boolean mem_ok = TRUE;
1422 char *mq = q;
1423 tic6x_mem_mod mem_mod = tic6x_mem_mod_none;
1424 tic6x_register base_reg;
1425 bfd_boolean require_offset, permit_offset;
1426 tic6x_mem_scaling scaled;
1427 bfd_boolean offset_is_reg;
1428 expressionS offset_exp;
1429 tic6x_register offset_reg;
1430
1431 if (*mq == '*')
1432 mq++;
1433 else
1434 mem_ok = FALSE;
1435
1436 if (mem_ok)
1437 {
1438 skip_whitespace (mq);
1439 switch (*mq)
1440 {
1441 case '+':
1442 if (mq[1] == '+')
1443 {
1444 mem_mod = tic6x_mem_mod_preinc;
1445 mq += 2;
1446 }
1447 else
1448 {
1449 mem_mod = tic6x_mem_mod_plus;
1450 mq++;
1451 }
1452 break;
1453
1454 case '-':
1455 if (mq[1] == '-')
1456 {
1457 mem_mod = tic6x_mem_mod_predec;
1458 mq += 2;
1459 }
1460 else
1461 {
1462 mem_mod = tic6x_mem_mod_minus;
1463 mq++;
1464 }
1465 break;
1466
1467 default:
1468 break;
1469 }
1470 }
1471
1472 if (mem_ok)
1473 {
1474 skip_whitespace (mq);
1475 mem_ok = tic6x_parse_register (&mq, &base_reg);
1476 }
1477
1478 if (mem_ok && mem_mod == tic6x_mem_mod_none)
1479 {
1480 skip_whitespace (mq);
1481 if (mq[0] == '+' && mq[1] == '+')
1482 {
1483 mem_mod = tic6x_mem_mod_postinc;
1484 mq += 2;
1485 }
1486 else if (mq[0] == '-' && mq[1] == '-')
1487 {
1488 mem_mod = tic6x_mem_mod_postdec;
1489 mq += 2;
1490 }
1491 }
1492
1493 if (mem_mod == tic6x_mem_mod_none)
1494 permit_offset = FALSE;
1495 else
1496 permit_offset = TRUE;
1497 if (mem_mod == tic6x_mem_mod_plus || mem_mod == tic6x_mem_mod_minus)
1498 require_offset = TRUE;
1499 else
1500 require_offset = FALSE;
1501 scaled = tic6x_offset_none;
1502 offset_is_reg = FALSE;
1503
1504 if (mem_ok && permit_offset)
1505 {
1506 char endc = 0;
1507
1508 skip_whitespace (mq);
1509 switch (*mq)
1510 {
1511 case '[':
1512 scaled = tic6x_offset_scaled;
1513 mq++;
1514 endc = ']';
1515 break;
1516
1517 case '(':
1518 scaled = tic6x_offset_unscaled;
1519 mq++;
1520 endc = ')';
1521 break;
1522
1523 default:
1524 break;
1525 }
1526 if (scaled != tic6x_offset_none)
1527 {
1528 skip_whitespace (mq);
1529 if (scaled == tic6x_offset_scaled
1530 || (op_forms & TIC6X_OP_MEM_UNREG))
1531 {
1532 bfd_boolean reg_ok;
1533 char *rq = mq;
1534
1535 reg_ok = tic6x_parse_register (&rq, &offset_reg);
1536 if (reg_ok)
1537 {
1538 skip_whitespace (rq);
1539 if (*rq == endc)
1540 {
1541 mq = rq;
1542 offset_is_reg = TRUE;
1543 }
1544 }
1545 }
1546 if (!offset_is_reg)
1547 {
1548 char *save_input_line_pointer;
1549
1550 save_input_line_pointer = input_line_pointer;
1551 input_line_pointer = mq;
1552 expression (&offset_exp);
1553 mq = input_line_pointer;
1554 input_line_pointer = save_input_line_pointer;
1555 }
1556 skip_whitespace (mq);
1557 if (*mq == endc)
1558 mq++;
1559 else
1560 mem_ok = FALSE;
1561 }
1562 }
1563
1564 if (mem_ok && require_offset && scaled == tic6x_offset_none)
1565 mem_ok = FALSE;
1566
1567 if (mem_ok)
1568 {
1569 skip_whitespace (mq);
1570 if (!is_end_of_line[(unsigned char) *mq] && *mq != ',')
1571 mem_ok = FALSE;
1572 }
1573
1574 if (mem_ok)
1575 {
1576 op->form = op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG);
1577 op->value.mem.base_reg = base_reg;
1578 op->value.mem.mod = mem_mod;
1579 op->value.mem.scaled = scaled;
1580 op->value.mem.offset_is_reg = offset_is_reg;
1581 if (offset_is_reg)
1582 op->value.mem.offset.reg = offset_reg;
1583 else
1584 op->value.mem.offset.exp = offset_exp;
1585 operand_parsed = TRUE;
1586 q = mq;
1587 if (base_reg.num >= tic6x_num_registers)
1588 as_bad (_("register number %u not supported on this architecture"),
1589 base_reg.num);
1590 if (offset_is_reg && offset_reg.num >= tic6x_num_registers)
1591 as_bad (_("register number %u not supported on this architecture"),
1592 offset_reg.num);
1593 }
1594 }
1595
1596 /* See if this looks like a register or register pair. */
1597 if (!operand_parsed && (op_forms & (TIC6X_OP_REG | TIC6X_OP_REGPAIR)))
1598 {
3fc1d038 1599 tic6x_register first_reg, second_reg;
40b36596
JM		 1600 bfd_boolean reg_ok;
1601 char *rq = q;
1602
1603 reg_ok = tic6x_parse_register (&rq, &first_reg);
1604
1605 if (reg_ok)
1606 {
1607 if (*rq == ':' && (op_forms & TIC6X_OP_REGPAIR))
1608 {
1609 rq++;
1610 reg_ok = tic6x_parse_register (&rq, &second_reg);
1611 if (reg_ok)
1612 {
1613 skip_whitespace (rq);
1614 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1615 {
1616 if ((second_reg.num & 1)
1617 || (first_reg.num != second_reg.num + 1)
1618 || (first_reg.side != second_reg.side))
1619 as_bad (_("register pair for operand %u of '%.*s'"
1620 " not a valid even/odd pair"), opno,
1621 opc_len, str);
1622 op->form = TIC6X_OP_REGPAIR;
1623 op->value.reg = second_reg;
1624 operand_parsed = TRUE;
1625 q = rq;
1626 }
1627 }
1628 }
1629 else if (op_forms & TIC6X_OP_REG)
1630 {
1631 skip_whitespace (rq);
1632 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1633 {
1634 op->form = TIC6X_OP_REG;
1635 op->value.reg = first_reg;
1636 operand_parsed = TRUE;
1637 q = rq;
1638 }
1639 }
1640 }
1641 if (operand_parsed)
1642 {
1643 if (first_reg.num >= tic6x_num_registers)
1644 as_bad (_("register number %u not supported on this architecture"),
1645 first_reg.num);
1646 if (op->form == TIC6X_OP_REGPAIR
1647 && second_reg.num >= tic6x_num_registers)
1648 as_bad (_("register number %u not supported on this architecture"),
1649 second_reg.num);
1650 }
1651 }
1652
1653 /* Otherwise, parse it as an expression. */
1654 if (!operand_parsed && (op_forms & TIC6X_OP_EXP))
1655 {
1656 char *save_input_line_pointer;
1657
1658 save_input_line_pointer = input_line_pointer;
1659 input_line_pointer = q;
1660 op->form = TIC6X_OP_EXP;
1661 expression (&op->value.exp);
1662 q = input_line_pointer;
1663 input_line_pointer = save_input_line_pointer;
1664 operand_parsed = TRUE;
1665 }
1666
1667 if (operand_parsed)
1668 {
1669 /* Now the operand has been parsed, there must be nothing more
1670 before the comma or end of line. */
1671 skip_whitespace (q);
1672 if (!is_end_of_line[(unsigned char) *q] && *q != ',')
1673 {
1674 operand_parsed = FALSE;
1675 as_bad (_("junk after operand %u of '%.*s'"), opno,
1676 opc_len, str);
1677 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1678 q++;
1679 }
1680 }
1681 else
1682 {
1683 /* This could not be parsed as any acceptable form of
1684 operand. */
1685 switch (op_forms)
1686 {
1687 case TIC6X_OP_REG | TIC6X_OP_REGPAIR:
1688 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1689 opno, opc_len, str);
1690 break;
1691
1692 case TIC6X_OP_REG | TIC6X_OP_CTRL:
1693 case TIC6X_OP_REG:
1694 as_bad (_("bad register for operand %u of '%.*s'"),
1695 opno, opc_len, str);
1696 break;
1697
1698 case TIC6X_OP_REGPAIR:
1699 as_bad (_("bad register pair for operand %u of '%.*s'"),
1700 opno, opc_len, str);
1701 break;
1702
1703 case TIC6X_OP_FUNC_UNIT:
1704 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1705 opno, opc_len, str);
1706 break;
1707
1708 default:
1709 as_bad (_("bad operand %u of '%.*s'"),
1710 opno, opc_len, str);
1711 break;
1712
1713 }
1714 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1715 q++;
1716 }
1717 *p = q;
1718 return operand_parsed;
1719}
1720
1721/* Table of assembler operators and associated O_* values. */
1722typedef struct
1723{
1724 const char *name;
1725 operatorT op;
1726} tic6x_operator_table;
1727static const tic6x_operator_table tic6x_operators[] = {
1728#define O_dsbt_index O_md1
1729 { "dsbt_index", O_dsbt_index },
1730#define O_got O_md2
1731 { "got", O_got },
1732#define O_dpr_got O_md3
1733 { "dpr_got", O_dpr_got },
1734#define O_dpr_byte O_md4
1735 { "dpr_byte", O_dpr_byte },
1736#define O_dpr_hword O_md5
1737 { "dpr_hword", O_dpr_hword },
1738#define O_dpr_word O_md6
1739 { "dpr_word", O_dpr_word },
4a732032
BS		 1740#define O_pcr_offset O_md7
1741 { "pcr_offset", O_pcr_offset }
40b36596
JM		 1742};
1743
1744/* Parse a name in some machine-specific way. Used on C6X to handle
1745 assembler operators. */
1746
1747int
1748tic6x_parse_name (const char *name, expressionS *exprP,
1749 enum expr_mode mode ATTRIBUTE_UNUSED, char *nextchar)
1750{
1751 char *p = input_line_pointer;
1752 char c, *name_start, *name_end;
1753 const char *inner_name;
1754 unsigned int i;
1755 operatorT op = O_illegal;
4a732032 1756 symbolS *sym, *op_sym = NULL;
40b36596
JM		 1757
1758 if (*name != '$')
1759 return 0;
1760
1761 for (i = 0; i < ARRAY_SIZE (tic6x_operators); i++)
1762 if (strcasecmp (name + 1, tic6x_operators[i].name) == 0)
1763 {
1764 op = tic6x_operators[i].op;
1765 break;
1766 }
1767
1768 if (op == O_illegal)
1769 return 0;
1770
1771 *input_line_pointer = *nextchar;
1772 skip_whitespace (p);
1773
1774 if (*p != '(')
1775 {
1776 *input_line_pointer = 0;
1777 return 0;
1778 }
1779 p++;
1780 skip_whitespace (p);
1781
1782 if (!is_name_beginner (*p))
1783 {
1784 *input_line_pointer = 0;
1785 return 0;
1786 }
1787
1788 name_start = p;
1789 p++;
1790 while (is_part_of_name (*p))
1791 p++;
1792 name_end = p;
1793 skip_whitespace (p);
1794
4a732032
BS		 1795 if (op == O_pcr_offset)
1796 {
1797 char *op_name_start, *op_name_end;
1798
1799 if (*p != ',')
1800 {
1801 *input_line_pointer = 0;
1802 return 0;
1803 }
1804 p++;
1805 skip_whitespace (p);
1806
1807 if (!is_name_beginner (*p))
1808 {
1809 *input_line_pointer = 0;
1810 return 0;
1811 }
1812
1813 op_name_start = p;
1814 p++;
1815 while (is_part_of_name (*p))
1816 p++;
1817 op_name_end = p;
1818 skip_whitespace (p);
1819
1820 c = *op_name_end;
1821 *op_name_end = 0;
1822 op_sym = symbol_find_or_make (op_name_start);
1823 *op_name_end = c;
1824 }
1825
40b36596
JM		 1826 if (*p != ')')
1827 {
1828 *input_line_pointer = 0;
1829 return 0;
1830 }
1831
1832 input_line_pointer = p + 1;
1833 *nextchar = *input_line_pointer;
1834 *input_line_pointer = 0;
1835
1836 c = *name_end;
1837 *name_end = 0;
1838 inner_name = name_start;
1839 if (op == O_dsbt_index && strcmp (inner_name, "__c6xabi_DSBT_BASE") != 0)
1840 {
1841 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1842 inner_name = "__c6xabi_DSBT_BASE";
1843 }
1844 sym = symbol_find_or_make (inner_name);
1845 *name_end = c;
1846
1847 exprP->X_op = op;
1848 exprP->X_add_symbol = sym;
1849 exprP->X_add_number = 0;
4a732032 1850 exprP->X_op_symbol = op_sym;
40b36596
JM		 1851 exprP->X_md = 0;
1852
1853 return 1;
1854}
1855
1856/* Create a fixup for an expression. Same arguments as fix_new_exp,
1857 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1858 fixes resolving to constants should have those constants implicitly
1859 shifted) and FALSE otherwise, but look for C6X-specific expression
1860 types and adjust the relocations or give errors accordingly. */
1861
1862static void
1863tic6x_fix_new_exp (fragS *frag, int where, int size, expressionS *exp,
1864 int pcrel, bfd_reloc_code_real_type r_type,
1865 bfd_boolean fix_adda)
1866{
1867 bfd_reloc_code_real_type new_reloc = BFD_RELOC_UNUSED;
4a732032 1868 symbolS *subsy = NULL;
40b36596
JM		 1869 fixS *fix;
1870
1871 switch (exp->X_op)
1872 {
1873 case O_dsbt_index:
1874 switch (r_type)
1875 {
1876 case BFD_RELOC_C6000_SBR_U15_W:
1877 new_reloc = BFD_RELOC_C6000_DSBT_INDEX;
1878 break;
1879
1880 default:
1881 as_bad (_("$DSBT_INDEX not supported in this context"));
1882 return;
1883 }
1884 break;
1885
1886 case O_got:
1887 switch (r_type)
1888 {
1889 case BFD_RELOC_C6000_SBR_U15_W:
1890 new_reloc = BFD_RELOC_C6000_SBR_GOT_U15_W;
1891 break;
1892
1893 default:
1894 as_bad (_("$GOT not supported in this context"));
1895 return;
1896 }
1897 break;
1898
1899 case O_dpr_got:
1900 switch (r_type)
1901 {
1902 case BFD_RELOC_C6000_ABS_L16:
1903 new_reloc = BFD_RELOC_C6000_SBR_GOT_L16_W;
1904 break;
1905
1906 case BFD_RELOC_C6000_ABS_H16:
1907 new_reloc = BFD_RELOC_C6000_SBR_GOT_H16_W;
1908 break;
1909
1910 default:
1911 as_bad (_("$DPR_GOT not supported in this context"));
1912 return;
1913 }
1914 break;
1915
1916 case O_dpr_byte:
1917 switch (r_type)
1918 {
1919 case BFD_RELOC_C6000_ABS_S16:
1920 new_reloc = BFD_RELOC_C6000_SBR_S16;
1921 break;
1922
1923 case BFD_RELOC_C6000_ABS_L16:
1924 new_reloc = BFD_RELOC_C6000_SBR_L16_B;
1925 break;
1926
1927 case BFD_RELOC_C6000_ABS_H16:
1928 new_reloc = BFD_RELOC_C6000_SBR_H16_B;
1929 break;
1930
1931 default:
1932 as_bad (_("$DPR_BYTE not supported in this context"));
1933 return;
1934 }
1935 break;
1936
1937 case O_dpr_hword:
1938 switch (r_type)
1939 {
1940 case BFD_RELOC_C6000_ABS_L16:
1941 new_reloc = BFD_RELOC_C6000_SBR_L16_H;
1942 break;
1943
1944 case BFD_RELOC_C6000_ABS_H16:
1945 new_reloc = BFD_RELOC_C6000_SBR_H16_H;
1946 break;
1947
1948 default:
1949 as_bad (_("$DPR_HWORD not supported in this context"));
1950 return;
1951 }
1952 break;
1953
1954 case O_dpr_word:
1955 switch (r_type)
1956 {
1957 case BFD_RELOC_C6000_ABS_L16:
1958 new_reloc = BFD_RELOC_C6000_SBR_L16_W;
1959 break;
1960
1961 case BFD_RELOC_C6000_ABS_H16:
1962 new_reloc = BFD_RELOC_C6000_SBR_H16_W;
1963 break;
1964
1965 default:
1966 as_bad (_("$DPR_WORD not supported in this context"));
1967 return;
1968 }
1969 break;
1970
4a732032
BS		 1971 case O_pcr_offset:
1972 subsy = exp->X_op_symbol;
1973 switch (r_type)
1974 {
1975 case BFD_RELOC_C6000_ABS_S16:
1976 case BFD_RELOC_C6000_ABS_L16:
1977 new_reloc = BFD_RELOC_C6000_PCR_L16;
1978 break;
1979
1980 case BFD_RELOC_C6000_ABS_H16:
1981 new_reloc = BFD_RELOC_C6000_PCR_H16;
1982 break;
1983
1984 default:
1985 as_bad (_("$PCR_OFFSET not supported in this context"));
1986 return;
1987 }
1988 break;
1989
40b36596
JM		 1990 case O_symbol:
1991 break;
1992
1993 default:
1994 if (pcrel)
1995 {
1996 as_bad (_("invalid PC-relative operand"));
1997 return;
1998 }
1999 break;
2000 }
2001
2002 if (new_reloc == BFD_RELOC_UNUSED)
2003 fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
2004 else
2005 fix = fix_new (frag, where, size, exp->X_add_symbol, exp->X_add_number,
2006 pcrel, new_reloc);
4a732032 2007 fix->tc_fix_data.fix_subsy = subsy;
40b36596
JM		 2008 fix->tc_fix_data.fix_adda = fix_adda;
2009}
2010
2011/* Generate a fix for a constant (.word etc.). Needed to ensure these
2012 go through the error checking in tic6x_fix_new_exp. */
2013
2014void
62ebcb5c
AM		 2015tic6x_cons_fix_new (fragS *frag, int where, int size, expressionS *exp,
2016 bfd_reloc_code_real_type r_type)
40b36596 2017{
40b36596
JM		 2018 switch (size)
2019 {
2020 case 1:
2021 r_type = BFD_RELOC_8;
2022 break;
2023
2024 case 2:
2025 r_type = BFD_RELOC_16;
2026 break;
2027
2028 case 4:
2029 r_type = BFD_RELOC_32;
2030 break;
2031
2032 default:
2033 as_bad (_("no %d-byte relocations available"), size);
2034 return;
2035 }
2036
2037 tic6x_fix_new_exp (frag, where, size, exp, 0, r_type, FALSE);
2038}
2039
2040/* Initialize target-specific fix data. */
2041
2042void
2043tic6x_init_fix_data (fixS *fixP)
2044{
2045 fixP->tc_fix_data.fix_adda = FALSE;
4a732032 2046 fixP->tc_fix_data.fix_subsy = NULL;
40b36596
JM		 2047}
2048
43bb514a
BS		 2049/* Return true if the fix can be handled by GAS, false if it must
2050 be passed through to the linker. */
2051
2052bfd_boolean
2053tic6x_fix_adjustable (fixS *fixP)
2054{
2055 switch (fixP->fx_r_type)
2056 {
2057 /* Adjust_reloc_syms doesn't know about the GOT. */
2058 case BFD_RELOC_C6000_SBR_GOT_U15_W:
2059 case BFD_RELOC_C6000_SBR_GOT_H16_W:
2060 case BFD_RELOC_C6000_SBR_GOT_L16_W:
2fbb87f6 2061 case BFD_RELOC_C6000_EHTYPE:
43bb514a
BS		 2062 return 0;
2063
1bce6bd8
PB		 2064 case BFD_RELOC_C6000_PREL31:
2065 return 0;
2066
4a732032
BS		 2067 case BFD_RELOC_C6000_PCR_H16:
2068 case BFD_RELOC_C6000_PCR_L16:
2069 return 0;
2070
43bb514a
BS		 2071 default:
2072 return 1;
2073 }
2074}
2075
40b36596
JM		 2076/* Given the fine-grained form of an operand, return the coarse
2077 (bit-mask) form. */
2078
2079static unsigned int
2080tic6x_coarse_operand_form (tic6x_operand_form form)
2081{
2082 switch (form)
2083 {
2084 case tic6x_operand_asm_const:
2085 case tic6x_operand_link_const:
2086 return TIC6X_OP_EXP;
2087
2088 case tic6x_operand_reg:
2089 case tic6x_operand_xreg:
2090 case tic6x_operand_dreg:
2091 case tic6x_operand_areg:
2092 case tic6x_operand_retreg:
2093 return TIC6X_OP_REG;
2094
2095 case tic6x_operand_regpair:
2096 case tic6x_operand_xregpair:
2097 case tic6x_operand_dregpair:
2098 return TIC6X_OP_REGPAIR;
2099
2100 case tic6x_operand_irp:
2101 return TIC6X_OP_IRP;
2102
2103 case tic6x_operand_nrp:
2104 return TIC6X_OP_NRP;
2105
2106 case tic6x_operand_ctrl:
2107 return TIC6X_OP_CTRL;
2108
2109 case tic6x_operand_mem_short:
2110 case tic6x_operand_mem_long:
2111 case tic6x_operand_mem_deref:
2112 return TIC6X_OP_MEM_NOUNREG;
2113
2114 case tic6x_operand_mem_ndw:
2115 return TIC6X_OP_MEM_UNREG;
2116
2117 case tic6x_operand_func_unit:
2118 return TIC6X_OP_FUNC_UNIT;
2119
2120 default:
2121 abort ();
2122 }
2123}
2124
2125/* How an operand may match or not match a desired form. If different
2126 instruction alternatives fail in different ways, the first failure
2127 in this list determines the diagnostic. */
2128typedef enum
2129 {
2130 /* Matches. */
2131 tic6x_match_matches,
2132 /* Bad coarse form. */
2133 tic6x_match_coarse,
2134 /* Not constant. */
2135 tic6x_match_non_const,
2136 /* Register on wrong side. */
2137 tic6x_match_wrong_side,
2138 /* Not a valid address register. */
2139 tic6x_match_bad_address,
2140 /* Not a valid return address register. */
2141 tic6x_match_bad_return,
2142 /* Control register not readable. */
2143 tic6x_match_ctrl_write_only,
2144 /* Control register not writable. */
2145 tic6x_match_ctrl_read_only,
2146 /* Not a valid memory reference for this instruction. */
2147 tic6x_match_bad_mem
2148 } tic6x_operand_match;
2149
2150/* Return whether an operand matches the given fine-grained form and
2151 read/write usage, and, if it does not match, how it fails to match.
2152 The main functional unit side is SIDE; the cross-path side is CROSS
2153 (the same as SIDE if a cross path not used); the data side is
2154 DATA_SIDE. */
2155static tic6x_operand_match
2156tic6x_operand_matches_form (const tic6x_operand *op, tic6x_operand_form form,
2157 tic6x_rw rw, unsigned int side, unsigned int cross,
2158 unsigned int data_side)
2159{
2160 unsigned int coarse = tic6x_coarse_operand_form (form);
2161
2162 if (coarse != op->form)
2163 return tic6x_match_coarse;
2164
2165 switch (form)
2166 {
2167 case tic6x_operand_asm_const:
2168 if (op->value.exp.X_op == O_constant)
2169 return tic6x_match_matches;
2170 else
2171 return tic6x_match_non_const;
2172
2173 case tic6x_operand_link_const:
2174 case tic6x_operand_irp:
2175 case tic6x_operand_nrp:
2176 case tic6x_operand_func_unit:
2177 /* All expressions are link-time constants, although there may
2178 not be relocations to express them in the output file. "irp"
2179 and "nrp" are unique operand values. All parsed functional
2180 unit names are valid. */
2181 return tic6x_match_matches;
2182
2183 case tic6x_operand_reg:
2184 case tic6x_operand_regpair:
2185 if (op->value.reg.side == side)
2186 return tic6x_match_matches;
2187 else
2188 return tic6x_match_wrong_side;
2189
2190 case tic6x_operand_xreg:
2191 case tic6x_operand_xregpair:
2192 if (op->value.reg.side == cross)
2193 return tic6x_match_matches;
2194 else
2195 return tic6x_match_wrong_side;
2196
2197 case tic6x_operand_dreg:
2198 case tic6x_operand_dregpair:
2199 if (op->value.reg.side == data_side)
2200 return tic6x_match_matches;
2201 else
2202 return tic6x_match_wrong_side;
2203
2204 case tic6x_operand_areg:
2205 if (op->value.reg.side != cross)
2206 return tic6x_match_wrong_side;
2207 else if (op->value.reg.side == 2
2208 && (op->value.reg.num == 14 || op->value.reg.num == 15))
2209 return tic6x_match_matches;
2210 else
2211 return tic6x_match_bad_address;
2212
2213 case tic6x_operand_retreg:
2214 if (op->value.reg.side != side)
2215 return tic6x_match_wrong_side;
2216 else if (op->value.reg.num != 3)
2217 return tic6x_match_bad_return;
2218 else
2219 return tic6x_match_matches;
2220
2221 case tic6x_operand_ctrl:
2222 switch (rw)
2223 {
2224 case tic6x_rw_read:
2225 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read
2226 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
2227 return tic6x_match_matches;
2228 else
2229 return tic6x_match_ctrl_write_only;
2230
2231 case tic6x_rw_write:
2232 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_write
2233 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
2234 return tic6x_match_matches;
2235 else
2236 return tic6x_match_ctrl_read_only;
2237
2238 default:
2239 abort ();
2240 }
2241
2242 case tic6x_operand_mem_deref:
2243 if (op->value.mem.mod != tic6x_mem_mod_none)
2244 return tic6x_match_bad_mem;
2245 else if (op->value.mem.scaled != tic6x_offset_none)
2246 abort ();
2247 else if (op->value.mem.base_reg.side != side)
2248 return tic6x_match_bad_mem;
2249 else
2250 return tic6x_match_matches;
2251
2252 case tic6x_operand_mem_short:
2253 case tic6x_operand_mem_ndw:
2254 if (op->value.mem.base_reg.side != side)
2255 return tic6x_match_bad_mem;
2256 if (op->value.mem.mod == tic6x_mem_mod_none)
2257 {
2258 if (op->value.mem.scaled != tic6x_offset_none)
2259 abort ();
2260 return tic6x_match_matches;
2261 }
2262 if (op->value.mem.scaled == tic6x_offset_none)
2263 {
2264 if (op->value.mem.mod == tic6x_mem_mod_plus
2265 || op->value.mem.mod == tic6x_mem_mod_minus)
2266 abort ();
2267 return tic6x_match_matches;
2268 }
2269 if (op->value.mem.offset_is_reg)
2270 {
2271 if (op->value.mem.scaled == tic6x_offset_unscaled
2272 && form != tic6x_operand_mem_ndw)
2273 abort ();
2274 if (op->value.mem.offset.reg.side == side)
2275 return tic6x_match_matches;
2276 else
2277 return tic6x_match_bad_mem;
2278 }
2279 else
2280 {
2281 if (op->value.mem.offset.exp.X_op == O_constant)
2282 return tic6x_match_matches;
2283 else
2284 return tic6x_match_bad_mem;
2285 }
2286
2287 case tic6x_operand_mem_long:
2288 if (op->value.mem.base_reg.side == 2
2289 && (op->value.mem.base_reg.num == 14
2290 || op->value.mem.base_reg.num == 15))
2291 {
2292 switch (op->value.mem.mod)
2293 {
2294 case tic6x_mem_mod_none:
2295 if (op->value.mem.scaled != tic6x_offset_none)
2296 abort ();
2297 return tic6x_match_matches;
2298
2299 case tic6x_mem_mod_plus:
2300 if (op->value.mem.scaled == tic6x_offset_none)
2301 abort ();
2302 if (op->value.mem.offset_is_reg)
2303 return tic6x_match_bad_mem;
2304 else if (op->value.mem.scaled == tic6x_offset_scaled
2305 && op->value.mem.offset.exp.X_op != O_constant)
2306 return tic6x_match_bad_mem;
2307 else
2308 return tic6x_match_matches;
2309
2310 case tic6x_mem_mod_minus:
2311 case tic6x_mem_mod_preinc:
2312 case tic6x_mem_mod_predec:
2313 case tic6x_mem_mod_postinc:
2314 case tic6x_mem_mod_postdec:
2315 return tic6x_match_bad_mem;
2316
2317 default:
2318 abort ();
2319 }
2320
2321 }
2322 else
2323 return tic6x_match_bad_mem;
2324
2325 default:
2326 abort ();
2327 }
2328}
2329
2330/* Return the number of bits shift used with DP-relative coding method
2331 CODING. */
2332
2333static unsigned int
2334tic6x_dpr_shift (tic6x_coding_method coding)
2335{
2336 switch (coding)
2337 {
2338 case tic6x_coding_ulcst_dpr_byte:
2339 return 0;
2340
2341 case tic6x_coding_ulcst_dpr_half:
2342 return 1;
2343
2344 case tic6x_coding_ulcst_dpr_word:
2345 return 2;
2346
2347 default:
2348 abort ();
2349 }
2350}
2351
2352/* Return the relocation used with DP-relative coding method
2353 CODING. */
2354
2355static bfd_reloc_code_real_type
2356tic6x_dpr_reloc (tic6x_coding_method coding)
2357{
2358 switch (coding)
2359 {
2360 case tic6x_coding_ulcst_dpr_byte:
2361 return BFD_RELOC_C6000_SBR_U15_B;
2362
2363 case tic6x_coding_ulcst_dpr_half:
2364 return BFD_RELOC_C6000_SBR_U15_H;
2365
2366 case tic6x_coding_ulcst_dpr_word:
2367 return BFD_RELOC_C6000_SBR_U15_W;
2368
2369 default:
2370 abort ();
2371 }
2372}
2373
2374/* Given a memory reference *MEM_REF as originally parsed, fill in
2375 defaults for missing offsets. */
2376
2377static void
2378tic6x_default_mem_ref (tic6x_mem_ref *mem_ref)
2379{
2380 switch (mem_ref->mod)
2381 {
2382 case tic6x_mem_mod_none:
2383 if (mem_ref->scaled != tic6x_offset_none)
2384 abort ();
2385 mem_ref->mod = tic6x_mem_mod_plus;
2386 mem_ref->scaled = tic6x_offset_unscaled;
2387 mem_ref->offset_is_reg = FALSE;
2388 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
2389 mem_ref->offset.exp.X_op = O_constant;
2390 mem_ref->offset.exp.X_add_number = 0;
2391 mem_ref->offset.exp.X_unsigned = 0;
2392 break;
2393
2394 case tic6x_mem_mod_plus:
2395 case tic6x_mem_mod_minus:
2396 if (mem_ref->scaled == tic6x_offset_none)
2397 abort ();
2398 break;
2399
2400 case tic6x_mem_mod_preinc:
2401 case tic6x_mem_mod_predec:
2402 case tic6x_mem_mod_postinc:
2403 case tic6x_mem_mod_postdec:
2404 if (mem_ref->scaled != tic6x_offset_none)
2405 break;
2406 mem_ref->scaled = tic6x_offset_scaled;
2407 mem_ref->offset_is_reg = FALSE;
2408 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
2409 mem_ref->offset.exp.X_op = O_constant;
2410 mem_ref->offset.exp.X_add_number = 1;
2411 mem_ref->offset.exp.X_unsigned = 0;
2412 break;
2413
2414 default:
2415 abort ();
2416 }
2417}
2418
2419/* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
2420 instruction of the specified UNIT, side SIDE. */
2421
2422static unsigned int
2423tic6x_encode_spmask (tic6x_func_unit_base unit, unsigned int side)
2424{
2425 switch (unit)
2426 {
2427 case tic6x_func_unit_l:
2428 return 1 << (side - 1);
2429
2430 case tic6x_func_unit_s:
2431 return 1 << (side + 1);
2432
2433 case tic6x_func_unit_d:
2434 return 1 << (side + 3);
2435
2436 case tic6x_func_unit_m:
2437 return 1 << (side + 5);
2438
2439 default:
2440 abort ();
2441 }
2442}
2443
2444/* Try to encode the instruction with opcode number ID and operands
2445 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2446 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2447 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2448 SPLOOP_II is the ii value from the previous SPLOOP-family
2449 instruction, or 0 if not in such a loop; the only possible problems
2450 are operands being out of range (they already match the
2451 fine-grained form), and inappropriate predication. If this
2452 succeeds, return the encoding and set *OK to TRUE; otherwise return
2453 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2454 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2455 Print error messages for failure if PRINT_ERRORS is TRUE; the
2456 opcode starts at STR and has length OPC_LEN. */
2457
2458static unsigned int
2459tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
2460 unsigned int num_operands, unsigned int this_line_creg,
2461 unsigned int this_line_z, unsigned int func_unit_side,
2462 unsigned int func_unit_cross,
2463 unsigned int func_unit_data_side, int sploop_ii,
2464 expressionS **fix_exp, int *fix_pcrel,
2465 bfd_reloc_code_real_type *fx_r_type, bfd_boolean *fix_adda,
2466 bfd_boolean *fix_needed, bfd_boolean *ok,
2467 bfd_boolean print_errors, char *str, int opc_len)
2468{
2469 const tic6x_opcode *opct;
2470 const tic6x_insn_format *fmt;
2471 unsigned int opcode_value;
2472 unsigned int fld;
2473
2474 opct = &tic6x_opcode_table[id];
2475 fmt = &tic6x_insn_format_table[opct->format];
2476 opcode_value = fmt->cst_bits;
2477
2478 for (fld = 0; fld < opct->num_fixed_fields; fld++)
2479 {
2480 if (opct->fixed_fields[fld].min_val == opct->fixed_fields[fld].max_val)
2481 {
2482 const tic6x_insn_field *fldd;
2483 fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id);
2484 if (fldd == NULL)
2485 abort ();
51dcdd4d 2486 opcode_value |= opct->fixed_fields[fld].min_val << fldd->bitfields[0].low_pos;
40b36596
JM		 2487 }
2488 }
2489
2490 for (fld = 0; fld < opct->num_variable_fields; fld++)
2491 {
2492 const tic6x_insn_field *fldd;
2493 unsigned int value;
2494 unsigned int opno;
2495 unsigned int ffld;
2496 offsetT sign_value;
2497 unsigned int bits;
2498 unsigned int fcyc_bits;
2499 expressionS *expp;
2500 expressionS ucexp;
2501 tic6x_mem_ref mem;
2502
2503 fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id);
2504 if (fldd == NULL)
2505 abort ();
2506 opno = opct->variable_fields[fld].operand_num;
2507 switch (opct->variable_fields[fld].coding_method)
2508 {
2509 case tic6x_coding_ucst:
2510 if (operands[opno].form != TIC6X_OP_EXP)
2511 abort ();
2512 if (operands[opno].value.exp.X_op != O_constant)
2513 abort ();
2514 ucexp = operands[opno].value.exp;
2515 unsigned_constant:
2516 if (ucexp.X_add_number < 0
51dcdd4d 2517 || ucexp.X_add_number >= (1 << fldd->bitfields[0].width))
40b36596
JM		 2518 {
2519 if (print_errors)
2520 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2521 opc_len, str);
2522 *ok = FALSE;
2523 return 0;
2524 }
2525 value = ucexp.X_add_number;
2526 break;
2527
2528 case tic6x_coding_scst:
2529 if (operands[opno].form != TIC6X_OP_EXP)
2530 abort ();
2531 if (operands[opno].value.exp.X_op != O_constant)
2532 {
2533 value = 0;
2534 /* Opcode table should not permit non-constants without
2535 a known relocation for them. */
51dcdd4d 2536 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
40b36596
JM		 2537 abort ();
2538 *fix_needed = TRUE;
2539 *fix_exp = &operands[opno].value.exp;
2540 *fix_pcrel = 0;
2541 *fx_r_type = BFD_RELOC_C6000_ABS_S16;
2542 *fix_adda = FALSE;
2543 break;
2544 }
2545 sign_value = SEXT (operands[opno].value.exp.X_add_number);
2546 signed_constant:
51dcdd4d
NC		 2547 if (sign_value < -(1 << (fldd->bitfields[0].width - 1))
2548 || (sign_value >= (1 << (fldd->bitfields[0].width - 1))))
40b36596
JM		 2549 {
2550 if (print_errors)
2551 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2552 opc_len, str);
2553 *ok = FALSE;
2554 return 0;
2555 }
51dcdd4d
NC		 2556 value = sign_value + (1 << (fldd->bitfields[0].width - 1));
2557 value ^= (1 << (fldd->bitfields[0].width - 1));
40b36596
JM		 2558 break;
2559
2560 case tic6x_coding_ucst_minus_one:
2561 if (operands[opno].form != TIC6X_OP_EXP)
2562 abort ();
2563 if (operands[opno].value.exp.X_op != O_constant)
2564 abort ();
2565 if (operands[opno].value.exp.X_add_number <= 0
51dcdd4d 2566 || operands[opno].value.exp.X_add_number > (1 << fldd->bitfields[0].width))
40b36596
JM		 2567 {
2568 if (print_errors)
2569 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2570 opc_len, str);
2571 *ok = FALSE;
2572 return 0;
2573 }
2574 value = operands[opno].value.exp.X_add_number - 1;
2575 break;
2576
2577 case tic6x_coding_scst_negate:
2578 if (operands[opno].form != TIC6X_OP_EXP)
2579 abort ();
2580 if (operands[opno].value.exp.X_op != O_constant)
2581 abort ();
2582 sign_value = SEXT (-operands[opno].value.exp.X_add_number);
2583 goto signed_constant;
2584
2585 case tic6x_coding_ulcst_dpr_byte:
2586 case tic6x_coding_ulcst_dpr_half:
2587 case tic6x_coding_ulcst_dpr_word:
2588 bits = tic6x_dpr_shift (opct->variable_fields[fld].coding_method);
2589 switch (operands[opno].form)
2590 {
2591 case TIC6X_OP_EXP:
2592 if (operands[opno].value.exp.X_op == O_constant)
2593 {
2594 ucexp = operands[opno].value.exp;
2595 goto unsigned_constant;
2596 }
2597 expp = &operands[opno].value.exp;
2598 break;
2599
2600 case TIC6X_OP_MEM_NOUNREG:
2601 mem = operands[opno].value.mem;
2602 tic6x_default_mem_ref (&mem);
2603 if (mem.offset_is_reg)
2604 abort ();
2605 if (mem.offset.exp.X_op == O_constant)
2606 {
2607 ucexp = mem.offset.exp;
2608 if (mem.scaled == tic6x_offset_unscaled)
2609 {
2610 if (ucexp.X_add_number & ((1 << bits) - 1))
2611 {
2612 if (print_errors)
2613 as_bad (_("offset in operand %u of '%.*s' not "
2614 "divisible by %u"), opno + 1, opc_len,
2615 str, 1u << bits);
2616 *ok = FALSE;
2617 return 0;
2618 }
2619 ucexp.X_add_number >>= bits;
2620 }
2621 goto unsigned_constant;
2622 }
2623 if (mem.scaled != tic6x_offset_unscaled)
2624 abort ();
2625 if (operands[opno].value.mem.mod == tic6x_mem_mod_none
2626 || operands[opno].value.mem.scaled != tic6x_offset_unscaled
2627 || operands[opno].value.mem.offset_is_reg)
2628 abort ();
2629 expp = &operands[opno].value.mem.offset.exp;
2630 break;
2631
2632 default:
2633 abort ();
2634 }
2635 value = 0;
2636 /* Opcode table should not use this encoding without a known
2637 relocation. */
51dcdd4d 2638 if (fldd->bitfields[0].low_pos != 8 || fldd->bitfields[0].width != 15)
40b36596
JM		 2639 abort ();
2640 /* We do not check for offset divisibility here; such a
2641 check is not needed at this point to encode the value,
2642 and if there is eventually a problem it will be detected
2643 either in md_apply_fix or at link time. */
2644 *fix_needed = TRUE;
2645 *fix_exp = expp;
2646 *fix_pcrel = 0;
2647 *fx_r_type
2648 = tic6x_dpr_reloc (opct->variable_fields[fld].coding_method);
2649 if (operands[opno].form == TIC6X_OP_EXP)
2650 *fix_adda = TRUE;
2651 else
2652 *fix_adda = FALSE;
2653 break;
2654
2655 case tic6x_coding_lcst_low16:
2656 if (operands[opno].form != TIC6X_OP_EXP)
2657 abort ();
2658 if (operands[opno].value.exp.X_op == O_constant)
2659 value = operands[opno].value.exp.X_add_number & 0xffff;
2660 else
2661 {
2662 value = 0;
2663 /* Opcode table should not use this encoding without a
2664 known relocation. */
51dcdd4d 2665 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
40b36596
JM		 2666 abort ();
2667 *fix_needed = TRUE;
2668 *fix_exp = &operands[opno].value.exp;
2669 *fix_pcrel = 0;
2670 *fx_r_type = BFD_RELOC_C6000_ABS_L16;
2671 *fix_adda = FALSE;
2672 }
2673 break;
2674
2675 case tic6x_coding_lcst_high16:
2676 if (operands[opno].form != TIC6X_OP_EXP)
2677 abort ();
2678 if (operands[opno].value.exp.X_op == O_constant)
2679 value = (operands[opno].value.exp.X_add_number >> 16) & 0xffff;
2680 else
2681 {
2682 value = 0;
2683 /* Opcode table should not use this encoding without a
2684 known relocation. */
51dcdd4d 2685 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
40b36596
JM		 2686 abort ();
2687 *fix_needed = TRUE;
2688 *fix_exp = &operands[opno].value.exp;
2689 *fix_pcrel = 0;
2690 *fx_r_type = BFD_RELOC_C6000_ABS_H16;
2691 *fix_adda = FALSE;
2692 }
2693 break;
2694
2695 case tic6x_coding_pcrel:
2696 case tic6x_coding_pcrel_half:
2697 if (operands[opno].form != TIC6X_OP_EXP)
2698 abort ();
2699 value = 0;
2700 *fix_needed = TRUE;
2701 *fix_exp = &operands[opno].value.exp;
2702 *fix_pcrel = 1;
51dcdd4d 2703 if (fldd->bitfields[0].low_pos == 7 && fldd->bitfields[0].width == 21)
40b36596 2704 *fx_r_type = BFD_RELOC_C6000_PCR_S21;
51dcdd4d 2705 else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 12)
40b36596 2706 *fx_r_type = BFD_RELOC_C6000_PCR_S12;
51dcdd4d 2707 else if (fldd->bitfields[0].low_pos == 13 && fldd->bitfields[0].width == 10)
40b36596 2708 *fx_r_type = BFD_RELOC_C6000_PCR_S10;
51dcdd4d 2709 else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 7)
40b36596
JM		 2710 *fx_r_type = BFD_RELOC_C6000_PCR_S7;
2711 else
2712 /* Opcode table should not use this encoding without a
2713 known relocation. */
2714 abort ();
2715 *fix_adda = FALSE;
2716 break;
2717
795b8e6b
NC		 2718 case tic6x_coding_regpair_lsb:
2719 switch (operands[opno].form)
2720 {
2721 case TIC6X_OP_REGPAIR:
2722 value = operands[opno].value.reg.num;
2723 break;
2724
2725 default:
2726 abort ();
2727 }
2728 break;
2729
2730 case tic6x_coding_regpair_msb:
2731 switch (operands[opno].form)
2732 {
2733 case TIC6X_OP_REGPAIR:
2734 value = operands[opno].value.reg.num + 1;
2735 break;
2736
2737 default:
2738 abort ();
2739 }
2740 break;
2741
40b36596
JM		 2742 case tic6x_coding_reg:
2743 switch (operands[opno].form)
2744 {
2745 case TIC6X_OP_REG:
2746 case TIC6X_OP_REGPAIR:
2747 value = operands[opno].value.reg.num;
2748 break;
2749
2750 case TIC6X_OP_MEM_NOUNREG:
2751 case TIC6X_OP_MEM_UNREG:
2752 value = operands[opno].value.mem.base_reg.num;
2753 break;
2754
2755 default:
2756 abort ();
2757 }
2758 break;
2759
2760 case tic6x_coding_areg:
2761 switch (operands[opno].form)
2762 {
2763 case TIC6X_OP_REG:
2764 value = (operands[opno].value.reg.num == 15 ? 1 : 0);
2765 break;
2766
2767 case TIC6X_OP_MEM_NOUNREG:
2768 value = (operands[opno].value.mem.base_reg.num == 15 ? 1 : 0);
2769 break;
2770
2771 default:
2772 abort ();
2773 }
2774 break;
2775
2776 case tic6x_coding_crlo:
2777 if (operands[opno].form != TIC6X_OP_CTRL)
2778 abort ();
2779 value = tic6x_ctrl_table[operands[opno].value.ctrl].crlo;
2780 break;
2781
2782 case tic6x_coding_crhi:
2783 if (operands[opno].form != TIC6X_OP_CTRL)
2784 abort ();
2785 value = 0;
2786 break;
2787
2788 case tic6x_coding_reg_shift:
2789 if (operands[opno].form != TIC6X_OP_REGPAIR)
2790 abort ();
2791 value = operands[opno].value.reg.num >> 1;
2792 break;
2793
2794 case tic6x_coding_mem_offset:
2795 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG)
2796 abort ();
2797 mem = operands[opno].value.mem;
2798 tic6x_default_mem_ref (&mem);
2799 if (mem.offset_is_reg)
2800 {
2801 if (mem.scaled != tic6x_offset_scaled)
2802 abort ();
2803 value = mem.offset.reg.num;
2804 }
2805 else
2806 {
2807 int scale;
2808
2809 if (mem.offset.exp.X_op != O_constant)
2810 abort ();
2811 switch (mem.scaled)
2812 {
2813 case tic6x_offset_scaled:
2814 scale = 1;
2815 break;
2816
2817 case tic6x_offset_unscaled:
2818 scale = opct->operand_info[opno].size;
2819 if (scale != 1 && scale != 2 && scale != 4 && scale != 8)
2820 abort ();
2821 break;
2822
2823 default:
2824 abort ();
2825 }
2826 if (mem.offset.exp.X_add_number < 0
51dcdd4d 2827 || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width) * scale)
40b36596
JM		 2828 {
2829 if (print_errors)
2830 as_bad (_("offset in operand %u of '%.*s' out of range"),
2831 opno + 1, opc_len, str);
2832 *ok = FALSE;
2833 return 0;
2834 }
2835 if (mem.offset.exp.X_add_number % scale)
2836 {
2837 if (print_errors)
2838 as_bad (_("offset in operand %u of '%.*s' not "
2839 "divisible by %u"),
2840 opno + 1, opc_len, str, scale);
2841 *ok = FALSE;
2842 return 0;
2843 }
2844 value = mem.offset.exp.X_add_number / scale;
2845 }
2846 break;
2847
2848 case tic6x_coding_mem_offset_noscale:
2849 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2850 abort ();
2851 mem = operands[opno].value.mem;
2852 tic6x_default_mem_ref (&mem);
2853 if (mem.offset_is_reg)
2854 value = mem.offset.reg.num;
2855 else
2856 {
2857 if (mem.offset.exp.X_op != O_constant)
2858 abort ();
2859 if (mem.offset.exp.X_add_number < 0
51dcdd4d 2860 || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width))
40b36596
JM		 2861 {
2862 if (print_errors)
2863 as_bad (_("offset in operand %u of '%.*s' out of range"),
2864 opno + 1, opc_len, str);
2865 *ok = FALSE;
2866 return 0;
2867 }
2868 value = mem.offset.exp.X_add_number;
2869 }
2870 break;
2871
2872 case tic6x_coding_mem_mode:
2873 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG
2874 && operands[opno].form != TIC6X_OP_MEM_UNREG)
2875 abort ();
2876 mem = operands[opno].value.mem;
2877 tic6x_default_mem_ref (&mem);
2878 switch (mem.mod)
2879 {
2880 case tic6x_mem_mod_plus:
2881 value = 1;
2882 break;
2883
2884 case tic6x_mem_mod_minus:
2885 value = 0;
2886 break;
2887
2888 case tic6x_mem_mod_preinc:
2889 value = 9;
2890 break;
2891
2892 case tic6x_mem_mod_predec:
2893 value = 8;
2894 break;
2895
2896 case tic6x_mem_mod_postinc:
2897 value = 11;
2898 break;
2899
2900 case tic6x_mem_mod_postdec:
2901 value = 10;
2902 break;
2903
2904 default:
2905 abort ();
2906 }
2907 value += (mem.offset_is_reg ? 4 : 0);
2908 break;
2909
2910 case tic6x_coding_scaled:
2911 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2912 abort ();
2913 mem = operands[opno].value.mem;
2914 tic6x_default_mem_ref (&mem);
2915 switch (mem.scaled)
2916 {
2917 case tic6x_offset_unscaled:
2918 value = 0;
2919 break;
2920
2921 case tic6x_offset_scaled:
2922 value = 1;
2923 break;
2924
2925 default:
2926 abort ();
2927 }
2928 break;
2929
2930 case tic6x_coding_spmask:
2931 /* The position of such a field is hardcoded in the handling
2932 of "||^". */
51dcdd4d 2933 if (fldd->bitfields[0].low_pos != 18)
40b36596
JM		 2934 abort ();
2935 value = 0;
2936 for (opno = 0; opno < num_operands; opno++)
2937 {
2938 unsigned int v;
2939
2940 v = tic6x_encode_spmask (operands[opno].value.func_unit.base,
2941 operands[opno].value.func_unit.side);
2942 if (value & v)
2943 {
2944 if (print_errors)
2945 as_bad (_("functional unit already masked for operand "
2946 "%u of '%.*s'"), opno + 1, opc_len, str);
2947 *ok = FALSE;
2948 return 0;
2949 }
2950 value |= v;
2951 }
2952 break;
2953
2954 case tic6x_coding_reg_unused:
2955 /* This is a placeholder; correct handling goes along with
2956 resource constraint checks. */
2957 value = 0;
2958 break;
2959
2960 case tic6x_coding_fstg:
2961 case tic6x_coding_fcyc:
2962 if (operands[opno].form != TIC6X_OP_EXP)
2963 abort ();
2964 if (operands[opno].value.exp.X_op != O_constant)
2965 abort ();
2966 if (!sploop_ii)
2967 {
2968 if (print_errors)
2969 as_bad (_("'%.*s' instruction not in a software "
2970 "pipelined loop"),
2971 opc_len, str);
2972 *ok = FALSE;
2973 return 0;
2974 }
2975
2976 if (sploop_ii <= 1)
2977 fcyc_bits = 0;
2978 else if (sploop_ii <= 2)
2979 fcyc_bits = 1;
2980 else if (sploop_ii <= 4)
2981 fcyc_bits = 2;
2982 else if (sploop_ii <= 8)
2983 fcyc_bits = 3;
2984 else if (sploop_ii <= 14)
2985 fcyc_bits = 4;
2986 else
2987 abort ();
51dcdd4d 2988 if (fcyc_bits > fldd->bitfields[0].width)
40b36596
JM		 2989 abort ();
2990
2991 if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
2992 {
5d4c71e1 2993 int i, t;
40b36596
JM		 2994 if (operands[opno].value.exp.X_add_number < 0
2995 || (operands[opno].value.exp.X_add_number
51dcdd4d 2996 >= (1 << (fldd->bitfields[0].width - fcyc_bits))))
40b36596
JM		 2997 {
2998 if (print_errors)
2999 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
3000 opc_len, str);
3001 *ok = FALSE;
3002 return 0;
3003 }
5d4c71e1 3004 value = operands[opno].value.exp.X_add_number;
51dcdd4d 3005 for (t = 0, i = fcyc_bits; i < fldd->bitfields[0].width; i++)
5d4c71e1
BS		 3006 {
3007 t = (t << 1) | (value & 1);
3008 value >>= 1;
3009 }
3010 value = t << fcyc_bits;
40b36596
JM		 3011 }
3012 else
3013 {
3014 if (operands[opno].value.exp.X_add_number < 0
3015 || (operands[opno].value.exp.X_add_number >= sploop_ii))
3016 {
3017 if (print_errors)
3018 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
3019 opc_len, str);
3020 *ok = FALSE;
3021 return 0;
3022 }
3023 value = operands[opno].value.exp.X_add_number;
3024 }
3025 break;
3026
3027 case tic6x_coding_fu:
3028 value = func_unit_side == 2 ? 1 : 0;
3029 break;
3030
3031 case tic6x_coding_data_fu:
3032 value = func_unit_data_side == 2 ? 1 : 0;
3033 break;
3034
3035 case tic6x_coding_xpath:
3036 value = func_unit_cross;
3037 break;
3038
3039 default:
3040 abort ();
3041 }
3042
3043 for (ffld = 0; ffld < opct->num_fixed_fields; ffld++)
3044 if ((opct->fixed_fields[ffld].field_id
3045 == opct->variable_fields[fld].field_id)
3046 && (value < opct->fixed_fields[ffld].min_val
3047 || value > opct->fixed_fields[ffld].max_val))
3048 {
3049 if (print_errors)
3050 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
3051 opc_len, str);
3052 *ok = FALSE;
3053 return 0;
3054 }
3055
51dcdd4d 3056 opcode_value |= value << fldd->bitfields[0].low_pos;
40b36596
JM		 3057 }
3058
3059 if (this_line_creg)
3060 {
3061 const tic6x_insn_field *creg;
3062 const tic6x_insn_field *z;
3063
3064 creg = tic6x_field_from_fmt (fmt, tic6x_field_creg);
3065 if (creg == NULL)
3066 {
3067 if (print_errors)
3068 as_bad (_("instruction '%.*s' cannot be predicated"),
3069 opc_len, str);
3070 *ok = FALSE;
3071 return 0;
3072 }
3073 z = tic6x_field_from_fmt (fmt, tic6x_field_z);
3074 /* If there is a creg field, there must be a z field; otherwise
3075 there is an error in the format table. */
3076 if (z == NULL)
3077 abort ();
3078
51dcdd4d
NC		 3079 opcode_value |= this_line_creg << creg->bitfields[0].low_pos;
3080 opcode_value |= this_line_z << z->bitfields[0].low_pos;
40b36596
JM		 3081 }
3082
3083 *ok = TRUE;
3084 return opcode_value;
3085}
3086
3087/* Convert the target integer stored in N bytes in BUF to a host
3088 integer, returning that value. */
3089
3090static valueT
3091md_chars_to_number (char *buf, int n)
3092{
3093 valueT result = 0;
3094 unsigned char *p = (unsigned char *) buf;
3095
3096 if (target_big_endian)
3097 {
3098 while (n--)
3099 {
3100 result <<= 8;
3101 result |= (*p++ & 0xff);
3102 }
3103 }
3104 else
3105 {
3106 while (n--)
3107 {
3108 result <<= 8;
3109 result |= (p[n] & 0xff);
3110 }
3111 }
3112
3113 return result;
3114}
3115
3116/* Assemble the instruction starting at STR (an opcode, with the
3117 opcode name all-lowercase). */
3118
3119void
3120md_assemble (char *str)
3121{
3122 char *p;
3123 int opc_len;
3124 bfd_boolean this_line_parallel;
3125 bfd_boolean this_line_spmask;
3126 unsigned int this_line_creg;
3127 unsigned int this_line_z;
d99e5b39 3128 tic6x_label_list *this_insn_label_list;
40b36596
JM		 3129 segment_info_type *seginfo;
3130 tic6x_opcode_list *opc_list, *opc;
3131 tic6x_func_unit_base func_unit_base = tic6x_func_unit_nfu;
3132 unsigned int func_unit_side = 0;
3133 unsigned int func_unit_cross = 0;
3134 unsigned int cross_side = 0;
3135 unsigned int func_unit_data_side = 0;
3136 unsigned int max_matching_opcodes, num_matching_opcodes;
3137 tic6x_opcode_id *opcm = NULL;
3138 unsigned int opc_rank[TIC6X_NUM_PREFER];
3139 const tic6x_opcode *opct = NULL;
3140 int min_rank, try_rank, max_rank;
3141 bfd_boolean num_operands_permitted[TIC6X_MAX_SOURCE_OPERANDS + 1]
3142 = { FALSE };
3143 unsigned int operand_forms[TIC6X_MAX_SOURCE_OPERANDS] = { 0 };
3144 tic6x_operand operands[TIC6X_MAX_SOURCE_OPERANDS];
3145 unsigned int max_num_operands;
3146 unsigned int num_operands_read;
3147 bfd_boolean ok_this_arch, ok_this_fu, ok_this_arch_fu;
3148 bfd_boolean bad_operands = FALSE;
3149 unsigned int opcode_value;
3150 bfd_boolean encoded_ok;
3151 bfd_boolean fix_needed = FALSE;
3152 expressionS *fix_exp = NULL;
3153 int fix_pcrel = 0;
3154 bfd_reloc_code_real_type fx_r_type = BFD_RELOC_UNUSED;
3155 bfd_boolean fix_adda = FALSE;
d99e5b39 3156 fragS *insn_frag;
40b36596
JM		 3157 char *output;
3158
3159 p = str;
3160 while (*p && !is_end_of_line[(unsigned char) *p] && *p != ' ')
3161 p++;
3162
3163 /* This function should only have been called when there is actually
3164 an instruction to assemble. */
3165 if (p == str)
3166 abort ();
3167
59e6276b
JM		 3168 /* Now an instruction has been seen, architecture attributes from
3169 .arch directives merge with rather than overriding the previous
3170 value. */
3171 tic6x_seen_insns = TRUE;
3172 /* If no .arch directives or -march options have been seen, we are
3173 assessing instruction validity based on the C674X default, so set
3174 the attribute accordingly. */
75fa6dc1
JM		 3175 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
3176 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
59e6276b 3177
40b36596
JM		 3178 /* Reset global settings for parallel bars and predicates now to
3179 avoid extra errors if there are problems with this opcode. */
3180 this_line_parallel = tic6x_line_parallel;
3181 this_line_spmask = tic6x_line_spmask;
3182 this_line_creg = tic6x_line_creg;
3183 this_line_z = tic6x_line_z;
3184 tic6x_line_parallel = FALSE;
3185 tic6x_line_spmask = FALSE;
3186 tic6x_line_creg = 0;
3187 tic6x_line_z = 0;
3188 seginfo = seg_info (now_seg);
d99e5b39
JM		 3189 this_insn_label_list = seginfo->tc_segment_info_data.label_list;
3190 seginfo->tc_segment_info_data.label_list = NULL;
40b36596
JM		 3191
3192 opc_list = hash_find_n (opcode_hash, str, p - str);
3193 if (opc_list == NULL)
3194 {
3195 char c = *p;
3196 *p = 0;
3197 as_bad (_("unknown opcode '%s'"), str);
3198 *p = c;
3199 return;
3200 }
3201
3202 opc_len = p - str;
3203 skip_whitespace (p);
3204
3205 /* See if there is something that looks like a functional unit
3206 specifier. */
3207 if (*p == '.')
3208 {
3209 bfd_boolean good_func_unit;
3210 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
3211 unsigned int maybe_side = 0;
3212 unsigned int maybe_cross = 0;
3213 unsigned int maybe_data_side = 0;
3214
3215 good_func_unit = tic6x_parse_func_unit_base (p + 1, &maybe_base,
3216 &maybe_side);
3217
3218 if (good_func_unit)
3219 {
3220 if (p[3] == ' ' || is_end_of_line[(unsigned char) p[3]])
3221 p += 3;
3222 else if ((p[3] == 'x' || p[3] == 'X')
3223 && (p[4] == ' ' || is_end_of_line[(unsigned char) p[4]]))
3224 {
3225 maybe_cross = 1;
3226 p += 4;
3227 }
3228 else if (maybe_base == tic6x_func_unit_d
3229 && (p[3] == 't' || p[3] == 'T')
3230 && (p[4] == '1' || p[4] == '2')
3231 && (p[5] == ' ' || is_end_of_line[(unsigned char) p[5]]))
3232 {
3233 maybe_data_side = p[4] - '0';
3234 p += 5;
3235 }
3236 else
3237 good_func_unit = FALSE;
3238 }
3239
3240 if (good_func_unit)
3241 {
3242 func_unit_base = maybe_base;
3243 func_unit_side = maybe_side;
3244 func_unit_cross = maybe_cross;
3245 cross_side = (func_unit_cross ? 3 - func_unit_side : func_unit_side);
3246 func_unit_data_side = maybe_data_side;
3247 }
3248
3249 skip_whitespace (p);
3250 }
3251
3252 /* Determine which entries in the opcode table match, and the
3253 associated permitted forms of operands. */
3254 max_matching_opcodes = 0;
3255 for (opc = opc_list; opc; opc = opc->next)
3256 max_matching_opcodes++;
3257 num_matching_opcodes = 0;
3258 opcm = xmalloc (max_matching_opcodes * sizeof (*opcm));
3259 max_num_operands = 0;
3260 ok_this_arch = FALSE;
3261 ok_this_fu = FALSE;
3262 ok_this_arch_fu = FALSE;
3263 for (opc = opc_list; opc; opc = opc->next)
3264 {
3265 unsigned int num_operands;
3266 unsigned int i;
3267 bfd_boolean this_opc_arch_ok = TRUE;
3268 bfd_boolean this_opc_fu_ok = TRUE;
3269
3270 if (tic6x_insn_format_table[tic6x_opcode_table[opc->id].format].num_bits
3271 != 32)
3272 continue;
3273 if (!(tic6x_opcode_table[opc->id].isa_variants & tic6x_features))
3274 this_opc_arch_ok = FALSE;
3275 if (tic6x_opcode_table[opc->id].func_unit != func_unit_base)
3276 this_opc_fu_ok = FALSE;
3277 if (func_unit_side == 1
3278 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_B_ONLY))
3279 this_opc_fu_ok = FALSE;
3280 if (func_unit_cross
3281 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_NO_CROSS))
3282 this_opc_fu_ok = FALSE;
3283 if (!func_unit_data_side
3284 && (tic6x_opcode_table[opc->id].flags
3285 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
3286 this_opc_fu_ok = FALSE;
3287 if (func_unit_data_side
3288 && !(tic6x_opcode_table[opc->id].flags
3289 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
3290 this_opc_fu_ok = FALSE;
3291 if (func_unit_data_side == 1
3292 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_T2_ONLY))
3293 this_opc_fu_ok = FALSE;
3294 if (this_opc_arch_ok)
3295 ok_this_arch = TRUE;
3296 if (this_opc_fu_ok)
3297 ok_this_fu = TRUE;
3298 if (!this_opc_arch_ok || !this_opc_fu_ok)
3299 continue;
3300 ok_this_arch_fu = TRUE;
3301 opcm[num_matching_opcodes] = opc->id;
3302 num_matching_opcodes++;
3303 num_operands = tic6x_opcode_table[opc->id].num_operands;
3304
3305 if (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SPMASK)
3306 {
3307 if (num_operands != 1
3308 || (tic6x_opcode_table[opc->id].operand_info[0].form
3309 != tic6x_operand_func_unit))
3310 abort ();
3311 num_operands = 8;
3312 for (i = 0; i < num_operands; i++)
3313 {
3314 operand_forms[i]
3315 |= tic6x_coarse_operand_form (tic6x_operand_func_unit);
3316 num_operands_permitted[i] = TRUE;
3317 }
3318 }
3319 else
3320 {
3321 for (i = 0; i < num_operands; i++)
3322 {
3323 tic6x_operand_form f
3324 = tic6x_opcode_table[opc->id].operand_info[i].form;
3325
3326 operand_forms[i] |= tic6x_coarse_operand_form (f);
3327 }
3328 }
3329 num_operands_permitted[num_operands] = TRUE;
3330 if (num_operands > max_num_operands)
3331 max_num_operands = num_operands;
3332 }
3333
3334 if (!ok_this_arch)
3335 {
3336 as_bad (_("'%.*s' instruction not supported on this architecture"),
3337 opc_len, str);
3338 free (opcm);
3339 return;
3340 }
3341
3342 if (!ok_this_fu)
3343 {
3344 as_bad (_("'%.*s' instruction not supported on this functional unit"),
3345 opc_len, str);
3346 free (opcm);
3347 return;
3348 }
3349
3350 if (!ok_this_arch_fu)
3351 {
3352 as_bad (_("'%.*s' instruction not supported on this functional unit"
3353 " for this architecture"),
3354 opc_len, str);
3355 free (opcm);
3356 return;
3357 }
3358
3359 /* If there were no instructions matching the above availability
3360 checks, we should now have given an error and returned. */
3361 if (num_matching_opcodes == 0)
3362 abort ();
3363
3364 num_operands_read = 0;
3365 while (TRUE)
3366 {
3367 skip_whitespace (p);
3368 if (is_end_of_line[(unsigned char) *p])
3369 {
3370 if (num_operands_read > 0)
3371 {
3372 as_bad (_("missing operand after comma"));
3373 bad_operands = TRUE;
3374 }
3375 break;
3376 }
3377
3378 if (max_num_operands == 0)
3379 {
3380 as_bad (_("too many operands to '%.*s'"), opc_len, str);
3381 bad_operands = TRUE;
3382 break;
3383 }
3384
3385 if (!tic6x_parse_operand (&p, &operands[num_operands_read],
3386 operand_forms[num_operands_read], str, opc_len,
3387 num_operands_read + 1))
3388 bad_operands = TRUE;
3389 num_operands_read++;
3390
3391 if (is_end_of_line[(unsigned char) *p])
3392 break;
3393 else if (*p == ',')
3394 {
3395 p++;
3396 if (num_operands_read == max_num_operands)
3397 {
3398 as_bad (_("too many operands to '%.*s'"), opc_len, str);
3399 bad_operands = TRUE;
3400 break;
3401 }
3402 continue;
3403 }
3404 else
3405 /* Operand parsing should consume whole operands. */
3406 abort ();
3407 }
3408
3409 if (!bad_operands && !num_operands_permitted[num_operands_read])
3410 {
3411 as_bad (_("bad number of operands to '%.*s'"), opc_len, str);
3412 bad_operands = TRUE;
3413 }
3414
3415 if (!bad_operands)
3416 {
3417 /* Each operand is of the right syntactic form for some opcode
3418 choice, and the number of operands is valid. Check that each
3419 operand is OK in detail for some opcode choice with the right
3420 number of operands. */
3421 unsigned int i;
3422
3423 for (i = 0; i < num_operands_read; i++)
3424 {
3425 bfd_boolean coarse_ok = FALSE;
3426 bfd_boolean fine_ok = FALSE;
3427 tic6x_operand_match fine_failure = tic6x_match_matches;
3428 unsigned int j;
3429
3430 for (j = 0; j < num_matching_opcodes; j++)
3431 {
3432 tic6x_operand_form f;
3433 tic6x_rw rw;
3434 unsigned int cf;
3435 tic6x_operand_match this_fine_failure;
3436
3437 if (tic6x_opcode_table[opcm[j]].flags & TIC6X_FLAG_SPMASK)
3438 {
3439 f = tic6x_operand_func_unit;
3440 rw = tic6x_rw_none;
3441 }
3442 else
3443 {
3444 if (tic6x_opcode_table[opcm[j]].num_operands
3445 != num_operands_read)
3446 continue;
3447
3448 f = tic6x_opcode_table[opcm[j]].operand_info[i].form;
3449 rw = tic6x_opcode_table[opcm[j]].operand_info[i].rw;
3450 }
3451 cf = tic6x_coarse_operand_form (f);
3452
3453 if (operands[i].form != cf)
3454 continue;
3455
3456 coarse_ok = TRUE;
3457 this_fine_failure
3458 = tic6x_operand_matches_form (&operands[i], f, rw,
3459 func_unit_side,
3460 cross_side,
3461 func_unit_data_side);
3462 if (this_fine_failure == tic6x_match_matches)
3463 {
3464 fine_ok = TRUE;
3465 break;
3466 }
3467 if (fine_failure == tic6x_match_matches
3468 || fine_failure > this_fine_failure)
3469 fine_failure = this_fine_failure;
3470 }
3471
3472 /* No instructions should have operand syntactic forms only
3473 acceptable with certain numbers of operands, so no
3474 diagnostic for this case. */
3475 if (!coarse_ok)
3476 abort ();
3477
3478 if (!fine_ok)
3479 {
3480 switch (fine_failure)
3481 {
3482 case tic6x_match_non_const:
3483 as_bad (_("operand %u of '%.*s' not constant"),
3484 i + 1, opc_len, str);
3485 break;
3486
3487 case tic6x_match_wrong_side:
3488 as_bad (_("operand %u of '%.*s' on wrong side"),
3489 i + 1, opc_len, str);
3490 break;
3491
3492 case tic6x_match_bad_return:
3493 as_bad (_("operand %u of '%.*s' not a valid return "
3494 "address register"),
3495 i + 1, opc_len, str);
3496 break;
3497
3498 case tic6x_match_ctrl_write_only:
3499 as_bad (_("operand %u of '%.*s' is write-only"),
3500 i + 1, opc_len, str);
3501 break;
3502
3503 case tic6x_match_ctrl_read_only:
3504 as_bad (_("operand %u of '%.*s' is read-only"),
3505 i + 1, opc_len, str);
3506 break;
3507
3508 case tic6x_match_bad_mem:
3509 as_bad (_("operand %u of '%.*s' not a valid memory "
3510 "reference"),
3511 i + 1, opc_len, str);
3512 break;
3513
3514 case tic6x_match_bad_address:
3515 as_bad (_("operand %u of '%.*s' not a valid base "
3516 "address register"),
3517 i + 1, opc_len, str);
3518 break;
3519
3520 default:
3521 abort ();
3522 }
3523 bad_operands = TRUE;
3524 break;
3525 }
3526 }
3527 }
3528
3529 if (!bad_operands)
3530 {
3531 /* Each operand is OK for some opcode choice, and the number of
3532 operands is valid. Check whether there is an opcode choice
3533 for which all operands are simultaneously valid. */
3534 unsigned int i;
3535 bfd_boolean found_match = FALSE;
3536
3537 for (i = 0; i < TIC6X_NUM_PREFER; i++)
3538 opc_rank[i] = (unsigned int) -1;
3539
3540 min_rank = TIC6X_NUM_PREFER - 1;
3541 max_rank = 0;
3542
3543 for (i = 0; i < num_matching_opcodes; i++)
3544 {
3545 unsigned int j;
3546 bfd_boolean this_matches = TRUE;
3547
3548 if (!(tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
3549 && tic6x_opcode_table[opcm[i]].num_operands != num_operands_read)
3550 continue;
3551
3552 for (j = 0; j < num_operands_read; j++)
3553 {
3554 tic6x_operand_form f;
3555 tic6x_rw rw;
3556
3557 if (tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
3558 {
3559 f = tic6x_operand_func_unit;
3560 rw = tic6x_rw_none;
3561 }
3562 else
3563 {
3564 f = tic6x_opcode_table[opcm[i]].operand_info[j].form;
3565 rw = tic6x_opcode_table[opcm[i]].operand_info[j].rw;
3566 }
3567 if (tic6x_operand_matches_form (&operands[j], f, rw,
3568 func_unit_side,
3569 cross_side,
3570 func_unit_data_side)
3571 != tic6x_match_matches)
3572 {
3573 this_matches = FALSE;
3574 break;
3575 }
3576 }
3577
3578 if (this_matches)
3579 {
3580 int rank = TIC6X_PREFER_VAL (tic6x_opcode_table[opcm[i]].flags);
3581
3582 if (rank < min_rank)
3583 min_rank = rank;
3584 if (rank > max_rank)
3585 max_rank = rank;
3586
3587 if (opc_rank[rank] == (unsigned int) -1)
3588 opc_rank[rank] = i;
3589 else
3590 /* The opcode table should provide a total ordering
3591 for all cases where multiple matches may get
3592 here. */
3593 abort ();
3594
3595 found_match = TRUE;
3596 }
3597 }
3598
3599 if (!found_match)
3600 {
3601 as_bad (_("bad operand combination for '%.*s'"), opc_len, str);
3602 bad_operands = TRUE;
3603 }
3604 }
3605
3606 if (bad_operands)
3607 {
3608 free (opcm);
3609 return;
3610 }
3611
3612 opcode_value = 0;
3613 encoded_ok = FALSE;
3614 for (try_rank = max_rank; try_rank >= min_rank; try_rank--)
3615 {
3616 fix_needed = FALSE;
3617
3618 if (opc_rank[try_rank] == (unsigned int) -1)
3619 continue;
3620
3621 opcode_value = tic6x_try_encode (opcm[opc_rank[try_rank]], operands,
3622 num_operands_read, this_line_creg,
3623 this_line_z, func_unit_side,
3624 func_unit_cross, func_unit_data_side,
3625 seginfo->tc_segment_info_data.sploop_ii,
3626 &fix_exp, &fix_pcrel, &fx_r_type,
3627 &fix_adda, &fix_needed, &encoded_ok,
3628 (try_rank == min_rank ? TRUE : FALSE),
3629 str, opc_len);
3630 if (encoded_ok)
3631 {
3632 opct = &tic6x_opcode_table[opcm[opc_rank[try_rank]]];
3633 break;
3634 }
3635 }
3636
3637 free (opcm);
3638
3639 if (!encoded_ok)
3640 return;
3641
3642 if (this_line_parallel)
3643 {
d99e5b39
JM		 3644 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag;
3645 if (insn_frag == NULL)
40b36596
JM		 3646 {
3647 as_bad (_("parallel instruction not following another instruction"));
3648 return;
3649 }
3650
d99e5b39 3651 if (insn_frag->fr_fix >= 32)
40b36596
JM		 3652 {
3653 as_bad (_("too many instructions in execute packet"));
3654 return;
3655 }
3656
d99e5b39 3657 if (this_insn_label_list != NULL)
40b36596
JM		 3658 as_bad (_("label not at start of execute packet"));
3659
3660 if (opct->flags & TIC6X_FLAG_FIRST)
3661 as_bad (_("'%.*s' instruction not at start of execute packet"),
3662 opc_len, str);
3663
3664 *seginfo->tc_segment_info_data.last_insn_lsb |= 0x1;
d99e5b39 3665 output = insn_frag->fr_literal + insn_frag->fr_fix;
40b36596
JM		 3666 }
3667 else
3668 {
d99e5b39
JM		 3669 tic6x_label_list *l;
3670
40b36596 3671 seginfo->tc_segment_info_data.spmask_addr = NULL;
38bd8d09 3672 seginfo->tc_segment_info_data.func_units_used = 0;
d99e5b39
JM		 3673
3674 /* Start a new frag for this execute packet. */
3675 if (frag_now_fix () != 0)
3676 {
3677 if (frag_now->fr_type != rs_machine_dependent)
3678 frag_wane (frag_now);
3679
3680 frag_new (0);
3681 }
3682 frag_grow (32);
3683 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag = frag_now;
3684 for (l = this_insn_label_list; l; l = l->next)
3685 {
3686 symbol_set_frag (l->label, frag_now);
3687 S_SET_VALUE (l->label, 0);
3688 S_SET_SEGMENT (l->label, now_seg);
3689 }
3690 tic6x_free_label_list (this_insn_label_list);
3691 dwarf2_emit_insn (0);
3692 output = frag_var (rs_machine_dependent, 32, 32, 0, NULL, 0, NULL);
3693 /* This must be the same as the frag to which a pointer was just
3694 saved. */
3695 if (output != insn_frag->fr_literal)
3696 abort ();
3697 insn_frag->tc_frag_data.is_insns = TRUE;
3698 insn_frag->tc_frag_data.can_cross_fp_boundary
3699 = tic6x_can_cross_fp_boundary;
40b36596
JM		 3700 }
3701
38bd8d09
JM		 3702 if (func_unit_base != tic6x_func_unit_nfu)
3703 {
3704 unsigned int func_unit_enc;
3705
3706 func_unit_enc = tic6x_encode_spmask (func_unit_base, func_unit_side);
3707
3708 if (seginfo->tc_segment_info_data.func_units_used & func_unit_enc)
3709 as_bad (_("functional unit already used in this execute packet"));
3710
3711 seginfo->tc_segment_info_data.func_units_used |= func_unit_enc;
3712 }
3713
40b36596
JM		 3714 if (opct->flags & TIC6X_FLAG_SPLOOP)
3715 {
3716 if (seginfo->tc_segment_info_data.sploop_ii)
3717 as_bad (_("nested software pipelined loop"));
3718 if (num_operands_read != 1
3719 || operands[0].form != TIC6X_OP_EXP
3720 || operands[0].value.exp.X_op != O_constant)
3721 abort ();
3722 seginfo->tc_segment_info_data.sploop_ii
3723 = operands[0].value.exp.X_add_number;
3724 }
3725 else if (opct->flags & TIC6X_FLAG_SPKERNEL)
3726 {
3727 if (!seginfo->tc_segment_info_data.sploop_ii)
3728 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3729 opc_len, str);
3730 seginfo->tc_segment_info_data.sploop_ii = 0;
3731 }
3732
3733 if (this_line_spmask)
3734 {
3735 if (seginfo->tc_segment_info_data.spmask_addr == NULL)
3736 as_bad (_("'||^' without previous SPMASK"));
3737 else if (func_unit_base == tic6x_func_unit_nfu)
3738 as_bad (_("cannot mask instruction using no functional unit"));
3739 else
3740 {
3741 unsigned int spmask_opcode;
3742 unsigned int mask_bit;
3743
3744 spmask_opcode
3745 = md_chars_to_number (seginfo->tc_segment_info_data.spmask_addr,
3746 4);
3747 mask_bit = tic6x_encode_spmask (func_unit_base, func_unit_side);
3748 mask_bit <<= 18;
3749 if (spmask_opcode & mask_bit)
3750 as_bad (_("functional unit already masked"));
3751 spmask_opcode |= mask_bit;
3752 md_number_to_chars (seginfo->tc_segment_info_data.spmask_addr,
3753 spmask_opcode, 4);
3754 }
3755 }
3756
3757 record_alignment (now_seg, 5);
40b36596
JM		 3758 md_number_to_chars (output, opcode_value, 4);
3759 if (fix_needed)
d99e5b39 3760 tic6x_fix_new_exp (insn_frag, output - insn_frag->fr_literal, 4, fix_exp,
40b36596 3761 fix_pcrel, fx_r_type, fix_adda);
d99e5b39
JM		 3762 insn_frag->fr_fix += 4;
3763 insn_frag->fr_var -= 4;
40b36596
JM		 3764 seginfo->tc_segment_info_data.last_insn_lsb
3765 = (target_big_endian ? output + 3 : output);
3766 if (opct->flags & TIC6X_FLAG_SPMASK)
3767 seginfo->tc_segment_info_data.spmask_addr = output;
40b36596
JM		 3768}
3769
3770/* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3771 and the least significant BITS bits taken, at position POS. */
3772#define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3773 do { \
3774 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3775 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3776 } while (0)
3777
3778/* Apply a fixup to the object file. */
3779
3780void
3781md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3782{
3783 offsetT value = *valP;
3784 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3785
3786 value = SEXT (value);
3787 *valP = value;
3788
3789 fixP->fx_offset = SEXT (fixP->fx_offset);
3790
3791 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3792 fixP->fx_done = 1;
3793
3794 /* We do our own overflow checks. */
3795 fixP->fx_no_overflow = 1;
3796
3797 switch (fixP->fx_r_type)
3798 {
3799 case BFD_RELOC_NONE:
2fbb87f6 3800 case BFD_RELOC_C6000_EHTYPE:
40b36596
JM		 3801 /* Force output to the object file. */
3802 fixP->fx_done = 0;
3803 break;
3804
3805 case BFD_RELOC_32:
3806 if (fixP->fx_done || !seg->use_rela_p)
3807 md_number_to_chars (buf, value, 4);
3808 break;
3809
3810 case BFD_RELOC_16:
3811 if (fixP->fx_done || !seg->use_rela_p)
3812 {
3813 if (value < -0x8000 || value > 0xffff)
3814 as_bad_where (fixP->fx_file, fixP->fx_line,
3815 _("value too large for 2-byte field"));
3816 md_number_to_chars (buf, value, 2);
3817 }
3818 break;
3819
3820 case BFD_RELOC_8:
3821 if (fixP->fx_done || !seg->use_rela_p)
3822 {
3823 if (value < -0x80 || value > 0xff)
3824 as_bad_where (fixP->fx_file, fixP->fx_line,
3825 _("value too large for 1-byte field"));
3826 md_number_to_chars (buf, value, 1);
3827 }
3828 break;
3829
3830 case BFD_RELOC_C6000_ABS_S16:
3831 case BFD_RELOC_C6000_ABS_L16:
3832 case BFD_RELOC_C6000_SBR_S16:
3833 case BFD_RELOC_C6000_SBR_L16_B:
3834 case BFD_RELOC_C6000_SBR_L16_H:
3835 case BFD_RELOC_C6000_SBR_L16_W:
3836 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3837 if (fixP->fx_done || !seg->use_rela_p)
3838 {
3839 offsetT newval = md_chars_to_number (buf, 4);
41820509
JM		 3840 int shift;
3841
3842 switch (fixP->fx_r_type)
3843 {
3844 case BFD_RELOC_C6000_SBR_L16_H:
3845 shift = 1;
3846 break;
3847
3848 case BFD_RELOC_C6000_SBR_L16_W:
3849 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3850 shift = 2;
3851 break;
3852
3853 default:
3854 shift = 0;
3855 break;
3856 }
40b36596 3857
41820509 3858 MODIFY_VALUE (newval, value, shift, 7, 16);
40b36596
JM		 3859 if ((value < -0x8000 || value > 0x7fff)
3860 && (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16
3861 || fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16))
3862 as_bad_where (fixP->fx_file, fixP->fx_line,
3863 _("immediate offset out of range"));
3864
3865 md_number_to_chars (buf, newval, 4);
3866 }
3867 if (fixP->fx_done
3868 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_S16
3869 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_L16)
3870 abort ();
3871 break;
3872
3873 case BFD_RELOC_C6000_ABS_H16:
3874 case BFD_RELOC_C6000_SBR_H16_B:
3875 case BFD_RELOC_C6000_SBR_H16_H:
3876 case BFD_RELOC_C6000_SBR_H16_W:
3877 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3878 if (fixP->fx_done || !seg->use_rela_p)
3879 {
3880 offsetT newval = md_chars_to_number (buf, 4);
41820509
JM		 3881 int shift;
3882
3883 switch (fixP->fx_r_type)
3884 {
3885 case BFD_RELOC_C6000_SBR_H16_H:
3886 shift = 17;
3887 break;
3888
3889 case BFD_RELOC_C6000_SBR_H16_W:
3890 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3891 shift = 18;
3892 break;
40b36596 3893
41820509
JM		 3894 default:
3895 shift = 16;
3896 break;
3897 }
3898
3899 MODIFY_VALUE (newval, value, shift, 7, 16);
40b36596
JM		 3900
3901 md_number_to_chars (buf, newval, 4);
3902 }
3903 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_ABS_H16)
3904 abort ();
3905 break;
3906
4a732032
BS		 3907 case BFD_RELOC_C6000_PCR_H16:
3908 case BFD_RELOC_C6000_PCR_L16:
3909 if (fixP->fx_done || !seg->use_rela_p)
3910 {
3911 offsetT newval = md_chars_to_number (buf, 4);
3912 int shift = fixP->fx_r_type == BFD_RELOC_C6000_PCR_H16 ? 16 : 0;
3913
3914 MODIFY_VALUE (newval, value, shift, 7, 16);
3915
3916 md_number_to_chars (buf, newval, 4);
3917 }
3918 break;
3919
40b36596
JM		 3920 case BFD_RELOC_C6000_SBR_U15_B:
3921 if (fixP->fx_done || !seg->use_rela_p)
3922 {
3923 offsetT newval = md_chars_to_number (buf, 4);
3924
3925 MODIFY_VALUE (newval, value, 0, 8, 15);
3926 if (value < 0 || value > 0x7fff)
3927 as_bad_where (fixP->fx_file, fixP->fx_line,
3928 _("immediate offset out of range"));
3929
3930 md_number_to_chars (buf, newval, 4);
3931 }
3932 break;
3933
3934 case BFD_RELOC_C6000_SBR_U15_H:
3935 if (fixP->fx_done || !seg->use_rela_p)
3936 {
3937 offsetT newval = md_chars_to_number (buf, 4);
3938
3939 /* Constant ADDA operands, processed as constant when the
3940 instruction is parsed, are encoded as-is rather than
3941 shifted. If the operand of an ADDA instruction is now
3942 constant (for example, the difference between two labels
3943 found after the instruction), ensure it is encoded the
3944 same way it would have been if the constant value had
3945 been known when the instruction was parsed. */
3946 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3947 value <<= 1;
3948
3949 MODIFY_VALUE (newval, value, 1, 8, 15);
3950 if (value & 1)
3951 as_bad_where (fixP->fx_file, fixP->fx_line,
3952 _("immediate offset not 2-byte-aligned"));
3953 if (value < 0 || value > 0xfffe)
3954 as_bad_where (fixP->fx_file, fixP->fx_line,
3955 _("immediate offset out of range"));
3956
3957 md_number_to_chars (buf, newval, 4);
3958 }
3959 break;
3960
3961 case BFD_RELOC_C6000_SBR_U15_W:
3962 case BFD_RELOC_C6000_SBR_GOT_U15_W:
3963 if (fixP->fx_done || !seg->use_rela_p)
3964 {
3965 offsetT newval = md_chars_to_number (buf, 4);
3966
3967 /* Constant ADDA operands, processed as constant when the
3968 instruction is parsed, are encoded as-is rather than
3969 shifted. If the operand of an ADDA instruction is now
3970 constant (for example, the difference between two labels
3971 found after the instruction), ensure it is encoded the
3972 same way it would have been if the constant value had
3973 been known when the instruction was parsed. */
3974 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3975 value <<= 2;
3976
3977 MODIFY_VALUE (newval, value, 2, 8, 15);
3978 if (value & 3)
3979 as_bad_where (fixP->fx_file, fixP->fx_line,
3980 _("immediate offset not 4-byte-aligned"));
3981 if (value < 0 || value > 0x1fffc)
3982 as_bad_where (fixP->fx_file, fixP->fx_line,
3983 _("immediate offset out of range"));
3984
3985 md_number_to_chars (buf, newval, 4);
3986 }
3987 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_SBR_U15_W)
3988 abort ();
3989 break;
3990
3991 case BFD_RELOC_C6000_DSBT_INDEX:
3992 if (value != 0)
3993 as_bad_where (fixP->fx_file, fixP->fx_line,
3994 _("addend used with $DSBT_INDEX"));
3995 if (fixP->fx_done)
3996 abort ();
3997 break;
3998
3999 case BFD_RELOC_C6000_PCR_S21:
4000 if (fixP->fx_done || !seg->use_rela_p)
4001 {
4002 offsetT newval = md_chars_to_number (buf, 4);
4003
4004 MODIFY_VALUE (newval, value, 2, 7, 21);
4005
4006 if (value & 3)
4007 as_bad_where (fixP->fx_file, fixP->fx_line,
4008 _("PC-relative offset not 4-byte-aligned"));
4009 if (value < -0x400000 || value > 0x3ffffc)
4010 as_bad_where (fixP->fx_file, fixP->fx_line,
4011 _("PC-relative offset out of range"));
4012
4013 md_number_to_chars (buf, newval, 4);
4014 }
4015 break;
4016
4017 case BFD_RELOC_C6000_PCR_S12:
4018 if (fixP->fx_done || !seg->use_rela_p)
4019 {
4020 offsetT newval = md_chars_to_number (buf, 4);
4021
4022 MODIFY_VALUE (newval, value, 2, 16, 12);
4023
4024 if (value & 3)
4025 as_bad_where (fixP->fx_file, fixP->fx_line,
4026 _("PC-relative offset not 4-byte-aligned"));
4027 if (value < -0x2000 || value > 0x1ffc)
4028 as_bad_where (fixP->fx_file, fixP->fx_line,
4029 _("PC-relative offset out of range"));
4030
4031 md_number_to_chars (buf, newval, 4);
4032 }
4033 break;
4034
4035 case BFD_RELOC_C6000_PCR_S10:
4036 if (fixP->fx_done || !seg->use_rela_p)
4037 {
4038 offsetT newval = md_chars_to_number (buf, 4);
4039
4040 MODIFY_VALUE (newval, value, 2, 13, 10);
4041
4042 if (value & 3)
4043 as_bad_where (fixP->fx_file, fixP->fx_line,
4044 _("PC-relative offset not 4-byte-aligned"));
4045 if (value < -0x800 || value > 0x7fc)
4046 as_bad_where (fixP->fx_file, fixP->fx_line,
4047 _("PC-relative offset out of range"));
4048
4049 md_number_to_chars (buf, newval, 4);
4050 }
4051 break;
4052
4053 case BFD_RELOC_C6000_PCR_S7:
4054 if (fixP->fx_done || !seg->use_rela_p)
4055 {
4056 offsetT newval = md_chars_to_number (buf, 4);
4057
4058 MODIFY_VALUE (newval, value, 2, 16, 7);
4059
4060 if (value & 3)
4061 as_bad_where (fixP->fx_file, fixP->fx_line,
4062 _("PC-relative offset not 4-byte-aligned"));
4063 if (value < -0x100 || value > 0xfc)
4064 as_bad_where (fixP->fx_file, fixP->fx_line,
4065 _("PC-relative offset out of range"));
4066
4067 md_number_to_chars (buf, newval, 4);
4068 }
4069 break;
4070
1bce6bd8
PB		 4071 case BFD_RELOC_C6000_PREL31:
4072 /* Force output to the object file. */
4073 fixP->fx_done = 0;
4074 break;
4075
40b36596
JM		 4076 default:
4077 abort ();
4078 }
4079}
4080
4081/* Convert a floating-point number to target (IEEE) format. */
4082
4083char *
4084md_atof (int type, char *litP, int *sizeP)
4085{
4086 return ieee_md_atof (type, litP, sizeP, target_big_endian);
4087}
4088
d99e5b39
JM		 4089/* Adjust the frags in SECTION (see tic6x_end). */
4090
4091static void
4092tic6x_adjust_section (bfd *abfd ATTRIBUTE_UNUSED, segT section,
4093 void *dummy ATTRIBUTE_UNUSED)
4094{
4095 segment_info_type *info;
4096 frchainS *frchp;
4097 fragS *fragp;
4098 bfd_boolean have_code = FALSE;
4099 bfd_boolean have_non_code = FALSE;
4100
4101 info = seg_info (section);
4102 if (info == NULL)
4103 return;
4104
4105 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4106 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4107 switch (fragp->fr_type)
4108 {
4109 case rs_machine_dependent:
4110 if (fragp->tc_frag_data.is_insns)
4111 have_code = TRUE;
4112 break;
4113
4114 case rs_dummy:
4115 case rs_fill:
4116 if (fragp->fr_fix > 0)
4117 have_non_code = TRUE;
4118 break;
4119
4120 default:
4121 have_non_code = TRUE;
4122 break;
4123 }
4124
4125 /* Process alignment requirements in a code-only section. */
4126 if (have_code && !have_non_code)
4127 {
4128 /* If we need to insert an odd number of instructions to meet an
4129 alignment requirement, there must have been an odd number of
4130 instructions since the last 8-byte-aligned execute packet
4131 boundary. So there must have been an execute packet with an
4132 odd number (and so a number fewer than 8) of instructions
4133 into which we can insert a NOP without breaking any previous
4134 alignments.
4135
4136 If then we need to insert a number 2 mod 4 of instructions,
4137 the number of instructions since the last 16-byte-aligned
4138 execute packet boundary must be 2 mod 4. So between that
4139 boundary and the following 8-byte-aligned boundary there must
4140 either be at least one execute packet with 2-mod-4
4141 instructions, or at least two with an odd number of
4142 instructions; again, greedily inserting NOPs as soon as
4143 possible suffices to meet the alignment requirement.
4144
4145 If then we need to insert 4 instructions, we look between the
4146 last 32-byte-aligned boundary and the following
4147 16-byte-aligned boundary. The sizes of the execute packets
4148 in this range total 4 instructions mod 8, so again there is
4149 room for greedy insertion of NOPs to meet the alignment
4150 requirement, and before any intermediate point with 8-byte
4151 (2-instruction) alignment requirement the sizes of execute
4152 packets (and so the room for NOPs) will total 2 instructions
4153 mod 4 so greedy insertion will not break such alignments.
4154
4155 So we can always meet these alignment requirements by
4156 inserting NOPs in parallel with existing execute packets, and
4157 by induction the approach described above inserts the minimum
4158 number of such NOPs. */
4159
4160 /* The number of NOPs we are currently looking to insert, if we
4161 have gone back to insert NOPs. */
4162 unsigned int want_insert = 0;
4163
4164 /* Out of that number, the number inserted so far in the current
4165 stage of the above algorithm. */
4166 unsigned int want_insert_done_so_far = 0;
4167
4168 /* The position mod 32 at the start of the current frag. */
4169 unsigned int pos = 0;
4170
4171 /* The locations in the frag chain of the most recent frags at
4172 the start of which there is the given alignment. */
4173 frchainS *frchp_last32, *frchp_last16, *frchp_last8;
4174 fragS *fragp_last32, *fragp_last16, *fragp_last8;
4175 unsigned int pos_last32, pos_last16, pos_last8;
4176
4177 frchp_last32 = frchp_last16 = frchp_last8 = info->frchainP;
4178 fragp_last32 = fragp_last16 = fragp_last8 = info->frchainP->frch_root;
4179 pos_last32 = pos_last16 = pos_last8 = 0;
4180
4181 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4182 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4183 look_at_frag:
4184 {
4185 bfd_boolean go_back = FALSE;
4186 frchainS *frchp_next;
4187 fragS *fragp_next;
4188
4189 if (fragp->fr_type != rs_machine_dependent)
4190 continue;
4191
4192 if (fragp->tc_frag_data.is_insns
4193 && pos + fragp->fr_fix > 32
4194 && !fragp->tc_frag_data.can_cross_fp_boundary)
4195 {
4196 /* As described above, we should always have met an
4197 alignment requirement by the time we come back to
4198 it. */
4199 if (want_insert)
4200 abort ();
4201
4202 if (pos & 3)
4203 abort ();
4204 want_insert = (32 - pos) >> 2;
4205 if (want_insert > 7)
4206 abort ();
4207 want_insert_done_so_far = 0;
4208 go_back = TRUE;
4209 }
4210
4211 if (!fragp->tc_frag_data.is_insns)
4212 {
4213 unsigned int would_insert_bytes;
4214
4215 if (!(pos & ((1 << fragp->fr_offset) - 1)))
4216 /* This alignment requirement is already met. */
4217 continue;
4218
4219 /* As described above, we should always have met an
4220 alignment requirement by the time we come back to
4221 it. */
4222 if (want_insert)
4223 abort ();
4224
4225 /* We may not be able to meet this requirement within
4226 the given number of characters. */
4227 would_insert_bytes
4228 = ((1 << fragp->fr_offset)
4229 - (pos & ((1 << fragp->fr_offset) - 1)));
4230
4231 if (fragp->fr_subtype != 0
4232 && would_insert_bytes > fragp->fr_subtype)
4233 continue;
4234
4235 /* An unmet alignment must be 8, 16 or 32 bytes;
4236 smaller ones must always be met within code-only
4237 sections and larger ones cause the section not to
4238 be code-only. */
4239 if (fragp->fr_offset != 3
4240 && fragp->fr_offset != 4
4241 && fragp->fr_offset != 5)
4242 abort ();
4243
4244 if (would_insert_bytes & 3)
4245 abort ();
4246 want_insert = would_insert_bytes >> 2;
4247 if (want_insert > 7)
4248 abort ();
4249 want_insert_done_so_far = 0;
4250 go_back = TRUE;
4251 }
4252 else if (want_insert && !go_back)
4253 {
4254 unsigned int num_insns = fragp->fr_fix >> 2;
4255 unsigned int max_poss_nops = 8 - num_insns;
4256
4257 if (max_poss_nops)
4258 {
4259 unsigned int cur_want_nops, max_want_nops, do_nops, i;
4260
4261 if (want_insert & 1)
4262 cur_want_nops = 1;
4263 else if (want_insert & 2)
4264 cur_want_nops = 2;
4265 else if (want_insert & 4)
4266 cur_want_nops = 4;
4267 else
4268 abort ();
4269
4270 max_want_nops = cur_want_nops - want_insert_done_so_far;
4271
4272 do_nops = (max_poss_nops < max_want_nops
4273 ? max_poss_nops
4274 : max_want_nops);
4275 for (i = 0; i < do_nops; i++)
4276 {
4277 md_number_to_chars (fragp->fr_literal + fragp->fr_fix,
4278 0, 4);
4279 if (target_big_endian)
4280 fragp->fr_literal[fragp->fr_fix - 1] |= 0x1;
4281 else
4282 fragp->fr_literal[fragp->fr_fix - 4] |= 0x1;
4283 fragp->fr_fix += 4;
4284 fragp->fr_var -= 4;
4285 }
4286 want_insert_done_so_far += do_nops;
4287 if (want_insert_done_so_far == cur_want_nops)
4288 {
4289 want_insert -= want_insert_done_so_far;
4290 want_insert_done_so_far = 0;
4291 if (want_insert)
4292 go_back = TRUE;
4293 }
4294 }
4295 }
4296 if (go_back)
4297 {
4298 if (want_insert & 1)
4299 {
4300 frchp = frchp_last8;
4301 fragp = fragp_last8;
4302 pos = pos_last8;
4303 }
4304 else if (want_insert & 2)
4305 {
4306 frchp = frchp_last8 = frchp_last16;
4307 fragp = fragp_last8 = fragp_last16;
4308 pos = pos_last8 = pos_last16;
4309 }
4310 else if (want_insert & 4)
4311 {
4312 frchp = frchp_last8 = frchp_last16 = frchp_last32;
4313 fragp = fragp_last8 = fragp_last16 = fragp_last32;
4314 pos = pos_last8 = pos_last16 = pos_last32;
4315 }
4316 else
4317 abort ();
4318
4319 goto look_at_frag;
4320 }
4321
4322 /* Update current position for moving past a code
4323 frag. */
4324 pos += fragp->fr_fix;
4325 pos &= 31;
4326 frchp_next = frchp;
4327 fragp_next = fragp->fr_next;
4328 if (fragp_next == NULL)
4329 {
4330 frchp_next = frchp->frch_next;
4331 if (frchp_next != NULL)
4332 fragp_next = frchp_next->frch_root;
4333 }
4334 if (!(pos & 7))
4335 {
4336 frchp_last8 = frchp_next;
4337 fragp_last8 = fragp_next;
4338 pos_last8 = pos;
4339 }
4340 if (!(pos & 15))
4341 {
4342 frchp_last16 = frchp_next;
4343 fragp_last16 = fragp_next;
4344 pos_last16 = pos;
4345 }
4346 if (!(pos & 31))
4347 {
4348 frchp_last32 = frchp_next;
4349 fragp_last32 = fragp_next;
4350 pos_last32 = pos;
4351 }
4352 }
4353 }
4354
4355 /* Now convert the machine-dependent frags to machine-independent
4356 ones. */
4357 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4358 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4359 {
4360 if (fragp->fr_type == rs_machine_dependent)
4361 {
4362 if (fragp->tc_frag_data.is_insns)
4363 frag_wane (fragp);
4364 else
4365 {
4366 fragp->fr_type = rs_align_code;
4367 fragp->fr_var = 1;
4368 *fragp->fr_literal = 0;
4369 }
4370 }
4371 }
4372}
4373
4374/* Initialize the machine-dependent parts of a frag. */
4375
4376void
4377tic6x_frag_init (fragS *fragp)
4378{
4379 fragp->tc_frag_data.is_insns = FALSE;
4380 fragp->tc_frag_data.can_cross_fp_boundary = FALSE;
4381}
4382
59e6276b
JM		 4383/* Set an attribute if it has not already been set by the user. */
4384
4385static void
4386tic6x_set_attribute_int (int tag, int value)
4387{
4388 if (tag < 1
4389 || tag >= NUM_KNOWN_OBJ_ATTRIBUTES)
4390 abort ();
4391 if (!tic6x_attributes_set_explicitly[tag])
4392 bfd_elf_add_proc_attr_int (stdoutput, tag, value);
4393}
4394
4395/* Set object attributes deduced from the input file and command line
4396 rather than given explicitly. */
4397static void
4398tic6x_set_attributes (void)
4399{
75fa6dc1
JM		 4400 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
4401 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
59e6276b 4402
75fa6dc1 4403 tic6x_set_attribute_int (Tag_ISA, tic6x_arch_attribute);
b5593623 4404 tic6x_set_attribute_int (Tag_ABI_DSBT, tic6x_dsbt);
87779176
JM		 4405 tic6x_set_attribute_int (Tag_ABI_PID, tic6x_pid);
4406 tic6x_set_attribute_int (Tag_ABI_PIC, tic6x_pic);
59e6276b
JM		 4407}
4408
d99e5b39
JM		 4409/* Do machine-dependent manipulations of the frag chains after all
4410 input has been read and before the machine-independent sizing and
4411 relaxing. */
4412
4413void
4414tic6x_end (void)
4415{
59e6276b
JM		 4416 /* Set object attributes at this point if not explicitly set. */
4417 tic6x_set_attributes ();
4418
d99e5b39
JM		 4419 /* Meeting alignment requirements may require inserting NOPs in
4420 parallel in execute packets earlier in the segment. Future
4421 16-bit instruction generation involves whole-segment optimization
4422 to determine the best choice and ordering of 32-bit or 16-bit
4423 instructions. This doesn't fit will in the general relaxation
4424 framework, so handle alignment and 16-bit instruction generation
4425 here. */
4426 bfd_map_over_sections (stdoutput, tic6x_adjust_section, NULL);
4427}
4428
4429/* No machine-dependent frags at this stage; all converted in
4430 tic6x_end. */
40b36596
JM		 4431
4432void
4433md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED,
4434 fragS *fragp ATTRIBUTE_UNUSED)
4435{
4436 abort ();
4437}
4438
d99e5b39
JM		 4439/* No machine-dependent frags at this stage; all converted in
4440 tic6x_end. */
40b36596
JM		 4441
4442int
4443md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
4444 segT seg ATTRIBUTE_UNUSED)
4445{
4446 abort ();
4447}
4448
4449/* Put a number into target byte order. */
4450
4451void
4452md_number_to_chars (char *buf, valueT val, int n)
4453{
4454 if (target_big_endian)
4455 number_to_chars_bigendian (buf, val, n);
4456 else
4457 number_to_chars_littleendian (buf, val, n);
4458}
4459
4460/* Machine-dependent operand parsing not currently needed. */
4461
4462void
4463md_operand (expressionS *op ATTRIBUTE_UNUSED)
4464{
4465}
4466
4467/* PC-relative operands are relative to the start of the fetch
4468 packet. */
4469
4470long
41820509 4471tic6x_pcrel_from_section (fixS *fixp, segT sec)
40b36596 4472{
41820509
JM		 4473 if (fixp->fx_addsy != NULL
4474 && (!S_IS_DEFINED (fixp->fx_addsy)
4475 || S_GET_SEGMENT (fixp->fx_addsy) != sec))
4476 return 0;
40b36596
JM		 4477 return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f;
4478}
4479
4480/* Round up a section size to the appropriate boundary. */
4481
4482valueT
4483md_section_align (segT segment ATTRIBUTE_UNUSED,
4484 valueT size)
4485{
4486 /* Round up section sizes to ensure that text sections consist of
4487 whole fetch packets. */
4488 int align = bfd_get_section_alignment (stdoutput, segment);
4489 return ((size + (1 << align) - 1) & ((valueT) -1 << align));
4490}
4491
4492/* No special undefined symbol handling needed for now. */
4493
4494symbolS *
4495md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
4496{
4497 return NULL;
4498}
4499
4500/* Translate internal representation of relocation info to BFD target
4501 format. */
4502
4503arelent *
4504tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
4505{
4506 arelent *reloc;
ac145307 4507 asymbol *symbol;
40b36596
JM		 4508 bfd_reloc_code_real_type r_type;
4509
4510 reloc = xmalloc (sizeof (arelent));
4511 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
ac145307
BS		 4512 symbol = symbol_get_bfdsym (fixp->fx_addsy);
4513 *reloc->sym_ptr_ptr = symbol;
40b36596 4514 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
41820509 4515 reloc->addend = (tic6x_generate_rela ? fixp->fx_offset : 0);
40b36596
JM		 4516 r_type = fixp->fx_r_type;
4517 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
4518
4519 if (reloc->howto == NULL)
4520 {
4521 as_bad_where (fixp->fx_file, fixp->fx_line,
4522 _("Cannot represent relocation type %s"),
4523 bfd_get_reloc_code_name (r_type));
4524 return NULL;
4525 }
4526
41820509
JM		 4527 /* Correct for adjustments bfd_install_relocation will make. */
4528 if (reloc->howto->pcrel_offset && reloc->howto->partial_inplace)
ac145307
BS		 4529 {
4530 reloc->addend += reloc->address;
4531 if (!bfd_is_com_section (symbol))
4532 reloc->addend -= symbol->value;
4533 }
4a732032
BS		 4534 if (r_type == BFD_RELOC_C6000_PCR_H16
4535 || r_type == BFD_RELOC_C6000_PCR_L16)
4536 {
4537 symbolS *t = fixp->tc_fix_data.fix_subsy;
4538 segT sub_symbol_segment;
4539
4540 resolve_symbol_value (t);
4541 sub_symbol_segment = S_GET_SEGMENT (t);
4542 if (sub_symbol_segment == undefined_section)
4543 as_bad_where (fixp->fx_file, fixp->fx_line,
4544 _("undefined symbol %s in PCR relocation"),
4545 S_GET_NAME (t));
4546 else
4547 {
4548 reloc->addend = reloc->address & ~0x1F;
4549 reloc->addend -= S_GET_VALUE (t);
4550 }
4551 }
40b36596
JM		 4552 return reloc;
4553}
1bce6bd8
PB		 4554
4555/* Convert REGNAME to a DWARF-2 register number. */
4556
4557int
4558tic6x_regname_to_dw2regnum (char *regname)
4559{
4560 bfd_boolean reg_ok;
4561 tic6x_register reg;
4562 char *rq = regname;
4563
4564 reg_ok = tic6x_parse_register (&rq, &reg);
4565
4566 if (!reg_ok)
4567 return -1;
4568
4569 switch (reg.side)
4570 {
4571 case 1: /* A regs. */
4572 if (reg.num < 16)
4573 return reg.num;
4574 else if (reg.num < 32)
4575 return (reg.num - 16) + 37;
4576 else
4577 return -1;
4578
4579 case 2: /* B regs. */
4580 if (reg.num < 16)
4581 return reg.num + 16;
4582 else if (reg.num < 32)
4583 return (reg.num - 16) + 53;
4584 else
4585 return -1;
4586
4587 default:
4588 return -1;
4589 }
4590}
4591
4592/* Initialize the DWARF-2 unwind information for this procedure. */
4593
4594void
4595tic6x_frame_initial_instructions (void)
4596{
4597 /* CFA is initial stack pointer (B15). */
4598 cfi_add_CFA_def_cfa (31, 0);
4599}
4600
4601/* Start an exception table entry. If idx is nonzero this is an index table
4602 entry. */
4603
4604static void
4605tic6x_start_unwind_section (const segT text_seg, int idx)
4606{
4607 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4608 const char * text_name;
4609 const char * prefix;
4610 const char * prefix_once;
4611 const char * group_name;
4612 size_t prefix_len;
4613 size_t text_len;
4614 char * sec_name;
4615 size_t sec_name_len;
4616 int type;
4617 int flags;
4618 int linkonce;
4619
4620 if (idx)
4621 {
4622 prefix = ELF_STRING_C6000_unwind;
4623 prefix_once = ELF_STRING_C6000_unwind_once;
4624 type = SHT_C6000_UNWIND;
4625 }
4626 else
4627 {
4628 prefix = ELF_STRING_C6000_unwind_info;
4629 prefix_once = ELF_STRING_C6000_unwind_info_once;
4630 type = SHT_PROGBITS;
4631 }
4632
4633 text_name = segment_name (text_seg);
4634 if (streq (text_name, ".text"))
4635 text_name = "";
4636
4637 if (strncmp (text_name, ".gnu.linkonce.t.",
4638 strlen (".gnu.linkonce.t.")) == 0)
4639 {
4640 prefix = prefix_once;
4641 text_name += strlen (".gnu.linkonce.t.");
4642 }
4643
4644 prefix_len = strlen (prefix);
4645 text_len = strlen (text_name);
4646 sec_name_len = prefix_len + text_len;
4647 sec_name = (char *) xmalloc (sec_name_len + 1);
4648 memcpy (sec_name, prefix, prefix_len);
4649 memcpy (sec_name + prefix_len, text_name, text_len);
4650 sec_name[prefix_len + text_len] = '\0';
4651
4652 flags = SHF_ALLOC;
4653 linkonce = 0;
4654 group_name = 0;
4655
4656 /* Handle COMDAT group. */
4657 if (prefix != prefix_once && (text_seg->flags & SEC_LINK_ONCE) != 0)
4658 {
4659 group_name = elf_group_name (text_seg);
4660 if (group_name == NULL)
4661 {
4662 as_bad (_("group section `%s' has no group signature"),
4663 segment_name (text_seg));
4664 ignore_rest_of_line ();
4665 return;
4666 }
4667 flags |= SHF_GROUP;
4668 linkonce = 1;
4669 }
4670
4671 obj_elf_change_section (sec_name, type, flags, 0, group_name, linkonce, 0);
4672
4673 /* Set the section link for index tables. */
4674 if (idx)
4675 elf_linked_to_section (now_seg) = text_seg;
4676
4677 seg_info (now_seg)->tc_segment_info_data.text_unwind = unwind;
4678}
4679
4680
4681static const int
4682tic6x_unwind_frame_regs[TIC6X_NUM_UNWIND_REGS] =
4683/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */
4684 { 15, 31, 30, 29, 28, 27, 26, 19, 14, 13, 12, 11, 10 };
4685
4686/* Register save offsets for __c6xabi_push_rts. */
4687static const int
4688tic6x_pop_rts_offset_little[TIC6X_NUM_UNWIND_REGS] =
4689/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */
4690 { -1, 1, 0, -3, -4, -7, -8,-11, -2, -5, -6, -9,-10};
4691
4692static const int
4693tic6x_pop_rts_offset_big[TIC6X_NUM_UNWIND_REGS] =
4694/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */
4695 { -2, 1, 0, -4, -3, -8, -7,-12, -1, -6, -5,-10, -9};
4696
4697/* Map from dwarf register number to unwind frame register number. */
4698static int
4699tic6x_unwind_reg_from_dwarf (int dwarf)
4700{
4701 int reg;
4702
4703 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
4704 {
4705 if (tic6x_unwind_frame_regs[reg] == dwarf)
4706 return reg;
4707 }
4708
4709 return -1;
4710}
4711
4712/* Unwinding bytecode definitions. */
4713#define UNWIND_OP_ADD_SP 0x00
4714#define UNWIND_OP_ADD_SP2 0xd2
4715#define UNWIND_OP2_POP 0x8000
4716#define UNWIND_OP2_POP_COMPACT 0xa000
4717#define UNWIND_OP_POP_REG 0xc0
4718#define UNWIND_OP_MV_FP 0xd0
4719#define UNWIND_OP_POP_RTS 0xd1
4720#define UNWIND_OP_RET 0xe0
4721
4722/* Maximum stack adjustment for __c6xabi_unwind_cpp_pr3/4 */
4723#define MAX_COMPACT_SP_OFFSET (0x7f << 3)
4724
4725static void
4726tic6x_flush_unwind_word (valueT data)
4727{
4728 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4729 char *ptr;
4730
4731 /* Create EXTAB entry if it does not exist. */
4732 if (unwind->table_entry == NULL)
4733 {
4734 tic6x_start_unwind_section (unwind->saved_seg, 0);
4735 frag_align (2, 0, 0);
4736 record_alignment (now_seg, 2);
4737 unwind->table_entry = expr_build_dot ();
4738 ptr = frag_more (4);
4739 unwind->frag_start = ptr;
4740 }
4741 else
4742 {
4743 /* Append additional word of data. */
4744 ptr = frag_more (4);
4745 }
4746
4747 md_number_to_chars (ptr, data, 4);
4748}
4749
4750/* Add a single byte of unwinding data. */
4751
4752static void
4753tic6x_unwind_byte (int byte)
4754{
4755 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4756
4757 unwind->data_bytes++;
4758 /* Only flush the first word after we know multiple words are required. */
4759 if (unwind->data_bytes == 5)
4760 {
4761 if (unwind->personality_index == -1)
4762 {
4763 /* At this point we know we are too big for pr0. */
4764 unwind->personality_index = 1;
4765 tic6x_flush_unwind_word (0x81000000 | ((unwind->data >> 8) & 0xffff));
4766 unwind->data = ((unwind->data & 0xff) << 8) | byte;
4767 unwind->data_bytes++;
4768 }
4769 else
4770 {
4771 tic6x_flush_unwind_word (unwind->data);
4772 unwind->data = byte;
4773 }
4774 }
4775 else
4776 {
4777 unwind->data = (unwind->data << 8) | byte;
4778 if ((unwind->data_bytes & 3) == 0 && unwind->data_bytes > 4)
4779 {
4780 tic6x_flush_unwind_word (unwind->data);
4781 unwind->data = 0;
4782 }
4783 }
4784}
4785
4786/* Add a two-byte unwinding opcode. */
4787static void
4788tic6x_unwind_2byte (int bytes)
4789{
4790 tic6x_unwind_byte (bytes >> 8);
4791 tic6x_unwind_byte (bytes & 0xff);
4792}
4793
4794static void
4795tic6x_unwind_uleb (offsetT offset)
4796{
4797 while (offset > 0x7f)
4798 {
4799 tic6x_unwind_byte ((offset & 0x7f) | 0x80);
4800 offset >>= 7;
4801 }
4802 tic6x_unwind_byte (offset);
4803}
4804
4805void
4806tic6x_cfi_startproc (void)
4807{
4808 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4809
4810 unwind->personality_index = -1;
4811 unwind->personality_routine = NULL;
4812 if (unwind->table_entry)
4813 as_bad (_("missing .endp before .cfi_startproc"));
4814
4815 unwind->table_entry = NULL;
4816 unwind->data_bytes = -1;
4817}
4818
4819static void
4820tic6x_output_exidx_entry (void)
4821{
4822 char *ptr;
4823 long where;
4824 unsigned int marked_pr_dependency;
4825 segT old_seg;
4826 subsegT old_subseg;
4827 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4828
4829 old_seg = now_seg;
4830 old_subseg = now_subseg;
4831
4832 /* Add index table entry. This is two words. */
4833 tic6x_start_unwind_section (unwind->saved_seg, 1);
4834 frag_align (2, 0, 0);
4835 record_alignment (now_seg, 2);
4836
4837 ptr = frag_more (8);
4838 where = frag_now_fix () - 8;
4839
4840 /* Self relative offset of the function start. */
4841 fix_new (frag_now, where, 4, unwind->function_start, 0, 1,
4842 BFD_RELOC_C6000_PREL31);
4843
4844 /* Indicate dependency on ABI-defined personality routines to the
4845 linker, if it hasn't been done already. */
4846 marked_pr_dependency
4847 = seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency;
4848 if (unwind->personality_index >= 0 && unwind->personality_index < 5
4849 && !(marked_pr_dependency & (1 << unwind->personality_index)))
4850 {
4851 static const char *const name[] =
4852 {
4853 "__c6xabi_unwind_cpp_pr0",
4854 "__c6xabi_unwind_cpp_pr1",
4855 "__c6xabi_unwind_cpp_pr2",
4856 "__c6xabi_unwind_cpp_pr3",
4857 "__c6xabi_unwind_cpp_pr4"
4858 };
4859 symbolS *pr = symbol_find_or_make (name[unwind->personality_index]);
4860 fix_new (frag_now, where, 0, pr, 0, 1, BFD_RELOC_NONE);
4861 seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency
4862 |= 1 << unwind->personality_index;
4863 }
4864
4865 if (unwind->table_entry)
4866 {
4867 /* Self relative offset of the table entry. */
4868 fix_new (frag_now, where + 4, 4, unwind->table_entry, 0, 1,
4869 BFD_RELOC_C6000_PREL31);
4870 }
4871 else
4872 {
4873 /* Inline exception table entry. */
4874 md_number_to_chars (ptr + 4, unwind->data, 4);
4875 }
4876
4877 /* Restore the original section. */
4878 subseg_set (old_seg, old_subseg);
4879}
4880
4881static void
4882tic6x_output_unwinding (bfd_boolean need_extab)
4883{
4884 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4885 unsigned safe_mask = unwind->safe_mask;
4886 unsigned compact_mask = unwind->compact_mask;
4887 unsigned reg_saved_mask = unwind->reg_saved_mask;
4888 offsetT cfa_offset = unwind->cfa_offset;
4889 long where;
4890 int reg;
4891
4892 if (unwind->personality_index == -2)
4893 {
4894 /* Function can not be unwound. */
4895 unwind->data = 1;
4896 tic6x_output_exidx_entry ();
4897 return;
4898 }
4899
4900 if (unwind->personality_index == -1 && unwind->personality_routine == NULL)
4901 {
4902 /* Auto-select a personality routine if none specified. */
4903 if (reg_saved_mask || cfa_offset >= MAX_COMPACT_SP_OFFSET)
4904 unwind->personality_index = -1;
4905 else if (safe_mask)
4906 unwind->personality_index = 3;
4907 else
4908 unwind->personality_index = 4;
4909 }
4910
4911 /* Calculate unwinding opcodes, and emit to EXTAB if necessary. */
4912 unwind->table_entry = NULL;
4913 if (unwind->personality_index == 3 || unwind->personality_index == 4)
4914 {
4915 if (cfa_offset >= MAX_COMPACT_SP_OFFSET)
4916 {
4917 as_bad (_("stack pointer offset too large for personality routine"));
4918 return;
4919 }
4920 if (reg_saved_mask
4921 || (unwind->personality_index == 3 && compact_mask != 0)
4922 || (unwind->personality_index == 4 && safe_mask != 0))
4923 {
4924 as_bad (_("stack frame layout does not match personality routine"));
4925 return;
4926 }
4927
4928 unwind->data = (1u << 31) | (unwind->personality_index << 24);
4929 if (unwind->cfa_reg == 15)
4930 unwind->data |= 0x7f << 17;
4931 else
4932 unwind->data |= cfa_offset << (17 - 3);
4933
4934 if (unwind->personality_index == 3)
4935 unwind->data |= safe_mask << 4;
4936 else
4937 unwind->data |= compact_mask << 4;
4938 unwind->data |= unwind->return_reg;
4939 unwind->data_bytes = 4;
4940 }
4941 else
4942 {
4943 if (unwind->personality_routine)
4944 {
4945 unwind->data = 0;
4946 unwind->data_bytes = 5;
4947 tic6x_flush_unwind_word (0);
4948 /* First word is personality routine. */
4949 where = frag_now_fix () - 4;
4950 fix_new (frag_now, where, 4, unwind->personality_routine, 0, 1,
4951 BFD_RELOC_C6000_PREL31);
4952 }
4953 else if (unwind->personality_index > 0)
4954 {
4955 unwind->data = 0x8000 | (unwind->personality_index << 8);
4956 unwind->data_bytes = 2;
4957 }
4958 else /* pr0 or undecided */
4959 {
4960 unwind->data = 0x80;
4961 unwind->data_bytes = 1;
4962 }
4963
4964 if (unwind->return_reg != UNWIND_B3)
4965 {
4966 tic6x_unwind_byte (UNWIND_OP_RET | unwind->return_reg);
4967 }
4968
4969 if (unwind->cfa_reg == 15)
4970 {
4971 tic6x_unwind_byte (UNWIND_OP_MV_FP);
4972 }
4973 else if (cfa_offset != 0)
4974 {
4975 cfa_offset >>= 3;
4976 if (cfa_offset > 0x80)
4977 {
4978 tic6x_unwind_byte (UNWIND_OP_ADD_SP2);
4979 tic6x_unwind_uleb (cfa_offset - 0x81);
4980 }
4981 else if (cfa_offset > 0x40)
4982 {
4983 tic6x_unwind_byte (UNWIND_OP_ADD_SP | 0x3f);
4984 tic6x_unwind_byte (UNWIND_OP_ADD_SP | (cfa_offset - 0x40));
4985 }
4986 else
4987 {
4988 tic6x_unwind_byte (UNWIND_OP_ADD_SP | (cfa_offset - 1));
4989 }
4990 }
4991
4992 if (safe_mask)
4993 tic6x_unwind_2byte (UNWIND_OP2_POP | unwind->safe_mask);
4994 else if (unwind->pop_rts)
4995 tic6x_unwind_byte (UNWIND_OP_POP_RTS);
4996 else if (compact_mask)
4997 tic6x_unwind_2byte (UNWIND_OP2_POP_COMPACT | unwind->compact_mask);
4998 else if (reg_saved_mask)
4999 {
5000 offsetT cur_offset;
5001 int val;
5002 int last_val;
5003
5004 tic6x_unwind_byte (UNWIND_OP_POP_REG | unwind->saved_reg_count);
5005 last_val = 0;
5006 for (cur_offset = 0; unwind->saved_reg_count > 0; cur_offset -= 4)
5007 {
5008 val = 0xf;
5009 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5010 {
5011 if (!unwind->reg_saved[reg])
5012 continue;
5013
5014 if (unwind->reg_offset[reg] == cur_offset)
5015 {
5016 unwind->saved_reg_count--;
5017 val = reg;
5018 break;
5019 }
5020 }
5021 if ((cur_offset & 4) == 4)
5022 tic6x_unwind_byte ((last_val << 4) | val);
5023 else
5024 last_val = val;
5025 }
5026 if ((cur_offset & 4) == 4)
5027 tic6x_unwind_byte ((last_val << 4) | 0xf);
5028 }
5029
5030 /* Pad with RETURN opcodes. */
5031 while ((unwind->data_bytes & 3) != 0)
5032 tic6x_unwind_byte (UNWIND_OP_RET | UNWIND_B3);
5033
5034 if (unwind->personality_index == -1 && unwind->personality_routine == NULL)
5035 unwind->personality_index = 0;
5036 }
5037
5038 /* Force creation of an EXTAB entry if an LSDA is required. */
5039 if (need_extab && !unwind->table_entry)
5040 {
5041 if (unwind->data_bytes != 4)
5042 abort ();
5043
5044 tic6x_flush_unwind_word (unwind->data);
5045 }
5046 else if (unwind->table_entry && !need_extab)
5047 {
5048 /* Add an empty descriptor if there is no user-specified data. */
5049 char *ptr = frag_more (4);
5050 md_number_to_chars (ptr, 0, 4);
5051 }
5052
5053 /* Fill in length of unwinding bytecode. */
5054 if (unwind->table_entry)
5055 {
5056 valueT tmp;
5057 if (unwind->data_bytes > 0x400)
5058 as_bad (_("too many unwinding instructions"));
5059
5060 if (unwind->personality_index == -1)
5061 {
5062 tmp = md_chars_to_number (unwind->frag_start + 4, 4);
5063 tmp |= ((unwind->data_bytes - 8) >> 2) << 24;
5064 md_number_to_chars (unwind->frag_start + 4, tmp, 4);
5065 }
5066 else if (unwind->personality_index == 1 || unwind->personality_index == 2)
5067 {
5068 tmp = md_chars_to_number (unwind->frag_start, 4);
5069 tmp |= ((unwind->data_bytes - 4) >> 2) << 16;
5070 md_number_to_chars (unwind->frag_start, tmp, 4);
5071 }
5072 }
5073 tic6x_output_exidx_entry ();
5074}
5075
5076/* FIXME: This will get horribly confused if cfi directives are emitted for
5077 function epilogue. */
5078void
5079tic6x_cfi_endproc (struct fde_entry *fde)
5080{
5081 tic6x_unwind_info *unwind = tic6x_get_unwind ();
5082 struct cfi_insn_data *insn;
5083 int reg;
5084 unsigned safe_mask = 0;
5085 unsigned compact_mask = 0;
5086 unsigned reg_saved_mask = 0;
5087 offsetT cfa_offset = 0;
5088 offsetT save_offset = 0;
5089
5090 unwind->cfa_reg = 31;
5091 unwind->return_reg = UNWIND_B3;
5092 unwind->saved_reg_count = 0;
5093 unwind->pop_rts = FALSE;
5094
5095 unwind->saved_seg = now_seg;
5096 unwind->saved_subseg = now_subseg;
5097
5098 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5099 unwind->reg_saved[reg] = FALSE;
5100
5101 /* Scan FDE instructions to build up stack frame layout. */
5102 for (insn = fde->data; insn; insn = insn->next)
5103 {
5104 switch (insn->insn)
5105 {
5106 case DW_CFA_advance_loc:
5107 break;
5108
5109 case DW_CFA_def_cfa:
5110 unwind->cfa_reg = insn->u.ri.reg;
5111 cfa_offset = insn->u.ri.offset;
5112 break;
5113
5114 case DW_CFA_def_cfa_register:
5115 unwind->cfa_reg = insn->u.r;
5116 break;
5117
5118 case DW_CFA_def_cfa_offset:
5119 cfa_offset = insn->u.i;
5120 break;
5121
5122 case DW_CFA_undefined:
5123 case DW_CFA_same_value:
5124 reg = tic6x_unwind_reg_from_dwarf (insn->u.r);
5125 if (reg >= 0)
5126 unwind->reg_saved[reg] = FALSE;
5127 break;
5128
5129 case DW_CFA_offset:
5130 reg = tic6x_unwind_reg_from_dwarf (insn->u.ri.reg);
5131 if (reg < 0)
5132 {
5133 as_bad (_("unable to generate unwinding opcode for reg %d"),
5134 insn->u.ri.reg);
5135 return;
5136 }
5137 unwind->reg_saved[reg] = TRUE;
5138 unwind->reg_offset[reg] = insn->u.ri.offset;
5139 if (insn->u.ri.reg == UNWIND_B3)
5140 unwind->return_reg = UNWIND_B3;
5141 break;
5142
5143 case DW_CFA_register:
5144 if (insn->u.rr.reg1 != 19)
5145 {
5146 as_bad (_("unable to generate unwinding opcode for reg %d"),
5147 insn->u.rr.reg1);
5148 return;
5149 }
5150
5151 reg = tic6x_unwind_reg_from_dwarf (insn->u.rr.reg2);
5152 if (reg < 0)
5153 {
5154 as_bad (_("unable to generate unwinding opcode for reg %d"),
5155 insn->u.rr.reg2);
5156 return;
5157 }
5158
5159 unwind->return_reg = reg;
5160 unwind->reg_saved[UNWIND_B3] = FALSE;
5161 if (unwind->reg_saved[reg])
5162 {
5163 as_bad (_("unable to restore return address from "
5164 "previously restored reg"));
5165 return;
5166 }
5167 break;
5168
5169 case DW_CFA_restore:
5170 case DW_CFA_remember_state:
5171 case DW_CFA_restore_state:
5172 case DW_CFA_GNU_window_save:
5173 case CFI_escape:
5174 case CFI_val_encoded_addr:
5175 as_bad (_("unhandled CFA insn for unwinding (%d)"), insn->insn);
5176 break;
5177
5178 default:
5179 abort ();
5180 }
5181 }
5182
5183 if (unwind->cfa_reg != 15 && unwind->cfa_reg != 31)
5184 {
5185 as_bad (_("unable to generate unwinding opcode for frame pointer reg %d"),
5186 unwind->cfa_reg);
5187 return;
5188 }
5189
5190 if (unwind->cfa_reg == 15)
5191 {
5192 if (cfa_offset != 0)
5193 {
5194 as_bad (_("unable to generate unwinding opcode for "
5195 "frame pointer offset"));
5196 return;
5197 }
5198 }
5199 else
5200 {
5201 if ((cfa_offset & 7) != 0)
5202 {
5203 as_bad (_("unwound stack pointer not doubleword aligned"));
5204 return;
5205 }
5206 }
5207
5208 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5209 {
5210 if (unwind->reg_saved[reg])
5211 reg_saved_mask |= 1 << (TIC6X_NUM_UNWIND_REGS - (reg + 1));
5212 }
5213
5214 /* Check for standard "safe debug" frame layout */
5215 if (reg_saved_mask)
5216 {
5217 save_offset = 0;
5218 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5219 {
5220 if (!unwind->reg_saved[reg])
5221 continue;
5222
5223 if (target_big_endian
5224 && reg < TIC6X_NUM_UNWIND_REGS - 1
5225 && unwind->reg_saved[reg + 1]
5226 && tic6x_unwind_frame_regs[reg]
5227 == tic6x_unwind_frame_regs[reg + 1] + 1
5228 && (tic6x_unwind_frame_regs[reg] & 1) == 1
5229 && (save_offset & 4) == 4)
5230 {
5231 /* Swapped pair */
5232 if (save_offset != unwind->reg_offset[reg + 1]
5233 || save_offset - 4 != unwind->reg_offset[reg])
5234 break;
5235 save_offset -= 8;
5236 reg++;
5237 }
5238 else
5239 {
5240 if (save_offset != unwind->reg_offset[reg])
5241 break;
5242 save_offset -= 4;
5243 }
5244 }
5245 if (reg == TIC6X_NUM_UNWIND_REGS)
5246 {
5247 safe_mask = reg_saved_mask;
5248 reg_saved_mask = 0;
5249 }
5250 }
5251
5252 /* Check for compact frame layout. */
5253 if (reg_saved_mask)
5254 {
5255 save_offset = 0;
5256 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5257 {
5258 int reg2;
5259
5260 if (!unwind->reg_saved[reg])
5261 continue;
5262
5263 if (reg < TIC6X_NUM_UNWIND_REGS - 1)
5264 {
5265 reg2 = reg + 1;
5266
5267 if (!unwind->reg_saved[reg2]
5268 || tic6x_unwind_frame_regs[reg]
5269 != tic6x_unwind_frame_regs[reg2] + 1
5270 || (tic6x_unwind_frame_regs[reg2] & 1) != 0
5271 || save_offset == 0)
5272 reg2 = -1;
5273 }
5274 else
5275 reg2 = -1;
5276
5277 if (reg2 >= 0)
5278 {
5279 int high_offset;
5280 if (target_big_endian)
5281 high_offset = 4; /* lower address = positive stack offset. */
5282 else
5283 high_offset = 0;
5284
5285 if (save_offset + 4 - high_offset != unwind->reg_offset[reg]
5286 || save_offset + high_offset != unwind->reg_offset[reg2])
5287 {
5288 break;
5289 }
5290 reg++;
5291 }
5292 else
5293 {
5294 if (save_offset != unwind->reg_offset[reg])
5295 break;
5296 }
5297 save_offset -= 8;
5298 }
5299
5300 if (reg == TIC6X_NUM_UNWIND_REGS)
5301 {
5302 compact_mask = reg_saved_mask;
5303 reg_saved_mask = 0;
5304 }
5305 }
5306
5307 /* Check for __c6xabi_pop_rts format */
5308 if (reg_saved_mask == 0x17ff)
5309 {
5310 const int *pop_rts_offset = target_big_endian
5311 ? tic6x_pop_rts_offset_big
5312 : tic6x_pop_rts_offset_little;
5313
5314 save_offset = 0;
5315 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5316 {
5317 if (reg == UNWIND_B15)
5318 continue;
5319
5320 if (unwind->reg_offset[reg] != pop_rts_offset[reg] * 4)
5321 break;
5322 }
5323
5324 if (reg == TIC6X_NUM_UNWIND_REGS)
5325 {
5326 unwind->pop_rts = TRUE;
5327 reg_saved_mask = 0;
5328 }
5329 }
5330 /* If all else fails then describe the frame manually. */
5331 if (reg_saved_mask)
5332 {
5333 save_offset = 0;
5334
5335 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5336 {
5337 if (!unwind->reg_saved[reg])
5338 continue;
5339
5340 unwind->saved_reg_count++;
5341 /* Encoding uses 4 bits per word, so size of unwinding opcode data
5342 limits the save area size. The exact cap will be figured out
5343 later due to overflow, the 0x800 here is just a quick sanity
5344 check to weed out obviously excessive offsets. */
5345 if (unwind->reg_offset[reg] > 0 || unwind->reg_offset[reg] < -0x800
5346 || (unwind->reg_offset[reg] & 3) != 0)
5347 {
5348 as_bad (_("stack frame layout too complex for unwinder"));
5349 return;
5350 }
5351
5352 if (unwind->reg_offset[reg] < save_offset)
5353 save_offset = unwind->reg_offset[reg] - 4;
5354 }
5355 }
5356
5357 /* Align to 8-byte boundary (stack grows towards negative offsets). */
5358 save_offset &= ~7;
5359
5360 if (unwind->cfa_reg == 31 && !reg_saved_mask)
5361 {
5362 cfa_offset += save_offset;
5363 if (cfa_offset < 0)
5364 {
5365 as_bad (_("unwound frame has negative size"));
5366 return;
5367 }
5368 }
5369
5370 unwind->safe_mask = safe_mask;
5371 unwind->compact_mask = compact_mask;
5372 unwind->reg_saved_mask = reg_saved_mask;
5373 unwind->cfa_offset = cfa_offset;
5374 unwind->function_start = fde->start_address;
5375}
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