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252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
310b5aa2 2 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include <stdio.h>
22#include <ctype.h>
23#include "as.h"
24#include "subsegs.h"
25#include "opcode/v850.h"
26
27#define AREA_ZDA 0
28#define AREA_SDA 1
29#define AREA_TDA 2
30
31/* sign-extend a 16-bit number */
32#define SEXT16(x) ((((x) & 0xffff) ^ (~ 0x7fff)) + 0x8000)
33
34/* Temporarily holds the reloc in a cons expression. */
35static bfd_reloc_code_real_type hold_cons_reloc;
36
37/* Set to TRUE if we want to be pedantic about signed overflows. */
38static boolean warn_signed_overflows = FALSE;
39static boolean warn_unsigned_overflows = FALSE;
40
41/* Indicates the target BFD machine number. */
42static int machine = -1;
43
44/* Indicates the target processor(s) for the assemble. */
5480ccf3 45static int processor_mask = -1;
252b5132
RH
46
47\f
48/* Structure to hold information about predefined registers. */
49struct reg_name
50{
51 const char * name;
52 int value;
53};
54
55/* Generic assembler global variables which must be defined by all targets. */
56
57/* Characters which always start a comment. */
58const char comment_chars[] = "#";
59
60/* Characters which start a comment at the beginning of a line. */
61const char line_comment_chars[] = ";#";
62
63/* Characters which may be used to separate multiple commands on a
64 single line. */
65const char line_separator_chars[] = ";";
66
67/* Characters which are used to indicate an exponent in a floating
68 point number. */
69const char EXP_CHARS[] = "eE";
70
71/* Characters which mean that a number is a floating point constant,
72 as in 0d1.0. */
73const char FLT_CHARS[] = "dD";
74\f
75
76const relax_typeS md_relax_table[] =
77{
78 /* Conditional branches. */
79 {0xff, -0x100, 2, 1},
80 {0x1fffff, -0x200000, 6, 0},
81 /* Unconditional branches. */
82 {0xff, -0x100, 2, 3},
83 {0x1fffff, -0x200000, 4, 0},
84};
85
86
87static segT sdata_section = NULL;
88static segT tdata_section = NULL;
89static segT zdata_section = NULL;
90static segT sbss_section = NULL;
91static segT tbss_section = NULL;
92static segT zbss_section = NULL;
93static segT rosdata_section = NULL;
94static segT rozdata_section = NULL;
95static segT scommon_section = NULL;
96static segT tcommon_section = NULL;
97static segT zcommon_section = NULL;
98static segT call_table_data_section = NULL;
99static segT call_table_text_section = NULL;
100
101/* fixups */
102#define MAX_INSN_FIXUPS (5)
103struct v850_fixup
104{
105 expressionS exp;
106 int opindex;
107 bfd_reloc_code_real_type reloc;
108};
109
110struct v850_fixup fixups [MAX_INSN_FIXUPS];
111static int fc;
112
113\f
114void
5480ccf3 115v850_sdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
116{
117 obj_elf_section_change_hook();
118
119 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
120
121 demand_empty_rest_of_line ();
122}
123
124void
5480ccf3 125v850_tdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
126{
127 obj_elf_section_change_hook();
128
129 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
130
131 demand_empty_rest_of_line ();
132}
133
134void
5480ccf3 135v850_zdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
136{
137 obj_elf_section_change_hook();
138
139 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
140
141 demand_empty_rest_of_line ();
142}
143
144void
5480ccf3 145v850_sbss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
146{
147 obj_elf_section_change_hook();
148
149 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
150
151 demand_empty_rest_of_line ();
152}
153
154void
5480ccf3 155v850_tbss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
156{
157 obj_elf_section_change_hook();
158
159 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
160
161 demand_empty_rest_of_line ();
162}
163
164void
5480ccf3 165v850_zbss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
166{
167 obj_elf_section_change_hook();
168
169 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
170
171 demand_empty_rest_of_line ();
172}
173
174void
5480ccf3 175v850_rosdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
176{
177 obj_elf_section_change_hook();
178
179 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
180
181 demand_empty_rest_of_line ();
182}
183
184void
5480ccf3 185v850_rozdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
186{
187 obj_elf_section_change_hook();
188
189 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
190
191 demand_empty_rest_of_line ();
192}
193
194void
5480ccf3 195v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
196{
197 obj_elf_section_change_hook();
198
199 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
200
201 demand_empty_rest_of_line ();
202}
203
204void
5480ccf3 205v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
206{
207 obj_elf_section_change_hook();
208
209 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
210
211 demand_empty_rest_of_line ();
212}
213
214void
5480ccf3 215v850_bss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
216{
217 register int temp = get_absolute_expression ();
218
219 obj_elf_section_change_hook();
220
221 subseg_set (bss_section, (subsegT) temp);
222
223 demand_empty_rest_of_line ();
224}
225
226void
5480ccf3 227v850_offset (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
228{
229 int temp = get_absolute_expression ();
230
231 temp -= frag_now_fix();
232
233 if (temp > 0)
234 (void) frag_more (temp);
235
236 demand_empty_rest_of_line ();
237}
238
239/* Copied from obj_elf_common() in gas/config/obj-elf.c */
240static void
241v850_comm (area)
242 int area;
243{
244 char * name;
245 char c;
246 char * p;
247 int temp;
5480ccf3 248 unsigned int size;
252b5132
RH
249 symbolS * symbolP;
250 int have_align;
251
252 name = input_line_pointer;
253 c = get_symbol_end ();
254
255 /* just after name is now '\0' */
256 p = input_line_pointer;
257 *p = c;
258
259 SKIP_WHITESPACE ();
260
261 if (*input_line_pointer != ',')
262 {
263 as_bad (_("Expected comma after symbol-name"));
264 ignore_rest_of_line ();
265 return;
266 }
267
268 input_line_pointer ++; /* skip ',' */
269
270 if ((temp = get_absolute_expression ()) < 0)
271 {
272 /* xgettext:c-format */
273 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
274 ignore_rest_of_line ();
275 return;
276 }
277
278 size = temp;
279 *p = 0;
280 symbolP = symbol_find_or_make (name);
281 *p = c;
282
283 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
284 {
285 as_bad (_("Ignoring attempt to re-define symbol"));
286 ignore_rest_of_line ();
287 return;
288 }
289
290 if (S_GET_VALUE (symbolP) != 0)
291 {
292 if (S_GET_VALUE (symbolP) != size)
293 {
294 /* xgettext:c-format */
295 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
296 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
297 }
298 }
299
7dcc9865 300 know (symbol_get_frag (symbolP) == & zero_address_frag);
252b5132
RH
301
302 if (*input_line_pointer != ',')
303 have_align = 0;
304 else
305 {
306 have_align = 1;
307 input_line_pointer++;
308 SKIP_WHITESPACE ();
309 }
310
311 if (! have_align || *input_line_pointer != '"')
312 {
313 if (! have_align)
314 temp = 0;
315 else
316 {
317 temp = get_absolute_expression ();
318
319 if (temp < 0)
320 {
321 temp = 0;
322 as_warn (_("Common alignment negative; 0 assumed"));
323 }
324 }
325
cac58fa6 326 if (symbol_get_obj (symbolP)->local)
252b5132
RH
327 {
328 segT old_sec;
329 int old_subsec;
330 char * pfrag;
331 int align;
332 flagword applicable;
333
334 old_sec = now_seg;
335 old_subsec = now_subseg;
336
337 applicable = bfd_applicable_section_flags (stdoutput);
338
339 applicable &= SEC_ALLOC;
340
341 switch (area)
342 {
343 case AREA_SDA:
344 if (sbss_section == NULL)
345 {
346 sbss_section = subseg_new (".sbss", 0);
347
348 bfd_set_section_flags (stdoutput, sbss_section, applicable);
349
350 seg_info (sbss_section)->bss = 1;
351 }
352 break;
353
354 case AREA_ZDA:
355 if (zbss_section == NULL)
356 {
357 zbss_section = subseg_new (".zbss", 0);
358
359 bfd_set_section_flags (stdoutput, sbss_section, applicable);
360
361 seg_info (zbss_section)->bss = 1;
362 }
363 break;
364
365 case AREA_TDA:
366 if (tbss_section == NULL)
367 {
368 tbss_section = subseg_new (".tbss", 0);
369
370 bfd_set_section_flags (stdoutput, tbss_section, applicable);
371
372 seg_info (tbss_section)->bss = 1;
373 }
374 break;
375 }
376
377 if (temp)
378 {
379 /* convert to a power of 2 alignment */
380 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
381 ;
382
383 if (temp != 1)
384 {
385 as_bad (_("Common alignment not a power of 2"));
386 ignore_rest_of_line ();
387 return;
388 }
389 }
390 else
391 align = 0;
392
393 switch (area)
394 {
395 case AREA_SDA:
396 record_alignment (sbss_section, align);
397 obj_elf_section_change_hook();
398 subseg_set (sbss_section, 0);
399 break;
400
401 case AREA_ZDA:
402 record_alignment (zbss_section, align);
403 obj_elf_section_change_hook();
404 subseg_set (zbss_section, 0);
405 break;
406
407 case AREA_TDA:
408 record_alignment (tbss_section, align);
409 obj_elf_section_change_hook();
410 subseg_set (tbss_section, 0);
411 break;
412
413 default:
414 abort();
415 }
416
417 if (align)
418 frag_align (align, 0, 0);
419
420 switch (area)
421 {
422 case AREA_SDA:
423 if (S_GET_SEGMENT (symbolP) == sbss_section)
7dcc9865 424 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
425 break;
426
427 case AREA_ZDA:
428 if (S_GET_SEGMENT (symbolP) == zbss_section)
7dcc9865 429 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
430 break;
431
432 case AREA_TDA:
433 if (S_GET_SEGMENT (symbolP) == tbss_section)
7dcc9865 434 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
435 break;
436
437 default:
cac58fa6 438 abort ();
252b5132
RH
439 }
440
7dcc9865 441 symbol_set_frag (symbolP, frag_now);
252b5132
RH
442 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
443 (offsetT) size, (char *) 0);
444 *pfrag = 0;
445 S_SET_SIZE (symbolP, size);
446
447 switch (area)
448 {
449 case AREA_SDA:
450 S_SET_SEGMENT (symbolP, sbss_section);
451 break;
452
453 case AREA_ZDA:
454 S_SET_SEGMENT (symbolP, zbss_section);
455 break;
456
457 case AREA_TDA:
458 S_SET_SEGMENT (symbolP, tbss_section);
459 break;
460
461 default:
462 abort();
463 }
464
465 S_CLEAR_EXTERNAL (symbolP);
466 obj_elf_section_change_hook();
467 subseg_set (old_sec, old_subsec);
468 }
469 else
470 {
471 allocate_common:
472 S_SET_VALUE (symbolP, (valueT) size);
473 S_SET_ALIGN (symbolP, temp);
474 S_SET_EXTERNAL (symbolP);
475
476 switch (area)
477 {
478 case AREA_SDA:
479 if (scommon_section == NULL)
480 {
481 flagword applicable;
482
483 applicable = bfd_applicable_section_flags (stdoutput);
484
485 scommon_section = subseg_new (".scommon", 0);
486
5480ccf3
NC
487 bfd_set_section_flags (stdoutput, scommon_section,
488 (applicable
252b5132 489 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 490 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
491 }
492 S_SET_SEGMENT (symbolP, scommon_section);
493 break;
494
495 case AREA_ZDA:
496 if (zcommon_section == NULL)
497 {
498 flagword applicable;
499
500 applicable = bfd_applicable_section_flags (stdoutput);
501
502 zcommon_section = subseg_new (".zcommon", 0);
503
5480ccf3
NC
504 bfd_set_section_flags (stdoutput, zcommon_section,
505 (applicable
252b5132 506 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 507 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
508 }
509 S_SET_SEGMENT (symbolP, zcommon_section);
510 break;
511
512 case AREA_TDA:
513 if (tcommon_section == NULL)
514 {
515 flagword applicable;
516
517 applicable = bfd_applicable_section_flags (stdoutput);
518
519 tcommon_section = subseg_new (".tcommon", 0);
520
5480ccf3
NC
521 bfd_set_section_flags (stdoutput, tcommon_section,
522 (applicable
252b5132 523 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 524 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
525 }
526 S_SET_SEGMENT (symbolP, tcommon_section);
527 break;
528
529 default:
530 abort();
531 }
532 }
533 }
534 else
535 {
536 input_line_pointer++;
537 /* @@ Some use the dot, some don't. Can we get some consistency?? */
538 if (*input_line_pointer == '.')
539 input_line_pointer++;
540 /* @@ Some say data, some say bss. */
541 if (strncmp (input_line_pointer, "bss\"", 4)
542 && strncmp (input_line_pointer, "data\"", 5))
543 {
544 while (*--input_line_pointer != '"')
545 ;
546 input_line_pointer--;
547 goto bad_common_segment;
548 }
549 while (*input_line_pointer++ != '"')
550 ;
551 goto allocate_common;
552 }
553
fed9b18a 554 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
555
556 demand_empty_rest_of_line ();
557 return;
558
559 {
560 bad_common_segment:
561 p = input_line_pointer;
562 while (*p && *p != '\n')
563 p++;
564 c = *p;
565 *p = '\0';
566 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
567 *p = c;
568 input_line_pointer = p;
569 ignore_rest_of_line ();
570 return;
571 }
572}
573
574void
575set_machine (int number)
576{
577 machine = number;
578 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
579
580 switch (machine)
581 {
582 case 0: processor_mask = PROCESSOR_V850; break;
583 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
584 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
585 }
586}
587
588/* The target specific pseudo-ops which we support. */
589const pseudo_typeS md_pseudo_table[] =
590{
591 {"sdata", v850_sdata, 0},
592 {"tdata", v850_tdata, 0},
593 {"zdata", v850_zdata, 0},
594 {"sbss", v850_sbss, 0},
595 {"tbss", v850_tbss, 0},
596 {"zbss", v850_zbss, 0},
597 {"rosdata", v850_rosdata, 0},
598 {"rozdata", v850_rozdata, 0},
599 {"bss", v850_bss, 0},
600 {"offset", v850_offset, 0},
601 {"word", cons, 4},
602 {"zcomm", v850_comm, AREA_ZDA},
603 {"scomm", v850_comm, AREA_SDA},
604 {"tcomm", v850_comm, AREA_TDA},
605 {"v850", set_machine, 0},
606 {"call_table_data", v850_call_table_data, 0},
607 {"call_table_text", v850_call_table_text, 0},
608 {"v850e", set_machine, bfd_mach_v850e},
609 {"v850ea", set_machine, bfd_mach_v850ea},
610 { NULL, NULL, 0}
611};
612
613/* Opcode hash table. */
614static struct hash_control *v850_hash;
615
616/* This table is sorted. Suitable for searching by a binary search. */
617static const struct reg_name pre_defined_registers[] =
618{
619 { "ep", 30 }, /* ep - element ptr */
620 { "gp", 4 }, /* gp - global ptr */
621 { "hp", 2 }, /* hp - handler stack ptr */
622 { "lp", 31 }, /* lp - link ptr */
623 { "r0", 0 },
624 { "r1", 1 },
625 { "r10", 10 },
626 { "r11", 11 },
627 { "r12", 12 },
628 { "r13", 13 },
629 { "r14", 14 },
630 { "r15", 15 },
631 { "r16", 16 },
632 { "r17", 17 },
633 { "r18", 18 },
634 { "r19", 19 },
635 { "r2", 2 },
636 { "r20", 20 },
637 { "r21", 21 },
638 { "r22", 22 },
639 { "r23", 23 },
640 { "r24", 24 },
641 { "r25", 25 },
642 { "r26", 26 },
643 { "r27", 27 },
644 { "r28", 28 },
645 { "r29", 29 },
646 { "r3", 3 },
647 { "r30", 30 },
648 { "r31", 31 },
649 { "r4", 4 },
650 { "r5", 5 },
651 { "r6", 6 },
652 { "r7", 7 },
653 { "r8", 8 },
654 { "r9", 9 },
655 { "sp", 3 }, /* sp - stack ptr */
656 { "tp", 5 }, /* tp - text ptr */
657 { "zero", 0 },
658};
659#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct reg_name))
660
661
662static const struct reg_name system_registers[] =
663{
664 { "ctbp", 20 },
665 { "ctpc", 16 },
666 { "ctpsw", 17 },
667 { "dbpc", 18 },
668 { "dbpsw", 19 },
669 { "ecr", 4 },
670 { "eipc", 0 },
671 { "eipsw", 1 },
672 { "fepc", 2 },
673 { "fepsw", 3 },
674 { "psw", 5 },
675};
676#define SYSREG_NAME_CNT (sizeof (system_registers) / sizeof (struct reg_name))
677
678static const struct reg_name system_list_registers[] =
679{
680 {"PS", 5 },
681 {"SR", 0 + 1}
682};
683#define SYSREGLIST_NAME_CNT (sizeof (system_list_registers) / sizeof (struct reg_name))
684
685static const struct reg_name cc_names[] =
686{
687 { "c", 0x1 },
688 { "e", 0x2 },
689 { "ge", 0xe },
690 { "gt", 0xf },
691 { "h", 0xb },
692 { "l", 0x1 },
693 { "le", 0x7 },
694 { "lt", 0x6 },
695 { "n", 0x4 },
696 { "nc", 0x9 },
697 { "ne", 0xa },
698 { "nh", 0x3 },
699 { "nl", 0x9 },
700 { "ns", 0xc },
701 { "nv", 0x8 },
702 { "nz", 0xa },
703 { "p", 0xc },
704 { "s", 0x4 },
705 { "sa", 0xd },
706 { "t", 0x5 },
707 { "v", 0x0 },
708 { "z", 0x2 },
709};
710#define CC_NAME_CNT (sizeof (cc_names) / sizeof (struct reg_name))
711
712/* reg_name_search does a binary search of the given register table
713 to see if "name" is a valid regiter name. Returns the register
714 number from the array on success, or -1 on failure. */
715
716static int
717reg_name_search (regs, regcount, name, accept_numbers)
718 const struct reg_name * regs;
719 int regcount;
720 const char * name;
721 boolean accept_numbers;
722{
723 int middle, low, high;
724 int cmp;
725 symbolS * symbolP;
726
727 /* If the register name is a symbol, then evaluate it. */
728 if ((symbolP = symbol_find (name)) != NULL)
729 {
730 /* If the symbol is an alias for another name then use that.
731 If the symbol is an alias for a number, then return the number. */
a77f5182 732 if (symbol_equated_p (symbolP))
252b5132 733 {
a77f5182 734 name = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
735 }
736 else if (accept_numbers)
737 {
738 int reg = S_GET_VALUE (symbolP);
739
740 if (reg >= 0 && reg <= 31)
741 return reg;
742 }
743
744 /* Otherwise drop through and try parsing name normally. */
745 }
746
747 low = 0;
748 high = regcount - 1;
749
750 do
751 {
752 middle = (low + high) / 2;
753 cmp = strcasecmp (name, regs[middle].name);
754 if (cmp < 0)
755 high = middle - 1;
756 else if (cmp > 0)
757 low = middle + 1;
758 else
759 return regs[middle].value;
760 }
761 while (low <= high);
762 return -1;
763}
764
765
766/* Summary of register_name().
767 *
768 * in: Input_line_pointer points to 1st char of operand.
769 *
770 * out: A expressionS.
771 * The operand may have been a register: in this case, X_op == O_register,
772 * X_add_number is set to the register number, and truth is returned.
773 * Input_line_pointer->(next non-blank) char after operand, or is in
774 * its original state.
775 */
776static boolean
777register_name (expressionP)
778 expressionS * expressionP;
779{
780 int reg_number;
781 char * name;
782 char * start;
783 char c;
784
785 /* Find the spelling of the operand */
786 start = name = input_line_pointer;
787
788 c = get_symbol_end ();
789
790 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
791 name, FALSE);
792
793 * input_line_pointer = c; /* put back the delimiting char */
794
795 /* look to see if it's in the register table */
796 if (reg_number >= 0)
797 {
798 expressionP->X_op = O_register;
799 expressionP->X_add_number = reg_number;
800
801 /* make the rest nice */
802 expressionP->X_add_symbol = NULL;
803 expressionP->X_op_symbol = NULL;
804
805 return true;
806 }
807 else
808 {
809 /* reset the line as if we had not done anything */
810 input_line_pointer = start;
811
812 return false;
813 }
814}
815
816/* Summary of system_register_name().
817 *
818 * in: Input_line_pointer points to 1st char of operand.
819 * expressionP points to an expression structure to be filled in.
820 * accept_numbers is true iff numerical register names may be used.
821 * accept_list_names is true iff the special names PS and SR may be
822 * accepted.
823 *
824 * out: A expressionS structure in expressionP.
825 * The operand may have been a register: in this case, X_op == O_register,
826 * X_add_number is set to the register number, and truth is returned.
827 * Input_line_pointer->(next non-blank) char after operand, or is in
828 * its original state.
829 */
830static boolean
831system_register_name (expressionP, accept_numbers, accept_list_names)
832 expressionS * expressionP;
833 boolean accept_numbers;
834 boolean accept_list_names;
835{
836 int reg_number;
837 char * name;
838 char * start;
839 char c;
840
841 /* Find the spelling of the operand */
842 start = name = input_line_pointer;
843
844 c = get_symbol_end ();
845 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
846 accept_numbers);
847
848 * input_line_pointer = c; /* put back the delimiting char */
849
850 if (reg_number < 0
851 && accept_numbers)
852 {
853 input_line_pointer = start; /* reset input_line pointer */
854
855 if (isdigit (* input_line_pointer))
856 {
857 reg_number = strtol (input_line_pointer, & input_line_pointer, 10);
858
859 /* Make sure that the register number is allowable. */
860 if ( reg_number < 0
5480ccf3
NC
861 || (reg_number > 5 && reg_number < 16)
862 || reg_number > 20
863 )
252b5132
RH
864 {
865 reg_number = -1;
866 }
867 }
868 else if (accept_list_names)
869 {
870 c = get_symbol_end ();
871 reg_number = reg_name_search (system_list_registers,
872 SYSREGLIST_NAME_CNT, name, FALSE);
873
874 * input_line_pointer = c; /* put back the delimiting char */
875 }
876 }
877
878 /* look to see if it's in the register table */
879 if (reg_number >= 0)
880 {
881 expressionP->X_op = O_register;
882 expressionP->X_add_number = reg_number;
883
884 /* make the rest nice */
885 expressionP->X_add_symbol = NULL;
886 expressionP->X_op_symbol = NULL;
887
888 return true;
889 }
890 else
891 {
892 /* reset the line as if we had not done anything */
893 input_line_pointer = start;
894
895 return false;
896 }
897}
898
899/* Summary of cc_name().
900 *
901 * in: Input_line_pointer points to 1st char of operand.
902 *
903 * out: A expressionS.
904 * The operand may have been a register: in this case, X_op == O_register,
905 * X_add_number is set to the register number, and truth is returned.
906 * Input_line_pointer->(next non-blank) char after operand, or is in
907 * its original state.
908 */
909static boolean
910cc_name (expressionP)
911 expressionS * expressionP;
912{
913 int reg_number;
914 char * name;
915 char * start;
916 char c;
917
918 /* Find the spelling of the operand */
919 start = name = input_line_pointer;
920
921 c = get_symbol_end ();
922 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
923
924 * input_line_pointer = c; /* put back the delimiting char */
925
926 /* look to see if it's in the register table */
927 if (reg_number >= 0)
928 {
929 expressionP->X_op = O_constant;
930 expressionP->X_add_number = reg_number;
931
932 /* make the rest nice */
933 expressionP->X_add_symbol = NULL;
934 expressionP->X_op_symbol = NULL;
935
936 return true;
937 }
938 else
939 {
940 /* reset the line as if we had not done anything */
941 input_line_pointer = start;
942
943 return false;
944 }
945}
946
947static void
948skip_white_space (void)
949{
950 while ( * input_line_pointer == ' '
951 || * input_line_pointer == '\t')
952 ++ input_line_pointer;
953}
954
955/* Summary of parse_register_list ().
956 *
957 * in: Input_line_pointer points to 1st char of a list of registers.
958 * insn is the partially constructed instruction.
959 * operand is the operand being inserted.
960 *
961 * out: NULL if the parse completed successfully, otherwise a
962 * pointer to an error message is returned. If the parse
963 * completes the correct bit fields in the instruction
964 * will be filled in.
965 *
966 * Parses register lists with the syntax:
967 *
968 * { rX }
969 * { rX, rY }
970 * { rX - rY }
971 * { rX - rY, rZ }
972 * etc
973 *
974 * and also parses constant epxressions whoes bits indicate the
975 * registers in the lists. The LSB in the expression refers to
976 * the lowest numbered permissable register in the register list,
977 * and so on upwards. System registers are considered to be very
978 * high numbers.
979 *
980 */
981static char *
982parse_register_list
983(
984 unsigned long * insn,
985 const struct v850_operand * operand
986)
987{
988 static int type1_regs[ 32 ] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
989 static int type2_regs[ 32 ] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
990 static int type3_regs[ 32 ] = { 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
991 int * regs;
992 expressionS exp;
993
994
995 /* Select a register array to parse. */
996 switch (operand->shift)
997 {
998 case 0xffe00001: regs = type1_regs; break;
999 case 0xfff8000f: regs = type2_regs; break;
1000 case 0xfff8001f: regs = type3_regs; break;
1001 default:
1002 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1003 return _("internal failure in parse_register_list");
1004 }
1005
1006 skip_white_space ();
1007
1008 /* If the expression starts with a curly brace it is a register list.
1009 Otherwise it is a constant expression, whoes bits indicate which
1010 registers are to be included in the list. */
1011
1012 if (* input_line_pointer != '{')
1013 {
252b5132
RH
1014 int reg;
1015 int i;
1016
1017 expression (& exp);
1018
1019 if (exp.X_op != O_constant)
1020 return _("constant expression or register list expected");
1021
1022 if (regs == type1_regs)
1023 {
1024 if (exp.X_add_number & 0xFFFFF000)
1025 return _("high bits set in register list expression");
1026
1027 for (reg = 20; reg < 32; reg ++)
1028 if (exp.X_add_number & (1 << (reg - 20)))
1029 {
1030 for (i = 0; i < 32; i++)
1031 if (regs[i] == reg)
1032 * insn |= (1 << i);
1033 }
1034 }
1035 else if (regs == type2_regs)
1036 {
1037 if (exp.X_add_number & 0xFFFE0000)
1038 return _("high bits set in register list expression");
1039
1040 for (reg = 1; reg < 16; reg ++)
1041 if (exp.X_add_number & (1 << (reg - 1)))
1042 {
1043 for (i = 0; i < 32; i++)
1044 if (regs[i] == reg)
1045 * insn |= (1 << i);
1046 }
1047
1048 if (exp.X_add_number & (1 << 15))
1049 * insn |= (1 << 3);
1050
1051 if (exp.X_add_number & (1 << 16))
1052 * insn |= (1 << 19);
1053 }
1054 else /* regs == type3_regs */
1055 {
1056 if (exp.X_add_number & 0xFFFE0000)
1057 return _("high bits set in register list expression");
1058
1059 for (reg = 16; reg < 32; reg ++)
1060 if (exp.X_add_number & (1 << (reg - 16)))
1061 {
1062 for (i = 0; i < 32; i++)
1063 if (regs[i] == reg)
1064 * insn |= (1 << i);
1065 }
1066
1067 if (exp.X_add_number & (1 << 16))
1068 * insn |= (1 << 19);
1069 }
1070
1071 return NULL;
1072 }
1073
1074 input_line_pointer ++;
1075
1076 /* Parse the register list until a terminator (closing curly brace or
1077 new-line) is found. */
1078 for (;;)
1079 {
1080 if (register_name (& exp))
1081 {
1082 int i;
1083
1084 /* Locate the given register in the list, and if it is there,
1085 insert the corresponding bit into the instruction. */
1086 for (i = 0; i < 32; i++)
1087 {
1088 if (regs[ i ] == exp.X_add_number)
1089 {
1090 * insn |= (1 << i);
1091 break;
1092 }
1093 }
1094
1095 if (i == 32)
1096 {
1097 return _("illegal register included in list");
1098 }
1099 }
1100 else if (system_register_name (& exp, true, true))
1101 {
1102 if (regs == type1_regs)
1103 {
1104 return _("system registers cannot be included in list");
1105 }
1106 else if (exp.X_add_number == 5)
1107 {
1108 if (regs == type2_regs)
1109 return _("PSW cannot be included in list");
1110 else
1111 * insn |= 0x8;
1112 }
1113 else if (exp.X_add_number < 4)
1114 * insn |= 0x80000;
1115 else
1116 return _("High value system registers cannot be included in list");
1117 }
1118 else if (* input_line_pointer == '}')
1119 {
1120 input_line_pointer ++;
1121 break;
1122 }
1123 else if (* input_line_pointer == ',')
1124 {
1125 input_line_pointer ++;
1126 continue;
1127 }
1128 else if (* input_line_pointer == '-')
1129 {
1130 /* We have encountered a range of registers: rX - rY */
1131 int j;
1132 expressionS exp2;
1133
1134 /* Skip the dash. */
1135 ++ input_line_pointer;
1136
1137 /* Get the second register in the range. */
1138 if (! register_name (& exp2))
1139 {
1140 return _("second register should follow dash in register list");
1141 exp2.X_add_number = exp.X_add_number;
1142 }
1143
1144 /* Add the rest of the registers in the range. */
1145 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1146 {
1147 int i;
1148
1149 /* Locate the given register in the list, and if it is there,
1150 insert the corresponding bit into the instruction. */
1151 for (i = 0; i < 32; i++)
1152 {
1153 if (regs[ i ] == j)
1154 {
1155 * insn |= (1 << i);
1156 break;
1157 }
1158 }
1159
1160 if (i == 32)
1161 return _("illegal register included in list");
1162 }
1163 }
1164 else
1165 {
1166 break;
1167 }
1168
1169 skip_white_space ();
1170 }
1171
1172 return NULL;
1173}
1174
1175CONST char * md_shortopts = "m:";
1176
1177struct option md_longopts[] =
1178{
1179 {NULL, no_argument, NULL, 0}
1180};
1181size_t md_longopts_size = sizeof md_longopts;
1182
1183
1184void
1185md_show_usage (stream)
1186 FILE * stream;
1187{
1188 fprintf (stream, _(" V850 options:\n"));
1189 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1190 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1191 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1192 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1193 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1194 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1195}
1196
1197int
1198md_parse_option (c, arg)
1199 int c;
1200 char * arg;
1201{
1202 if (c != 'm')
1203 {
5480ccf3
NC
1204 if (c != 'a')
1205 /* xgettext:c-format */
1206 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
252b5132
RH
1207 return 0;
1208 }
1209
1210 if (strcmp (arg, "warn-signed-overflow") == 0)
1211 {
1212 warn_signed_overflows = TRUE;
1213 }
1214 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1215 {
1216 warn_unsigned_overflows = TRUE;
1217 }
1218 else if (strcmp (arg, "v850") == 0)
1219 {
1220 machine = 0;
1221 processor_mask = PROCESSOR_V850;
1222 }
1223 else if (strcmp (arg, "v850e") == 0)
1224 {
1225 machine = bfd_mach_v850e;
1226 processor_mask = PROCESSOR_V850E;
1227 }
1228 else if (strcmp (arg, "v850ea") == 0)
1229 {
1230 machine = bfd_mach_v850ea;
1231 processor_mask = PROCESSOR_V850EA;
1232 }
1233 else if (strcmp (arg, "v850any") == 0)
1234 {
1235 machine = 0; /* Tell the world that this is for any v850 chip. */
1236 processor_mask = PROCESSOR_V850EA; /* But support instructions for the extended versions. */
1237 }
1238 else
1239 {
1240 /* xgettext:c-format */
1241 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1242 return 0;
1243 }
1244
1245 return 1;
1246}
1247
1248symbolS *
1249md_undefined_symbol (name)
5480ccf3 1250 char * name ATTRIBUTE_UNUSED;
252b5132
RH
1251{
1252 return 0;
1253}
1254
1255char *
1256md_atof (type, litp, sizep)
1257 int type;
1258 char * litp;
1259 int * sizep;
1260{
1261 int prec;
1262 LITTLENUM_TYPE words[4];
1263 char * t;
1264 int i;
1265
1266 switch (type)
1267 {
1268 case 'f':
1269 prec = 2;
1270 break;
1271
1272 case 'd':
1273 prec = 4;
1274 break;
1275
1276 default:
1277 *sizep = 0;
1278 return _("bad call to md_atof");
1279 }
1280
1281 t = atof_ieee (input_line_pointer, type, words);
1282 if (t)
1283 input_line_pointer = t;
1284
1285 *sizep = prec * 2;
1286
1287 for (i = prec - 1; i >= 0; i--)
1288 {
1289 md_number_to_chars (litp, (valueT) words[i], 2);
1290 litp += 2;
1291 }
1292
1293 return NULL;
1294}
1295
1296
1297/* Very gross. */
1298void
1299md_convert_frag (abfd, sec, fragP)
5480ccf3 1300 bfd * abfd ATTRIBUTE_UNUSED;
252b5132
RH
1301 asection * sec;
1302 fragS * fragP;
1303{
1304 subseg_change (sec, 0);
1305
1306 /* In range conditional or unconditional branch. */
1307 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1308 {
1309 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1310 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1311 fragP->fr_var = 0;
1312 fragP->fr_fix += 2;
1313 }
1314 /* Out of range conditional branch. Emit a branch around a jump. */
1315 else if (fragP->fr_subtype == 1)
1316 {
1317 unsigned char *buffer =
1318 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1319
1320 /* Reverse the condition of the first branch. */
1321 buffer[0] ^= 0x08;
1322 /* Mask off all the displacement bits. */
1323 buffer[0] &= 0x8f;
1324 buffer[1] &= 0x07;
1325 /* Now set the displacement bits so that we branch
1326 around the unconditional branch. */
1327 buffer[0] |= 0x30;
1328
1329 /* Now create the unconditional branch + fixup to the final
1330 target. */
1331 md_number_to_chars (buffer + 2, 0x00000780, 4);
1332 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1333 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1334 (int) fragP->fr_opcode + 1);
1335 fragP->fr_var = 0;
1336 fragP->fr_fix += 6;
1337 }
1338 /* Out of range unconditional branch. Emit a jump. */
1339 else if (fragP->fr_subtype == 3)
1340 {
1341 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1342 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1343 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1344 (int) fragP->fr_opcode + 1);
1345 fragP->fr_var = 0;
1346 fragP->fr_fix += 4;
1347 }
1348 else
1349 abort ();
1350}
1351
1352valueT
1353md_section_align (seg, addr)
1354 asection * seg;
1355 valueT addr;
1356{
1357 int align = bfd_get_section_alignment (stdoutput, seg);
1358 return ((addr + (1 << align) - 1) & (-1 << align));
1359}
1360
1361void
1362md_begin ()
1363{
1364 char * prev_name = "";
1365 register const struct v850_opcode * op;
1366 flagword applicable;
1367
1368 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1369 {
1370 if (machine == -1)
1371 machine = bfd_mach_v850ea;
1372
1373 if (processor_mask == -1)
1374 processor_mask = PROCESSOR_V850EA;
1375 }
1376 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1377 {
1378 if (machine == -1)
1379 machine = bfd_mach_v850e;
1380
1381 if (processor_mask == -1)
1382 processor_mask = PROCESSOR_V850E;
1383 }
1384 else
1385 if (strncmp (TARGET_CPU, "v850", 4) == 0)
1386 {
1387 if (machine == -1)
1388 machine = 0;
1389
1390 if (processor_mask == -1)
1391 processor_mask = PROCESSOR_V850;
1392 }
1393 else
1394 /* xgettext:c-format */
1395 as_bad (_("Unable to determine default target processor from string: %s"),
1396 TARGET_CPU);
1397
1398 v850_hash = hash_new();
1399
1400 /* Insert unique names into hash table. The V850 instruction set
1401 has many identical opcode names that have different opcodes based
1402 on the operands. This hash table then provides a quick index to
1403 the first opcode with a particular name in the opcode table. */
1404
1405 op = v850_opcodes;
1406 while (op->name)
1407 {
1408 if (strcmp (prev_name, op->name))
1409 {
1410 prev_name = (char *) op->name;
1411 hash_insert (v850_hash, op->name, (char *) op);
1412 }
1413 op++;
1414 }
1415
1416 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1417
1418 applicable = bfd_applicable_section_flags (stdoutput);
1419
1420 call_table_data_section = subseg_new (".call_table_data", 0);
1421 bfd_set_section_flags (stdoutput, call_table_data_section,
1422 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1423 | SEC_DATA | SEC_HAS_CONTENTS));
1424
1425 call_table_text_section = subseg_new (".call_table_text", 0);
1426 bfd_set_section_flags (stdoutput, call_table_text_section,
1427 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1428 | SEC_CODE));
1429
1430 /* Restore text section as the current default. */
1431 subseg_set (text_section, 0);
1432}
1433
1434
1435static bfd_reloc_code_real_type
1436handle_ctoff (const struct v850_operand * operand)
1437{
1438 if (operand == NULL)
1439 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1440
1441 if ( operand->bits != 6
1442 || operand->shift != 0)
1443 {
1444 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1445 return BFD_RELOC_64; /* Used to indicate an error condition. */
1446 }
1447
1448 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1449}
1450
1451static bfd_reloc_code_real_type
1452handle_sdaoff (const struct v850_operand * operand)
1453{
1454 if (operand == NULL) return BFD_RELOC_V850_SDA_16_16_OFFSET;
1455 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_SDA_15_16_OFFSET;
1456 if (operand->bits == -1) return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1457
1458 if ( operand->bits != 16
1459 || operand->shift != 16)
1460 {
1461 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1462 return BFD_RELOC_64; /* Used to indicate an error condition. */
1463 }
1464
1465 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1466}
1467
1468static bfd_reloc_code_real_type
1469handle_zdaoff (const struct v850_operand * operand)
1470{
1471 if (operand == NULL) return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1472 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1473 if (operand->bits == -1) return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1474
1475 if ( operand->bits != 16
1476 || operand->shift != 16)
1477 {
1478 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1479 return BFD_RELOC_64; /* Used to indicate an error condition. */
1480 }
1481
1482 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1483}
1484
1485static bfd_reloc_code_real_type
1486handle_tdaoff (const struct v850_operand * operand)
1487{
1488 if (operand == NULL) return BFD_RELOC_V850_TDA_7_7_OFFSET; /* data item, not an instruction. */
1489 if (operand->bits == 6 && operand->shift == 1) return BFD_RELOC_V850_TDA_6_8_OFFSET; /* sld.w/sst.w, operand: D8_6 */
1490 if (operand->bits == 4 && operand->insert != NULL) return BFD_RELOC_V850_TDA_4_5_OFFSET; /* sld.hu, operand: D5-4 */
1491 if (operand->bits == 4 && operand->insert == NULL) return BFD_RELOC_V850_TDA_4_4_OFFSET; /* sld.bu, operand: D4 */
1492 if (operand->bits == 16 && operand->shift == 16) return BFD_RELOC_V850_TDA_16_16_OFFSET; /* set1 & chums, operands: D16 */
1493
1494 if (operand->bits != 7)
1495 {
1496 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1497 return BFD_RELOC_64; /* Used to indicate an error condition. */
1498 }
1499
1500 return operand->insert != NULL
1501 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1502 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1503}
1504
1505/* Warning: The code in this function relies upon the definitions
1506 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1507 matching the hard coded values contained herein. */
1508
1509static bfd_reloc_code_real_type
1510v850_reloc_prefix (const struct v850_operand * operand)
1511{
1512 boolean paren_skipped = false;
1513
1514
1515 /* Skip leading opening parenthesis. */
1516 if (* input_line_pointer == '(')
1517 {
1518 ++ input_line_pointer;
1519 paren_skipped = true;
1520 }
1521
1522#define CHECK_(name, reloc) \
1523 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1524 { \
1525 input_line_pointer += strlen (name); \
1526 return reloc; \
1527 }
1528
1529 CHECK_ ("hi0", BFD_RELOC_HI16);
1530 CHECK_ ("hi", BFD_RELOC_HI16_S);
1531 CHECK_ ("lo", BFD_RELOC_LO16);
1532 CHECK_ ("sdaoff", handle_sdaoff (operand));
1533 CHECK_ ("zdaoff", handle_zdaoff (operand));
1534 CHECK_ ("tdaoff", handle_tdaoff (operand));
1535 CHECK_ ("hilo", BFD_RELOC_32);
1536 CHECK_ ("ctoff", handle_ctoff (operand));
1537
1538 /* Restore skipped parenthesis. */
1539 if (paren_skipped)
1540 -- input_line_pointer;
1541
1542 return BFD_RELOC_UNUSED;
1543}
1544
1545/* Insert an operand value into an instruction. */
1546
1547static unsigned long
1548v850_insert_operand (insn, operand, val, file, line, str)
1549 unsigned long insn;
1550 const struct v850_operand * operand;
1551 offsetT val;
1552 char * file;
1553 unsigned int line;
1554 char * str;
1555{
1556 if (operand->insert)
1557 {
1558 const char * message = NULL;
1559
1560 insn = operand->insert (insn, val, & message);
1561 if (message != NULL)
1562 {
1563 if ((operand->flags & V850_OPERAND_SIGNED)
1564 && ! warn_signed_overflows
1565 && strstr (message, "out of range") != NULL)
1566 {
1567 /* skip warning... */
1568 }
1569 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1570 && ! warn_unsigned_overflows
1571 && strstr (message, "out of range") != NULL)
1572 {
1573 /* skip warning... */
1574 }
1575 else if (str)
1576 {
1577 if (file == (char *) NULL)
1578 as_warn ("%s: %s", str, message);
1579 else
1580 as_warn_where (file, line, "%s: %s", str, message);
1581 }
1582 else
1583 {
1584 if (file == (char *) NULL)
1585 as_warn (message);
1586 else
1587 as_warn_where (file, line, message);
1588 }
1589 }
1590 }
1591 else
1592 {
1593 if (operand->bits != 32)
1594 {
5480ccf3 1595 long min, max;
252b5132
RH
1596
1597 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1598 {
1599 if (! warn_signed_overflows)
1600 max = (1 << operand->bits) - 1;
1601 else
1602 max = (1 << (operand->bits - 1)) - 1;
1603
1604 min = - (1 << (operand->bits - 1));
1605 }
1606 else
1607 {
1608 max = (1 << operand->bits) - 1;
1609
1610 if (! warn_unsigned_overflows)
1611 min = - (1 << (operand->bits - 1));
1612 else
1613 min = 0;
1614 }
1615
1616 if (val < (offsetT) min || val > (offsetT) max)
1617 {
1618 /* xgettext:c-format */
1619 const char * err = _("operand out of range (%s not between %ld and %ld)");
1620 char buf[100];
1621
1622 /* Restore min and mix to expected values for decimal ranges. */
1623 if ((operand->flags & V850_OPERAND_SIGNED)
1624 && ! warn_signed_overflows)
1625 max = (1 << (operand->bits - 1)) - 1;
1626
1627 if (! (operand->flags & V850_OPERAND_SIGNED)
1628 && ! warn_unsigned_overflows)
1629 min = 0;
1630
1631 if (str)
1632 {
1633 sprintf (buf, "%s: ", str);
1634
1635 sprint_value (buf + strlen (buf), val);
1636 }
1637 else
1638 sprint_value (buf, val);
1639
1640 if (file == (char *) NULL)
1641 as_warn (err, buf, min, max);
1642 else
1643 as_warn_where (file, line, err, buf, min, max);
1644 }
1645 }
1646
1647 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1648 }
1649
1650 return insn;
1651}
1652
1653\f
1654static char copy_of_instruction [128];
1655
1656void
1657md_assemble (str)
1658 char * str;
1659{
1660 char * s;
1661 char * start_of_operands;
1662 struct v850_opcode * opcode;
1663 struct v850_opcode * next_opcode;
1664 const unsigned char * opindex_ptr;
1665 int next_opindex;
5480ccf3 1666 int relaxable = 0;
252b5132
RH
1667 unsigned long insn;
1668 unsigned long insn_size;
1669 char * f;
1670 int i;
1671 int match;
1672 boolean extra_data_after_insn = false;
5480ccf3
NC
1673 unsigned extra_data_len = 0;
1674 unsigned long extra_data = 0;
252b5132
RH
1675 char * saved_input_line_pointer;
1676
1677
1678 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1679
1680 /* Get the opcode. */
1681 for (s = str; *s != '\0' && ! isspace (*s); s++)
1682 continue;
1683
1684 if (*s != '\0')
1685 *s++ = '\0';
1686
1687 /* find the first opcode with the proper name */
1688 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1689 if (opcode == NULL)
1690 {
1691 /* xgettext:c-format */
1692 as_bad (_("Unrecognized opcode: `%s'"), str);
1693 ignore_rest_of_line ();
1694 return;
1695 }
1696
1697 str = s;
1698 while (isspace (* str))
1699 ++ str;
1700
1701 start_of_operands = str;
1702
1703 saved_input_line_pointer = input_line_pointer;
1704
1705 for (;;)
1706 {
1707 const char * errmsg = NULL;
1708
1709 match = 0;
1710
1711 if ((opcode->processors & processor_mask) == 0)
1712 {
1713 errmsg = _("Target processor does not support this instruction.");
1714 goto error;
1715 }
1716
1717 relaxable = 0;
1718 fc = 0;
1719 next_opindex = 0;
1720 insn = opcode->opcode;
1721 extra_data_after_insn = false;
1722
1723 input_line_pointer = str = start_of_operands;
1724
1725 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr ++)
1726 {
1727 const struct v850_operand * operand;
1728 char * hold;
1729 expressionS ex;
1730 bfd_reloc_code_real_type reloc;
1731
1732 if (next_opindex == 0)
1733 {
1734 operand = & v850_operands[ * opindex_ptr ];
1735 }
1736 else
1737 {
1738 operand = & v850_operands[ next_opindex ];
1739 next_opindex = 0;
1740 }
1741
1742 errmsg = NULL;
1743
1744 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1745 ++ str;
1746
1747 if (operand->flags & V850_OPERAND_RELAX)
1748 relaxable = 1;
1749
1750 /* Gather the operand. */
1751 hold = input_line_pointer;
1752 input_line_pointer = str;
1753
1754 /* lo(), hi(), hi0(), etc... */
1755 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1756 {
1757 /* This is a fake reloc, used to indicate an error condition. */
1758 if (reloc == BFD_RELOC_64)
1759 {
1760 match = 1;
1761 goto error;
1762 }
1763
1764 expression (& ex);
1765
1766 if (ex.X_op == O_constant)
1767 {
1768 switch (reloc)
1769 {
1770 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1771 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1772 and the like. */
1773 /* Fall through. */
1774
1775 case BFD_RELOC_LO16:
1776 {
1777 /* Truncate, then sign extend the value. */
1778 ex.X_add_number = SEXT16 (ex.X_add_number);
1779 break;
1780 }
1781
1782 case BFD_RELOC_HI16:
1783 {
1784 /* Truncate, then sign extend the value. */
1785 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1786 break;
1787 }
1788
1789 case BFD_RELOC_HI16_S:
1790 {
1791 /* Truncate, then sign extend the value. */
1792 int temp = (ex.X_add_number >> 16) & 0xffff;
1793
1794 temp += (ex.X_add_number >> 15) & 1;
1795
1796 ex.X_add_number = SEXT16 (temp);
1797 break;
1798 }
1799
1800 case BFD_RELOC_32:
1801 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1802 {
1803 errmsg = _("immediate operand is too large");
1804 goto error;
1805 }
1806
1807 extra_data_after_insn = true;
1808 extra_data_len = 4;
1809 extra_data = ex.X_add_number;
1810 ex.X_add_number = 0;
1811 break;
1812
1813 default:
1814 fprintf (stderr, "reloc: %d\n", reloc);
1815 as_bad (_("AAARG -> unhandled constant reloc"));
1816 break;
1817 }
1818
1819 if (fc > MAX_INSN_FIXUPS)
1820 as_fatal (_("too many fixups"));
1821
1822 fixups[ fc ].exp = ex;
1823 fixups[ fc ].opindex = * opindex_ptr;
1824 fixups[ fc ].reloc = reloc;
1825 fc++;
1826 }
1827 else
1828 {
1829 if (reloc == BFD_RELOC_32)
1830 {
1831 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1832 {
1833 errmsg = _("immediate operand is too large");
1834 goto error;
1835 }
1836
1837 extra_data_after_insn = true;
1838 extra_data_len = 4;
1839 extra_data = ex.X_add_number;
1840 }
1841
1842 if (fc > MAX_INSN_FIXUPS)
1843 as_fatal (_("too many fixups"));
1844
1845 fixups[ fc ].exp = ex;
1846 fixups[ fc ].opindex = * opindex_ptr;
1847 fixups[ fc ].reloc = reloc;
1848 fc++;
1849 }
1850 }
1851 else
1852 {
1853 errmsg = NULL;
1854
1855 if ((operand->flags & V850_OPERAND_REG) != 0)
1856 {
1857 if (!register_name (& ex))
1858 {
1859 errmsg = _("invalid register name");
1860 }
1861 else if ((operand->flags & V850_NOT_R0)
1862 && ex.X_add_number == 0)
1863 {
1864 errmsg = _("register r0 cannot be used here");
1865
1866 /* Force an error message to be generated by
1867 skipping over any following potential matches
1868 for this opcode. */
1869 opcode += 3;
1870 }
1871 }
1872 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1873 {
1874 if (!system_register_name (& ex, true, false))
1875 {
1876 errmsg = _("invalid system register name");
1877 }
1878 }
1879 else if ((operand->flags & V850_OPERAND_EP) != 0)
1880 {
1881 char * start = input_line_pointer;
1882 char c = get_symbol_end ();
1883
1884 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1885 {
1886 /* Put things back the way we found them. */
1887 *input_line_pointer = c;
1888 input_line_pointer = start;
1889 errmsg = _("expected EP register");
1890 goto error;
1891 }
1892
1893 *input_line_pointer = c;
1894 str = input_line_pointer;
1895 input_line_pointer = hold;
1896
1897 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1898 ++ str;
1899 continue;
1900 }
1901 else if ((operand->flags & V850_OPERAND_CC) != 0)
1902 {
1903 if (!cc_name (& ex))
1904 {
1905 errmsg = _("invalid condition code name");
1906 }
1907 }
1908 else if (operand->flags & V850E_PUSH_POP)
1909 {
1910 errmsg = parse_register_list (& insn, operand);
1911
1912 /* The parse_register_list() function has already done
1913 everything, so fake a dummy expression. */
1914 ex.X_op = O_constant;
1915 ex.X_add_number = 0;
1916 }
1917 else if (operand->flags & V850E_IMMEDIATE16)
1918 {
1919 expression (& ex);
1920
1921 if (ex.X_op != O_constant)
1922 errmsg = _("constant expression expected");
1923 else if (ex.X_add_number & 0xffff0000)
1924 {
1925 if (ex.X_add_number & 0xffff)
1926 errmsg = _("constant too big to fit into instruction");
1927 else if ((insn & 0x001fffc0) == 0x00130780)
1928 ex.X_add_number >>= 16;
1929 else
1930 errmsg = _("constant too big to fit into instruction");
1931 }
1932
1933 extra_data_after_insn = true;
1934 extra_data_len = 2;
1935 extra_data = ex.X_add_number;
1936 ex.X_add_number = 0;
1937 }
1938 else if (operand->flags & V850E_IMMEDIATE32)
1939 {
1940 expression (& ex);
1941
1942 if (ex.X_op != O_constant)
1943 errmsg = _("constant expression expected");
1944
1945 extra_data_after_insn = true;
1946 extra_data_len = 4;
1947 extra_data = ex.X_add_number;
1948 ex.X_add_number = 0;
1949 }
1950 else if (register_name (& ex)
1951 && (operand->flags & V850_OPERAND_REG) == 0)
1952 {
1953 char c;
1954 int exists = 0;
1955
1956 /* It is possible that an alias has been defined that
1957 matches a register name. For example the code may
1958 include a ".set ZERO, 0" directive, which matches
1959 the register name "zero". Attempt to reparse the
1960 field as an expression, and only complain if we
1961 cannot generate a constant. */
1962
1963 input_line_pointer = str;
1964
1965 c = get_symbol_end ();
1966
1967 if (symbol_find (str) != NULL)
1968 exists = 1;
1969
1970 * input_line_pointer = c;
1971 input_line_pointer = str;
1972
1973 expression (& ex);
1974
1975 if (ex.X_op != O_constant)
1976 {
1977 /* If this register is actually occuring too early on
1978 the parsing of the instruction, (because another
1979 field is missing) then report this. */
1980 if (opindex_ptr[1] != 0
1981 && (v850_operands [opindex_ptr [1]].flags & V850_OPERAND_REG))
1982 errmsg = _("syntax error: value is missing before the register name");
1983 else
1984 errmsg = _("syntax error: register not expected");
1985
1986 /* If we created a symbol in the process of this test then
1987 delete it now, so that it will not be output with the real
1988 symbols... */
1989 if (exists == 0
1990 && ex.X_op == O_symbol)
1991 symbol_remove (ex.X_add_symbol,
1992 & symbol_rootP, & symbol_lastP);
1993 }
1994 }
1995 else if (system_register_name (& ex, false, false)
1996 && (operand->flags & V850_OPERAND_SRG) == 0)
1997 {
1998 errmsg = _("syntax error: system register not expected");
1999 }
2000 else if (cc_name (&ex)
2001 && (operand->flags & V850_OPERAND_CC) == 0)
2002 {
2003 errmsg = _("syntax error: condition code not expected");
2004 }
2005 else
2006 {
2007 expression (& ex);
2008 /* Special case:
2009 If we are assembling a MOV instruction (or a CALLT.... :-)
2010 and the immediate value does not fit into the bits
2011 available then create a fake error so that the next MOV
2012 instruction will be selected. This one has a 32 bit
2013 immediate field. */
2014
2015 if (((insn & 0x07e0) == 0x0200)
2016 && ex.X_op == O_constant
2017 && (ex.X_add_number < (- (1 << (operand->bits - 1)))
2018 || ex.X_add_number > ((1 << operand->bits) - 1)))
2019 errmsg = _("immediate operand is too large");
2020 }
2021
2022 if (errmsg)
2023 goto error;
2024
2025/* fprintf (stderr, " insn: %x, operand %d, op: %d, add_number: %d\n",
2026 insn, opindex_ptr - opcode->operands, ex.X_op, ex.X_add_number); */
2027
2028 switch (ex.X_op)
2029 {
2030 case O_illegal:
2031 errmsg = _("illegal operand");
2032 goto error;
2033 case O_absent:
2034 errmsg = _("missing operand");
2035 goto error;
2036 case O_register:
2037 if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2038 {
2039 errmsg = _("invalid operand");
2040 goto error;
2041 }
2042 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2043 (char *) NULL, 0,
2044 copy_of_instruction);
2045 break;
2046
2047 case O_constant:
2048 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2049 (char *) NULL, 0,
2050 copy_of_instruction);
2051 break;
2052
2053 default:
2054 /* We need to generate a fixup for this expression. */
2055 if (fc >= MAX_INSN_FIXUPS)
2056 as_fatal (_("too many fixups"));
2057
2058 fixups[ fc ].exp = ex;
2059 fixups[ fc ].opindex = * opindex_ptr;
2060 fixups[ fc ].reloc = BFD_RELOC_UNUSED;
2061 ++fc;
2062 break;
2063 }
2064 }
2065
2066 str = input_line_pointer;
2067 input_line_pointer = hold;
2068
2069 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2070 || *str == ')')
2071 ++str;
2072 }
2073 match = 1;
2074
2075 error:
2076 if (match == 0)
2077 {
2078 next_opcode = opcode + 1;
2079 if (next_opcode->name != NULL
2080 && strcmp (next_opcode->name, opcode->name) == 0)
2081 {
2082 opcode = next_opcode;
2083
2084 /* Skip versions that are not supported by the target
2085 processor. */
2086 if ((opcode->processors & processor_mask) == 0)
2087 goto error;
2088
2089 continue;
2090 }
2091
2092 as_bad ("%s: %s", copy_of_instruction, errmsg);
2093
2094 if (* input_line_pointer == ']')
2095 ++ input_line_pointer;
2096
2097 ignore_rest_of_line ();
2098 input_line_pointer = saved_input_line_pointer;
2099 return;
2100 }
2101 break;
2102 }
2103
2104 while (isspace (*str))
2105 ++str;
2106
2107 if (*str != '\0')
2108 /* xgettext:c-format */
2109 as_bad (_("junk at end of line: `%s'"), str);
2110
2111 input_line_pointer = str;
2112
2113 /* Write out the instruction. */
2114
2115 if (relaxable && fc > 0)
2116 {
2117 insn_size = 2;
2118 fc = 0;
2119
2120 if (!strcmp (opcode->name, "br"))
2121 {
2122 f = frag_var (rs_machine_dependent, 4, 2, 2,
2123 fixups[0].exp.X_add_symbol,
2124 fixups[0].exp.X_add_number,
2125 (char *)fixups[0].opindex);
2126 md_number_to_chars (f, insn, insn_size);
2127 md_number_to_chars (f + 2, 0, 2);
2128 }
2129 else
2130 {
2131 f = frag_var (rs_machine_dependent, 6, 4, 0,
2132 fixups[0].exp.X_add_symbol,
2133 fixups[0].exp.X_add_number,
2134 (char *)fixups[0].opindex);
2135 md_number_to_chars (f, insn, insn_size);
2136 md_number_to_chars (f + 2, 0, 4);
2137 }
2138 }
2139 else
2140 {
2141 /* Four byte insns have an opcode with the two high bits on. */
2142 if ((insn & 0x0600) == 0x0600)
2143 insn_size = 4;
2144 else
2145 insn_size = 2;
2146
2147 /* Special case: 32 bit MOV */
2148 if ((insn & 0xffe0) == 0x0620)
2149 insn_size = 2;
2150
2151 f = frag_more (insn_size);
2152
2153 md_number_to_chars (f, insn, insn_size);
2154
2155 if (extra_data_after_insn)
2156 {
2157 f = frag_more (extra_data_len);
2158
2159 md_number_to_chars (f, extra_data, extra_data_len);
2160
2161 extra_data_after_insn = false;
2162 }
2163 }
2164
2165 /* Create any fixups. At this point we do not use a
2166 bfd_reloc_code_real_type, but instead just use the
2167 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2168 handle fixups for any operand type, although that is admittedly
2169 not a very exciting feature. We pick a BFD reloc type in
2170 md_apply_fix. */
2171 for (i = 0; i < fc; i++)
2172 {
2173 const struct v850_operand * operand;
2174 bfd_reloc_code_real_type reloc;
2175
2176 operand = & v850_operands[ fixups[i].opindex ];
2177
2178 reloc = fixups[i].reloc;
2179
2180 if (reloc != BFD_RELOC_UNUSED)
2181 {
2182 reloc_howto_type * reloc_howto = bfd_reloc_type_lookup (stdoutput,
2183 reloc);
2184 int size;
2185 int address;
2186 fixS * fixP;
2187
2188 if (!reloc_howto)
2189 abort();
2190
2191 size = bfd_get_reloc_size (reloc_howto);
2192
2193 /* XXX This will abort on an R_V850_8 reloc -
2194 is this reloc actually used ? */
2195 if (size != 2 && size != 4)
2196 abort ();
2197
2198 address = (f - frag_now->fr_literal) + insn_size - size;
2199
2200 if (reloc == BFD_RELOC_32)
2201 {
2202 address += 2;
2203 }
2204
2205 fixP = fix_new_exp (frag_now, address, size,
2206 & fixups[i].exp,
2207 reloc_howto->pc_relative,
2208 reloc);
2209
2210 switch (reloc)
2211 {
2212 case BFD_RELOC_LO16:
2213 case BFD_RELOC_HI16:
2214 case BFD_RELOC_HI16_S:
2215 fixP->fx_no_overflow = 1;
2216 break;
5480ccf3
NC
2217 default:
2218 break;
252b5132
RH
2219 }
2220 }
2221 else
2222 {
2223 fix_new_exp (
2224 frag_now,
2225 f - frag_now->fr_literal, 4,
2226 & fixups[i].exp,
2227 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2228 (bfd_reloc_code_real_type) (fixups[i].opindex
2229 + (int) BFD_RELOC_UNUSED)
2230 );
2231 }
2232 }
2233
2234 input_line_pointer = saved_input_line_pointer;
2235}
2236
2237
2238/* If while processing a fixup, a reloc really needs to be created */
2239/* then it is done here. */
2240
2241arelent *
2242tc_gen_reloc (seg, fixp)
5480ccf3 2243 asection * seg ATTRIBUTE_UNUSED;
252b5132
RH
2244 fixS * fixp;
2245{
2246 arelent * reloc;
2247
2248 reloc = (arelent *) xmalloc (sizeof (arelent));
310b5aa2
ILT
2249 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2250 *reloc->sym_ptr_ptr= symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2251 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2252 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2253
2254 if (reloc->howto == (reloc_howto_type *) NULL)
2255 {
2256 as_bad_where (fixp->fx_file, fixp->fx_line,
2257 /* xgettext:c-format */
2258 _("reloc %d not supported by object file format"),
2259 (int) fixp->fx_r_type);
2260
2261 xfree (reloc);
2262
2263 return NULL;
2264 }
2265
d6c497c7 2266 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132
RH
2267 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2268 reloc->addend = fixp->fx_offset;
2269 else
2270 reloc->addend = fixp->fx_addnumber;
2271
2272 return reloc;
2273}
2274
2275/* Assume everything will fit in two bytes, then expand as necessary. */
2276int
2277md_estimate_size_before_relax (fragp, seg)
2278 fragS * fragp;
5480ccf3 2279 asection * seg ATTRIBUTE_UNUSED;
252b5132
RH
2280{
2281 if (fragp->fr_subtype == 0)
2282 fragp->fr_var = 4;
2283 else if (fragp->fr_subtype == 2)
2284 fragp->fr_var = 2;
2285 else
2286 abort ();
2287 return 2;
2288}
2289
2290long
2291v850_pcrel_from_section (fixp, section)
2292 fixS * fixp;
2293 segT section;
2294{
2295 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2296 or it is weak (in which case it may well be in another section,
252b5132
RH
2297 then let the linker figure it out. */
2298 if (fixp->fx_addsy != (symbolS *) NULL
2299 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2300 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2301 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7
NC
2302 return 0;
2303
252b5132
RH
2304 return fixp->fx_frag->fr_address + fixp->fx_where;
2305}
2306
2307int
2308md_apply_fix3 (fixp, valuep, seg)
2309 fixS * fixp;
2310 valueT * valuep;
5480ccf3 2311 segT seg ATTRIBUTE_UNUSED;
252b5132
RH
2312{
2313 valueT value;
2314 char * where;
2315
d6c497c7 2316 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2317 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2318 {
2319 fixp->fx_done = 0;
2320 return 1;
2321 }
2322
2323 if (fixp->fx_addsy == (symbolS *) NULL)
2324 {
2325 value = * valuep;
2326 fixp->fx_done = 1;
2327 }
2328 else if (fixp->fx_pcrel)
2329 value = * valuep;
2330 else
2331 {
2332 value = fixp->fx_offset;
2333 if (fixp->fx_subsy != (symbolS *) NULL)
2334 {
2335 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2336 value -= S_GET_VALUE (fixp->fx_subsy);
2337 else
2338 {
2339 /* We don't actually support subtracting a symbol. */
2340 as_bad_where (fixp->fx_file, fixp->fx_line,
2341 _("expression too complex"));
2342 }
2343 }
2344 }
2345
2346 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2347 {
2348 int opindex;
2349 const struct v850_operand * operand;
2350 unsigned long insn;
2351
2352 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
2353 operand = & v850_operands[ opindex ];
2354
2355 /* Fetch the instruction, insert the fully resolved operand
2356 value, and stuff the instruction back again.
2357
2358 Note the instruction has been stored in little endian
2359 format! */
2360 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2361
2362 insn = bfd_getl32 ((unsigned char *) where);
2363 insn = v850_insert_operand (insn, operand, (offsetT) value,
2364 fixp->fx_file, fixp->fx_line, NULL);
2365 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2366
2367 if (fixp->fx_done)
2368 {
2369 /* Nothing else to do here. */
2370 return 1;
2371 }
2372
2373 /* Determine a BFD reloc value based on the operand information.
2374 We are only prepared to turn a few of the operands into relocs. */
2375
2376 if (operand->bits == 22)
2377 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2378 else if (operand->bits == 9)
2379 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2380 else
2381 {
2382 /* fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn); */
2383
2384 as_bad_where (fixp->fx_file, fixp->fx_line,
2385 _("unresolved expression that must be resolved"));
2386 fixp->fx_done = 1;
2387 return 1;
2388 }
2389 }
2390 else if (fixp->fx_done)
2391 {
2392 /* We still have to insert the value into memory! */
2393 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2394
2395 if (fixp->fx_size == 1)
2396 * where = value & 0xff;
2397 else if (fixp->fx_size == 2)
2398 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2399 else if (fixp->fx_size == 4)
2400 bfd_putl32 (value, (unsigned char *) where);
2401 }
2402
2403 fixp->fx_addnumber = value;
2404 return 1;
2405}
2406
2407\f
2408/* Parse a cons expression. We have to handle hi(), lo(), etc
2409 on the v850. */
2410void
2411parse_cons_expression_v850 (exp)
d6c497c7 2412 expressionS * exp;
252b5132
RH
2413{
2414 /* See if there's a reloc prefix like hi() we have to handle. */
2415 hold_cons_reloc = v850_reloc_prefix (NULL);
2416
2417 /* Do normal expression parsing. */
2418 expression (exp);
2419}
2420
2421/* Create a fixup for a cons expression. If parse_cons_expression_v850
2422 found a reloc prefix, then we use that reloc, else we choose an
2423 appropriate one based on the size of the expression. */
2424void
2425cons_fix_new_v850 (frag, where, size, exp)
d6c497c7 2426 fragS * frag;
252b5132
RH
2427 int where;
2428 int size;
2429 expressionS *exp;
2430{
2431 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2432 {
2433 if (size == 4)
2434 hold_cons_reloc = BFD_RELOC_32;
2435 if (size == 2)
2436 hold_cons_reloc = BFD_RELOC_16;
2437 if (size == 1)
2438 hold_cons_reloc = BFD_RELOC_8;
2439 }
2440
2441 if (exp != NULL)
2442 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2443 else
2444 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2445}
d6c497c7 2446
252b5132
RH
2447boolean
2448v850_fix_adjustable (fixP)
d6c497c7 2449 fixS * fixP;
252b5132 2450{
252b5132
RH
2451 if (fixP->fx_addsy == NULL)
2452 return 1;
2453
2454 /* Prevent all adjustments to global symbols. */
2455 if (S_IS_EXTERN (fixP->fx_addsy))
2456 return 0;
d6c497c7 2457
5480ccf3 2458 /* Similarly for weak symbols. */
252b5132
RH
2459 if (S_IS_WEAK (fixP->fx_addsy))
2460 return 0;
d6c497c7 2461
252b5132
RH
2462 /* Don't adjust function names */
2463 if (S_IS_FUNCTION (fixP->fx_addsy))
2464 return 0;
2465
2466 /* We need the symbol name for the VTABLE entries */
d6c497c7 2467 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2468 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2469 return 0;
d6c497c7 2470
252b5132
RH
2471 return 1;
2472}
2473
2474int
d6c497c7
NC
2475v850_force_relocation (fixP)
2476 struct fix * fixP;
252b5132 2477{
d6c497c7
NC
2478 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2479 return 1;
2480
2481 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2482 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132
RH
2483 return 1;
2484
2485 return 0;
2486}