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9622b051 1@c Copyright 2001, 2002, 2003, 2005, 2006
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2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node PPC-Dependent
8@chapter PowerPC Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter PowerPC Dependent Features
13@end ifclear
14
15@cindex PowerPC support
16@menu
17* PowerPC-Opts:: Options
f22b3caf 18* PowerPC-Pseudo:: PowerPC Assembler Directives
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19@end menu
20
21@node PowerPC-Opts
22@section Options
23
24@cindex options for PowerPC
25@cindex PowerPC options
26@cindex architectures, PowerPC
27@cindex PowerPC architectures
28The PowerPC chip family includes several successive levels, using the same
29core instruction set, but including a few additional instructions at
30each level. There are exceptions to this however. For details on what
31instructions each variant supports, please see the chip's architecture
32reference manual.
33
34The following table lists all available PowerPC options.
35
36@table @code
37@item -mpwrx | -mpwr2
23e1d84c 38Generate code for POWER/2 (RIOS2).
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39
40@item -mpwr
23e1d84c 41Generate code for POWER (RIOS1)
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42
43@item -m601
23e1d84c 44Generate code for PowerPC 601.
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45
46@item -mppc, -mppc32, -m603, -m604
23e1d84c 47Generate code for PowerPC 603/604.
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48
49@item -m403, -m405
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50Generate code for PowerPC 403/405.
51
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52@item -m440
53Generate code for PowerPC 440. BookE and some 405 instructions.
54
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55@item -m7400, -m7410, -m7450, -m7455
56Generate code for PowerPC 7400/7410/7450/7455.
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57
58@item -mppc64, -m620
23e1d84c 59Generate code for PowerPC 620/625/630.
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60
61@item -mppc64bridge
62Generate code for PowerPC 64, including bridge insns.
63
64@item -mbooke64
23e1d84c 65Generate code for 64-bit BookE.
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66
67@item -mbooke, mbooke32
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68Generate code for 32-bit BookE.
69
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70@item -me300
71Generate code for PowerPC e300 family.
72
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73@item -maltivec
74Generate code for processors with AltiVec instructions.
75
76@item -mpower4
77Generate code for Power4 architecture.
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79@item -mpower5
80Generate code for Power5 architecture.
81
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82@item -mpower6
83Generate code for Power6 architecture.
84
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85@item -mcom
86Generate code Power/PowerPC common instructions.
87
88@item -many
89Generate code for any architecture (PWR/PWRX/PPC).
90
91@item -mregnames
92Allow symbolic names for registers.
93
94@item -mno-regnames
95Do not allow symbolic names for registers.
96
97@item -mrelocatable
b45619c0 98Support for GCC's -mrelocatable option.
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99
100@item -mrelocatable-lib
b45619c0 101Support for GCC's -mrelocatable-lib option.
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102
103@item -memb
104Set PPC_EMB bit in ELF flags.
105
106@item -mlittle, -mlittle-endian
107Generate code for a little endian machine.
108
109@item -mbig, -mbig-endian
110Generate code for a big endian machine.
111
112@item -msolaris
113Generate code for Solaris.
114
115@item -mno-solaris
116Do not generate code for Solaris.
117@end table
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118
119
120@node PowerPC-Pseudo
121@section PowerPC Assembler Directives
122
123@cindex directives for PowerPC
124@cindex PowerPC directives
125A number of assembler directives are available for PowerPC. The
126following table is far from complete.
127
128@table @code
129@item .machine "string"
130This directive allows you to change the machine for which code is
131generated. @code{"string"} may be any of the -m cpu selection options
132(without the -m) enclosed in double quotes, @code{"push"}, or
133@code{"pop"}. @code{.machine "push"} saves the currently selected
134cpu, which may be restored with @code{.machine "pop"}.
135@end table