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| Commit | Line | Data |
|---|---|---|
| 4b6da8e7 | 1 | /* Tuning model description for AArch64 architecture. |
| a945c346 | 2 | Copyright (C) 2009-2024 Free Software Foundation, Inc. |
| 4b6da8e7 TC |
3 | |
| 4 | This file is part of GCC. | |
| 5 | ||
| 6 | GCC is free software; you can redistribute it and/or modify it | |
| 7 | under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 3, or (at your option) | |
| 9 | any later version. | |
| 10 | ||
| 11 | GCC is distributed in the hope that it will be useful, but | |
| 12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 14 | General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with GCC; see the file COPYING3. If not see | |
| 18 | <http://www.gnu.org/licenses/>. */ | |
| 19 | ||
| 20 | #ifndef GCC_AARCH64_H_CORTEXA57 | |
| 21 | #define GCC_AARCH64_H_CORTEXA57 | |
| 22 | ||
| 23 | #include "generic.h" | |
| 24 | ||
| 25 | static const struct cpu_regmove_cost cortexa57_regmove_cost = | |
| 26 | { | |
| 27 | 1, /* GP2GP */ | |
| 28 | /* Avoid the use of slow int<->fp moves for spilling by setting | |
| 29 | their cost higher than memmov_cost. */ | |
| 30 | 5, /* GP2FP */ | |
| 31 | 5, /* FP2GP */ | |
| 32 | 2 /* FP2FP */ | |
| 33 | }; | |
| 34 | ||
| 35 | static const advsimd_vec_cost cortexa57_advsimd_vector_cost = | |
| 36 | { | |
| 37 | 2, /* int_stmt_cost */ | |
| 38 | 2, /* fp_stmt_cost */ | |
| 39 | 0, /* ld2_st2_permute_cost */ | |
| 40 | 0, /* ld3_st3_permute_cost */ | |
| 41 | 0, /* ld4_st4_permute_cost */ | |
| 42 | 3, /* permute_cost */ | |
| 43 | 8, /* reduc_i8_cost */ | |
| 44 | 8, /* reduc_i16_cost */ | |
| 45 | 8, /* reduc_i32_cost */ | |
| 46 | 8, /* reduc_i64_cost */ | |
| 47 | 8, /* reduc_f16_cost */ | |
| 48 | 8, /* reduc_f32_cost */ | |
| 49 | 8, /* reduc_f64_cost */ | |
| 50 | 8, /* store_elt_extra_cost */ | |
| 51 | 8, /* vec_to_scalar_cost */ | |
| 52 | 8, /* scalar_to_vec_cost */ | |
| 53 | 4, /* align_load_cost */ | |
| 54 | 4, /* unalign_load_cost */ | |
| 55 | 1, /* unalign_store_cost */ | |
| 56 | 1 /* store_cost */ | |
| 57 | }; | |
| 58 | ||
| 59 | /* Cortex-A57 costs for vector insn classes. */ | |
| 60 | static const struct cpu_vector_cost cortexa57_vector_cost = | |
| 61 | { | |
| 62 | 1, /* scalar_int_stmt_cost */ | |
| 63 | 1, /* scalar_fp_stmt_cost */ | |
| 64 | 4, /* scalar_load_cost */ | |
| 65 | 1, /* scalar_store_cost */ | |
| 66 | 1, /* cond_taken_branch_cost */ | |
| 67 | 1, /* cond_not_taken_branch_cost */ | |
| 68 | &cortexa57_advsimd_vector_cost, /* advsimd */ | |
| 69 | nullptr, /* sve */ | |
| 70 | nullptr /* issue_info */ | |
| 71 | }; | |
| 72 | ||
| 73 | static const struct tune_params cortexa57_tunings = | |
| 74 | { | |
| 75 | &cortexa57_extra_costs, | |
| 76 | &generic_addrcost_table, | |
| 77 | &cortexa57_regmove_cost, | |
| 78 | &cortexa57_vector_cost, | |
| 79 | &generic_branch_cost, | |
| 80 | &generic_approx_modes, | |
| 81 | SVE_NOT_IMPLEMENTED, /* sve_width */ | |
| 82 | { 4, /* load_int. */ | |
| 83 | 4, /* store_int. */ | |
| 84 | 4, /* load_fp. */ | |
| 85 | 4, /* store_fp. */ | |
| 86 | 4, /* load_pred. */ | |
| 87 | 4 /* store_pred. */ | |
| 88 | }, /* memmov_cost. */ | |
| 89 | 3, /* issue_rate */ | |
| 90 | (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | |
| 91 | | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ | |
| 92 | "16", /* function_align. */ | |
| 93 | "4", /* jump_align. */ | |
| 94 | "8", /* loop_align. */ | |
| 95 | 2, /* int_reassoc_width. */ | |
| 96 | 4, /* fp_reassoc_width. */ | |
| 97 | 1, /* fma_reassoc_width. */ | |
| 98 | 1, /* vec_reassoc_width. */ | |
| 99 | 2, /* min_div_recip_mul_sf. */ | |
| 100 | 2, /* min_div_recip_mul_df. */ | |
| 101 | 0, /* max_case_values. */ | |
| 102 | tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ | |
| 103 | (AARCH64_EXTRA_TUNE_RENAME_FMA_REGS), /* tune_flags. */ | |
| 104 | &generic_prefetch_tune, | |
| 105 | AARCH64_LDP_STP_POLICY_ALWAYS, /* ldp_policy_model. */ | |
| 106 | AARCH64_LDP_STP_POLICY_ALWAYS /* stp_policy_model. */ | |
| 107 | }; | |
| 108 | ||
| 109 | #endif /* GCC_AARCH64_H_CORTEXA57. */ |