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201312c2 | 1 | ;; Predicate definitions for DEC Alpha. |
7adcbafe | 2 | ;; Copyright (C) 2004-2022 Free Software Foundation, Inc. |
201312c2 RH |
3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ;; | |
6 | ;; GCC is free software; you can redistribute it and/or modify | |
7 | ;; it under the terms of the GNU General Public License as published by | |
2f83c7d6 | 8 | ;; the Free Software Foundation; either version 3, or (at your option) |
201312c2 RH |
9 | ;; any later version. |
10 | ;; | |
11 | ;; GCC is distributed in the hope that it will be useful, | |
12 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ;; GNU General Public License for more details. | |
15 | ;; | |
16 | ;; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
17 | ;; along with GCC; see the file COPYING3. If not see |
18 | ;; <http://www.gnu.org/licenses/>. | |
201312c2 RH |
19 | |
20 | ;; Return 1 if OP is the zero constant for MODE. | |
21 | (define_predicate "const0_operand" | |
f06ed650 | 22 | (and (match_code "const_int,const_wide_int,const_double,const_vector") |
201312c2 RH |
23 | (match_test "op == CONST0_RTX (mode)"))) |
24 | ||
25 | ;; Returns true if OP is either the constant zero or a register. | |
26 | (define_predicate "reg_or_0_operand" | |
27 | (ior (match_operand 0 "register_operand") | |
28 | (match_operand 0 "const0_operand"))) | |
29 | ||
30 | ;; Return 1 if OP is a constant in the range of 0-63 (for a shift) or | |
31 | ;; any register. | |
32 | (define_predicate "reg_or_6bit_operand" | |
33 | (if_then_else (match_code "const_int") | |
34 | (match_test "INTVAL (op) >= 0 && INTVAL (op) < 64") | |
35 | (match_operand 0 "register_operand"))) | |
36 | ||
37 | ;; Return 1 if OP is an 8-bit constant. | |
38 | (define_predicate "cint8_operand" | |
39 | (and (match_code "const_int") | |
40 | (match_test "INTVAL (op) >= 0 && INTVAL (op) < 256"))) | |
41 | ||
42 | ;; Return 1 if OP is an 8-bit constant or any register. | |
43 | (define_predicate "reg_or_8bit_operand" | |
44 | (if_then_else (match_code "const_int") | |
45 | (match_test "INTVAL (op) >= 0 && INTVAL (op) < 256") | |
46 | (match_operand 0 "register_operand"))) | |
47 | ||
48 | ;; Return 1 if OP is a constant or any register. | |
49 | (define_predicate "reg_or_cint_operand" | |
50 | (ior (match_operand 0 "register_operand") | |
51 | (match_operand 0 "const_int_operand"))) | |
52 | ||
53 | ;; Return 1 if the operand is a valid second operand to an add insn. | |
54 | (define_predicate "add_operand" | |
55 | (if_then_else (match_code "const_int") | |
dfcbeaa5 | 56 | (match_test "satisfies_constraint_K (op) || satisfies_constraint_L (op)") |
201312c2 RH |
57 | (match_operand 0 "register_operand"))) |
58 | ||
59 | ;; Return 1 if the operand is a valid second operand to a | |
60 | ;; sign-extending add insn. | |
61 | (define_predicate "sext_add_operand" | |
62 | (if_then_else (match_code "const_int") | |
dfcbeaa5 | 63 | (match_test "satisfies_constraint_I (op) || satisfies_constraint_O (op)") |
201312c2 RH |
64 | (match_operand 0 "register_operand"))) |
65 | ||
72910a0b RH |
66 | ;; Return 1 if the operand is a non-symbolic constant operand that |
67 | ;; does not satisfy add_operand. | |
68 | (define_predicate "non_add_const_operand" | |
f06ed650 | 69 | (and (match_code "const_int,const_wide_int,const_double,const_vector") |
72910a0b RH |
70 | (not (match_operand 0 "add_operand")))) |
71 | ||
a4d05547 | 72 | ;; Return 1 if the operand is a non-symbolic, nonzero constant operand. |
72910a0b | 73 | (define_predicate "non_zero_const_operand" |
f06ed650 | 74 | (and (match_code "const_int,const_wide_int,const_double,const_vector") |
c799797d | 75 | (not (match_test "op == CONST0_RTX (mode)")))) |
72910a0b | 76 | |
fc47a2fd UB |
77 | ;; Return 1 if OP is the constant 1, 2 or 3. |
78 | (define_predicate "const123_operand" | |
79 | (and (match_code "const_int") | |
80 | (match_test "IN_RANGE (INTVAL (op), 1, 3)"))) | |
81 | ||
02ea1c76 UB |
82 | ;; Return 1 if OP is the constant 2 or 3. |
83 | (define_predicate "const23_operand" | |
84 | (and (match_code "const_int") | |
85 | (match_test "INTVAL (op) == 2 || INTVAL (op) == 3"))) | |
86 | ||
201312c2 RH |
87 | ;; Return 1 if OP is the constant 4 or 8. |
88 | (define_predicate "const48_operand" | |
89 | (and (match_code "const_int") | |
90 | (match_test "INTVAL (op) == 4 || INTVAL (op) == 8"))) | |
91 | ||
92 | ;; Return 1 if OP is a valid first operand to an AND insn. | |
93 | (define_predicate "and_operand" | |
94 | (if_then_else (match_code "const_int") | |
95 | (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 | |
96 | || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100 | |
97 | || zap_mask (INTVAL (op))") | |
f06ed650 | 98 | (match_operand 0 "register_operand"))) |
201312c2 RH |
99 | |
100 | ;; Return 1 if OP is a valid first operand to an IOR or XOR insn. | |
101 | (define_predicate "or_operand" | |
102 | (if_then_else (match_code "const_int") | |
103 | (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 | |
104 | || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100") | |
105 | (match_operand 0 "register_operand"))) | |
106 | ||
107 | ;; Return 1 if OP is a constant that is the width, in bits, of an integral | |
108 | ;; mode not larger than DImode. | |
109 | (define_predicate "mode_width_operand" | |
110 | (match_code "const_int") | |
111 | { | |
112 | HOST_WIDE_INT i = INTVAL (op); | |
113 | return i == 8 || i == 16 || i == 32 || i == 64; | |
114 | }) | |
115 | ||
116 | ;; Return 1 if OP is a constant that is a mask of ones of width of an | |
117 | ;; integral machine mode not larger than DImode. | |
118 | (define_predicate "mode_mask_operand" | |
c37aa43b | 119 | (match_code "const_int") |
201312c2 | 120 | { |
c37aa43b UB |
121 | HOST_WIDE_INT value = INTVAL (op); |
122 | ||
123 | if (value == 0xff) | |
124 | return 1; | |
125 | if (value == 0xffff) | |
126 | return 1; | |
127 | if (value == 0xffffffff) | |
128 | return 1; | |
129 | if (value == -1) | |
130 | return 1; | |
131 | ||
201312c2 RH |
132 | return 0; |
133 | }) | |
134 | ||
135 | ;; Return 1 if OP is a multiple of 8 less than 64. | |
136 | (define_predicate "mul8_operand" | |
137 | (match_code "const_int") | |
138 | { | |
139 | unsigned HOST_WIDE_INT i = INTVAL (op); | |
140 | return i < 64 && i % 8 == 0; | |
141 | }) | |
142 | ||
143 | ;; Return 1 if OP is a hard floating-point register. | |
144 | (define_predicate "hard_fp_register_operand" | |
145 | (match_operand 0 "register_operand") | |
146 | { | |
e4e040f1 | 147 | if (SUBREG_P (op)) |
201312c2 RH |
148 | op = SUBREG_REG (op); |
149 | return REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS; | |
150 | }) | |
151 | ||
152 | ;; Return 1 if OP is a hard general register. | |
153 | (define_predicate "hard_int_register_operand" | |
154 | (match_operand 0 "register_operand") | |
155 | { | |
e4e040f1 | 156 | if (SUBREG_P (op)) |
201312c2 RH |
157 | op = SUBREG_REG (op); |
158 | return REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS; | |
159 | }) | |
160 | ||
201312c2 RH |
161 | ;; Return 1 if OP is a valid operand for the source of a move insn. |
162 | (define_predicate "input_operand" | |
c799797d | 163 | (match_operand 0 "general_operand") |
201312c2 RH |
164 | { |
165 | switch (GET_CODE (op)) | |
166 | { | |
167 | case LABEL_REF: | |
168 | case SYMBOL_REF: | |
169 | case CONST: | |
170 | if (TARGET_EXPLICIT_RELOCS) | |
171 | { | |
172 | /* We don't split symbolic operands into something unintelligable | |
173 | until after reload, but we do not wish non-small, non-global | |
174 | symbolic operands to be reconstructed from their high/lo_sum | |
175 | form. */ | |
176 | return (small_symbolic_operand (op, mode) | |
177 | || global_symbolic_operand (op, mode) | |
178 | || gotdtp_symbolic_operand (op, mode) | |
179 | || gottp_symbolic_operand (op, mode)); | |
180 | } | |
6abe71eb RH |
181 | /* VMS still has a 32-bit mode. */ |
182 | return mode == ptr_mode || mode == Pmode; | |
201312c2 RH |
183 | |
184 | case HIGH: | |
185 | return (TARGET_EXPLICIT_RELOCS | |
186 | && local_symbolic_operand (XEXP (op, 0), mode)); | |
187 | ||
188 | case REG: | |
189 | return 1; | |
190 | ||
191 | case SUBREG: | |
192 | if (register_operand (op, mode)) | |
193 | return 1; | |
bc240abc | 194 | /* fall through */ |
201312c2 RH |
195 | case MEM: |
196 | return ((TARGET_BWX || (mode != HImode && mode != QImode)) | |
197 | && general_operand (op, mode)); | |
198 | ||
f06ed650 | 199 | case CONST_WIDE_INT: |
201312c2 | 200 | case CONST_DOUBLE: |
72910a0b RH |
201 | return op == CONST0_RTX (mode); |
202 | ||
201312c2 | 203 | case CONST_VECTOR: |
72910a0b | 204 | if (reload_in_progress || reload_completed) |
1a627b35 | 205 | return alpha_legitimate_constant_p (mode, op); |
201312c2 RH |
206 | return op == CONST0_RTX (mode); |
207 | ||
208 | case CONST_INT: | |
72910a0b RH |
209 | if (mode == QImode || mode == HImode) |
210 | return true; | |
211 | if (reload_in_progress || reload_completed) | |
1a627b35 | 212 | return alpha_legitimate_constant_p (mode, op); |
72910a0b | 213 | return add_operand (op, mode); |
201312c2 RH |
214 | |
215 | default: | |
56daab84 | 216 | gcc_unreachable (); |
201312c2 RH |
217 | } |
218 | return 0; | |
219 | }) | |
220 | ||
221 | ;; Return 1 if OP is a SYMBOL_REF for a function known to be in this | |
222 | ;; file, and in the same section as the current function. | |
223 | ||
224 | (define_predicate "samegp_function_operand" | |
225 | (match_code "symbol_ref") | |
226 | { | |
227 | /* Easy test for recursion. */ | |
228 | if (op == XEXP (DECL_RTL (current_function_decl), 0)) | |
229 | return true; | |
230 | ||
231 | /* Functions that are not local can be overridden, and thus may | |
232 | not share the same gp. */ | |
233 | if (! SYMBOL_REF_LOCAL_P (op)) | |
234 | return false; | |
235 | ||
236 | /* If -msmall-data is in effect, assume that there is only one GP | |
237 | for the module, and so any local symbol has this property. We | |
238 | need explicit relocations to be able to enforce this for symbols | |
239 | not defined in this unit of translation, however. */ | |
240 | if (TARGET_EXPLICIT_RELOCS && TARGET_SMALL_DATA) | |
241 | return true; | |
242 | ||
243 | /* Functions that are not external are defined in this UoT, | |
244 | and thus must share the same gp. */ | |
245 | return ! SYMBOL_REF_EXTERNAL_P (op); | |
246 | }) | |
247 | ||
248 | ;; Return 1 if OP is a SYMBOL_REF for which we can make a call via bsr. | |
249 | (define_predicate "direct_call_operand" | |
250 | (match_operand 0 "samegp_function_operand") | |
251 | { | |
201312c2 | 252 | /* If profiling is implemented via linker tricks, we can't jump |
e3b5732b | 253 | to the nogp alternate entry point. Note that crtl->profile |
201312c2 RH |
254 | would not be correct, since that doesn't indicate if the target |
255 | function uses profiling. */ | |
256 | /* ??? TARGET_PROFILING_NEEDS_GP isn't really the right test, | |
257 | but is approximately correct for the OSF ABIs. Don't know | |
258 | what to do for VMS, NT, or UMK. */ | |
259 | if (!TARGET_PROFILING_NEEDS_GP && profile_flag) | |
260 | return false; | |
261 | ||
262 | /* Must be a function. In some cases folks create thunks in static | |
263 | data structures and then make calls to them. If we allow the | |
264 | direct call, we'll get an error from the linker about !samegp reloc | |
265 | against a symbol without a .prologue directive. */ | |
266 | if (!SYMBOL_REF_FUNCTION_P (op)) | |
267 | return false; | |
268 | ||
269 | /* Must be "near" so that the branch is assumed to reach. With | |
270 | -msmall-text, this is assumed true of all local symbols. Since | |
271 | we've already checked samegp, locality is already assured. */ | |
272 | if (TARGET_SMALL_TEXT) | |
273 | return true; | |
274 | ||
ce87131a | 275 | return false; |
201312c2 RH |
276 | }) |
277 | ||
278 | ;; Return 1 if OP is a valid operand for the MEM of a CALL insn. | |
279 | ;; | |
280 | ;; For TARGET_ABI_OSF, we want to restrict to R27 or a pseudo. | |
201312c2 RH |
281 | |
282 | (define_predicate "call_operand" | |
75db85d8 RH |
283 | (ior (match_code "symbol_ref") |
284 | (and (match_code "reg") | |
c799797d UB |
285 | (ior (not (match_test "TARGET_ABI_OSF")) |
286 | (not (match_test "HARD_REGISTER_P (op)")) | |
75db85d8 | 287 | (match_test "REGNO (op) == R27_REG"))))) |
201312c2 RH |
288 | |
289 | ;; Return true if OP is a LABEL_REF, or SYMBOL_REF or CONST referencing | |
290 | ;; a (non-tls) variable known to be defined in this file. | |
291 | (define_predicate "local_symbolic_operand" | |
292 | (match_code "label_ref,const,symbol_ref") | |
293 | { | |
201312c2 RH |
294 | if (GET_CODE (op) == CONST |
295 | && GET_CODE (XEXP (op, 0)) == PLUS | |
7d83f4f5 | 296 | && CONST_INT_P (XEXP (XEXP (op, 0), 1))) |
201312c2 RH |
297 | op = XEXP (XEXP (op, 0), 0); |
298 | ||
4c48007b UB |
299 | if (GET_CODE (op) == LABEL_REF) |
300 | return 1; | |
301 | ||
201312c2 RH |
302 | if (GET_CODE (op) != SYMBOL_REF) |
303 | return 0; | |
304 | ||
dec6909b RH |
305 | return (SYMBOL_REF_LOCAL_P (op) |
306 | && !SYMBOL_REF_WEAK (op) | |
307 | && !SYMBOL_REF_TLS_MODEL (op)); | |
201312c2 RH |
308 | }) |
309 | ||
310 | ;; Return true if OP is a SYMBOL_REF or CONST referencing a variable | |
311 | ;; known to be defined in this file in the small data area. | |
312 | (define_predicate "small_symbolic_operand" | |
313 | (match_code "const,symbol_ref") | |
314 | { | |
d75171f3 RH |
315 | HOST_WIDE_INT ofs = 0, max_ofs = 0; |
316 | ||
201312c2 | 317 | if (! TARGET_SMALL_DATA) |
d75171f3 | 318 | return false; |
201312c2 RH |
319 | |
320 | if (GET_CODE (op) == CONST | |
321 | && GET_CODE (XEXP (op, 0)) == PLUS | |
7d83f4f5 | 322 | && CONST_INT_P (XEXP (XEXP (op, 0), 1))) |
d75171f3 RH |
323 | { |
324 | ofs = INTVAL (XEXP (XEXP (op, 0), 1)); | |
325 | op = XEXP (XEXP (op, 0), 0); | |
326 | } | |
201312c2 RH |
327 | |
328 | if (GET_CODE (op) != SYMBOL_REF) | |
d75171f3 | 329 | return false; |
201312c2 RH |
330 | |
331 | /* ??? There's no encode_section_info equivalent for the rtl | |
332 | constant pool, so SYMBOL_FLAG_SMALL never gets set. */ | |
333 | if (CONSTANT_POOL_ADDRESS_P (op)) | |
d75171f3 RH |
334 | { |
335 | max_ofs = GET_MODE_SIZE (get_pool_mode (op)); | |
336 | if (max_ofs > g_switch_value) | |
337 | return false; | |
338 | } | |
339 | else if (SYMBOL_REF_LOCAL_P (op) | |
340 | && SYMBOL_REF_SMALL_P (op) | |
341 | && !SYMBOL_REF_WEAK (op) | |
342 | && !SYMBOL_REF_TLS_MODEL (op)) | |
343 | { | |
344 | if (SYMBOL_REF_DECL (op)) | |
ae7e9ddd | 345 | max_ofs = tree_to_uhwi (DECL_SIZE_UNIT (SYMBOL_REF_DECL (op))); |
d75171f3 RH |
346 | } |
347 | else | |
348 | return false; | |
201312c2 | 349 | |
d75171f3 RH |
350 | /* Given that we know that the GP is always 8 byte aligned, we can |
351 | always adjust by 7 without overflowing. */ | |
352 | if (max_ofs < 8) | |
353 | max_ofs = 8; | |
354 | ||
355 | /* Since we know this is an object in a small data section, we know the | |
356 | entire section is addressable via GP. We don't know where the section | |
357 | boundaries are, but we know the entire object is within. */ | |
358 | return IN_RANGE (ofs, 0, max_ofs - 1); | |
201312c2 RH |
359 | }) |
360 | ||
361 | ;; Return true if OP is a SYMBOL_REF or CONST referencing a variable | |
362 | ;; not known (or known not) to be defined in this file. | |
363 | (define_predicate "global_symbolic_operand" | |
364 | (match_code "const,symbol_ref") | |
365 | { | |
366 | if (GET_CODE (op) == CONST | |
367 | && GET_CODE (XEXP (op, 0)) == PLUS | |
7d83f4f5 | 368 | && CONST_INT_P (XEXP (XEXP (op, 0), 1))) |
201312c2 RH |
369 | op = XEXP (XEXP (op, 0), 0); |
370 | ||
371 | if (GET_CODE (op) != SYMBOL_REF) | |
372 | return 0; | |
373 | ||
b0100a44 RH |
374 | return ((!SYMBOL_REF_LOCAL_P (op) || SYMBOL_REF_WEAK (op)) |
375 | && !SYMBOL_REF_TLS_MODEL (op)); | |
201312c2 RH |
376 | }) |
377 | ||
378 | ;; Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref, | |
379 | ;; possibly with an offset. | |
380 | (define_predicate "symbolic_operand" | |
381 | (ior (match_code "symbol_ref,label_ref") | |
382 | (and (match_code "const") | |
c799797d UB |
383 | (match_code "plus" "0") |
384 | (match_code "symbol_ref,label_ref" "00") | |
385 | (match_code "const_int" "01")))) | |
201312c2 RH |
386 | |
387 | ;; Return true if OP is valid for 16-bit DTP relative relocations. | |
388 | (define_predicate "dtp16_symbolic_operand" | |
389 | (and (match_code "const") | |
390 | (match_test "tls_symbolic_operand_1 (op, 16, UNSPEC_DTPREL)"))) | |
391 | ||
392 | ;; Return true if OP is valid for 32-bit DTP relative relocations. | |
393 | (define_predicate "dtp32_symbolic_operand" | |
394 | (and (match_code "const") | |
395 | (match_test "tls_symbolic_operand_1 (op, 32, UNSPEC_DTPREL)"))) | |
396 | ||
397 | ;; Return true if OP is valid for 64-bit DTP relative relocations. | |
398 | (define_predicate "gotdtp_symbolic_operand" | |
399 | (and (match_code "const") | |
400 | (match_test "tls_symbolic_operand_1 (op, 64, UNSPEC_DTPREL)"))) | |
401 | ||
402 | ;; Return true if OP is valid for 16-bit TP relative relocations. | |
403 | (define_predicate "tp16_symbolic_operand" | |
404 | (and (match_code "const") | |
405 | (match_test "tls_symbolic_operand_1 (op, 16, UNSPEC_TPREL)"))) | |
406 | ||
407 | ;; Return true if OP is valid for 32-bit TP relative relocations. | |
408 | (define_predicate "tp32_symbolic_operand" | |
409 | (and (match_code "const") | |
410 | (match_test "tls_symbolic_operand_1 (op, 32, UNSPEC_TPREL)"))) | |
411 | ||
412 | ;; Return true if OP is valid for 64-bit TP relative relocations. | |
413 | (define_predicate "gottp_symbolic_operand" | |
414 | (and (match_code "const") | |
415 | (match_test "tls_symbolic_operand_1 (op, 64, UNSPEC_TPREL)"))) | |
416 | ||
417 | ;; Return 1 if this memory address is a known aligned register plus | |
418 | ;; a constant. It must be a valid address. This means that we can do | |
419 | ;; this as an aligned reference plus some offset. | |
420 | ;; | |
421 | ;; Take into account what reload will do. Oh god this is awful. | |
422 | ;; The horrible comma-operator construct below is to prevent genrecog | |
423 | ;; from thinking that this predicate accepts REG and SUBREG. We don't | |
424 | ;; use recog during reload, so pretending these codes are accepted | |
425 | ;; pessimizes things a tad. | |
426 | ||
48f46219 | 427 | (define_special_predicate "aligned_memory_operand" |
201312c2 RH |
428 | (ior (match_test "op = resolve_reload_operand (op), 0") |
429 | (match_code "mem")) | |
430 | { | |
431 | rtx base; | |
f249b405 | 432 | int offset; |
201312c2 RH |
433 | |
434 | if (MEM_ALIGN (op) >= 32) | |
435 | return 1; | |
02143d0b | 436 | |
201312c2 RH |
437 | op = XEXP (op, 0); |
438 | ||
439 | /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) | |
440 | sorts of constructs. Dig for the real base register. */ | |
441 | if (reload_in_progress | |
442 | && GET_CODE (op) == PLUS | |
443 | && GET_CODE (XEXP (op, 0)) == PLUS) | |
f249b405 UB |
444 | { |
445 | base = XEXP (XEXP (op, 0), 0); | |
446 | offset = INTVAL (XEXP (op, 1)); | |
447 | } | |
201312c2 RH |
448 | else |
449 | { | |
450 | if (! memory_address_p (mode, op)) | |
451 | return 0; | |
f249b405 UB |
452 | if (GET_CODE (op) == PLUS) |
453 | { | |
454 | base = XEXP (op, 0); | |
455 | offset = INTVAL (XEXP (op, 1)); | |
456 | } | |
457 | else | |
458 | { | |
459 | base = op; | |
460 | offset = 0; | |
461 | } | |
201312c2 RH |
462 | } |
463 | ||
f249b405 UB |
464 | if (offset % GET_MODE_SIZE (mode)) |
465 | return 0; | |
466 | ||
7d83f4f5 | 467 | return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) >= 32); |
201312c2 RH |
468 | }) |
469 | ||
470 | ;; Similar, but return 1 if OP is a MEM which is not alignable. | |
471 | ||
48f46219 | 472 | (define_special_predicate "unaligned_memory_operand" |
201312c2 RH |
473 | (ior (match_test "op = resolve_reload_operand (op), 0") |
474 | (match_code "mem")) | |
475 | { | |
476 | rtx base; | |
f249b405 | 477 | int offset; |
201312c2 RH |
478 | |
479 | if (MEM_ALIGN (op) >= 32) | |
480 | return 0; | |
02143d0b | 481 | |
201312c2 RH |
482 | op = XEXP (op, 0); |
483 | ||
484 | /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) | |
485 | sorts of constructs. Dig for the real base register. */ | |
486 | if (reload_in_progress | |
487 | && GET_CODE (op) == PLUS | |
488 | && GET_CODE (XEXP (op, 0)) == PLUS) | |
f249b405 UB |
489 | { |
490 | base = XEXP (XEXP (op, 0), 0); | |
491 | offset = INTVAL (XEXP (op, 1)); | |
492 | } | |
201312c2 RH |
493 | else |
494 | { | |
495 | if (! memory_address_p (mode, op)) | |
496 | return 0; | |
f249b405 UB |
497 | if (GET_CODE (op) == PLUS) |
498 | { | |
499 | base = XEXP (op, 0); | |
500 | offset = INTVAL (XEXP (op, 1)); | |
501 | } | |
502 | else | |
503 | { | |
504 | base = op; | |
505 | offset = 0; | |
506 | } | |
201312c2 RH |
507 | } |
508 | ||
f249b405 UB |
509 | if (offset % GET_MODE_SIZE (mode)) |
510 | return 1; | |
511 | ||
7d83f4f5 | 512 | return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) < 32); |
201312c2 RH |
513 | }) |
514 | ||
515 | ;; Return 1 if OP is any memory location. During reload a pseudo matches. | |
48f46219 RH |
516 | (define_special_predicate "any_memory_operand" |
517 | (match_code "mem,reg,subreg") | |
518 | { | |
e4e040f1 | 519 | if (SUBREG_P (op)) |
48f46219 | 520 | op = SUBREG_REG (op); |
201312c2 | 521 | |
48f46219 RH |
522 | if (MEM_P (op)) |
523 | return true; | |
524 | if (reload_in_progress && REG_P (op)) | |
525 | { | |
526 | unsigned regno = REGNO (op); | |
527 | if (HARD_REGISTER_NUM_P (regno)) | |
528 | return false; | |
529 | else | |
530 | return reg_renumber[regno] < 0; | |
531 | } | |
532 | ||
533 | return false; | |
534 | }) | |
201312c2 | 535 | |
201312c2 RH |
536 | ;; Returns 1 if OP is not an eliminable register. |
537 | ;; | |
56daab84 | 538 | ;; This exists to cure a pathological failure in the s8addq (et al) patterns, |
201312c2 RH |
539 | ;; |
540 | ;; long foo () { long t; bar(); return (long) &t * 26107; } | |
541 | ;; | |
542 | ;; which run afoul of a hack in reload to cure a (presumably) similar | |
543 | ;; problem with lea-type instructions on other targets. But there is | |
544 | ;; one of us and many of them, so work around the problem by selectively | |
545 | ;; preventing combine from making the optimization. | |
546 | ||
547 | (define_predicate "reg_not_elim_operand" | |
548 | (match_operand 0 "register_operand") | |
549 | { | |
e4e040f1 | 550 | if (SUBREG_P (op)) |
201312c2 RH |
551 | op = SUBREG_REG (op); |
552 | return op != frame_pointer_rtx && op != arg_pointer_rtx; | |
553 | }) | |
554 | ||
555 | ;; Accept a register, but not a subreg of any kind. This allows us to | |
556 | ;; avoid pathological cases in reload wrt data movement common in | |
557 | ;; int->fp conversion. */ | |
558 | (define_predicate "reg_no_subreg_operand" | |
559 | (and (match_code "reg") | |
560 | (match_operand 0 "register_operand"))) | |
561 | ||
f90b7a5a PB |
562 | ;; Return 1 if OP is a valid Alpha comparison operator for "cbranch" |
563 | ;; instructions. | |
564 | (define_predicate "alpha_cbranch_operator" | |
565 | (ior (match_operand 0 "ordered_comparison_operator") | |
566 | (match_code "ordered,unordered"))) | |
567 | ||
201312c2 RH |
568 | ;; Return 1 if OP is a valid Alpha comparison operator for "cmp" style |
569 | ;; instructions. | |
570 | (define_predicate "alpha_comparison_operator" | |
571 | (match_code "eq,le,lt,leu,ltu")) | |
572 | ||
573 | ;; Similarly, but with swapped operands. | |
574 | (define_predicate "alpha_swapped_comparison_operator" | |
cec12c7a | 575 | (match_code "eq,ge,gt,gtu")) |
201312c2 RH |
576 | |
577 | ;; Return 1 if OP is a valid Alpha comparison operator against zero | |
578 | ;; for "bcc" style instructions. | |
579 | (define_predicate "alpha_zero_comparison_operator" | |
580 | (match_code "eq,ne,le,lt,leu,ltu")) | |
581 | ||
582 | ;; Return 1 if OP is a signed comparison operation. | |
583 | (define_predicate "signed_comparison_operator" | |
584 | (match_code "eq,ne,le,lt,ge,gt")) | |
585 | ||
586 | ;; Return 1 if OP is a valid Alpha floating point comparison operator. | |
587 | (define_predicate "alpha_fp_comparison_operator" | |
588 | (match_code "eq,le,lt,unordered")) | |
589 | ||
590 | ;; Return 1 if this is a divide or modulus operator. | |
591 | (define_predicate "divmod_operator" | |
592 | (match_code "div,mod,udiv,umod")) | |
593 | ||
594 | ;; Return 1 if this is a float->int conversion operator. | |
595 | (define_predicate "fix_operator" | |
596 | (match_code "fix,unsigned_fix")) | |
597 | ||
598 | ;; Recognize an addition operation that includes a constant. Used to | |
599 | ;; convince reload to canonize (plus (plus reg c1) c2) during register | |
600 | ;; elimination. | |
601 | ||
602 | (define_predicate "addition_operation" | |
603 | (and (match_code "plus") | |
604 | (match_test "register_operand (XEXP (op, 0), mode) | |
dfcbeaa5 | 605 | && satisfies_constraint_K (XEXP (op, 1))"))) |
04161e2b RH |
606 | |
607 | ;; For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a | |
608 | ;; small symbolic operand until after reload. At which point we need | |
609 | ;; to replace (mem (symbol_ref)) with (mem (lo_sum $29 symbol_ref)) | |
610 | ;; so that sched2 has the proper dependency information. */ | |
611 | (define_predicate "some_small_symbolic_operand" | |
612 | (match_code "set,parallel,prefetch,unspec,unspec_volatile") | |
613 | { | |
614 | /* Avoid search unless necessary. */ | |
615 | if (!TARGET_EXPLICIT_RELOCS || !reload_completed) | |
616 | return false; | |
dbb838b7 | 617 | return some_small_symbolic_operand_int (op); |
04161e2b | 618 | }) |
bdfb351b RH |
619 | |
620 | ;; Accept a register, or a memory if BWX is enabled. | |
621 | (define_predicate "reg_or_bwx_memory_operand" | |
622 | (ior (match_operand 0 "register_operand") | |
623 | (and (match_test "TARGET_BWX") | |
624 | (match_operand 0 "memory_operand")))) | |
2371d1a0 RH |
625 | |
626 | ;; Accept a memory whose address is only a register. | |
627 | (define_predicate "mem_noofs_operand" | |
628 | (and (match_code "mem") | |
629 | (match_code "reg" "0"))) |