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63c8f7d6 SP |
1 | /* Arm MVE intrinsics include file. |
2 | ||
a945c346 | 3 | Copyright (C) 2019-2024 Free Software Foundation, Inc. |
63c8f7d6 SP |
4 | Contributed by Arm. |
5 | ||
6 | This file is part of GCC. | |
7 | ||
8 | GCC is free software; you can redistribute it and/or modify it | |
9 | under the terms of the GNU General Public License as published | |
10 | by the Free Software Foundation; either version 3, or (at your | |
11 | option) any later version. | |
12 | ||
13 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
14 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 | License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GCC; see the file COPYING3. If not see | |
20 | <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | #ifndef _GCC_ARM_MVE_H | |
23 | #define _GCC_ARM_MVE_H | |
24 | ||
85244449 SP |
25 | #if __ARM_BIG_ENDIAN |
26 | #error "MVE intrinsics are not supported in Big-Endian mode." | |
3b6e79ae | 27 | #elif !__ARM_FEATURE_MVE |
63c8f7d6 | 28 | #error "MVE feature not supported" |
3b6e79ae | 29 | #else |
63c8f7d6 SP |
30 | |
31 | #include <stdint.h> | |
32 | #ifndef __cplusplus | |
33 | #include <stdbool.h> | |
34 | #endif | |
78bf9163 | 35 | #include "arm_mve_types.h" |
14782c81 | 36 | |
6f59caf1 CL |
37 | #ifdef __ARM_MVE_PRESERVE_USER_NAMESPACE |
38 | #pragma GCC arm "arm_mve.h" true | |
39 | #else | |
40 | #pragma GCC arm "arm_mve.h" false | |
41 | #endif | |
42 | ||
14782c81 | 43 | #ifndef __ARM_MVE_PRESERVE_USER_NAMESPACE |
6a90680b | 44 | #define vst4q(__addr, __value) __arm_vst4q(__addr, __value) |
6a90680b | 45 | #define vornq(__a, __b) __arm_vornq(__a, __b) |
6a90680b | 46 | #define vbicq(__a, __b) __arm_vbicq(__a, __b) |
6a90680b | 47 | #define vbicq_m_n(__a, __imm, __p) __arm_vbicq_m_n(__a, __imm, __p) |
6a90680b | 48 | #define vshlcq(__a, __b, __imm) __arm_vshlcq(__a, __b, __imm) |
6a90680b | 49 | #define vbicq_m(__inactive, __a, __b, __p) __arm_vbicq_m(__inactive, __a, __b, __p) |
6a90680b | 50 | #define vornq_m(__inactive, __a, __b, __p) __arm_vornq_m(__inactive, __a, __b, __p) |
6a90680b ASDV |
51 | #define vstrbq_scatter_offset(__base, __offset, __value) __arm_vstrbq_scatter_offset(__base, __offset, __value) |
52 | #define vstrbq(__addr, __value) __arm_vstrbq(__addr, __value) | |
53 | #define vstrwq_scatter_base(__addr, __offset, __value) __arm_vstrwq_scatter_base(__addr, __offset, __value) | |
54 | #define vldrbq_gather_offset(__base, __offset) __arm_vldrbq_gather_offset(__base, __offset) | |
55 | #define vstrbq_p(__addr, __value, __p) __arm_vstrbq_p(__addr, __value, __p) | |
56 | #define vstrbq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p(__base, __offset, __value, __p) | |
57 | #define vstrwq_scatter_base_p(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_p(__addr, __offset, __value, __p) | |
58 | #define vldrbq_gather_offset_z(__base, __offset, __p) __arm_vldrbq_gather_offset_z(__base, __offset, __p) | |
6a90680b ASDV |
59 | #define vldrhq_gather_offset(__base, __offset) __arm_vldrhq_gather_offset(__base, __offset) |
60 | #define vldrhq_gather_offset_z(__base, __offset, __p) __arm_vldrhq_gather_offset_z(__base, __offset, __p) | |
61 | #define vldrhq_gather_shifted_offset(__base, __offset) __arm_vldrhq_gather_shifted_offset(__base, __offset) | |
62 | #define vldrhq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z(__base, __offset, __p) | |
63 | #define vldrdq_gather_offset(__base, __offset) __arm_vldrdq_gather_offset(__base, __offset) | |
64 | #define vldrdq_gather_offset_z(__base, __offset, __p) __arm_vldrdq_gather_offset_z(__base, __offset, __p) | |
65 | #define vldrdq_gather_shifted_offset(__base, __offset) __arm_vldrdq_gather_shifted_offset(__base, __offset) | |
66 | #define vldrdq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z(__base, __offset, __p) | |
67 | #define vldrwq_gather_offset(__base, __offset) __arm_vldrwq_gather_offset(__base, __offset) | |
68 | #define vldrwq_gather_offset_z(__base, __offset, __p) __arm_vldrwq_gather_offset_z(__base, __offset, __p) | |
69 | #define vldrwq_gather_shifted_offset(__base, __offset) __arm_vldrwq_gather_shifted_offset(__base, __offset) | |
70 | #define vldrwq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z(__base, __offset, __p) | |
6a90680b ASDV |
71 | #define vstrhq_scatter_offset(__base, __offset, __value) __arm_vstrhq_scatter_offset(__base, __offset, __value) |
72 | #define vstrhq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p(__base, __offset, __value, __p) | |
73 | #define vstrhq_scatter_shifted_offset(__base, __offset, __value) __arm_vstrhq_scatter_shifted_offset(__base, __offset, __value) | |
74 | #define vstrhq_scatter_shifted_offset_p(__base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p(__base, __offset, __value, __p) | |
75 | #define vstrhq(__addr, __value) __arm_vstrhq(__addr, __value) | |
76 | #define vstrhq_p(__addr, __value, __p) __arm_vstrhq_p(__addr, __value, __p) | |
77 | #define vstrwq(__addr, __value) __arm_vstrwq(__addr, __value) | |
78 | #define vstrwq_p(__addr, __value, __p) __arm_vstrwq_p(__addr, __value, __p) | |
79 | #define vstrdq_scatter_base_p(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_p(__addr, __offset, __value, __p) | |
80 | #define vstrdq_scatter_base(__addr, __offset, __value) __arm_vstrdq_scatter_base(__addr, __offset, __value) | |
81 | #define vstrdq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrdq_scatter_offset_p(__base, __offset, __value, __p) | |
82 | #define vstrdq_scatter_offset(__base, __offset, __value) __arm_vstrdq_scatter_offset(__base, __offset, __value) | |
83 | #define vstrdq_scatter_shifted_offset_p(__base, __offset, __value, __p) __arm_vstrdq_scatter_shifted_offset_p(__base, __offset, __value, __p) | |
84 | #define vstrdq_scatter_shifted_offset(__base, __offset, __value) __arm_vstrdq_scatter_shifted_offset(__base, __offset, __value) | |
85 | #define vstrwq_scatter_offset_p(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p(__base, __offset, __value, __p) | |
86 | #define vstrwq_scatter_offset(__base, __offset, __value) __arm_vstrwq_scatter_offset(__base, __offset, __value) | |
87 | #define vstrwq_scatter_shifted_offset_p(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p(__base, __offset, __value, __p) | |
88 | #define vstrwq_scatter_shifted_offset(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset(__base, __offset, __value) | |
89 | #define vuninitializedq(__v) __arm_vuninitializedq(__v) | |
6a90680b ASDV |
90 | #define vddupq_m(__inactive, __a, __imm, __p) __arm_vddupq_m(__inactive, __a, __imm, __p) |
91 | #define vddupq_u8(__a, __imm) __arm_vddupq_u8(__a, __imm) | |
92 | #define vddupq_u32(__a, __imm) __arm_vddupq_u32(__a, __imm) | |
93 | #define vddupq_u16(__a, __imm) __arm_vddupq_u16(__a, __imm) | |
94 | #define vdwdupq_m(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m(__inactive, __a, __b, __imm, __p) | |
95 | #define vdwdupq_u8(__a, __b, __imm) __arm_vdwdupq_u8(__a, __b, __imm) | |
96 | #define vdwdupq_u32(__a, __b, __imm) __arm_vdwdupq_u32(__a, __b, __imm) | |
97 | #define vdwdupq_u16(__a, __b, __imm) __arm_vdwdupq_u16(__a, __b, __imm) | |
98 | #define vidupq_m(__inactive, __a, __imm, __p) __arm_vidupq_m(__inactive, __a, __imm, __p) | |
99 | #define vidupq_u8(__a, __imm) __arm_vidupq_u8(__a, __imm) | |
100 | #define vidupq_u32(__a, __imm) __arm_vidupq_u32(__a, __imm) | |
101 | #define vidupq_u16(__a, __imm) __arm_vidupq_u16(__a, __imm) | |
102 | #define viwdupq_m(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m(__inactive, __a, __b, __imm, __p) | |
103 | #define viwdupq_u8(__a, __b, __imm) __arm_viwdupq_u8(__a, __b, __imm) | |
104 | #define viwdupq_u32(__a, __b, __imm) __arm_viwdupq_u32(__a, __b, __imm) | |
105 | #define viwdupq_u16(__a, __b, __imm) __arm_viwdupq_u16(__a, __b, __imm) | |
106 | #define vstrdq_scatter_base_wb(__addr, __offset, __value) __arm_vstrdq_scatter_base_wb(__addr, __offset, __value) | |
107 | #define vstrdq_scatter_base_wb_p(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_wb_p(__addr, __offset, __value, __p) | |
108 | #define vstrwq_scatter_base_wb_p(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p(__addr, __offset, __value, __p) | |
109 | #define vstrwq_scatter_base_wb(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb(__addr, __offset, __value) | |
110 | #define vddupq_x_u8(__a, __imm, __p) __arm_vddupq_x_u8(__a, __imm, __p) | |
111 | #define vddupq_x_u16(__a, __imm, __p) __arm_vddupq_x_u16(__a, __imm, __p) | |
112 | #define vddupq_x_u32(__a, __imm, __p) __arm_vddupq_x_u32(__a, __imm, __p) | |
113 | #define vdwdupq_x_u8(__a, __b, __imm, __p) __arm_vdwdupq_x_u8(__a, __b, __imm, __p) | |
114 | #define vdwdupq_x_u16(__a, __b, __imm, __p) __arm_vdwdupq_x_u16(__a, __b, __imm, __p) | |
115 | #define vdwdupq_x_u32(__a, __b, __imm, __p) __arm_vdwdupq_x_u32(__a, __b, __imm, __p) | |
116 | #define vidupq_x_u8(__a, __imm, __p) __arm_vidupq_x_u8(__a, __imm, __p) | |
117 | #define vidupq_x_u16(__a, __imm, __p) __arm_vidupq_x_u16(__a, __imm, __p) | |
118 | #define vidupq_x_u32(__a, __imm, __p) __arm_vidupq_x_u32(__a, __imm, __p) | |
119 | #define viwdupq_x_u8(__a, __b, __imm, __p) __arm_viwdupq_x_u8(__a, __b, __imm, __p) | |
120 | #define viwdupq_x_u16(__a, __b, __imm, __p) __arm_viwdupq_x_u16(__a, __b, __imm, __p) | |
121 | #define viwdupq_x_u32(__a, __b, __imm, __p) __arm_viwdupq_x_u32(__a, __b, __imm, __p) | |
6a90680b | 122 | #define vbicq_x(__a, __b, __p) __arm_vbicq_x(__a, __b, __p) |
6a90680b | 123 | #define vornq_x(__a, __b, __p) __arm_vornq_x(__a, __b, __p) |
6a90680b ASDV |
124 | #define vadciq(__a, __b, __carry_out) __arm_vadciq(__a, __b, __carry_out) |
125 | #define vadciq_m(__inactive, __a, __b, __carry_out, __p) __arm_vadciq_m(__inactive, __a, __b, __carry_out, __p) | |
126 | #define vadcq(__a, __b, __carry) __arm_vadcq(__a, __b, __carry) | |
127 | #define vadcq_m(__inactive, __a, __b, __carry, __p) __arm_vadcq_m(__inactive, __a, __b, __carry, __p) | |
128 | #define vsbciq(__a, __b, __carry_out) __arm_vsbciq(__a, __b, __carry_out) | |
129 | #define vsbciq_m(__inactive, __a, __b, __carry_out, __p) __arm_vsbciq_m(__inactive, __a, __b, __carry_out, __p) | |
130 | #define vsbcq(__a, __b, __carry) __arm_vsbcq(__a, __b, __carry) | |
131 | #define vsbcq_m(__inactive, __a, __b, __carry, __p) __arm_vsbcq_m(__inactive, __a, __b, __carry, __p) | |
132 | #define vst1q_p(__addr, __value, __p) __arm_vst1q_p(__addr, __value, __p) | |
133 | #define vst2q(__addr, __value) __arm_vst2q(__addr, __value) | |
134 | #define vld1q_z(__base, __p) __arm_vld1q_z(__base, __p) | |
135 | #define vld2q(__addr) __arm_vld2q(__addr) | |
136 | #define vld4q(__addr) __arm_vld4q(__addr) | |
137 | #define vsetq_lane(__a, __b, __idx) __arm_vsetq_lane(__a, __b, __idx) | |
138 | #define vgetq_lane(__a, __idx) __arm_vgetq_lane(__a, __idx) | |
139 | #define vshlcq_m(__a, __b, __imm, __p) __arm_vshlcq_m(__a, __b, __imm, __p) | |
6a90680b ASDV |
140 | #define vcvttq_f32(__a) __arm_vcvttq_f32(__a) |
141 | #define vcvtbq_f32(__a) __arm_vcvtbq_f32(__a) | |
142 | #define vcvtq(__a) __arm_vcvtq(__a) | |
143 | #define vcvtq_n(__a, __imm6) __arm_vcvtq_n(__a, __imm6) | |
6a90680b ASDV |
144 | #define vcvtaq_m(__inactive, __a, __p) __arm_vcvtaq_m(__inactive, __a, __p) |
145 | #define vcvtq_m(__inactive, __a, __p) __arm_vcvtq_m(__inactive, __a, __p) | |
146 | #define vcvtbq_m(__a, __b, __p) __arm_vcvtbq_m(__a, __b, __p) | |
147 | #define vcvttq_m(__a, __b, __p) __arm_vcvttq_m(__a, __b, __p) | |
6a90680b ASDV |
148 | #define vcvtmq_m(__inactive, __a, __p) __arm_vcvtmq_m(__inactive, __a, __p) |
149 | #define vcvtnq_m(__inactive, __a, __p) __arm_vcvtnq_m(__inactive, __a, __p) | |
150 | #define vcvtpq_m(__inactive, __a, __p) __arm_vcvtpq_m(__inactive, __a, __p) | |
6a90680b | 151 | #define vcvtq_m_n(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n(__inactive, __a, __imm6, __p) |
6a90680b ASDV |
152 | #define vcvtq_x(__a, __p) __arm_vcvtq_x(__a, __p) |
153 | #define vcvtq_x_n(__a, __imm6, __p) __arm_vcvtq_x_n(__a, __imm6, __p) | |
6a90680b ASDV |
154 | |
155 | ||
14782c81 SP |
156 | #define vst4q_s8( __addr, __value) __arm_vst4q_s8( __addr, __value) |
157 | #define vst4q_s16( __addr, __value) __arm_vst4q_s16( __addr, __value) | |
158 | #define vst4q_s32( __addr, __value) __arm_vst4q_s32( __addr, __value) | |
159 | #define vst4q_u8( __addr, __value) __arm_vst4q_u8( __addr, __value) | |
160 | #define vst4q_u16( __addr, __value) __arm_vst4q_u16( __addr, __value) | |
161 | #define vst4q_u32( __addr, __value) __arm_vst4q_u32( __addr, __value) | |
162 | #define vst4q_f16( __addr, __value) __arm_vst4q_f16( __addr, __value) | |
163 | #define vst4q_f32( __addr, __value) __arm_vst4q_f32( __addr, __value) | |
a50f6abf SP |
164 | #define vcvttq_f32_f16(__a) __arm_vcvttq_f32_f16(__a) |
165 | #define vcvtbq_f32_f16(__a) __arm_vcvtbq_f32_f16(__a) | |
166 | #define vcvtq_f16_s16(__a) __arm_vcvtq_f16_s16(__a) | |
167 | #define vcvtq_f32_s32(__a) __arm_vcvtq_f32_s32(__a) | |
168 | #define vcvtq_f16_u16(__a) __arm_vcvtq_f16_u16(__a) | |
169 | #define vcvtq_f32_u32(__a) __arm_vcvtq_f32_u32(__a) | |
6df4618c SP |
170 | #define vcvtaq_s16_f16(__a) __arm_vcvtaq_s16_f16(__a) |
171 | #define vcvtaq_s32_f32(__a) __arm_vcvtaq_s32_f32(__a) | |
172 | #define vcvtnq_s16_f16(__a) __arm_vcvtnq_s16_f16(__a) | |
173 | #define vcvtnq_s32_f32(__a) __arm_vcvtnq_s32_f32(__a) | |
174 | #define vcvtpq_s16_f16(__a) __arm_vcvtpq_s16_f16(__a) | |
175 | #define vcvtpq_s32_f32(__a) __arm_vcvtpq_s32_f32(__a) | |
176 | #define vcvtmq_s16_f16(__a) __arm_vcvtmq_s16_f16(__a) | |
177 | #define vcvtmq_s32_f32(__a) __arm_vcvtmq_s32_f32(__a) | |
5db0eb95 SP |
178 | #define vcvtq_s16_f16(__a) __arm_vcvtq_s16_f16(__a) |
179 | #define vcvtq_s32_f32(__a) __arm_vcvtq_s32_f32(__a) | |
5db0eb95 SP |
180 | #define vcvtq_u16_f16(__a) __arm_vcvtq_u16_f16(__a) |
181 | #define vcvtq_u32_f32(__a) __arm_vcvtq_u32_f32(__a) | |
6df4618c SP |
182 | #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a) |
183 | #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a) | |
184 | #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a) | |
5a448362 | 185 | #define vcvtnq_u32_f32(__a) __arm_vcvtnq_u32_f32(__a) |
6df4618c SP |
186 | #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a) |
187 | #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a) | |
188 | #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a) | |
189 | #define vcvtaq_u32_f32(__a) __arm_vcvtaq_u32_f32(__a) | |
a475f153 SP |
190 | #define vctp16q(__a) __arm_vctp16q(__a) |
191 | #define vctp32q(__a) __arm_vctp32q(__a) | |
192 | #define vctp64q(__a) __arm_vctp64q(__a) | |
193 | #define vctp8q(__a) __arm_vctp8q(__a) | |
194 | #define vpnot(__a) __arm_vpnot(__a) | |
4be8cf77 SP |
195 | #define vcvtq_n_f16_s16(__a, __imm6) __arm_vcvtq_n_f16_s16(__a, __imm6) |
196 | #define vcvtq_n_f32_s32(__a, __imm6) __arm_vcvtq_n_f32_s32(__a, __imm6) | |
197 | #define vcvtq_n_f16_u16(__a, __imm6) __arm_vcvtq_n_f16_u16(__a, __imm6) | |
198 | #define vcvtq_n_f32_u32(__a, __imm6) __arm_vcvtq_n_f32_u32(__a, __imm6) | |
f166a8cd SP |
199 | #define vcvtq_n_s16_f16(__a, __imm6) __arm_vcvtq_n_s16_f16(__a, __imm6) |
200 | #define vcvtq_n_s32_f32(__a, __imm6) __arm_vcvtq_n_s32_f32(__a, __imm6) | |
201 | #define vcvtq_n_u16_f16(__a, __imm6) __arm_vcvtq_n_u16_f16(__a, __imm6) | |
202 | #define vcvtq_n_u32_f32(__a, __imm6) __arm_vcvtq_n_u32_f32(__a, __imm6) | |
33203b4c | 203 | #define vornq_u8(__a, __b) __arm_vornq_u8(__a, __b) |
33203b4c | 204 | #define vbicq_u8(__a, __b) __arm_vbicq_u8(__a, __b) |
33203b4c | 205 | #define vornq_s8(__a, __b) __arm_vornq_s8(__a, __b) |
33203b4c | 206 | #define vbicq_s8(__a, __b) __arm_vbicq_s8(__a, __b) |
33203b4c | 207 | #define vornq_u16(__a, __b) __arm_vornq_u16(__a, __b) |
33203b4c | 208 | #define vbicq_u16(__a, __b) __arm_vbicq_u16(__a, __b) |
33203b4c | 209 | #define vornq_s16(__a, __b) __arm_vornq_s16(__a, __b) |
33203b4c | 210 | #define vbicq_s16(__a, __b) __arm_vbicq_s16(__a, __b) |
33203b4c | 211 | #define vornq_u32(__a, __b) __arm_vornq_u32(__a, __b) |
33203b4c | 212 | #define vbicq_u32(__a, __b) __arm_vbicq_u32(__a, __b) |
33203b4c | 213 | #define vornq_s32(__a, __b) __arm_vornq_s32(__a, __b) |
33203b4c | 214 | #define vbicq_s32(__a, __b) __arm_vbicq_s32(__a, __b) |
f9355dee | 215 | #define vbicq_n_u16(__a, __imm) __arm_vbicq_n_u16(__a, __imm) |
f9355dee | 216 | #define vornq_f16(__a, __b) __arm_vornq_f16(__a, __b) |
f9355dee | 217 | #define vbicq_f16(__a, __b) __arm_vbicq_f16(__a, __b) |
f9355dee | 218 | #define vbicq_n_s16(__a, __imm) __arm_vbicq_n_s16(__a, __imm) |
f9355dee | 219 | #define vbicq_n_u32(__a, __imm) __arm_vbicq_n_u32(__a, __imm) |
f9355dee | 220 | #define vornq_f32(__a, __b) __arm_vornq_f32(__a, __b) |
f9355dee | 221 | #define vbicq_f32(__a, __b) __arm_vbicq_f32(__a, __b) |
f9355dee | 222 | #define vbicq_n_s32(__a, __imm) __arm_vbicq_n_s32(__a, __imm) |
f9355dee SP |
223 | #define vctp8q_m(__a, __p) __arm_vctp8q_m(__a, __p) |
224 | #define vctp64q_m(__a, __p) __arm_vctp64q_m(__a, __p) | |
225 | #define vctp32q_m(__a, __p) __arm_vctp32q_m(__a, __p) | |
226 | #define vctp16q_m(__a, __p) __arm_vctp16q_m(__a, __p) | |
f9355dee SP |
227 | #define vcvttq_f16_f32(__a, __b) __arm_vcvttq_f16_f32(__a, __b) |
228 | #define vcvtbq_f16_f32(__a, __b) __arm_vcvtbq_f16_f32(__a, __b) | |
0dad5b33 SP |
229 | #define vbicq_m_n_s16(__a, __imm, __p) __arm_vbicq_m_n_s16(__a, __imm, __p) |
230 | #define vbicq_m_n_s32(__a, __imm, __p) __arm_vbicq_m_n_s32(__a, __imm, __p) | |
231 | #define vbicq_m_n_u16(__a, __imm, __p) __arm_vbicq_m_n_u16(__a, __imm, __p) | |
232 | #define vbicq_m_n_u32(__a, __imm, __p) __arm_vbicq_m_n_u32(__a, __imm, __p) | |
0dad5b33 SP |
233 | #define vcvtaq_m_s16_f16(__inactive, __a, __p) __arm_vcvtaq_m_s16_f16(__inactive, __a, __p) |
234 | #define vcvtaq_m_u16_f16(__inactive, __a, __p) __arm_vcvtaq_m_u16_f16(__inactive, __a, __p) | |
235 | #define vcvtaq_m_s32_f32(__inactive, __a, __p) __arm_vcvtaq_m_s32_f32(__inactive, __a, __p) | |
236 | #define vcvtaq_m_u32_f32(__inactive, __a, __p) __arm_vcvtaq_m_u32_f32(__inactive, __a, __p) | |
237 | #define vcvtq_m_f16_s16(__inactive, __a, __p) __arm_vcvtq_m_f16_s16(__inactive, __a, __p) | |
238 | #define vcvtq_m_f16_u16(__inactive, __a, __p) __arm_vcvtq_m_f16_u16(__inactive, __a, __p) | |
239 | #define vcvtq_m_f32_s32(__inactive, __a, __p) __arm_vcvtq_m_f32_s32(__inactive, __a, __p) | |
240 | #define vcvtq_m_f32_u32(__inactive, __a, __p) __arm_vcvtq_m_f32_u32(__inactive, __a, __p) | |
0dad5b33 SP |
241 | #define vshlcq_s8(__a, __b, __imm) __arm_vshlcq_s8(__a, __b, __imm) |
242 | #define vshlcq_u8(__a, __b, __imm) __arm_vshlcq_u8(__a, __b, __imm) | |
243 | #define vshlcq_s16(__a, __b, __imm) __arm_vshlcq_s16(__a, __b, __imm) | |
244 | #define vshlcq_u16(__a, __b, __imm) __arm_vshlcq_u16(__a, __b, __imm) | |
245 | #define vshlcq_s32(__a, __b, __imm) __arm_vshlcq_s32(__a, __b, __imm) | |
246 | #define vshlcq_u32(__a, __b, __imm) __arm_vshlcq_u32(__a, __b, __imm) | |
e3678b44 SP |
247 | #define vcvtbq_m_f16_f32(__a, __b, __p) __arm_vcvtbq_m_f16_f32(__a, __b, __p) |
248 | #define vcvtbq_m_f32_f16(__inactive, __a, __p) __arm_vcvtbq_m_f32_f16(__inactive, __a, __p) | |
249 | #define vcvttq_m_f16_f32(__a, __b, __p) __arm_vcvttq_m_f16_f32(__a, __b, __p) | |
250 | #define vcvttq_m_f32_f16(__inactive, __a, __p) __arm_vcvttq_m_f32_f16(__inactive, __a, __p) | |
e3678b44 SP |
251 | #define vcvtmq_m_s16_f16(__inactive, __a, __p) __arm_vcvtmq_m_s16_f16(__inactive, __a, __p) |
252 | #define vcvtnq_m_s16_f16(__inactive, __a, __p) __arm_vcvtnq_m_s16_f16(__inactive, __a, __p) | |
253 | #define vcvtpq_m_s16_f16(__inactive, __a, __p) __arm_vcvtpq_m_s16_f16(__inactive, __a, __p) | |
254 | #define vcvtq_m_s16_f16(__inactive, __a, __p) __arm_vcvtq_m_s16_f16(__inactive, __a, __p) | |
e3678b44 SP |
255 | #define vcvtmq_m_u16_f16(__inactive, __a, __p) __arm_vcvtmq_m_u16_f16(__inactive, __a, __p) |
256 | #define vcvtnq_m_u16_f16(__inactive, __a, __p) __arm_vcvtnq_m_u16_f16(__inactive, __a, __p) | |
257 | #define vcvtpq_m_u16_f16(__inactive, __a, __p) __arm_vcvtpq_m_u16_f16(__inactive, __a, __p) | |
258 | #define vcvtq_m_u16_f16(__inactive, __a, __p) __arm_vcvtq_m_u16_f16(__inactive, __a, __p) | |
e3678b44 SP |
259 | #define vcvtmq_m_s32_f32(__inactive, __a, __p) __arm_vcvtmq_m_s32_f32(__inactive, __a, __p) |
260 | #define vcvtnq_m_s32_f32(__inactive, __a, __p) __arm_vcvtnq_m_s32_f32(__inactive, __a, __p) | |
261 | #define vcvtpq_m_s32_f32(__inactive, __a, __p) __arm_vcvtpq_m_s32_f32(__inactive, __a, __p) | |
262 | #define vcvtq_m_s32_f32(__inactive, __a, __p) __arm_vcvtq_m_s32_f32(__inactive, __a, __p) | |
e3678b44 SP |
263 | #define vcvtmq_m_u32_f32(__inactive, __a, __p) __arm_vcvtmq_m_u32_f32(__inactive, __a, __p) |
264 | #define vcvtnq_m_u32_f32(__inactive, __a, __p) __arm_vcvtnq_m_u32_f32(__inactive, __a, __p) | |
265 | #define vcvtpq_m_u32_f32(__inactive, __a, __p) __arm_vcvtpq_m_u32_f32(__inactive, __a, __p) | |
266 | #define vcvtq_m_u32_f32(__inactive, __a, __p) __arm_vcvtq_m_u32_f32(__inactive, __a, __p) | |
db5db9d2 | 267 | #define vcvtq_m_n_f16_u16(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_f16_u16(__inactive, __a, __imm6, __p) |
db5db9d2 | 268 | #define vcvtq_m_n_f16_s16(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_f16_s16(__inactive, __a, __imm6, __p) |
db5db9d2 | 269 | #define vcvtq_m_n_f32_u32(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_f32_u32(__inactive, __a, __imm6, __p) |
db5db9d2 | 270 | #define vcvtq_m_n_f32_s32(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_f32_s32(__inactive, __a, __imm6, __p) |
8eb3b6b9 SP |
271 | #define vbicq_m_s8(__inactive, __a, __b, __p) __arm_vbicq_m_s8(__inactive, __a, __b, __p) |
272 | #define vbicq_m_s32(__inactive, __a, __b, __p) __arm_vbicq_m_s32(__inactive, __a, __b, __p) | |
273 | #define vbicq_m_s16(__inactive, __a, __b, __p) __arm_vbicq_m_s16(__inactive, __a, __b, __p) | |
274 | #define vbicq_m_u8(__inactive, __a, __b, __p) __arm_vbicq_m_u8(__inactive, __a, __b, __p) | |
275 | #define vbicq_m_u32(__inactive, __a, __b, __p) __arm_vbicq_m_u32(__inactive, __a, __b, __p) | |
276 | #define vbicq_m_u16(__inactive, __a, __b, __p) __arm_vbicq_m_u16(__inactive, __a, __b, __p) | |
8eb3b6b9 SP |
277 | #define vornq_m_s8(__inactive, __a, __b, __p) __arm_vornq_m_s8(__inactive, __a, __b, __p) |
278 | #define vornq_m_s32(__inactive, __a, __b, __p) __arm_vornq_m_s32(__inactive, __a, __b, __p) | |
279 | #define vornq_m_s16(__inactive, __a, __b, __p) __arm_vornq_m_s16(__inactive, __a, __b, __p) | |
280 | #define vornq_m_u8(__inactive, __a, __b, __p) __arm_vornq_m_u8(__inactive, __a, __b, __p) | |
281 | #define vornq_m_u32(__inactive, __a, __b, __p) __arm_vornq_m_u32(__inactive, __a, __b, __p) | |
282 | #define vornq_m_u16(__inactive, __a, __b, __p) __arm_vornq_m_u16(__inactive, __a, __b, __p) | |
532e9e24 SP |
283 | #define vbicq_m_f32(__inactive, __a, __b, __p) __arm_vbicq_m_f32(__inactive, __a, __b, __p) |
284 | #define vbicq_m_f16(__inactive, __a, __b, __p) __arm_vbicq_m_f16(__inactive, __a, __b, __p) | |
532e9e24 SP |
285 | #define vcvtq_m_n_s32_f32(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_s32_f32(__inactive, __a, __imm6, __p) |
286 | #define vcvtq_m_n_s16_f16(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_s16_f16(__inactive, __a, __imm6, __p) | |
287 | #define vcvtq_m_n_u32_f32(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_u32_f32(__inactive, __a, __imm6, __p) | |
288 | #define vcvtq_m_n_u16_f16(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_u16_f16(__inactive, __a, __imm6, __p) | |
532e9e24 SP |
289 | #define vornq_m_f32(__inactive, __a, __b, __p) __arm_vornq_m_f32(__inactive, __a, __b, __p) |
290 | #define vornq_m_f16(__inactive, __a, __b, __p) __arm_vornq_m_f16(__inactive, __a, __b, __p) | |
4ff68575 SP |
291 | #define vstrbq_s8( __addr, __value) __arm_vstrbq_s8( __addr, __value) |
292 | #define vstrbq_u8( __addr, __value) __arm_vstrbq_u8( __addr, __value) | |
293 | #define vstrbq_u16( __addr, __value) __arm_vstrbq_u16( __addr, __value) | |
294 | #define vstrbq_scatter_offset_s8( __base, __offset, __value) __arm_vstrbq_scatter_offset_s8( __base, __offset, __value) | |
295 | #define vstrbq_scatter_offset_u8( __base, __offset, __value) __arm_vstrbq_scatter_offset_u8( __base, __offset, __value) | |
296 | #define vstrbq_scatter_offset_u16( __base, __offset, __value) __arm_vstrbq_scatter_offset_u16( __base, __offset, __value) | |
297 | #define vstrbq_s16( __addr, __value) __arm_vstrbq_s16( __addr, __value) | |
298 | #define vstrbq_u32( __addr, __value) __arm_vstrbq_u32( __addr, __value) | |
299 | #define vstrbq_scatter_offset_s16( __base, __offset, __value) __arm_vstrbq_scatter_offset_s16( __base, __offset, __value) | |
300 | #define vstrbq_scatter_offset_u32( __base, __offset, __value) __arm_vstrbq_scatter_offset_u32( __base, __offset, __value) | |
301 | #define vstrbq_s32( __addr, __value) __arm_vstrbq_s32( __addr, __value) | |
302 | #define vstrbq_scatter_offset_s32( __base, __offset, __value) __arm_vstrbq_scatter_offset_s32( __base, __offset, __value) | |
303 | #define vstrwq_scatter_base_s32(__addr, __offset, __value) __arm_vstrwq_scatter_base_s32(__addr, __offset, __value) | |
304 | #define vstrwq_scatter_base_u32(__addr, __offset, __value) __arm_vstrwq_scatter_base_u32(__addr, __offset, __value) | |
535a8645 SP |
305 | #define vldrbq_gather_offset_u8(__base, __offset) __arm_vldrbq_gather_offset_u8(__base, __offset) |
306 | #define vldrbq_gather_offset_s8(__base, __offset) __arm_vldrbq_gather_offset_s8(__base, __offset) | |
307 | #define vldrbq_s8(__base) __arm_vldrbq_s8(__base) | |
308 | #define vldrbq_u8(__base) __arm_vldrbq_u8(__base) | |
309 | #define vldrbq_gather_offset_u16(__base, __offset) __arm_vldrbq_gather_offset_u16(__base, __offset) | |
310 | #define vldrbq_gather_offset_s16(__base, __offset) __arm_vldrbq_gather_offset_s16(__base, __offset) | |
311 | #define vldrbq_s16(__base) __arm_vldrbq_s16(__base) | |
312 | #define vldrbq_u16(__base) __arm_vldrbq_u16(__base) | |
313 | #define vldrbq_gather_offset_u32(__base, __offset) __arm_vldrbq_gather_offset_u32(__base, __offset) | |
314 | #define vldrbq_gather_offset_s32(__base, __offset) __arm_vldrbq_gather_offset_s32(__base, __offset) | |
315 | #define vldrbq_s32(__base) __arm_vldrbq_s32(__base) | |
316 | #define vldrbq_u32(__base) __arm_vldrbq_u32(__base) | |
317 | #define vldrwq_gather_base_s32(__addr, __offset) __arm_vldrwq_gather_base_s32(__addr, __offset) | |
318 | #define vldrwq_gather_base_u32(__addr, __offset) __arm_vldrwq_gather_base_u32(__addr, __offset) | |
405e918c SP |
319 | #define vstrbq_p_s8( __addr, __value, __p) __arm_vstrbq_p_s8( __addr, __value, __p) |
320 | #define vstrbq_p_s32( __addr, __value, __p) __arm_vstrbq_p_s32( __addr, __value, __p) | |
321 | #define vstrbq_p_s16( __addr, __value, __p) __arm_vstrbq_p_s16( __addr, __value, __p) | |
322 | #define vstrbq_p_u8( __addr, __value, __p) __arm_vstrbq_p_u8( __addr, __value, __p) | |
323 | #define vstrbq_p_u32( __addr, __value, __p) __arm_vstrbq_p_u32( __addr, __value, __p) | |
324 | #define vstrbq_p_u16( __addr, __value, __p) __arm_vstrbq_p_u16( __addr, __value, __p) | |
325 | #define vstrbq_scatter_offset_p_s8( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_s8( __base, __offset, __value, __p) | |
326 | #define vstrbq_scatter_offset_p_s32( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_s32( __base, __offset, __value, __p) | |
327 | #define vstrbq_scatter_offset_p_s16( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_s16( __base, __offset, __value, __p) | |
328 | #define vstrbq_scatter_offset_p_u8( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_u8( __base, __offset, __value, __p) | |
329 | #define vstrbq_scatter_offset_p_u32( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_u32( __base, __offset, __value, __p) | |
330 | #define vstrbq_scatter_offset_p_u16( __base, __offset, __value, __p) __arm_vstrbq_scatter_offset_p_u16( __base, __offset, __value, __p) | |
331 | #define vstrwq_scatter_base_p_s32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_p_s32(__addr, __offset, __value, __p) | |
332 | #define vstrwq_scatter_base_p_u32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_p_u32(__addr, __offset, __value, __p) | |
429d607b SP |
333 | #define vldrbq_gather_offset_z_s16(__base, __offset, __p) __arm_vldrbq_gather_offset_z_s16(__base, __offset, __p) |
334 | #define vldrbq_gather_offset_z_u8(__base, __offset, __p) __arm_vldrbq_gather_offset_z_u8(__base, __offset, __p) | |
335 | #define vldrbq_gather_offset_z_s32(__base, __offset, __p) __arm_vldrbq_gather_offset_z_s32(__base, __offset, __p) | |
336 | #define vldrbq_gather_offset_z_u16(__base, __offset, __p) __arm_vldrbq_gather_offset_z_u16(__base, __offset, __p) | |
337 | #define vldrbq_gather_offset_z_u32(__base, __offset, __p) __arm_vldrbq_gather_offset_z_u32(__base, __offset, __p) | |
338 | #define vldrbq_gather_offset_z_s8(__base, __offset, __p) __arm_vldrbq_gather_offset_z_s8(__base, __offset, __p) | |
339 | #define vldrbq_z_s16(__base, __p) __arm_vldrbq_z_s16(__base, __p) | |
340 | #define vldrbq_z_u8(__base, __p) __arm_vldrbq_z_u8(__base, __p) | |
341 | #define vldrbq_z_s8(__base, __p) __arm_vldrbq_z_s8(__base, __p) | |
342 | #define vldrbq_z_s32(__base, __p) __arm_vldrbq_z_s32(__base, __p) | |
343 | #define vldrbq_z_u16(__base, __p) __arm_vldrbq_z_u16(__base, __p) | |
344 | #define vldrbq_z_u32(__base, __p) __arm_vldrbq_z_u32(__base, __p) | |
345 | #define vldrwq_gather_base_z_u32(__addr, __offset, __p) __arm_vldrwq_gather_base_z_u32(__addr, __offset, __p) | |
346 | #define vldrwq_gather_base_z_s32(__addr, __offset, __p) __arm_vldrwq_gather_base_z_s32(__addr, __offset, __p) | |
bf1e3d5a SP |
347 | #define vldrhq_gather_offset_s32(__base, __offset) __arm_vldrhq_gather_offset_s32(__base, __offset) |
348 | #define vldrhq_gather_offset_s16(__base, __offset) __arm_vldrhq_gather_offset_s16(__base, __offset) | |
349 | #define vldrhq_gather_offset_u32(__base, __offset) __arm_vldrhq_gather_offset_u32(__base, __offset) | |
350 | #define vldrhq_gather_offset_u16(__base, __offset) __arm_vldrhq_gather_offset_u16(__base, __offset) | |
351 | #define vldrhq_gather_offset_z_s32(__base, __offset, __p) __arm_vldrhq_gather_offset_z_s32(__base, __offset, __p) | |
352 | #define vldrhq_gather_offset_z_s16(__base, __offset, __p) __arm_vldrhq_gather_offset_z_s16(__base, __offset, __p) | |
353 | #define vldrhq_gather_offset_z_u32(__base, __offset, __p) __arm_vldrhq_gather_offset_z_u32(__base, __offset, __p) | |
354 | #define vldrhq_gather_offset_z_u16(__base, __offset, __p) __arm_vldrhq_gather_offset_z_u16(__base, __offset, __p) | |
355 | #define vldrhq_gather_shifted_offset_s32(__base, __offset) __arm_vldrhq_gather_shifted_offset_s32(__base, __offset) | |
356 | #define vldrhq_gather_shifted_offset_s16(__base, __offset) __arm_vldrhq_gather_shifted_offset_s16(__base, __offset) | |
357 | #define vldrhq_gather_shifted_offset_u32(__base, __offset) __arm_vldrhq_gather_shifted_offset_u32(__base, __offset) | |
358 | #define vldrhq_gather_shifted_offset_u16(__base, __offset) __arm_vldrhq_gather_shifted_offset_u16(__base, __offset) | |
359 | #define vldrhq_gather_shifted_offset_z_s32(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_s32(__base, __offset, __p) | |
360 | #define vldrhq_gather_shifted_offset_z_s16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_s16(__base, __offset, __p) | |
361 | #define vldrhq_gather_shifted_offset_z_u32(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_u32(__base, __offset, __p) | |
362 | #define vldrhq_gather_shifted_offset_z_u16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_u16(__base, __offset, __p) | |
363 | #define vldrhq_s32(__base) __arm_vldrhq_s32(__base) | |
364 | #define vldrhq_s16(__base) __arm_vldrhq_s16(__base) | |
365 | #define vldrhq_u32(__base) __arm_vldrhq_u32(__base) | |
366 | #define vldrhq_u16(__base) __arm_vldrhq_u16(__base) | |
367 | #define vldrhq_z_s32(__base, __p) __arm_vldrhq_z_s32(__base, __p) | |
368 | #define vldrhq_z_s16(__base, __p) __arm_vldrhq_z_s16(__base, __p) | |
369 | #define vldrhq_z_u32(__base, __p) __arm_vldrhq_z_u32(__base, __p) | |
370 | #define vldrhq_z_u16(__base, __p) __arm_vldrhq_z_u16(__base, __p) | |
371 | #define vldrwq_s32(__base) __arm_vldrwq_s32(__base) | |
372 | #define vldrwq_u32(__base) __arm_vldrwq_u32(__base) | |
373 | #define vldrwq_z_s32(__base, __p) __arm_vldrwq_z_s32(__base, __p) | |
374 | #define vldrwq_z_u32(__base, __p) __arm_vldrwq_z_u32(__base, __p) | |
bf1e3d5a SP |
375 | #define vldrhq_f16(__base) __arm_vldrhq_f16(__base) |
376 | #define vldrhq_z_f16(__base, __p) __arm_vldrhq_z_f16(__base, __p) | |
377 | #define vldrwq_f32(__base) __arm_vldrwq_f32(__base) | |
378 | #define vldrwq_z_f32(__base, __p) __arm_vldrwq_z_f32(__base, __p) | |
4cc23303 SP |
379 | #define vldrdq_gather_base_s64(__addr, __offset) __arm_vldrdq_gather_base_s64(__addr, __offset) |
380 | #define vldrdq_gather_base_u64(__addr, __offset) __arm_vldrdq_gather_base_u64(__addr, __offset) | |
381 | #define vldrdq_gather_base_z_s64(__addr, __offset, __p) __arm_vldrdq_gather_base_z_s64(__addr, __offset, __p) | |
382 | #define vldrdq_gather_base_z_u64(__addr, __offset, __p) __arm_vldrdq_gather_base_z_u64(__addr, __offset, __p) | |
383 | #define vldrdq_gather_offset_s64(__base, __offset) __arm_vldrdq_gather_offset_s64(__base, __offset) | |
384 | #define vldrdq_gather_offset_u64(__base, __offset) __arm_vldrdq_gather_offset_u64(__base, __offset) | |
385 | #define vldrdq_gather_offset_z_s64(__base, __offset, __p) __arm_vldrdq_gather_offset_z_s64(__base, __offset, __p) | |
386 | #define vldrdq_gather_offset_z_u64(__base, __offset, __p) __arm_vldrdq_gather_offset_z_u64(__base, __offset, __p) | |
387 | #define vldrdq_gather_shifted_offset_s64(__base, __offset) __arm_vldrdq_gather_shifted_offset_s64(__base, __offset) | |
388 | #define vldrdq_gather_shifted_offset_u64(__base, __offset) __arm_vldrdq_gather_shifted_offset_u64(__base, __offset) | |
389 | #define vldrdq_gather_shifted_offset_z_s64(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z_s64(__base, __offset, __p) | |
390 | #define vldrdq_gather_shifted_offset_z_u64(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z_u64(__base, __offset, __p) | |
391 | #define vldrhq_gather_offset_f16(__base, __offset) __arm_vldrhq_gather_offset_f16(__base, __offset) | |
392 | #define vldrhq_gather_offset_z_f16(__base, __offset, __p) __arm_vldrhq_gather_offset_z_f16(__base, __offset, __p) | |
393 | #define vldrhq_gather_shifted_offset_f16(__base, __offset) __arm_vldrhq_gather_shifted_offset_f16(__base, __offset) | |
394 | #define vldrhq_gather_shifted_offset_z_f16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_f16(__base, __offset, __p) | |
395 | #define vldrwq_gather_base_f32(__addr, __offset) __arm_vldrwq_gather_base_f32(__addr, __offset) | |
396 | #define vldrwq_gather_base_z_f32(__addr, __offset, __p) __arm_vldrwq_gather_base_z_f32(__addr, __offset, __p) | |
397 | #define vldrwq_gather_offset_f32(__base, __offset) __arm_vldrwq_gather_offset_f32(__base, __offset) | |
398 | #define vldrwq_gather_offset_s32(__base, __offset) __arm_vldrwq_gather_offset_s32(__base, __offset) | |
399 | #define vldrwq_gather_offset_u32(__base, __offset) __arm_vldrwq_gather_offset_u32(__base, __offset) | |
400 | #define vldrwq_gather_offset_z_f32(__base, __offset, __p) __arm_vldrwq_gather_offset_z_f32(__base, __offset, __p) | |
401 | #define vldrwq_gather_offset_z_s32(__base, __offset, __p) __arm_vldrwq_gather_offset_z_s32(__base, __offset, __p) | |
402 | #define vldrwq_gather_offset_z_u32(__base, __offset, __p) __arm_vldrwq_gather_offset_z_u32(__base, __offset, __p) | |
403 | #define vldrwq_gather_shifted_offset_f32(__base, __offset) __arm_vldrwq_gather_shifted_offset_f32(__base, __offset) | |
404 | #define vldrwq_gather_shifted_offset_s32(__base, __offset) __arm_vldrwq_gather_shifted_offset_s32(__base, __offset) | |
405 | #define vldrwq_gather_shifted_offset_u32(__base, __offset) __arm_vldrwq_gather_shifted_offset_u32(__base, __offset) | |
406 | #define vldrwq_gather_shifted_offset_z_f32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_f32(__base, __offset, __p) | |
407 | #define vldrwq_gather_shifted_offset_z_s32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_s32(__base, __offset, __p) | |
408 | #define vldrwq_gather_shifted_offset_z_u32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_u32(__base, __offset, __p) | |
5cad47e0 SP |
409 | #define vstrhq_f16(__addr, __value) __arm_vstrhq_f16(__addr, __value) |
410 | #define vstrhq_scatter_offset_s32( __base, __offset, __value) __arm_vstrhq_scatter_offset_s32( __base, __offset, __value) | |
411 | #define vstrhq_scatter_offset_s16( __base, __offset, __value) __arm_vstrhq_scatter_offset_s16( __base, __offset, __value) | |
412 | #define vstrhq_scatter_offset_u32( __base, __offset, __value) __arm_vstrhq_scatter_offset_u32( __base, __offset, __value) | |
413 | #define vstrhq_scatter_offset_u16( __base, __offset, __value) __arm_vstrhq_scatter_offset_u16( __base, __offset, __value) | |
414 | #define vstrhq_scatter_offset_p_s32( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_s32( __base, __offset, __value, __p) | |
415 | #define vstrhq_scatter_offset_p_s16( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_s16( __base, __offset, __value, __p) | |
416 | #define vstrhq_scatter_offset_p_u32( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_u32( __base, __offset, __value, __p) | |
417 | #define vstrhq_scatter_offset_p_u16( __base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_u16( __base, __offset, __value, __p) | |
418 | #define vstrhq_scatter_shifted_offset_s32( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_s32( __base, __offset, __value) | |
419 | #define vstrhq_scatter_shifted_offset_s16( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_s16( __base, __offset, __value) | |
420 | #define vstrhq_scatter_shifted_offset_u32( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_u32( __base, __offset, __value) | |
421 | #define vstrhq_scatter_shifted_offset_u16( __base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_u16( __base, __offset, __value) | |
422 | #define vstrhq_scatter_shifted_offset_p_s32( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_s32( __base, __offset, __value, __p) | |
423 | #define vstrhq_scatter_shifted_offset_p_s16( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_s16( __base, __offset, __value, __p) | |
424 | #define vstrhq_scatter_shifted_offset_p_u32( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_u32( __base, __offset, __value, __p) | |
425 | #define vstrhq_scatter_shifted_offset_p_u16( __base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_u16( __base, __offset, __value, __p) | |
426 | #define vstrhq_s32(__addr, __value) __arm_vstrhq_s32(__addr, __value) | |
427 | #define vstrhq_s16(__addr, __value) __arm_vstrhq_s16(__addr, __value) | |
428 | #define vstrhq_u32(__addr, __value) __arm_vstrhq_u32(__addr, __value) | |
429 | #define vstrhq_u16(__addr, __value) __arm_vstrhq_u16(__addr, __value) | |
430 | #define vstrhq_p_f16(__addr, __value, __p) __arm_vstrhq_p_f16(__addr, __value, __p) | |
431 | #define vstrhq_p_s32(__addr, __value, __p) __arm_vstrhq_p_s32(__addr, __value, __p) | |
432 | #define vstrhq_p_s16(__addr, __value, __p) __arm_vstrhq_p_s16(__addr, __value, __p) | |
433 | #define vstrhq_p_u32(__addr, __value, __p) __arm_vstrhq_p_u32(__addr, __value, __p) | |
434 | #define vstrhq_p_u16(__addr, __value, __p) __arm_vstrhq_p_u16(__addr, __value, __p) | |
435 | #define vstrwq_f32(__addr, __value) __arm_vstrwq_f32(__addr, __value) | |
436 | #define vstrwq_s32(__addr, __value) __arm_vstrwq_s32(__addr, __value) | |
437 | #define vstrwq_u32(__addr, __value) __arm_vstrwq_u32(__addr, __value) | |
438 | #define vstrwq_p_f32(__addr, __value, __p) __arm_vstrwq_p_f32(__addr, __value, __p) | |
439 | #define vstrwq_p_s32(__addr, __value, __p) __arm_vstrwq_p_s32(__addr, __value, __p) | |
440 | #define vstrwq_p_u32(__addr, __value, __p) __arm_vstrwq_p_u32(__addr, __value, __p) | |
7a5fffa5 SP |
441 | #define vstrdq_scatter_base_p_s64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_p_s64(__addr, __offset, __value, __p) |
442 | #define vstrdq_scatter_base_p_u64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_p_u64(__addr, __offset, __value, __p) | |
443 | #define vstrdq_scatter_base_s64(__addr, __offset, __value) __arm_vstrdq_scatter_base_s64(__addr, __offset, __value) | |
444 | #define vstrdq_scatter_base_u64(__addr, __offset, __value) __arm_vstrdq_scatter_base_u64(__addr, __offset, __value) | |
445 | #define vstrdq_scatter_offset_p_s64(__base, __offset, __value, __p) __arm_vstrdq_scatter_offset_p_s64(__base, __offset, __value, __p) | |
446 | #define vstrdq_scatter_offset_p_u64(__base, __offset, __value, __p) __arm_vstrdq_scatter_offset_p_u64(__base, __offset, __value, __p) | |
447 | #define vstrdq_scatter_offset_s64(__base, __offset, __value) __arm_vstrdq_scatter_offset_s64(__base, __offset, __value) | |
448 | #define vstrdq_scatter_offset_u64(__base, __offset, __value) __arm_vstrdq_scatter_offset_u64(__base, __offset, __value) | |
449 | #define vstrdq_scatter_shifted_offset_p_s64(__base, __offset, __value, __p) __arm_vstrdq_scatter_shifted_offset_p_s64(__base, __offset, __value, __p) | |
450 | #define vstrdq_scatter_shifted_offset_p_u64(__base, __offset, __value, __p) __arm_vstrdq_scatter_shifted_offset_p_u64(__base, __offset, __value, __p) | |
451 | #define vstrdq_scatter_shifted_offset_s64(__base, __offset, __value) __arm_vstrdq_scatter_shifted_offset_s64(__base, __offset, __value) | |
452 | #define vstrdq_scatter_shifted_offset_u64(__base, __offset, __value) __arm_vstrdq_scatter_shifted_offset_u64(__base, __offset, __value) | |
453 | #define vstrhq_scatter_offset_f16(__base, __offset, __value) __arm_vstrhq_scatter_offset_f16(__base, __offset, __value) | |
454 | #define vstrhq_scatter_offset_p_f16(__base, __offset, __value, __p) __arm_vstrhq_scatter_offset_p_f16(__base, __offset, __value, __p) | |
455 | #define vstrhq_scatter_shifted_offset_f16(__base, __offset, __value) __arm_vstrhq_scatter_shifted_offset_f16(__base, __offset, __value) | |
456 | #define vstrhq_scatter_shifted_offset_p_f16(__base, __offset, __value, __p) __arm_vstrhq_scatter_shifted_offset_p_f16(__base, __offset, __value, __p) | |
457 | #define vstrwq_scatter_base_f32(__addr, __offset, __value) __arm_vstrwq_scatter_base_f32(__addr, __offset, __value) | |
458 | #define vstrwq_scatter_base_p_f32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_p_f32(__addr, __offset, __value, __p) | |
459 | #define vstrwq_scatter_offset_f32(__base, __offset, __value) __arm_vstrwq_scatter_offset_f32(__base, __offset, __value) | |
460 | #define vstrwq_scatter_offset_p_f32(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p_f32(__base, __offset, __value, __p) | |
461 | #define vstrwq_scatter_offset_p_s32(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p_s32(__base, __offset, __value, __p) | |
462 | #define vstrwq_scatter_offset_p_u32(__base, __offset, __value, __p) __arm_vstrwq_scatter_offset_p_u32(__base, __offset, __value, __p) | |
463 | #define vstrwq_scatter_offset_s32(__base, __offset, __value) __arm_vstrwq_scatter_offset_s32(__base, __offset, __value) | |
464 | #define vstrwq_scatter_offset_u32(__base, __offset, __value) __arm_vstrwq_scatter_offset_u32(__base, __offset, __value) | |
465 | #define vstrwq_scatter_shifted_offset_f32(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset_f32(__base, __offset, __value) | |
466 | #define vstrwq_scatter_shifted_offset_p_f32(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p_f32(__base, __offset, __value, __p) | |
467 | #define vstrwq_scatter_shifted_offset_p_s32(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p_s32(__base, __offset, __value, __p) | |
468 | #define vstrwq_scatter_shifted_offset_p_u32(__base, __offset, __value, __p) __arm_vstrwq_scatter_shifted_offset_p_u32(__base, __offset, __value, __p) | |
469 | #define vstrwq_scatter_shifted_offset_s32(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset_s32(__base, __offset, __value) | |
470 | #define vstrwq_scatter_shifted_offset_u32(__base, __offset, __value) __arm_vstrwq_scatter_shifted_offset_u32(__base, __offset, __value) | |
85a94e87 SP |
471 | #define vuninitializedq_u8(void) __arm_vuninitializedq_u8(void) |
472 | #define vuninitializedq_u16(void) __arm_vuninitializedq_u16(void) | |
473 | #define vuninitializedq_u32(void) __arm_vuninitializedq_u32(void) | |
474 | #define vuninitializedq_u64(void) __arm_vuninitializedq_u64(void) | |
475 | #define vuninitializedq_s8(void) __arm_vuninitializedq_s8(void) | |
476 | #define vuninitializedq_s16(void) __arm_vuninitializedq_s16(void) | |
477 | #define vuninitializedq_s32(void) __arm_vuninitializedq_s32(void) | |
478 | #define vuninitializedq_s64(void) __arm_vuninitializedq_s64(void) | |
479 | #define vuninitializedq_f16(void) __arm_vuninitializedq_f16(void) | |
480 | #define vuninitializedq_f32(void) __arm_vuninitializedq_f32(void) | |
92f80065 SP |
481 | #define vddupq_m_n_u8(__inactive, __a, __imm, __p) __arm_vddupq_m_n_u8(__inactive, __a, __imm, __p) |
482 | #define vddupq_m_n_u32(__inactive, __a, __imm, __p) __arm_vddupq_m_n_u32(__inactive, __a, __imm, __p) | |
483 | #define vddupq_m_n_u16(__inactive, __a, __imm, __p) __arm_vddupq_m_n_u16(__inactive, __a, __imm, __p) | |
484 | #define vddupq_m_wb_u8(__inactive, __a, __imm, __p) __arm_vddupq_m_wb_u8(__inactive, __a, __imm, __p) | |
485 | #define vddupq_m_wb_u16(__inactive, __a, __imm, __p) __arm_vddupq_m_wb_u16(__inactive, __a, __imm, __p) | |
486 | #define vddupq_m_wb_u32(__inactive, __a, __imm, __p) __arm_vddupq_m_wb_u32(__inactive, __a, __imm, __p) | |
487 | #define vddupq_n_u8(__a, __imm) __arm_vddupq_n_u8(__a, __imm) | |
488 | #define vddupq_n_u32(__a, __imm) __arm_vddupq_n_u32(__a, __imm) | |
489 | #define vddupq_n_u16(__a, __imm) __arm_vddupq_n_u16(__a, __imm) | |
490 | #define vddupq_wb_u8( __a, __imm) __arm_vddupq_wb_u8( __a, __imm) | |
491 | #define vddupq_wb_u16( __a, __imm) __arm_vddupq_wb_u16( __a, __imm) | |
492 | #define vddupq_wb_u32( __a, __imm) __arm_vddupq_wb_u32( __a, __imm) | |
493 | #define vdwdupq_m_n_u8(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m_n_u8(__inactive, __a, __b, __imm, __p) | |
494 | #define vdwdupq_m_n_u32(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m_n_u32(__inactive, __a, __b, __imm, __p) | |
495 | #define vdwdupq_m_n_u16(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m_n_u16(__inactive, __a, __b, __imm, __p) | |
496 | #define vdwdupq_m_wb_u8(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m_wb_u8(__inactive, __a, __b, __imm, __p) | |
497 | #define vdwdupq_m_wb_u32(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m_wb_u32(__inactive, __a, __b, __imm, __p) | |
498 | #define vdwdupq_m_wb_u16(__inactive, __a, __b, __imm, __p) __arm_vdwdupq_m_wb_u16(__inactive, __a, __b, __imm, __p) | |
499 | #define vdwdupq_n_u8(__a, __b, __imm) __arm_vdwdupq_n_u8(__a, __b, __imm) | |
500 | #define vdwdupq_n_u32(__a, __b, __imm) __arm_vdwdupq_n_u32(__a, __b, __imm) | |
501 | #define vdwdupq_n_u16(__a, __b, __imm) __arm_vdwdupq_n_u16(__a, __b, __imm) | |
502 | #define vdwdupq_wb_u8( __a, __b, __imm) __arm_vdwdupq_wb_u8( __a, __b, __imm) | |
503 | #define vdwdupq_wb_u32( __a, __b, __imm) __arm_vdwdupq_wb_u32( __a, __b, __imm) | |
504 | #define vdwdupq_wb_u16( __a, __b, __imm) __arm_vdwdupq_wb_u16( __a, __b, __imm) | |
505 | #define vidupq_m_n_u8(__inactive, __a, __imm, __p) __arm_vidupq_m_n_u8(__inactive, __a, __imm, __p) | |
506 | #define vidupq_m_n_u32(__inactive, __a, __imm, __p) __arm_vidupq_m_n_u32(__inactive, __a, __imm, __p) | |
507 | #define vidupq_m_n_u16(__inactive, __a, __imm, __p) __arm_vidupq_m_n_u16(__inactive, __a, __imm, __p) | |
508 | #define vidupq_m_wb_u8(__inactive, __a, __imm, __p) __arm_vidupq_m_wb_u8(__inactive, __a, __imm, __p) | |
509 | #define vidupq_m_wb_u16(__inactive, __a, __imm, __p) __arm_vidupq_m_wb_u16(__inactive, __a, __imm, __p) | |
510 | #define vidupq_m_wb_u32(__inactive, __a, __imm, __p) __arm_vidupq_m_wb_u32(__inactive, __a, __imm, __p) | |
511 | #define vidupq_n_u8(__a, __imm) __arm_vidupq_n_u8(__a, __imm) | |
512 | #define vidupq_n_u32(__a, __imm) __arm_vidupq_n_u32(__a, __imm) | |
513 | #define vidupq_n_u16(__a, __imm) __arm_vidupq_n_u16(__a, __imm) | |
514 | #define vidupq_wb_u8( __a, __imm) __arm_vidupq_wb_u8( __a, __imm) | |
515 | #define vidupq_wb_u16( __a, __imm) __arm_vidupq_wb_u16( __a, __imm) | |
516 | #define vidupq_wb_u32( __a, __imm) __arm_vidupq_wb_u32( __a, __imm) | |
517 | #define viwdupq_m_n_u8(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m_n_u8(__inactive, __a, __b, __imm, __p) | |
518 | #define viwdupq_m_n_u32(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m_n_u32(__inactive, __a, __b, __imm, __p) | |
519 | #define viwdupq_m_n_u16(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m_n_u16(__inactive, __a, __b, __imm, __p) | |
520 | #define viwdupq_m_wb_u8(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m_wb_u8(__inactive, __a, __b, __imm, __p) | |
521 | #define viwdupq_m_wb_u32(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m_wb_u32(__inactive, __a, __b, __imm, __p) | |
522 | #define viwdupq_m_wb_u16(__inactive, __a, __b, __imm, __p) __arm_viwdupq_m_wb_u16(__inactive, __a, __b, __imm, __p) | |
523 | #define viwdupq_n_u8(__a, __b, __imm) __arm_viwdupq_n_u8(__a, __b, __imm) | |
524 | #define viwdupq_n_u32(__a, __b, __imm) __arm_viwdupq_n_u32(__a, __b, __imm) | |
525 | #define viwdupq_n_u16(__a, __b, __imm) __arm_viwdupq_n_u16(__a, __b, __imm) | |
526 | #define viwdupq_wb_u8( __a, __b, __imm) __arm_viwdupq_wb_u8( __a, __b, __imm) | |
527 | #define viwdupq_wb_u32( __a, __b, __imm) __arm_viwdupq_wb_u32( __a, __b, __imm) | |
528 | #define viwdupq_wb_u16( __a, __b, __imm) __arm_viwdupq_wb_u16( __a, __b, __imm) | |
41e1a7ff SP |
529 | #define vldrdq_gather_base_wb_s64(__addr, __offset) __arm_vldrdq_gather_base_wb_s64(__addr, __offset) |
530 | #define vldrdq_gather_base_wb_u64(__addr, __offset) __arm_vldrdq_gather_base_wb_u64(__addr, __offset) | |
531 | #define vldrdq_gather_base_wb_z_s64(__addr, __offset, __p) __arm_vldrdq_gather_base_wb_z_s64(__addr, __offset, __p) | |
532 | #define vldrdq_gather_base_wb_z_u64(__addr, __offset, __p) __arm_vldrdq_gather_base_wb_z_u64(__addr, __offset, __p) | |
533 | #define vldrwq_gather_base_wb_f32(__addr, __offset) __arm_vldrwq_gather_base_wb_f32(__addr, __offset) | |
534 | #define vldrwq_gather_base_wb_s32(__addr, __offset) __arm_vldrwq_gather_base_wb_s32(__addr, __offset) | |
535 | #define vldrwq_gather_base_wb_u32(__addr, __offset) __arm_vldrwq_gather_base_wb_u32(__addr, __offset) | |
536 | #define vldrwq_gather_base_wb_z_f32(__addr, __offset, __p) __arm_vldrwq_gather_base_wb_z_f32(__addr, __offset, __p) | |
537 | #define vldrwq_gather_base_wb_z_s32(__addr, __offset, __p) __arm_vldrwq_gather_base_wb_z_s32(__addr, __offset, __p) | |
538 | #define vldrwq_gather_base_wb_z_u32(__addr, __offset, __p) __arm_vldrwq_gather_base_wb_z_u32(__addr, __offset, __p) | |
539 | #define vstrdq_scatter_base_wb_p_s64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_wb_p_s64(__addr, __offset, __value, __p) | |
540 | #define vstrdq_scatter_base_wb_p_u64(__addr, __offset, __value, __p) __arm_vstrdq_scatter_base_wb_p_u64(__addr, __offset, __value, __p) | |
541 | #define vstrdq_scatter_base_wb_s64(__addr, __offset, __value) __arm_vstrdq_scatter_base_wb_s64(__addr, __offset, __value) | |
542 | #define vstrdq_scatter_base_wb_u64(__addr, __offset, __value) __arm_vstrdq_scatter_base_wb_u64(__addr, __offset, __value) | |
543 | #define vstrwq_scatter_base_wb_p_s32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p_s32(__addr, __offset, __value, __p) | |
544 | #define vstrwq_scatter_base_wb_p_f32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p_f32(__addr, __offset, __value, __p) | |
545 | #define vstrwq_scatter_base_wb_p_u32(__addr, __offset, __value, __p) __arm_vstrwq_scatter_base_wb_p_u32(__addr, __offset, __value, __p) | |
546 | #define vstrwq_scatter_base_wb_s32(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb_s32(__addr, __offset, __value) | |
547 | #define vstrwq_scatter_base_wb_u32(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb_u32(__addr, __offset, __value) | |
548 | #define vstrwq_scatter_base_wb_f32(__addr, __offset, __value) __arm_vstrwq_scatter_base_wb_f32(__addr, __offset, __value) | |
261014a1 SP |
549 | #define vddupq_x_n_u8(__a, __imm, __p) __arm_vddupq_x_n_u8(__a, __imm, __p) |
550 | #define vddupq_x_n_u16(__a, __imm, __p) __arm_vddupq_x_n_u16(__a, __imm, __p) | |
551 | #define vddupq_x_n_u32(__a, __imm, __p) __arm_vddupq_x_n_u32(__a, __imm, __p) | |
552 | #define vddupq_x_wb_u8(__a, __imm, __p) __arm_vddupq_x_wb_u8(__a, __imm, __p) | |
553 | #define vddupq_x_wb_u16(__a, __imm, __p) __arm_vddupq_x_wb_u16(__a, __imm, __p) | |
554 | #define vddupq_x_wb_u32(__a, __imm, __p) __arm_vddupq_x_wb_u32(__a, __imm, __p) | |
555 | #define vdwdupq_x_n_u8(__a, __b, __imm, __p) __arm_vdwdupq_x_n_u8(__a, __b, __imm, __p) | |
556 | #define vdwdupq_x_n_u16(__a, __b, __imm, __p) __arm_vdwdupq_x_n_u16(__a, __b, __imm, __p) | |
557 | #define vdwdupq_x_n_u32(__a, __b, __imm, __p) __arm_vdwdupq_x_n_u32(__a, __b, __imm, __p) | |
558 | #define vdwdupq_x_wb_u8(__a, __b, __imm, __p) __arm_vdwdupq_x_wb_u8(__a, __b, __imm, __p) | |
559 | #define vdwdupq_x_wb_u16(__a, __b, __imm, __p) __arm_vdwdupq_x_wb_u16(__a, __b, __imm, __p) | |
560 | #define vdwdupq_x_wb_u32(__a, __b, __imm, __p) __arm_vdwdupq_x_wb_u32(__a, __b, __imm, __p) | |
561 | #define vidupq_x_n_u8(__a, __imm, __p) __arm_vidupq_x_n_u8(__a, __imm, __p) | |
562 | #define vidupq_x_n_u16(__a, __imm, __p) __arm_vidupq_x_n_u16(__a, __imm, __p) | |
563 | #define vidupq_x_n_u32(__a, __imm, __p) __arm_vidupq_x_n_u32(__a, __imm, __p) | |
564 | #define vidupq_x_wb_u8(__a, __imm, __p) __arm_vidupq_x_wb_u8(__a, __imm, __p) | |
565 | #define vidupq_x_wb_u16(__a, __imm, __p) __arm_vidupq_x_wb_u16(__a, __imm, __p) | |
566 | #define vidupq_x_wb_u32(__a, __imm, __p) __arm_vidupq_x_wb_u32(__a, __imm, __p) | |
567 | #define viwdupq_x_n_u8(__a, __b, __imm, __p) __arm_viwdupq_x_n_u8(__a, __b, __imm, __p) | |
568 | #define viwdupq_x_n_u16(__a, __b, __imm, __p) __arm_viwdupq_x_n_u16(__a, __b, __imm, __p) | |
569 | #define viwdupq_x_n_u32(__a, __b, __imm, __p) __arm_viwdupq_x_n_u32(__a, __b, __imm, __p) | |
570 | #define viwdupq_x_wb_u8(__a, __b, __imm, __p) __arm_viwdupq_x_wb_u8(__a, __b, __imm, __p) | |
571 | #define viwdupq_x_wb_u16(__a, __b, __imm, __p) __arm_viwdupq_x_wb_u16(__a, __b, __imm, __p) | |
572 | #define viwdupq_x_wb_u32(__a, __b, __imm, __p) __arm_viwdupq_x_wb_u32(__a, __b, __imm, __p) | |
261014a1 SP |
573 | #define vbicq_x_s8(__a, __b, __p) __arm_vbicq_x_s8(__a, __b, __p) |
574 | #define vbicq_x_s16(__a, __b, __p) __arm_vbicq_x_s16(__a, __b, __p) | |
575 | #define vbicq_x_s32(__a, __b, __p) __arm_vbicq_x_s32(__a, __b, __p) | |
576 | #define vbicq_x_u8(__a, __b, __p) __arm_vbicq_x_u8(__a, __b, __p) | |
577 | #define vbicq_x_u16(__a, __b, __p) __arm_vbicq_x_u16(__a, __b, __p) | |
578 | #define vbicq_x_u32(__a, __b, __p) __arm_vbicq_x_u32(__a, __b, __p) | |
261014a1 SP |
579 | #define vornq_x_s8(__a, __b, __p) __arm_vornq_x_s8(__a, __b, __p) |
580 | #define vornq_x_s16(__a, __b, __p) __arm_vornq_x_s16(__a, __b, __p) | |
581 | #define vornq_x_s32(__a, __b, __p) __arm_vornq_x_s32(__a, __b, __p) | |
582 | #define vornq_x_u8(__a, __b, __p) __arm_vornq_x_u8(__a, __b, __p) | |
583 | #define vornq_x_u16(__a, __b, __p) __arm_vornq_x_u16(__a, __b, __p) | |
584 | #define vornq_x_u32(__a, __b, __p) __arm_vornq_x_u32(__a, __b, __p) | |
261014a1 SP |
585 | #define vcvtaq_x_s16_f16(__a, __p) __arm_vcvtaq_x_s16_f16(__a, __p) |
586 | #define vcvtaq_x_s32_f32(__a, __p) __arm_vcvtaq_x_s32_f32(__a, __p) | |
587 | #define vcvtaq_x_u16_f16(__a, __p) __arm_vcvtaq_x_u16_f16(__a, __p) | |
588 | #define vcvtaq_x_u32_f32(__a, __p) __arm_vcvtaq_x_u32_f32(__a, __p) | |
589 | #define vcvtnq_x_s16_f16(__a, __p) __arm_vcvtnq_x_s16_f16(__a, __p) | |
590 | #define vcvtnq_x_s32_f32(__a, __p) __arm_vcvtnq_x_s32_f32(__a, __p) | |
591 | #define vcvtnq_x_u16_f16(__a, __p) __arm_vcvtnq_x_u16_f16(__a, __p) | |
592 | #define vcvtnq_x_u32_f32(__a, __p) __arm_vcvtnq_x_u32_f32(__a, __p) | |
593 | #define vcvtpq_x_s16_f16(__a, __p) __arm_vcvtpq_x_s16_f16(__a, __p) | |
594 | #define vcvtpq_x_s32_f32(__a, __p) __arm_vcvtpq_x_s32_f32(__a, __p) | |
595 | #define vcvtpq_x_u16_f16(__a, __p) __arm_vcvtpq_x_u16_f16(__a, __p) | |
596 | #define vcvtpq_x_u32_f32(__a, __p) __arm_vcvtpq_x_u32_f32(__a, __p) | |
597 | #define vcvtmq_x_s16_f16(__a, __p) __arm_vcvtmq_x_s16_f16(__a, __p) | |
598 | #define vcvtmq_x_s32_f32(__a, __p) __arm_vcvtmq_x_s32_f32(__a, __p) | |
599 | #define vcvtmq_x_u16_f16(__a, __p) __arm_vcvtmq_x_u16_f16(__a, __p) | |
600 | #define vcvtmq_x_u32_f32(__a, __p) __arm_vcvtmq_x_u32_f32(__a, __p) | |
601 | #define vcvtbq_x_f32_f16(__a, __p) __arm_vcvtbq_x_f32_f16(__a, __p) | |
602 | #define vcvttq_x_f32_f16(__a, __p) __arm_vcvttq_x_f32_f16(__a, __p) | |
603 | #define vcvtq_x_f16_u16(__a, __p) __arm_vcvtq_x_f16_u16(__a, __p) | |
604 | #define vcvtq_x_f16_s16(__a, __p) __arm_vcvtq_x_f16_s16(__a, __p) | |
605 | #define vcvtq_x_f32_s32(__a, __p) __arm_vcvtq_x_f32_s32(__a, __p) | |
606 | #define vcvtq_x_f32_u32(__a, __p) __arm_vcvtq_x_f32_u32(__a, __p) | |
607 | #define vcvtq_x_n_f16_s16(__a, __imm6, __p) __arm_vcvtq_x_n_f16_s16(__a, __imm6, __p) | |
608 | #define vcvtq_x_n_f16_u16(__a, __imm6, __p) __arm_vcvtq_x_n_f16_u16(__a, __imm6, __p) | |
609 | #define vcvtq_x_n_f32_s32(__a, __imm6, __p) __arm_vcvtq_x_n_f32_s32(__a, __imm6, __p) | |
610 | #define vcvtq_x_n_f32_u32(__a, __imm6, __p) __arm_vcvtq_x_n_f32_u32(__a, __imm6, __p) | |
611 | #define vcvtq_x_s16_f16(__a, __p) __arm_vcvtq_x_s16_f16(__a, __p) | |
612 | #define vcvtq_x_s32_f32(__a, __p) __arm_vcvtq_x_s32_f32(__a, __p) | |
613 | #define vcvtq_x_u16_f16(__a, __p) __arm_vcvtq_x_u16_f16(__a, __p) | |
614 | #define vcvtq_x_u32_f32(__a, __p) __arm_vcvtq_x_u32_f32(__a, __p) | |
615 | #define vcvtq_x_n_s16_f16(__a, __imm6, __p) __arm_vcvtq_x_n_s16_f16(__a, __imm6, __p) | |
616 | #define vcvtq_x_n_s32_f32(__a, __imm6, __p) __arm_vcvtq_x_n_s32_f32(__a, __imm6, __p) | |
617 | #define vcvtq_x_n_u16_f16(__a, __imm6, __p) __arm_vcvtq_x_n_u16_f16(__a, __imm6, __p) | |
618 | #define vcvtq_x_n_u32_f32(__a, __imm6, __p) __arm_vcvtq_x_n_u32_f32(__a, __imm6, __p) | |
261014a1 SP |
619 | #define vbicq_x_f16(__a, __b, __p) __arm_vbicq_x_f16(__a, __b, __p) |
620 | #define vbicq_x_f32(__a, __b, __p) __arm_vbicq_x_f32(__a, __b, __p) | |
261014a1 SP |
621 | #define vornq_x_f16(__a, __b, __p) __arm_vornq_x_f16(__a, __b, __p) |
622 | #define vornq_x_f32(__a, __b, __p) __arm_vornq_x_f32(__a, __b, __p) | |
c3562f81 SP |
623 | #define vadciq_s32(__a, __b, __carry_out) __arm_vadciq_s32(__a, __b, __carry_out) |
624 | #define vadciq_u32(__a, __b, __carry_out) __arm_vadciq_u32(__a, __b, __carry_out) | |
625 | #define vadciq_m_s32(__inactive, __a, __b, __carry_out, __p) __arm_vadciq_m_s32(__inactive, __a, __b, __carry_out, __p) | |
626 | #define vadciq_m_u32(__inactive, __a, __b, __carry_out, __p) __arm_vadciq_m_u32(__inactive, __a, __b, __carry_out, __p) | |
627 | #define vadcq_s32(__a, __b, __carry) __arm_vadcq_s32(__a, __b, __carry) | |
628 | #define vadcq_u32(__a, __b, __carry) __arm_vadcq_u32(__a, __b, __carry) | |
629 | #define vadcq_m_s32(__inactive, __a, __b, __carry, __p) __arm_vadcq_m_s32(__inactive, __a, __b, __carry, __p) | |
630 | #define vadcq_m_u32(__inactive, __a, __b, __carry, __p) __arm_vadcq_m_u32(__inactive, __a, __b, __carry, __p) | |
631 | #define vsbciq_s32(__a, __b, __carry_out) __arm_vsbciq_s32(__a, __b, __carry_out) | |
632 | #define vsbciq_u32(__a, __b, __carry_out) __arm_vsbciq_u32(__a, __b, __carry_out) | |
633 | #define vsbciq_m_s32(__inactive, __a, __b, __carry_out, __p) __arm_vsbciq_m_s32(__inactive, __a, __b, __carry_out, __p) | |
634 | #define vsbciq_m_u32(__inactive, __a, __b, __carry_out, __p) __arm_vsbciq_m_u32(__inactive, __a, __b, __carry_out, __p) | |
635 | #define vsbcq_s32(__a, __b, __carry) __arm_vsbcq_s32(__a, __b, __carry) | |
636 | #define vsbcq_u32(__a, __b, __carry) __arm_vsbcq_u32(__a, __b, __carry) | |
637 | #define vsbcq_m_s32(__inactive, __a, __b, __carry, __p) __arm_vsbcq_m_s32(__inactive, __a, __b, __carry, __p) | |
638 | #define vsbcq_m_u32(__inactive, __a, __b, __carry, __p) __arm_vsbcq_m_u32(__inactive, __a, __b, __carry, __p) | |
1dfcc3b5 SP |
639 | #define vst1q_p_u8(__addr, __value, __p) __arm_vst1q_p_u8(__addr, __value, __p) |
640 | #define vst1q_p_s8(__addr, __value, __p) __arm_vst1q_p_s8(__addr, __value, __p) | |
641 | #define vst2q_s8(__addr, __value) __arm_vst2q_s8(__addr, __value) | |
642 | #define vst2q_u8(__addr, __value) __arm_vst2q_u8(__addr, __value) | |
643 | #define vld1q_z_u8(__base, __p) __arm_vld1q_z_u8(__base, __p) | |
644 | #define vld1q_z_s8(__base, __p) __arm_vld1q_z_s8(__base, __p) | |
645 | #define vld2q_s8(__addr) __arm_vld2q_s8(__addr) | |
646 | #define vld2q_u8(__addr) __arm_vld2q_u8(__addr) | |
647 | #define vld4q_s8(__addr) __arm_vld4q_s8(__addr) | |
648 | #define vld4q_u8(__addr) __arm_vld4q_u8(__addr) | |
649 | #define vst1q_p_u16(__addr, __value, __p) __arm_vst1q_p_u16(__addr, __value, __p) | |
650 | #define vst1q_p_s16(__addr, __value, __p) __arm_vst1q_p_s16(__addr, __value, __p) | |
651 | #define vst2q_s16(__addr, __value) __arm_vst2q_s16(__addr, __value) | |
652 | #define vst2q_u16(__addr, __value) __arm_vst2q_u16(__addr, __value) | |
653 | #define vld1q_z_u16(__base, __p) __arm_vld1q_z_u16(__base, __p) | |
654 | #define vld1q_z_s16(__base, __p) __arm_vld1q_z_s16(__base, __p) | |
655 | #define vld2q_s16(__addr) __arm_vld2q_s16(__addr) | |
656 | #define vld2q_u16(__addr) __arm_vld2q_u16(__addr) | |
657 | #define vld4q_s16(__addr) __arm_vld4q_s16(__addr) | |
658 | #define vld4q_u16(__addr) __arm_vld4q_u16(__addr) | |
659 | #define vst1q_p_u32(__addr, __value, __p) __arm_vst1q_p_u32(__addr, __value, __p) | |
660 | #define vst1q_p_s32(__addr, __value, __p) __arm_vst1q_p_s32(__addr, __value, __p) | |
661 | #define vst2q_s32(__addr, __value) __arm_vst2q_s32(__addr, __value) | |
662 | #define vst2q_u32(__addr, __value) __arm_vst2q_u32(__addr, __value) | |
663 | #define vld1q_z_u32(__base, __p) __arm_vld1q_z_u32(__base, __p) | |
664 | #define vld1q_z_s32(__base, __p) __arm_vld1q_z_s32(__base, __p) | |
665 | #define vld2q_s32(__addr) __arm_vld2q_s32(__addr) | |
666 | #define vld2q_u32(__addr) __arm_vld2q_u32(__addr) | |
667 | #define vld4q_s32(__addr) __arm_vld4q_s32(__addr) | |
668 | #define vld4q_u32(__addr) __arm_vld4q_u32(__addr) | |
669 | #define vld4q_f16(__addr) __arm_vld4q_f16(__addr) | |
670 | #define vld2q_f16(__addr) __arm_vld2q_f16(__addr) | |
671 | #define vld1q_z_f16(__base, __p) __arm_vld1q_z_f16(__base, __p) | |
672 | #define vst2q_f16(__addr, __value) __arm_vst2q_f16(__addr, __value) | |
673 | #define vst1q_p_f16(__addr, __value, __p) __arm_vst1q_p_f16(__addr, __value, __p) | |
674 | #define vld4q_f32(__addr) __arm_vld4q_f32(__addr) | |
675 | #define vld2q_f32(__addr) __arm_vld2q_f32(__addr) | |
676 | #define vld1q_z_f32(__base, __p) __arm_vld1q_z_f32(__base, __p) | |
677 | #define vst2q_f32(__addr, __value) __arm_vst2q_f32(__addr, __value) | |
678 | #define vst1q_p_f32(__addr, __value, __p) __arm_vst1q_p_f32(__addr, __value, __p) | |
1a5c27b1 SP |
679 | #define vsetq_lane_f16(__a, __b, __idx) __arm_vsetq_lane_f16(__a, __b, __idx) |
680 | #define vsetq_lane_f32(__a, __b, __idx) __arm_vsetq_lane_f32(__a, __b, __idx) | |
681 | #define vsetq_lane_s16(__a, __b, __idx) __arm_vsetq_lane_s16(__a, __b, __idx) | |
682 | #define vsetq_lane_s32(__a, __b, __idx) __arm_vsetq_lane_s32(__a, __b, __idx) | |
683 | #define vsetq_lane_s8(__a, __b, __idx) __arm_vsetq_lane_s8(__a, __b, __idx) | |
684 | #define vsetq_lane_s64(__a, __b, __idx) __arm_vsetq_lane_s64(__a, __b, __idx) | |
685 | #define vsetq_lane_u8(__a, __b, __idx) __arm_vsetq_lane_u8(__a, __b, __idx) | |
686 | #define vsetq_lane_u16(__a, __b, __idx) __arm_vsetq_lane_u16(__a, __b, __idx) | |
687 | #define vsetq_lane_u32(__a, __b, __idx) __arm_vsetq_lane_u32(__a, __b, __idx) | |
688 | #define vsetq_lane_u64(__a, __b, __idx) __arm_vsetq_lane_u64(__a, __b, __idx) | |
689 | #define vgetq_lane_f16(__a, __idx) __arm_vgetq_lane_f16(__a, __idx) | |
690 | #define vgetq_lane_f32(__a, __idx) __arm_vgetq_lane_f32(__a, __idx) | |
691 | #define vgetq_lane_s16(__a, __idx) __arm_vgetq_lane_s16(__a, __idx) | |
692 | #define vgetq_lane_s32(__a, __idx) __arm_vgetq_lane_s32(__a, __idx) | |
693 | #define vgetq_lane_s8(__a, __idx) __arm_vgetq_lane_s8(__a, __idx) | |
694 | #define vgetq_lane_s64(__a, __idx) __arm_vgetq_lane_s64(__a, __idx) | |
695 | #define vgetq_lane_u8(__a, __idx) __arm_vgetq_lane_u8(__a, __idx) | |
696 | #define vgetq_lane_u16(__a, __idx) __arm_vgetq_lane_u16(__a, __idx) | |
697 | #define vgetq_lane_u32(__a, __idx) __arm_vgetq_lane_u32(__a, __idx) | |
698 | #define vgetq_lane_u64(__a, __idx) __arm_vgetq_lane_u64(__a, __idx) | |
85244449 SP |
699 | #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1) |
700 | #define sqrshrl(__p0, __p1) __arm_sqrshrl(__p0, __p1) | |
701 | #define sqrshrl_sat48(__p0, __p1) __arm_sqrshrl_sat48(__p0, __p1) | |
702 | #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1) | |
703 | #define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1) | |
704 | #define srshr(__p0, __p1) __arm_srshr(__p0, __p1) | |
705 | #define srshrl(__p0, __p1) __arm_srshrl(__p0, __p1) | |
706 | #define uqrshl(__p0, __p1) __arm_uqrshl(__p0, __p1) | |
707 | #define uqrshll(__p0, __p1) __arm_uqrshll(__p0, __p1) | |
708 | #define uqrshll_sat48(__p0, __p1) __arm_uqrshll_sat48(__p0, __p1) | |
709 | #define uqshl(__p0, __p1) __arm_uqshl(__p0, __p1) | |
710 | #define uqshll(__p0, __p1) __arm_uqshll(__p0, __p1) | |
711 | #define urshr(__p0, __p1) __arm_urshr(__p0, __p1) | |
712 | #define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1) | |
713 | #define lsll(__p0, __p1) __arm_lsll(__p0, __p1) | |
714 | #define asrl(__p0, __p1) __arm_asrl(__p0, __p1) | |
88c9a831 SP |
715 | #define vshlcq_m_s8(__a, __b, __imm, __p) __arm_vshlcq_m_s8(__a, __b, __imm, __p) |
716 | #define vshlcq_m_u8(__a, __b, __imm, __p) __arm_vshlcq_m_u8(__a, __b, __imm, __p) | |
717 | #define vshlcq_m_s16(__a, __b, __imm, __p) __arm_vshlcq_m_s16(__a, __b, __imm, __p) | |
718 | #define vshlcq_m_u16(__a, __b, __imm, __p) __arm_vshlcq_m_u16(__a, __b, __imm, __p) | |
719 | #define vshlcq_m_s32(__a, __b, __imm, __p) __arm_vshlcq_m_s32(__a, __b, __imm, __p) | |
720 | #define vshlcq_m_u32(__a, __b, __imm, __p) __arm_vshlcq_m_u32(__a, __b, __imm, __p) | |
14782c81 SP |
721 | #endif |
722 | ||
1a5c27b1 SP |
723 | /* For big-endian, GCC's vector indices are reversed within each 64 bits |
724 | compared to the architectural lane indices used by MVE intrinsics. */ | |
725 | #define __ARM_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0])) | |
726 | #ifdef __ARM_BIG_ENDIAN | |
727 | #define __ARM_LANEQ(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec)/2 - 1)) | |
728 | #else | |
729 | #define __ARM_LANEQ(__vec, __idx) __idx | |
730 | #endif | |
731 | #define __ARM_CHECK_LANEQ(__vec, __idx) \ | |
732 | __builtin_arm_lane_check (__ARM_NUM_LANES(__vec), \ | |
733 | __ARM_LANEQ(__vec, __idx)) | |
734 | ||
14782c81 SP |
735 | __extension__ extern __inline void |
736 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
737 | __arm_vst4q_s8 (int8_t * __addr, int8x16x4_t __value) | |
738 | { | |
739 | union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; | |
740 | __rv.__i = __value; | |
741 | __builtin_mve_vst4qv16qi ((__builtin_neon_qi *) __addr, __rv.__o); | |
742 | } | |
743 | ||
744 | __extension__ extern __inline void | |
745 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
746 | __arm_vst4q_s16 (int16_t * __addr, int16x8x4_t __value) | |
747 | { | |
748 | union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; | |
749 | __rv.__i = __value; | |
750 | __builtin_mve_vst4qv8hi ((__builtin_neon_hi *) __addr, __rv.__o); | |
751 | } | |
752 | ||
753 | __extension__ extern __inline void | |
754 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
755 | __arm_vst4q_s32 (int32_t * __addr, int32x4x4_t __value) | |
756 | { | |
757 | union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv; | |
758 | __rv.__i = __value; | |
759 | __builtin_mve_vst4qv4si ((__builtin_neon_si *) __addr, __rv.__o); | |
760 | } | |
761 | ||
762 | __extension__ extern __inline void | |
763 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
764 | __arm_vst4q_u8 (uint8_t * __addr, uint8x16x4_t __value) | |
765 | { | |
766 | union { uint8x16x4_t __i; __builtin_neon_xi __o; } __rv; | |
767 | __rv.__i = __value; | |
768 | __builtin_mve_vst4qv16qi ((__builtin_neon_qi *) __addr, __rv.__o); | |
769 | } | |
770 | ||
771 | __extension__ extern __inline void | |
772 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
773 | __arm_vst4q_u16 (uint16_t * __addr, uint16x8x4_t __value) | |
774 | { | |
775 | union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv; | |
776 | __rv.__i = __value; | |
777 | __builtin_mve_vst4qv8hi ((__builtin_neon_hi *) __addr, __rv.__o); | |
778 | } | |
779 | ||
780 | __extension__ extern __inline void | |
781 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
782 | __arm_vst4q_u32 (uint32_t * __addr, uint32x4x4_t __value) | |
783 | { | |
784 | union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv; | |
785 | __rv.__i = __value; | |
786 | __builtin_mve_vst4qv4si ((__builtin_neon_si *) __addr, __rv.__o); | |
787 | } | |
788 | ||
ac3bcc81 | 789 | __extension__ extern __inline mve_pred16_t |
a475f153 SP |
790 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
791 | __arm_vctp16q (uint32_t __a) | |
792 | { | |
e0bc13d3 | 793 | return __builtin_mve_vctp16qv8bi (__a); |
a475f153 SP |
794 | } |
795 | ||
796 | __extension__ extern __inline mve_pred16_t | |
797 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
798 | __arm_vctp32q (uint32_t __a) | |
799 | { | |
e0bc13d3 | 800 | return __builtin_mve_vctp32qv4bi (__a); |
a475f153 SP |
801 | } |
802 | ||
803 | __extension__ extern __inline mve_pred16_t | |
804 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
805 | __arm_vctp64q (uint32_t __a) | |
806 | { | |
e0bc13d3 | 807 | return __builtin_mve_vctp64qv2qi (__a); |
a475f153 SP |
808 | } |
809 | ||
810 | __extension__ extern __inline mve_pred16_t | |
811 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
812 | __arm_vctp8q (uint32_t __a) | |
813 | { | |
e0bc13d3 | 814 | return __builtin_mve_vctp8qv16bi (__a); |
a475f153 SP |
815 | } |
816 | ||
817 | __extension__ extern __inline mve_pred16_t | |
818 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
819 | __arm_vpnot (mve_pred16_t __a) | |
820 | { | |
e0bc13d3 | 821 | return __builtin_mve_vpnotv16bi (__a); |
a475f153 SP |
822 | } |
823 | ||
33203b4c SP |
824 | __extension__ extern __inline uint8x16_t |
825 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
826 | __arm_vornq_u8 (uint8x16_t __a, uint8x16_t __b) | |
827 | { | |
828 | return __builtin_mve_vornq_uv16qi (__a, __b); | |
829 | } | |
830 | ||
33203b4c SP |
831 | __extension__ extern __inline uint8x16_t |
832 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
833 | __arm_vbicq_u8 (uint8x16_t __a, uint8x16_t __b) | |
834 | { | |
835 | return __builtin_mve_vbicq_uv16qi (__a, __b); | |
836 | } | |
837 | ||
33203b4c SP |
838 | __extension__ extern __inline int8x16_t |
839 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
840 | __arm_vornq_s8 (int8x16_t __a, int8x16_t __b) | |
841 | { | |
842 | return __builtin_mve_vornq_sv16qi (__a, __b); | |
843 | } | |
844 | ||
33203b4c SP |
845 | __extension__ extern __inline int8x16_t |
846 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
847 | __arm_vbicq_s8 (int8x16_t __a, int8x16_t __b) | |
848 | { | |
849 | return __builtin_mve_vbicq_sv16qi (__a, __b); | |
850 | } | |
851 | ||
33203b4c SP |
852 | __extension__ extern __inline uint16x8_t |
853 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
854 | __arm_vornq_u16 (uint16x8_t __a, uint16x8_t __b) | |
855 | { | |
856 | return __builtin_mve_vornq_uv8hi (__a, __b); | |
857 | } | |
858 | ||
33203b4c SP |
859 | __extension__ extern __inline uint16x8_t |
860 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
861 | __arm_vbicq_u16 (uint16x8_t __a, uint16x8_t __b) | |
862 | { | |
863 | return __builtin_mve_vbicq_uv8hi (__a, __b); | |
864 | } | |
865 | ||
33203b4c SP |
866 | __extension__ extern __inline int16x8_t |
867 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
868 | __arm_vornq_s16 (int16x8_t __a, int16x8_t __b) | |
869 | { | |
870 | return __builtin_mve_vornq_sv8hi (__a, __b); | |
871 | } | |
872 | ||
33203b4c SP |
873 | __extension__ extern __inline int16x8_t |
874 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
875 | __arm_vbicq_s16 (int16x8_t __a, int16x8_t __b) | |
876 | { | |
877 | return __builtin_mve_vbicq_sv8hi (__a, __b); | |
878 | } | |
879 | ||
33203b4c SP |
880 | __extension__ extern __inline uint32x4_t |
881 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
882 | __arm_vornq_u32 (uint32x4_t __a, uint32x4_t __b) | |
883 | { | |
884 | return __builtin_mve_vornq_uv4si (__a, __b); | |
885 | } | |
886 | ||
33203b4c SP |
887 | __extension__ extern __inline uint32x4_t |
888 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
889 | __arm_vbicq_u32 (uint32x4_t __a, uint32x4_t __b) | |
890 | { | |
891 | return __builtin_mve_vbicq_uv4si (__a, __b); | |
892 | } | |
893 | ||
7674ae25 | 894 | __extension__ extern __inline int32x4_t |
33203b4c | 895 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 896 | __arm_vornq_s32 (int32x4_t __a, int32x4_t __b) |
33203b4c SP |
897 | { |
898 | return __builtin_mve_vornq_sv4si (__a, __b); | |
899 | } | |
900 | ||
33203b4c SP |
901 | __extension__ extern __inline int32x4_t |
902 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
903 | __arm_vbicq_s32 (int32x4_t __a, int32x4_t __b) | |
904 | { | |
905 | return __builtin_mve_vbicq_sv4si (__a, __b); | |
906 | } | |
907 | ||
f9355dee | 908 | __extension__ extern __inline uint16x8_t |
a50f6abf | 909 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
d34f510e | 910 | __arm_vbicq_n_u16 (uint16x8_t __a, const int __imm) |
a50f6abf | 911 | { |
f9355dee | 912 | return __builtin_mve_vbicq_n_uv8hi (__a, __imm); |
a50f6abf SP |
913 | } |
914 | ||
f9355dee | 915 | __extension__ extern __inline int16x8_t |
a50f6abf | 916 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
d34f510e | 917 | __arm_vbicq_n_s16 (int16x8_t __a, const int __imm) |
a50f6abf | 918 | { |
f9355dee | 919 | return __builtin_mve_vbicq_n_sv8hi (__a, __imm); |
a50f6abf SP |
920 | } |
921 | ||
f9355dee SP |
922 | __extension__ extern __inline uint32x4_t |
923 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
d34f510e | 924 | __arm_vbicq_n_u32 (uint32x4_t __a, const int __imm) |
6df4618c | 925 | { |
f9355dee | 926 | return __builtin_mve_vbicq_n_uv4si (__a, __imm); |
6df4618c SP |
927 | } |
928 | ||
f9355dee | 929 | __extension__ extern __inline int32x4_t |
4be8cf77 | 930 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
d34f510e | 931 | __arm_vbicq_n_s32 (int32x4_t __a, const int __imm) |
4be8cf77 | 932 | { |
f9355dee | 933 | return __builtin_mve_vbicq_n_sv4si (__a, __imm); |
4be8cf77 SP |
934 | } |
935 | ||
f9355dee | 936 | __extension__ extern __inline mve_pred16_t |
4be8cf77 | 937 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
f9355dee | 938 | __arm_vctp8q_m (uint32_t __a, mve_pred16_t __p) |
4be8cf77 | 939 | { |
e0bc13d3 | 940 | return __builtin_mve_vctp8q_mv16bi (__a, __p); |
4be8cf77 SP |
941 | } |
942 | ||
f9355dee | 943 | __extension__ extern __inline mve_pred16_t |
f166a8cd | 944 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
f9355dee | 945 | __arm_vctp64q_m (uint32_t __a, mve_pred16_t __p) |
f166a8cd | 946 | { |
e0bc13d3 | 947 | return __builtin_mve_vctp64q_mv2qi (__a, __p); |
f166a8cd SP |
948 | } |
949 | ||
f9355dee | 950 | __extension__ extern __inline mve_pred16_t |
f166a8cd | 951 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
f9355dee | 952 | __arm_vctp32q_m (uint32_t __a, mve_pred16_t __p) |
f166a8cd | 953 | { |
e0bc13d3 | 954 | return __builtin_mve_vctp32q_mv4bi (__a, __p); |
f166a8cd SP |
955 | } |
956 | ||
f9355dee | 957 | __extension__ extern __inline mve_pred16_t |
f166a8cd | 958 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
f9355dee | 959 | __arm_vctp16q_m (uint32_t __a, mve_pred16_t __p) |
f166a8cd | 960 | { |
e0bc13d3 | 961 | return __builtin_mve_vctp16q_mv8bi (__a, __p); |
f166a8cd SP |
962 | } |
963 | ||
0dad5b33 SP |
964 | __extension__ extern __inline int16x8_t |
965 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
966 | __arm_vbicq_m_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p) | |
967 | { | |
968 | return __builtin_mve_vbicq_m_n_sv8hi (__a, __imm, __p); | |
969 | } | |
970 | ||
971 | __extension__ extern __inline int32x4_t | |
972 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
973 | __arm_vbicq_m_n_s32 (int32x4_t __a, const int __imm, mve_pred16_t __p) | |
974 | { | |
975 | return __builtin_mve_vbicq_m_n_sv4si (__a, __imm, __p); | |
976 | } | |
977 | ||
978 | __extension__ extern __inline uint16x8_t | |
979 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
980 | __arm_vbicq_m_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p) | |
981 | { | |
982 | return __builtin_mve_vbicq_m_n_uv8hi (__a, __imm, __p); | |
983 | } | |
984 | ||
985 | __extension__ extern __inline uint32x4_t | |
986 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
987 | __arm_vbicq_m_n_u32 (uint32x4_t __a, const int __imm, mve_pred16_t __p) | |
988 | { | |
989 | return __builtin_mve_vbicq_m_n_uv4si (__a, __imm, __p); | |
990 | } | |
991 | ||
0dad5b33 SP |
992 | __extension__ extern __inline int8x16_t |
993 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
994 | __arm_vshlcq_s8 (int8x16_t __a, uint32_t * __b, const int __imm) | |
995 | { | |
996 | int8x16_t __res = __builtin_mve_vshlcq_vec_sv16qi (__a, *__b, __imm); | |
997 | *__b = __builtin_mve_vshlcq_carry_sv16qi (__a, *__b, __imm); | |
998 | return __res; | |
999 | } | |
1000 | ||
1001 | __extension__ extern __inline uint8x16_t | |
1002 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1003 | __arm_vshlcq_u8 (uint8x16_t __a, uint32_t * __b, const int __imm) | |
1004 | { | |
1005 | uint8x16_t __res = __builtin_mve_vshlcq_vec_uv16qi (__a, *__b, __imm); | |
1006 | *__b = __builtin_mve_vshlcq_carry_uv16qi (__a, *__b, __imm); | |
1007 | return __res; | |
1008 | } | |
1009 | ||
1010 | __extension__ extern __inline int16x8_t | |
1011 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1012 | __arm_vshlcq_s16 (int16x8_t __a, uint32_t * __b, const int __imm) | |
1013 | { | |
1014 | int16x8_t __res = __builtin_mve_vshlcq_vec_sv8hi (__a, *__b, __imm); | |
1015 | *__b = __builtin_mve_vshlcq_carry_sv8hi (__a, *__b, __imm); | |
1016 | return __res; | |
1017 | } | |
1018 | ||
1019 | __extension__ extern __inline uint16x8_t | |
1020 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1021 | __arm_vshlcq_u16 (uint16x8_t __a, uint32_t * __b, const int __imm) | |
1022 | { | |
1023 | uint16x8_t __res = __builtin_mve_vshlcq_vec_uv8hi (__a, *__b, __imm); | |
1024 | *__b = __builtin_mve_vshlcq_carry_uv8hi (__a, *__b, __imm); | |
1025 | return __res; | |
1026 | } | |
1027 | ||
1028 | __extension__ extern __inline int32x4_t | |
1029 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1030 | __arm_vshlcq_s32 (int32x4_t __a, uint32_t * __b, const int __imm) | |
1031 | { | |
1032 | int32x4_t __res = __builtin_mve_vshlcq_vec_sv4si (__a, *__b, __imm); | |
1033 | *__b = __builtin_mve_vshlcq_carry_sv4si (__a, *__b, __imm); | |
1034 | return __res; | |
1035 | } | |
1036 | ||
1037 | __extension__ extern __inline uint32x4_t | |
1038 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1039 | __arm_vshlcq_u32 (uint32x4_t __a, uint32_t * __b, const int __imm) | |
1040 | { | |
1041 | uint32x4_t __res = __builtin_mve_vshlcq_vec_uv4si (__a, *__b, __imm); | |
1042 | *__b = __builtin_mve_vshlcq_carry_uv4si (__a, *__b, __imm); | |
1043 | return __res; | |
1044 | } | |
1045 | ||
8eb3b6b9 SP |
1046 | __extension__ extern __inline int8x16_t |
1047 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1048 | __arm_vbicq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p) | |
1049 | { | |
1050 | return __builtin_mve_vbicq_m_sv16qi (__inactive, __a, __b, __p); | |
1051 | } | |
1052 | ||
1053 | __extension__ extern __inline int32x4_t | |
1054 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1055 | __arm_vbicq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p) | |
1056 | { | |
1057 | return __builtin_mve_vbicq_m_sv4si (__inactive, __a, __b, __p); | |
1058 | } | |
1059 | ||
1060 | __extension__ extern __inline int16x8_t | |
1061 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1062 | __arm_vbicq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p) | |
1063 | { | |
1064 | return __builtin_mve_vbicq_m_sv8hi (__inactive, __a, __b, __p); | |
1065 | } | |
1066 | ||
1067 | __extension__ extern __inline uint8x16_t | |
1068 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1069 | __arm_vbicq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) | |
1070 | { | |
1071 | return __builtin_mve_vbicq_m_uv16qi (__inactive, __a, __b, __p); | |
1072 | } | |
1073 | ||
1074 | __extension__ extern __inline uint32x4_t | |
1075 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1076 | __arm_vbicq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) | |
1077 | { | |
1078 | return __builtin_mve_vbicq_m_uv4si (__inactive, __a, __b, __p); | |
1079 | } | |
1080 | ||
1081 | __extension__ extern __inline uint16x8_t | |
1082 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1083 | __arm_vbicq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) | |
1084 | { | |
1085 | return __builtin_mve_vbicq_m_uv8hi (__inactive, __a, __b, __p); | |
1086 | } | |
1087 | ||
8eb3b6b9 SP |
1088 | __extension__ extern __inline int8x16_t |
1089 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1090 | __arm_vornq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p) | |
1091 | { | |
1092 | return __builtin_mve_vornq_m_sv16qi (__inactive, __a, __b, __p); | |
1093 | } | |
1094 | ||
1095 | __extension__ extern __inline int32x4_t | |
1096 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1097 | __arm_vornq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p) | |
1098 | { | |
1099 | return __builtin_mve_vornq_m_sv4si (__inactive, __a, __b, __p); | |
1100 | } | |
1101 | ||
1102 | __extension__ extern __inline int16x8_t | |
1103 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1104 | __arm_vornq_m_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p) | |
1105 | { | |
1106 | return __builtin_mve_vornq_m_sv8hi (__inactive, __a, __b, __p); | |
1107 | } | |
1108 | ||
1109 | __extension__ extern __inline uint8x16_t | |
1110 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1111 | __arm_vornq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) | |
1112 | { | |
1113 | return __builtin_mve_vornq_m_uv16qi (__inactive, __a, __b, __p); | |
1114 | } | |
1115 | ||
1116 | __extension__ extern __inline uint32x4_t | |
1117 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1118 | __arm_vornq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) | |
1119 | { | |
1120 | return __builtin_mve_vornq_m_uv4si (__inactive, __a, __b, __p); | |
1121 | } | |
1122 | ||
1123 | __extension__ extern __inline uint16x8_t | |
1124 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1125 | __arm_vornq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) | |
1126 | { | |
1127 | return __builtin_mve_vornq_m_uv8hi (__inactive, __a, __b, __p); | |
1128 | } | |
1129 | ||
4ff68575 SP |
1130 | __extension__ extern __inline void |
1131 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1132 | __arm_vstrbq_scatter_offset_s8 (int8_t * __base, uint8x16_t __offset, int8x16_t __value) | |
1133 | { | |
1134 | __builtin_mve_vstrbq_scatter_offset_sv16qi ((__builtin_neon_qi *) __base, __offset, __value); | |
1135 | } | |
1136 | ||
1137 | __extension__ extern __inline void | |
1138 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1139 | __arm_vstrbq_scatter_offset_s32 (int8_t * __base, uint32x4_t __offset, int32x4_t __value) | |
1140 | { | |
1141 | __builtin_mve_vstrbq_scatter_offset_sv4si ((__builtin_neon_qi *) __base, __offset, __value); | |
1142 | } | |
1143 | ||
1144 | __extension__ extern __inline void | |
1145 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1146 | __arm_vstrbq_scatter_offset_s16 (int8_t * __base, uint16x8_t __offset, int16x8_t __value) | |
1147 | { | |
1148 | __builtin_mve_vstrbq_scatter_offset_sv8hi ((__builtin_neon_qi *) __base, __offset, __value); | |
1149 | } | |
1150 | ||
1151 | __extension__ extern __inline void | |
1152 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1153 | __arm_vstrbq_scatter_offset_u8 (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value) | |
1154 | { | |
1155 | __builtin_mve_vstrbq_scatter_offset_uv16qi ((__builtin_neon_qi *) __base, __offset, __value); | |
1156 | } | |
1157 | ||
1158 | __extension__ extern __inline void | |
1159 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1160 | __arm_vstrbq_scatter_offset_u32 (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
1161 | { | |
1162 | __builtin_mve_vstrbq_scatter_offset_uv4si ((__builtin_neon_qi *) __base, __offset, __value); | |
1163 | } | |
1164 | ||
1165 | __extension__ extern __inline void | |
1166 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1167 | __arm_vstrbq_scatter_offset_u16 (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value) | |
1168 | { | |
1169 | __builtin_mve_vstrbq_scatter_offset_uv8hi ((__builtin_neon_qi *) __base, __offset, __value); | |
1170 | } | |
1171 | ||
1172 | __extension__ extern __inline void | |
1173 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1174 | __arm_vstrbq_s8 (int8_t * __addr, int8x16_t __value) | |
1175 | { | |
1176 | __builtin_mve_vstrbq_sv16qi ((__builtin_neon_qi *) __addr, __value); | |
1177 | } | |
1178 | ||
1179 | __extension__ extern __inline void | |
1180 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1181 | __arm_vstrbq_s32 (int8_t * __addr, int32x4_t __value) | |
1182 | { | |
1183 | __builtin_mve_vstrbq_sv4si ((__builtin_neon_qi *) __addr, __value); | |
1184 | } | |
1185 | ||
1186 | __extension__ extern __inline void | |
1187 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1188 | __arm_vstrbq_s16 (int8_t * __addr, int16x8_t __value) | |
1189 | { | |
1190 | __builtin_mve_vstrbq_sv8hi ((__builtin_neon_qi *) __addr, __value); | |
1191 | } | |
1192 | ||
1193 | __extension__ extern __inline void | |
1194 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1195 | __arm_vstrbq_u8 (uint8_t * __addr, uint8x16_t __value) | |
1196 | { | |
1197 | __builtin_mve_vstrbq_uv16qi ((__builtin_neon_qi *) __addr, __value); | |
1198 | } | |
1199 | ||
1200 | __extension__ extern __inline void | |
1201 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1202 | __arm_vstrbq_u32 (uint8_t * __addr, uint32x4_t __value) | |
1203 | { | |
1204 | __builtin_mve_vstrbq_uv4si ((__builtin_neon_qi *) __addr, __value); | |
1205 | } | |
1206 | ||
1207 | __extension__ extern __inline void | |
1208 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1209 | __arm_vstrbq_u16 (uint8_t * __addr, uint16x8_t __value) | |
1210 | { | |
1211 | __builtin_mve_vstrbq_uv8hi ((__builtin_neon_qi *) __addr, __value); | |
1212 | } | |
1213 | ||
1214 | __extension__ extern __inline void | |
1215 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1216 | __arm_vstrwq_scatter_base_s32 (uint32x4_t __addr, const int __offset, int32x4_t __value) | |
1217 | { | |
1218 | __builtin_mve_vstrwq_scatter_base_sv4si (__addr, __offset, __value); | |
1219 | } | |
1220 | ||
1221 | __extension__ extern __inline void | |
1222 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1223 | __arm_vstrwq_scatter_base_u32 (uint32x4_t __addr, const int __offset, uint32x4_t __value) | |
1224 | { | |
1225 | __builtin_mve_vstrwq_scatter_base_uv4si (__addr, __offset, __value); | |
1226 | } | |
535a8645 SP |
1227 | |
1228 | __extension__ extern __inline uint8x16_t | |
1229 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1230 | __arm_vldrbq_gather_offset_u8 (uint8_t const * __base, uint8x16_t __offset) | |
1231 | { | |
1232 | return __builtin_mve_vldrbq_gather_offset_uv16qi ((__builtin_neon_qi *) __base, __offset); | |
1233 | } | |
1234 | ||
1235 | __extension__ extern __inline int8x16_t | |
1236 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1237 | __arm_vldrbq_gather_offset_s8 (int8_t const * __base, uint8x16_t __offset) | |
1238 | { | |
1239 | return __builtin_mve_vldrbq_gather_offset_sv16qi ((__builtin_neon_qi *) __base, __offset); | |
1240 | } | |
1241 | ||
1242 | __extension__ extern __inline int8x16_t | |
1243 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1244 | __arm_vldrbq_s8 (int8_t const * __base) | |
1245 | { | |
1246 | return __builtin_mve_vldrbq_sv16qi ((__builtin_neon_qi *) __base); | |
1247 | } | |
1248 | ||
1249 | __extension__ extern __inline uint8x16_t | |
1250 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1251 | __arm_vldrbq_u8 (uint8_t const * __base) | |
1252 | { | |
1253 | return __builtin_mve_vldrbq_uv16qi ((__builtin_neon_qi *) __base); | |
1254 | } | |
1255 | ||
1256 | __extension__ extern __inline uint16x8_t | |
1257 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1258 | __arm_vldrbq_gather_offset_u16 (uint8_t const * __base, uint16x8_t __offset) | |
1259 | { | |
1260 | return __builtin_mve_vldrbq_gather_offset_uv8hi ((__builtin_neon_qi *) __base, __offset); | |
1261 | } | |
1262 | ||
1263 | __extension__ extern __inline int16x8_t | |
1264 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1265 | __arm_vldrbq_gather_offset_s16 (int8_t const * __base, uint16x8_t __offset) | |
1266 | { | |
1267 | return __builtin_mve_vldrbq_gather_offset_sv8hi ((__builtin_neon_qi *) __base, __offset); | |
1268 | } | |
1269 | ||
1270 | __extension__ extern __inline int16x8_t | |
1271 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1272 | __arm_vldrbq_s16 (int8_t const * __base) | |
1273 | { | |
1274 | return __builtin_mve_vldrbq_sv8hi ((__builtin_neon_qi *) __base); | |
1275 | } | |
1276 | ||
1277 | __extension__ extern __inline uint16x8_t | |
1278 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1279 | __arm_vldrbq_u16 (uint8_t const * __base) | |
1280 | { | |
1281 | return __builtin_mve_vldrbq_uv8hi ((__builtin_neon_qi *) __base); | |
1282 | } | |
1283 | ||
1284 | __extension__ extern __inline uint32x4_t | |
1285 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1286 | __arm_vldrbq_gather_offset_u32 (uint8_t const * __base, uint32x4_t __offset) | |
1287 | { | |
1288 | return __builtin_mve_vldrbq_gather_offset_uv4si ((__builtin_neon_qi *) __base, __offset); | |
1289 | } | |
1290 | ||
1291 | __extension__ extern __inline int32x4_t | |
1292 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1293 | __arm_vldrbq_gather_offset_s32 (int8_t const * __base, uint32x4_t __offset) | |
1294 | { | |
1295 | return __builtin_mve_vldrbq_gather_offset_sv4si ((__builtin_neon_qi *) __base, __offset); | |
1296 | } | |
1297 | ||
1298 | __extension__ extern __inline int32x4_t | |
1299 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1300 | __arm_vldrbq_s32 (int8_t const * __base) | |
1301 | { | |
1302 | return __builtin_mve_vldrbq_sv4si ((__builtin_neon_qi *) __base); | |
1303 | } | |
1304 | ||
1305 | __extension__ extern __inline uint32x4_t | |
1306 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1307 | __arm_vldrbq_u32 (uint8_t const * __base) | |
1308 | { | |
1309 | return __builtin_mve_vldrbq_uv4si ((__builtin_neon_qi *) __base); | |
1310 | } | |
1311 | ||
1312 | __extension__ extern __inline int32x4_t | |
1313 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1314 | __arm_vldrwq_gather_base_s32 (uint32x4_t __addr, const int __offset) | |
1315 | { | |
1316 | return __builtin_mve_vldrwq_gather_base_sv4si (__addr, __offset); | |
1317 | } | |
1318 | ||
1319 | __extension__ extern __inline uint32x4_t | |
1320 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1321 | __arm_vldrwq_gather_base_u32 (uint32x4_t __addr, const int __offset) | |
1322 | { | |
1323 | return __builtin_mve_vldrwq_gather_base_uv4si (__addr, __offset); | |
1324 | } | |
1325 | ||
405e918c SP |
1326 | __extension__ extern __inline void |
1327 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1328 | __arm_vstrbq_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p) | |
1329 | { | |
1330 | __builtin_mve_vstrbq_p_sv16qi ((__builtin_neon_qi *) __addr, __value, __p); | |
1331 | } | |
1332 | ||
1333 | __extension__ extern __inline void | |
1334 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1335 | __arm_vstrbq_p_s32 (int8_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
1336 | { | |
1337 | __builtin_mve_vstrbq_p_sv4si ((__builtin_neon_qi *) __addr, __value, __p); | |
1338 | } | |
1339 | ||
1340 | __extension__ extern __inline void | |
1341 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1342 | __arm_vstrbq_p_s16 (int8_t * __addr, int16x8_t __value, mve_pred16_t __p) | |
1343 | { | |
1344 | __builtin_mve_vstrbq_p_sv8hi ((__builtin_neon_qi *) __addr, __value, __p); | |
1345 | } | |
1346 | ||
1347 | __extension__ extern __inline void | |
1348 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1349 | __arm_vstrbq_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p) | |
1350 | { | |
1351 | __builtin_mve_vstrbq_p_uv16qi ((__builtin_neon_qi *) __addr, __value, __p); | |
1352 | } | |
1353 | ||
1354 | __extension__ extern __inline void | |
1355 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1356 | __arm_vstrbq_p_u32 (uint8_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
1357 | { | |
1358 | __builtin_mve_vstrbq_p_uv4si ((__builtin_neon_qi *) __addr, __value, __p); | |
1359 | } | |
1360 | ||
1361 | __extension__ extern __inline void | |
1362 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1363 | __arm_vstrbq_p_u16 (uint8_t * __addr, uint16x8_t __value, mve_pred16_t __p) | |
1364 | { | |
1365 | __builtin_mve_vstrbq_p_uv8hi ((__builtin_neon_qi *) __addr, __value, __p); | |
1366 | } | |
1367 | ||
1368 | __extension__ extern __inline void | |
1369 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1370 | __arm_vstrbq_scatter_offset_p_s8 (int8_t * __base, uint8x16_t __offset, int8x16_t __value, mve_pred16_t __p) | |
1371 | { | |
1372 | __builtin_mve_vstrbq_scatter_offset_p_sv16qi ((__builtin_neon_qi *) __base, __offset, __value, __p); | |
1373 | } | |
1374 | ||
1375 | __extension__ extern __inline void | |
1376 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1377 | __arm_vstrbq_scatter_offset_p_s32 (int8_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
1378 | { | |
1379 | __builtin_mve_vstrbq_scatter_offset_p_sv4si ((__builtin_neon_qi *) __base, __offset, __value, __p); | |
1380 | } | |
1381 | ||
1382 | __extension__ extern __inline void | |
1383 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1384 | __arm_vstrbq_scatter_offset_p_s16 (int8_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p) | |
1385 | { | |
1386 | __builtin_mve_vstrbq_scatter_offset_p_sv8hi ((__builtin_neon_qi *) __base, __offset, __value, __p); | |
1387 | } | |
1388 | ||
1389 | __extension__ extern __inline void | |
1390 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1391 | __arm_vstrbq_scatter_offset_p_u8 (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value, mve_pred16_t __p) | |
1392 | { | |
1393 | __builtin_mve_vstrbq_scatter_offset_p_uv16qi ((__builtin_neon_qi *) __base, __offset, __value, __p); | |
1394 | } | |
1395 | ||
1396 | __extension__ extern __inline void | |
1397 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1398 | __arm_vstrbq_scatter_offset_p_u32 (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
1399 | { | |
1400 | __builtin_mve_vstrbq_scatter_offset_p_uv4si ((__builtin_neon_qi *) __base, __offset, __value, __p); | |
1401 | } | |
1402 | ||
1403 | __extension__ extern __inline void | |
1404 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1405 | __arm_vstrbq_scatter_offset_p_u16 (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p) | |
1406 | { | |
1407 | __builtin_mve_vstrbq_scatter_offset_p_uv8hi ((__builtin_neon_qi *) __base, __offset, __value, __p); | |
1408 | } | |
1409 | ||
1410 | __extension__ extern __inline void | |
1411 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1412 | __arm_vstrwq_scatter_base_p_s32 (uint32x4_t __addr, const int __offset, int32x4_t __value, mve_pred16_t __p) | |
1413 | { | |
1414 | __builtin_mve_vstrwq_scatter_base_p_sv4si (__addr, __offset, __value, __p); | |
1415 | } | |
1416 | ||
1417 | __extension__ extern __inline void | |
1418 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1419 | __arm_vstrwq_scatter_base_p_u32 (uint32x4_t __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p) | |
1420 | { | |
1421 | __builtin_mve_vstrwq_scatter_base_p_uv4si (__addr, __offset, __value, __p); | |
1422 | } | |
429d607b SP |
1423 | |
1424 | __extension__ extern __inline int8x16_t | |
1425 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1426 | __arm_vldrbq_gather_offset_z_s8 (int8_t const * __base, uint8x16_t __offset, mve_pred16_t __p) | |
1427 | { | |
1428 | return __builtin_mve_vldrbq_gather_offset_z_sv16qi ((__builtin_neon_qi *) __base, __offset, __p); | |
1429 | } | |
1430 | ||
1431 | __extension__ extern __inline int32x4_t | |
1432 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1433 | __arm_vldrbq_gather_offset_z_s32 (int8_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1434 | { | |
1435 | return __builtin_mve_vldrbq_gather_offset_z_sv4si ((__builtin_neon_qi *) __base, __offset, __p); | |
1436 | } | |
1437 | ||
1438 | __extension__ extern __inline int16x8_t | |
1439 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1440 | __arm_vldrbq_gather_offset_z_s16 (int8_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
1441 | { | |
1442 | return __builtin_mve_vldrbq_gather_offset_z_sv8hi ((__builtin_neon_qi *) __base, __offset, __p); | |
1443 | } | |
1444 | ||
1445 | __extension__ extern __inline uint8x16_t | |
1446 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1447 | __arm_vldrbq_gather_offset_z_u8 (uint8_t const * __base, uint8x16_t __offset, mve_pred16_t __p) | |
1448 | { | |
1449 | return __builtin_mve_vldrbq_gather_offset_z_uv16qi ((__builtin_neon_qi *) __base, __offset, __p); | |
1450 | } | |
1451 | ||
1452 | __extension__ extern __inline uint32x4_t | |
1453 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1454 | __arm_vldrbq_gather_offset_z_u32 (uint8_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1455 | { | |
1456 | return __builtin_mve_vldrbq_gather_offset_z_uv4si ((__builtin_neon_qi *) __base, __offset, __p); | |
1457 | } | |
1458 | ||
1459 | __extension__ extern __inline uint16x8_t | |
1460 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1461 | __arm_vldrbq_gather_offset_z_u16 (uint8_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
1462 | { | |
1463 | return __builtin_mve_vldrbq_gather_offset_z_uv8hi ((__builtin_neon_qi *) __base, __offset, __p); | |
1464 | } | |
1465 | ||
1466 | __extension__ extern __inline int8x16_t | |
1467 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1468 | __arm_vldrbq_z_s8 (int8_t const * __base, mve_pred16_t __p) | |
1469 | { | |
1470 | return __builtin_mve_vldrbq_z_sv16qi ((__builtin_neon_qi *) __base, __p); | |
1471 | } | |
1472 | ||
1473 | __extension__ extern __inline int32x4_t | |
1474 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1475 | __arm_vldrbq_z_s32 (int8_t const * __base, mve_pred16_t __p) | |
1476 | { | |
1477 | return __builtin_mve_vldrbq_z_sv4si ((__builtin_neon_qi *) __base, __p); | |
1478 | } | |
1479 | ||
1480 | __extension__ extern __inline int16x8_t | |
1481 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1482 | __arm_vldrbq_z_s16 (int8_t const * __base, mve_pred16_t __p) | |
1483 | { | |
1484 | return __builtin_mve_vldrbq_z_sv8hi ((__builtin_neon_qi *) __base, __p); | |
1485 | } | |
1486 | ||
1487 | __extension__ extern __inline uint8x16_t | |
1488 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1489 | __arm_vldrbq_z_u8 (uint8_t const * __base, mve_pred16_t __p) | |
1490 | { | |
1491 | return __builtin_mve_vldrbq_z_uv16qi ((__builtin_neon_qi *) __base, __p); | |
1492 | } | |
1493 | ||
1494 | __extension__ extern __inline uint32x4_t | |
1495 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1496 | __arm_vldrbq_z_u32 (uint8_t const * __base, mve_pred16_t __p) | |
1497 | { | |
1498 | return __builtin_mve_vldrbq_z_uv4si ((__builtin_neon_qi *) __base, __p); | |
1499 | } | |
1500 | ||
1501 | __extension__ extern __inline uint16x8_t | |
1502 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1503 | __arm_vldrbq_z_u16 (uint8_t const * __base, mve_pred16_t __p) | |
1504 | { | |
1505 | return __builtin_mve_vldrbq_z_uv8hi ((__builtin_neon_qi *) __base, __p); | |
1506 | } | |
1507 | ||
1508 | __extension__ extern __inline int32x4_t | |
1509 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1510 | __arm_vldrwq_gather_base_z_s32 (uint32x4_t __addr, const int __offset, mve_pred16_t __p) | |
1511 | { | |
1512 | return __builtin_mve_vldrwq_gather_base_z_sv4si (__addr, __offset, __p); | |
1513 | } | |
1514 | ||
1515 | __extension__ extern __inline uint32x4_t | |
1516 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1517 | __arm_vldrwq_gather_base_z_u32 (uint32x4_t __addr, const int __offset, mve_pred16_t __p) | |
1518 | { | |
1519 | return __builtin_mve_vldrwq_gather_base_z_uv4si (__addr, __offset, __p); | |
1520 | } | |
1521 | ||
bf1e3d5a SP |
1522 | __extension__ extern __inline int32x4_t |
1523 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1524 | __arm_vldrhq_gather_offset_s32 (int16_t const * __base, uint32x4_t __offset) | |
1525 | { | |
1526 | return __builtin_mve_vldrhq_gather_offset_sv4si ((__builtin_neon_hi *) __base, __offset); | |
1527 | } | |
1528 | ||
1529 | __extension__ extern __inline int16x8_t | |
1530 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1531 | __arm_vldrhq_gather_offset_s16 (int16_t const * __base, uint16x8_t __offset) | |
1532 | { | |
1533 | return __builtin_mve_vldrhq_gather_offset_sv8hi ((__builtin_neon_hi *) __base, __offset); | |
1534 | } | |
1535 | ||
1536 | __extension__ extern __inline uint32x4_t | |
1537 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1538 | __arm_vldrhq_gather_offset_u32 (uint16_t const * __base, uint32x4_t __offset) | |
1539 | { | |
1540 | return __builtin_mve_vldrhq_gather_offset_uv4si ((__builtin_neon_hi *) __base, __offset); | |
1541 | } | |
1542 | ||
1543 | __extension__ extern __inline uint16x8_t | |
1544 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1545 | __arm_vldrhq_gather_offset_u16 (uint16_t const * __base, uint16x8_t __offset) | |
1546 | { | |
1547 | return __builtin_mve_vldrhq_gather_offset_uv8hi ((__builtin_neon_hi *) __base, __offset); | |
1548 | } | |
1549 | ||
1550 | __extension__ extern __inline int32x4_t | |
1551 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1552 | __arm_vldrhq_gather_offset_z_s32 (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1553 | { | |
1554 | return __builtin_mve_vldrhq_gather_offset_z_sv4si ((__builtin_neon_hi *) __base, __offset, __p); | |
1555 | } | |
1556 | ||
1557 | __extension__ extern __inline int16x8_t | |
1558 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1559 | __arm_vldrhq_gather_offset_z_s16 (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
1560 | { | |
1561 | return __builtin_mve_vldrhq_gather_offset_z_sv8hi ((__builtin_neon_hi *) __base, __offset, __p); | |
1562 | } | |
1563 | ||
1564 | __extension__ extern __inline uint32x4_t | |
1565 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1566 | __arm_vldrhq_gather_offset_z_u32 (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1567 | { | |
1568 | return __builtin_mve_vldrhq_gather_offset_z_uv4si ((__builtin_neon_hi *) __base, __offset, __p); | |
1569 | } | |
1570 | ||
1571 | __extension__ extern __inline uint16x8_t | |
1572 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1573 | __arm_vldrhq_gather_offset_z_u16 (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
1574 | { | |
1575 | return __builtin_mve_vldrhq_gather_offset_z_uv8hi ((__builtin_neon_hi *) __base, __offset, __p); | |
1576 | } | |
1577 | ||
1578 | __extension__ extern __inline int32x4_t | |
1579 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1580 | __arm_vldrhq_gather_shifted_offset_s32 (int16_t const * __base, uint32x4_t __offset) | |
1581 | { | |
1582 | return __builtin_mve_vldrhq_gather_shifted_offset_sv4si ((__builtin_neon_hi *) __base, __offset); | |
1583 | } | |
1584 | ||
1585 | __extension__ extern __inline int16x8_t | |
1586 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1587 | __arm_vldrhq_gather_shifted_offset_s16 (int16_t const * __base, uint16x8_t __offset) | |
1588 | { | |
1589 | return __builtin_mve_vldrhq_gather_shifted_offset_sv8hi ((__builtin_neon_hi *) __base, __offset); | |
1590 | } | |
1591 | ||
1592 | __extension__ extern __inline uint32x4_t | |
1593 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1594 | __arm_vldrhq_gather_shifted_offset_u32 (uint16_t const * __base, uint32x4_t __offset) | |
1595 | { | |
1596 | return __builtin_mve_vldrhq_gather_shifted_offset_uv4si ((__builtin_neon_hi *) __base, __offset); | |
1597 | } | |
1598 | ||
1599 | __extension__ extern __inline uint16x8_t | |
1600 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1601 | __arm_vldrhq_gather_shifted_offset_u16 (uint16_t const * __base, uint16x8_t __offset) | |
1602 | { | |
1603 | return __builtin_mve_vldrhq_gather_shifted_offset_uv8hi ((__builtin_neon_hi *) __base, __offset); | |
1604 | } | |
1605 | ||
1606 | __extension__ extern __inline int32x4_t | |
1607 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1608 | __arm_vldrhq_gather_shifted_offset_z_s32 (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1609 | { | |
1610 | return __builtin_mve_vldrhq_gather_shifted_offset_z_sv4si ((__builtin_neon_hi *) __base, __offset, __p); | |
1611 | } | |
1612 | ||
1613 | __extension__ extern __inline int16x8_t | |
1614 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1615 | __arm_vldrhq_gather_shifted_offset_z_s16 (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
1616 | { | |
1617 | return __builtin_mve_vldrhq_gather_shifted_offset_z_sv8hi ((__builtin_neon_hi *) __base, __offset, __p); | |
1618 | } | |
1619 | ||
1620 | __extension__ extern __inline uint32x4_t | |
1621 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1622 | __arm_vldrhq_gather_shifted_offset_z_u32 (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1623 | { | |
1624 | return __builtin_mve_vldrhq_gather_shifted_offset_z_uv4si ((__builtin_neon_hi *) __base, __offset, __p); | |
1625 | } | |
1626 | ||
1627 | __extension__ extern __inline uint16x8_t | |
1628 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1629 | __arm_vldrhq_gather_shifted_offset_z_u16 (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
1630 | { | |
1631 | return __builtin_mve_vldrhq_gather_shifted_offset_z_uv8hi ((__builtin_neon_hi *) __base, __offset, __p); | |
1632 | } | |
1633 | ||
1634 | __extension__ extern __inline int32x4_t | |
1635 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1636 | __arm_vldrhq_s32 (int16_t const * __base) | |
1637 | { | |
1638 | return __builtin_mve_vldrhq_sv4si ((__builtin_neon_hi *) __base); | |
1639 | } | |
1640 | ||
1641 | __extension__ extern __inline int16x8_t | |
1642 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1643 | __arm_vldrhq_s16 (int16_t const * __base) | |
1644 | { | |
1645 | return __builtin_mve_vldrhq_sv8hi ((__builtin_neon_hi *) __base); | |
1646 | } | |
1647 | ||
1648 | __extension__ extern __inline uint32x4_t | |
1649 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1650 | __arm_vldrhq_u32 (uint16_t const * __base) | |
1651 | { | |
1652 | return __builtin_mve_vldrhq_uv4si ((__builtin_neon_hi *) __base); | |
1653 | } | |
1654 | ||
1655 | __extension__ extern __inline uint16x8_t | |
1656 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1657 | __arm_vldrhq_u16 (uint16_t const * __base) | |
1658 | { | |
1659 | return __builtin_mve_vldrhq_uv8hi ((__builtin_neon_hi *) __base); | |
1660 | } | |
1661 | ||
1662 | __extension__ extern __inline int32x4_t | |
1663 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1664 | __arm_vldrhq_z_s32 (int16_t const * __base, mve_pred16_t __p) | |
1665 | { | |
1666 | return __builtin_mve_vldrhq_z_sv4si ((__builtin_neon_hi *) __base, __p); | |
1667 | } | |
1668 | ||
1669 | __extension__ extern __inline int16x8_t | |
1670 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1671 | __arm_vldrhq_z_s16 (int16_t const * __base, mve_pred16_t __p) | |
1672 | { | |
1673 | return __builtin_mve_vldrhq_z_sv8hi ((__builtin_neon_hi *) __base, __p); | |
1674 | } | |
1675 | ||
1676 | __extension__ extern __inline uint32x4_t | |
1677 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1678 | __arm_vldrhq_z_u32 (uint16_t const * __base, mve_pred16_t __p) | |
1679 | { | |
1680 | return __builtin_mve_vldrhq_z_uv4si ((__builtin_neon_hi *) __base, __p); | |
1681 | } | |
1682 | ||
1683 | __extension__ extern __inline uint16x8_t | |
1684 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1685 | __arm_vldrhq_z_u16 (uint16_t const * __base, mve_pred16_t __p) | |
1686 | { | |
1687 | return __builtin_mve_vldrhq_z_uv8hi ((__builtin_neon_hi *) __base, __p); | |
1688 | } | |
1689 | ||
1690 | __extension__ extern __inline int32x4_t | |
1691 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1692 | __arm_vldrwq_s32 (int32_t const * __base) | |
1693 | { | |
1694 | return __builtin_mve_vldrwq_sv4si ((__builtin_neon_si *) __base); | |
1695 | } | |
1696 | ||
1697 | __extension__ extern __inline uint32x4_t | |
1698 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1699 | __arm_vldrwq_u32 (uint32_t const * __base) | |
1700 | { | |
1701 | return __builtin_mve_vldrwq_uv4si ((__builtin_neon_si *) __base); | |
1702 | } | |
1703 | ||
1704 | ||
1705 | __extension__ extern __inline int32x4_t | |
1706 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1707 | __arm_vldrwq_z_s32 (int32_t const * __base, mve_pred16_t __p) | |
1708 | { | |
1709 | return __builtin_mve_vldrwq_z_sv4si ((__builtin_neon_si *) __base, __p); | |
1710 | } | |
1711 | ||
1712 | __extension__ extern __inline uint32x4_t | |
1713 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1714 | __arm_vldrwq_z_u32 (uint32_t const * __base, mve_pred16_t __p) | |
1715 | { | |
1716 | return __builtin_mve_vldrwq_z_uv4si ((__builtin_neon_si *) __base, __p); | |
1717 | } | |
1718 | ||
4cc23303 SP |
1719 | __extension__ extern __inline int64x2_t |
1720 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1721 | __arm_vldrdq_gather_base_s64 (uint64x2_t __addr, const int __offset) | |
1722 | { | |
1723 | return __builtin_mve_vldrdq_gather_base_sv2di (__addr, __offset); | |
1724 | } | |
1725 | ||
1726 | __extension__ extern __inline uint64x2_t | |
1727 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1728 | __arm_vldrdq_gather_base_u64 (uint64x2_t __addr, const int __offset) | |
1729 | { | |
1730 | return __builtin_mve_vldrdq_gather_base_uv2di (__addr, __offset); | |
1731 | } | |
1732 | ||
1733 | __extension__ extern __inline int64x2_t | |
1734 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1735 | __arm_vldrdq_gather_base_z_s64 (uint64x2_t __addr, const int __offset, mve_pred16_t __p) | |
1736 | { | |
1737 | return __builtin_mve_vldrdq_gather_base_z_sv2di (__addr, __offset, __p); | |
1738 | } | |
1739 | ||
1740 | __extension__ extern __inline uint64x2_t | |
1741 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1742 | __arm_vldrdq_gather_base_z_u64 (uint64x2_t __addr, const int __offset, mve_pred16_t __p) | |
1743 | { | |
1744 | return __builtin_mve_vldrdq_gather_base_z_uv2di (__addr, __offset, __p); | |
1745 | } | |
1746 | ||
1747 | __extension__ extern __inline int64x2_t | |
1748 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1749 | __arm_vldrdq_gather_offset_s64 (int64_t const * __base, uint64x2_t __offset) | |
1750 | { | |
1751 | return __builtin_mve_vldrdq_gather_offset_sv2di ((__builtin_neon_di *) __base, __offset); | |
1752 | } | |
1753 | ||
1754 | __extension__ extern __inline uint64x2_t | |
1755 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1756 | __arm_vldrdq_gather_offset_u64 (uint64_t const * __base, uint64x2_t __offset) | |
1757 | { | |
1758 | return __builtin_mve_vldrdq_gather_offset_uv2di ((__builtin_neon_di *) __base, __offset); | |
1759 | } | |
1760 | ||
1761 | __extension__ extern __inline int64x2_t | |
1762 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1763 | __arm_vldrdq_gather_offset_z_s64 (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
1764 | { | |
1765 | return __builtin_mve_vldrdq_gather_offset_z_sv2di ((__builtin_neon_di *) __base, __offset, __p); | |
1766 | } | |
1767 | ||
1768 | ||
1769 | __extension__ extern __inline uint64x2_t | |
1770 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1771 | __arm_vldrdq_gather_offset_z_u64 (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
1772 | { | |
1773 | return __builtin_mve_vldrdq_gather_offset_z_uv2di ((__builtin_neon_di *) __base, __offset, __p); | |
1774 | } | |
1775 | ||
1776 | __extension__ extern __inline int64x2_t | |
1777 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1778 | __arm_vldrdq_gather_shifted_offset_s64 (int64_t const * __base, uint64x2_t __offset) | |
1779 | { | |
1780 | return __builtin_mve_vldrdq_gather_shifted_offset_sv2di ((__builtin_neon_di *) __base, __offset); | |
1781 | } | |
1782 | ||
1783 | __extension__ extern __inline uint64x2_t | |
1784 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1785 | __arm_vldrdq_gather_shifted_offset_u64 (uint64_t const * __base, uint64x2_t __offset) | |
1786 | { | |
1787 | return __builtin_mve_vldrdq_gather_shifted_offset_uv2di ((__builtin_neon_di *) __base, __offset); | |
1788 | } | |
1789 | ||
1790 | __extension__ extern __inline int64x2_t | |
1791 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1792 | __arm_vldrdq_gather_shifted_offset_z_s64 (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
1793 | { | |
1794 | return __builtin_mve_vldrdq_gather_shifted_offset_z_sv2di ((__builtin_neon_di *) __base, __offset, __p); | |
1795 | } | |
1796 | ||
1797 | __extension__ extern __inline uint64x2_t | |
1798 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1799 | __arm_vldrdq_gather_shifted_offset_z_u64 (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
1800 | { | |
1801 | return __builtin_mve_vldrdq_gather_shifted_offset_z_uv2di ((__builtin_neon_di *) __base, __offset, __p); | |
1802 | } | |
1803 | ||
1804 | __extension__ extern __inline int32x4_t | |
1805 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1806 | __arm_vldrwq_gather_offset_s32 (int32_t const * __base, uint32x4_t __offset) | |
1807 | { | |
1808 | return __builtin_mve_vldrwq_gather_offset_sv4si ((__builtin_neon_si *) __base, __offset); | |
1809 | } | |
1810 | ||
1811 | __extension__ extern __inline uint32x4_t | |
1812 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1813 | __arm_vldrwq_gather_offset_u32 (uint32_t const * __base, uint32x4_t __offset) | |
1814 | { | |
1815 | return __builtin_mve_vldrwq_gather_offset_uv4si ((__builtin_neon_si *) __base, __offset); | |
1816 | } | |
1817 | ||
1818 | __extension__ extern __inline int32x4_t | |
1819 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1820 | __arm_vldrwq_gather_offset_z_s32 (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1821 | { | |
1822 | return __builtin_mve_vldrwq_gather_offset_z_sv4si ((__builtin_neon_si *) __base, __offset, __p); | |
1823 | } | |
1824 | ||
1825 | __extension__ extern __inline uint32x4_t | |
1826 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1827 | __arm_vldrwq_gather_offset_z_u32 (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1828 | { | |
1829 | return __builtin_mve_vldrwq_gather_offset_z_uv4si ((__builtin_neon_si *) __base, __offset, __p); | |
1830 | } | |
1831 | ||
1832 | __extension__ extern __inline int32x4_t | |
1833 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1834 | __arm_vldrwq_gather_shifted_offset_s32 (int32_t const * __base, uint32x4_t __offset) | |
1835 | { | |
1836 | return __builtin_mve_vldrwq_gather_shifted_offset_sv4si ((__builtin_neon_si *) __base, __offset); | |
1837 | } | |
1838 | ||
1839 | __extension__ extern __inline uint32x4_t | |
1840 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1841 | __arm_vldrwq_gather_shifted_offset_u32 (uint32_t const * __base, uint32x4_t __offset) | |
1842 | { | |
1843 | return __builtin_mve_vldrwq_gather_shifted_offset_uv4si ((__builtin_neon_si *) __base, __offset); | |
1844 | } | |
1845 | ||
1846 | __extension__ extern __inline int32x4_t | |
1847 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1848 | __arm_vldrwq_gather_shifted_offset_z_s32 (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1849 | { | |
1850 | return __builtin_mve_vldrwq_gather_shifted_offset_z_sv4si ((__builtin_neon_si *) __base, __offset, __p); | |
1851 | } | |
1852 | ||
1853 | __extension__ extern __inline uint32x4_t | |
1854 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1855 | __arm_vldrwq_gather_shifted_offset_z_u32 (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
1856 | { | |
1857 | return __builtin_mve_vldrwq_gather_shifted_offset_z_uv4si ((__builtin_neon_si *) __base, __offset, __p); | |
1858 | } | |
1859 | ||
5cad47e0 SP |
1860 | __extension__ extern __inline void |
1861 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1862 | __arm_vstrhq_scatter_offset_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value) | |
1863 | { | |
1864 | __builtin_mve_vstrhq_scatter_offset_sv4si ((__builtin_neon_hi *) __base, __offset, __value); | |
1865 | } | |
1866 | ||
1867 | __extension__ extern __inline void | |
1868 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1869 | __arm_vstrhq_scatter_offset_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value) | |
1870 | { | |
1871 | __builtin_mve_vstrhq_scatter_offset_sv8hi ((__builtin_neon_hi *) __base, __offset, __value); | |
1872 | } | |
1873 | ||
1874 | __extension__ extern __inline void | |
1875 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1876 | __arm_vstrhq_scatter_offset_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
1877 | { | |
1878 | __builtin_mve_vstrhq_scatter_offset_uv4si ((__builtin_neon_hi *) __base, __offset, __value); | |
1879 | } | |
1880 | ||
1881 | __extension__ extern __inline void | |
1882 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1883 | __arm_vstrhq_scatter_offset_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value) | |
1884 | { | |
1885 | __builtin_mve_vstrhq_scatter_offset_uv8hi ((__builtin_neon_hi *) __base, __offset, __value); | |
1886 | } | |
1887 | ||
1888 | __extension__ extern __inline void | |
1889 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1890 | __arm_vstrhq_scatter_offset_p_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
1891 | { | |
1892 | __builtin_mve_vstrhq_scatter_offset_p_sv4si ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1893 | } | |
1894 | ||
1895 | __extension__ extern __inline void | |
1896 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1897 | __arm_vstrhq_scatter_offset_p_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p) | |
1898 | { | |
1899 | __builtin_mve_vstrhq_scatter_offset_p_sv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1900 | } | |
1901 | ||
1902 | __extension__ extern __inline void | |
1903 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1904 | __arm_vstrhq_scatter_offset_p_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
1905 | { | |
1906 | __builtin_mve_vstrhq_scatter_offset_p_uv4si ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1907 | } | |
1908 | ||
1909 | __extension__ extern __inline void | |
1910 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1911 | __arm_vstrhq_scatter_offset_p_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p) | |
1912 | { | |
1913 | __builtin_mve_vstrhq_scatter_offset_p_uv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1914 | } | |
1915 | ||
1916 | __extension__ extern __inline void | |
1917 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1918 | __arm_vstrhq_scatter_shifted_offset_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value) | |
1919 | { | |
1920 | __builtin_mve_vstrhq_scatter_shifted_offset_sv4si ((__builtin_neon_hi *) __base, __offset, __value); | |
1921 | } | |
1922 | ||
1923 | __extension__ extern __inline void | |
1924 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1925 | __arm_vstrhq_scatter_shifted_offset_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value) | |
1926 | { | |
1927 | __builtin_mve_vstrhq_scatter_shifted_offset_sv8hi ((__builtin_neon_hi *) __base, __offset, __value); | |
1928 | } | |
1929 | ||
1930 | __extension__ extern __inline void | |
1931 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1932 | __arm_vstrhq_scatter_shifted_offset_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
1933 | { | |
1934 | __builtin_mve_vstrhq_scatter_shifted_offset_uv4si ((__builtin_neon_hi *) __base, __offset, __value); | |
1935 | } | |
1936 | ||
1937 | __extension__ extern __inline void | |
1938 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1939 | __arm_vstrhq_scatter_shifted_offset_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value) | |
1940 | { | |
1941 | __builtin_mve_vstrhq_scatter_shifted_offset_uv8hi ((__builtin_neon_hi *) __base, __offset, __value); | |
1942 | } | |
1943 | ||
1944 | __extension__ extern __inline void | |
1945 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1946 | __arm_vstrhq_scatter_shifted_offset_p_s32 (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
1947 | { | |
1948 | __builtin_mve_vstrhq_scatter_shifted_offset_p_sv4si ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1949 | } | |
1950 | ||
1951 | __extension__ extern __inline void | |
1952 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1953 | __arm_vstrhq_scatter_shifted_offset_p_s16 (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p) | |
1954 | { | |
1955 | __builtin_mve_vstrhq_scatter_shifted_offset_p_sv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1956 | } | |
1957 | ||
1958 | __extension__ extern __inline void | |
1959 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1960 | __arm_vstrhq_scatter_shifted_offset_p_u32 (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
1961 | { | |
1962 | __builtin_mve_vstrhq_scatter_shifted_offset_p_uv4si ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1963 | } | |
1964 | ||
1965 | __extension__ extern __inline void | |
1966 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1967 | __arm_vstrhq_scatter_shifted_offset_p_u16 (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p) | |
1968 | { | |
1969 | __builtin_mve_vstrhq_scatter_shifted_offset_p_uv8hi ((__builtin_neon_hi *) __base, __offset, __value, __p); | |
1970 | } | |
1971 | ||
1972 | __extension__ extern __inline void | |
1973 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1974 | __arm_vstrhq_s32 (int16_t * __addr, int32x4_t __value) | |
1975 | { | |
1976 | __builtin_mve_vstrhq_sv4si ((__builtin_neon_hi *) __addr, __value); | |
1977 | } | |
1978 | ||
1979 | __extension__ extern __inline void | |
1980 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1981 | __arm_vstrhq_s16 (int16_t * __addr, int16x8_t __value) | |
1982 | { | |
1983 | __builtin_mve_vstrhq_sv8hi ((__builtin_neon_hi *) __addr, __value); | |
1984 | } | |
1985 | ||
1986 | __extension__ extern __inline void | |
1987 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1988 | __arm_vstrhq_u32 (uint16_t * __addr, uint32x4_t __value) | |
1989 | { | |
1990 | __builtin_mve_vstrhq_uv4si ((__builtin_neon_hi *) __addr, __value); | |
1991 | } | |
1992 | ||
1993 | __extension__ extern __inline void | |
1994 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
1995 | __arm_vstrhq_u16 (uint16_t * __addr, uint16x8_t __value) | |
1996 | { | |
1997 | __builtin_mve_vstrhq_uv8hi ((__builtin_neon_hi *) __addr, __value); | |
1998 | } | |
1999 | ||
2000 | __extension__ extern __inline void | |
2001 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2002 | __arm_vstrhq_p_s32 (int16_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
2003 | { | |
2004 | __builtin_mve_vstrhq_p_sv4si ((__builtin_neon_hi *) __addr, __value, __p); | |
2005 | } | |
2006 | ||
2007 | __extension__ extern __inline void | |
2008 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2009 | __arm_vstrhq_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p) | |
2010 | { | |
2011 | __builtin_mve_vstrhq_p_sv8hi ((__builtin_neon_hi *) __addr, __value, __p); | |
2012 | } | |
2013 | ||
2014 | __extension__ extern __inline void | |
2015 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2016 | __arm_vstrhq_p_u32 (uint16_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
2017 | { | |
2018 | __builtin_mve_vstrhq_p_uv4si ((__builtin_neon_hi *) __addr, __value, __p); | |
2019 | } | |
2020 | ||
2021 | __extension__ extern __inline void | |
2022 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2023 | __arm_vstrhq_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p) | |
2024 | { | |
2025 | __builtin_mve_vstrhq_p_uv8hi ((__builtin_neon_hi *) __addr, __value, __p); | |
2026 | } | |
2027 | ||
2028 | __extension__ extern __inline void | |
2029 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2030 | __arm_vstrwq_s32 (int32_t * __addr, int32x4_t __value) | |
2031 | { | |
2032 | __builtin_mve_vstrwq_sv4si ((__builtin_neon_si *) __addr, __value); | |
2033 | } | |
2034 | ||
2035 | __extension__ extern __inline void | |
2036 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2037 | __arm_vstrwq_u32 (uint32_t * __addr, uint32x4_t __value) | |
2038 | { | |
2039 | __builtin_mve_vstrwq_uv4si ((__builtin_neon_si *) __addr, __value); | |
2040 | } | |
2041 | ||
2042 | __extension__ extern __inline void | |
2043 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2044 | __arm_vstrwq_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
2045 | { | |
2046 | __builtin_mve_vstrwq_p_sv4si ((__builtin_neon_si *) __addr, __value, __p); | |
2047 | } | |
2048 | ||
2049 | __extension__ extern __inline void | |
2050 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2051 | __arm_vstrwq_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
2052 | { | |
2053 | __builtin_mve_vstrwq_p_uv4si ((__builtin_neon_si *) __addr, __value, __p); | |
2054 | } | |
2055 | ||
7a5fffa5 SP |
2056 | __extension__ extern __inline void |
2057 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2058 | __arm_vstrdq_scatter_base_p_s64 (uint64x2_t __addr, const int __offset, int64x2_t __value, mve_pred16_t __p) | |
2059 | { | |
2060 | __builtin_mve_vstrdq_scatter_base_p_sv2di (__addr, __offset, __value, __p); | |
2061 | } | |
2062 | ||
2063 | __extension__ extern __inline void | |
2064 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2065 | __arm_vstrdq_scatter_base_p_u64 (uint64x2_t __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p) | |
2066 | { | |
2067 | __builtin_mve_vstrdq_scatter_base_p_uv2di (__addr, __offset, __value, __p); | |
2068 | } | |
2069 | ||
2070 | __extension__ extern __inline void | |
2071 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2072 | __arm_vstrdq_scatter_base_s64 (uint64x2_t __addr, const int __offset, int64x2_t __value) | |
2073 | { | |
2074 | __builtin_mve_vstrdq_scatter_base_sv2di (__addr, __offset, __value); | |
2075 | } | |
2076 | ||
2077 | __extension__ extern __inline void | |
2078 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2079 | __arm_vstrdq_scatter_base_u64 (uint64x2_t __addr, const int __offset, uint64x2_t __value) | |
2080 | { | |
2081 | __builtin_mve_vstrdq_scatter_base_uv2di (__addr, __offset, __value); | |
2082 | } | |
2083 | ||
2084 | __extension__ extern __inline void | |
2085 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2086 | __arm_vstrdq_scatter_offset_p_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p) | |
2087 | { | |
ff0597dc | 2088 | __builtin_mve_vstrdq_scatter_offset_p_sv2di ((__builtin_neon_di *) __base, __offset, __value, __p); |
7a5fffa5 SP |
2089 | } |
2090 | ||
2091 | __extension__ extern __inline void | |
2092 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2093 | __arm_vstrdq_scatter_offset_p_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p) | |
2094 | { | |
ff0597dc | 2095 | __builtin_mve_vstrdq_scatter_offset_p_uv2di ((__builtin_neon_di *) __base, __offset, __value, __p); |
7a5fffa5 SP |
2096 | } |
2097 | ||
2098 | __extension__ extern __inline void | |
2099 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2100 | __arm_vstrdq_scatter_offset_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value) | |
2101 | { | |
ff0597dc | 2102 | __builtin_mve_vstrdq_scatter_offset_sv2di ((__builtin_neon_di *) __base, __offset, __value); |
7a5fffa5 SP |
2103 | } |
2104 | ||
2105 | __extension__ extern __inline void | |
2106 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2107 | __arm_vstrdq_scatter_offset_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value) | |
2108 | { | |
ff0597dc | 2109 | __builtin_mve_vstrdq_scatter_offset_uv2di ((__builtin_neon_di *) __base, __offset, __value); |
7a5fffa5 SP |
2110 | } |
2111 | ||
2112 | __extension__ extern __inline void | |
2113 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2114 | __arm_vstrdq_scatter_shifted_offset_p_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p) | |
2115 | { | |
ff0597dc | 2116 | __builtin_mve_vstrdq_scatter_shifted_offset_p_sv2di ((__builtin_neon_di *) __base, __offset, __value, __p); |
7a5fffa5 SP |
2117 | } |
2118 | ||
2119 | __extension__ extern __inline void | |
2120 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2121 | __arm_vstrdq_scatter_shifted_offset_p_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p) | |
2122 | { | |
ff0597dc | 2123 | __builtin_mve_vstrdq_scatter_shifted_offset_p_uv2di ((__builtin_neon_di *) __base, __offset, __value, __p); |
7a5fffa5 SP |
2124 | } |
2125 | ||
2126 | __extension__ extern __inline void | |
2127 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2128 | __arm_vstrdq_scatter_shifted_offset_s64 (int64_t * __base, uint64x2_t __offset, int64x2_t __value) | |
2129 | { | |
ff0597dc | 2130 | __builtin_mve_vstrdq_scatter_shifted_offset_sv2di ((__builtin_neon_di *) __base, __offset, __value); |
7a5fffa5 SP |
2131 | } |
2132 | ||
2133 | __extension__ extern __inline void | |
2134 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2135 | __arm_vstrdq_scatter_shifted_offset_u64 (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value) | |
2136 | { | |
ff0597dc | 2137 | __builtin_mve_vstrdq_scatter_shifted_offset_uv2di ((__builtin_neon_di *) __base, __offset, __value); |
7a5fffa5 SP |
2138 | } |
2139 | ||
2140 | __extension__ extern __inline void | |
2141 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2142 | __arm_vstrwq_scatter_offset_p_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
2143 | { | |
2144 | __builtin_mve_vstrwq_scatter_offset_p_sv4si ((__builtin_neon_si *) __base, __offset, __value, __p); | |
2145 | } | |
2146 | ||
2147 | __extension__ extern __inline void | |
2148 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2149 | __arm_vstrwq_scatter_offset_p_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
2150 | { | |
2151 | __builtin_mve_vstrwq_scatter_offset_p_uv4si ((__builtin_neon_si *) __base, __offset, __value, __p); | |
2152 | } | |
2153 | ||
2154 | __extension__ extern __inline void | |
2155 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2156 | __arm_vstrwq_scatter_offset_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value) | |
2157 | { | |
2158 | __builtin_mve_vstrwq_scatter_offset_sv4si ((__builtin_neon_si *) __base, __offset, __value); | |
2159 | } | |
2160 | ||
2161 | __extension__ extern __inline void | |
2162 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2163 | __arm_vstrwq_scatter_offset_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
2164 | { | |
2165 | __builtin_mve_vstrwq_scatter_offset_uv4si ((__builtin_neon_si *) __base, __offset, __value); | |
2166 | } | |
2167 | ||
2168 | __extension__ extern __inline void | |
2169 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2170 | __arm_vstrwq_scatter_shifted_offset_p_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
2171 | { | |
2172 | __builtin_mve_vstrwq_scatter_shifted_offset_p_sv4si ((__builtin_neon_si *) __base, __offset, __value, __p); | |
2173 | } | |
2174 | ||
2175 | __extension__ extern __inline void | |
2176 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2177 | __arm_vstrwq_scatter_shifted_offset_p_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
2178 | { | |
2179 | __builtin_mve_vstrwq_scatter_shifted_offset_p_uv4si ((__builtin_neon_si *) __base, __offset, __value, __p); | |
2180 | } | |
2181 | ||
2182 | __extension__ extern __inline void | |
2183 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2184 | __arm_vstrwq_scatter_shifted_offset_s32 (int32_t * __base, uint32x4_t __offset, int32x4_t __value) | |
2185 | { | |
2186 | __builtin_mve_vstrwq_scatter_shifted_offset_sv4si ((__builtin_neon_si *) __base, __offset, __value); | |
2187 | } | |
2188 | ||
2189 | __extension__ extern __inline void | |
2190 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2191 | __arm_vstrwq_scatter_shifted_offset_u32 (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
2192 | { | |
2193 | __builtin_mve_vstrwq_scatter_shifted_offset_uv4si ((__builtin_neon_si *) __base, __offset, __value); | |
2194 | } | |
2195 | ||
92f80065 SP |
2196 | __extension__ extern __inline uint8x16_t |
2197 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2198 | __arm_vddupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
2199 | { | |
2200 | return __builtin_mve_vddupq_m_n_uv16qi (__inactive, __a, __imm, __p); | |
2201 | } | |
2202 | ||
2203 | __extension__ extern __inline uint32x4_t | |
2204 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2205 | __arm_vddupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
2206 | { | |
2207 | return __builtin_mve_vddupq_m_n_uv4si (__inactive, __a, __imm, __p); | |
2208 | } | |
2209 | ||
2210 | __extension__ extern __inline uint16x8_t | |
2211 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2212 | __arm_vddupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
2213 | { | |
2214 | return __builtin_mve_vddupq_m_n_uv8hi (__inactive, __a, __imm, __p); | |
2215 | } | |
2216 | ||
2217 | __extension__ extern __inline uint8x16_t | |
2218 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2219 | __arm_vddupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
2220 | { | |
2221 | uint8x16_t __res = __builtin_mve_vddupq_m_n_uv16qi (__inactive, * __a, __imm, __p); | |
2222 | *__a -= __imm * 16u; | |
2223 | return __res; | |
2224 | } | |
2225 | ||
2226 | __extension__ extern __inline uint16x8_t | |
2227 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2228 | __arm_vddupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
2229 | { | |
2230 | uint16x8_t __res = __builtin_mve_vddupq_m_n_uv8hi (__inactive, *__a, __imm, __p); | |
2231 | *__a -= __imm * 8u; | |
2232 | return __res; | |
2233 | } | |
2234 | ||
2235 | __extension__ extern __inline uint32x4_t | |
2236 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2237 | __arm_vddupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
2238 | { | |
2239 | uint32x4_t __res = __builtin_mve_vddupq_m_n_uv4si (__inactive, *__a, __imm, __p); | |
2240 | *__a -= __imm * 4u; | |
2241 | return __res; | |
2242 | } | |
2243 | ||
2244 | __extension__ extern __inline uint8x16_t | |
2245 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2246 | __arm_vddupq_n_u8 (uint32_t __a, const int __imm) | |
2247 | { | |
2248 | return __builtin_mve_vddupq_n_uv16qi (__a, __imm); | |
2249 | } | |
2250 | ||
2251 | __extension__ extern __inline uint32x4_t | |
2252 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2253 | __arm_vddupq_n_u32 (uint32_t __a, const int __imm) | |
2254 | { | |
2255 | return __builtin_mve_vddupq_n_uv4si (__a, __imm); | |
2256 | } | |
2257 | ||
2258 | __extension__ extern __inline uint16x8_t | |
2259 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2260 | __arm_vddupq_n_u16 (uint32_t __a, const int __imm) | |
2261 | { | |
2262 | return __builtin_mve_vddupq_n_uv8hi (__a, __imm); | |
2263 | } | |
2264 | ||
2265 | __extension__ extern __inline uint8x16_t | |
2266 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2267 | __arm_vdwdupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2268 | { | |
9ce780ef ASDV |
2269 | uint64_t __c = ((uint64_t) __b) << 32; |
2270 | return __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, __a, __c, __imm, __p); | |
92f80065 SP |
2271 | } |
2272 | ||
2273 | __extension__ extern __inline uint32x4_t | |
2274 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2275 | __arm_vdwdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2276 | { | |
9ce780ef ASDV |
2277 | uint64_t __c = ((uint64_t) __b) << 32; |
2278 | return __builtin_mve_vdwdupq_m_n_uv4si (__inactive, __a, __c, __imm, __p); | |
92f80065 SP |
2279 | } |
2280 | ||
2281 | __extension__ extern __inline uint16x8_t | |
2282 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2283 | __arm_vdwdupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2284 | { | |
9ce780ef ASDV |
2285 | uint64_t __c = ((uint64_t) __b) << 32; |
2286 | return __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, __a, __c, __imm, __p); | |
92f80065 SP |
2287 | } |
2288 | ||
2289 | __extension__ extern __inline uint8x16_t | |
2290 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2291 | __arm_vdwdupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2292 | { | |
9ce780ef ASDV |
2293 | uint64_t __c = ((uint64_t) __b) << 32; |
2294 | uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, *__a, __c, __imm, __p); | |
2295 | *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__inactive, *__a, __c, __imm, __p); | |
92f80065 SP |
2296 | return __res; |
2297 | } | |
2298 | ||
2299 | __extension__ extern __inline uint32x4_t | |
2300 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2301 | __arm_vdwdupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2302 | { | |
9ce780ef ASDV |
2303 | uint64_t __c = ((uint64_t) __b) << 32; |
2304 | uint32x4_t __res = __builtin_mve_vdwdupq_m_n_uv4si (__inactive, *__a, __c, __imm, __p); | |
2305 | *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__inactive, *__a, __c, __imm, __p); | |
92f80065 SP |
2306 | return __res; |
2307 | } | |
2308 | ||
2309 | __extension__ extern __inline uint16x8_t | |
2310 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2311 | __arm_vdwdupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2312 | { | |
9ce780ef ASDV |
2313 | uint64_t __c = ((uint64_t) __b) << 32; |
2314 | uint16x8_t __res = __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, *__a, __c, __imm, __p); | |
2315 | *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__inactive, *__a, __c, __imm, __p); | |
92f80065 SP |
2316 | return __res; |
2317 | } | |
2318 | ||
2319 | __extension__ extern __inline uint8x16_t | |
2320 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2321 | __arm_vdwdupq_n_u8 (uint32_t __a, uint32_t __b, const int __imm) | |
2322 | { | |
9ce780ef ASDV |
2323 | uint64_t __c = ((uint64_t) __b) << 32; |
2324 | return __builtin_mve_vdwdupq_n_uv16qi (__a, __c, __imm); | |
92f80065 SP |
2325 | } |
2326 | ||
2327 | __extension__ extern __inline uint32x4_t | |
2328 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2329 | __arm_vdwdupq_n_u32 (uint32_t __a, uint32_t __b, const int __imm) | |
2330 | { | |
9ce780ef ASDV |
2331 | uint64_t __c = ((uint64_t) __b) << 32; |
2332 | return __builtin_mve_vdwdupq_n_uv4si (__a, __c, __imm); | |
92f80065 SP |
2333 | } |
2334 | ||
2335 | __extension__ extern __inline uint16x8_t | |
2336 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2337 | __arm_vdwdupq_n_u16 (uint32_t __a, uint32_t __b, const int __imm) | |
2338 | { | |
9ce780ef ASDV |
2339 | uint64_t __c = ((uint64_t) __b) << 32; |
2340 | return __builtin_mve_vdwdupq_n_uv8hi (__a, __c, __imm); | |
92f80065 SP |
2341 | } |
2342 | ||
2343 | __extension__ extern __inline uint8x16_t | |
2344 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2345 | __arm_vdwdupq_wb_u8 (uint32_t * __a, uint32_t __b, const int __imm) | |
2346 | { | |
9ce780ef ASDV |
2347 | uint64_t __c = ((uint64_t) __b) << 32; |
2348 | uint8x16_t __res = __builtin_mve_vdwdupq_n_uv16qi (*__a, __c, __imm); | |
2349 | *__a = __builtin_mve_vdwdupq_wb_uv16qi (*__a, __c, __imm); | |
92f80065 SP |
2350 | return __res; |
2351 | } | |
2352 | ||
2353 | __extension__ extern __inline uint32x4_t | |
2354 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2355 | __arm_vdwdupq_wb_u32 (uint32_t * __a, uint32_t __b, const int __imm) | |
2356 | { | |
9ce780ef ASDV |
2357 | uint64_t __c = ((uint64_t) __b) << 32; |
2358 | uint32x4_t __res = __builtin_mve_vdwdupq_n_uv4si (*__a, __c, __imm); | |
2359 | *__a = __builtin_mve_vdwdupq_wb_uv4si (*__a, __c, __imm); | |
92f80065 SP |
2360 | return __res; |
2361 | } | |
2362 | ||
2363 | __extension__ extern __inline uint16x8_t | |
2364 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2365 | __arm_vdwdupq_wb_u16 (uint32_t * __a, uint32_t __b, const int __imm) | |
2366 | { | |
9ce780ef ASDV |
2367 | uint64_t __c = ((uint64_t) __b) << 32; |
2368 | uint16x8_t __res = __builtin_mve_vdwdupq_n_uv8hi (*__a, __c, __imm); | |
2369 | *__a = __builtin_mve_vdwdupq_wb_uv8hi (*__a, __c, __imm); | |
92f80065 SP |
2370 | return __res; |
2371 | } | |
2372 | ||
2373 | __extension__ extern __inline uint8x16_t | |
2374 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2375 | __arm_vidupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
2376 | { | |
2377 | return __builtin_mve_vidupq_m_n_uv16qi (__inactive, __a, __imm, __p); | |
2378 | } | |
2379 | ||
2380 | __extension__ extern __inline uint32x4_t | |
2381 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2382 | __arm_vidupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
2383 | { | |
2384 | return __builtin_mve_vidupq_m_n_uv4si (__inactive, __a, __imm, __p); | |
2385 | } | |
2386 | ||
2387 | __extension__ extern __inline uint16x8_t | |
2388 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2389 | __arm_vidupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
2390 | { | |
2391 | return __builtin_mve_vidupq_m_n_uv8hi (__inactive, __a, __imm, __p); | |
2392 | } | |
2393 | ||
2394 | __extension__ extern __inline uint8x16_t | |
2395 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2396 | __arm_vidupq_n_u8 (uint32_t __a, const int __imm) | |
2397 | { | |
2398 | return __builtin_mve_vidupq_n_uv16qi (__a, __imm); | |
2399 | } | |
2400 | ||
2401 | __extension__ extern __inline uint8x16_t | |
2402 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2403 | __arm_vidupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
2404 | { | |
2405 | uint8x16_t __res = __builtin_mve_vidupq_m_n_uv16qi (__inactive, *__a, __imm, __p); | |
2406 | *__a += __imm * 16u; | |
2407 | return __res; | |
2408 | } | |
2409 | ||
2410 | __extension__ extern __inline uint16x8_t | |
2411 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2412 | __arm_vidupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
2413 | { | |
2414 | uint16x8_t __res = __builtin_mve_vidupq_m_n_uv8hi (__inactive, *__a, __imm, __p); | |
2415 | *__a += __imm * 8u; | |
2416 | return __res; | |
2417 | } | |
2418 | ||
2419 | __extension__ extern __inline uint32x4_t | |
2420 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2421 | __arm_vidupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
2422 | { | |
2423 | uint32x4_t __res = __builtin_mve_vidupq_m_n_uv4si (__inactive, *__a, __imm, __p); | |
2424 | *__a += __imm * 4u; | |
2425 | return __res; | |
2426 | } | |
2427 | ||
2428 | __extension__ extern __inline uint32x4_t | |
2429 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2430 | __arm_vidupq_n_u32 (uint32_t __a, const int __imm) | |
2431 | { | |
2432 | return __builtin_mve_vidupq_n_uv4si (__a, __imm); | |
2433 | } | |
2434 | ||
2435 | __extension__ extern __inline uint16x8_t | |
2436 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2437 | __arm_vidupq_n_u16 (uint32_t __a, const int __imm) | |
2438 | { | |
2439 | return __builtin_mve_vidupq_n_uv8hi (__a, __imm); | |
2440 | } | |
2441 | ||
2442 | __extension__ extern __inline uint8x16_t | |
2443 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2444 | __arm_vidupq_wb_u8 (uint32_t * __a, const int __imm) | |
2445 | { | |
2446 | uint8x16_t __res = __builtin_mve_vidupq_n_uv16qi (*__a, __imm); | |
2447 | *__a += __imm * 16u; | |
2448 | return __res; | |
2449 | } | |
2450 | ||
2451 | __extension__ extern __inline uint16x8_t | |
2452 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2453 | __arm_vidupq_wb_u16 (uint32_t * __a, const int __imm) | |
2454 | { | |
2455 | uint16x8_t __res = __builtin_mve_vidupq_n_uv8hi (*__a, __imm); | |
2456 | *__a += __imm * 8u; | |
2457 | return __res; | |
2458 | } | |
2459 | ||
2460 | __extension__ extern __inline uint32x4_t | |
2461 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2462 | __arm_vidupq_wb_u32 (uint32_t * __a, const int __imm) | |
2463 | { | |
2464 | uint32x4_t __res = __builtin_mve_vidupq_n_uv4si (*__a, __imm); | |
2465 | *__a += __imm * 4u; | |
2466 | return __res; | |
2467 | } | |
2468 | ||
2469 | __extension__ extern __inline uint8x16_t | |
2470 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2471 | __arm_vddupq_wb_u8 (uint32_t * __a, const int __imm) | |
2472 | { | |
2473 | uint8x16_t __res = __builtin_mve_vddupq_n_uv16qi (*__a, __imm); | |
2474 | *__a -= __imm * 16u; | |
2475 | return __res; | |
2476 | } | |
2477 | ||
2478 | __extension__ extern __inline uint16x8_t | |
2479 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2480 | __arm_vddupq_wb_u16 (uint32_t * __a, const int __imm) | |
2481 | { | |
2482 | uint16x8_t __res = __builtin_mve_vddupq_n_uv8hi (*__a, __imm); | |
2483 | *__a -= __imm * 8u; | |
2484 | return __res; | |
2485 | } | |
2486 | ||
2487 | __extension__ extern __inline uint32x4_t | |
2488 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2489 | __arm_vddupq_wb_u32 (uint32_t * __a, const int __imm) | |
2490 | { | |
2491 | uint32x4_t __res = __builtin_mve_vddupq_n_uv4si (*__a, __imm); | |
2492 | *__a -= __imm * 4u; | |
2493 | return __res; | |
2494 | } | |
2495 | ||
2496 | __extension__ extern __inline uint8x16_t | |
2497 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2498 | __arm_viwdupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2499 | { | |
9ce780ef ASDV |
2500 | uint64_t __c = ((uint64_t) __b) << 32; |
2501 | return __builtin_mve_viwdupq_m_n_uv16qi (__inactive, __a, __c, __imm, __p); | |
92f80065 SP |
2502 | } |
2503 | ||
2504 | __extension__ extern __inline uint32x4_t | |
2505 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2506 | __arm_viwdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2507 | { | |
9ce780ef ASDV |
2508 | uint64_t __c = ((uint64_t) __b) << 32; |
2509 | return __builtin_mve_viwdupq_m_n_uv4si (__inactive, __a, __c, __imm, __p); | |
92f80065 SP |
2510 | } |
2511 | ||
2512 | __extension__ extern __inline uint16x8_t | |
2513 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2514 | __arm_viwdupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2515 | { | |
9ce780ef ASDV |
2516 | uint64_t __c = ((uint64_t) __b) << 32; |
2517 | return __builtin_mve_viwdupq_m_n_uv8hi (__inactive, __a, __c, __imm, __p); | |
92f80065 SP |
2518 | } |
2519 | ||
2520 | __extension__ extern __inline uint8x16_t | |
2521 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2522 | __arm_viwdupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2523 | { | |
9ce780ef ASDV |
2524 | uint64_t __c = ((uint64_t) __b) << 32; |
2525 | uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__inactive, *__a, __c, __imm, __p); | |
2526 | *__a = __builtin_mve_viwdupq_m_wb_uv16qi (__inactive, *__a, __c, __imm, __p); | |
92f80065 SP |
2527 | return __res; |
2528 | } | |
2529 | ||
2530 | __extension__ extern __inline uint32x4_t | |
2531 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2532 | __arm_viwdupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2533 | { | |
9ce780ef ASDV |
2534 | uint64_t __c = ((uint64_t) __b) << 32; |
2535 | uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__inactive, *__a, __c, __imm, __p); | |
2536 | *__a = __builtin_mve_viwdupq_m_wb_uv4si (__inactive, *__a, __c, __imm, __p); | |
92f80065 SP |
2537 | return __res; |
2538 | } | |
2539 | ||
2540 | __extension__ extern __inline uint16x8_t | |
2541 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2542 | __arm_viwdupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
2543 | { | |
9ce780ef ASDV |
2544 | uint64_t __c = ((uint64_t) __b) << 32; |
2545 | uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__inactive, *__a, __c, __imm, __p); | |
2546 | *__a = __builtin_mve_viwdupq_m_wb_uv8hi (__inactive, *__a, __c, __imm, __p); | |
92f80065 SP |
2547 | return __res; |
2548 | } | |
2549 | ||
2550 | __extension__ extern __inline uint8x16_t | |
2551 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2552 | __arm_viwdupq_n_u8 (uint32_t __a, uint32_t __b, const int __imm) | |
2553 | { | |
9ce780ef ASDV |
2554 | uint64_t __c = ((uint64_t) __b) << 32; |
2555 | return __builtin_mve_viwdupq_n_uv16qi (__a, __c, __imm); | |
92f80065 SP |
2556 | } |
2557 | ||
2558 | __extension__ extern __inline uint32x4_t | |
2559 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2560 | __arm_viwdupq_n_u32 (uint32_t __a, uint32_t __b, const int __imm) | |
2561 | { | |
9ce780ef ASDV |
2562 | uint64_t __c = ((uint64_t) __b) << 32; |
2563 | return __builtin_mve_viwdupq_n_uv4si (__a, __c, __imm); | |
92f80065 SP |
2564 | } |
2565 | ||
2566 | __extension__ extern __inline uint16x8_t | |
2567 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2568 | __arm_viwdupq_n_u16 (uint32_t __a, uint32_t __b, const int __imm) | |
2569 | { | |
9ce780ef ASDV |
2570 | uint64_t __c = ((uint64_t) __b) << 32; |
2571 | return __builtin_mve_viwdupq_n_uv8hi (__a, __c, __imm); | |
92f80065 SP |
2572 | } |
2573 | ||
2574 | __extension__ extern __inline uint8x16_t | |
2575 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2576 | __arm_viwdupq_wb_u8 (uint32_t * __a, uint32_t __b, const int __imm) | |
2577 | { | |
9ce780ef ASDV |
2578 | uint64_t __c = ((uint64_t) __b) << 32; |
2579 | uint8x16_t __res = __builtin_mve_viwdupq_n_uv16qi (*__a, __c, __imm); | |
2580 | *__a = __builtin_mve_viwdupq_wb_uv16qi (*__a, __c, __imm); | |
92f80065 SP |
2581 | return __res; |
2582 | } | |
2583 | ||
2584 | __extension__ extern __inline uint32x4_t | |
2585 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2586 | __arm_viwdupq_wb_u32 (uint32_t * __a, uint32_t __b, const int __imm) | |
2587 | { | |
9ce780ef ASDV |
2588 | uint64_t __c = ((uint64_t) __b) << 32; |
2589 | uint32x4_t __res = __builtin_mve_viwdupq_n_uv4si (*__a, __c, __imm); | |
2590 | *__a = __builtin_mve_viwdupq_wb_uv4si (*__a, __c, __imm); | |
92f80065 SP |
2591 | return __res; |
2592 | } | |
2593 | ||
2594 | __extension__ extern __inline uint16x8_t | |
2595 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2596 | __arm_viwdupq_wb_u16 (uint32_t * __a, uint32_t __b, const int __imm) | |
2597 | { | |
9ce780ef ASDV |
2598 | uint64_t __c = ((uint64_t) __b) << 32; |
2599 | uint16x8_t __res = __builtin_mve_viwdupq_n_uv8hi (*__a, __c, __imm); | |
2600 | *__a = __builtin_mve_viwdupq_wb_uv8hi (*__a, __c, __imm); | |
92f80065 SP |
2601 | return __res; |
2602 | } | |
2603 | ||
9ce780ef | 2604 | |
41e1a7ff SP |
2605 | __extension__ extern __inline int64x2_t |
2606 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2607 | __arm_vldrdq_gather_base_wb_s64 (uint64x2_t * __addr, const int __offset) | |
2608 | { | |
2609 | int64x2_t | |
ff825b81 SP |
2610 | result = __builtin_mve_vldrdq_gather_base_nowb_sv2di (*__addr, __offset); |
2611 | *__addr = __builtin_mve_vldrdq_gather_base_wb_sv2di (*__addr, __offset); | |
41e1a7ff SP |
2612 | return result; |
2613 | } | |
2614 | ||
2615 | __extension__ extern __inline uint64x2_t | |
2616 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2617 | __arm_vldrdq_gather_base_wb_u64 (uint64x2_t * __addr, const int __offset) | |
2618 | { | |
2619 | uint64x2_t | |
ff825b81 SP |
2620 | result = __builtin_mve_vldrdq_gather_base_nowb_uv2di (*__addr, __offset); |
2621 | *__addr = __builtin_mve_vldrdq_gather_base_wb_uv2di (*__addr, __offset); | |
41e1a7ff SP |
2622 | return result; |
2623 | } | |
2624 | ||
2625 | __extension__ extern __inline int64x2_t | |
2626 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2627 | __arm_vldrdq_gather_base_wb_z_s64 (uint64x2_t * __addr, const int __offset, mve_pred16_t __p) | |
2628 | { | |
2629 | int64x2_t | |
ff825b81 SP |
2630 | result = __builtin_mve_vldrdq_gather_base_nowb_z_sv2di (*__addr, __offset, __p); |
2631 | *__addr = __builtin_mve_vldrdq_gather_base_wb_z_sv2di (*__addr, __offset, __p); | |
41e1a7ff SP |
2632 | return result; |
2633 | } | |
2634 | ||
2635 | __extension__ extern __inline uint64x2_t | |
2636 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2637 | __arm_vldrdq_gather_base_wb_z_u64 (uint64x2_t * __addr, const int __offset, mve_pred16_t __p) | |
2638 | { | |
2639 | uint64x2_t | |
ff825b81 SP |
2640 | result = __builtin_mve_vldrdq_gather_base_nowb_z_uv2di (*__addr, __offset, __p); |
2641 | *__addr = __builtin_mve_vldrdq_gather_base_wb_z_uv2di (*__addr, __offset, __p); | |
41e1a7ff SP |
2642 | return result; |
2643 | } | |
2644 | ||
2645 | __extension__ extern __inline int32x4_t | |
2646 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2647 | __arm_vldrwq_gather_base_wb_s32 (uint32x4_t * __addr, const int __offset) | |
2648 | { | |
2649 | int32x4_t | |
ff825b81 SP |
2650 | result = __builtin_mve_vldrwq_gather_base_nowb_sv4si (*__addr, __offset); |
2651 | *__addr = __builtin_mve_vldrwq_gather_base_wb_sv4si (*__addr, __offset); | |
41e1a7ff SP |
2652 | return result; |
2653 | } | |
2654 | ||
2655 | __extension__ extern __inline uint32x4_t | |
2656 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2657 | __arm_vldrwq_gather_base_wb_u32 (uint32x4_t * __addr, const int __offset) | |
2658 | { | |
2659 | uint32x4_t | |
ff825b81 SP |
2660 | result = __builtin_mve_vldrwq_gather_base_nowb_uv4si (*__addr, __offset); |
2661 | *__addr = __builtin_mve_vldrwq_gather_base_wb_uv4si (*__addr, __offset); | |
41e1a7ff SP |
2662 | return result; |
2663 | } | |
2664 | ||
2665 | __extension__ extern __inline int32x4_t | |
2666 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2667 | __arm_vldrwq_gather_base_wb_z_s32 (uint32x4_t * __addr, const int __offset, mve_pred16_t __p) | |
2668 | { | |
2669 | int32x4_t | |
ff825b81 SP |
2670 | result = __builtin_mve_vldrwq_gather_base_nowb_z_sv4si (*__addr, __offset, __p); |
2671 | *__addr = __builtin_mve_vldrwq_gather_base_wb_z_sv4si (*__addr, __offset, __p); | |
41e1a7ff SP |
2672 | return result; |
2673 | } | |
2674 | ||
2675 | __extension__ extern __inline uint32x4_t | |
2676 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2677 | __arm_vldrwq_gather_base_wb_z_u32 (uint32x4_t * __addr, const int __offset, mve_pred16_t __p) | |
2678 | { | |
2679 | uint32x4_t | |
ff825b81 SP |
2680 | result = __builtin_mve_vldrwq_gather_base_nowb_z_uv4si (*__addr, __offset, __p); |
2681 | *__addr = __builtin_mve_vldrwq_gather_base_wb_z_uv4si (*__addr, __offset, __p); | |
41e1a7ff SP |
2682 | return result; |
2683 | } | |
2684 | ||
2685 | __extension__ extern __inline void | |
2686 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2687 | __arm_vstrdq_scatter_base_wb_s64 (uint64x2_t * __addr, const int __offset, int64x2_t __value) | |
2688 | { | |
37753588 | 2689 | *__addr = __builtin_mve_vstrdq_scatter_base_wb_sv2di (*__addr, __offset, __value); |
41e1a7ff SP |
2690 | } |
2691 | ||
2692 | __extension__ extern __inline void | |
2693 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2694 | __arm_vstrdq_scatter_base_wb_u64 (uint64x2_t * __addr, const int __offset, uint64x2_t __value) | |
2695 | { | |
37753588 | 2696 | *__addr = __builtin_mve_vstrdq_scatter_base_wb_uv2di (*__addr, __offset, __value); |
41e1a7ff SP |
2697 | } |
2698 | ||
2699 | __extension__ extern __inline void | |
2700 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2701 | __arm_vstrdq_scatter_base_wb_p_s64 (uint64x2_t * __addr, const int __offset, int64x2_t __value, mve_pred16_t __p) | |
2702 | { | |
37753588 | 2703 | *__addr = __builtin_mve_vstrdq_scatter_base_wb_p_sv2di (*__addr, __offset, __value, __p); |
41e1a7ff SP |
2704 | } |
2705 | ||
2706 | __extension__ extern __inline void | |
2707 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2708 | __arm_vstrdq_scatter_base_wb_p_u64 (uint64x2_t * __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p) | |
2709 | { | |
37753588 | 2710 | *__addr = __builtin_mve_vstrdq_scatter_base_wb_p_uv2di (*__addr, __offset, __value, __p); |
41e1a7ff SP |
2711 | } |
2712 | ||
2713 | __extension__ extern __inline void | |
2714 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2715 | __arm_vstrwq_scatter_base_wb_p_s32 (uint32x4_t * __addr, const int __offset, int32x4_t __value, mve_pred16_t __p) | |
2716 | { | |
37753588 | 2717 | *__addr = __builtin_mve_vstrwq_scatter_base_wb_p_sv4si (*__addr, __offset, __value, __p); |
41e1a7ff SP |
2718 | } |
2719 | ||
2720 | __extension__ extern __inline void | |
2721 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2722 | __arm_vstrwq_scatter_base_wb_p_u32 (uint32x4_t * __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p) | |
2723 | { | |
37753588 | 2724 | *__addr = __builtin_mve_vstrwq_scatter_base_wb_p_uv4si (*__addr, __offset, __value, __p); |
41e1a7ff SP |
2725 | } |
2726 | ||
2727 | __extension__ extern __inline void | |
2728 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2729 | __arm_vstrwq_scatter_base_wb_s32 (uint32x4_t * __addr, const int __offset, int32x4_t __value) | |
2730 | { | |
37753588 | 2731 | *__addr = __builtin_mve_vstrwq_scatter_base_wb_sv4si (*__addr, __offset, __value); |
41e1a7ff SP |
2732 | } |
2733 | ||
2734 | __extension__ extern __inline void | |
2735 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2736 | __arm_vstrwq_scatter_base_wb_u32 (uint32x4_t * __addr, const int __offset, uint32x4_t __value) | |
2737 | { | |
37753588 | 2738 | *__addr = __builtin_mve_vstrwq_scatter_base_wb_uv4si (*__addr, __offset, __value); |
41e1a7ff SP |
2739 | } |
2740 | ||
261014a1 SP |
2741 | __extension__ extern __inline uint8x16_t |
2742 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
2743 | __arm_vddupq_x_n_u8 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
2744 | { | |
c431634b | 2745 | return __builtin_mve_vddupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p); |
261014a1 | 2746 | } |
f9355dee | 2747 | |
261014a1 | 2748 | __extension__ extern __inline uint16x8_t |
f9355dee | 2749 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2750 | __arm_vddupq_x_n_u16 (uint32_t __a, const int __imm, mve_pred16_t __p) |
f9355dee | 2751 | { |
c431634b | 2752 | return __builtin_mve_vddupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p); |
f9355dee SP |
2753 | } |
2754 | ||
261014a1 | 2755 | __extension__ extern __inline uint32x4_t |
f9355dee | 2756 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2757 | __arm_vddupq_x_n_u32 (uint32_t __a, const int __imm, mve_pred16_t __p) |
f9355dee | 2758 | { |
c431634b | 2759 | return __builtin_mve_vddupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p); |
f9355dee SP |
2760 | } |
2761 | ||
261014a1 | 2762 | __extension__ extern __inline uint8x16_t |
f9355dee | 2763 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2764 | __arm_vddupq_x_wb_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p) |
f9355dee | 2765 | { |
c431634b | 2766 | uint8x16_t __arg1 = __arm_vuninitializedq_u8 (); |
261014a1 SP |
2767 | uint8x16_t __res = __builtin_mve_vddupq_m_n_uv16qi (__arg1, * __a, __imm, __p); |
2768 | *__a -= __imm * 16u; | |
2769 | return __res; | |
f9355dee SP |
2770 | } |
2771 | ||
261014a1 | 2772 | __extension__ extern __inline uint16x8_t |
f9355dee | 2773 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2774 | __arm_vddupq_x_wb_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p) |
f9355dee | 2775 | { |
c431634b | 2776 | uint16x8_t __arg1 = __arm_vuninitializedq_u16 (); |
261014a1 SP |
2777 | uint16x8_t __res = __builtin_mve_vddupq_m_n_uv8hi (__arg1, *__a, __imm, __p); |
2778 | *__a -= __imm * 8u; | |
2779 | return __res; | |
f9355dee SP |
2780 | } |
2781 | ||
261014a1 | 2782 | __extension__ extern __inline uint32x4_t |
f9355dee | 2783 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2784 | __arm_vddupq_x_wb_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p) |
f9355dee | 2785 | { |
c431634b | 2786 | uint32x4_t __arg1 = __arm_vuninitializedq_u32 (); |
261014a1 SP |
2787 | uint32x4_t __res = __builtin_mve_vddupq_m_n_uv4si (__arg1, *__a, __imm, __p); |
2788 | *__a -= __imm * 4u; | |
2789 | return __res; | |
f9355dee SP |
2790 | } |
2791 | ||
261014a1 | 2792 | __extension__ extern __inline uint8x16_t |
f9355dee | 2793 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2794 | __arm_vdwdupq_x_n_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2795 | { |
9ce780ef ASDV |
2796 | uint64_t __c = ((uint64_t) __b) << 32; |
2797 | return __builtin_mve_vdwdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __c, __imm, __p); | |
f9355dee SP |
2798 | } |
2799 | ||
261014a1 | 2800 | __extension__ extern __inline uint16x8_t |
f9355dee | 2801 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2802 | __arm_vdwdupq_x_n_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2803 | { |
9ce780ef ASDV |
2804 | uint64_t __c = ((uint64_t) __b) << 32; |
2805 | return __builtin_mve_vdwdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __c, __imm, __p); | |
f9355dee SP |
2806 | } |
2807 | ||
261014a1 | 2808 | __extension__ extern __inline uint32x4_t |
f9355dee | 2809 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2810 | __arm_vdwdupq_x_n_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2811 | { |
9ce780ef ASDV |
2812 | uint64_t __c = ((uint64_t) __b) << 32; |
2813 | return __builtin_mve_vdwdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __c, __imm, __p); | |
f9355dee SP |
2814 | } |
2815 | ||
261014a1 | 2816 | __extension__ extern __inline uint8x16_t |
f9355dee | 2817 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2818 | __arm_vdwdupq_x_wb_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2819 | { |
9ce780ef ASDV |
2820 | uint64_t __c = ((uint64_t) __b) << 32; |
2821 | uint8x16_t __arg1 = __arm_vuninitializedq_u8 (); | |
2822 | uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__arg1, *__a, __c, __imm, __p); | |
2823 | *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__arg1, *__a, __c, __imm, __p); | |
261014a1 | 2824 | return __res; |
f9355dee SP |
2825 | } |
2826 | ||
261014a1 | 2827 | __extension__ extern __inline uint16x8_t |
f9355dee | 2828 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2829 | __arm_vdwdupq_x_wb_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2830 | { |
9ce780ef ASDV |
2831 | uint64_t __c = ((uint64_t) __b) << 32; |
2832 | uint16x8_t __arg1 = __arm_vuninitializedq_u16 (); | |
2833 | uint16x8_t __res = __builtin_mve_vdwdupq_m_n_uv8hi (__arg1, *__a, __c, __imm, __p); | |
2834 | *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__arg1, *__a, __c, __imm, __p); | |
261014a1 | 2835 | return __res; |
f9355dee SP |
2836 | } |
2837 | ||
261014a1 | 2838 | __extension__ extern __inline uint32x4_t |
f9355dee | 2839 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2840 | __arm_vdwdupq_x_wb_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2841 | { |
9ce780ef ASDV |
2842 | uint64_t __c = ((uint64_t) __b) << 32; |
2843 | uint32x4_t __arg1 = __arm_vuninitializedq_u32 (); | |
2844 | uint32x4_t __res = __builtin_mve_vdwdupq_m_n_uv4si (__arg1, *__a, __c, __imm, __p); | |
2845 | *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__arg1, *__a, __c, __imm, __p); | |
261014a1 | 2846 | return __res; |
f9355dee SP |
2847 | } |
2848 | ||
261014a1 | 2849 | __extension__ extern __inline uint8x16_t |
f9355dee | 2850 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2851 | __arm_vidupq_x_n_u8 (uint32_t __a, const int __imm, mve_pred16_t __p) |
f9355dee | 2852 | { |
c431634b | 2853 | return __builtin_mve_vidupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __imm, __p); |
f9355dee SP |
2854 | } |
2855 | ||
261014a1 | 2856 | __extension__ extern __inline uint16x8_t |
f9355dee | 2857 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2858 | __arm_vidupq_x_n_u16 (uint32_t __a, const int __imm, mve_pred16_t __p) |
f9355dee | 2859 | { |
c431634b | 2860 | return __builtin_mve_vidupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm, __p); |
f9355dee SP |
2861 | } |
2862 | ||
261014a1 | 2863 | __extension__ extern __inline uint32x4_t |
f9355dee | 2864 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2865 | __arm_vidupq_x_n_u32 (uint32_t __a, const int __imm, mve_pred16_t __p) |
f9355dee | 2866 | { |
c431634b | 2867 | return __builtin_mve_vidupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __imm, __p); |
f9355dee SP |
2868 | } |
2869 | ||
261014a1 | 2870 | __extension__ extern __inline uint8x16_t |
f9355dee | 2871 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2872 | __arm_vidupq_x_wb_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p) |
f9355dee | 2873 | { |
c431634b | 2874 | uint8x16_t __arg1 = __arm_vuninitializedq_u8 (); |
261014a1 SP |
2875 | uint8x16_t __res = __builtin_mve_vidupq_m_n_uv16qi (__arg1, *__a, __imm, __p); |
2876 | *__a += __imm * 16u; | |
2877 | return __res; | |
f9355dee SP |
2878 | } |
2879 | ||
261014a1 | 2880 | __extension__ extern __inline uint16x8_t |
f9355dee | 2881 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2882 | __arm_vidupq_x_wb_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p) |
f9355dee | 2883 | { |
c431634b | 2884 | uint16x8_t __arg1 = __arm_vuninitializedq_u16 (); |
261014a1 SP |
2885 | uint16x8_t __res = __builtin_mve_vidupq_m_n_uv8hi (__arg1, *__a, __imm, __p); |
2886 | *__a += __imm * 8u; | |
2887 | return __res; | |
f9355dee SP |
2888 | } |
2889 | ||
261014a1 | 2890 | __extension__ extern __inline uint32x4_t |
f9355dee | 2891 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2892 | __arm_vidupq_x_wb_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p) |
f9355dee | 2893 | { |
c431634b | 2894 | uint32x4_t __arg1 = __arm_vuninitializedq_u32 (); |
261014a1 SP |
2895 | uint32x4_t __res = __builtin_mve_vidupq_m_n_uv4si (__arg1, *__a, __imm, __p); |
2896 | *__a += __imm * 4u; | |
2897 | return __res; | |
f9355dee SP |
2898 | } |
2899 | ||
261014a1 | 2900 | __extension__ extern __inline uint8x16_t |
f9355dee | 2901 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2902 | __arm_viwdupq_x_n_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2903 | { |
9ce780ef ASDV |
2904 | uint64_t __c = ((uint64_t) __b) << 32; |
2905 | return __builtin_mve_viwdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __c, __imm, __p); | |
f9355dee SP |
2906 | } |
2907 | ||
261014a1 | 2908 | __extension__ extern __inline uint16x8_t |
f9355dee | 2909 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2910 | __arm_viwdupq_x_n_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2911 | { |
9ce780ef ASDV |
2912 | uint64_t __c = ((uint64_t) __b) << 32; |
2913 | return __builtin_mve_viwdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __c, __imm, __p); | |
f9355dee SP |
2914 | } |
2915 | ||
261014a1 | 2916 | __extension__ extern __inline uint32x4_t |
f9355dee | 2917 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2918 | __arm_viwdupq_x_n_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2919 | { |
9ce780ef ASDV |
2920 | uint64_t __c = ((uint64_t) __b) << 32; |
2921 | return __builtin_mve_viwdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __c, __imm, __p); | |
f9355dee SP |
2922 | } |
2923 | ||
261014a1 | 2924 | __extension__ extern __inline uint8x16_t |
f9355dee | 2925 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2926 | __arm_viwdupq_x_wb_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2927 | { |
9ce780ef ASDV |
2928 | uint64_t __c = ((uint64_t) __b) << 32; |
2929 | uint8x16_t __arg1 = __arm_vuninitializedq_u8 (); | |
2930 | uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__arg1, *__a, __c, __imm, __p); | |
2931 | *__a = __builtin_mve_viwdupq_m_wb_uv16qi (__arg1, *__a, __c, __imm, __p); | |
261014a1 | 2932 | return __res; |
f9355dee SP |
2933 | } |
2934 | ||
261014a1 | 2935 | __extension__ extern __inline uint16x8_t |
f9355dee | 2936 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2937 | __arm_viwdupq_x_wb_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2938 | { |
9ce780ef ASDV |
2939 | uint64_t __c = ((uint64_t) __b) << 32; |
2940 | uint16x8_t __arg1 = __arm_vuninitializedq_u16 (); | |
2941 | uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__arg1, *__a, __c, __imm, __p); | |
2942 | *__a = __builtin_mve_viwdupq_m_wb_uv8hi (__arg1, *__a, __c, __imm, __p); | |
261014a1 | 2943 | return __res; |
f9355dee SP |
2944 | } |
2945 | ||
261014a1 | 2946 | __extension__ extern __inline uint32x4_t |
f9355dee | 2947 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 2948 | __arm_viwdupq_x_wb_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) |
f9355dee | 2949 | { |
9ce780ef ASDV |
2950 | uint64_t __c = ((uint64_t) __b) << 32; |
2951 | uint32x4_t __arg1 = __arm_vuninitializedq_u32 (); | |
2952 | uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__arg1, *__a, __c, __imm, __p); | |
2953 | *__a = __builtin_mve_viwdupq_m_wb_uv4si (__arg1, *__a, __c, __imm, __p); | |
261014a1 | 2954 | return __res; |
f9355dee SP |
2955 | } |
2956 | ||
261014a1 | 2957 | __extension__ extern __inline int8x16_t |
e3678b44 | 2958 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 2959 | __arm_vbicq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p) |
e3678b44 | 2960 | { |
446b5be4 | 2961 | return __builtin_mve_vbicq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p); |
e3678b44 SP |
2962 | } |
2963 | ||
261014a1 | 2964 | __extension__ extern __inline int16x8_t |
e3678b44 | 2965 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 2966 | __arm_vbicq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p) |
e3678b44 | 2967 | { |
446b5be4 | 2968 | return __builtin_mve_vbicq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p); |
e3678b44 SP |
2969 | } |
2970 | ||
261014a1 | 2971 | __extension__ extern __inline int32x4_t |
e3678b44 | 2972 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 2973 | __arm_vbicq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p) |
e3678b44 | 2974 | { |
446b5be4 | 2975 | return __builtin_mve_vbicq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p); |
e3678b44 SP |
2976 | } |
2977 | ||
261014a1 | 2978 | __extension__ extern __inline uint8x16_t |
e3678b44 | 2979 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 2980 | __arm_vbicq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) |
e3678b44 | 2981 | { |
446b5be4 | 2982 | return __builtin_mve_vbicq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p); |
e3678b44 SP |
2983 | } |
2984 | ||
261014a1 | 2985 | __extension__ extern __inline uint16x8_t |
e3678b44 | 2986 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 2987 | __arm_vbicq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) |
e3678b44 | 2988 | { |
446b5be4 | 2989 | return __builtin_mve_vbicq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p); |
e3678b44 SP |
2990 | } |
2991 | ||
261014a1 | 2992 | __extension__ extern __inline uint32x4_t |
e3678b44 | 2993 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 2994 | __arm_vbicq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) |
e3678b44 | 2995 | { |
446b5be4 | 2996 | return __builtin_mve_vbicq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p); |
e3678b44 SP |
2997 | } |
2998 | ||
261014a1 | 2999 | __extension__ extern __inline int8x16_t |
e3678b44 | 3000 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3001 | __arm_vornq_x_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p) |
e3678b44 | 3002 | { |
446b5be4 | 3003 | return __builtin_mve_vornq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __b, __p); |
e3678b44 SP |
3004 | } |
3005 | ||
261014a1 | 3006 | __extension__ extern __inline int16x8_t |
e3678b44 | 3007 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3008 | __arm_vornq_x_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p) |
e3678b44 | 3009 | { |
446b5be4 | 3010 | return __builtin_mve_vornq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __b, __p); |
e3678b44 SP |
3011 | } |
3012 | ||
261014a1 | 3013 | __extension__ extern __inline int32x4_t |
e3678b44 | 3014 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3015 | __arm_vornq_x_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p) |
e3678b44 | 3016 | { |
446b5be4 | 3017 | return __builtin_mve_vornq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __b, __p); |
e3678b44 SP |
3018 | } |
3019 | ||
261014a1 | 3020 | __extension__ extern __inline uint8x16_t |
e3678b44 | 3021 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3022 | __arm_vornq_x_u8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) |
e3678b44 | 3023 | { |
446b5be4 | 3024 | return __builtin_mve_vornq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __b, __p); |
e3678b44 SP |
3025 | } |
3026 | ||
261014a1 | 3027 | __extension__ extern __inline uint16x8_t |
e3678b44 | 3028 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3029 | __arm_vornq_x_u16 (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) |
e3678b44 | 3030 | { |
446b5be4 | 3031 | return __builtin_mve_vornq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __b, __p); |
e3678b44 SP |
3032 | } |
3033 | ||
261014a1 | 3034 | __extension__ extern __inline uint32x4_t |
e3678b44 | 3035 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3036 | __arm_vornq_x_u32 (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) |
e3678b44 | 3037 | { |
446b5be4 | 3038 | return __builtin_mve_vornq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __b, __p); |
e3678b44 SP |
3039 | } |
3040 | ||
446b5be4 | 3041 | __extension__ extern __inline int32x4_t |
e3678b44 | 3042 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3043 | __arm_vadciq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry_out) |
e3678b44 | 3044 | { |
446b5be4 CL |
3045 | int32x4_t __res = __builtin_mve_vadciq_sv4si (__a, __b); |
3046 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3047 | return __res; | |
e3678b44 SP |
3048 | } |
3049 | ||
446b5be4 | 3050 | __extension__ extern __inline uint32x4_t |
e3678b44 | 3051 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3052 | __arm_vadciq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out) |
e3678b44 | 3053 | { |
446b5be4 CL |
3054 | uint32x4_t __res = __builtin_mve_vadciq_uv4si (__a, __b); |
3055 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3056 | return __res; | |
e3678b44 SP |
3057 | } |
3058 | ||
261014a1 | 3059 | __extension__ extern __inline int32x4_t |
e3678b44 | 3060 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3061 | __arm_vadciq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) |
e3678b44 | 3062 | { |
446b5be4 CL |
3063 | int32x4_t __res = __builtin_mve_vadciq_m_sv4si (__inactive, __a, __b, __p); |
3064 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3065 | return __res; | |
e3678b44 SP |
3066 | } |
3067 | ||
446b5be4 | 3068 | __extension__ extern __inline uint32x4_t |
e3678b44 | 3069 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3070 | __arm_vadciq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) |
e3678b44 | 3071 | { |
446b5be4 CL |
3072 | uint32x4_t __res = __builtin_mve_vadciq_m_uv4si (__inactive, __a, __b, __p); |
3073 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3074 | return __res; | |
e3678b44 SP |
3075 | } |
3076 | ||
261014a1 | 3077 | __extension__ extern __inline int32x4_t |
e3678b44 | 3078 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3079 | __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry) |
e3678b44 | 3080 | { |
446b5be4 CL |
3081 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
3082 | int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b); | |
3083 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3084 | return __res; | |
e3678b44 SP |
3085 | } |
3086 | ||
446b5be4 | 3087 | __extension__ extern __inline uint32x4_t |
e3678b44 | 3088 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3089 | __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) |
e3678b44 | 3090 | { |
446b5be4 CL |
3091 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
3092 | uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b); | |
3093 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3094 | return __res; | |
e3678b44 SP |
3095 | } |
3096 | ||
446b5be4 | 3097 | __extension__ extern __inline int32x4_t |
e3678b44 | 3098 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 3099 | __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) |
e3678b44 | 3100 | { |
446b5be4 CL |
3101 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
3102 | int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p); | |
3103 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3104 | return __res; | |
e3678b44 SP |
3105 | } |
3106 | ||
446b5be4 | 3107 | __extension__ extern __inline uint32x4_t |
c3562f81 SP |
3108 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
3109 | __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
3110 | { | |
8eedd1e1 | 3111 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
c3562f81 SP |
3112 | uint32x4_t __res = __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p); |
3113 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3114 | return __res; | |
3115 | } | |
3116 | ||
3117 | __extension__ extern __inline int32x4_t | |
3118 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3119 | __arm_vsbciq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry_out) | |
3120 | { | |
3121 | int32x4_t __res = __builtin_mve_vsbciq_sv4si (__a, __b); | |
3122 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3123 | return __res; | |
3124 | } | |
3125 | ||
3126 | __extension__ extern __inline uint32x4_t | |
3127 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3128 | __arm_vsbciq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out) | |
3129 | { | |
3130 | uint32x4_t __res = __builtin_mve_vsbciq_uv4si (__a, __b); | |
3131 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3132 | return __res; | |
3133 | } | |
3134 | ||
3135 | __extension__ extern __inline int32x4_t | |
3136 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3137 | __arm_vsbciq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) | |
3138 | { | |
3139 | int32x4_t __res = __builtin_mve_vsbciq_m_sv4si (__inactive, __a, __b, __p); | |
3140 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3141 | return __res; | |
3142 | } | |
3143 | ||
3144 | __extension__ extern __inline uint32x4_t | |
3145 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3146 | __arm_vsbciq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) | |
3147 | { | |
3148 | uint32x4_t __res = __builtin_mve_vsbciq_m_uv4si (__inactive, __a, __b, __p); | |
3149 | *__carry_out = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3150 | return __res; | |
3151 | } | |
3152 | ||
3153 | __extension__ extern __inline int32x4_t | |
3154 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3155 | __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry) | |
3156 | { | |
8eedd1e1 | 3157 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
c3562f81 SP |
3158 | int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b); |
3159 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3160 | return __res; | |
3161 | } | |
3162 | ||
3163 | __extension__ extern __inline uint32x4_t | |
3164 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3165 | __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) | |
3166 | { | |
8eedd1e1 | 3167 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
c3562f81 SP |
3168 | uint32x4_t __res = __builtin_mve_vsbcq_uv4si (__a, __b); |
3169 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3170 | return __res; | |
3171 | } | |
3172 | ||
3173 | __extension__ extern __inline int32x4_t | |
3174 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3175 | __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
3176 | { | |
8eedd1e1 | 3177 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
c3562f81 SP |
3178 | int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p); |
3179 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3180 | return __res; | |
3181 | } | |
3182 | ||
3183 | __extension__ extern __inline uint32x4_t | |
3184 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3185 | __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
3186 | { | |
8eedd1e1 | 3187 | __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); |
c3562f81 SP |
3188 | uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p); |
3189 | *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; | |
3190 | return __res; | |
3191 | } | |
3192 | ||
1dfcc3b5 SP |
3193 | __extension__ extern __inline void |
3194 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3195 | __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p) | |
3196 | { | |
f54e31dd | 3197 | return __arm_vstrbq_p_u8 (__addr, __value, __p); |
1dfcc3b5 SP |
3198 | } |
3199 | ||
3200 | __extension__ extern __inline void | |
3201 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3202 | __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p) | |
3203 | { | |
f54e31dd | 3204 | return __arm_vstrbq_p_s8 (__addr, __value, __p); |
1dfcc3b5 SP |
3205 | } |
3206 | ||
3207 | __extension__ extern __inline void | |
3208 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3209 | __arm_vst2q_s8 (int8_t * __addr, int8x16x2_t __value) | |
3210 | { | |
3211 | union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv; | |
3212 | __rv.__i = __value; | |
3213 | __builtin_mve_vst2qv16qi ((__builtin_neon_qi *) __addr, __rv.__o); | |
3214 | } | |
3215 | ||
3216 | __extension__ extern __inline void | |
3217 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3218 | __arm_vst2q_u8 (uint8_t * __addr, uint8x16x2_t __value) | |
3219 | { | |
3220 | union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv; | |
3221 | __rv.__i = __value; | |
3222 | __builtin_mve_vst2qv16qi ((__builtin_neon_qi *) __addr, __rv.__o); | |
3223 | } | |
3224 | ||
3225 | __extension__ extern __inline uint8x16_t | |
3226 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3227 | __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p) | |
3228 | { | |
f54e31dd | 3229 | return __arm_vldrbq_z_u8 ( __base, __p); |
1dfcc3b5 SP |
3230 | } |
3231 | ||
3232 | __extension__ extern __inline int8x16_t | |
3233 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3234 | __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p) | |
3235 | { | |
f54e31dd | 3236 | return __arm_vldrbq_z_s8 ( __base, __p); |
1dfcc3b5 SP |
3237 | } |
3238 | ||
3239 | __extension__ extern __inline int8x16x2_t | |
3240 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3241 | __arm_vld2q_s8 (int8_t const * __addr) | |
3242 | { | |
3243 | union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv; | |
3244 | __rv.__o = __builtin_mve_vld2qv16qi ((__builtin_neon_qi *) __addr); | |
3245 | return __rv.__i; | |
3246 | } | |
3247 | ||
3248 | __extension__ extern __inline uint8x16x2_t | |
3249 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3250 | __arm_vld2q_u8 (uint8_t const * __addr) | |
3251 | { | |
3252 | union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv; | |
3253 | __rv.__o = __builtin_mve_vld2qv16qi ((__builtin_neon_qi *) __addr); | |
3254 | return __rv.__i; | |
3255 | } | |
3256 | ||
3257 | __extension__ extern __inline int8x16x4_t | |
3258 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3259 | __arm_vld4q_s8 (int8_t const * __addr) | |
3260 | { | |
3261 | union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; | |
3262 | __rv.__o = __builtin_mve_vld4qv16qi ((__builtin_neon_qi *) __addr); | |
3263 | return __rv.__i; | |
3264 | } | |
3265 | ||
3266 | __extension__ extern __inline uint8x16x4_t | |
3267 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3268 | __arm_vld4q_u8 (uint8_t const * __addr) | |
3269 | { | |
3270 | union { uint8x16x4_t __i; __builtin_neon_xi __o; } __rv; | |
3271 | __rv.__o = __builtin_mve_vld4qv16qi ((__builtin_neon_qi *) __addr); | |
3272 | return __rv.__i; | |
3273 | } | |
3274 | ||
3275 | __extension__ extern __inline void | |
3276 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3277 | __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p) | |
3278 | { | |
f54e31dd | 3279 | return __arm_vstrhq_p_u16 (__addr, __value, __p); |
1dfcc3b5 SP |
3280 | } |
3281 | ||
3282 | __extension__ extern __inline void | |
3283 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3284 | __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p) | |
3285 | { | |
f54e31dd | 3286 | return __arm_vstrhq_p_s16 (__addr, __value, __p); |
1dfcc3b5 SP |
3287 | } |
3288 | ||
3289 | __extension__ extern __inline void | |
3290 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3291 | __arm_vst2q_s16 (int16_t * __addr, int16x8x2_t __value) | |
3292 | { | |
3293 | union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv; | |
3294 | __rv.__i = __value; | |
3295 | __builtin_mve_vst2qv8hi ((__builtin_neon_hi *) __addr, __rv.__o); | |
3296 | } | |
3297 | ||
3298 | __extension__ extern __inline void | |
3299 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3300 | __arm_vst2q_u16 (uint16_t * __addr, uint16x8x2_t __value) | |
3301 | { | |
3302 | union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv; | |
3303 | __rv.__i = __value; | |
3304 | __builtin_mve_vst2qv8hi ((__builtin_neon_hi *) __addr, __rv.__o); | |
3305 | } | |
3306 | ||
3307 | __extension__ extern __inline uint16x8_t | |
3308 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3309 | __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p) | |
3310 | { | |
f54e31dd | 3311 | return __arm_vldrhq_z_u16 ( __base, __p); |
1dfcc3b5 SP |
3312 | } |
3313 | ||
3314 | __extension__ extern __inline int16x8_t | |
3315 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3316 | __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p) | |
3317 | { | |
f54e31dd | 3318 | return __arm_vldrhq_z_s16 ( __base, __p); |
1dfcc3b5 SP |
3319 | } |
3320 | ||
3321 | __extension__ extern __inline int16x8x2_t | |
3322 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3323 | __arm_vld2q_s16 (int16_t const * __addr) | |
3324 | { | |
3325 | union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv; | |
3326 | __rv.__o = __builtin_mve_vld2qv8hi ((__builtin_neon_hi *) __addr); | |
3327 | return __rv.__i; | |
3328 | } | |
3329 | ||
3330 | __extension__ extern __inline uint16x8x2_t | |
3331 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3332 | __arm_vld2q_u16 (uint16_t const * __addr) | |
3333 | { | |
3334 | union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv; | |
3335 | __rv.__o = __builtin_mve_vld2qv8hi ((__builtin_neon_hi *) __addr); | |
3336 | return __rv.__i; | |
3337 | } | |
3338 | ||
3339 | __extension__ extern __inline int16x8x4_t | |
3340 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3341 | __arm_vld4q_s16 (int16_t const * __addr) | |
3342 | { | |
3343 | union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; | |
3344 | __rv.__o = __builtin_mve_vld4qv8hi ((__builtin_neon_hi *) __addr); | |
3345 | return __rv.__i; | |
3346 | } | |
3347 | ||
3348 | __extension__ extern __inline uint16x8x4_t | |
3349 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3350 | __arm_vld4q_u16 (uint16_t const * __addr) | |
3351 | { | |
3352 | union { uint16x8x4_t __i; __builtin_neon_xi __o; } __rv; | |
3353 | __rv.__o = __builtin_mve_vld4qv8hi ((__builtin_neon_hi *) __addr); | |
3354 | return __rv.__i; | |
3355 | } | |
3356 | ||
3357 | __extension__ extern __inline void | |
3358 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3359 | __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
3360 | { | |
f54e31dd | 3361 | return __arm_vstrwq_p_u32 (__addr, __value, __p); |
1dfcc3b5 SP |
3362 | } |
3363 | ||
3364 | __extension__ extern __inline void | |
3365 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3366 | __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
3367 | { | |
f54e31dd | 3368 | return __arm_vstrwq_p_s32 (__addr, __value, __p); |
1dfcc3b5 SP |
3369 | } |
3370 | ||
3371 | __extension__ extern __inline void | |
3372 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3373 | __arm_vst2q_s32 (int32_t * __addr, int32x4x2_t __value) | |
3374 | { | |
3375 | union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv; | |
3376 | __rv.__i = __value; | |
3377 | __builtin_mve_vst2qv4si ((__builtin_neon_si *) __addr, __rv.__o); | |
3378 | } | |
3379 | ||
3380 | __extension__ extern __inline void | |
3381 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3382 | __arm_vst2q_u32 (uint32_t * __addr, uint32x4x2_t __value) | |
3383 | { | |
3384 | union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv; | |
3385 | __rv.__i = __value; | |
3386 | __builtin_mve_vst2qv4si ((__builtin_neon_si *) __addr, __rv.__o); | |
3387 | } | |
3388 | ||
3389 | __extension__ extern __inline uint32x4_t | |
3390 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3391 | __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p) | |
3392 | { | |
f54e31dd | 3393 | return __arm_vldrwq_z_u32 ( __base, __p); |
1dfcc3b5 SP |
3394 | } |
3395 | ||
3396 | __extension__ extern __inline int32x4_t | |
3397 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3398 | __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p) | |
3399 | { | |
f54e31dd | 3400 | return __arm_vldrwq_z_s32 ( __base, __p); |
1dfcc3b5 SP |
3401 | } |
3402 | ||
3403 | __extension__ extern __inline int32x4x2_t | |
3404 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3405 | __arm_vld2q_s32 (int32_t const * __addr) | |
3406 | { | |
3407 | union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv; | |
3408 | __rv.__o = __builtin_mve_vld2qv4si ((__builtin_neon_si *) __addr); | |
3409 | return __rv.__i; | |
3410 | } | |
3411 | ||
3412 | __extension__ extern __inline uint32x4x2_t | |
3413 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3414 | __arm_vld2q_u32 (uint32_t const * __addr) | |
3415 | { | |
3416 | union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv; | |
3417 | __rv.__o = __builtin_mve_vld2qv4si ((__builtin_neon_si *) __addr); | |
3418 | return __rv.__i; | |
3419 | } | |
3420 | ||
3421 | __extension__ extern __inline int32x4x4_t | |
3422 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3423 | __arm_vld4q_s32 (int32_t const * __addr) | |
3424 | { | |
3425 | union { int32x4x4_t __i; __builtin_neon_xi __o; } __rv; | |
3426 | __rv.__o = __builtin_mve_vld4qv4si ((__builtin_neon_si *) __addr); | |
3427 | return __rv.__i; | |
3428 | } | |
3429 | ||
3430 | __extension__ extern __inline uint32x4x4_t | |
3431 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3432 | __arm_vld4q_u32 (uint32_t const * __addr) | |
3433 | { | |
3434 | union { uint32x4x4_t __i; __builtin_neon_xi __o; } __rv; | |
3435 | __rv.__o = __builtin_mve_vld4qv4si ((__builtin_neon_si *) __addr); | |
3436 | return __rv.__i; | |
3437 | } | |
3438 | ||
1a5c27b1 SP |
3439 | __extension__ extern __inline int16x8_t |
3440 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3441 | __arm_vsetq_lane_s16 (int16_t __a, int16x8_t __b, const int __idx) | |
3442 | { | |
3443 | __ARM_CHECK_LANEQ (__b, __idx); | |
3444 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3445 | return __b; | |
3446 | } | |
3447 | ||
3448 | __extension__ extern __inline int32x4_t | |
3449 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3450 | __arm_vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __idx) | |
3451 | { | |
3452 | __ARM_CHECK_LANEQ (__b, __idx); | |
3453 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3454 | return __b; | |
3455 | } | |
3456 | ||
3457 | __extension__ extern __inline int8x16_t | |
3458 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3459 | __arm_vsetq_lane_s8 (int8_t __a, int8x16_t __b, const int __idx) | |
3460 | { | |
3461 | __ARM_CHECK_LANEQ (__b, __idx); | |
3462 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3463 | return __b; | |
3464 | } | |
3465 | ||
3466 | __extension__ extern __inline int64x2_t | |
3467 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3468 | __arm_vsetq_lane_s64 (int64_t __a, int64x2_t __b, const int __idx) | |
3469 | { | |
3470 | __ARM_CHECK_LANEQ (__b, __idx); | |
3471 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3472 | return __b; | |
3473 | } | |
3474 | ||
3475 | __extension__ extern __inline uint8x16_t | |
3476 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3477 | __arm_vsetq_lane_u8 (uint8_t __a, uint8x16_t __b, const int __idx) | |
3478 | { | |
3479 | __ARM_CHECK_LANEQ (__b, __idx); | |
3480 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3481 | return __b; | |
3482 | } | |
3483 | ||
3484 | __extension__ extern __inline uint16x8_t | |
3485 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3486 | __arm_vsetq_lane_u16 (uint16_t __a, uint16x8_t __b, const int __idx) | |
3487 | { | |
3488 | __ARM_CHECK_LANEQ (__b, __idx); | |
3489 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3490 | return __b; | |
3491 | } | |
3492 | ||
3493 | __extension__ extern __inline uint32x4_t | |
3494 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3495 | __arm_vsetq_lane_u32 (uint32_t __a, uint32x4_t __b, const int __idx) | |
3496 | { | |
3497 | __ARM_CHECK_LANEQ (__b, __idx); | |
3498 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3499 | return __b; | |
3500 | } | |
3501 | ||
3502 | __extension__ extern __inline uint64x2_t | |
3503 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3504 | __arm_vsetq_lane_u64 (uint64_t __a, uint64x2_t __b, const int __idx) | |
3505 | { | |
3506 | __ARM_CHECK_LANEQ (__b, __idx); | |
3507 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
3508 | return __b; | |
3509 | } | |
3510 | ||
3511 | __extension__ extern __inline int16_t | |
3512 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3513 | __arm_vgetq_lane_s16 (int16x8_t __a, const int __idx) | |
3514 | { | |
3515 | __ARM_CHECK_LANEQ (__a, __idx); | |
3516 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3517 | } | |
3518 | ||
3519 | __extension__ extern __inline int32_t | |
3520 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3521 | __arm_vgetq_lane_s32 (int32x4_t __a, const int __idx) | |
3522 | { | |
3523 | __ARM_CHECK_LANEQ (__a, __idx); | |
3524 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3525 | } | |
3526 | ||
3527 | __extension__ extern __inline int8_t | |
3528 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3529 | __arm_vgetq_lane_s8 (int8x16_t __a, const int __idx) | |
3530 | { | |
3531 | __ARM_CHECK_LANEQ (__a, __idx); | |
3532 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3533 | } | |
3534 | ||
3535 | __extension__ extern __inline int64_t | |
3536 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3537 | __arm_vgetq_lane_s64 (int64x2_t __a, const int __idx) | |
3538 | { | |
3539 | __ARM_CHECK_LANEQ (__a, __idx); | |
3540 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3541 | } | |
3542 | ||
3543 | __extension__ extern __inline uint8_t | |
3544 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3545 | __arm_vgetq_lane_u8 (uint8x16_t __a, const int __idx) | |
3546 | { | |
3547 | __ARM_CHECK_LANEQ (__a, __idx); | |
3548 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3549 | } | |
3550 | ||
3551 | __extension__ extern __inline uint16_t | |
3552 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3553 | __arm_vgetq_lane_u16 (uint16x8_t __a, const int __idx) | |
3554 | { | |
3555 | __ARM_CHECK_LANEQ (__a, __idx); | |
3556 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3557 | } | |
3558 | ||
3559 | __extension__ extern __inline uint32_t | |
3560 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3561 | __arm_vgetq_lane_u32 (uint32x4_t __a, const int __idx) | |
3562 | { | |
3563 | __ARM_CHECK_LANEQ (__a, __idx); | |
3564 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3565 | } | |
3566 | ||
3567 | __extension__ extern __inline uint64_t | |
3568 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3569 | __arm_vgetq_lane_u64 (uint64x2_t __a, const int __idx) | |
3570 | { | |
3571 | __ARM_CHECK_LANEQ (__a, __idx); | |
3572 | return __a[__ARM_LANEQ(__a,__idx)]; | |
3573 | } | |
3574 | ||
85244449 SP |
3575 | __extension__ extern __inline uint64_t |
3576 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3577 | __arm_lsll (uint64_t value, int32_t shift) | |
3578 | { | |
3579 | return (value << shift); | |
3580 | } | |
3581 | ||
3582 | __extension__ extern __inline int64_t | |
3583 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3584 | __arm_asrl (int64_t value, int32_t shift) | |
3585 | { | |
3586 | return (value >> shift); | |
3587 | } | |
3588 | ||
3589 | __extension__ extern __inline uint64_t | |
3590 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3591 | __arm_uqrshll (uint64_t value, int32_t shift) | |
3592 | { | |
3593 | return __builtin_mve_uqrshll_sat64_di (value, shift); | |
3594 | } | |
3595 | ||
3596 | __extension__ extern __inline uint64_t | |
3597 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3598 | __arm_uqrshll_sat48 (uint64_t value, int32_t shift) | |
3599 | { | |
3600 | return __builtin_mve_uqrshll_sat48_di (value, shift); | |
3601 | } | |
3602 | ||
3603 | __extension__ extern __inline int64_t | |
3604 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3605 | __arm_sqrshrl (int64_t value, int32_t shift) | |
3606 | { | |
3607 | return __builtin_mve_sqrshrl_sat64_di (value, shift); | |
3608 | } | |
3609 | ||
3610 | __extension__ extern __inline int64_t | |
3611 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3612 | __arm_sqrshrl_sat48 (int64_t value, int32_t shift) | |
3613 | { | |
3614 | return __builtin_mve_sqrshrl_sat48_di (value, shift); | |
3615 | } | |
3616 | ||
3617 | __extension__ extern __inline uint64_t | |
3618 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3619 | __arm_uqshll (uint64_t value, const int shift) | |
3620 | { | |
3621 | return __builtin_mve_uqshll_di (value, shift); | |
3622 | } | |
3623 | ||
3624 | __extension__ extern __inline uint64_t | |
3625 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3626 | __arm_urshrl (uint64_t value, const int shift) | |
3627 | { | |
3628 | return __builtin_mve_urshrl_di (value, shift); | |
3629 | } | |
3630 | ||
3631 | __extension__ extern __inline int64_t | |
3632 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3633 | __arm_srshrl (int64_t value, const int shift) | |
3634 | { | |
3635 | return __builtin_mve_srshrl_di (value, shift); | |
3636 | } | |
3637 | ||
3638 | __extension__ extern __inline int64_t | |
3639 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3640 | __arm_sqshll (int64_t value, const int shift) | |
3641 | { | |
3642 | return __builtin_mve_sqshll_di (value, shift); | |
3643 | } | |
3644 | ||
3645 | __extension__ extern __inline uint32_t | |
3646 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3647 | __arm_uqrshl (uint32_t value, int32_t shift) | |
3648 | { | |
3649 | return __builtin_mve_uqrshl_si (value, shift); | |
3650 | } | |
3651 | ||
3652 | __extension__ extern __inline int32_t | |
3653 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3654 | __arm_sqrshr (int32_t value, int32_t shift) | |
3655 | { | |
3656 | return __builtin_mve_sqrshr_si (value, shift); | |
3657 | } | |
3658 | ||
3659 | __extension__ extern __inline uint32_t | |
3660 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3661 | __arm_uqshl (uint32_t value, const int shift) | |
3662 | { | |
3663 | return __builtin_mve_uqshl_si (value, shift); | |
3664 | } | |
3665 | ||
3666 | __extension__ extern __inline uint32_t | |
3667 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3668 | __arm_urshr (uint32_t value, const int shift) | |
3669 | { | |
3670 | return __builtin_mve_urshr_si (value, shift); | |
3671 | } | |
3672 | ||
3673 | __extension__ extern __inline int32_t | |
3674 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3675 | __arm_sqshl (int32_t value, const int shift) | |
3676 | { | |
3677 | return __builtin_mve_sqshl_si (value, shift); | |
3678 | } | |
3679 | ||
3680 | __extension__ extern __inline int32_t | |
3681 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3682 | __arm_srshr (int32_t value, const int shift) | |
3683 | { | |
3684 | return __builtin_mve_srshr_si (value, shift); | |
3685 | } | |
3686 | ||
88c9a831 SP |
3687 | __extension__ extern __inline int8x16_t |
3688 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3689 | __arm_vshlcq_m_s8 (int8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
3690 | { | |
3691 | int8x16_t __res = __builtin_mve_vshlcq_m_vec_sv16qi (__a, *__b, __imm, __p); | |
3692 | *__b = __builtin_mve_vshlcq_m_carry_sv16qi (__a, *__b, __imm, __p); | |
3693 | return __res; | |
3694 | } | |
3695 | ||
3696 | __extension__ extern __inline uint8x16_t | |
3697 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3698 | __arm_vshlcq_m_u8 (uint8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
3699 | { | |
3700 | uint8x16_t __res = __builtin_mve_vshlcq_m_vec_uv16qi (__a, *__b, __imm, __p); | |
3701 | *__b = __builtin_mve_vshlcq_m_carry_uv16qi (__a, *__b, __imm, __p); | |
3702 | return __res; | |
3703 | } | |
3704 | ||
3705 | __extension__ extern __inline int16x8_t | |
3706 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3707 | __arm_vshlcq_m_s16 (int16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
3708 | { | |
3709 | int16x8_t __res = __builtin_mve_vshlcq_m_vec_sv8hi (__a, *__b, __imm, __p); | |
3710 | *__b = __builtin_mve_vshlcq_m_carry_sv8hi (__a, *__b, __imm, __p); | |
3711 | return __res; | |
3712 | } | |
3713 | ||
3714 | __extension__ extern __inline uint16x8_t | |
3715 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3716 | __arm_vshlcq_m_u16 (uint16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
3717 | { | |
3718 | uint16x8_t __res = __builtin_mve_vshlcq_m_vec_uv8hi (__a, *__b, __imm, __p); | |
3719 | *__b = __builtin_mve_vshlcq_m_carry_uv8hi (__a, *__b, __imm, __p); | |
3720 | return __res; | |
3721 | } | |
3722 | ||
3723 | __extension__ extern __inline int32x4_t | |
3724 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3725 | __arm_vshlcq_m_s32 (int32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
3726 | { | |
3727 | int32x4_t __res = __builtin_mve_vshlcq_m_vec_sv4si (__a, *__b, __imm, __p); | |
3728 | *__b = __builtin_mve_vshlcq_m_carry_sv4si (__a, *__b, __imm, __p); | |
3729 | return __res; | |
3730 | } | |
3731 | ||
3732 | __extension__ extern __inline uint32x4_t | |
3733 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3734 | __arm_vshlcq_m_u32 (uint32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
3735 | { | |
3736 | uint32x4_t __res = __builtin_mve_vshlcq_m_vec_uv4si (__a, *__b, __imm, __p); | |
3737 | *__b = __builtin_mve_vshlcq_m_carry_uv4si (__a, *__b, __imm, __p); | |
3738 | return __res; | |
3739 | } | |
3740 | ||
261014a1 SP |
3741 | #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ |
3742 | ||
3743 | __extension__ extern __inline void | |
3744 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3745 | __arm_vst4q_f16 (float16_t * __addr, float16x8x4_t __value) | |
3746 | { | |
3747 | union { float16x8x4_t __i; __builtin_neon_xi __o; } __rv; | |
3748 | __rv.__i = __value; | |
3749 | __builtin_mve_vst4qv8hf (__addr, __rv.__o); | |
3750 | } | |
3751 | ||
3752 | __extension__ extern __inline void | |
3753 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3754 | __arm_vst4q_f32 (float32_t * __addr, float32x4x4_t __value) | |
3755 | { | |
3756 | union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv; | |
3757 | __rv.__i = __value; | |
3758 | __builtin_mve_vst4qv4sf (__addr, __rv.__o); | |
3759 | } | |
3760 | ||
532e9e24 SP |
3761 | __extension__ extern __inline float32x4_t |
3762 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 SP |
3763 | __arm_vcvttq_f32_f16 (float16x8_t __a) |
3764 | { | |
3765 | return __builtin_mve_vcvttq_f32_f16v4sf (__a); | |
3766 | } | |
3767 | ||
3768 | __extension__ extern __inline float32x4_t | |
3769 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3770 | __arm_vcvtbq_f32_f16 (float16x8_t __a) | |
3771 | { | |
3772 | return __builtin_mve_vcvtbq_f32_f16v4sf (__a); | |
3773 | } | |
3774 | ||
3775 | __extension__ extern __inline float16x8_t | |
3776 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3777 | __arm_vcvtq_f16_s16 (int16x8_t __a) | |
3778 | { | |
3779 | return __builtin_mve_vcvtq_to_f_sv8hf (__a); | |
3780 | } | |
3781 | ||
3782 | __extension__ extern __inline float32x4_t | |
3783 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3784 | __arm_vcvtq_f32_s32 (int32x4_t __a) | |
3785 | { | |
3786 | return __builtin_mve_vcvtq_to_f_sv4sf (__a); | |
3787 | } | |
3788 | ||
3789 | __extension__ extern __inline float16x8_t | |
3790 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3791 | __arm_vcvtq_f16_u16 (uint16x8_t __a) | |
3792 | { | |
3793 | return __builtin_mve_vcvtq_to_f_uv8hf (__a); | |
3794 | } | |
3795 | ||
3796 | __extension__ extern __inline float32x4_t | |
3797 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3798 | __arm_vcvtq_f32_u32 (uint32x4_t __a) | |
3799 | { | |
3800 | return __builtin_mve_vcvtq_to_f_uv4sf (__a); | |
3801 | } | |
3802 | ||
3803 | __extension__ extern __inline int16x8_t | |
3804 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3805 | __arm_vcvtq_s16_f16 (float16x8_t __a) | |
3806 | { | |
3807 | return __builtin_mve_vcvtq_from_f_sv8hi (__a); | |
3808 | } | |
3809 | ||
3810 | __extension__ extern __inline int32x4_t | |
3811 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3812 | __arm_vcvtq_s32_f32 (float32x4_t __a) | |
3813 | { | |
3814 | return __builtin_mve_vcvtq_from_f_sv4si (__a); | |
3815 | } | |
3816 | ||
3817 | __extension__ extern __inline uint16x8_t | |
3818 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3819 | __arm_vcvtq_u16_f16 (float16x8_t __a) | |
3820 | { | |
3821 | return __builtin_mve_vcvtq_from_f_uv8hi (__a); | |
3822 | } | |
3823 | ||
3824 | __extension__ extern __inline uint32x4_t | |
3825 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3826 | __arm_vcvtq_u32_f32 (float32x4_t __a) | |
3827 | { | |
3828 | return __builtin_mve_vcvtq_from_f_uv4si (__a); | |
3829 | } | |
3830 | ||
3831 | __extension__ extern __inline uint16x8_t | |
3832 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3833 | __arm_vcvtpq_u16_f16 (float16x8_t __a) | |
3834 | { | |
3835 | return __builtin_mve_vcvtpq_uv8hi (__a); | |
3836 | } | |
3837 | ||
3838 | __extension__ extern __inline uint32x4_t | |
3839 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3840 | __arm_vcvtpq_u32_f32 (float32x4_t __a) | |
3841 | { | |
3842 | return __builtin_mve_vcvtpq_uv4si (__a); | |
3843 | } | |
3844 | ||
3845 | __extension__ extern __inline uint16x8_t | |
3846 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3847 | __arm_vcvtnq_u16_f16 (float16x8_t __a) | |
3848 | { | |
3849 | return __builtin_mve_vcvtnq_uv8hi (__a); | |
3850 | } | |
3851 | ||
5a448362 CL |
3852 | __extension__ extern __inline uint32x4_t |
3853 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3854 | __arm_vcvtnq_u32_f32 (float32x4_t __a) | |
3855 | { | |
3856 | return __builtin_mve_vcvtnq_uv4si (__a); | |
3857 | } | |
3858 | ||
261014a1 SP |
3859 | __extension__ extern __inline uint16x8_t |
3860 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3861 | __arm_vcvtmq_u16_f16 (float16x8_t __a) | |
3862 | { | |
3863 | return __builtin_mve_vcvtmq_uv8hi (__a); | |
3864 | } | |
3865 | ||
3866 | __extension__ extern __inline uint32x4_t | |
3867 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3868 | __arm_vcvtmq_u32_f32 (float32x4_t __a) | |
3869 | { | |
3870 | return __builtin_mve_vcvtmq_uv4si (__a); | |
3871 | } | |
3872 | ||
3873 | __extension__ extern __inline uint16x8_t | |
3874 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3875 | __arm_vcvtaq_u16_f16 (float16x8_t __a) | |
3876 | { | |
3877 | return __builtin_mve_vcvtaq_uv8hi (__a); | |
3878 | } | |
3879 | ||
3880 | __extension__ extern __inline uint32x4_t | |
3881 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3882 | __arm_vcvtaq_u32_f32 (float32x4_t __a) | |
3883 | { | |
3884 | return __builtin_mve_vcvtaq_uv4si (__a); | |
3885 | } | |
3886 | ||
3887 | __extension__ extern __inline int16x8_t | |
3888 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3889 | __arm_vcvtaq_s16_f16 (float16x8_t __a) | |
3890 | { | |
3891 | return __builtin_mve_vcvtaq_sv8hi (__a); | |
3892 | } | |
3893 | ||
3894 | __extension__ extern __inline int32x4_t | |
3895 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3896 | __arm_vcvtaq_s32_f32 (float32x4_t __a) | |
3897 | { | |
3898 | return __builtin_mve_vcvtaq_sv4si (__a); | |
3899 | } | |
3900 | ||
3901 | __extension__ extern __inline int16x8_t | |
3902 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3903 | __arm_vcvtnq_s16_f16 (float16x8_t __a) | |
3904 | { | |
3905 | return __builtin_mve_vcvtnq_sv8hi (__a); | |
3906 | } | |
3907 | ||
3908 | __extension__ extern __inline int32x4_t | |
3909 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3910 | __arm_vcvtnq_s32_f32 (float32x4_t __a) | |
3911 | { | |
3912 | return __builtin_mve_vcvtnq_sv4si (__a); | |
3913 | } | |
3914 | ||
3915 | __extension__ extern __inline int16x8_t | |
3916 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3917 | __arm_vcvtpq_s16_f16 (float16x8_t __a) | |
3918 | { | |
3919 | return __builtin_mve_vcvtpq_sv8hi (__a); | |
3920 | } | |
3921 | ||
3922 | __extension__ extern __inline int32x4_t | |
3923 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3924 | __arm_vcvtpq_s32_f32 (float32x4_t __a) | |
3925 | { | |
3926 | return __builtin_mve_vcvtpq_sv4si (__a); | |
3927 | } | |
3928 | ||
3929 | __extension__ extern __inline int16x8_t | |
3930 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3931 | __arm_vcvtmq_s16_f16 (float16x8_t __a) | |
3932 | { | |
3933 | return __builtin_mve_vcvtmq_sv8hi (__a); | |
3934 | } | |
3935 | ||
3936 | __extension__ extern __inline int32x4_t | |
3937 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3938 | __arm_vcvtmq_s32_f32 (float32x4_t __a) | |
3939 | { | |
3940 | return __builtin_mve_vcvtmq_sv4si (__a); | |
3941 | } | |
3942 | ||
261014a1 SP |
3943 | __extension__ extern __inline float16x8_t |
3944 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3945 | __arm_vcvtq_n_f16_s16 (int16x8_t __a, const int __imm6) | |
3946 | { | |
3947 | return __builtin_mve_vcvtq_n_to_f_sv8hf (__a, __imm6); | |
3948 | } | |
3949 | ||
3950 | __extension__ extern __inline float32x4_t | |
3951 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3952 | __arm_vcvtq_n_f32_s32 (int32x4_t __a, const int __imm6) | |
3953 | { | |
3954 | return __builtin_mve_vcvtq_n_to_f_sv4sf (__a, __imm6); | |
3955 | } | |
3956 | ||
3957 | __extension__ extern __inline float16x8_t | |
3958 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3959 | __arm_vcvtq_n_f16_u16 (uint16x8_t __a, const int __imm6) | |
3960 | { | |
3961 | return __builtin_mve_vcvtq_n_to_f_uv8hf (__a, __imm6); | |
3962 | } | |
3963 | ||
3964 | __extension__ extern __inline float32x4_t | |
3965 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3966 | __arm_vcvtq_n_f32_u32 (uint32x4_t __a, const int __imm6) | |
3967 | { | |
3968 | return __builtin_mve_vcvtq_n_to_f_uv4sf (__a, __imm6); | |
3969 | } | |
3970 | ||
261014a1 SP |
3971 | __extension__ extern __inline int16x8_t |
3972 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3973 | __arm_vcvtq_n_s16_f16 (float16x8_t __a, const int __imm6) | |
3974 | { | |
3975 | return __builtin_mve_vcvtq_n_from_f_sv8hi (__a, __imm6); | |
3976 | } | |
3977 | ||
3978 | __extension__ extern __inline int32x4_t | |
3979 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3980 | __arm_vcvtq_n_s32_f32 (float32x4_t __a, const int __imm6) | |
3981 | { | |
3982 | return __builtin_mve_vcvtq_n_from_f_sv4si (__a, __imm6); | |
3983 | } | |
3984 | ||
3985 | __extension__ extern __inline uint16x8_t | |
3986 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3987 | __arm_vcvtq_n_u16_f16 (float16x8_t __a, const int __imm6) | |
3988 | { | |
3989 | return __builtin_mve_vcvtq_n_from_f_uv8hi (__a, __imm6); | |
3990 | } | |
3991 | ||
3992 | __extension__ extern __inline uint32x4_t | |
3993 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
3994 | __arm_vcvtq_n_u32_f32 (float32x4_t __a, const int __imm6) | |
3995 | { | |
3996 | return __builtin_mve_vcvtq_n_from_f_uv4si (__a, __imm6); | |
3997 | } | |
3998 | ||
7674ae25 | 3999 | __extension__ extern __inline float16x8_t |
261014a1 | 4000 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 4001 | __arm_vornq_f16 (float16x8_t __a, float16x8_t __b) |
261014a1 | 4002 | { |
7674ae25 | 4003 | return __builtin_mve_vornq_fv8hf (__a, __b); |
261014a1 SP |
4004 | } |
4005 | ||
261014a1 SP |
4006 | __extension__ extern __inline float16x8_t |
4007 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4008 | __arm_vbicq_f16 (float16x8_t __a, float16x8_t __b) | |
4009 | { | |
4010 | return __builtin_mve_vbicq_fv8hf (__a, __b); | |
4011 | } | |
4012 | ||
261014a1 SP |
4013 | __extension__ extern __inline float32x4_t |
4014 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4015 | __arm_vornq_f32 (float32x4_t __a, float32x4_t __b) | |
4016 | { | |
4017 | return __builtin_mve_vornq_fv4sf (__a, __b); | |
4018 | } | |
4019 | ||
261014a1 SP |
4020 | __extension__ extern __inline float32x4_t |
4021 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4022 | __arm_vbicq_f32 (float32x4_t __a, float32x4_t __b) | |
4023 | { | |
4024 | return __builtin_mve_vbicq_fv4sf (__a, __b); | |
4025 | } | |
4026 | ||
261014a1 SP |
4027 | __extension__ extern __inline float16x8_t |
4028 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4029 | __arm_vcvttq_f16_f32 (float16x8_t __a, float32x4_t __b) | |
4030 | { | |
4031 | return __builtin_mve_vcvttq_f16_f32v8hf (__a, __b); | |
4032 | } | |
4033 | ||
4034 | __extension__ extern __inline float16x8_t | |
4035 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4036 | __arm_vcvtbq_f16_f32 (float16x8_t __a, float32x4_t __b) | |
4037 | { | |
4038 | return __builtin_mve_vcvtbq_f16_f32v8hf (__a, __b); | |
4039 | } | |
4040 | ||
261014a1 SP |
4041 | __extension__ extern __inline int16x8_t |
4042 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4043 | __arm_vcvtaq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4044 | { | |
4045 | return __builtin_mve_vcvtaq_m_sv8hi (__inactive, __a, __p); | |
4046 | } | |
4047 | ||
4048 | __extension__ extern __inline uint16x8_t | |
4049 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4050 | __arm_vcvtaq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4051 | { | |
4052 | return __builtin_mve_vcvtaq_m_uv8hi (__inactive, __a, __p); | |
4053 | } | |
4054 | ||
4055 | __extension__ extern __inline int32x4_t | |
4056 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4057 | __arm_vcvtaq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4058 | { | |
4059 | return __builtin_mve_vcvtaq_m_sv4si (__inactive, __a, __p); | |
4060 | } | |
4061 | ||
4062 | __extension__ extern __inline uint32x4_t | |
4063 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4064 | __arm_vcvtaq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4065 | { | |
4066 | return __builtin_mve_vcvtaq_m_uv4si (__inactive, __a, __p); | |
4067 | } | |
4068 | ||
4069 | __extension__ extern __inline float16x8_t | |
4070 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4071 | __arm_vcvtq_m_f16_s16 (float16x8_t __inactive, int16x8_t __a, mve_pred16_t __p) | |
4072 | { | |
4073 | return __builtin_mve_vcvtq_m_to_f_sv8hf (__inactive, __a, __p); | |
4074 | } | |
4075 | ||
4076 | __extension__ extern __inline float16x8_t | |
4077 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4078 | __arm_vcvtq_m_f16_u16 (float16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p) | |
4079 | { | |
4080 | return __builtin_mve_vcvtq_m_to_f_uv8hf (__inactive, __a, __p); | |
4081 | } | |
4082 | ||
4083 | __extension__ extern __inline float32x4_t | |
4084 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4085 | __arm_vcvtq_m_f32_s32 (float32x4_t __inactive, int32x4_t __a, mve_pred16_t __p) | |
4086 | { | |
4087 | return __builtin_mve_vcvtq_m_to_f_sv4sf (__inactive, __a, __p); | |
4088 | } | |
4089 | ||
4090 | __extension__ extern __inline float32x4_t | |
4091 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4092 | __arm_vcvtq_m_f32_u32 (float32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p) | |
4093 | { | |
4094 | return __builtin_mve_vcvtq_m_to_f_uv4sf (__inactive, __a, __p); | |
4095 | } | |
4096 | ||
4097 | ||
4098 | __extension__ extern __inline float16x8_t | |
4099 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4100 | __arm_vcvtbq_m_f16_f32 (float16x8_t __a, float32x4_t __b, mve_pred16_t __p) | |
4101 | { | |
4102 | return __builtin_mve_vcvtbq_m_f16_f32v8hf (__a, __b, __p); | |
4103 | } | |
4104 | ||
4105 | __extension__ extern __inline float32x4_t | |
4106 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4107 | __arm_vcvtbq_m_f32_f16 (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4108 | { | |
4109 | return __builtin_mve_vcvtbq_m_f32_f16v4sf (__inactive, __a, __p); | |
4110 | } | |
4111 | ||
4112 | __extension__ extern __inline float16x8_t | |
4113 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4114 | __arm_vcvttq_m_f16_f32 (float16x8_t __a, float32x4_t __b, mve_pred16_t __p) | |
4115 | { | |
4116 | return __builtin_mve_vcvttq_m_f16_f32v8hf (__a, __b, __p); | |
4117 | } | |
4118 | ||
4119 | __extension__ extern __inline float32x4_t | |
4120 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4121 | __arm_vcvttq_m_f32_f16 (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4122 | { | |
4123 | return __builtin_mve_vcvttq_m_f32_f16v4sf (__inactive, __a, __p); | |
4124 | } | |
4125 | ||
261014a1 SP |
4126 | __extension__ extern __inline int16x8_t |
4127 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4128 | __arm_vcvtmq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4129 | { | |
4130 | return __builtin_mve_vcvtmq_m_sv8hi (__inactive, __a, __p); | |
4131 | } | |
4132 | ||
4133 | __extension__ extern __inline int16x8_t | |
4134 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4135 | __arm_vcvtnq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4136 | { | |
4137 | return __builtin_mve_vcvtnq_m_sv8hi (__inactive, __a, __p); | |
4138 | } | |
4139 | ||
4140 | __extension__ extern __inline int16x8_t | |
4141 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4142 | __arm_vcvtpq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4143 | { | |
4144 | return __builtin_mve_vcvtpq_m_sv8hi (__inactive, __a, __p); | |
4145 | } | |
4146 | ||
4147 | __extension__ extern __inline int16x8_t | |
4148 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4149 | __arm_vcvtq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4150 | { | |
4151 | return __builtin_mve_vcvtq_m_from_f_sv8hi (__inactive, __a, __p); | |
4152 | } | |
4153 | ||
261014a1 SP |
4154 | __extension__ extern __inline uint16x8_t |
4155 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4156 | __arm_vcvtmq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4157 | { | |
4158 | return __builtin_mve_vcvtmq_m_uv8hi (__inactive, __a, __p); | |
4159 | } | |
4160 | ||
4161 | __extension__ extern __inline uint16x8_t | |
4162 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4163 | __arm_vcvtnq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4164 | { | |
4165 | return __builtin_mve_vcvtnq_m_uv8hi (__inactive, __a, __p); | |
4166 | } | |
4167 | ||
4168 | __extension__ extern __inline uint16x8_t | |
4169 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4170 | __arm_vcvtpq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4171 | { | |
4172 | return __builtin_mve_vcvtpq_m_uv8hi (__inactive, __a, __p); | |
4173 | } | |
4174 | ||
4175 | __extension__ extern __inline uint16x8_t | |
4176 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4177 | __arm_vcvtq_m_u16_f16 (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
4178 | { | |
4179 | return __builtin_mve_vcvtq_m_from_f_uv8hi (__inactive, __a, __p); | |
4180 | } | |
4181 | ||
261014a1 SP |
4182 | __extension__ extern __inline int32x4_t |
4183 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4184 | __arm_vcvtmq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4185 | { | |
4186 | return __builtin_mve_vcvtmq_m_sv4si (__inactive, __a, __p); | |
4187 | } | |
4188 | ||
4189 | __extension__ extern __inline int32x4_t | |
4190 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4191 | __arm_vcvtnq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4192 | { | |
4193 | return __builtin_mve_vcvtnq_m_sv4si (__inactive, __a, __p); | |
4194 | } | |
4195 | ||
4196 | __extension__ extern __inline int32x4_t | |
4197 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4198 | __arm_vcvtpq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4199 | { | |
4200 | return __builtin_mve_vcvtpq_m_sv4si (__inactive, __a, __p); | |
4201 | } | |
4202 | ||
4203 | __extension__ extern __inline int32x4_t | |
4204 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4205 | __arm_vcvtq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4206 | { | |
4207 | return __builtin_mve_vcvtq_m_from_f_sv4si (__inactive, __a, __p); | |
4208 | } | |
4209 | ||
261014a1 SP |
4210 | __extension__ extern __inline uint32x4_t |
4211 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4212 | __arm_vcvtmq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4213 | { | |
4214 | return __builtin_mve_vcvtmq_m_uv4si (__inactive, __a, __p); | |
4215 | } | |
4216 | ||
4217 | __extension__ extern __inline uint32x4_t | |
4218 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4219 | __arm_vcvtnq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4220 | { | |
4221 | return __builtin_mve_vcvtnq_m_uv4si (__inactive, __a, __p); | |
4222 | } | |
4223 | ||
4224 | __extension__ extern __inline uint32x4_t | |
4225 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4226 | __arm_vcvtpq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4227 | { | |
4228 | return __builtin_mve_vcvtpq_m_uv4si (__inactive, __a, __p); | |
4229 | } | |
4230 | ||
4231 | __extension__ extern __inline uint32x4_t | |
4232 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4233 | __arm_vcvtq_m_u32_f32 (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
4234 | { | |
4235 | return __builtin_mve_vcvtq_m_from_f_uv4si (__inactive, __a, __p); | |
4236 | } | |
4237 | ||
4238 | __extension__ extern __inline float16x8_t | |
4239 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4240 | __arm_vcvtq_m_n_f16_u16 (float16x8_t __inactive, uint16x8_t __a, const int __imm6, mve_pred16_t __p) | |
4241 | { | |
4242 | return __builtin_mve_vcvtq_m_n_to_f_uv8hf (__inactive, __a, __imm6, __p); | |
4243 | } | |
4244 | ||
4245 | __extension__ extern __inline float16x8_t | |
4246 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4247 | __arm_vcvtq_m_n_f16_s16 (float16x8_t __inactive, int16x8_t __a, const int __imm6, mve_pred16_t __p) | |
4248 | { | |
4249 | return __builtin_mve_vcvtq_m_n_to_f_sv8hf (__inactive, __a, __imm6, __p); | |
4250 | } | |
4251 | ||
4252 | __extension__ extern __inline float32x4_t | |
4253 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4254 | __arm_vcvtq_m_n_f32_u32 (float32x4_t __inactive, uint32x4_t __a, const int __imm6, mve_pred16_t __p) | |
4255 | { | |
4256 | return __builtin_mve_vcvtq_m_n_to_f_uv4sf (__inactive, __a, __imm6, __p); | |
4257 | } | |
4258 | ||
4259 | __extension__ extern __inline float32x4_t | |
4260 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4261 | __arm_vcvtq_m_n_f32_s32 (float32x4_t __inactive, int32x4_t __a, const int __imm6, mve_pred16_t __p) | |
4262 | { | |
4263 | return __builtin_mve_vcvtq_m_n_to_f_sv4sf (__inactive, __a, __imm6, __p); | |
4264 | } | |
4265 | ||
261014a1 SP |
4266 | __extension__ extern __inline float32x4_t |
4267 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4268 | __arm_vbicq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p) | |
4269 | { | |
4270 | return __builtin_mve_vbicq_m_fv4sf (__inactive, __a, __b, __p); | |
4271 | } | |
4272 | ||
4273 | __extension__ extern __inline float16x8_t | |
4274 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4275 | __arm_vbicq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p) | |
4276 | { | |
4277 | return __builtin_mve_vbicq_m_fv8hf (__inactive, __a, __b, __p); | |
4278 | } | |
4279 | ||
261014a1 SP |
4280 | __extension__ extern __inline int32x4_t |
4281 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4282 | __arm_vcvtq_m_n_s32_f32 (int32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p) | |
4283 | { | |
4284 | return __builtin_mve_vcvtq_m_n_from_f_sv4si (__inactive, __a, __imm6, __p); | |
4285 | } | |
4286 | ||
4287 | __extension__ extern __inline int16x8_t | |
4288 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4289 | __arm_vcvtq_m_n_s16_f16 (int16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p) | |
4290 | { | |
4291 | return __builtin_mve_vcvtq_m_n_from_f_sv8hi (__inactive, __a, __imm6, __p); | |
4292 | } | |
4293 | ||
4294 | __extension__ extern __inline uint32x4_t | |
4295 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4296 | __arm_vcvtq_m_n_u32_f32 (uint32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p) | |
4297 | { | |
4298 | return __builtin_mve_vcvtq_m_n_from_f_uv4si (__inactive, __a, __imm6, __p); | |
4299 | } | |
4300 | ||
4301 | __extension__ extern __inline uint16x8_t | |
4302 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4303 | __arm_vcvtq_m_n_u16_f16 (uint16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p) | |
4304 | { | |
4305 | return __builtin_mve_vcvtq_m_n_from_f_uv8hi (__inactive, __a, __imm6, __p); | |
4306 | } | |
4307 | ||
261014a1 SP |
4308 | __extension__ extern __inline float32x4_t |
4309 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4310 | __arm_vornq_m_f32 (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p) | |
4311 | { | |
4312 | return __builtin_mve_vornq_m_fv4sf (__inactive, __a, __b, __p); | |
4313 | } | |
4314 | ||
4315 | __extension__ extern __inline float16x8_t | |
4316 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4317 | __arm_vornq_m_f16 (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p) | |
4318 | { | |
4319 | return __builtin_mve_vornq_m_fv8hf (__inactive, __a, __b, __p); | |
4320 | } | |
4321 | ||
261014a1 SP |
4322 | __extension__ extern __inline float32x4_t |
4323 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4324 | __arm_vldrwq_f32 (float32_t const * __base) | |
4325 | { | |
4326 | return __builtin_mve_vldrwq_fv4sf((__builtin_neon_si *) __base); | |
4327 | } | |
4328 | ||
4329 | __extension__ extern __inline float32x4_t | |
4330 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4331 | __arm_vldrwq_z_f32 (float32_t const * __base, mve_pred16_t __p) | |
4332 | { | |
4333 | return __builtin_mve_vldrwq_z_fv4sf((__builtin_neon_si *) __base, __p); | |
4334 | } | |
4335 | ||
4336 | __extension__ extern __inline float16x8_t | |
4337 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4338 | __arm_vldrhq_z_f16 (float16_t const * __base, mve_pred16_t __p) | |
4339 | { | |
4340 | return __builtin_mve_vldrhq_z_fv8hf((__builtin_neon_hi *) __base, __p); | |
4341 | } | |
4342 | ||
4343 | __extension__ extern __inline float16x8_t | |
4344 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4345 | __arm_vldrhq_f16 (float16_t const * __base) | |
4346 | { | |
4347 | return __builtin_mve_vldrhq_fv8hf((__builtin_neon_hi *) __base); | |
4348 | } | |
4349 | ||
4350 | __extension__ extern __inline float16x8_t | |
4351 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4352 | __arm_vldrhq_gather_offset_f16 (float16_t const * __base, uint16x8_t __offset) | |
4353 | { | |
4354 | return __builtin_mve_vldrhq_gather_offset_fv8hf((__builtin_neon_hi *) __base, __offset); | |
4355 | } | |
4356 | ||
4357 | __extension__ extern __inline float16x8_t | |
4358 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4359 | __arm_vldrhq_gather_offset_z_f16 (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
4360 | { | |
4361 | return __builtin_mve_vldrhq_gather_offset_z_fv8hf((__builtin_neon_hi *) __base, __offset, __p); | |
4362 | } | |
4363 | ||
4364 | __extension__ extern __inline float16x8_t | |
4365 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4366 | __arm_vldrhq_gather_shifted_offset_f16 (float16_t const * __base, uint16x8_t __offset) | |
4367 | { | |
ff0597dc | 4368 | return __builtin_mve_vldrhq_gather_shifted_offset_fv8hf ((__builtin_neon_hi *) __base, __offset); |
261014a1 SP |
4369 | } |
4370 | ||
4371 | __extension__ extern __inline float16x8_t | |
4372 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4373 | __arm_vldrhq_gather_shifted_offset_z_f16 (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
4374 | { | |
ff0597dc | 4375 | return __builtin_mve_vldrhq_gather_shifted_offset_z_fv8hf ((__builtin_neon_hi *) __base, __offset, __p); |
261014a1 SP |
4376 | } |
4377 | ||
4378 | __extension__ extern __inline float32x4_t | |
4379 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4380 | __arm_vldrwq_gather_base_f32 (uint32x4_t __addr, const int __offset) | |
4381 | { | |
4382 | return __builtin_mve_vldrwq_gather_base_fv4sf (__addr, __offset); | |
4383 | } | |
4384 | ||
4385 | __extension__ extern __inline float32x4_t | |
4386 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4387 | __arm_vldrwq_gather_base_z_f32 (uint32x4_t __addr, const int __offset, mve_pred16_t __p) | |
4388 | { | |
4389 | return __builtin_mve_vldrwq_gather_base_z_fv4sf (__addr, __offset, __p); | |
4390 | } | |
4391 | ||
4392 | __extension__ extern __inline float32x4_t | |
4393 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4394 | __arm_vldrwq_gather_offset_f32 (float32_t const * __base, uint32x4_t __offset) | |
4395 | { | |
4396 | return __builtin_mve_vldrwq_gather_offset_fv4sf((__builtin_neon_si *) __base, __offset); | |
4397 | } | |
4398 | ||
4399 | __extension__ extern __inline float32x4_t | |
4400 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4401 | __arm_vldrwq_gather_offset_z_f32 (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
4402 | { | |
4403 | return __builtin_mve_vldrwq_gather_offset_z_fv4sf((__builtin_neon_si *) __base, __offset, __p); | |
4404 | } | |
4405 | ||
4406 | __extension__ extern __inline float32x4_t | |
4407 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4408 | __arm_vldrwq_gather_shifted_offset_f32 (float32_t const * __base, uint32x4_t __offset) | |
4409 | { | |
ff0597dc | 4410 | return __builtin_mve_vldrwq_gather_shifted_offset_fv4sf ((__builtin_neon_si *) __base, __offset); |
261014a1 SP |
4411 | } |
4412 | ||
4413 | __extension__ extern __inline float32x4_t | |
4414 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4415 | __arm_vldrwq_gather_shifted_offset_z_f32 (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
4416 | { | |
ff0597dc | 4417 | return __builtin_mve_vldrwq_gather_shifted_offset_z_fv4sf ((__builtin_neon_si *) __base, __offset, __p); |
261014a1 SP |
4418 | } |
4419 | ||
4420 | __extension__ extern __inline void | |
4421 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4422 | __arm_vstrwq_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p) | |
4423 | { | |
ff0597dc | 4424 | __builtin_mve_vstrwq_p_fv4sf ((__builtin_neon_si *) __addr, __value, __p); |
261014a1 SP |
4425 | } |
4426 | ||
4427 | __extension__ extern __inline void | |
4428 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4429 | __arm_vstrwq_f32 (float32_t * __addr, float32x4_t __value) | |
4430 | { | |
ff0597dc | 4431 | __builtin_mve_vstrwq_fv4sf ((__builtin_neon_si *) __addr, __value); |
261014a1 SP |
4432 | } |
4433 | ||
261014a1 SP |
4434 | __extension__ extern __inline void |
4435 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4436 | __arm_vstrhq_f16 (float16_t * __addr, float16x8_t __value) | |
4437 | { | |
ff0597dc | 4438 | __builtin_mve_vstrhq_fv8hf ((__builtin_neon_hi *) __addr, __value); |
261014a1 SP |
4439 | } |
4440 | ||
4441 | __extension__ extern __inline void | |
4442 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4443 | __arm_vstrhq_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p) | |
4444 | { | |
ff0597dc | 4445 | __builtin_mve_vstrhq_p_fv8hf ((__builtin_neon_hi *) __addr, __value, __p); |
261014a1 SP |
4446 | } |
4447 | ||
4448 | __extension__ extern __inline void | |
4449 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4450 | __arm_vstrhq_scatter_offset_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value) | |
4451 | { | |
ff0597dc | 4452 | __builtin_mve_vstrhq_scatter_offset_fv8hf ((__builtin_neon_hi *) __base, __offset, __value); |
261014a1 SP |
4453 | } |
4454 | ||
4455 | __extension__ extern __inline void | |
4456 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4457 | __arm_vstrhq_scatter_offset_p_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p) | |
4458 | { | |
ff0597dc | 4459 | __builtin_mve_vstrhq_scatter_offset_p_fv8hf ((__builtin_neon_hi *) __base, __offset, __value, __p); |
261014a1 SP |
4460 | } |
4461 | ||
4462 | __extension__ extern __inline void | |
4463 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4464 | __arm_vstrhq_scatter_shifted_offset_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value) | |
4465 | { | |
ff0597dc | 4466 | __builtin_mve_vstrhq_scatter_shifted_offset_fv8hf ((__builtin_neon_hi *) __base, __offset, __value); |
261014a1 SP |
4467 | } |
4468 | ||
4469 | __extension__ extern __inline void | |
4470 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4471 | __arm_vstrhq_scatter_shifted_offset_p_f16 (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p) | |
4472 | { | |
ff0597dc | 4473 | __builtin_mve_vstrhq_scatter_shifted_offset_p_fv8hf ((__builtin_neon_hi *) __base, __offset, __value, __p); |
261014a1 SP |
4474 | } |
4475 | ||
4476 | __extension__ extern __inline void | |
4477 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4478 | __arm_vstrwq_scatter_base_f32 (uint32x4_t __addr, const int __offset, float32x4_t __value) | |
4479 | { | |
4480 | __builtin_mve_vstrwq_scatter_base_fv4sf (__addr, __offset, __value); | |
4481 | } | |
4482 | ||
4483 | __extension__ extern __inline void | |
4484 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4485 | __arm_vstrwq_scatter_base_p_f32 (uint32x4_t __addr, const int __offset, float32x4_t __value, mve_pred16_t __p) | |
4486 | { | |
4487 | __builtin_mve_vstrwq_scatter_base_p_fv4sf (__addr, __offset, __value, __p); | |
4488 | } | |
4489 | ||
4490 | __extension__ extern __inline void | |
4491 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4492 | __arm_vstrwq_scatter_offset_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value) | |
4493 | { | |
ff0597dc | 4494 | __builtin_mve_vstrwq_scatter_offset_fv4sf ((__builtin_neon_si *) __base, __offset, __value); |
261014a1 SP |
4495 | } |
4496 | ||
4497 | __extension__ extern __inline void | |
4498 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4499 | __arm_vstrwq_scatter_offset_p_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p) | |
4500 | { | |
ff0597dc | 4501 | __builtin_mve_vstrwq_scatter_offset_p_fv4sf ((__builtin_neon_si *) __base, __offset, __value, __p); |
261014a1 SP |
4502 | } |
4503 | ||
4504 | __extension__ extern __inline void | |
4505 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4506 | __arm_vstrwq_scatter_shifted_offset_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value) | |
4507 | { | |
ff0597dc | 4508 | __builtin_mve_vstrwq_scatter_shifted_offset_fv4sf ((__builtin_neon_si *) __base, __offset, __value); |
261014a1 SP |
4509 | } |
4510 | ||
4511 | __extension__ extern __inline void | |
4512 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4513 | __arm_vstrwq_scatter_shifted_offset_p_f32 (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p) | |
4514 | { | |
ff0597dc | 4515 | __builtin_mve_vstrwq_scatter_shifted_offset_p_fv4sf ((__builtin_neon_si *) __base, __offset, __value, __p); |
261014a1 SP |
4516 | } |
4517 | ||
261014a1 | 4518 | __extension__ extern __inline float32x4_t |
532e9e24 | 4519 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4520 | __arm_vldrwq_gather_base_wb_f32 (uint32x4_t * __addr, const int __offset) |
532e9e24 | 4521 | { |
261014a1 | 4522 | float32x4_t |
ff825b81 SP |
4523 | result = __builtin_mve_vldrwq_gather_base_nowb_fv4sf (*__addr, __offset); |
4524 | *__addr = __builtin_mve_vldrwq_gather_base_wb_fv4sf (*__addr, __offset); | |
261014a1 | 4525 | return result; |
532e9e24 SP |
4526 | } |
4527 | ||
4528 | __extension__ extern __inline float32x4_t | |
4529 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4530 | __arm_vldrwq_gather_base_wb_z_f32 (uint32x4_t * __addr, const int __offset, mve_pred16_t __p) |
532e9e24 | 4531 | { |
261014a1 | 4532 | float32x4_t |
ff825b81 SP |
4533 | result = __builtin_mve_vldrwq_gather_base_nowb_z_fv4sf (*__addr, __offset, __p); |
4534 | *__addr = __builtin_mve_vldrwq_gather_base_wb_z_fv4sf (*__addr, __offset, __p); | |
261014a1 | 4535 | return result; |
532e9e24 SP |
4536 | } |
4537 | ||
261014a1 | 4538 | __extension__ extern __inline void |
532e9e24 | 4539 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4540 | __arm_vstrwq_scatter_base_wb_f32 (uint32x4_t * __addr, const int __offset, float32x4_t __value) |
532e9e24 | 4541 | { |
37753588 | 4542 | *__addr = __builtin_mve_vstrwq_scatter_base_wb_fv4sf (*__addr, __offset, __value); |
532e9e24 SP |
4543 | } |
4544 | ||
261014a1 | 4545 | __extension__ extern __inline void |
532e9e24 | 4546 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4547 | __arm_vstrwq_scatter_base_wb_p_f32 (uint32x4_t * __addr, const int __offset, float32x4_t __value, mve_pred16_t __p) |
532e9e24 | 4548 | { |
37753588 | 4549 | *__addr = __builtin_mve_vstrwq_scatter_base_wb_p_fv4sf (*__addr, __offset, __value, __p); |
532e9e24 SP |
4550 | } |
4551 | ||
261014a1 | 4552 | __extension__ extern __inline int16x8_t |
4cc23303 | 4553 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4554 | __arm_vcvtaq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p) |
4cc23303 | 4555 | { |
c431634b | 4556 | return __builtin_mve_vcvtaq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p); |
4cc23303 SP |
4557 | } |
4558 | ||
261014a1 | 4559 | __extension__ extern __inline int32x4_t |
4cc23303 | 4560 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4561 | __arm_vcvtaq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p) |
4cc23303 | 4562 | { |
c431634b | 4563 | return __builtin_mve_vcvtaq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p); |
4cc23303 SP |
4564 | } |
4565 | ||
261014a1 | 4566 | __extension__ extern __inline uint16x8_t |
4cc23303 | 4567 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4568 | __arm_vcvtaq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p) |
4cc23303 | 4569 | { |
c431634b | 4570 | return __builtin_mve_vcvtaq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p); |
4cc23303 SP |
4571 | } |
4572 | ||
261014a1 | 4573 | __extension__ extern __inline uint32x4_t |
5cad47e0 | 4574 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4575 | __arm_vcvtaq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p) |
5cad47e0 | 4576 | { |
c431634b | 4577 | return __builtin_mve_vcvtaq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p); |
5cad47e0 SP |
4578 | } |
4579 | ||
261014a1 | 4580 | __extension__ extern __inline int16x8_t |
5cad47e0 | 4581 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4582 | __arm_vcvtnq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p) |
5cad47e0 | 4583 | { |
c431634b | 4584 | return __builtin_mve_vcvtnq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p); |
5cad47e0 SP |
4585 | } |
4586 | ||
261014a1 | 4587 | __extension__ extern __inline int32x4_t |
5cad47e0 | 4588 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4589 | __arm_vcvtnq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p) |
5cad47e0 | 4590 | { |
c431634b | 4591 | return __builtin_mve_vcvtnq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p); |
5cad47e0 SP |
4592 | } |
4593 | ||
261014a1 | 4594 | __extension__ extern __inline uint16x8_t |
5cad47e0 | 4595 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4596 | __arm_vcvtnq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p) |
5cad47e0 | 4597 | { |
c431634b | 4598 | return __builtin_mve_vcvtnq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p); |
5cad47e0 SP |
4599 | } |
4600 | ||
261014a1 | 4601 | __extension__ extern __inline uint32x4_t |
5cad47e0 | 4602 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4603 | __arm_vcvtnq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p) |
5cad47e0 | 4604 | { |
c431634b | 4605 | return __builtin_mve_vcvtnq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p); |
5cad47e0 SP |
4606 | } |
4607 | ||
261014a1 | 4608 | __extension__ extern __inline int16x8_t |
5cad47e0 | 4609 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4610 | __arm_vcvtpq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p) |
5cad47e0 | 4611 | { |
c431634b | 4612 | return __builtin_mve_vcvtpq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p); |
5cad47e0 SP |
4613 | } |
4614 | ||
261014a1 | 4615 | __extension__ extern __inline int32x4_t |
7a5fffa5 | 4616 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4617 | __arm_vcvtpq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p) |
7a5fffa5 | 4618 | { |
c431634b | 4619 | return __builtin_mve_vcvtpq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p); |
7a5fffa5 SP |
4620 | } |
4621 | ||
261014a1 | 4622 | __extension__ extern __inline uint16x8_t |
7a5fffa5 | 4623 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4624 | __arm_vcvtpq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p) |
7a5fffa5 | 4625 | { |
c431634b | 4626 | return __builtin_mve_vcvtpq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p); |
7a5fffa5 SP |
4627 | } |
4628 | ||
261014a1 | 4629 | __extension__ extern __inline uint32x4_t |
7a5fffa5 | 4630 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4631 | __arm_vcvtpq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p) |
7a5fffa5 | 4632 | { |
c431634b | 4633 | return __builtin_mve_vcvtpq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p); |
7a5fffa5 SP |
4634 | } |
4635 | ||
261014a1 | 4636 | __extension__ extern __inline int16x8_t |
7a5fffa5 | 4637 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4638 | __arm_vcvtmq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p) |
7a5fffa5 | 4639 | { |
c431634b | 4640 | return __builtin_mve_vcvtmq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p); |
7a5fffa5 SP |
4641 | } |
4642 | ||
261014a1 | 4643 | __extension__ extern __inline int32x4_t |
7a5fffa5 | 4644 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4645 | __arm_vcvtmq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p) |
7a5fffa5 | 4646 | { |
c431634b | 4647 | return __builtin_mve_vcvtmq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p); |
7a5fffa5 SP |
4648 | } |
4649 | ||
261014a1 | 4650 | __extension__ extern __inline uint16x8_t |
7a5fffa5 | 4651 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4652 | __arm_vcvtmq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p) |
7a5fffa5 | 4653 | { |
c431634b | 4654 | return __builtin_mve_vcvtmq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p); |
7a5fffa5 SP |
4655 | } |
4656 | ||
261014a1 | 4657 | __extension__ extern __inline uint32x4_t |
7a5fffa5 | 4658 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4659 | __arm_vcvtmq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p) |
7a5fffa5 | 4660 | { |
c431634b | 4661 | return __builtin_mve_vcvtmq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p); |
7a5fffa5 SP |
4662 | } |
4663 | ||
261014a1 | 4664 | __extension__ extern __inline float32x4_t |
7a5fffa5 | 4665 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4666 | __arm_vcvtbq_x_f32_f16 (float16x8_t __a, mve_pred16_t __p) |
7a5fffa5 | 4667 | { |
c431634b | 4668 | return __builtin_mve_vcvtbq_m_f32_f16v4sf (__arm_vuninitializedq_f32 (), __a, __p); |
7a5fffa5 SP |
4669 | } |
4670 | ||
261014a1 | 4671 | __extension__ extern __inline float32x4_t |
7a5fffa5 | 4672 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4673 | __arm_vcvttq_x_f32_f16 (float16x8_t __a, mve_pred16_t __p) |
7a5fffa5 | 4674 | { |
c431634b | 4675 | return __builtin_mve_vcvttq_m_f32_f16v4sf (__arm_vuninitializedq_f32 (), __a, __p); |
7a5fffa5 SP |
4676 | } |
4677 | ||
261014a1 | 4678 | __extension__ extern __inline float16x8_t |
7a5fffa5 | 4679 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4680 | __arm_vcvtq_x_f16_u16 (uint16x8_t __a, mve_pred16_t __p) |
7a5fffa5 | 4681 | { |
c431634b | 4682 | return __builtin_mve_vcvtq_m_to_f_uv8hf (__arm_vuninitializedq_f16 (), __a, __p); |
7a5fffa5 SP |
4683 | } |
4684 | ||
3eff57aa SP |
4685 | __extension__ extern __inline float16x8_t |
4686 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4687 | __arm_vcvtq_x_f16_s16 (int16x8_t __a, mve_pred16_t __p) |
3eff57aa | 4688 | { |
c431634b | 4689 | return __builtin_mve_vcvtq_m_to_f_sv8hf (__arm_vuninitializedq_f16 (), __a, __p); |
3eff57aa SP |
4690 | } |
4691 | ||
4692 | __extension__ extern __inline float32x4_t | |
4693 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4694 | __arm_vcvtq_x_f32_s32 (int32x4_t __a, mve_pred16_t __p) |
3eff57aa | 4695 | { |
c431634b | 4696 | return __builtin_mve_vcvtq_m_to_f_sv4sf (__arm_vuninitializedq_f32 (), __a, __p); |
3eff57aa SP |
4697 | } |
4698 | ||
261014a1 | 4699 | __extension__ extern __inline float32x4_t |
85a94e87 | 4700 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4701 | __arm_vcvtq_x_f32_u32 (uint32x4_t __a, mve_pred16_t __p) |
85a94e87 | 4702 | { |
c431634b | 4703 | return __builtin_mve_vcvtq_m_to_f_uv4sf (__arm_vuninitializedq_f32 (), __a, __p); |
85a94e87 SP |
4704 | } |
4705 | ||
261014a1 | 4706 | __extension__ extern __inline float16x8_t |
85a94e87 | 4707 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4708 | __arm_vcvtq_x_n_f16_s16 (int16x8_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4709 | { |
c431634b | 4710 | return __builtin_mve_vcvtq_m_n_to_f_sv8hf (__arm_vuninitializedq_f16 (), __a, __imm6, __p); |
85a94e87 SP |
4711 | } |
4712 | ||
261014a1 | 4713 | __extension__ extern __inline float16x8_t |
85a94e87 | 4714 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4715 | __arm_vcvtq_x_n_f16_u16 (uint16x8_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4716 | { |
c431634b | 4717 | return __builtin_mve_vcvtq_m_n_to_f_uv8hf (__arm_vuninitializedq_f16 (), __a, __imm6, __p); |
85a94e87 SP |
4718 | } |
4719 | ||
261014a1 | 4720 | __extension__ extern __inline float32x4_t |
85a94e87 | 4721 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4722 | __arm_vcvtq_x_n_f32_s32 (int32x4_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4723 | { |
c431634b | 4724 | return __builtin_mve_vcvtq_m_n_to_f_sv4sf (__arm_vuninitializedq_f32 (), __a, __imm6, __p); |
85a94e87 SP |
4725 | } |
4726 | ||
261014a1 | 4727 | __extension__ extern __inline float32x4_t |
85a94e87 | 4728 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4729 | __arm_vcvtq_x_n_f32_u32 (uint32x4_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4730 | { |
c431634b | 4731 | return __builtin_mve_vcvtq_m_n_to_f_uv4sf (__arm_vuninitializedq_f32 (), __a, __imm6, __p); |
85a94e87 SP |
4732 | } |
4733 | ||
4734 | __extension__ extern __inline int16x8_t | |
4735 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4736 | __arm_vcvtq_x_s16_f16 (float16x8_t __a, mve_pred16_t __p) |
85a94e87 | 4737 | { |
c431634b | 4738 | return __builtin_mve_vcvtq_m_from_f_sv8hi (__arm_vuninitializedq_s16 (), __a, __p); |
85a94e87 SP |
4739 | } |
4740 | ||
261014a1 | 4741 | __extension__ extern __inline int32x4_t |
85a94e87 | 4742 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4743 | __arm_vcvtq_x_s32_f32 (float32x4_t __a, mve_pred16_t __p) |
85a94e87 | 4744 | { |
c431634b | 4745 | return __builtin_mve_vcvtq_m_from_f_sv4si (__arm_vuninitializedq_s32 (), __a, __p); |
85a94e87 SP |
4746 | } |
4747 | ||
261014a1 | 4748 | __extension__ extern __inline uint16x8_t |
85a94e87 | 4749 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4750 | __arm_vcvtq_x_u16_f16 (float16x8_t __a, mve_pred16_t __p) |
85a94e87 | 4751 | { |
c431634b | 4752 | return __builtin_mve_vcvtq_m_from_f_uv8hi (__arm_vuninitializedq_u16 (), __a, __p); |
85a94e87 SP |
4753 | } |
4754 | ||
261014a1 | 4755 | __extension__ extern __inline uint32x4_t |
85a94e87 | 4756 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4757 | __arm_vcvtq_x_u32_f32 (float32x4_t __a, mve_pred16_t __p) |
85a94e87 | 4758 | { |
c431634b | 4759 | return __builtin_mve_vcvtq_m_from_f_uv4si (__arm_vuninitializedq_u32 (), __a, __p); |
85a94e87 SP |
4760 | } |
4761 | ||
261014a1 | 4762 | __extension__ extern __inline int16x8_t |
85a94e87 | 4763 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4764 | __arm_vcvtq_x_n_s16_f16 (float16x8_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4765 | { |
c431634b | 4766 | return __builtin_mve_vcvtq_m_n_from_f_sv8hi (__arm_vuninitializedq_s16 (), __a, __imm6, __p); |
85a94e87 SP |
4767 | } |
4768 | ||
261014a1 | 4769 | __extension__ extern __inline int32x4_t |
85a94e87 | 4770 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4771 | __arm_vcvtq_x_n_s32_f32 (float32x4_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4772 | { |
c431634b | 4773 | return __builtin_mve_vcvtq_m_n_from_f_sv4si (__arm_vuninitializedq_s32 (), __a, __imm6, __p); |
85a94e87 SP |
4774 | } |
4775 | ||
4776 | __extension__ extern __inline uint16x8_t | |
4777 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4778 | __arm_vcvtq_x_n_u16_f16 (float16x8_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4779 | { |
c431634b | 4780 | return __builtin_mve_vcvtq_m_n_from_f_uv8hi (__arm_vuninitializedq_u16 (), __a, __imm6, __p); |
85a94e87 SP |
4781 | } |
4782 | ||
4783 | __extension__ extern __inline uint32x4_t | |
4784 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4785 | __arm_vcvtq_x_n_u32_f32 (float32x4_t __a, const int __imm6, mve_pred16_t __p) |
85a94e87 | 4786 | { |
c431634b | 4787 | return __builtin_mve_vcvtq_m_n_from_f_uv4si (__arm_vuninitializedq_u32 (), __a, __imm6, __p); |
85a94e87 SP |
4788 | } |
4789 | ||
261014a1 | 4790 | __extension__ extern __inline float16x8_t |
85a94e87 | 4791 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4792 | __arm_vbicq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p) |
85a94e87 | 4793 | { |
c431634b | 4794 | return __builtin_mve_vbicq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p); |
85a94e87 SP |
4795 | } |
4796 | ||
4797 | __extension__ extern __inline float32x4_t | |
4798 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4799 | __arm_vbicq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p) |
85a94e87 | 4800 | { |
c431634b | 4801 | return __builtin_mve_vbicq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p); |
85a94e87 SP |
4802 | } |
4803 | ||
261014a1 | 4804 | __extension__ extern __inline float16x8_t |
85a94e87 | 4805 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
261014a1 | 4806 | __arm_vornq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p) |
85a94e87 | 4807 | { |
c431634b | 4808 | return __builtin_mve_vornq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __b, __p); |
85a94e87 SP |
4809 | } |
4810 | ||
4811 | __extension__ extern __inline float32x4_t | |
4812 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
261014a1 | 4813 | __arm_vornq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p) |
85a94e87 | 4814 | { |
c431634b | 4815 | return __builtin_mve_vornq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p); |
85a94e87 SP |
4816 | } |
4817 | ||
1dfcc3b5 SP |
4818 | __extension__ extern __inline float16x8x4_t |
4819 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4820 | __arm_vld4q_f16 (float16_t const * __addr) | |
4821 | { | |
4822 | union { float16x8x4_t __i; __builtin_neon_xi __o; } __rv; | |
4823 | __rv.__o = __builtin_mve_vld4qv8hf (__addr); | |
4824 | return __rv.__i; | |
4825 | } | |
4826 | ||
4827 | __extension__ extern __inline float16x8x2_t | |
4828 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4829 | __arm_vld2q_f16 (float16_t const * __addr) | |
4830 | { | |
4831 | union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv; | |
4832 | __rv.__o = __builtin_mve_vld2qv8hf (__addr); | |
4833 | return __rv.__i; | |
4834 | } | |
4835 | ||
4836 | __extension__ extern __inline float16x8_t | |
4837 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4838 | __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p) | |
4839 | { | |
f54e31dd | 4840 | return __arm_vldrhq_z_f16 (__base, __p); |
1dfcc3b5 SP |
4841 | } |
4842 | ||
4843 | __extension__ extern __inline void | |
4844 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4845 | __arm_vst2q_f16 (float16_t * __addr, float16x8x2_t __value) | |
4846 | { | |
4847 | union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv; | |
4848 | __rv.__i = __value; | |
4849 | __builtin_mve_vst2qv8hf (__addr, __rv.__o); | |
4850 | } | |
4851 | ||
4852 | __extension__ extern __inline void | |
4853 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4854 | __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p) | |
4855 | { | |
f54e31dd | 4856 | return __arm_vstrhq_p_f16 (__addr, __value, __p); |
1dfcc3b5 SP |
4857 | } |
4858 | ||
4859 | __extension__ extern __inline float32x4x4_t | |
4860 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4861 | __arm_vld4q_f32 (float32_t const * __addr) | |
4862 | { | |
4863 | union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv; | |
4864 | __rv.__o = __builtin_mve_vld4qv4sf (__addr); | |
4865 | return __rv.__i; | |
4866 | } | |
4867 | ||
4868 | __extension__ extern __inline float32x4x2_t | |
4869 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4870 | __arm_vld2q_f32 (float32_t const * __addr) | |
4871 | { | |
4872 | union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv; | |
4873 | __rv.__o = __builtin_mve_vld2qv4sf (__addr); | |
4874 | return __rv.__i; | |
4875 | } | |
4876 | ||
4877 | __extension__ extern __inline float32x4_t | |
4878 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4879 | __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p) | |
4880 | { | |
f54e31dd | 4881 | return __arm_vldrwq_z_f32 (__base, __p); |
1dfcc3b5 SP |
4882 | } |
4883 | ||
4884 | __extension__ extern __inline void | |
4885 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4886 | __arm_vst2q_f32 (float32_t * __addr, float32x4x2_t __value) | |
4887 | { | |
4888 | union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv; | |
4889 | __rv.__i = __value; | |
4890 | __builtin_mve_vst2qv4sf (__addr, __rv.__o); | |
4891 | } | |
4892 | ||
4893 | __extension__ extern __inline void | |
4894 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4895 | __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p) | |
4896 | { | |
f54e31dd | 4897 | return __arm_vstrwq_p_f32 (__addr, __value, __p); |
1dfcc3b5 SP |
4898 | } |
4899 | ||
1a5c27b1 SP |
4900 | __extension__ extern __inline float16x8_t |
4901 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4902 | __arm_vsetq_lane_f16 (float16_t __a, float16x8_t __b, const int __idx) | |
4903 | { | |
4904 | __ARM_CHECK_LANEQ (__b, __idx); | |
4905 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
4906 | return __b; | |
4907 | } | |
4908 | ||
4909 | __extension__ extern __inline float32x4_t | |
4910 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4911 | __arm_vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __idx) | |
4912 | { | |
4913 | __ARM_CHECK_LANEQ (__b, __idx); | |
4914 | __b[__ARM_LANEQ(__b,__idx)] = __a; | |
4915 | return __b; | |
4916 | } | |
4917 | ||
4918 | __extension__ extern __inline float16_t | |
4919 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4920 | __arm_vgetq_lane_f16 (float16x8_t __a, const int __idx) | |
4921 | { | |
4922 | __ARM_CHECK_LANEQ (__a, __idx); | |
4923 | return __a[__ARM_LANEQ(__a,__idx)]; | |
4924 | } | |
4925 | ||
4926 | __extension__ extern __inline float32_t | |
4927 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4928 | __arm_vgetq_lane_f32 (float32x4_t __a, const int __idx) | |
4929 | { | |
4930 | __ARM_CHECK_LANEQ (__a, __idx); | |
4931 | return __a[__ARM_LANEQ(__a,__idx)]; | |
4932 | } | |
e3678b44 SP |
4933 | #endif |
4934 | ||
6a90680b ASDV |
4935 | #ifdef __cplusplus |
4936 | __extension__ extern __inline void | |
4937 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4938 | __arm_vst4q (int8_t * __addr, int8x16x4_t __value) | |
4939 | { | |
4940 | __arm_vst4q_s8 (__addr, __value); | |
4941 | } | |
14782c81 | 4942 | |
6a90680b ASDV |
4943 | __extension__ extern __inline void |
4944 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4945 | __arm_vst4q (int16_t * __addr, int16x8x4_t __value) | |
4946 | { | |
4947 | __arm_vst4q_s16 (__addr, __value); | |
4948 | } | |
e3678b44 | 4949 | |
6a90680b ASDV |
4950 | __extension__ extern __inline void |
4951 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4952 | __arm_vst4q (int32_t * __addr, int32x4x4_t __value) | |
4953 | { | |
4954 | __arm_vst4q_s32 (__addr, __value); | |
4955 | } | |
e3678b44 | 4956 | |
6a90680b ASDV |
4957 | __extension__ extern __inline void |
4958 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4959 | __arm_vst4q (uint8_t * __addr, uint8x16x4_t __value) | |
4960 | { | |
4961 | __arm_vst4q_u8 (__addr, __value); | |
4962 | } | |
e3678b44 | 4963 | |
6a90680b ASDV |
4964 | __extension__ extern __inline void |
4965 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4966 | __arm_vst4q (uint16_t * __addr, uint16x8x4_t __value) | |
4967 | { | |
4968 | __arm_vst4q_u16 (__addr, __value); | |
4969 | } | |
e3678b44 | 4970 | |
6a90680b ASDV |
4971 | __extension__ extern __inline void |
4972 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4973 | __arm_vst4q (uint32_t * __addr, uint32x4x4_t __value) | |
4974 | { | |
4975 | __arm_vst4q_u32 (__addr, __value); | |
4976 | } | |
e3678b44 | 4977 | |
7674ae25 | 4978 | __extension__ extern __inline uint8x16_t |
6a90680b | 4979 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 4980 | __arm_vornq (uint8x16_t __a, uint8x16_t __b) |
6a90680b | 4981 | { |
7674ae25 | 4982 | return __arm_vornq_u8 (__a, __b); |
6a90680b ASDV |
4983 | } |
4984 | ||
6a90680b ASDV |
4985 | __extension__ extern __inline uint8x16_t |
4986 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4987 | __arm_vbicq (uint8x16_t __a, uint8x16_t __b) | |
4988 | { | |
4989 | return __arm_vbicq_u8 (__a, __b); | |
4990 | } | |
4991 | ||
6a90680b ASDV |
4992 | __extension__ extern __inline int8x16_t |
4993 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
4994 | __arm_vornq (int8x16_t __a, int8x16_t __b) | |
4995 | { | |
4996 | return __arm_vornq_s8 (__a, __b); | |
4997 | } | |
4998 | ||
6a90680b ASDV |
4999 | __extension__ extern __inline int8x16_t |
5000 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5001 | __arm_vbicq (int8x16_t __a, int8x16_t __b) | |
5002 | { | |
5003 | return __arm_vbicq_s8 (__a, __b); | |
5004 | } | |
5005 | ||
6a90680b ASDV |
5006 | __extension__ extern __inline uint16x8_t |
5007 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5008 | __arm_vornq (uint16x8_t __a, uint16x8_t __b) | |
5009 | { | |
5010 | return __arm_vornq_u16 (__a, __b); | |
5011 | } | |
5012 | ||
6a90680b ASDV |
5013 | __extension__ extern __inline uint16x8_t |
5014 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5015 | __arm_vbicq (uint16x8_t __a, uint16x8_t __b) | |
5016 | { | |
5017 | return __arm_vbicq_u16 (__a, __b); | |
5018 | } | |
5019 | ||
6a90680b ASDV |
5020 | __extension__ extern __inline int16x8_t |
5021 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5022 | __arm_vornq (int16x8_t __a, int16x8_t __b) | |
5023 | { | |
5024 | return __arm_vornq_s16 (__a, __b); | |
5025 | } | |
5026 | ||
7674ae25 | 5027 | __extension__ extern __inline int16x8_t |
6a90680b | 5028 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 5029 | __arm_vbicq (int16x8_t __a, int16x8_t __b) |
6a90680b | 5030 | { |
7674ae25 | 5031 | return __arm_vbicq_s16 (__a, __b); |
6a90680b ASDV |
5032 | } |
5033 | ||
7674ae25 | 5034 | __extension__ extern __inline uint32x4_t |
6a90680b | 5035 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 5036 | __arm_vornq (uint32x4_t __a, uint32x4_t __b) |
6a90680b | 5037 | { |
7674ae25 | 5038 | return __arm_vornq_u32 (__a, __b); |
6a90680b ASDV |
5039 | } |
5040 | ||
7674ae25 | 5041 | __extension__ extern __inline uint32x4_t |
6a90680b | 5042 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 5043 | __arm_vbicq (uint32x4_t __a, uint32x4_t __b) |
6a90680b | 5044 | { |
7674ae25 | 5045 | return __arm_vbicq_u32 (__a, __b); |
6a90680b ASDV |
5046 | } |
5047 | ||
6a90680b ASDV |
5048 | __extension__ extern __inline int32x4_t |
5049 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5050 | __arm_vornq (int32x4_t __a, int32x4_t __b) | |
5051 | { | |
5052 | return __arm_vornq_s32 (__a, __b); | |
5053 | } | |
5054 | ||
6a90680b ASDV |
5055 | __extension__ extern __inline int32x4_t |
5056 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5057 | __arm_vbicq (int32x4_t __a, int32x4_t __b) | |
5058 | { | |
5059 | return __arm_vbicq_s32 (__a, __b); | |
5060 | } | |
5061 | ||
6a90680b ASDV |
5062 | __extension__ extern __inline uint16x8_t |
5063 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
d34f510e | 5064 | __arm_vbicq (uint16x8_t __a, const int __imm) |
6a90680b ASDV |
5065 | { |
5066 | return __arm_vbicq_n_u16 (__a, __imm); | |
5067 | } | |
5068 | ||
6a90680b ASDV |
5069 | __extension__ extern __inline int16x8_t |
5070 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
d34f510e | 5071 | __arm_vbicq (int16x8_t __a, const int __imm) |
6a90680b ASDV |
5072 | { |
5073 | return __arm_vbicq_n_s16 (__a, __imm); | |
5074 | } | |
5075 | ||
6a90680b ASDV |
5076 | __extension__ extern __inline uint32x4_t |
5077 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
d34f510e | 5078 | __arm_vbicq (uint32x4_t __a, const int __imm) |
6a90680b ASDV |
5079 | { |
5080 | return __arm_vbicq_n_u32 (__a, __imm); | |
5081 | } | |
5082 | ||
6a90680b ASDV |
5083 | __extension__ extern __inline int32x4_t |
5084 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
d34f510e | 5085 | __arm_vbicq (int32x4_t __a, const int __imm) |
6a90680b ASDV |
5086 | { |
5087 | return __arm_vbicq_n_s32 (__a, __imm); | |
5088 | } | |
5089 | ||
6a90680b ASDV |
5090 | __extension__ extern __inline int16x8_t |
5091 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5092 | __arm_vbicq_m_n (int16x8_t __a, const int __imm, mve_pred16_t __p) | |
5093 | { | |
5094 | return __arm_vbicq_m_n_s16 (__a, __imm, __p); | |
5095 | } | |
5096 | ||
5097 | __extension__ extern __inline int32x4_t | |
5098 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5099 | __arm_vbicq_m_n (int32x4_t __a, const int __imm, mve_pred16_t __p) | |
5100 | { | |
5101 | return __arm_vbicq_m_n_s32 (__a, __imm, __p); | |
5102 | } | |
5103 | ||
446b5be4 | 5104 | __extension__ extern __inline uint16x8_t |
6a90680b | 5105 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5106 | __arm_vbicq_m_n (uint16x8_t __a, const int __imm, mve_pred16_t __p) |
6a90680b | 5107 | { |
446b5be4 | 5108 | return __arm_vbicq_m_n_u16 (__a, __imm, __p); |
6a90680b ASDV |
5109 | } |
5110 | ||
446b5be4 | 5111 | __extension__ extern __inline uint32x4_t |
6a90680b | 5112 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5113 | __arm_vbicq_m_n (uint32x4_t __a, const int __imm, mve_pred16_t __p) |
6a90680b | 5114 | { |
446b5be4 | 5115 | return __arm_vbicq_m_n_u32 (__a, __imm, __p); |
6a90680b ASDV |
5116 | } |
5117 | ||
5118 | __extension__ extern __inline int8x16_t | |
5119 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
446b5be4 | 5120 | __arm_vshlcq (int8x16_t __a, uint32_t * __b, const int __imm) |
6a90680b | 5121 | { |
446b5be4 | 5122 | return __arm_vshlcq_s8 (__a, __b, __imm); |
6a90680b ASDV |
5123 | } |
5124 | ||
446b5be4 | 5125 | __extension__ extern __inline uint8x16_t |
6a90680b | 5126 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5127 | __arm_vshlcq (uint8x16_t __a, uint32_t * __b, const int __imm) |
6a90680b | 5128 | { |
446b5be4 | 5129 | return __arm_vshlcq_u8 (__a, __b, __imm); |
6a90680b ASDV |
5130 | } |
5131 | ||
5132 | __extension__ extern __inline int16x8_t | |
5133 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
446b5be4 | 5134 | __arm_vshlcq (int16x8_t __a, uint32_t * __b, const int __imm) |
6a90680b | 5135 | { |
446b5be4 | 5136 | return __arm_vshlcq_s16 (__a, __b, __imm); |
6a90680b ASDV |
5137 | } |
5138 | ||
446b5be4 | 5139 | __extension__ extern __inline uint16x8_t |
6a90680b | 5140 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5141 | __arm_vshlcq (uint16x8_t __a, uint32_t * __b, const int __imm) |
6a90680b | 5142 | { |
446b5be4 | 5143 | return __arm_vshlcq_u16 (__a, __b, __imm); |
6a90680b ASDV |
5144 | } |
5145 | ||
446b5be4 | 5146 | __extension__ extern __inline int32x4_t |
6a90680b | 5147 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5148 | __arm_vshlcq (int32x4_t __a, uint32_t * __b, const int __imm) |
6a90680b | 5149 | { |
446b5be4 | 5150 | return __arm_vshlcq_s32 (__a, __b, __imm); |
6a90680b ASDV |
5151 | } |
5152 | ||
446b5be4 | 5153 | __extension__ extern __inline uint32x4_t |
6a90680b | 5154 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5155 | __arm_vshlcq (uint32x4_t __a, uint32_t * __b, const int __imm) |
6a90680b | 5156 | { |
446b5be4 | 5157 | return __arm_vshlcq_u32 (__a, __b, __imm); |
6a90680b ASDV |
5158 | } |
5159 | ||
6a90680b ASDV |
5160 | __extension__ extern __inline int8x16_t |
5161 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
446b5be4 | 5162 | __arm_vbicq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p) |
6a90680b | 5163 | { |
446b5be4 | 5164 | return __arm_vbicq_m_s8 (__inactive, __a, __b, __p); |
6a90680b ASDV |
5165 | } |
5166 | ||
5167 | __extension__ extern __inline int32x4_t | |
5168 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
446b5be4 | 5169 | __arm_vbicq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p) |
6a90680b | 5170 | { |
446b5be4 | 5171 | return __arm_vbicq_m_s32 (__inactive, __a, __b, __p); |
6a90680b ASDV |
5172 | } |
5173 | ||
5174 | __extension__ extern __inline int16x8_t | |
5175 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
446b5be4 | 5176 | __arm_vbicq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p) |
6a90680b | 5177 | { |
446b5be4 | 5178 | return __arm_vbicq_m_s16 (__inactive, __a, __b, __p); |
6a90680b ASDV |
5179 | } |
5180 | ||
446b5be4 | 5181 | __extension__ extern __inline uint8x16_t |
6a90680b | 5182 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5183 | __arm_vbicq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) |
6a90680b | 5184 | { |
446b5be4 | 5185 | return __arm_vbicq_m_u8 (__inactive, __a, __b, __p); |
6a90680b ASDV |
5186 | } |
5187 | ||
446b5be4 | 5188 | __extension__ extern __inline uint32x4_t |
6a90680b | 5189 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5190 | __arm_vbicq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) |
6a90680b | 5191 | { |
446b5be4 | 5192 | return __arm_vbicq_m_u32 (__inactive, __a, __b, __p); |
6a90680b ASDV |
5193 | } |
5194 | ||
446b5be4 | 5195 | __extension__ extern __inline uint16x8_t |
6a90680b | 5196 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
446b5be4 | 5197 | __arm_vbicq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) |
6a90680b | 5198 | { |
446b5be4 | 5199 | return __arm_vbicq_m_u16 (__inactive, __a, __b, __p); |
6a90680b ASDV |
5200 | } |
5201 | ||
6a90680b ASDV |
5202 | __extension__ extern __inline int8x16_t |
5203 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5204 | __arm_vornq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p) | |
5205 | { | |
5206 | return __arm_vornq_m_s8 (__inactive, __a, __b, __p); | |
5207 | } | |
5208 | ||
5209 | __extension__ extern __inline int32x4_t | |
5210 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5211 | __arm_vornq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, mve_pred16_t __p) | |
5212 | { | |
5213 | return __arm_vornq_m_s32 (__inactive, __a, __b, __p); | |
5214 | } | |
5215 | ||
5216 | __extension__ extern __inline int16x8_t | |
5217 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5218 | __arm_vornq_m (int16x8_t __inactive, int16x8_t __a, int16x8_t __b, mve_pred16_t __p) | |
5219 | { | |
5220 | return __arm_vornq_m_s16 (__inactive, __a, __b, __p); | |
5221 | } | |
5222 | ||
5223 | __extension__ extern __inline uint8x16_t | |
5224 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5225 | __arm_vornq_m (uint8x16_t __inactive, uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) | |
5226 | { | |
5227 | return __arm_vornq_m_u8 (__inactive, __a, __b, __p); | |
5228 | } | |
5229 | ||
5230 | __extension__ extern __inline uint32x4_t | |
5231 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5232 | __arm_vornq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) | |
5233 | { | |
5234 | return __arm_vornq_m_u32 (__inactive, __a, __b, __p); | |
5235 | } | |
5236 | ||
5237 | __extension__ extern __inline uint16x8_t | |
5238 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5239 | __arm_vornq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) | |
5240 | { | |
5241 | return __arm_vornq_m_u16 (__inactive, __a, __b, __p); | |
5242 | } | |
5243 | ||
6a90680b ASDV |
5244 | __extension__ extern __inline void |
5245 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5246 | __arm_vstrbq_scatter_offset (int8_t * __base, uint8x16_t __offset, int8x16_t __value) | |
5247 | { | |
5248 | __arm_vstrbq_scatter_offset_s8 (__base, __offset, __value); | |
5249 | } | |
5250 | ||
5251 | __extension__ extern __inline void | |
5252 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5253 | __arm_vstrbq_scatter_offset (int8_t * __base, uint32x4_t __offset, int32x4_t __value) | |
5254 | { | |
5255 | __arm_vstrbq_scatter_offset_s32 (__base, __offset, __value); | |
5256 | } | |
5257 | ||
5258 | __extension__ extern __inline void | |
5259 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5260 | __arm_vstrbq_scatter_offset (int8_t * __base, uint16x8_t __offset, int16x8_t __value) | |
5261 | { | |
5262 | __arm_vstrbq_scatter_offset_s16 (__base, __offset, __value); | |
5263 | } | |
5264 | ||
5265 | __extension__ extern __inline void | |
5266 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5267 | __arm_vstrbq_scatter_offset (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value) | |
5268 | { | |
5269 | __arm_vstrbq_scatter_offset_u8 (__base, __offset, __value); | |
5270 | } | |
5271 | ||
5272 | __extension__ extern __inline void | |
5273 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5274 | __arm_vstrbq_scatter_offset (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
5275 | { | |
5276 | __arm_vstrbq_scatter_offset_u32 (__base, __offset, __value); | |
5277 | } | |
5278 | ||
5279 | __extension__ extern __inline void | |
5280 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5281 | __arm_vstrbq_scatter_offset (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value) | |
5282 | { | |
5283 | __arm_vstrbq_scatter_offset_u16 (__base, __offset, __value); | |
5284 | } | |
5285 | ||
5286 | __extension__ extern __inline void | |
5287 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5288 | __arm_vstrbq (int8_t * __addr, int8x16_t __value) | |
5289 | { | |
5290 | __arm_vstrbq_s8 (__addr, __value); | |
5291 | } | |
5292 | ||
5293 | __extension__ extern __inline void | |
5294 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5295 | __arm_vstrbq (int8_t * __addr, int32x4_t __value) | |
5296 | { | |
5297 | __arm_vstrbq_s32 (__addr, __value); | |
5298 | } | |
5299 | ||
5300 | __extension__ extern __inline void | |
5301 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5302 | __arm_vstrbq (int8_t * __addr, int16x8_t __value) | |
5303 | { | |
5304 | __arm_vstrbq_s16 (__addr, __value); | |
5305 | } | |
5306 | ||
5307 | __extension__ extern __inline void | |
5308 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5309 | __arm_vstrbq (uint8_t * __addr, uint8x16_t __value) | |
5310 | { | |
5311 | __arm_vstrbq_u8 (__addr, __value); | |
5312 | } | |
5313 | ||
5314 | __extension__ extern __inline void | |
5315 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5316 | __arm_vstrbq (uint8_t * __addr, uint32x4_t __value) | |
5317 | { | |
5318 | __arm_vstrbq_u32 (__addr, __value); | |
5319 | } | |
5320 | ||
5321 | __extension__ extern __inline void | |
5322 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5323 | __arm_vstrbq (uint8_t * __addr, uint16x8_t __value) | |
5324 | { | |
5325 | __arm_vstrbq_u16 (__addr, __value); | |
5326 | } | |
5327 | ||
5328 | __extension__ extern __inline void | |
5329 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5330 | __arm_vstrwq_scatter_base (uint32x4_t __addr, const int __offset, int32x4_t __value) | |
5331 | { | |
5332 | __arm_vstrwq_scatter_base_s32 (__addr, __offset, __value); | |
5333 | } | |
5334 | ||
5335 | __extension__ extern __inline void | |
5336 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5337 | __arm_vstrwq_scatter_base (uint32x4_t __addr, const int __offset, uint32x4_t __value) | |
5338 | { | |
5339 | __arm_vstrwq_scatter_base_u32 (__addr, __offset, __value); | |
5340 | } | |
5341 | ||
5342 | __extension__ extern __inline uint8x16_t | |
5343 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5344 | __arm_vldrbq_gather_offset (uint8_t const * __base, uint8x16_t __offset) | |
5345 | { | |
5346 | return __arm_vldrbq_gather_offset_u8 (__base, __offset); | |
5347 | } | |
5348 | ||
5349 | __extension__ extern __inline int8x16_t | |
5350 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5351 | __arm_vldrbq_gather_offset (int8_t const * __base, uint8x16_t __offset) | |
5352 | { | |
5353 | return __arm_vldrbq_gather_offset_s8 (__base, __offset); | |
5354 | } | |
5355 | ||
5356 | __extension__ extern __inline uint16x8_t | |
5357 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5358 | __arm_vldrbq_gather_offset (uint8_t const * __base, uint16x8_t __offset) | |
5359 | { | |
5360 | return __arm_vldrbq_gather_offset_u16 (__base, __offset); | |
5361 | } | |
5362 | ||
5363 | __extension__ extern __inline int16x8_t | |
5364 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5365 | __arm_vldrbq_gather_offset (int8_t const * __base, uint16x8_t __offset) | |
5366 | { | |
5367 | return __arm_vldrbq_gather_offset_s16 (__base, __offset); | |
5368 | } | |
5369 | ||
5370 | __extension__ extern __inline uint32x4_t | |
5371 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5372 | __arm_vldrbq_gather_offset (uint8_t const * __base, uint32x4_t __offset) | |
5373 | { | |
5374 | return __arm_vldrbq_gather_offset_u32 (__base, __offset); | |
5375 | } | |
5376 | ||
5377 | __extension__ extern __inline int32x4_t | |
5378 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5379 | __arm_vldrbq_gather_offset (int8_t const * __base, uint32x4_t __offset) | |
5380 | { | |
5381 | return __arm_vldrbq_gather_offset_s32 (__base, __offset); | |
5382 | } | |
5383 | ||
5384 | __extension__ extern __inline void | |
5385 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5386 | __arm_vstrbq_p (int8_t * __addr, int8x16_t __value, mve_pred16_t __p) | |
5387 | { | |
5388 | __arm_vstrbq_p_s8 (__addr, __value, __p); | |
5389 | } | |
5390 | ||
5391 | __extension__ extern __inline void | |
5392 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5393 | __arm_vstrbq_p (int8_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
5394 | { | |
5395 | __arm_vstrbq_p_s32 (__addr, __value, __p); | |
5396 | } | |
5397 | ||
5398 | __extension__ extern __inline void | |
5399 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5400 | __arm_vstrbq_p (int8_t * __addr, int16x8_t __value, mve_pred16_t __p) | |
5401 | { | |
5402 | __arm_vstrbq_p_s16 (__addr, __value, __p); | |
5403 | } | |
5404 | ||
5405 | __extension__ extern __inline void | |
5406 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5407 | __arm_vstrbq_p (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p) | |
5408 | { | |
5409 | __arm_vstrbq_p_u8 (__addr, __value, __p); | |
5410 | } | |
5411 | ||
5412 | __extension__ extern __inline void | |
5413 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5414 | __arm_vstrbq_p (uint8_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
5415 | { | |
5416 | __arm_vstrbq_p_u32 (__addr, __value, __p); | |
5417 | } | |
5418 | ||
5419 | __extension__ extern __inline void | |
5420 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5421 | __arm_vstrbq_p (uint8_t * __addr, uint16x8_t __value, mve_pred16_t __p) | |
5422 | { | |
5423 | __arm_vstrbq_p_u16 (__addr, __value, __p); | |
5424 | } | |
5425 | ||
5426 | __extension__ extern __inline void | |
5427 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5428 | __arm_vstrbq_scatter_offset_p (int8_t * __base, uint8x16_t __offset, int8x16_t __value, mve_pred16_t __p) | |
5429 | { | |
5430 | __arm_vstrbq_scatter_offset_p_s8 (__base, __offset, __value, __p); | |
5431 | } | |
5432 | ||
5433 | __extension__ extern __inline void | |
5434 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5435 | __arm_vstrbq_scatter_offset_p (int8_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
5436 | { | |
5437 | __arm_vstrbq_scatter_offset_p_s32 (__base, __offset, __value, __p); | |
5438 | } | |
5439 | ||
5440 | __extension__ extern __inline void | |
5441 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5442 | __arm_vstrbq_scatter_offset_p (int8_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p) | |
5443 | { | |
5444 | __arm_vstrbq_scatter_offset_p_s16 (__base, __offset, __value, __p); | |
5445 | } | |
5446 | ||
5447 | __extension__ extern __inline void | |
5448 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5449 | __arm_vstrbq_scatter_offset_p (uint8_t * __base, uint8x16_t __offset, uint8x16_t __value, mve_pred16_t __p) | |
5450 | { | |
5451 | __arm_vstrbq_scatter_offset_p_u8 (__base, __offset, __value, __p); | |
5452 | } | |
5453 | ||
5454 | __extension__ extern __inline void | |
5455 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5456 | __arm_vstrbq_scatter_offset_p (uint8_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
5457 | { | |
5458 | __arm_vstrbq_scatter_offset_p_u32 (__base, __offset, __value, __p); | |
5459 | } | |
5460 | ||
5461 | __extension__ extern __inline void | |
5462 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5463 | __arm_vstrbq_scatter_offset_p (uint8_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p) | |
5464 | { | |
5465 | __arm_vstrbq_scatter_offset_p_u16 (__base, __offset, __value, __p); | |
5466 | } | |
5467 | ||
5468 | __extension__ extern __inline void | |
5469 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5470 | __arm_vstrwq_scatter_base_p (uint32x4_t __addr, const int __offset, int32x4_t __value, mve_pred16_t __p) | |
5471 | { | |
5472 | __arm_vstrwq_scatter_base_p_s32 (__addr, __offset, __value, __p); | |
5473 | } | |
5474 | ||
5475 | __extension__ extern __inline void | |
5476 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5477 | __arm_vstrwq_scatter_base_p (uint32x4_t __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p) | |
5478 | { | |
5479 | __arm_vstrwq_scatter_base_p_u32 (__addr, __offset, __value, __p); | |
5480 | } | |
5481 | ||
5482 | __extension__ extern __inline int8x16_t | |
5483 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5484 | __arm_vldrbq_gather_offset_z (int8_t const * __base, uint8x16_t __offset, mve_pred16_t __p) | |
5485 | { | |
5486 | return __arm_vldrbq_gather_offset_z_s8 (__base, __offset, __p); | |
5487 | } | |
5488 | ||
5489 | __extension__ extern __inline int32x4_t | |
5490 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5491 | __arm_vldrbq_gather_offset_z (int8_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5492 | { | |
5493 | return __arm_vldrbq_gather_offset_z_s32 (__base, __offset, __p); | |
5494 | } | |
5495 | ||
5496 | __extension__ extern __inline int16x8_t | |
5497 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5498 | __arm_vldrbq_gather_offset_z (int8_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
5499 | { | |
5500 | return __arm_vldrbq_gather_offset_z_s16 (__base, __offset, __p); | |
5501 | } | |
5502 | ||
5503 | __extension__ extern __inline uint8x16_t | |
5504 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5505 | __arm_vldrbq_gather_offset_z (uint8_t const * __base, uint8x16_t __offset, mve_pred16_t __p) | |
5506 | { | |
5507 | return __arm_vldrbq_gather_offset_z_u8 (__base, __offset, __p); | |
5508 | } | |
5509 | ||
5510 | __extension__ extern __inline uint32x4_t | |
5511 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5512 | __arm_vldrbq_gather_offset_z (uint8_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5513 | { | |
5514 | return __arm_vldrbq_gather_offset_z_u32 (__base, __offset, __p); | |
5515 | } | |
5516 | ||
5517 | __extension__ extern __inline uint16x8_t | |
5518 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5519 | __arm_vldrbq_gather_offset_z (uint8_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
5520 | { | |
5521 | return __arm_vldrbq_gather_offset_z_u16 (__base, __offset, __p); | |
5522 | } | |
5523 | ||
6a90680b ASDV |
5524 | __extension__ extern __inline int32x4_t |
5525 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5526 | __arm_vldrhq_gather_offset (int16_t const * __base, uint32x4_t __offset) | |
5527 | { | |
5528 | return __arm_vldrhq_gather_offset_s32 (__base, __offset); | |
5529 | } | |
5530 | ||
5531 | __extension__ extern __inline int16x8_t | |
5532 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5533 | __arm_vldrhq_gather_offset (int16_t const * __base, uint16x8_t __offset) | |
5534 | { | |
5535 | return __arm_vldrhq_gather_offset_s16 (__base, __offset); | |
5536 | } | |
5537 | ||
5538 | __extension__ extern __inline uint32x4_t | |
5539 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5540 | __arm_vldrhq_gather_offset (uint16_t const * __base, uint32x4_t __offset) | |
5541 | { | |
5542 | return __arm_vldrhq_gather_offset_u32 (__base, __offset); | |
5543 | } | |
5544 | ||
5545 | __extension__ extern __inline uint16x8_t | |
5546 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5547 | __arm_vldrhq_gather_offset (uint16_t const * __base, uint16x8_t __offset) | |
5548 | { | |
5549 | return __arm_vldrhq_gather_offset_u16 (__base, __offset); | |
5550 | } | |
5551 | ||
5552 | __extension__ extern __inline int32x4_t | |
5553 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5554 | __arm_vldrhq_gather_offset_z (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5555 | { | |
5556 | return __arm_vldrhq_gather_offset_z_s32 (__base, __offset, __p); | |
5557 | } | |
5558 | ||
5559 | __extension__ extern __inline int16x8_t | |
5560 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5561 | __arm_vldrhq_gather_offset_z (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
5562 | { | |
5563 | return __arm_vldrhq_gather_offset_z_s16 (__base, __offset, __p); | |
5564 | } | |
5565 | ||
5566 | __extension__ extern __inline uint32x4_t | |
5567 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5568 | __arm_vldrhq_gather_offset_z (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5569 | { | |
5570 | return __arm_vldrhq_gather_offset_z_u32 (__base, __offset, __p); | |
5571 | } | |
5572 | ||
5573 | __extension__ extern __inline uint16x8_t | |
5574 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5575 | __arm_vldrhq_gather_offset_z (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
5576 | { | |
5577 | return __arm_vldrhq_gather_offset_z_u16 (__base, __offset, __p); | |
5578 | } | |
5579 | ||
5580 | __extension__ extern __inline int32x4_t | |
5581 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5582 | __arm_vldrhq_gather_shifted_offset (int16_t const * __base, uint32x4_t __offset) | |
5583 | { | |
5584 | return __arm_vldrhq_gather_shifted_offset_s32 (__base, __offset); | |
5585 | } | |
5586 | ||
5587 | __extension__ extern __inline int16x8_t | |
5588 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5589 | __arm_vldrhq_gather_shifted_offset (int16_t const * __base, uint16x8_t __offset) | |
5590 | { | |
5591 | return __arm_vldrhq_gather_shifted_offset_s16 (__base, __offset); | |
5592 | } | |
5593 | ||
5594 | __extension__ extern __inline uint32x4_t | |
5595 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5596 | __arm_vldrhq_gather_shifted_offset (uint16_t const * __base, uint32x4_t __offset) | |
5597 | { | |
5598 | return __arm_vldrhq_gather_shifted_offset_u32 (__base, __offset); | |
5599 | } | |
5600 | ||
5601 | __extension__ extern __inline uint16x8_t | |
5602 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5603 | __arm_vldrhq_gather_shifted_offset (uint16_t const * __base, uint16x8_t __offset) | |
5604 | { | |
5605 | return __arm_vldrhq_gather_shifted_offset_u16 (__base, __offset); | |
5606 | } | |
5607 | ||
5608 | __extension__ extern __inline int32x4_t | |
5609 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5610 | __arm_vldrhq_gather_shifted_offset_z (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5611 | { | |
5612 | return __arm_vldrhq_gather_shifted_offset_z_s32 (__base, __offset, __p); | |
5613 | } | |
5614 | ||
5615 | __extension__ extern __inline int16x8_t | |
5616 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5617 | __arm_vldrhq_gather_shifted_offset_z (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
5618 | { | |
5619 | return __arm_vldrhq_gather_shifted_offset_z_s16 (__base, __offset, __p); | |
5620 | } | |
5621 | ||
5622 | __extension__ extern __inline uint32x4_t | |
5623 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5624 | __arm_vldrhq_gather_shifted_offset_z (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5625 | { | |
5626 | return __arm_vldrhq_gather_shifted_offset_z_u32 (__base, __offset, __p); | |
5627 | } | |
5628 | ||
5629 | __extension__ extern __inline uint16x8_t | |
5630 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5631 | __arm_vldrhq_gather_shifted_offset_z (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
5632 | { | |
5633 | return __arm_vldrhq_gather_shifted_offset_z_u16 (__base, __offset, __p); | |
5634 | } | |
5635 | ||
5636 | __extension__ extern __inline int64x2_t | |
5637 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5638 | __arm_vldrdq_gather_offset (int64_t const * __base, uint64x2_t __offset) | |
5639 | { | |
5640 | return __arm_vldrdq_gather_offset_s64 (__base, __offset); | |
5641 | } | |
5642 | ||
5643 | __extension__ extern __inline uint64x2_t | |
5644 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5645 | __arm_vldrdq_gather_offset (uint64_t const * __base, uint64x2_t __offset) | |
5646 | { | |
5647 | return __arm_vldrdq_gather_offset_u64 (__base, __offset); | |
5648 | } | |
5649 | ||
5650 | __extension__ extern __inline int64x2_t | |
5651 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5652 | __arm_vldrdq_gather_offset_z (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
5653 | { | |
5654 | return __arm_vldrdq_gather_offset_z_s64 (__base, __offset, __p); | |
5655 | } | |
5656 | ||
5657 | __extension__ extern __inline uint64x2_t | |
5658 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5659 | __arm_vldrdq_gather_offset_z (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
5660 | { | |
5661 | return __arm_vldrdq_gather_offset_z_u64 (__base, __offset, __p); | |
5662 | } | |
5663 | ||
5664 | __extension__ extern __inline int64x2_t | |
5665 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5666 | __arm_vldrdq_gather_shifted_offset (int64_t const * __base, uint64x2_t __offset) | |
5667 | { | |
5668 | return __arm_vldrdq_gather_shifted_offset_s64 (__base, __offset); | |
5669 | } | |
5670 | ||
5671 | __extension__ extern __inline uint64x2_t | |
5672 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5673 | __arm_vldrdq_gather_shifted_offset (uint64_t const * __base, uint64x2_t __offset) | |
5674 | { | |
5675 | return __arm_vldrdq_gather_shifted_offset_u64 (__base, __offset); | |
5676 | } | |
5677 | ||
5678 | __extension__ extern __inline int64x2_t | |
5679 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5680 | __arm_vldrdq_gather_shifted_offset_z (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
5681 | { | |
5682 | return __arm_vldrdq_gather_shifted_offset_z_s64 (__base, __offset, __p); | |
5683 | } | |
5684 | ||
5685 | __extension__ extern __inline uint64x2_t | |
5686 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5687 | __arm_vldrdq_gather_shifted_offset_z (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p) | |
5688 | { | |
5689 | return __arm_vldrdq_gather_shifted_offset_z_u64 (__base, __offset, __p); | |
5690 | } | |
5691 | ||
5692 | __extension__ extern __inline int32x4_t | |
5693 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5694 | __arm_vldrwq_gather_offset (int32_t const * __base, uint32x4_t __offset) | |
5695 | { | |
5696 | return __arm_vldrwq_gather_offset_s32 (__base, __offset); | |
5697 | } | |
5698 | ||
5699 | __extension__ extern __inline uint32x4_t | |
5700 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5701 | __arm_vldrwq_gather_offset (uint32_t const * __base, uint32x4_t __offset) | |
5702 | { | |
5703 | return __arm_vldrwq_gather_offset_u32 (__base, __offset); | |
5704 | } | |
5705 | ||
5706 | __extension__ extern __inline int32x4_t | |
5707 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5708 | __arm_vldrwq_gather_offset_z (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5709 | { | |
5710 | return __arm_vldrwq_gather_offset_z_s32 (__base, __offset, __p); | |
5711 | } | |
5712 | ||
5713 | __extension__ extern __inline uint32x4_t | |
5714 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5715 | __arm_vldrwq_gather_offset_z (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5716 | { | |
5717 | return __arm_vldrwq_gather_offset_z_u32 (__base, __offset, __p); | |
5718 | } | |
5719 | ||
5720 | __extension__ extern __inline int32x4_t | |
5721 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5722 | __arm_vldrwq_gather_shifted_offset (int32_t const * __base, uint32x4_t __offset) | |
5723 | { | |
5724 | return __arm_vldrwq_gather_shifted_offset_s32 (__base, __offset); | |
5725 | } | |
5726 | ||
5727 | __extension__ extern __inline uint32x4_t | |
5728 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5729 | __arm_vldrwq_gather_shifted_offset (uint32_t const * __base, uint32x4_t __offset) | |
5730 | { | |
5731 | return __arm_vldrwq_gather_shifted_offset_u32 (__base, __offset); | |
5732 | } | |
5733 | ||
5734 | __extension__ extern __inline int32x4_t | |
5735 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5736 | __arm_vldrwq_gather_shifted_offset_z (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5737 | { | |
5738 | return __arm_vldrwq_gather_shifted_offset_z_s32 (__base, __offset, __p); | |
5739 | } | |
5740 | ||
5741 | __extension__ extern __inline uint32x4_t | |
5742 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5743 | __arm_vldrwq_gather_shifted_offset_z (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
5744 | { | |
5745 | return __arm_vldrwq_gather_shifted_offset_z_u32 (__base, __offset, __p); | |
5746 | } | |
5747 | ||
6a90680b ASDV |
5748 | __extension__ extern __inline void |
5749 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5750 | __arm_vstrhq_scatter_offset (int16_t * __base, uint32x4_t __offset, int32x4_t __value) | |
5751 | { | |
5752 | __arm_vstrhq_scatter_offset_s32 (__base, __offset, __value); | |
5753 | } | |
5754 | ||
5755 | __extension__ extern __inline void | |
5756 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5757 | __arm_vstrhq_scatter_offset (int16_t * __base, uint16x8_t __offset, int16x8_t __value) | |
5758 | { | |
5759 | __arm_vstrhq_scatter_offset_s16 (__base, __offset, __value); | |
5760 | } | |
5761 | ||
5762 | __extension__ extern __inline void | |
5763 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5764 | __arm_vstrhq_scatter_offset (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
5765 | { | |
5766 | __arm_vstrhq_scatter_offset_u32 (__base, __offset, __value); | |
5767 | } | |
5768 | ||
5769 | __extension__ extern __inline void | |
5770 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5771 | __arm_vstrhq_scatter_offset (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value) | |
5772 | { | |
5773 | __arm_vstrhq_scatter_offset_u16 (__base, __offset, __value); | |
5774 | } | |
5775 | ||
5776 | __extension__ extern __inline void | |
5777 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5778 | __arm_vstrhq_scatter_offset_p (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
5779 | { | |
5780 | __arm_vstrhq_scatter_offset_p_s32 (__base, __offset, __value, __p); | |
5781 | } | |
5782 | ||
5783 | __extension__ extern __inline void | |
5784 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5785 | __arm_vstrhq_scatter_offset_p (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p) | |
5786 | { | |
5787 | __arm_vstrhq_scatter_offset_p_s16 (__base, __offset, __value, __p); | |
5788 | } | |
5789 | ||
5790 | __extension__ extern __inline void | |
5791 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5792 | __arm_vstrhq_scatter_offset_p (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
5793 | { | |
5794 | __arm_vstrhq_scatter_offset_p_u32 (__base, __offset, __value, __p); | |
5795 | } | |
5796 | ||
5797 | __extension__ extern __inline void | |
5798 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5799 | __arm_vstrhq_scatter_offset_p (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p) | |
5800 | { | |
5801 | __arm_vstrhq_scatter_offset_p_u16 (__base, __offset, __value, __p); | |
5802 | } | |
5803 | ||
5804 | __extension__ extern __inline void | |
5805 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5806 | __arm_vstrhq_scatter_shifted_offset (int16_t * __base, uint32x4_t __offset, int32x4_t __value) | |
5807 | { | |
5808 | __arm_vstrhq_scatter_shifted_offset_s32 (__base, __offset, __value); | |
5809 | } | |
5810 | ||
5811 | __extension__ extern __inline void | |
5812 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5813 | __arm_vstrhq_scatter_shifted_offset (int16_t * __base, uint16x8_t __offset, int16x8_t __value) | |
5814 | { | |
5815 | __arm_vstrhq_scatter_shifted_offset_s16 (__base, __offset, __value); | |
5816 | } | |
5817 | ||
5818 | __extension__ extern __inline void | |
5819 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5820 | __arm_vstrhq_scatter_shifted_offset (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
5821 | { | |
5822 | __arm_vstrhq_scatter_shifted_offset_u32 (__base, __offset, __value); | |
5823 | } | |
5824 | ||
5825 | __extension__ extern __inline void | |
5826 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5827 | __arm_vstrhq_scatter_shifted_offset (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value) | |
5828 | { | |
5829 | __arm_vstrhq_scatter_shifted_offset_u16 (__base, __offset, __value); | |
5830 | } | |
5831 | ||
5832 | __extension__ extern __inline void | |
5833 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5834 | __arm_vstrhq_scatter_shifted_offset_p (int16_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
5835 | { | |
5836 | __arm_vstrhq_scatter_shifted_offset_p_s32 (__base, __offset, __value, __p); | |
5837 | } | |
5838 | ||
5839 | __extension__ extern __inline void | |
5840 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5841 | __arm_vstrhq_scatter_shifted_offset_p (int16_t * __base, uint16x8_t __offset, int16x8_t __value, mve_pred16_t __p) | |
5842 | { | |
5843 | __arm_vstrhq_scatter_shifted_offset_p_s16 (__base, __offset, __value, __p); | |
5844 | } | |
5845 | ||
5846 | __extension__ extern __inline void | |
5847 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5848 | __arm_vstrhq_scatter_shifted_offset_p (uint16_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
5849 | { | |
5850 | __arm_vstrhq_scatter_shifted_offset_p_u32 (__base, __offset, __value, __p); | |
5851 | } | |
5852 | ||
5853 | __extension__ extern __inline void | |
5854 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5855 | __arm_vstrhq_scatter_shifted_offset_p (uint16_t * __base, uint16x8_t __offset, uint16x8_t __value, mve_pred16_t __p) | |
5856 | { | |
5857 | __arm_vstrhq_scatter_shifted_offset_p_u16 (__base, __offset, __value, __p); | |
5858 | } | |
5859 | ||
5860 | __extension__ extern __inline void | |
5861 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5862 | __arm_vstrhq (int16_t * __addr, int32x4_t __value) | |
5863 | { | |
5864 | __arm_vstrhq_s32 (__addr, __value); | |
5865 | } | |
5866 | ||
5867 | __extension__ extern __inline void | |
5868 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5869 | __arm_vstrhq (int16_t * __addr, int16x8_t __value) | |
5870 | { | |
5871 | __arm_vstrhq_s16 (__addr, __value); | |
5872 | } | |
5873 | ||
5874 | __extension__ extern __inline void | |
5875 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5876 | __arm_vstrhq (uint16_t * __addr, uint32x4_t __value) | |
5877 | { | |
5878 | __arm_vstrhq_u32 (__addr, __value); | |
5879 | } | |
5880 | ||
5881 | __extension__ extern __inline void | |
5882 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5883 | __arm_vstrhq (uint16_t * __addr, uint16x8_t __value) | |
5884 | { | |
5885 | __arm_vstrhq_u16 (__addr, __value); | |
5886 | } | |
5887 | ||
5888 | __extension__ extern __inline void | |
5889 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5890 | __arm_vstrhq_p (int16_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
5891 | { | |
5892 | __arm_vstrhq_p_s32 (__addr, __value, __p); | |
5893 | } | |
5894 | ||
5895 | __extension__ extern __inline void | |
5896 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5897 | __arm_vstrhq_p (int16_t * __addr, int16x8_t __value, mve_pred16_t __p) | |
5898 | { | |
5899 | __arm_vstrhq_p_s16 (__addr, __value, __p); | |
5900 | } | |
5901 | ||
5902 | __extension__ extern __inline void | |
5903 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5904 | __arm_vstrhq_p (uint16_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
5905 | { | |
5906 | __arm_vstrhq_p_u32 (__addr, __value, __p); | |
5907 | } | |
5908 | ||
5909 | __extension__ extern __inline void | |
5910 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5911 | __arm_vstrhq_p (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p) | |
5912 | { | |
5913 | __arm_vstrhq_p_u16 (__addr, __value, __p); | |
5914 | } | |
5915 | ||
5916 | __extension__ extern __inline void | |
5917 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5918 | __arm_vstrwq (int32_t * __addr, int32x4_t __value) | |
5919 | { | |
5920 | __arm_vstrwq_s32 (__addr, __value); | |
5921 | } | |
5922 | ||
5923 | __extension__ extern __inline void | |
5924 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5925 | __arm_vstrwq (uint32_t * __addr, uint32x4_t __value) | |
5926 | { | |
5927 | __arm_vstrwq_u32 (__addr, __value); | |
5928 | } | |
5929 | ||
5930 | __extension__ extern __inline void | |
5931 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5932 | __arm_vstrwq_p (int32_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
5933 | { | |
5934 | __arm_vstrwq_p_s32 (__addr, __value, __p); | |
5935 | } | |
5936 | ||
5937 | __extension__ extern __inline void | |
5938 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5939 | __arm_vstrwq_p (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
5940 | { | |
5941 | __arm_vstrwq_p_u32 (__addr, __value, __p); | |
5942 | } | |
5943 | ||
5944 | __extension__ extern __inline void | |
5945 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5946 | __arm_vstrdq_scatter_base_p (uint64x2_t __addr, const int __offset, int64x2_t __value, mve_pred16_t __p) | |
5947 | { | |
5948 | __arm_vstrdq_scatter_base_p_s64 (__addr, __offset, __value, __p); | |
5949 | } | |
5950 | ||
5951 | __extension__ extern __inline void | |
5952 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5953 | __arm_vstrdq_scatter_base_p (uint64x2_t __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p) | |
5954 | { | |
5955 | __arm_vstrdq_scatter_base_p_u64 (__addr, __offset, __value, __p); | |
5956 | } | |
5957 | ||
5958 | __extension__ extern __inline void | |
5959 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5960 | __arm_vstrdq_scatter_base (uint64x2_t __addr, const int __offset, int64x2_t __value) | |
5961 | { | |
5962 | __arm_vstrdq_scatter_base_s64 (__addr, __offset, __value); | |
5963 | } | |
5964 | ||
5965 | __extension__ extern __inline void | |
5966 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5967 | __arm_vstrdq_scatter_base (uint64x2_t __addr, const int __offset, uint64x2_t __value) | |
5968 | { | |
5969 | __arm_vstrdq_scatter_base_u64 (__addr, __offset, __value); | |
5970 | } | |
5971 | ||
5972 | __extension__ extern __inline void | |
5973 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5974 | __arm_vstrdq_scatter_offset_p (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p) | |
5975 | { | |
5976 | __arm_vstrdq_scatter_offset_p_s64 (__base, __offset, __value, __p); | |
5977 | } | |
5978 | ||
5979 | __extension__ extern __inline void | |
5980 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5981 | __arm_vstrdq_scatter_offset_p (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p) | |
5982 | { | |
5983 | __arm_vstrdq_scatter_offset_p_u64 (__base, __offset, __value, __p); | |
5984 | } | |
5985 | ||
5986 | __extension__ extern __inline void | |
5987 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5988 | __arm_vstrdq_scatter_offset (int64_t * __base, uint64x2_t __offset, int64x2_t __value) | |
5989 | { | |
5990 | __arm_vstrdq_scatter_offset_s64 (__base, __offset, __value); | |
5991 | } | |
5992 | ||
5993 | __extension__ extern __inline void | |
5994 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
5995 | __arm_vstrdq_scatter_offset (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value) | |
5996 | { | |
5997 | __arm_vstrdq_scatter_offset_u64 (__base, __offset, __value); | |
5998 | } | |
5999 | ||
6000 | __extension__ extern __inline void | |
6001 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6002 | __arm_vstrdq_scatter_shifted_offset_p (int64_t * __base, uint64x2_t __offset, int64x2_t __value, mve_pred16_t __p) | |
6003 | { | |
6004 | __arm_vstrdq_scatter_shifted_offset_p_s64 (__base, __offset, __value, __p); | |
6005 | } | |
6006 | ||
6007 | __extension__ extern __inline void | |
6008 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6009 | __arm_vstrdq_scatter_shifted_offset_p (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value, mve_pred16_t __p) | |
6010 | { | |
6011 | __arm_vstrdq_scatter_shifted_offset_p_u64 (__base, __offset, __value, __p); | |
6012 | } | |
6013 | ||
6014 | __extension__ extern __inline void | |
6015 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6016 | __arm_vstrdq_scatter_shifted_offset (int64_t * __base, uint64x2_t __offset, int64x2_t __value) | |
6017 | { | |
6018 | __arm_vstrdq_scatter_shifted_offset_s64 (__base, __offset, __value); | |
6019 | } | |
6020 | ||
6021 | __extension__ extern __inline void | |
6022 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6023 | __arm_vstrdq_scatter_shifted_offset (uint64_t * __base, uint64x2_t __offset, uint64x2_t __value) | |
6024 | { | |
6025 | __arm_vstrdq_scatter_shifted_offset_u64 (__base, __offset, __value); | |
6026 | } | |
6027 | ||
6028 | __extension__ extern __inline void | |
6029 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6030 | __arm_vstrwq_scatter_offset_p (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
6031 | { | |
6032 | __arm_vstrwq_scatter_offset_p_s32 (__base, __offset, __value, __p); | |
6033 | } | |
6034 | ||
6035 | __extension__ extern __inline void | |
6036 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6037 | __arm_vstrwq_scatter_offset_p (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
6038 | { | |
6039 | __arm_vstrwq_scatter_offset_p_u32 (__base, __offset, __value, __p); | |
6040 | } | |
6041 | ||
6042 | __extension__ extern __inline void | |
6043 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6044 | __arm_vstrwq_scatter_offset (int32_t * __base, uint32x4_t __offset, int32x4_t __value) | |
6045 | { | |
6046 | __arm_vstrwq_scatter_offset_s32 (__base, __offset, __value); | |
6047 | } | |
6048 | ||
6049 | __extension__ extern __inline void | |
6050 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6051 | __arm_vstrwq_scatter_offset (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
6052 | { | |
6053 | __arm_vstrwq_scatter_offset_u32 (__base, __offset, __value); | |
6054 | } | |
6055 | ||
6056 | __extension__ extern __inline void | |
6057 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6058 | __arm_vstrwq_scatter_shifted_offset_p (int32_t * __base, uint32x4_t __offset, int32x4_t __value, mve_pred16_t __p) | |
6059 | { | |
6060 | __arm_vstrwq_scatter_shifted_offset_p_s32 (__base, __offset, __value, __p); | |
6061 | } | |
6062 | ||
6063 | __extension__ extern __inline void | |
6064 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6065 | __arm_vstrwq_scatter_shifted_offset_p (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value, mve_pred16_t __p) | |
6066 | { | |
6067 | __arm_vstrwq_scatter_shifted_offset_p_u32 (__base, __offset, __value, __p); | |
6068 | } | |
6069 | ||
6070 | __extension__ extern __inline void | |
6071 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6072 | __arm_vstrwq_scatter_shifted_offset (int32_t * __base, uint32x4_t __offset, int32x4_t __value) | |
6073 | { | |
6074 | __arm_vstrwq_scatter_shifted_offset_s32 (__base, __offset, __value); | |
6075 | } | |
6076 | ||
6077 | __extension__ extern __inline void | |
6078 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6079 | __arm_vstrwq_scatter_shifted_offset (uint32_t * __base, uint32x4_t __offset, uint32x4_t __value) | |
6080 | { | |
6081 | __arm_vstrwq_scatter_shifted_offset_u32 (__base, __offset, __value); | |
6082 | } | |
6083 | ||
6a90680b ASDV |
6084 | __extension__ extern __inline uint8x16_t |
6085 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6086 | __arm_vddupq_m (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
6087 | { | |
6088 | return __arm_vddupq_m_n_u8 (__inactive, __a, __imm, __p); | |
6089 | } | |
6090 | ||
6091 | __extension__ extern __inline uint32x4_t | |
6092 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6093 | __arm_vddupq_m (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
6094 | { | |
6095 | return __arm_vddupq_m_n_u32 (__inactive, __a, __imm, __p); | |
6096 | } | |
6097 | ||
6098 | __extension__ extern __inline uint16x8_t | |
6099 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6100 | __arm_vddupq_m (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
6101 | { | |
6102 | return __arm_vddupq_m_n_u16 (__inactive, __a, __imm, __p); | |
6103 | } | |
6104 | ||
6105 | __extension__ extern __inline uint8x16_t | |
6106 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6107 | __arm_vddupq_m (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
6108 | { | |
6109 | return __arm_vddupq_m_wb_u8 (__inactive, __a, __imm, __p); | |
6110 | } | |
6111 | ||
6112 | __extension__ extern __inline uint16x8_t | |
6113 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6114 | __arm_vddupq_m (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
6115 | { | |
6116 | return __arm_vddupq_m_wb_u16 (__inactive, __a, __imm, __p); | |
6117 | } | |
6118 | ||
6119 | __extension__ extern __inline uint32x4_t | |
6120 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6121 | __arm_vddupq_m (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
6122 | { | |
6123 | return __arm_vddupq_m_wb_u32 (__inactive, __a, __imm, __p); | |
6124 | } | |
6125 | ||
6126 | __extension__ extern __inline uint8x16_t | |
6127 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6128 | __arm_vddupq_u8 (uint32_t __a, const int __imm) | |
6129 | { | |
6130 | return __arm_vddupq_n_u8 (__a, __imm); | |
6131 | } | |
6132 | ||
6133 | __extension__ extern __inline uint32x4_t | |
6134 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6135 | __arm_vddupq_u32 (uint32_t __a, const int __imm) | |
6136 | { | |
6137 | return __arm_vddupq_n_u32 (__a, __imm); | |
6138 | } | |
6139 | ||
6140 | __extension__ extern __inline uint16x8_t | |
6141 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6142 | __arm_vddupq_u16 (uint32_t __a, const int __imm) | |
6143 | { | |
6144 | return __arm_vddupq_n_u16 (__a, __imm); | |
6145 | } | |
6146 | ||
6147 | __extension__ extern __inline uint8x16_t | |
6148 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6149 | __arm_vdwdupq_m (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6150 | { | |
6151 | return __arm_vdwdupq_m_n_u8 (__inactive, __a, __b, __imm, __p); | |
6152 | } | |
6153 | ||
6154 | __extension__ extern __inline uint32x4_t | |
6155 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6156 | __arm_vdwdupq_m (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6157 | { | |
6158 | return __arm_vdwdupq_m_n_u32 (__inactive, __a, __b, __imm, __p); | |
6159 | } | |
6160 | ||
6161 | __extension__ extern __inline uint16x8_t | |
6162 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6163 | __arm_vdwdupq_m (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6164 | { | |
6165 | return __arm_vdwdupq_m_n_u16 (__inactive, __a, __b, __imm, __p); | |
6166 | } | |
6167 | ||
6168 | __extension__ extern __inline uint8x16_t | |
6169 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6170 | __arm_vdwdupq_m (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6171 | { | |
6172 | return __arm_vdwdupq_m_wb_u8 (__inactive, __a, __b, __imm, __p); | |
6173 | } | |
6174 | ||
6175 | __extension__ extern __inline uint32x4_t | |
6176 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6177 | __arm_vdwdupq_m (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6178 | { | |
6179 | return __arm_vdwdupq_m_wb_u32 (__inactive, __a, __b, __imm, __p); | |
6180 | } | |
6181 | ||
6182 | __extension__ extern __inline uint16x8_t | |
6183 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6184 | __arm_vdwdupq_m (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6185 | { | |
6186 | return __arm_vdwdupq_m_wb_u16 (__inactive, __a, __b, __imm, __p); | |
6187 | } | |
6188 | ||
6189 | __extension__ extern __inline uint8x16_t | |
6190 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6191 | __arm_vdwdupq_u8 (uint32_t __a, uint32_t __b, const int __imm) | |
6192 | { | |
6193 | return __arm_vdwdupq_n_u8 (__a, __b, __imm); | |
6194 | } | |
6195 | ||
6196 | __extension__ extern __inline uint32x4_t | |
6197 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6198 | __arm_vdwdupq_u32 (uint32_t __a, uint32_t __b, const int __imm) | |
6199 | { | |
6200 | return __arm_vdwdupq_n_u32 (__a, __b, __imm); | |
6201 | } | |
6202 | ||
6203 | __extension__ extern __inline uint16x8_t | |
6204 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6205 | __arm_vdwdupq_u16 (uint32_t __a, uint32_t __b, const int __imm) | |
6206 | { | |
6207 | return __arm_vdwdupq_n_u16 (__a, __b, __imm); | |
6208 | } | |
6209 | ||
6210 | __extension__ extern __inline uint8x16_t | |
6211 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6212 | __arm_vdwdupq_u8 (uint32_t * __a, uint32_t __b, const int __imm) | |
6213 | { | |
6214 | return __arm_vdwdupq_wb_u8 (__a, __b, __imm); | |
6215 | } | |
6216 | ||
6217 | __extension__ extern __inline uint32x4_t | |
6218 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6219 | __arm_vdwdupq_u32 (uint32_t * __a, uint32_t __b, const int __imm) | |
6220 | { | |
6221 | return __arm_vdwdupq_wb_u32 (__a, __b, __imm); | |
6222 | } | |
6223 | ||
6224 | __extension__ extern __inline uint16x8_t | |
6225 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6226 | __arm_vdwdupq_u16 (uint32_t * __a, uint32_t __b, const int __imm) | |
6227 | { | |
6228 | return __arm_vdwdupq_wb_u16 (__a, __b, __imm); | |
6229 | } | |
6230 | ||
6231 | __extension__ extern __inline uint8x16_t | |
6232 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6233 | __arm_vidupq_m (uint8x16_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
6234 | { | |
6235 | return __arm_vidupq_m_n_u8 (__inactive, __a, __imm, __p); | |
6236 | } | |
6237 | ||
6238 | __extension__ extern __inline uint32x4_t | |
6239 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6240 | __arm_vidupq_m (uint32x4_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
6241 | { | |
6242 | return __arm_vidupq_m_n_u32 (__inactive, __a, __imm, __p); | |
6243 | } | |
6244 | ||
6245 | __extension__ extern __inline uint16x8_t | |
6246 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6247 | __arm_vidupq_m (uint16x8_t __inactive, uint32_t __a, const int __imm, mve_pred16_t __p) | |
6248 | { | |
6249 | return __arm_vidupq_m_n_u16 (__inactive, __a, __imm, __p); | |
6250 | } | |
6251 | ||
6252 | __extension__ extern __inline uint8x16_t | |
6253 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6254 | __arm_vidupq_u8 (uint32_t __a, const int __imm) | |
6255 | { | |
6256 | return __arm_vidupq_n_u8 (__a, __imm); | |
6257 | } | |
6258 | ||
6259 | __extension__ extern __inline uint8x16_t | |
6260 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6261 | __arm_vidupq_m (uint8x16_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
6262 | { | |
6263 | return __arm_vidupq_m_wb_u8 (__inactive, __a, __imm, __p); | |
6264 | } | |
6265 | ||
6266 | __extension__ extern __inline uint16x8_t | |
6267 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6268 | __arm_vidupq_m (uint16x8_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
6269 | { | |
6270 | return __arm_vidupq_m_wb_u16 (__inactive, __a, __imm, __p); | |
6271 | } | |
6272 | ||
6273 | __extension__ extern __inline uint32x4_t | |
6274 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6275 | __arm_vidupq_m (uint32x4_t __inactive, uint32_t * __a, const int __imm, mve_pred16_t __p) | |
6276 | { | |
6277 | return __arm_vidupq_m_wb_u32 (__inactive, __a, __imm, __p); | |
6278 | } | |
6279 | ||
6280 | __extension__ extern __inline uint32x4_t | |
6281 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6282 | __arm_vidupq_u32 (uint32_t __a, const int __imm) | |
6283 | { | |
6284 | return __arm_vidupq_n_u32 (__a, __imm); | |
6285 | } | |
6286 | ||
6287 | __extension__ extern __inline uint16x8_t | |
6288 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6289 | __arm_vidupq_u16 (uint32_t __a, const int __imm) | |
6290 | { | |
6291 | return __arm_vidupq_n_u16 (__a, __imm); | |
6292 | } | |
6293 | ||
6294 | __extension__ extern __inline uint8x16_t | |
6295 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6296 | __arm_vidupq_u8 (uint32_t * __a, const int __imm) | |
6297 | { | |
6298 | return __arm_vidupq_wb_u8 (__a, __imm); | |
6299 | } | |
6300 | ||
6301 | __extension__ extern __inline uint16x8_t | |
6302 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6303 | __arm_vidupq_u16 (uint32_t * __a, const int __imm) | |
6304 | { | |
6305 | return __arm_vidupq_wb_u16 (__a, __imm); | |
6306 | } | |
6307 | ||
6308 | __extension__ extern __inline uint32x4_t | |
6309 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6310 | __arm_vidupq_u32 (uint32_t * __a, const int __imm) | |
6311 | { | |
6312 | return __arm_vidupq_wb_u32 (__a, __imm); | |
6313 | } | |
6314 | ||
6315 | __extension__ extern __inline uint8x16_t | |
6316 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6317 | __arm_vddupq_u8 (uint32_t * __a, const int __imm) | |
6318 | { | |
6319 | return __arm_vddupq_wb_u8 (__a, __imm); | |
6320 | } | |
6321 | ||
6322 | __extension__ extern __inline uint16x8_t | |
6323 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6324 | __arm_vddupq_u16 (uint32_t * __a, const int __imm) | |
6325 | { | |
6326 | return __arm_vddupq_wb_u16 (__a, __imm); | |
6327 | } | |
6328 | ||
6329 | __extension__ extern __inline uint32x4_t | |
6330 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6331 | __arm_vddupq_u32 (uint32_t * __a, const int __imm) | |
6332 | { | |
6333 | return __arm_vddupq_wb_u32 (__a, __imm); | |
6334 | } | |
6335 | ||
6336 | __extension__ extern __inline uint8x16_t | |
6337 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6338 | __arm_viwdupq_m (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6339 | { | |
6340 | return __arm_viwdupq_m_n_u8 (__inactive, __a, __b, __imm, __p); | |
6341 | } | |
6342 | ||
6343 | __extension__ extern __inline uint32x4_t | |
6344 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6345 | __arm_viwdupq_m (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6346 | { | |
6347 | return __arm_viwdupq_m_n_u32 (__inactive, __a, __b, __imm, __p); | |
6348 | } | |
6349 | ||
6350 | __extension__ extern __inline uint16x8_t | |
6351 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6352 | __arm_viwdupq_m (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6353 | { | |
6354 | return __arm_viwdupq_m_n_u16 (__inactive, __a, __b, __imm, __p); | |
6355 | } | |
6356 | ||
6357 | __extension__ extern __inline uint8x16_t | |
6358 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6359 | __arm_viwdupq_m (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6360 | { | |
6361 | return __arm_viwdupq_m_wb_u8 (__inactive, __a, __b, __imm, __p); | |
6362 | } | |
6363 | ||
6364 | __extension__ extern __inline uint32x4_t | |
6365 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6366 | __arm_viwdupq_m (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6367 | { | |
6368 | return __arm_viwdupq_m_wb_u32 (__inactive, __a, __b, __imm, __p); | |
6369 | } | |
6370 | ||
6371 | __extension__ extern __inline uint16x8_t | |
6372 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6373 | __arm_viwdupq_m (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6374 | { | |
6375 | return __arm_viwdupq_m_wb_u16 (__inactive, __a, __b, __imm, __p); | |
6376 | } | |
6377 | ||
6378 | __extension__ extern __inline uint8x16_t | |
6379 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6380 | __arm_viwdupq_u8 (uint32_t __a, uint32_t __b, const int __imm) | |
6381 | { | |
6382 | return __arm_viwdupq_n_u8 (__a, __b, __imm); | |
6383 | } | |
6384 | ||
6385 | __extension__ extern __inline uint32x4_t | |
6386 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6387 | __arm_viwdupq_u32 (uint32_t __a, uint32_t __b, const int __imm) | |
6388 | { | |
6389 | return __arm_viwdupq_n_u32 (__a, __b, __imm); | |
6390 | } | |
6391 | ||
6392 | __extension__ extern __inline uint16x8_t | |
6393 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6394 | __arm_viwdupq_u16 (uint32_t __a, uint32_t __b, const int __imm) | |
6395 | { | |
6396 | return __arm_viwdupq_n_u16 (__a, __b, __imm); | |
6397 | } | |
6398 | ||
6399 | __extension__ extern __inline uint8x16_t | |
6400 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6401 | __arm_viwdupq_u8 (uint32_t * __a, uint32_t __b, const int __imm) | |
6402 | { | |
6403 | return __arm_viwdupq_wb_u8 (__a, __b, __imm); | |
6404 | } | |
6405 | ||
6406 | __extension__ extern __inline uint32x4_t | |
6407 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6408 | __arm_viwdupq_u32 (uint32_t * __a, uint32_t __b, const int __imm) | |
6409 | { | |
6410 | return __arm_viwdupq_wb_u32 (__a, __b, __imm); | |
6411 | } | |
6412 | ||
6413 | __extension__ extern __inline uint16x8_t | |
6414 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6415 | __arm_viwdupq_u16 (uint32_t * __a, uint32_t __b, const int __imm) | |
6416 | { | |
6417 | return __arm_viwdupq_wb_u16 (__a, __b, __imm); | |
6418 | } | |
6419 | ||
6420 | __extension__ extern __inline void | |
6421 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6422 | __arm_vstrdq_scatter_base_wb (uint64x2_t * __addr, const int __offset, int64x2_t __value) | |
6423 | { | |
6424 | __arm_vstrdq_scatter_base_wb_s64 (__addr, __offset, __value); | |
6425 | } | |
6426 | ||
6427 | __extension__ extern __inline void | |
6428 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6429 | __arm_vstrdq_scatter_base_wb (uint64x2_t * __addr, const int __offset, uint64x2_t __value) | |
6430 | { | |
6431 | __arm_vstrdq_scatter_base_wb_u64 (__addr, __offset, __value); | |
6432 | } | |
6433 | ||
6434 | __extension__ extern __inline void | |
6435 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6436 | __arm_vstrdq_scatter_base_wb_p (uint64x2_t * __addr, const int __offset, int64x2_t __value, mve_pred16_t __p) | |
6437 | { | |
6438 | __arm_vstrdq_scatter_base_wb_p_s64 (__addr, __offset, __value, __p); | |
6439 | } | |
6440 | ||
6441 | __extension__ extern __inline void | |
6442 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6443 | __arm_vstrdq_scatter_base_wb_p (uint64x2_t * __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p) | |
6444 | { | |
6445 | __arm_vstrdq_scatter_base_wb_p_u64 (__addr, __offset, __value, __p); | |
6446 | } | |
6447 | ||
6448 | __extension__ extern __inline void | |
6449 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6450 | __arm_vstrwq_scatter_base_wb_p (uint32x4_t * __addr, const int __offset, int32x4_t __value, mve_pred16_t __p) | |
6451 | { | |
6452 | __arm_vstrwq_scatter_base_wb_p_s32 (__addr, __offset, __value, __p); | |
6453 | } | |
6454 | ||
6455 | __extension__ extern __inline void | |
6456 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6457 | __arm_vstrwq_scatter_base_wb_p (uint32x4_t * __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p) | |
6458 | { | |
6459 | __arm_vstrwq_scatter_base_wb_p_u32 (__addr, __offset, __value, __p); | |
6460 | } | |
6461 | ||
6462 | __extension__ extern __inline void | |
6463 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6464 | __arm_vstrwq_scatter_base_wb (uint32x4_t * __addr, const int __offset, int32x4_t __value) | |
6465 | { | |
6466 | __arm_vstrwq_scatter_base_wb_s32 (__addr, __offset, __value); | |
6467 | } | |
6468 | ||
6469 | __extension__ extern __inline void | |
6470 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6471 | __arm_vstrwq_scatter_base_wb (uint32x4_t * __addr, const int __offset, uint32x4_t __value) | |
6472 | { | |
6473 | __arm_vstrwq_scatter_base_wb_u32 (__addr, __offset, __value); | |
6474 | } | |
6475 | ||
6476 | __extension__ extern __inline uint8x16_t | |
6477 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6478 | __arm_vddupq_x_u8 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
6479 | { | |
6480 | return __arm_vddupq_x_n_u8 (__a, __imm, __p); | |
6481 | } | |
6482 | ||
6483 | __extension__ extern __inline uint16x8_t | |
6484 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6485 | __arm_vddupq_x_u16 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
6486 | { | |
6487 | return __arm_vddupq_x_n_u16 (__a, __imm, __p); | |
6488 | } | |
6489 | ||
6490 | __extension__ extern __inline uint32x4_t | |
6491 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6492 | __arm_vddupq_x_u32 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
6493 | { | |
6494 | return __arm_vddupq_x_n_u32 (__a, __imm, __p); | |
6495 | } | |
6496 | ||
6497 | __extension__ extern __inline uint8x16_t | |
6498 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6499 | __arm_vddupq_x_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p) | |
6500 | { | |
6501 | return __arm_vddupq_x_wb_u8 (__a, __imm, __p); | |
6502 | } | |
6503 | ||
6504 | __extension__ extern __inline uint16x8_t | |
6505 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6506 | __arm_vddupq_x_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p) | |
6507 | { | |
6508 | return __arm_vddupq_x_wb_u16 (__a, __imm, __p); | |
6509 | } | |
6510 | ||
6511 | __extension__ extern __inline uint32x4_t | |
6512 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6513 | __arm_vddupq_x_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p) | |
6514 | { | |
6515 | return __arm_vddupq_x_wb_u32 (__a, __imm, __p); | |
6516 | } | |
6517 | ||
6518 | __extension__ extern __inline uint8x16_t | |
6519 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6520 | __arm_vdwdupq_x_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6521 | { | |
6522 | return __arm_vdwdupq_x_n_u8 (__a, __b, __imm, __p); | |
6523 | } | |
6524 | ||
6525 | __extension__ extern __inline uint16x8_t | |
6526 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6527 | __arm_vdwdupq_x_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6528 | { | |
6529 | return __arm_vdwdupq_x_n_u16 (__a, __b, __imm, __p); | |
6530 | } | |
6531 | ||
6532 | __extension__ extern __inline uint32x4_t | |
6533 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6534 | __arm_vdwdupq_x_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6535 | { | |
6536 | return __arm_vdwdupq_x_n_u32 (__a, __b, __imm, __p); | |
6537 | } | |
6538 | ||
6539 | __extension__ extern __inline uint8x16_t | |
6540 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6541 | __arm_vdwdupq_x_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6542 | { | |
6543 | return __arm_vdwdupq_x_wb_u8 (__a, __b, __imm, __p); | |
6544 | } | |
6545 | ||
6546 | __extension__ extern __inline uint16x8_t | |
6547 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6548 | __arm_vdwdupq_x_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6549 | { | |
6550 | return __arm_vdwdupq_x_wb_u16 (__a, __b, __imm, __p); | |
6551 | } | |
6552 | ||
6553 | __extension__ extern __inline uint32x4_t | |
6554 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6555 | __arm_vdwdupq_x_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6556 | { | |
6557 | return __arm_vdwdupq_x_wb_u32 (__a, __b, __imm, __p); | |
6558 | } | |
6559 | ||
6560 | __extension__ extern __inline uint8x16_t | |
6561 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6562 | __arm_vidupq_x_u8 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
6563 | { | |
6564 | return __arm_vidupq_x_n_u8 (__a, __imm, __p); | |
6565 | } | |
6566 | ||
6567 | __extension__ extern __inline uint16x8_t | |
6568 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6569 | __arm_vidupq_x_u16 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
6570 | { | |
6571 | return __arm_vidupq_x_n_u16 (__a, __imm, __p); | |
6572 | } | |
6573 | ||
6574 | __extension__ extern __inline uint32x4_t | |
6575 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6576 | __arm_vidupq_x_u32 (uint32_t __a, const int __imm, mve_pred16_t __p) | |
6577 | { | |
6578 | return __arm_vidupq_x_n_u32 (__a, __imm, __p); | |
6579 | } | |
6580 | ||
6581 | __extension__ extern __inline uint8x16_t | |
6582 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6583 | __arm_vidupq_x_u8 (uint32_t *__a, const int __imm, mve_pred16_t __p) | |
6584 | { | |
6585 | return __arm_vidupq_x_wb_u8 (__a, __imm, __p); | |
6586 | } | |
6587 | ||
6588 | __extension__ extern __inline uint16x8_t | |
6589 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6590 | __arm_vidupq_x_u16 (uint32_t *__a, const int __imm, mve_pred16_t __p) | |
6591 | { | |
6592 | return __arm_vidupq_x_wb_u16 (__a, __imm, __p); | |
6593 | } | |
6594 | ||
6595 | __extension__ extern __inline uint32x4_t | |
6596 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6597 | __arm_vidupq_x_u32 (uint32_t *__a, const int __imm, mve_pred16_t __p) | |
6598 | { | |
6599 | return __arm_vidupq_x_wb_u32 (__a, __imm, __p); | |
6600 | } | |
6601 | ||
6602 | __extension__ extern __inline uint8x16_t | |
6603 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6604 | __arm_viwdupq_x_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6605 | { | |
6606 | return __arm_viwdupq_x_n_u8 (__a, __b, __imm, __p); | |
6607 | } | |
6608 | ||
6609 | __extension__ extern __inline uint16x8_t | |
6610 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6611 | __arm_viwdupq_x_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6612 | { | |
6613 | return __arm_viwdupq_x_n_u16 (__a, __b, __imm, __p); | |
6614 | } | |
6615 | ||
6616 | __extension__ extern __inline uint32x4_t | |
6617 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6618 | __arm_viwdupq_x_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6619 | { | |
6620 | return __arm_viwdupq_x_n_u32 (__a, __b, __imm, __p); | |
6621 | } | |
6622 | ||
6623 | __extension__ extern __inline uint8x16_t | |
6624 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6625 | __arm_viwdupq_x_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6626 | { | |
6627 | return __arm_viwdupq_x_wb_u8 (__a, __b, __imm, __p); | |
6628 | } | |
6629 | ||
6630 | __extension__ extern __inline uint16x8_t | |
6631 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6632 | __arm_viwdupq_x_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6633 | { | |
6634 | return __arm_viwdupq_x_wb_u16 (__a, __b, __imm, __p); | |
6635 | } | |
6636 | ||
6637 | __extension__ extern __inline uint32x4_t | |
6638 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6639 | __arm_viwdupq_x_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) | |
6640 | { | |
6641 | return __arm_viwdupq_x_wb_u32 (__a, __b, __imm, __p); | |
6642 | } | |
6643 | ||
6a90680b ASDV |
6644 | __extension__ extern __inline int8x16_t |
6645 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6646 | __arm_vbicq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p) | |
6647 | { | |
6648 | return __arm_vbicq_x_s8 (__a, __b, __p); | |
6649 | } | |
6650 | ||
6651 | __extension__ extern __inline int16x8_t | |
6652 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6653 | __arm_vbicq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p) | |
6654 | { | |
6655 | return __arm_vbicq_x_s16 (__a, __b, __p); | |
6656 | } | |
6657 | ||
6658 | __extension__ extern __inline int32x4_t | |
6659 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6660 | __arm_vbicq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p) | |
6661 | { | |
6662 | return __arm_vbicq_x_s32 (__a, __b, __p); | |
6663 | } | |
6664 | ||
6665 | __extension__ extern __inline uint8x16_t | |
6666 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6667 | __arm_vbicq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) | |
6668 | { | |
6669 | return __arm_vbicq_x_u8 (__a, __b, __p); | |
6670 | } | |
6671 | ||
6672 | __extension__ extern __inline uint16x8_t | |
6673 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6674 | __arm_vbicq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) | |
6675 | { | |
6676 | return __arm_vbicq_x_u16 (__a, __b, __p); | |
6677 | } | |
6678 | ||
6679 | __extension__ extern __inline uint32x4_t | |
6680 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6681 | __arm_vbicq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) | |
6682 | { | |
6683 | return __arm_vbicq_x_u32 (__a, __b, __p); | |
6684 | } | |
6685 | ||
6a90680b ASDV |
6686 | __extension__ extern __inline int8x16_t |
6687 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6688 | __arm_vornq_x (int8x16_t __a, int8x16_t __b, mve_pred16_t __p) | |
6689 | { | |
6690 | return __arm_vornq_x_s8 (__a, __b, __p); | |
6691 | } | |
6692 | ||
6693 | __extension__ extern __inline int16x8_t | |
6694 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6695 | __arm_vornq_x (int16x8_t __a, int16x8_t __b, mve_pred16_t __p) | |
6696 | { | |
6697 | return __arm_vornq_x_s16 (__a, __b, __p); | |
6698 | } | |
6699 | ||
6700 | __extension__ extern __inline int32x4_t | |
6701 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6702 | __arm_vornq_x (int32x4_t __a, int32x4_t __b, mve_pred16_t __p) | |
6703 | { | |
6704 | return __arm_vornq_x_s32 (__a, __b, __p); | |
6705 | } | |
6706 | ||
6707 | __extension__ extern __inline uint8x16_t | |
6708 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6709 | __arm_vornq_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p) | |
6710 | { | |
6711 | return __arm_vornq_x_u8 (__a, __b, __p); | |
6712 | } | |
6713 | ||
6714 | __extension__ extern __inline uint16x8_t | |
6715 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6716 | __arm_vornq_x (uint16x8_t __a, uint16x8_t __b, mve_pred16_t __p) | |
6717 | { | |
6718 | return __arm_vornq_x_u16 (__a, __b, __p); | |
6719 | } | |
6720 | ||
6721 | __extension__ extern __inline uint32x4_t | |
6722 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6723 | __arm_vornq_x (uint32x4_t __a, uint32x4_t __b, mve_pred16_t __p) | |
6724 | { | |
6725 | return __arm_vornq_x_u32 (__a, __b, __p); | |
6726 | } | |
6727 | ||
6a90680b ASDV |
6728 | __extension__ extern __inline int32x4_t |
6729 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6730 | __arm_vadciq (int32x4_t __a, int32x4_t __b, unsigned * __carry_out) | |
6731 | { | |
6732 | return __arm_vadciq_s32 (__a, __b, __carry_out); | |
6733 | } | |
6734 | ||
6735 | __extension__ extern __inline uint32x4_t | |
6736 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6737 | __arm_vadciq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out) | |
6738 | { | |
6739 | return __arm_vadciq_u32 (__a, __b, __carry_out); | |
6740 | } | |
6741 | ||
6742 | __extension__ extern __inline int32x4_t | |
6743 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6744 | __arm_vadciq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) | |
6745 | { | |
6746 | return __arm_vadciq_m_s32 (__inactive, __a, __b, __carry_out, __p); | |
6747 | } | |
6748 | ||
6749 | __extension__ extern __inline uint32x4_t | |
6750 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6751 | __arm_vadciq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) | |
6752 | { | |
6753 | return __arm_vadciq_m_u32 (__inactive, __a, __b, __carry_out, __p); | |
6754 | } | |
6755 | ||
6756 | __extension__ extern __inline int32x4_t | |
6757 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6758 | __arm_vadcq (int32x4_t __a, int32x4_t __b, unsigned * __carry) | |
6759 | { | |
6760 | return __arm_vadcq_s32 (__a, __b, __carry); | |
6761 | } | |
6762 | ||
6763 | __extension__ extern __inline uint32x4_t | |
6764 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6765 | __arm_vadcq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) | |
6766 | { | |
6767 | return __arm_vadcq_u32 (__a, __b, __carry); | |
6768 | } | |
6769 | ||
6770 | __extension__ extern __inline int32x4_t | |
6771 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6772 | __arm_vadcq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
6773 | { | |
6774 | return __arm_vadcq_m_s32 (__inactive, __a, __b, __carry, __p); | |
6775 | } | |
6776 | ||
6777 | __extension__ extern __inline uint32x4_t | |
6778 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6779 | __arm_vadcq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
6780 | { | |
6781 | return __arm_vadcq_m_u32 (__inactive, __a, __b, __carry, __p); | |
6782 | } | |
6783 | ||
6784 | __extension__ extern __inline int32x4_t | |
6785 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6786 | __arm_vsbciq (int32x4_t __a, int32x4_t __b, unsigned * __carry_out) | |
6787 | { | |
6788 | return __arm_vsbciq_s32 (__a, __b, __carry_out); | |
6789 | } | |
6790 | ||
6791 | __extension__ extern __inline uint32x4_t | |
6792 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6793 | __arm_vsbciq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out) | |
6794 | { | |
6795 | return __arm_vsbciq_u32 (__a, __b, __carry_out); | |
6796 | } | |
6797 | ||
6798 | __extension__ extern __inline int32x4_t | |
6799 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6800 | __arm_vsbciq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) | |
6801 | { | |
6802 | return __arm_vsbciq_m_s32 (__inactive, __a, __b, __carry_out, __p); | |
6803 | } | |
6804 | ||
6805 | __extension__ extern __inline uint32x4_t | |
6806 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6807 | __arm_vsbciq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry_out, mve_pred16_t __p) | |
6808 | { | |
6809 | return __arm_vsbciq_m_u32 (__inactive, __a, __b, __carry_out, __p); | |
6810 | } | |
6811 | ||
6812 | __extension__ extern __inline int32x4_t | |
6813 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6814 | __arm_vsbcq (int32x4_t __a, int32x4_t __b, unsigned * __carry) | |
6815 | { | |
6816 | return __arm_vsbcq_s32 (__a, __b, __carry); | |
6817 | } | |
6818 | ||
6819 | __extension__ extern __inline uint32x4_t | |
6820 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6821 | __arm_vsbcq (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) | |
6822 | { | |
6823 | return __arm_vsbcq_u32 (__a, __b, __carry); | |
6824 | } | |
6825 | ||
6826 | __extension__ extern __inline int32x4_t | |
6827 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6828 | __arm_vsbcq_m (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
6829 | { | |
6830 | return __arm_vsbcq_m_s32 (__inactive, __a, __b, __carry, __p); | |
6831 | } | |
6832 | ||
6833 | __extension__ extern __inline uint32x4_t | |
6834 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6835 | __arm_vsbcq_m (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) | |
6836 | { | |
6837 | return __arm_vsbcq_m_u32 (__inactive, __a, __b, __carry, __p); | |
6838 | } | |
6839 | ||
6840 | __extension__ extern __inline void | |
6841 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6842 | __arm_vst1q_p (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p) | |
6843 | { | |
6844 | __arm_vst1q_p_u8 (__addr, __value, __p); | |
6845 | } | |
6846 | ||
6847 | __extension__ extern __inline void | |
6848 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6849 | __arm_vst1q_p (int8_t * __addr, int8x16_t __value, mve_pred16_t __p) | |
6850 | { | |
6851 | __arm_vst1q_p_s8 (__addr, __value, __p); | |
6852 | } | |
6853 | ||
6854 | __extension__ extern __inline void | |
6855 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6856 | __arm_vst2q (int8_t * __addr, int8x16x2_t __value) | |
6857 | { | |
6858 | __arm_vst2q_s8 (__addr, __value); | |
6859 | } | |
6860 | ||
6861 | __extension__ extern __inline void | |
6862 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6863 | __arm_vst2q (uint8_t * __addr, uint8x16x2_t __value) | |
6864 | { | |
6865 | __arm_vst2q_u8 (__addr, __value); | |
6866 | } | |
6867 | ||
6868 | __extension__ extern __inline uint8x16_t | |
6869 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6870 | __arm_vld1q_z (uint8_t const *__base, mve_pred16_t __p) | |
6871 | { | |
6872 | return __arm_vld1q_z_u8 (__base, __p); | |
6873 | } | |
6874 | ||
6875 | __extension__ extern __inline int8x16_t | |
6876 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6877 | __arm_vld1q_z (int8_t const *__base, mve_pred16_t __p) | |
6878 | { | |
6879 | return __arm_vld1q_z_s8 (__base, __p); | |
6880 | } | |
6881 | ||
6882 | __extension__ extern __inline int8x16x2_t | |
6883 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6884 | __arm_vld2q (int8_t const * __addr) | |
6885 | { | |
6886 | return __arm_vld2q_s8 (__addr); | |
6887 | } | |
6888 | ||
6889 | __extension__ extern __inline uint8x16x2_t | |
6890 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6891 | __arm_vld2q (uint8_t const * __addr) | |
6892 | { | |
6893 | return __arm_vld2q_u8 (__addr); | |
6894 | } | |
6895 | ||
6896 | __extension__ extern __inline int8x16x4_t | |
6897 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6898 | __arm_vld4q (int8_t const * __addr) | |
6899 | { | |
6900 | return __arm_vld4q_s8 (__addr); | |
6901 | } | |
6902 | ||
6903 | __extension__ extern __inline uint8x16x4_t | |
6904 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6905 | __arm_vld4q (uint8_t const * __addr) | |
6906 | { | |
6907 | return __arm_vld4q_u8 (__addr); | |
6908 | } | |
6909 | ||
6910 | __extension__ extern __inline void | |
6911 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6912 | __arm_vst1q_p (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p) | |
6913 | { | |
6914 | __arm_vst1q_p_u16 (__addr, __value, __p); | |
6915 | } | |
6916 | ||
6917 | __extension__ extern __inline void | |
6918 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6919 | __arm_vst1q_p (int16_t * __addr, int16x8_t __value, mve_pred16_t __p) | |
6920 | { | |
6921 | __arm_vst1q_p_s16 (__addr, __value, __p); | |
6922 | } | |
6923 | ||
6924 | __extension__ extern __inline void | |
6925 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6926 | __arm_vst2q (int16_t * __addr, int16x8x2_t __value) | |
6927 | { | |
6928 | __arm_vst2q_s16 (__addr, __value); | |
6929 | } | |
6930 | ||
6931 | __extension__ extern __inline void | |
6932 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6933 | __arm_vst2q (uint16_t * __addr, uint16x8x2_t __value) | |
6934 | { | |
6935 | __arm_vst2q_u16 (__addr, __value); | |
6936 | } | |
6937 | ||
6938 | __extension__ extern __inline uint16x8_t | |
6939 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6940 | __arm_vld1q_z (uint16_t const *__base, mve_pred16_t __p) | |
6941 | { | |
6942 | return __arm_vld1q_z_u16 (__base, __p); | |
6943 | } | |
6944 | ||
6945 | __extension__ extern __inline int16x8_t | |
6946 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6947 | __arm_vld1q_z (int16_t const *__base, mve_pred16_t __p) | |
6948 | { | |
6949 | return __arm_vld1q_z_s16 (__base, __p); | |
6950 | } | |
6951 | ||
6952 | __extension__ extern __inline int16x8x2_t | |
6953 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6954 | __arm_vld2q (int16_t const * __addr) | |
6955 | { | |
6956 | return __arm_vld2q_s16 (__addr); | |
6957 | } | |
6958 | ||
6959 | __extension__ extern __inline uint16x8x2_t | |
6960 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6961 | __arm_vld2q (uint16_t const * __addr) | |
6962 | { | |
6963 | return __arm_vld2q_u16 (__addr); | |
6964 | } | |
6965 | ||
6966 | __extension__ extern __inline int16x8x4_t | |
6967 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6968 | __arm_vld4q (int16_t const * __addr) | |
6969 | { | |
6970 | return __arm_vld4q_s16 (__addr); | |
6971 | } | |
6972 | ||
6973 | __extension__ extern __inline uint16x8x4_t | |
6974 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6975 | __arm_vld4q (uint16_t const * __addr) | |
6976 | { | |
6977 | return __arm_vld4q_u16 (__addr); | |
6978 | } | |
6979 | ||
6980 | __extension__ extern __inline void | |
6981 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6982 | __arm_vst1q_p (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p) | |
6983 | { | |
6984 | __arm_vst1q_p_u32 (__addr, __value, __p); | |
6985 | } | |
6986 | ||
6987 | __extension__ extern __inline void | |
6988 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6989 | __arm_vst1q_p (int32_t * __addr, int32x4_t __value, mve_pred16_t __p) | |
6990 | { | |
6991 | __arm_vst1q_p_s32 (__addr, __value, __p); | |
6992 | } | |
6993 | ||
6994 | __extension__ extern __inline void | |
6995 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
6996 | __arm_vst2q (int32_t * __addr, int32x4x2_t __value) | |
6997 | { | |
6998 | __arm_vst2q_s32 (__addr, __value); | |
6999 | } | |
7000 | ||
7001 | __extension__ extern __inline void | |
7002 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7003 | __arm_vst2q (uint32_t * __addr, uint32x4x2_t __value) | |
7004 | { | |
7005 | __arm_vst2q_u32 (__addr, __value); | |
7006 | } | |
7007 | ||
7008 | __extension__ extern __inline uint32x4_t | |
7009 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7010 | __arm_vld1q_z (uint32_t const *__base, mve_pred16_t __p) | |
7011 | { | |
7012 | return __arm_vld1q_z_u32 (__base, __p); | |
7013 | } | |
7014 | ||
7015 | __extension__ extern __inline int32x4_t | |
7016 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7017 | __arm_vld1q_z (int32_t const *__base, mve_pred16_t __p) | |
7018 | { | |
7019 | return __arm_vld1q_z_s32 (__base, __p); | |
7020 | } | |
7021 | ||
7022 | __extension__ extern __inline int32x4x2_t | |
7023 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7024 | __arm_vld2q (int32_t const * __addr) | |
7025 | { | |
7026 | return __arm_vld2q_s32 (__addr); | |
7027 | } | |
7028 | ||
7029 | __extension__ extern __inline uint32x4x2_t | |
7030 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7031 | __arm_vld2q (uint32_t const * __addr) | |
7032 | { | |
7033 | return __arm_vld2q_u32 (__addr); | |
7034 | } | |
7035 | ||
7036 | __extension__ extern __inline int32x4x4_t | |
7037 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7038 | __arm_vld4q (int32_t const * __addr) | |
7039 | { | |
7040 | return __arm_vld4q_s32 (__addr); | |
7041 | } | |
7042 | ||
7043 | __extension__ extern __inline uint32x4x4_t | |
7044 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7045 | __arm_vld4q (uint32_t const * __addr) | |
7046 | { | |
7047 | return __arm_vld4q_u32 (__addr); | |
7048 | } | |
7049 | ||
7050 | __extension__ extern __inline int16x8_t | |
7051 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7052 | __arm_vsetq_lane (int16_t __a, int16x8_t __b, const int __idx) | |
7053 | { | |
7054 | return __arm_vsetq_lane_s16 (__a, __b, __idx); | |
7055 | } | |
7056 | ||
7057 | __extension__ extern __inline int32x4_t | |
7058 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7059 | __arm_vsetq_lane (int32_t __a, int32x4_t __b, const int __idx) | |
7060 | { | |
7061 | return __arm_vsetq_lane_s32 (__a, __b, __idx); | |
7062 | } | |
7063 | ||
7064 | __extension__ extern __inline int8x16_t | |
7065 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7066 | __arm_vsetq_lane (int8_t __a, int8x16_t __b, const int __idx) | |
7067 | { | |
7068 | return __arm_vsetq_lane_s8 (__a, __b, __idx); | |
7069 | } | |
7070 | ||
7071 | __extension__ extern __inline int64x2_t | |
7072 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7073 | __arm_vsetq_lane (int64_t __a, int64x2_t __b, const int __idx) | |
7074 | { | |
7075 | return __arm_vsetq_lane_s64 (__a, __b, __idx); | |
7076 | } | |
7077 | ||
7078 | __extension__ extern __inline uint8x16_t | |
7079 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7080 | __arm_vsetq_lane (uint8_t __a, uint8x16_t __b, const int __idx) | |
7081 | { | |
7082 | return __arm_vsetq_lane_u8 (__a, __b, __idx); | |
7083 | } | |
7084 | ||
7085 | __extension__ extern __inline uint16x8_t | |
7086 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7087 | __arm_vsetq_lane (uint16_t __a, uint16x8_t __b, const int __idx) | |
7088 | { | |
7089 | return __arm_vsetq_lane_u16 (__a, __b, __idx); | |
7090 | } | |
7091 | ||
7092 | __extension__ extern __inline uint32x4_t | |
7093 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7094 | __arm_vsetq_lane (uint32_t __a, uint32x4_t __b, const int __idx) | |
7095 | { | |
7096 | return __arm_vsetq_lane_u32 (__a, __b, __idx); | |
7097 | } | |
7098 | ||
7099 | __extension__ extern __inline uint64x2_t | |
7100 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7101 | __arm_vsetq_lane (uint64_t __a, uint64x2_t __b, const int __idx) | |
7102 | { | |
7103 | return __arm_vsetq_lane_u64 (__a, __b, __idx); | |
7104 | } | |
7105 | ||
7106 | __extension__ extern __inline int16_t | |
7107 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7108 | __arm_vgetq_lane (int16x8_t __a, const int __idx) | |
7109 | { | |
7110 | return __arm_vgetq_lane_s16 (__a, __idx); | |
7111 | } | |
7112 | ||
7113 | __extension__ extern __inline int32_t | |
7114 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7115 | __arm_vgetq_lane (int32x4_t __a, const int __idx) | |
7116 | { | |
7117 | return __arm_vgetq_lane_s32 (__a, __idx); | |
7118 | } | |
7119 | ||
7120 | __extension__ extern __inline int8_t | |
7121 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7122 | __arm_vgetq_lane (int8x16_t __a, const int __idx) | |
7123 | { | |
7124 | return __arm_vgetq_lane_s8 (__a, __idx); | |
7125 | } | |
7126 | ||
7127 | __extension__ extern __inline int64_t | |
7128 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7129 | __arm_vgetq_lane (int64x2_t __a, const int __idx) | |
7130 | { | |
7131 | return __arm_vgetq_lane_s64 (__a, __idx); | |
7132 | } | |
7133 | ||
7134 | __extension__ extern __inline uint8_t | |
7135 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7136 | __arm_vgetq_lane (uint8x16_t __a, const int __idx) | |
7137 | { | |
7138 | return __arm_vgetq_lane_u8 (__a, __idx); | |
7139 | } | |
7140 | ||
7141 | __extension__ extern __inline uint16_t | |
7142 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7143 | __arm_vgetq_lane (uint16x8_t __a, const int __idx) | |
7144 | { | |
7145 | return __arm_vgetq_lane_u16 (__a, __idx); | |
7146 | } | |
7147 | ||
7148 | __extension__ extern __inline uint32_t | |
7149 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7150 | __arm_vgetq_lane (uint32x4_t __a, const int __idx) | |
7151 | { | |
7152 | return __arm_vgetq_lane_u32 (__a, __idx); | |
7153 | } | |
7154 | ||
7155 | __extension__ extern __inline uint64_t | |
7156 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7157 | __arm_vgetq_lane (uint64x2_t __a, const int __idx) | |
7158 | { | |
7159 | return __arm_vgetq_lane_u64 (__a, __idx); | |
7160 | } | |
7161 | ||
7162 | __extension__ extern __inline int8x16_t | |
7163 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7164 | __arm_vshlcq_m (int8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
7165 | { | |
7166 | return __arm_vshlcq_m_s8 (__a, __b, __imm, __p); | |
7167 | } | |
7168 | ||
7169 | __extension__ extern __inline uint8x16_t | |
7170 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7171 | __arm_vshlcq_m (uint8x16_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
7172 | { | |
7173 | return __arm_vshlcq_m_u8 (__a, __b, __imm, __p); | |
7174 | } | |
7175 | ||
7176 | __extension__ extern __inline int16x8_t | |
7177 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7178 | __arm_vshlcq_m (int16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
7179 | { | |
7180 | return __arm_vshlcq_m_s16 (__a, __b, __imm, __p); | |
7181 | } | |
7182 | ||
7183 | __extension__ extern __inline uint16x8_t | |
7184 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7185 | __arm_vshlcq_m (uint16x8_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
7186 | { | |
7187 | return __arm_vshlcq_m_u16 (__a, __b, __imm, __p); | |
7188 | } | |
7189 | ||
7190 | __extension__ extern __inline int32x4_t | |
7191 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7192 | __arm_vshlcq_m (int32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
7193 | { | |
7194 | return __arm_vshlcq_m_s32 (__a, __b, __imm, __p); | |
7195 | } | |
7196 | ||
7197 | __extension__ extern __inline uint32x4_t | |
7198 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7199 | __arm_vshlcq_m (uint32x4_t __a, uint32_t * __b, const int __imm, mve_pred16_t __p) | |
7200 | { | |
7201 | return __arm_vshlcq_m_u32 (__a, __b, __imm, __p); | |
7202 | } | |
7203 | ||
7204 | #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ | |
7205 | ||
7206 | __extension__ extern __inline void | |
7207 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7208 | __arm_vst4q (float16_t * __addr, float16x8x4_t __value) | |
7209 | { | |
7210 | __arm_vst4q_f16 (__addr, __value); | |
7211 | } | |
7212 | ||
7213 | __extension__ extern __inline void | |
7214 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7215 | __arm_vst4q (float32_t * __addr, float32x4x4_t __value) | |
7216 | { | |
7217 | __arm_vst4q_f32 (__addr, __value); | |
7218 | } | |
7219 | ||
6a90680b ASDV |
7220 | __extension__ extern __inline float32x4_t |
7221 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7222 | __arm_vcvttq_f32 (float16x8_t __a) | |
7223 | { | |
7224 | return __arm_vcvttq_f32_f16 (__a); | |
7225 | } | |
7226 | ||
7227 | __extension__ extern __inline float32x4_t | |
7228 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7229 | __arm_vcvtbq_f32 (float16x8_t __a) | |
7230 | { | |
7231 | return __arm_vcvtbq_f32_f16 (__a); | |
7232 | } | |
7233 | ||
7234 | __extension__ extern __inline float16x8_t | |
7235 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7236 | __arm_vcvtq (int16x8_t __a) | |
7237 | { | |
7238 | return __arm_vcvtq_f16_s16 (__a); | |
7239 | } | |
7240 | ||
7241 | __extension__ extern __inline float32x4_t | |
7242 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7243 | __arm_vcvtq (int32x4_t __a) | |
7244 | { | |
7245 | return __arm_vcvtq_f32_s32 (__a); | |
7246 | } | |
7247 | ||
7248 | __extension__ extern __inline float16x8_t | |
7249 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7250 | __arm_vcvtq (uint16x8_t __a) | |
7251 | { | |
7674ae25 | 7252 | return __arm_vcvtq_f16_u16 (__a); |
6a90680b ASDV |
7253 | } |
7254 | ||
7674ae25 | 7255 | __extension__ extern __inline float32x4_t |
6a90680b | 7256 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7257 | __arm_vcvtq (uint32x4_t __a) |
6a90680b | 7258 | { |
7674ae25 | 7259 | return __arm_vcvtq_f32_u32 (__a); |
6a90680b ASDV |
7260 | } |
7261 | ||
7674ae25 | 7262 | __extension__ extern __inline float16x8_t |
6a90680b | 7263 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7264 | __arm_vcvtq_n (int16x8_t __a, const int __imm6) |
6a90680b | 7265 | { |
7674ae25 | 7266 | return __arm_vcvtq_n_f16_s16 (__a, __imm6); |
6a90680b ASDV |
7267 | } |
7268 | ||
7674ae25 | 7269 | __extension__ extern __inline float32x4_t |
6a90680b | 7270 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7271 | __arm_vcvtq_n (int32x4_t __a, const int __imm6) |
6a90680b | 7272 | { |
7674ae25 | 7273 | return __arm_vcvtq_n_f32_s32 (__a, __imm6); |
6a90680b ASDV |
7274 | } |
7275 | ||
7674ae25 | 7276 | __extension__ extern __inline float16x8_t |
6a90680b | 7277 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7278 | __arm_vcvtq_n (uint16x8_t __a, const int __imm6) |
6a90680b | 7279 | { |
7674ae25 | 7280 | return __arm_vcvtq_n_f16_u16 (__a, __imm6); |
6a90680b ASDV |
7281 | } |
7282 | ||
7674ae25 | 7283 | __extension__ extern __inline float32x4_t |
6a90680b | 7284 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7285 | __arm_vcvtq_n (uint32x4_t __a, const int __imm6) |
6a90680b | 7286 | { |
7674ae25 | 7287 | return __arm_vcvtq_n_f32_u32 (__a, __imm6); |
6a90680b ASDV |
7288 | } |
7289 | ||
7674ae25 | 7290 | __extension__ extern __inline float16x8_t |
6a90680b | 7291 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7292 | __arm_vornq (float16x8_t __a, float16x8_t __b) |
6a90680b | 7293 | { |
7674ae25 | 7294 | return __arm_vornq_f16 (__a, __b); |
6a90680b ASDV |
7295 | } |
7296 | ||
7674ae25 | 7297 | __extension__ extern __inline float16x8_t |
6a90680b | 7298 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) |
7674ae25 | 7299 | __arm_vbicq (float16x8_t __a, float16x8_t __b) |
6a90680b | 7300 | { |
7674ae25 | 7301 | return __arm_vbicq_f16 (__a, __b); |
6a90680b ASDV |
7302 | } |
7303 | ||
6a90680b ASDV |
7304 | __extension__ extern __inline float32x4_t |
7305 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7306 | __arm_vornq (float32x4_t __a, float32x4_t __b) | |
7307 | { | |
7308 | return __arm_vornq_f32 (__a, __b); | |
7309 | } | |
7310 | ||
6a90680b ASDV |
7311 | __extension__ extern __inline float32x4_t |
7312 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7313 | __arm_vbicq (float32x4_t __a, float32x4_t __b) | |
7314 | { | |
7315 | return __arm_vbicq_f32 (__a, __b); | |
7316 | } | |
7317 | ||
6a90680b ASDV |
7318 | __extension__ extern __inline int16x8_t |
7319 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7320 | __arm_vcvtaq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7321 | { | |
7322 | return __arm_vcvtaq_m_s16_f16 (__inactive, __a, __p); | |
7323 | } | |
7324 | ||
7325 | __extension__ extern __inline uint16x8_t | |
7326 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7327 | __arm_vcvtaq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7328 | { | |
7329 | return __arm_vcvtaq_m_u16_f16 (__inactive, __a, __p); | |
7330 | } | |
7331 | ||
7332 | __extension__ extern __inline int32x4_t | |
7333 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7334 | __arm_vcvtaq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7335 | { | |
7336 | return __arm_vcvtaq_m_s32_f32 (__inactive, __a, __p); | |
7337 | } | |
7338 | ||
7339 | __extension__ extern __inline uint32x4_t | |
7340 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7341 | __arm_vcvtaq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7342 | { | |
7343 | return __arm_vcvtaq_m_u32_f32 (__inactive, __a, __p); | |
7344 | } | |
7345 | ||
7346 | __extension__ extern __inline float16x8_t | |
7347 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7348 | __arm_vcvtq_m (float16x8_t __inactive, int16x8_t __a, mve_pred16_t __p) | |
7349 | { | |
7350 | return __arm_vcvtq_m_f16_s16 (__inactive, __a, __p); | |
7351 | } | |
7352 | ||
7353 | __extension__ extern __inline float16x8_t | |
7354 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7355 | __arm_vcvtq_m (float16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p) | |
7356 | { | |
7357 | return __arm_vcvtq_m_f16_u16 (__inactive, __a, __p); | |
7358 | } | |
7359 | ||
7360 | __extension__ extern __inline float32x4_t | |
7361 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7362 | __arm_vcvtq_m (float32x4_t __inactive, int32x4_t __a, mve_pred16_t __p) | |
7363 | { | |
7364 | return __arm_vcvtq_m_f32_s32 (__inactive, __a, __p); | |
7365 | } | |
7366 | ||
7367 | __extension__ extern __inline float32x4_t | |
7368 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7369 | __arm_vcvtq_m (float32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p) | |
7370 | { | |
7371 | return __arm_vcvtq_m_f32_u32 (__inactive, __a, __p); | |
7372 | } | |
7373 | ||
7374 | __extension__ extern __inline float16x8_t | |
7375 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7376 | __arm_vcvtbq_m (float16x8_t __a, float32x4_t __b, mve_pred16_t __p) | |
7377 | { | |
7378 | return __arm_vcvtbq_m_f16_f32 (__a, __b, __p); | |
7379 | } | |
7380 | ||
7381 | __extension__ extern __inline float32x4_t | |
7382 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7383 | __arm_vcvtbq_m (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7384 | { | |
7385 | return __arm_vcvtbq_m_f32_f16 (__inactive, __a, __p); | |
7386 | } | |
7387 | ||
7388 | __extension__ extern __inline float16x8_t | |
7389 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7390 | __arm_vcvttq_m (float16x8_t __a, float32x4_t __b, mve_pred16_t __p) | |
7391 | { | |
7392 | return __arm_vcvttq_m_f16_f32 (__a, __b, __p); | |
7393 | } | |
7394 | ||
7395 | __extension__ extern __inline float32x4_t | |
7396 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7397 | __arm_vcvttq_m (float32x4_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7398 | { | |
7399 | return __arm_vcvttq_m_f32_f16 (__inactive, __a, __p); | |
7400 | } | |
7401 | ||
6a90680b ASDV |
7402 | __extension__ extern __inline int16x8_t |
7403 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7404 | __arm_vcvtmq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7405 | { | |
7406 | return __arm_vcvtmq_m_s16_f16 (__inactive, __a, __p); | |
7407 | } | |
7408 | ||
7409 | __extension__ extern __inline int16x8_t | |
7410 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7411 | __arm_vcvtnq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7412 | { | |
7413 | return __arm_vcvtnq_m_s16_f16 (__inactive, __a, __p); | |
7414 | } | |
7415 | ||
7416 | __extension__ extern __inline int16x8_t | |
7417 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7418 | __arm_vcvtpq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7419 | { | |
7420 | return __arm_vcvtpq_m_s16_f16 (__inactive, __a, __p); | |
7421 | } | |
7422 | ||
7423 | __extension__ extern __inline int16x8_t | |
7424 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7425 | __arm_vcvtq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7426 | { | |
7427 | return __arm_vcvtq_m_s16_f16 (__inactive, __a, __p); | |
7428 | } | |
7429 | ||
6a90680b ASDV |
7430 | __extension__ extern __inline uint16x8_t |
7431 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7432 | __arm_vcvtmq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7433 | { | |
7434 | return __arm_vcvtmq_m_u16_f16 (__inactive, __a, __p); | |
7435 | } | |
7436 | ||
7437 | __extension__ extern __inline uint16x8_t | |
7438 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7439 | __arm_vcvtnq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7440 | { | |
7441 | return __arm_vcvtnq_m_u16_f16 (__inactive, __a, __p); | |
7442 | } | |
7443 | ||
7444 | __extension__ extern __inline uint16x8_t | |
7445 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7446 | __arm_vcvtpq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7447 | { | |
7448 | return __arm_vcvtpq_m_u16_f16 (__inactive, __a, __p); | |
7449 | } | |
7450 | ||
7451 | __extension__ extern __inline uint16x8_t | |
7452 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7453 | __arm_vcvtq_m (uint16x8_t __inactive, float16x8_t __a, mve_pred16_t __p) | |
7454 | { | |
7455 | return __arm_vcvtq_m_u16_f16 (__inactive, __a, __p); | |
7456 | } | |
7457 | ||
6a90680b ASDV |
7458 | __extension__ extern __inline int32x4_t |
7459 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7460 | __arm_vcvtmq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7461 | { | |
7462 | return __arm_vcvtmq_m_s32_f32 (__inactive, __a, __p); | |
7463 | } | |
7464 | ||
7465 | __extension__ extern __inline int32x4_t | |
7466 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7467 | __arm_vcvtnq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7468 | { | |
7469 | return __arm_vcvtnq_m_s32_f32 (__inactive, __a, __p); | |
7470 | } | |
7471 | ||
7472 | __extension__ extern __inline int32x4_t | |
7473 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7474 | __arm_vcvtpq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7475 | { | |
7476 | return __arm_vcvtpq_m_s32_f32 (__inactive, __a, __p); | |
7477 | } | |
7478 | ||
7479 | __extension__ extern __inline int32x4_t | |
7480 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7481 | __arm_vcvtq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7482 | { | |
7483 | return __arm_vcvtq_m_s32_f32 (__inactive, __a, __p); | |
7484 | } | |
7485 | ||
6a90680b ASDV |
7486 | __extension__ extern __inline uint32x4_t |
7487 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7488 | __arm_vcvtmq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7489 | { | |
7490 | return __arm_vcvtmq_m_u32_f32 (__inactive, __a, __p); | |
7491 | } | |
7492 | ||
7493 | __extension__ extern __inline uint32x4_t | |
7494 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7495 | __arm_vcvtnq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7496 | { | |
7497 | return __arm_vcvtnq_m_u32_f32 (__inactive, __a, __p); | |
7498 | } | |
7499 | ||
7500 | __extension__ extern __inline uint32x4_t | |
7501 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7502 | __arm_vcvtpq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7503 | { | |
7504 | return __arm_vcvtpq_m_u32_f32 (__inactive, __a, __p); | |
7505 | } | |
7506 | ||
7507 | __extension__ extern __inline uint32x4_t | |
7508 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7509 | __arm_vcvtq_m (uint32x4_t __inactive, float32x4_t __a, mve_pred16_t __p) | |
7510 | { | |
7511 | return __arm_vcvtq_m_u32_f32 (__inactive, __a, __p); | |
7512 | } | |
7513 | ||
7514 | __extension__ extern __inline float16x8_t | |
7515 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7516 | __arm_vcvtq_m_n (float16x8_t __inactive, uint16x8_t __a, const int __imm6, mve_pred16_t __p) | |
7517 | { | |
7518 | return __arm_vcvtq_m_n_f16_u16 (__inactive, __a, __imm6, __p); | |
7519 | } | |
7520 | ||
7521 | __extension__ extern __inline float16x8_t | |
7522 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7523 | __arm_vcvtq_m_n (float16x8_t __inactive, int16x8_t __a, const int __imm6, mve_pred16_t __p) | |
7524 | { | |
7525 | return __arm_vcvtq_m_n_f16_s16 (__inactive, __a, __imm6, __p); | |
7526 | } | |
7527 | ||
7528 | __extension__ extern __inline float32x4_t | |
7529 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7530 | __arm_vcvtq_m_n (float32x4_t __inactive, uint32x4_t __a, const int __imm6, mve_pred16_t __p) | |
7531 | { | |
7532 | return __arm_vcvtq_m_n_f32_u32 (__inactive, __a, __imm6, __p); | |
7533 | } | |
7534 | ||
7535 | __extension__ extern __inline float32x4_t | |
7536 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7537 | __arm_vcvtq_m_n (float32x4_t __inactive, int32x4_t __a, const int __imm6, mve_pred16_t __p) | |
7538 | { | |
7539 | return __arm_vcvtq_m_n_f32_s32 (__inactive, __a, __imm6, __p); | |
7540 | } | |
7541 | ||
6a90680b ASDV |
7542 | __extension__ extern __inline float32x4_t |
7543 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7544 | __arm_vbicq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p) | |
7545 | { | |
7546 | return __arm_vbicq_m_f32 (__inactive, __a, __b, __p); | |
7547 | } | |
7548 | ||
7549 | __extension__ extern __inline float16x8_t | |
7550 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7551 | __arm_vbicq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p) | |
7552 | { | |
7553 | return __arm_vbicq_m_f16 (__inactive, __a, __b, __p); | |
7554 | } | |
7555 | ||
6a90680b ASDV |
7556 | __extension__ extern __inline int32x4_t |
7557 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7558 | __arm_vcvtq_m_n (int32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p) | |
7559 | { | |
7560 | return __arm_vcvtq_m_n_s32_f32 (__inactive, __a, __imm6, __p); | |
7561 | } | |
7562 | ||
7563 | __extension__ extern __inline int16x8_t | |
7564 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7565 | __arm_vcvtq_m_n (int16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p) | |
7566 | { | |
7567 | return __arm_vcvtq_m_n_s16_f16 (__inactive, __a, __imm6, __p); | |
7568 | } | |
7569 | ||
7570 | __extension__ extern __inline uint32x4_t | |
7571 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7572 | __arm_vcvtq_m_n (uint32x4_t __inactive, float32x4_t __a, const int __imm6, mve_pred16_t __p) | |
7573 | { | |
7574 | return __arm_vcvtq_m_n_u32_f32 (__inactive, __a, __imm6, __p); | |
7575 | } | |
7576 | ||
7577 | __extension__ extern __inline uint16x8_t | |
7578 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7579 | __arm_vcvtq_m_n (uint16x8_t __inactive, float16x8_t __a, const int __imm6, mve_pred16_t __p) | |
7580 | { | |
7581 | return __arm_vcvtq_m_n_u16_f16 (__inactive, __a, __imm6, __p); | |
7582 | } | |
7583 | ||
6a90680b ASDV |
7584 | __extension__ extern __inline float32x4_t |
7585 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7586 | __arm_vornq_m (float32x4_t __inactive, float32x4_t __a, float32x4_t __b, mve_pred16_t __p) | |
7587 | { | |
7588 | return __arm_vornq_m_f32 (__inactive, __a, __b, __p); | |
7589 | } | |
7590 | ||
7591 | __extension__ extern __inline float16x8_t | |
7592 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7593 | __arm_vornq_m (float16x8_t __inactive, float16x8_t __a, float16x8_t __b, mve_pred16_t __p) | |
7594 | { | |
7595 | return __arm_vornq_m_f16 (__inactive, __a, __b, __p); | |
7596 | } | |
7597 | ||
6a90680b ASDV |
7598 | __extension__ extern __inline float16x8_t |
7599 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7600 | __arm_vldrhq_gather_offset (float16_t const * __base, uint16x8_t __offset) | |
7601 | { | |
7602 | return __arm_vldrhq_gather_offset_f16 (__base, __offset); | |
7603 | } | |
7604 | ||
7605 | __extension__ extern __inline float16x8_t | |
7606 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7607 | __arm_vldrhq_gather_offset_z (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
7608 | { | |
7609 | return __arm_vldrhq_gather_offset_z_f16 (__base, __offset, __p); | |
7610 | } | |
7611 | ||
7612 | __extension__ extern __inline float16x8_t | |
7613 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7614 | __arm_vldrhq_gather_shifted_offset (float16_t const * __base, uint16x8_t __offset) | |
7615 | { | |
7616 | return __arm_vldrhq_gather_shifted_offset_f16 (__base, __offset); | |
7617 | } | |
7618 | ||
7619 | __extension__ extern __inline float16x8_t | |
7620 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7621 | __arm_vldrhq_gather_shifted_offset_z (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p) | |
7622 | { | |
7623 | return __arm_vldrhq_gather_shifted_offset_z_f16 (__base, __offset, __p); | |
7624 | } | |
7625 | ||
7626 | __extension__ extern __inline float32x4_t | |
7627 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7628 | __arm_vldrwq_gather_offset (float32_t const * __base, uint32x4_t __offset) | |
7629 | { | |
7630 | return __arm_vldrwq_gather_offset_f32 (__base, __offset); | |
7631 | } | |
7632 | ||
7633 | __extension__ extern __inline float32x4_t | |
7634 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7635 | __arm_vldrwq_gather_offset_z (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
7636 | { | |
7637 | return __arm_vldrwq_gather_offset_z_f32 (__base, __offset, __p); | |
7638 | } | |
7639 | ||
7640 | __extension__ extern __inline float32x4_t | |
7641 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7642 | __arm_vldrwq_gather_shifted_offset (float32_t const * __base, uint32x4_t __offset) | |
7643 | { | |
7644 | return __arm_vldrwq_gather_shifted_offset_f32 (__base, __offset); | |
7645 | } | |
7646 | ||
7647 | __extension__ extern __inline float32x4_t | |
7648 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7649 | __arm_vldrwq_gather_shifted_offset_z (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p) | |
7650 | { | |
7651 | return __arm_vldrwq_gather_shifted_offset_z_f32 (__base, __offset, __p); | |
7652 | } | |
7653 | ||
7654 | __extension__ extern __inline void | |
7655 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7656 | __arm_vstrwq_p (float32_t * __addr, float32x4_t __value, mve_pred16_t __p) | |
7657 | { | |
7658 | __arm_vstrwq_p_f32 (__addr, __value, __p); | |
7659 | } | |
7660 | ||
7661 | __extension__ extern __inline void | |
7662 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7663 | __arm_vstrwq (float32_t * __addr, float32x4_t __value) | |
7664 | { | |
7665 | __arm_vstrwq_f32 (__addr, __value); | |
7666 | } | |
7667 | ||
6a90680b ASDV |
7668 | __extension__ extern __inline void |
7669 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7670 | __arm_vstrhq (float16_t * __addr, float16x8_t __value) | |
7671 | { | |
7672 | __arm_vstrhq_f16 (__addr, __value); | |
7673 | } | |
7674 | ||
7675 | __extension__ extern __inline void | |
7676 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7677 | __arm_vstrhq_p (float16_t * __addr, float16x8_t __value, mve_pred16_t __p) | |
7678 | { | |
7679 | __arm_vstrhq_p_f16 (__addr, __value, __p); | |
7680 | } | |
7681 | ||
7682 | __extension__ extern __inline void | |
7683 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7684 | __arm_vstrhq_scatter_offset (float16_t * __base, uint16x8_t __offset, float16x8_t __value) | |
7685 | { | |
7686 | __arm_vstrhq_scatter_offset_f16 (__base, __offset, __value); | |
7687 | } | |
7688 | ||
7689 | __extension__ extern __inline void | |
7690 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7691 | __arm_vstrhq_scatter_offset_p (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p) | |
7692 | { | |
7693 | __arm_vstrhq_scatter_offset_p_f16 (__base, __offset, __value, __p); | |
7694 | } | |
7695 | ||
7696 | __extension__ extern __inline void | |
7697 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7698 | __arm_vstrhq_scatter_shifted_offset (float16_t * __base, uint16x8_t __offset, float16x8_t __value) | |
7699 | { | |
7700 | __arm_vstrhq_scatter_shifted_offset_f16 (__base, __offset, __value); | |
7701 | } | |
7702 | ||
7703 | __extension__ extern __inline void | |
7704 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7705 | __arm_vstrhq_scatter_shifted_offset_p (float16_t * __base, uint16x8_t __offset, float16x8_t __value, mve_pred16_t __p) | |
7706 | { | |
7707 | __arm_vstrhq_scatter_shifted_offset_p_f16 (__base, __offset, __value, __p); | |
7708 | } | |
7709 | ||
7710 | __extension__ extern __inline void | |
7711 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7712 | __arm_vstrwq_scatter_base (uint32x4_t __addr, const int __offset, float32x4_t __value) | |
7713 | { | |
7714 | __arm_vstrwq_scatter_base_f32 (__addr, __offset, __value); | |
7715 | } | |
7716 | ||
7717 | __extension__ extern __inline void | |
7718 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7719 | __arm_vstrwq_scatter_base_p (uint32x4_t __addr, const int __offset, float32x4_t __value, mve_pred16_t __p) | |
7720 | { | |
7721 | __arm_vstrwq_scatter_base_p_f32 (__addr, __offset, __value, __p); | |
7722 | } | |
7723 | ||
7724 | __extension__ extern __inline void | |
7725 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7726 | __arm_vstrwq_scatter_offset (float32_t * __base, uint32x4_t __offset, float32x4_t __value) | |
7727 | { | |
7728 | __arm_vstrwq_scatter_offset_f32 (__base, __offset, __value); | |
7729 | } | |
7730 | ||
7731 | __extension__ extern __inline void | |
7732 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7733 | __arm_vstrwq_scatter_offset_p (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p) | |
7734 | { | |
7735 | __arm_vstrwq_scatter_offset_p_f32 (__base, __offset, __value, __p); | |
7736 | } | |
7737 | ||
7738 | __extension__ extern __inline void | |
7739 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7740 | __arm_vstrwq_scatter_shifted_offset (float32_t * __base, uint32x4_t __offset, float32x4_t __value) | |
7741 | { | |
7742 | __arm_vstrwq_scatter_shifted_offset_f32 (__base, __offset, __value); | |
7743 | } | |
7744 | ||
7745 | __extension__ extern __inline void | |
7746 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7747 | __arm_vstrwq_scatter_shifted_offset_p (float32_t * __base, uint32x4_t __offset, float32x4_t __value, mve_pred16_t __p) | |
7748 | { | |
7749 | __arm_vstrwq_scatter_shifted_offset_p_f32 (__base, __offset, __value, __p); | |
7750 | } | |
7751 | ||
6a90680b ASDV |
7752 | __extension__ extern __inline void |
7753 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7754 | __arm_vstrwq_scatter_base_wb (uint32x4_t * __addr, const int __offset, float32x4_t __value) | |
7755 | { | |
7756 | __arm_vstrwq_scatter_base_wb_f32 (__addr, __offset, __value); | |
7757 | } | |
7758 | ||
7759 | __extension__ extern __inline void | |
7760 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7761 | __arm_vstrwq_scatter_base_wb_p (uint32x4_t * __addr, const int __offset, float32x4_t __value, mve_pred16_t __p) | |
7762 | { | |
7763 | __arm_vstrwq_scatter_base_wb_p_f32 (__addr, __offset, __value, __p); | |
7764 | } | |
7765 | ||
6a90680b ASDV |
7766 | __extension__ extern __inline float16x8_t |
7767 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7768 | __arm_vcvtq_x (uint16x8_t __a, mve_pred16_t __p) | |
7769 | { | |
7770 | return __arm_vcvtq_x_f16_u16 (__a, __p); | |
7771 | } | |
7772 | ||
7773 | __extension__ extern __inline float16x8_t | |
7774 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7775 | __arm_vcvtq_x (int16x8_t __a, mve_pred16_t __p) | |
7776 | { | |
7777 | return __arm_vcvtq_x_f16_s16 (__a, __p); | |
7778 | } | |
7779 | ||
7780 | __extension__ extern __inline float32x4_t | |
7781 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7782 | __arm_vcvtq_x (int32x4_t __a, mve_pred16_t __p) | |
7783 | { | |
7784 | return __arm_vcvtq_x_f32_s32 (__a, __p); | |
7785 | } | |
7786 | ||
7787 | __extension__ extern __inline float32x4_t | |
7788 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7789 | __arm_vcvtq_x (uint32x4_t __a, mve_pred16_t __p) | |
7790 | { | |
7791 | return __arm_vcvtq_x_f32_u32 (__a, __p); | |
7792 | } | |
7793 | ||
7794 | __extension__ extern __inline float16x8_t | |
7795 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7796 | __arm_vcvtq_x_n (int16x8_t __a, const int __imm6, mve_pred16_t __p) | |
7797 | { | |
7798 | return __arm_vcvtq_x_n_f16_s16 (__a, __imm6, __p); | |
7799 | } | |
7800 | ||
7801 | __extension__ extern __inline float16x8_t | |
7802 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7803 | __arm_vcvtq_x_n (uint16x8_t __a, const int __imm6, mve_pred16_t __p) | |
7804 | { | |
7805 | return __arm_vcvtq_x_n_f16_u16 (__a, __imm6, __p); | |
7806 | } | |
7807 | ||
7808 | __extension__ extern __inline float32x4_t | |
7809 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7810 | __arm_vcvtq_x_n (int32x4_t __a, const int __imm6, mve_pred16_t __p) | |
7811 | { | |
7812 | return __arm_vcvtq_x_n_f32_s32 (__a, __imm6, __p); | |
7813 | } | |
7814 | ||
7815 | __extension__ extern __inline float32x4_t | |
7816 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7817 | __arm_vcvtq_x_n (uint32x4_t __a, const int __imm6, mve_pred16_t __p) | |
7818 | { | |
7819 | return __arm_vcvtq_x_n_f32_u32 (__a, __imm6, __p); | |
7820 | } | |
7821 | ||
6a90680b ASDV |
7822 | __extension__ extern __inline float16x8_t |
7823 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7824 | __arm_vbicq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p) | |
7825 | { | |
7826 | return __arm_vbicq_x_f16 (__a, __b, __p); | |
7827 | } | |
7828 | ||
7829 | __extension__ extern __inline float32x4_t | |
7830 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7831 | __arm_vbicq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p) | |
7832 | { | |
7833 | return __arm_vbicq_x_f32 (__a, __b, __p); | |
7834 | } | |
7835 | ||
6a90680b ASDV |
7836 | __extension__ extern __inline float16x8_t |
7837 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7838 | __arm_vornq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p) | |
7839 | { | |
7840 | return __arm_vornq_x_f16 (__a, __b, __p); | |
7841 | } | |
7842 | ||
7843 | __extension__ extern __inline float32x4_t | |
7844 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7845 | __arm_vornq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p) | |
7846 | { | |
7847 | return __arm_vornq_x_f32 (__a, __b, __p); | |
7848 | } | |
7849 | ||
6a90680b ASDV |
7850 | __extension__ extern __inline float16x8x4_t |
7851 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7852 | __arm_vld4q (float16_t const * __addr) | |
7853 | { | |
7854 | return __arm_vld4q_f16 (__addr); | |
7855 | } | |
7856 | ||
7857 | __extension__ extern __inline float16x8x2_t | |
7858 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7859 | __arm_vld2q (float16_t const * __addr) | |
7860 | { | |
7861 | return __arm_vld2q_f16 (__addr); | |
7862 | } | |
7863 | ||
7864 | __extension__ extern __inline float16x8_t | |
7865 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7866 | __arm_vld1q_z (float16_t const *__base, mve_pred16_t __p) | |
7867 | { | |
7868 | return __arm_vld1q_z_f16 (__base, __p); | |
7869 | } | |
7870 | ||
7871 | __extension__ extern __inline void | |
7872 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7873 | __arm_vst2q (float16_t * __addr, float16x8x2_t __value) | |
7874 | { | |
7875 | __arm_vst2q_f16 (__addr, __value); | |
7876 | } | |
7877 | ||
7878 | __extension__ extern __inline void | |
7879 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7880 | __arm_vst1q_p (float16_t * __addr, float16x8_t __value, mve_pred16_t __p) | |
7881 | { | |
7882 | __arm_vst1q_p_f16 (__addr, __value, __p); | |
7883 | } | |
7884 | ||
7885 | __extension__ extern __inline float32x4x4_t | |
7886 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7887 | __arm_vld4q (float32_t const * __addr) | |
7888 | { | |
7889 | return __arm_vld4q_f32 (__addr); | |
7890 | } | |
7891 | ||
7892 | __extension__ extern __inline float32x4x2_t | |
7893 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7894 | __arm_vld2q (float32_t const * __addr) | |
7895 | { | |
7896 | return __arm_vld2q_f32 (__addr); | |
7897 | } | |
7898 | ||
7899 | __extension__ extern __inline float32x4_t | |
7900 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7901 | __arm_vld1q_z (float32_t const *__base, mve_pred16_t __p) | |
7902 | { | |
7903 | return __arm_vld1q_z_f32 (__base, __p); | |
7904 | } | |
7905 | ||
7906 | __extension__ extern __inline void | |
7907 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7908 | __arm_vst2q (float32_t * __addr, float32x4x2_t __value) | |
7909 | { | |
7910 | __arm_vst2q_f32 (__addr, __value); | |
7911 | } | |
7912 | ||
7913 | __extension__ extern __inline void | |
7914 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7915 | __arm_vst1q_p (float32_t * __addr, float32x4_t __value, mve_pred16_t __p) | |
7916 | { | |
7917 | __arm_vst1q_p_f32 (__addr, __value, __p); | |
7918 | } | |
7919 | ||
7920 | __extension__ extern __inline float16x8_t | |
7921 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7922 | __arm_vsetq_lane (float16_t __a, float16x8_t __b, const int __idx) | |
7923 | { | |
7924 | return __arm_vsetq_lane_f16 (__a, __b, __idx); | |
7925 | } | |
7926 | ||
7927 | __extension__ extern __inline float32x4_t | |
7928 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7929 | __arm_vsetq_lane (float32_t __a, float32x4_t __b, const int __idx) | |
7930 | { | |
7931 | return __arm_vsetq_lane_f32 (__a, __b, __idx); | |
7932 | } | |
7933 | ||
7934 | __extension__ extern __inline float16_t | |
7935 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7936 | __arm_vgetq_lane (float16x8_t __a, const int __idx) | |
7937 | { | |
7938 | return __arm_vgetq_lane_f16 (__a, __idx); | |
7939 | } | |
7940 | ||
7941 | __extension__ extern __inline float32_t | |
7942 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7943 | __arm_vgetq_lane (float32x4_t __a, const int __idx) | |
7944 | { | |
7945 | return __arm_vgetq_lane_f32 (__a, __idx); | |
7946 | } | |
7947 | #endif /* MVE Floating point. */ | |
7948 | ||
937ac2cd CL |
7949 | |
7950 | __extension__ extern __inline uint8x16_t | |
7951 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7952 | __arm_vuninitializedq (uint8x16_t /* __v ATTRIBUTE UNUSED */) | |
7953 | { | |
7954 | return __arm_vuninitializedq_u8 (); | |
7955 | } | |
7956 | ||
7957 | __extension__ extern __inline uint16x8_t | |
7958 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7959 | __arm_vuninitializedq (uint16x8_t /* __v ATTRIBUTE UNUSED */) | |
7960 | { | |
7961 | return __arm_vuninitializedq_u16 (); | |
7962 | } | |
7963 | ||
7964 | __extension__ extern __inline uint32x4_t | |
7965 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7966 | __arm_vuninitializedq (uint32x4_t /* __v ATTRIBUTE UNUSED */) | |
7967 | { | |
7968 | return __arm_vuninitializedq_u32 (); | |
7969 | } | |
7970 | ||
7971 | __extension__ extern __inline uint64x2_t | |
7972 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7973 | __arm_vuninitializedq (uint64x2_t /* __v ATTRIBUTE UNUSED */) | |
7974 | { | |
7975 | return __arm_vuninitializedq_u64 (); | |
7976 | } | |
7977 | ||
7978 | __extension__ extern __inline int8x16_t | |
7979 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7980 | __arm_vuninitializedq (int8x16_t /* __v ATTRIBUTE UNUSED */) | |
7981 | { | |
7982 | return __arm_vuninitializedq_s8 (); | |
7983 | } | |
7984 | ||
7985 | __extension__ extern __inline int16x8_t | |
7986 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7987 | __arm_vuninitializedq (int16x8_t /* __v ATTRIBUTE UNUSED */) | |
7988 | { | |
7989 | return __arm_vuninitializedq_s16 (); | |
7990 | } | |
7991 | ||
7992 | __extension__ extern __inline int32x4_t | |
7993 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
7994 | __arm_vuninitializedq (int32x4_t /* __v ATTRIBUTE UNUSED */) | |
7995 | { | |
7996 | return __arm_vuninitializedq_s32 (); | |
7997 | } | |
7998 | ||
7999 | __extension__ extern __inline int64x2_t | |
8000 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
8001 | __arm_vuninitializedq (int64x2_t /* __v ATTRIBUTE UNUSED */) | |
8002 | { | |
8003 | return __arm_vuninitializedq_s64 (); | |
8004 | } | |
8005 | ||
8006 | #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ | |
8007 | __extension__ extern __inline float16x8_t | |
8008 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
8009 | __arm_vuninitializedq (float16x8_t /* __v ATTRIBUTE UNUSED */) | |
8010 | { | |
8011 | return __arm_vuninitializedq_f16 (); | |
8012 | } | |
8013 | ||
8014 | __extension__ extern __inline float32x4_t | |
8015 | __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) | |
8016 | __arm_vuninitializedq (float32x4_t /* __v ATTRIBUTE UNUSED */) | |
8017 | { | |
8018 | return __arm_vuninitializedq_f32 (); | |
8019 | } | |
8020 | #endif /* __ARM_FEATURE_MVE & 2 (MVE floating point) */ | |
8021 | ||
6a90680b ASDV |
8022 | #else |
8023 | enum { | |
8024 | __ARM_mve_type_fp_n = 1, | |
8025 | __ARM_mve_type_int_n, | |
8026 | __ARM_mve_type_float16_t_ptr, | |
8027 | __ARM_mve_type_float16x8_t, | |
8028 | __ARM_mve_type_float16x8x2_t, | |
8029 | __ARM_mve_type_float16x8x4_t, | |
8030 | __ARM_mve_type_float32_t_ptr, | |
8031 | __ARM_mve_type_float32x4_t, | |
8032 | __ARM_mve_type_float32x4x2_t, | |
8033 | __ARM_mve_type_float32x4x4_t, | |
8034 | __ARM_mve_type_int16_t_ptr, | |
8035 | __ARM_mve_type_int16x8_t, | |
8036 | __ARM_mve_type_int16x8x2_t, | |
8037 | __ARM_mve_type_int16x8x4_t, | |
8038 | __ARM_mve_type_int32_t_ptr, | |
8039 | __ARM_mve_type_int32x4_t, | |
8040 | __ARM_mve_type_int32x4x2_t, | |
8041 | __ARM_mve_type_int32x4x4_t, | |
8042 | __ARM_mve_type_int64_t_ptr, | |
8043 | __ARM_mve_type_int64x2_t, | |
8044 | __ARM_mve_type_int8_t_ptr, | |
8045 | __ARM_mve_type_int8x16_t, | |
8046 | __ARM_mve_type_int8x16x2_t, | |
8047 | __ARM_mve_type_int8x16x4_t, | |
8048 | __ARM_mve_type_uint16_t_ptr, | |
8049 | __ARM_mve_type_uint16x8_t, | |
8050 | __ARM_mve_type_uint16x8x2_t, | |
8051 | __ARM_mve_type_uint16x8x4_t, | |
8052 | __ARM_mve_type_uint32_t_ptr, | |
8053 | __ARM_mve_type_uint32x4_t, | |
8054 | __ARM_mve_type_uint32x4x2_t, | |
8055 | __ARM_mve_type_uint32x4x4_t, | |
8056 | __ARM_mve_type_uint64_t_ptr, | |
8057 | __ARM_mve_type_uint64x2_t, | |
8058 | __ARM_mve_type_uint8_t_ptr, | |
8059 | __ARM_mve_type_uint8x16_t, | |
8060 | __ARM_mve_type_uint8x16x2_t, | |
8061 | __ARM_mve_type_uint8x16x4_t, | |
8062 | __ARM_mve_unsupported_type | |
8063 | }; | |
8064 | ||
8065 | #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ | |
8066 | #define __ARM_mve_typeid(x) _Generic(x, \ | |
8067 | float16_t: __ARM_mve_type_fp_n, \ | |
8068 | float16_t *: __ARM_mve_type_float16_t_ptr, \ | |
8069 | float16_t const *: __ARM_mve_type_float16_t_ptr, \ | |
8070 | float16x8_t: __ARM_mve_type_float16x8_t, \ | |
8071 | float16x8x2_t: __ARM_mve_type_float16x8x2_t, \ | |
8072 | float16x8x4_t: __ARM_mve_type_float16x8x4_t, \ | |
8073 | float32_t: __ARM_mve_type_fp_n, \ | |
8074 | float32_t *: __ARM_mve_type_float32_t_ptr, \ | |
8075 | float32_t const *: __ARM_mve_type_float32_t_ptr, \ | |
8076 | float32x4_t: __ARM_mve_type_float32x4_t, \ | |
8077 | float32x4x2_t: __ARM_mve_type_float32x4x2_t, \ | |
8078 | float32x4x4_t: __ARM_mve_type_float32x4x4_t, \ | |
8079 | int16_t: __ARM_mve_type_int_n, \ | |
8080 | int16_t *: __ARM_mve_type_int16_t_ptr, \ | |
8081 | int16_t const *: __ARM_mve_type_int16_t_ptr, \ | |
8082 | int16x8_t: __ARM_mve_type_int16x8_t, \ | |
8083 | int16x8x2_t: __ARM_mve_type_int16x8x2_t, \ | |
8084 | int16x8x4_t: __ARM_mve_type_int16x8x4_t, \ | |
8085 | int32_t: __ARM_mve_type_int_n, \ | |
8086 | int32_t *: __ARM_mve_type_int32_t_ptr, \ | |
8087 | int32_t const *: __ARM_mve_type_int32_t_ptr, \ | |
8088 | int32x4_t: __ARM_mve_type_int32x4_t, \ | |
8089 | int32x4x2_t: __ARM_mve_type_int32x4x2_t, \ | |
8090 | int32x4x4_t: __ARM_mve_type_int32x4x4_t, \ | |
8091 | int64_t: __ARM_mve_type_int_n, \ | |
8092 | int64_t *: __ARM_mve_type_int64_t_ptr, \ | |
8093 | int64_t const *: __ARM_mve_type_int64_t_ptr, \ | |
8094 | int64x2_t: __ARM_mve_type_int64x2_t, \ | |
8095 | int8_t: __ARM_mve_type_int_n, \ | |
8096 | int8_t *: __ARM_mve_type_int8_t_ptr, \ | |
8097 | int8_t const *: __ARM_mve_type_int8_t_ptr, \ | |
8098 | int8x16_t: __ARM_mve_type_int8x16_t, \ | |
8099 | int8x16x2_t: __ARM_mve_type_int8x16x2_t, \ | |
8100 | int8x16x4_t: __ARM_mve_type_int8x16x4_t, \ | |
8101 | uint16_t: __ARM_mve_type_int_n, \ | |
8102 | uint16_t *: __ARM_mve_type_uint16_t_ptr, \ | |
8103 | uint16_t const *: __ARM_mve_type_uint16_t_ptr, \ | |
8104 | uint16x8_t: __ARM_mve_type_uint16x8_t, \ | |
8105 | uint16x8x2_t: __ARM_mve_type_uint16x8x2_t, \ | |
8106 | uint16x8x4_t: __ARM_mve_type_uint16x8x4_t, \ | |
8107 | uint32_t: __ARM_mve_type_int_n, \ | |
8108 | uint32_t *: __ARM_mve_type_uint32_t_ptr, \ | |
8109 | uint32_t const *: __ARM_mve_type_uint32_t_ptr, \ | |
8110 | uint32x4_t: __ARM_mve_type_uint32x4_t, \ | |
8111 | uint32x4x2_t: __ARM_mve_type_uint32x4x2_t, \ | |
8112 | uint32x4x4_t: __ARM_mve_type_uint32x4x4_t, \ | |
8113 | uint64_t: __ARM_mve_type_int_n, \ | |
8114 | uint64_t *: __ARM_mve_type_uint64_t_ptr, \ | |
8115 | uint64_t const *: __ARM_mve_type_uint64_t_ptr, \ | |
8116 | uint64x2_t: __ARM_mve_type_uint64x2_t, \ | |
8117 | uint8_t: __ARM_mve_type_int_n, \ | |
8118 | uint8_t *: __ARM_mve_type_uint8_t_ptr, \ | |
8119 | uint8_t const *: __ARM_mve_type_uint8_t_ptr, \ | |
8120 | uint8x16_t: __ARM_mve_type_uint8x16_t, \ | |
8121 | uint8x16x2_t: __ARM_mve_type_uint8x16x2_t, \ | |
8122 | uint8x16x4_t: __ARM_mve_type_uint8x16x4_t, \ | |
8123 | default: _Generic(x, \ | |
8124 | signed char: __ARM_mve_type_int_n, \ | |
8125 | short: __ARM_mve_type_int_n, \ | |
8126 | int: __ARM_mve_type_int_n, \ | |
8127 | long: __ARM_mve_type_int_n, \ | |
10a0ee8a | 8128 | long long: __ARM_mve_type_int_n, \ |
2fefb893 SMW |
8129 | _Float16: __ARM_mve_type_fp_n, \ |
8130 | __fp16: __ARM_mve_type_fp_n, \ | |
8131 | float: __ARM_mve_type_fp_n, \ | |
6bd4ce64 | 8132 | double: __ARM_mve_type_fp_n, \ |
6a90680b ASDV |
8133 | unsigned char: __ARM_mve_type_int_n, \ |
8134 | unsigned short: __ARM_mve_type_int_n, \ | |
8135 | unsigned int: __ARM_mve_type_int_n, \ | |
8136 | unsigned long: __ARM_mve_type_int_n, \ | |
8137 | unsigned long long: __ARM_mve_type_int_n, \ | |
10a0ee8a SMW |
8138 | signed char*: __ARM_mve_type_int8_t_ptr, \ |
8139 | short*: __ARM_mve_type_int16_t_ptr, \ | |
8140 | int*: __ARM_mve_type_int32_t_ptr, \ | |
8141 | long*: __ARM_mve_type_int32_t_ptr, \ | |
8142 | long long*: __ARM_mve_type_int64_t_ptr, \ | |
8143 | _Float16*: __ARM_mve_type_float16_t_ptr, \ | |
8144 | __fp16*: __ARM_mve_type_float16_t_ptr, \ | |
8145 | float*: __ARM_mve_type_float32_t_ptr, \ | |
8146 | unsigned char*: __ARM_mve_type_uint8_t_ptr, \ | |
8147 | unsigned short*: __ARM_mve_type_uint16_t_ptr, \ | |
8148 | unsigned int*: __ARM_mve_type_uint32_t_ptr, \ | |
8149 | unsigned long*: __ARM_mve_type_uint32_t_ptr, \ | |
8150 | unsigned long long*: __ARM_mve_type_uint64_t_ptr, \ | |
6a90680b ASDV |
8151 | default: __ARM_mve_unsupported_type)) |
8152 | #else | |
8153 | #define __ARM_mve_typeid(x) _Generic(x, \ | |
8154 | int16_t: __ARM_mve_type_int_n, \ | |
8155 | int16_t *: __ARM_mve_type_int16_t_ptr, \ | |
8156 | int16_t const *: __ARM_mve_type_int16_t_ptr, \ | |
8157 | int16x8_t: __ARM_mve_type_int16x8_t, \ | |
8158 | int16x8x2_t: __ARM_mve_type_int16x8x2_t, \ | |
8159 | int16x8x4_t: __ARM_mve_type_int16x8x4_t, \ | |
8160 | int32_t: __ARM_mve_type_int_n, \ | |
8161 | int32_t *: __ARM_mve_type_int32_t_ptr, \ | |
8162 | int32_t const *: __ARM_mve_type_int32_t_ptr, \ | |
8163 | int32x4_t: __ARM_mve_type_int32x4_t, \ | |
8164 | int32x4x2_t: __ARM_mve_type_int32x4x2_t, \ | |
8165 | int32x4x4_t: __ARM_mve_type_int32x4x4_t, \ | |
8166 | int64_t: __ARM_mve_type_int_n, \ | |
8167 | int64_t *: __ARM_mve_type_int64_t_ptr, \ | |
8168 | int64_t const *: __ARM_mve_type_int64_t_ptr, \ | |
8169 | int64x2_t: __ARM_mve_type_int64x2_t, \ | |
8170 | int8_t: __ARM_mve_type_int_n, \ | |
8171 | int8_t *: __ARM_mve_type_int8_t_ptr, \ | |
8172 | int8_t const *: __ARM_mve_type_int8_t_ptr, \ | |
8173 | int8x16_t: __ARM_mve_type_int8x16_t, \ | |
8174 | int8x16x2_t: __ARM_mve_type_int8x16x2_t, \ | |
8175 | int8x16x4_t: __ARM_mve_type_int8x16x4_t, \ | |
8176 | uint16_t: __ARM_mve_type_int_n, \ | |
8177 | uint16_t *: __ARM_mve_type_uint16_t_ptr, \ | |
8178 | uint16_t const *: __ARM_mve_type_uint16_t_ptr, \ | |
8179 | uint16x8_t: __ARM_mve_type_uint16x8_t, \ | |
8180 | uint16x8x2_t: __ARM_mve_type_uint16x8x2_t, \ | |
8181 | uint16x8x4_t: __ARM_mve_type_uint16x8x4_t, \ | |
8182 | uint32_t: __ARM_mve_type_int_n, \ | |
8183 | uint32_t *: __ARM_mve_type_uint32_t_ptr, \ | |
8184 | uint32_t const *: __ARM_mve_type_uint32_t_ptr, \ | |
8185 | uint32x4_t: __ARM_mve_type_uint32x4_t, \ | |
8186 | uint32x4x2_t: __ARM_mve_type_uint32x4x2_t, \ | |
8187 | uint32x4x4_t: __ARM_mve_type_uint32x4x4_t, \ | |
8188 | uint64_t: __ARM_mve_type_int_n, \ | |
8189 | uint64_t *: __ARM_mve_type_uint64_t_ptr, \ | |
8190 | uint64_t const *: __ARM_mve_type_uint64_t_ptr, \ | |
8191 | uint64x2_t: __ARM_mve_type_uint64x2_t, \ | |
8192 | uint8_t: __ARM_mve_type_int_n, \ | |
8193 | uint8_t *: __ARM_mve_type_uint8_t_ptr, \ | |
8194 | uint8_t const *: __ARM_mve_type_uint8_t_ptr, \ | |
8195 | uint8x16_t: __ARM_mve_type_uint8x16_t, \ | |
8196 | uint8x16x2_t: __ARM_mve_type_uint8x16x2_t, \ | |
8197 | uint8x16x4_t: __ARM_mve_type_uint8x16x4_t, \ | |
8198 | default: _Generic(x, \ | |
8199 | signed char: __ARM_mve_type_int_n, \ | |
8200 | short: __ARM_mve_type_int_n, \ | |
8201 | int: __ARM_mve_type_int_n, \ | |
8202 | long: __ARM_mve_type_int_n, \ | |
8203 | long long: __ARM_mve_type_int_n, \ | |
8204 | unsigned char: __ARM_mve_type_int_n, \ | |
8205 | unsigned short: __ARM_mve_type_int_n, \ | |
8206 | unsigned int: __ARM_mve_type_int_n, \ | |
8207 | unsigned long: __ARM_mve_type_int_n, \ | |
8208 | unsigned long long: __ARM_mve_type_int_n, \ | |
10a0ee8a SMW |
8209 | signed char*: __ARM_mve_type_int8_t_ptr, \ |
8210 | short*: __ARM_mve_type_int16_t_ptr, \ | |
8211 | int*: __ARM_mve_type_int32_t_ptr, \ | |
8212 | long*: __ARM_mve_type_int32_t_ptr, \ | |
8213 | long long*: __ARM_mve_type_int64_t_ptr, \ | |
8214 | unsigned char*: __ARM_mve_type_uint8_t_ptr, \ | |
8215 | unsigned short*: __ARM_mve_type_uint16_t_ptr, \ | |
8216 | unsigned int*: __ARM_mve_type_uint32_t_ptr, \ | |
8217 | unsigned long*: __ARM_mve_type_uint32_t_ptr, \ | |
8218 | unsigned long long*: __ARM_mve_type_uint64_t_ptr, \ | |
6a90680b ASDV |
8219 | default: __ARM_mve_unsupported_type)) |
8220 | #endif /* MVE Floating point. */ | |
8221 | ||
8222 | extern void *__ARM_undef; | |
8223 | #define __ARM_mve_coerce(param, type) \ | |
8224 | _Generic(param, type: param, default: *(type *)__ARM_undef) | |
10a0ee8a SMW |
8225 | #define __ARM_mve_coerce_i_scalar(param, type) \ |
8226 | _Generic(param, type: param, const type: param, default: _Generic (param, int8_t: param, int16_t: param, int32_t: param, int64_t: param, uint8_t: param, uint16_t: param, uint32_t: param, uint64_t: param, default: *(type *)__ARM_undef)) | |
8227 | ||
8228 | #define __ARM_mve_coerce_s8_ptr(param, type) \ | |
8229 | _Generic(param, type: param, const type: param, default: _Generic (param, signed char*: param, default: *(type *)__ARM_undef)) | |
8230 | #define __ARM_mve_coerce_u8_ptr(param, type) \ | |
8231 | _Generic(param, type: param, const type: param, default: _Generic (param, unsigned char*: param, default: *(type *)__ARM_undef)) | |
8232 | ||
8233 | #define __ARM_mve_coerce_s16_ptr(param, type) \ | |
8234 | _Generic(param, type: param, const type: param, default: _Generic (param, short*: param, default: *(type *)__ARM_undef)) | |
8235 | #define __ARM_mve_coerce_u16_ptr(param, type) \ | |
8236 | _Generic(param, type: param, const type: param, default: _Generic (param, unsigned short*: param, default: *(type *)__ARM_undef)) | |
8237 | ||
8238 | #define __ARM_mve_coerce_s32_ptr(param, type) \ | |
8239 | _Generic(param, type: param, const type: param, default: _Generic (param, int*: param, long*: param, default: *(type *)__ARM_undef)) | |
8240 | #define __ARM_mve_coerce_u32_ptr(param, type) \ | |
8241 | _Generic(param, type: param, const type: param, default: _Generic (param, unsigned int*: param, unsigned long*: param, default: *(type *)__ARM_undef)) | |
8242 | ||
8243 | #define __ARM_mve_coerce_s64_ptr(param, type) \ | |
8244 | _Generic(param, type: param, const type: param, default: _Generic (param, long long*: param, default: *(type *)__ARM_undef)) | |
8245 | #define __ARM_mve_coerce_u64_ptr(param, type) \ | |
8246 | _Generic(param, type: param, const type: param, default: _Generic (param, unsigned long long*: param, default: *(type *)__ARM_undef)) | |
8247 | ||
8248 | #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ | |
8249 | #define __ARM_mve_coerce_f_scalar(param, type) \ | |
8250 | _Generic(param, type: param, const type: param, __fp16: param, default: _Generic (param, _Float16: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef)) | |
8251 | #define __ARM_mve_coerce_f16_ptr(param, type) \ | |
8252 | _Generic(param, type: param, const type: param, default: _Generic (param, __fp16*: param, _Float16*: param, default: *(type *)__ARM_undef)) | |
8253 | #define __ARM_mve_coerce_f32_ptr(param, type) \ | |
8254 | _Generic(param, type: param, const type: param, default: _Generic (param, float*: param, default: *(type *)__ARM_undef)) | |
8255 | #endif | |
6a90680b ASDV |
8256 | |
8257 | #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ | |
8258 | ||
8259 | #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \ | |
8260 | __typeof(p1) __p1 = (p1); \ | |
8261 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8262 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ |
8263 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ | |
8264 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ | |
8265 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ | |
8266 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ | |
8267 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \ | |
8268 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce_f16_ptr(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \ | |
8269 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));}) | |
6a90680b | 8270 | |
e3678b44 SP |
8271 | #define __arm_vcvtbq_f32(p0) ({ __typeof(p0) __p0 = (p0); \ |
8272 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8273 | int (*)[__ARM_mve_type_float16x8_t]: __arm_vcvtbq_f32_f16 (__ARM_mve_coerce(__p0, float16x8_t)));}) | |
8274 | ||
e3678b44 SP |
8275 | #define __arm_vcvttq_f32(p0) ({ __typeof(p0) __p0 = (p0); \ |
8276 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8277 | int (*)[__ARM_mve_type_float16x8_t]: __arm_vcvttq_f32_f16 (__ARM_mve_coerce(__p0, float16x8_t)));}) | |
8278 | ||
e3678b44 SP |
8279 | #define __arm_vcvtq(p0) ({ __typeof(p0) __p0 = (p0); \ |
8280 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8281 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_f16_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \ | |
8282 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_f32_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \ | |
8283 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_f16_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \ | |
8284 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_f32_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));}) | |
8285 | ||
e3678b44 SP |
8286 | #define __arm_vcvtq_n(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8287 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8288 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_n_f16_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \ | |
8289 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_n_f32_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \ | |
8290 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_n_f16_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \ | |
8291 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_n_f32_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1));}) | |
8292 | ||
e3678b44 SP |
8293 | #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8294 | __typeof(p1) __p1 = (p1); \ | |
8295 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8296 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ |
8297 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ | |
8298 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ | |
8299 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ | |
e3678b44 SP |
8300 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ |
8301 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ | |
8302 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
8303 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
8304 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8305 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8306 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbicq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ | |
8307 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbicq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));}) | |
8308 | ||
e3678b44 SP |
8309 | #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8310 | __typeof(p1) __p1 = (p1); \ | |
8311 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
8312 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ | |
8313 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ | |
8314 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
8315 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
8316 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8317 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8318 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vornq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ | |
8319 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vornq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));}) | |
8320 | ||
e3678b44 SP |
8321 | #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8322 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8323 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vbicq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \ | |
8324 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vbicq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \ | |
8325 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \ | |
8326 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));}) | |
8327 | ||
e3678b44 SP |
8328 | #define __arm_vshlcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8329 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8330 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlcq_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \ | |
8331 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlcq_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \ | |
8332 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \ | |
8333 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlcq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \ | |
8334 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \ | |
8335 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));}) | |
8336 | ||
e3678b44 | 8337 | #define __arm_vcvtaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
f9355dee SP |
8338 | __typeof(p1) __p1 = (p1); \ |
8339 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
e3678b44 SP |
8340 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtaq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ |
8341 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtaq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ | |
8342 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtaq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8343 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtaq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
a50f6abf | 8344 | |
e3678b44 | 8345 | #define __arm_vcvtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
f9355dee SP |
8346 | __typeof(p1) __p1 = (p1); \ |
8347 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
e3678b44 SP |
8348 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcvtq_m_f16_s16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ |
8349 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcvtq_m_f32_s32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8350 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcvtq_m_f16_u16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8351 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcvtq_m_f32_u32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8352 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8353 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ | |
8354 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8355 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
a50f6abf | 8356 | |
db5db9d2 SP |
8357 | #define __arm_vcvtq_m_n(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
8358 | __typeof(p1) __p1 = (p1); \ | |
8359 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
532e9e24 SP |
8360 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_n_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2, p3), \ |
8361 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_n_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2, p3), \ | |
8362 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtq_m_n_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2, p3), \ | |
8363 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtq_m_n_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2, p3), \ | |
db5db9d2 SP |
8364 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcvtq_m_n_f16_s16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \ |
8365 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcvtq_m_n_f32_s32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2, p3), \ | |
8366 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcvtq_m_n_f16_u16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \ | |
8367 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcvtq_m_n_f32_u32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));}) | |
8368 | ||
e3678b44 | 8369 | #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
4be8cf77 SP |
8370 | __typeof(p1) __p1 = (p1); \ |
8371 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
e3678b44 SP |
8372 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float16x8_t]: __arm_vcvtbq_m_f32_f16 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ |
8373 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float32x4_t]: __arm_vcvtbq_m_f16_f32 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
4be8cf77 | 8374 | |
e3678b44 | 8375 | #define __arm_vcvttq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
f9355dee SP |
8376 | __typeof(p1) __p1 = (p1); \ |
8377 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
e3678b44 SP |
8378 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float16x8_t]: __arm_vcvttq_m_f32_f16 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ |
8379 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float32x4_t]: __arm_vcvttq_m_f16_f32 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
4be8cf77 | 8380 | |
e3678b44 | 8381 | #define __arm_vcvtmq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
d71dba7b SP |
8382 | __typeof(p1) __p1 = (p1); \ |
8383 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
e3678b44 SP |
8384 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtmq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ |
8385 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtmq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ | |
8386 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtmq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8387 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtmq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
d71dba7b | 8388 | |
e3678b44 | 8389 | #define __arm_vcvtnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
f9355dee SP |
8390 | __typeof(p1) __p1 = (p1); \ |
8391 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
e3678b44 SP |
8392 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtnq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ |
8393 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtnq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ | |
8394 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtnq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8395 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtnq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
8396 | ||
e3678b44 SP |
8397 | #define __arm_vcvtpq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8398 | __typeof(p1) __p1 = (p1); \ | |
8399 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
8400 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtpq_m_s16_f16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8401 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtpq_m_s32_f32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ | |
8402 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcvtpq_m_u16_f16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8403 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcvtpq_m_u32_f32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
8404 | ||
532e9e24 SP |
8405 | #define __arm_vbicq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
8406 | __typeof(p1) __p1 = (p1); \ | |
8407 | __typeof(p2) __p2 = (p2); \ | |
8408 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
8409 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
8410 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
8411 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8412 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
8413 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8414 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8415 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbicq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ | |
8416 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbicq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
8417 | ||
532e9e24 | 8418 | #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
0dad5b33 | 8419 | __typeof(p1) __p1 = (p1); \ |
532e9e24 SP |
8420 | __typeof(p2) __p2 = (p2); \ |
8421 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
8422 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
8423 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
8424 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8425 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
8426 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8427 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8428 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vornq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ | |
8429 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vornq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
0dad5b33 | 8430 | |
3ce755a8 ASDV |
8431 | #define __arm_vld1q_z(p0,p1) ( \ |
8432 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8433 | int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \ |
8434 | int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \ | |
8435 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ | |
8436 | int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \ | |
8437 | int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \ | |
8438 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ | |
8439 | int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), p1), \ | |
8440 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) | |
1dfcc3b5 | 8441 | |
3ce755a8 ASDV |
8442 | #define __arm_vld2q(p0) ( \ |
8443 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8444 | int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ |
8445 | int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ | |
8446 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ | |
8447 | int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ | |
8448 | int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ | |
8449 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ | |
8450 | int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ | |
8451 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) | |
1dfcc3b5 | 8452 | |
3ce755a8 ASDV |
8453 | #define __arm_vld4q(p0) ( \ |
8454 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8455 | int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ |
8456 | int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ | |
8457 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ | |
8458 | int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ | |
8459 | int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ | |
8460 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ | |
8461 | int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ | |
8462 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) | |
1dfcc3b5 | 8463 | |
3ce755a8 ASDV |
8464 | #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8465 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8466 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ |
8467 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8468 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8469 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8470 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) | |
4cc23303 | 8471 | |
3ce755a8 ASDV |
8472 | #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8473 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8474 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ |
8475 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8476 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8477 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8478 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) | |
4cc23303 | 8479 | |
3ce755a8 ASDV |
8480 | #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8481 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8482 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ |
8483 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8484 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8485 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8486 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) | |
4cc23303 | 8487 | |
3ce755a8 ASDV |
8488 | #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8489 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8490 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ |
8491 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8492 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8493 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8494 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) | |
4cc23303 | 8495 | |
3ce755a8 ASDV |
8496 | #define __arm_vldrwq_gather_offset(p0,p1) ( \ |
8497 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8498 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ |
8499 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ | |
8500 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) | |
4cc23303 | 8501 | |
3ce755a8 ASDV |
8502 | #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \ |
8503 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8504 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \ |
8505 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \ | |
8506 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2))) | |
4cc23303 | 8507 | |
3ce755a8 ASDV |
8508 | #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \ |
8509 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8510 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ |
8511 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ | |
8512 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) | |
4cc23303 | 8513 | |
3ce755a8 ASDV |
8514 | #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \ |
8515 | _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
8516 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \ |
8517 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \ | |
8518 | int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2))) | |
4cc23303 | 8519 | |
3ce755a8 ASDV |
8520 | #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8521 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8522 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ |
8523 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ | |
8524 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8525 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ | |
8526 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8527 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8528 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8529 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
1dfcc3b5 | 8530 | |
3ce755a8 ASDV |
8531 | #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8532 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8533 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ |
8534 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ | |
8535 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ | |
8536 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ | |
8537 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ | |
8538 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \ | |
8539 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \ | |
8540 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));}) | |
1dfcc3b5 | 8541 | |
3ce755a8 ASDV |
8542 | #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8543 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8544 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ |
8545 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
8546 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8547 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8548 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));}) | |
5cad47e0 | 8549 | |
3ce755a8 ASDV |
8550 | #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8551 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8552 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ |
8553 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8554 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8555 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8556 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));}) | |
5cad47e0 | 8557 | |
3ce755a8 | 8558 | #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8559 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8560 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8561 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
8562 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8563 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8564 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8565 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) | |
5cad47e0 | 8566 | |
3ce755a8 | 8567 | #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8568 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8569 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8570 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
8571 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8572 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
8573 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8574 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) | |
5cad47e0 | 8575 | |
3ce755a8 | 8576 | #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8577 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8578 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8579 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
8580 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8581 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8582 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8583 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) | |
5cad47e0 | 8584 | |
3ce755a8 | 8585 | #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8586 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8587 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8588 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
8589 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8590 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
8591 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8592 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) | |
5cad47e0 | 8593 | |
3ce755a8 ASDV |
8594 | #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8595 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8596 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ |
8597 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8598 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
5cad47e0 | 8599 | |
3ce755a8 ASDV |
8600 | #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8601 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8602 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ |
8603 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8604 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) | |
5cad47e0 | 8605 | |
3ce755a8 | 8606 | #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8607 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8608 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8609 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
8610 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8611 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
8612 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8613 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) | |
7a5fffa5 | 8614 | |
3ce755a8 | 8615 | #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8616 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8617 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8618 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
8619 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8620 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8621 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8622 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) | |
7a5fffa5 | 8623 | |
3ce755a8 | 8624 | #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8625 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8626 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8627 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
8628 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8629 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
8630 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8631 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) | |
7a5fffa5 | 8632 | |
3ce755a8 | 8633 | #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8634 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8635 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8636 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
8637 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8638 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8639 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8640 | int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) | |
7a5fffa5 | 8641 | |
7a5fffa5 SP |
8642 | #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ |
8643 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8644 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8645 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8646 | int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t)));}) | |
8647 | ||
7a5fffa5 SP |
8648 | #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
8649 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8650 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_p_s32(p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8651 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_p_u32(p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8652 | int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_p_f32(p0, p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
8653 | ||
9b905ba9 | 8654 | #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
7a5fffa5 | 8655 | __typeof(p2) __p2 = (p2); \ |
9b905ba9 | 8656 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8657 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ |
8658 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8659 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));}) | |
7a5fffa5 | 8660 | |
9b905ba9 | 8661 | #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
7a5fffa5 | 8662 | __typeof(p2) __p2 = (p2); \ |
9b905ba9 | 8663 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8664 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ |
8665 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8666 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
7a5fffa5 | 8667 | |
3ce755a8 | 8668 | #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8669 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8670 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8671 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ |
8672 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8673 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) | |
7a5fffa5 | 8674 | |
3ce755a8 | 8675 | #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8676 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8677 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8678 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ |
8679 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8680 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
7a5fffa5 | 8681 | |
3ce755a8 | 8682 | #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8683 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8684 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8685 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ |
8686 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8687 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
7a5fffa5 | 8688 | |
3ce755a8 | 8689 | #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 8690 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8691 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8692 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ |
8693 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8694 | int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) | |
7a5fffa5 | 8695 | |
85a94e87 SP |
8696 | #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \ |
8697 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8698 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vuninitializedq_s8 (), \ | |
8699 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vuninitializedq_s16 (), \ | |
8700 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vuninitializedq_s32 (), \ | |
8701 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vuninitializedq_s64 (), \ | |
8702 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vuninitializedq_u8 (), \ | |
8703 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vuninitializedq_u16 (), \ | |
8704 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vuninitializedq_u32 (), \ | |
8705 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vuninitializedq_u64 (), \ | |
8706 | int (*)[__ARM_mve_type_float16x8_t]: __arm_vuninitializedq_f16 (), \ | |
8707 | int (*)[__ARM_mve_type_float32x4_t]: __arm_vuninitializedq_f32 ());}) | |
8708 | ||
41e1a7ff SP |
8709 | #define __arm_vstrwq_scatter_base_wb(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ |
8710 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8711 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8712 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ | |
8713 | int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_wb_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t)));}) | |
8714 | ||
41e1a7ff SP |
8715 | #define __arm_vstrwq_scatter_base_wb_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
8716 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8717 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_p_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8718 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8719 | int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_wb_p_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
8720 | ||
261014a1 SP |
8721 | #define __arm_vbicq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
8722 | __typeof(p2) __p2 = (p2); \ | |
8723 | _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
8724 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
8725 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
8726 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8727 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
8728 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8729 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8730 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vbicq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ | |
8731 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vbicq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
8732 | ||
261014a1 SP |
8733 | #define __arm_vcvtq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8734 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
8735 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_x_f16_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \ | |
8736 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_x_f32_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8737 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_x_f16_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8738 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_x_f32_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
8739 | ||
261014a1 SP |
8740 | #define __arm_vcvtq_x_n(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
8741 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
8742 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_x_n_f16_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \ | |
8743 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vcvtq_x_n_f32_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2, p3), \ | |
8744 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vcvtq_x_n_f16_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \ | |
8745 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vcvtq_x_n_f32_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));}) | |
8746 | ||
261014a1 SP |
8747 | #define __arm_vornq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
8748 | __typeof(p2) __p2 = (p2); \ | |
8749 | _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
8750 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
8751 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
8752 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8753 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
8754 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8755 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ | |
8756 | int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vornq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ | |
8757 | int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vornq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));}) | |
8758 | ||
1a5c27b1 SP |
8759 | #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8760 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8761 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vgetq_lane_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \ | |
8762 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vgetq_lane_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \ | |
8763 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vgetq_lane_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \ | |
8764 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vgetq_lane_s64 (__ARM_mve_coerce(__p0, int64x2_t), p1), \ | |
8765 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vgetq_lane_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \ | |
8766 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vgetq_lane_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \ | |
8767 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vgetq_lane_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \ | |
8768 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vgetq_lane_u64 (__ARM_mve_coerce(__p0, uint64x2_t), p1), \ | |
8769 | int (*)[__ARM_mve_type_float16x8_t]: __arm_vgetq_lane_f16 (__ARM_mve_coerce(__p0, float16x8_t), p1), \ | |
8770 | int (*)[__ARM_mve_type_float32x4_t]: __arm_vgetq_lane_f32 (__ARM_mve_coerce(__p0, float32x4_t), p1));}) | |
8771 | ||
1a5c27b1 SP |
8772 | #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8773 | __typeof(p1) __p1 = (p1); \ | |
8774 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8775 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ |
8776 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ | |
8777 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8778 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \ | |
8779 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ | |
8780 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8781 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8782 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2), \ | |
8783 | int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ | |
8784 | int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) | |
1a5c27b1 | 8785 | |
e3678b44 | 8786 | #else /* MVE Integer. */ |
14782c81 | 8787 | |
41e1a7ff SP |
8788 | #define __arm_vstrwq_scatter_base_wb(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ |
8789 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8790 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8791 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
8792 | ||
41e1a7ff SP |
8793 | #define __arm_vstrwq_scatter_base_wb_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
8794 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8795 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_wb_p_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8796 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
8797 | ||
3ce755a8 ASDV |
8798 | #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8799 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8800 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ |
8801 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ | |
8802 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ | |
8803 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ | |
8804 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ | |
8805 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));}) | |
14782c81 | 8806 | |
33203b4c SP |
8807 | #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8808 | __typeof(p1) __p1 = (p1); \ | |
8809 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
8810 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ | |
8811 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ | |
8812 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
8813 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
8814 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8815 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
8816 | ||
33203b4c SP |
8817 | #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8818 | __typeof(p1) __p1 = (p1); \ | |
8819 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8820 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ |
8821 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ | |
8822 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ | |
8823 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ | |
33203b4c SP |
8824 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ |
8825 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ | |
8826 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
8827 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
8828 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8829 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
8830 | ||
0dad5b33 SP |
8831 | #define __arm_vshlcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8832 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8833 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlcq_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2), \ | |
8834 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlcq_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \ | |
8835 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \ | |
8836 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlcq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2), \ | |
8837 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \ | |
8838 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));}) | |
8839 | ||
0dad5b33 SP |
8840 | #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8841 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
8842 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vbicq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2), \ | |
8843 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vbicq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2), \ | |
8844 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \ | |
8845 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));}) | |
8846 | ||
e81d0d9e | 8847 | #define __arm_vbicq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
e3678b44 | 8848 | __typeof(p1) __p1 = (p1); \ |
e81d0d9e SP |
8849 | __typeof(p2) __p2 = (p2); \ |
8850 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
8851 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
8852 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
8853 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8854 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
8855 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8856 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
e3678b44 | 8857 | |
8eb3b6b9 SP |
8858 | #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
8859 | __typeof(p1) __p1 = (p1); \ | |
8860 | __typeof(p2) __p2 = (p2); \ | |
8861 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
8862 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
8863 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
8864 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8865 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
8866 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8867 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
8868 | ||
4ff68575 SP |
8869 | #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ |
8870 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8871 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_s32(p0, p1, __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8872 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_u32(p0, p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
8873 | ||
3ce755a8 ASDV |
8874 | #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8875 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8876 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ |
8877 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8878 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8879 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
8880 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8881 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
535a8645 | 8882 | |
535a8645 SP |
8883 | #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
8884 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
8885 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_base_p_s32 (p0, p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8886 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
8887 | ||
3ce755a8 ASDV |
8888 | #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8889 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8890 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ |
8891 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8892 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8893 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
bf1e3d5a | 8894 | |
3ce755a8 ASDV |
8895 | #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8896 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8897 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ |
8898 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8899 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8900 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
bf1e3d5a | 8901 | |
3ce755a8 ASDV |
8902 | #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8903 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8904 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ |
8905 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
8906 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8907 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
bf1e3d5a | 8908 | |
3ce755a8 ASDV |
8909 | #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8910 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8911 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ |
8912 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
8913 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8914 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
bf1e3d5a | 8915 | |
4cc23303 SP |
8916 | #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8917 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
8918 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \ |
8919 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) | |
4cc23303 | 8920 | |
4cc23303 SP |
8921 | #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8922 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
8923 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \ |
8924 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
4cc23303 | 8925 | |
4cc23303 SP |
8926 | #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
8927 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
8928 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \ |
8929 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) | |
4cc23303 | 8930 | |
4cc23303 SP |
8931 | #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
8932 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
8933 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \ |
8934 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
4cc23303 | 8935 | |
3ce755a8 ASDV |
8936 | #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8937 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8938 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ |
8939 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ | |
8940 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8941 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ | |
8942 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8943 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
1dfcc3b5 | 8944 | |
3ce755a8 ASDV |
8945 | #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8946 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8947 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ |
8948 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ | |
8949 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ | |
8950 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ | |
8951 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ | |
8952 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));}) | |
1dfcc3b5 | 8953 | |
3ce755a8 ASDV |
8954 | #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
8955 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8956 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ |
8957 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
8958 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
8959 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
5cad47e0 | 8960 | |
3ce755a8 ASDV |
8961 | #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
8962 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
8963 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ |
8964 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
8965 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
8966 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
5cad47e0 | 8967 | |
3ce755a8 | 8968 | #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8969 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8970 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8971 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
8972 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8973 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8974 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
5cad47e0 | 8975 | |
3ce755a8 | 8976 | #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8977 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8978 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8979 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
8980 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8981 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
8982 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
5cad47e0 | 8983 | |
3ce755a8 | 8984 | #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8985 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8986 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8987 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
8988 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
8989 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
8990 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
5cad47e0 | 8991 | |
3ce755a8 | 8992 | #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
5cad47e0 | 8993 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 8994 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
8995 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
8996 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
8997 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
8998 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
5cad47e0 SP |
8999 | |
9000 | ||
3ce755a8 ASDV |
9001 | #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
9002 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9003 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ |
9004 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
5cad47e0 | 9005 | |
3ce755a8 ASDV |
9006 | #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
9007 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9008 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ |
9009 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
5cad47e0 | 9010 | |
6a90680b ASDV |
9011 | #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
9012 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
9013 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_p_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ | |
9014 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_p_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) | |
9015 | ||
9016 | #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ | |
9017 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
9018 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t)), \ | |
9019 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) | |
9020 | ||
3ce755a8 | 9021 | #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 9022 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 9023 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9024 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
9025 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
9026 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
9027 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
7a5fffa5 | 9028 | |
3ce755a8 | 9029 | #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 9030 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 9031 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9032 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
9033 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
9034 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
9035 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
7a5fffa5 | 9036 | |
3ce755a8 | 9037 | #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 9038 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 9039 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9040 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ |
9041 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
9042 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
9043 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
7a5fffa5 | 9044 | |
3ce755a8 | 9045 | #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 9046 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 9047 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9048 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ |
9049 | int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
9050 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
9051 | int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
7a5fffa5 | 9052 | |
9b905ba9 | 9053 | #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
7a5fffa5 | 9054 | __typeof(p2) __p2 = (p2); \ |
9b905ba9 | 9055 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9056 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ |
9057 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
7a5fffa5 | 9058 | |
9b905ba9 | 9059 | #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
7a5fffa5 | 9060 | __typeof(p2) __p2 = (p2); \ |
9b905ba9 | 9061 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9062 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ |
9063 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
7a5fffa5 | 9064 | |
3ce755a8 | 9065 | #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 9066 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 9067 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9068 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ |
9069 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
7a5fffa5 | 9070 | |
3ce755a8 | 9071 | #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
7a5fffa5 | 9072 | __typeof(p2) __p2 = (p2); \ |
3ce755a8 | 9073 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9074 | int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ |
9075 | int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
7a5fffa5 | 9076 | |
85a94e87 SP |
9077 | #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \ |
9078 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
9079 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vuninitializedq_s8 (), \ | |
9080 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vuninitializedq_s16 (), \ | |
9081 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vuninitializedq_s32 (), \ | |
9082 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vuninitializedq_s64 (), \ | |
9083 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vuninitializedq_u8 (), \ | |
9084 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vuninitializedq_u16 (), \ | |
9085 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vuninitializedq_u32 (), \ | |
9086 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vuninitializedq_u64 ());}) | |
9087 | ||
e81d0d9e | 9088 | #define __arm_vornq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
261014a1 SP |
9089 | __typeof(p2) __p2 = (p2); \ |
9090 | _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
9091 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vornq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
9092 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vornq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
9093 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vornq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
9094 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vornq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
9095 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vornq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
9096 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vornq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
9097 | ||
261014a1 SP |
9098 | #define __arm_vbicq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9099 | __typeof(p2) __p2 = (p2); \ | |
9100 | _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
9101 | int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ | |
9102 | int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
9103 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
9104 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vbicq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
9105 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vbicq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
9106 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vbicq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
9107 | ||
3ce755a8 | 9108 | #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ |
10a0ee8a SMW |
9109 | int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \ |
9110 | int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \ | |
9111 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ | |
9112 | int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \ | |
9113 | int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \ | |
9114 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1))) | |
1dfcc3b5 | 9115 | |
3ce755a8 | 9116 | #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ |
10a0ee8a SMW |
9117 | int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ |
9118 | int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ | |
9119 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ | |
9120 | int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ | |
9121 | int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ | |
9122 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) | |
3ce755a8 | 9123 | |
1dfcc3b5 | 9124 | |
3ce755a8 | 9125 | #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ |
10a0ee8a SMW |
9126 | int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ |
9127 | int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ | |
9128 | int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ | |
9129 | int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ | |
9130 | int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ | |
9131 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) | |
1dfcc3b5 | 9132 | |
1a5c27b1 SP |
9133 | #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9134 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
9135 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vgetq_lane_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \ | |
9136 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vgetq_lane_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \ | |
9137 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vgetq_lane_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \ | |
9138 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vgetq_lane_s64 (__ARM_mve_coerce(__p0, int64x2_t), p1), \ | |
9139 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vgetq_lane_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \ | |
9140 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vgetq_lane_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \ | |
9141 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vgetq_lane_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \ | |
9142 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vgetq_lane_u64 (__ARM_mve_coerce(__p0, uint64x2_t), p1));}) | |
9143 | ||
1a5c27b1 SP |
9144 | #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9145 | __typeof(p1) __p1 = (p1); \ | |
9146 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9147 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ |
9148 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ | |
9149 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9150 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \ | |
9151 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ | |
9152 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
9153 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
9154 | int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2));}) | |
1a5c27b1 | 9155 | |
429d607b SP |
9156 | #endif /* MVE Integer. */ |
9157 | ||
6a90680b ASDV |
9158 | |
9159 | ||
261014a1 SP |
9160 | #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ |
9161 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9162 | int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \ |
10a0ee8a | 9163 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) |
261014a1 | 9164 | |
261014a1 SP |
9165 | #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ |
9166 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9167 | int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \ |
10a0ee8a | 9168 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) |
261014a1 | 9169 | |
261014a1 SP |
9170 | #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ |
9171 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9172 | int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \ |
10a0ee8a | 9173 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) |
261014a1 | 9174 | |
261014a1 SP |
9175 | #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ |
9176 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9177 | int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \ |
10a0ee8a | 9178 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) |
261014a1 | 9179 | |
261014a1 SP |
9180 | #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ |
9181 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9182 | int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \ |
10a0ee8a | 9183 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) |
261014a1 | 9184 | |
261014a1 SP |
9185 | #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ |
9186 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9187 | int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \ |
10a0ee8a | 9188 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) |
261014a1 | 9189 | |
261014a1 SP |
9190 | #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9191 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9192 | int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \ |
10a0ee8a | 9193 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) |
261014a1 | 9194 | |
261014a1 SP |
9195 | #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9196 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9197 | int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \ |
10a0ee8a | 9198 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) |
261014a1 | 9199 | |
261014a1 SP |
9200 | #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9201 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9202 | int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \ |
10a0ee8a | 9203 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) |
261014a1 | 9204 | |
261014a1 SP |
9205 | #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9206 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9207 | int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \ |
10a0ee8a | 9208 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) |
261014a1 | 9209 | |
261014a1 SP |
9210 | #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9211 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9212 | int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \ |
10a0ee8a | 9213 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) |
261014a1 | 9214 | |
261014a1 SP |
9215 | #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ |
9216 | _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f | 9217 | int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \ |
10a0ee8a | 9218 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) |
261014a1 | 9219 | |
261014a1 SP |
9220 | #define __arm_vadciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9221 | __typeof(p1) __p1 = (p1); \ | |
9222 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
9223 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadciq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9224 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadciq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
9225 | ||
41e1a7ff SP |
9226 | #define __arm_vstrdq_scatter_base_wb_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
9227 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
9228 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_wb_p_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ | |
9229 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_p_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) | |
9230 | ||
41e1a7ff SP |
9231 | #define __arm_vstrdq_scatter_base_wb(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ |
9232 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
9233 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_wb_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t)), \ | |
9234 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) | |
9235 | ||
3ce755a8 | 9236 | #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ |
10a0ee8a SMW |
9237 | int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \ |
9238 | int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1))) | |
4cc23303 | 9239 | |
3ce755a8 | 9240 | #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ |
10a0ee8a SMW |
9241 | int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \ |
9242 | int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2))) | |
4cc23303 | 9243 | |
3ce755a8 | 9244 | #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ |
10a0ee8a SMW |
9245 | int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \ |
9246 | int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1))) | |
3ce755a8 ASDV |
9247 | |
9248 | #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ | |
10a0ee8a SMW |
9249 | int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \ |
9250 | int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2))) | |
4cc23303 | 9251 | |
c3562f81 SP |
9252 | #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ |
9253 | __typeof(p1) __p1 = (p1); \ | |
9254 | __typeof(p2) __p2 = (p2); \ | |
9255 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
9256 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadciq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \ | |
9257 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadciq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));}) | |
9258 | ||
c3562f81 SP |
9259 | #define __arm_vadciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9260 | __typeof(p1) __p1 = (p1); \ | |
9261 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
9262 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadciq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9263 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadciq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
9264 | ||
c3562f81 SP |
9265 | #define __arm_vadcq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ |
9266 | __typeof(p1) __p1 = (p1); \ | |
9267 | __typeof(p2) __p2 = (p2); \ | |
9268 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
9269 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadcq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \ | |
9270 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadcq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));}) | |
9271 | ||
c3562f81 SP |
9272 | #define __arm_vadcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9273 | __typeof(p1) __p1 = (p1); \ | |
9274 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
9275 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vadcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9276 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vadcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
9277 | ||
c3562f81 SP |
9278 | #define __arm_vsbciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ |
9279 | __typeof(p1) __p1 = (p1); \ | |
9280 | __typeof(p2) __p2 = (p2); \ | |
9281 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
9282 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbciq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \ | |
9283 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbciq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));}) | |
9284 | ||
c3562f81 SP |
9285 | #define __arm_vsbciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9286 | __typeof(p1) __p1 = (p1); \ | |
9287 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
9288 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbciq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9289 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbciq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
9290 | ||
c3562f81 SP |
9291 | #define __arm_vsbcq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ |
9292 | __typeof(p1) __p1 = (p1); \ | |
9293 | __typeof(p2) __p2 = (p2); \ | |
9294 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ | |
9295 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbcq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3, p4), \ | |
9296 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbcq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3, p4));}) | |
9297 | ||
c3562f81 SP |
9298 | #define __arm_vsbcq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9299 | __typeof(p1) __p1 = (p1); \ | |
9300 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
9301 | int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsbcq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9302 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsbcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
4cc23303 | 9303 | |
3ce755a8 ASDV |
9304 | #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ |
9305 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9306 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ |
9307 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
9308 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ | |
9309 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ | |
9310 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
9311 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
535a8645 | 9312 | |
3ce755a8 ASDV |
9313 | #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
9314 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9315 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ |
9316 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
9317 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ | |
9318 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
9319 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
9320 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
535a8645 | 9321 | |
92f80065 SP |
9322 | #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
9323 | __typeof(p1) __p1 = (p1); \ | |
9324 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f SP |
9325 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \ |
9326 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \ | |
9327 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \ | |
10a0ee8a SMW |
9328 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ |
9329 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ | |
9330 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) | |
92f80065 | 9331 | |
92f80065 SP |
9332 | #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
9333 | __typeof(p1) __p1 = (p1); \ | |
9334 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
c6ffc89f SP |
9335 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \ |
9336 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \ | |
9337 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \ | |
10a0ee8a SMW |
9338 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ |
9339 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ | |
9340 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) | |
92f80065 | 9341 | |
92f80065 SP |
9342 | #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9343 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
c6ffc89f | 9344 | int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \ |
10a0ee8a | 9345 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) |
92f80065 | 9346 | |
92f80065 SP |
9347 | #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9348 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
c6ffc89f | 9349 | int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \ |
10a0ee8a | 9350 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) |
92f80065 | 9351 | |
92f80065 SP |
9352 | #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9353 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
c6ffc89f | 9354 | int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \ |
10a0ee8a | 9355 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) |
92f80065 | 9356 | |
92f80065 SP |
9357 | #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9358 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
c6ffc89f | 9359 | int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \ |
10a0ee8a | 9360 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) |
92f80065 | 9361 | |
92f80065 SP |
9362 | #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9363 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
c6ffc89f | 9364 | int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \ |
10a0ee8a | 9365 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) |
92f80065 | 9366 | |
92f80065 SP |
9367 | #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \ |
9368 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
c6ffc89f | 9369 | int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \ |
10a0ee8a | 9370 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) |
92f80065 | 9371 | |
92f80065 SP |
9372 | #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ |
9373 | __typeof(p1) __p1 = (p1); \ | |
9374 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9375 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ |
9376 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ | |
9377 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ | |
9378 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ | |
9379 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ | |
9380 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) | |
92f80065 | 9381 | |
92f80065 SP |
9382 | #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9383 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
9384 | int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, (const int) p2), \ |
9385 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, (const int) p2));}) | |
92f80065 | 9386 | |
92f80065 SP |
9387 | #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9388 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
9389 | int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ |
9390 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
92f80065 | 9391 | |
92f80065 SP |
9392 | #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9393 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
9394 | int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ |
9395 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
92f80065 | 9396 | |
92f80065 SP |
9397 | #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ |
9398 | __typeof(p1) __p1 = (p1); \ | |
9399 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9400 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ |
9401 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ | |
9402 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ | |
9403 | int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ | |
9404 | int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ | |
9405 | int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) | |
92f80065 | 9406 | |
92f80065 SP |
9407 | #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9408 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
9409 | int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ |
9410 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
92f80065 | 9411 | |
92f80065 SP |
9412 | #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9413 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
9414 | int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ |
9415 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
92f80065 | 9416 | |
92f80065 SP |
9417 | #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9418 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
10a0ee8a SMW |
9419 | int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ |
9420 | int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) | |
92f80065 | 9421 | |
88c9a831 SP |
9422 | #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
9423 | _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ | |
9424 | int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlcq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1, p2, p3), \ | |
9425 | int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlcq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1, p2, p3), \ | |
9426 | int (*)[__ARM_mve_type_int32x4_t]: __arm_vshlcq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1, p2, p3), \ | |
9427 | int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlcq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1, p2, p3), \ | |
9428 | int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2, p3), \ | |
9429 | int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2, p3));}) | |
9430 | ||
3ce755a8 ASDV |
9431 | #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ |
9432 | _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9433 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ |
9434 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ | |
9435 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ | |
9436 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ | |
9437 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ | |
9438 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) | |
e81d0d9e | 9439 | |
9b905ba9 SP |
9440 | #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9441 | __typeof(p1) __p1 = (p1); \ | |
9442 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ | |
10a0ee8a SMW |
9443 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ |
9444 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ | |
9445 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ | |
9446 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ | |
9447 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ | |
9448 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) | |
e81d0d9e | 9449 | |
e81d0d9e SP |
9450 | #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ |
9451 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
9452 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t)), \ | |
9453 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) | |
9454 | ||
e81d0d9e SP |
9455 | #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ |
9456 | _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ | |
9457 | int (*)[__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_base_p_s64 (p0, p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ | |
9458 | int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_p_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) | |
9459 | ||
9b905ba9 SP |
9460 | #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ |
9461 | __typeof(p1) __p1 = (p1); \ | |
e81d0d9e | 9462 | __typeof(p2) __p2 = (p2); \ |
9b905ba9 | 9463 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9464 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ |
9465 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ | |
9466 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ | |
9467 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ | |
9468 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ | |
9469 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) | |
e81d0d9e | 9470 | |
9b905ba9 SP |
9471 | #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ |
9472 | __typeof(p1) __p1 = (p1); \ | |
e81d0d9e | 9473 | __typeof(p2) __p2 = (p2); \ |
9b905ba9 | 9474 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ |
10a0ee8a SMW |
9475 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ |
9476 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ | |
9477 | int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ | |
9478 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ | |
9479 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ | |
9480 | int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) | |
9b905ba9 SP |
9481 | |
9482 | #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ | |
9483 | __typeof(p2) __p2 = (p2); \ | |
9484 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ | |
10a0ee8a SMW |
9485 | int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ |
9486 | int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) | |
9b905ba9 SP |
9487 | |
9488 | #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ | |
9489 | __typeof(p2) __p2 = (p2); \ | |
9490 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ | |
10a0ee8a SMW |
9491 | int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ |
9492 | int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) | |
9b905ba9 SP |
9493 | |
9494 | #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ | |
9495 | __typeof(p2) __p2 = (p2); \ | |
9496 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ | |
10a0ee8a SMW |
9497 | int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ |
9498 | int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) | |
9b905ba9 SP |
9499 | |
9500 | #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ | |
9501 | __typeof(p2) __p2 = (p2); \ | |
9502 | _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ | |
10a0ee8a SMW |
9503 | int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ |
9504 | int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) | |
e81d0d9e | 9505 | |
6a90680b | 9506 | #endif /* __cplusplus */ |
3b6e79ae | 9507 | #endif /* __ARM_FEATURE_MVE */ |
63c8f7d6 | 9508 | #endif /* _GCC_ARM_MVE_H. */ |