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90e7678c DC |
1 | /* Definitions of target machine for GNU compiler, |
2 | for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. | |
85ec4feb | 3 | Copyright (C) 1998-2018 Free Software Foundation, Inc. |
92bffc14 | 4 | Contributed by Denis Chertykov (chertykov@gmail.com) |
90e7678c | 5 | |
7ec022b2 | 6 | This file is part of GCC. |
90e7678c | 7 | |
7ec022b2 | 8 | GCC is free software; you can redistribute it and/or modify |
90e7678c | 9 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
90e7678c DC |
11 | any later version. |
12 | ||
7ec022b2 | 13 | GCC is distributed in the hope that it will be useful, |
90e7678c DC |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
90e7678c | 21 | |
562f552b GJL |
22 | typedef struct |
23 | { | |
24 | /* Id of the address space as used in c_register_addr_space */ | |
25 | unsigned char id; | |
26 | ||
27 | /* Flavour of memory: 0 = RAM, 1 = Flash */ | |
28 | int memory_class; | |
29 | ||
30 | /* Width of pointer (in bytes) */ | |
31 | int pointer_size; | |
32 | ||
33 | /* Name of the address space as visible to the user */ | |
34 | const char *name; | |
35 | ||
36 | /* Segment (i.e. 64k memory chunk) number. */ | |
37 | int segment; | |
e5669488 GJL |
38 | |
39 | /* Section prefix, e.g. ".progmem1.data" */ | |
40 | const char *section_name; | |
562f552b GJL |
41 | } avr_addrspace_t; |
42 | ||
43 | extern const avr_addrspace_t avr_addrspace[]; | |
44 | ||
45 | /* Known address spaces */ | |
46 | ||
47 | enum | |
48 | { | |
e5669488 | 49 | ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */ |
3a840863 GJL |
50 | ADDR_SPACE_FLASH, |
51 | ADDR_SPACE_FLASH1, | |
52 | ADDR_SPACE_FLASH2, | |
53 | ADDR_SPACE_FLASH3, | |
54 | ADDR_SPACE_FLASH4, | |
55 | ADDR_SPACE_FLASH5, | |
e5669488 GJL |
56 | ADDR_SPACE_MEMX, |
57 | /* Sentinel */ | |
58 | ADDR_SPACE_COUNT | |
562f552b GJL |
59 | }; |
60 | ||
97c281da | 61 | #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) |
470a4c97 | 62 | |
3266ddb3 GJL |
63 | #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \ |
64 | && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3]) | |
65 | #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS) | |
4a2caf6c GJL |
66 | #define AVR_HAVE_MUL (avr_arch->have_mul) |
67 | #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx) | |
c1dd9790 | 68 | #define AVR_HAVE_LPM (!AVR_TINY) |
4a2caf6c GJL |
69 | #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx) |
70 | #define AVR_HAVE_ELPM (avr_arch->have_elpm) | |
71 | #define AVR_HAVE_ELPMX (avr_arch->have_elpmx) | |
72 | #define AVR_HAVE_RAMPD (avr_arch->have_rampd) | |
73 | #define AVR_HAVE_RAMPX (avr_arch->have_rampd) | |
74 | #define AVR_HAVE_RAMPY (avr_arch->have_rampd) | |
75 | #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \ | |
76 | || avr_arch->have_rampd) | |
77 | #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall) | |
7fd6378e GJL |
78 | |
79 | /* Handling of 8-bit SP versus 16-bit SP is as follows: | |
80 | ||
f9d29866 | 81 | FIXME: DRIVER_SELF_SPECS has changed. |
7fd6378e GJL |
82 | -msp8 is used internally to select the right multilib for targets with |
83 | 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices | |
84 | with 8-bit SP or by multilib generation machinery. If a frame pointer is | |
85 | needed and SP is only 8 bits wide, SP is zero-extended to get FP. | |
86 | ||
87 | TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option. | |
88 | This option has no effect on multilib selection. It serves to save some | |
89 | bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone. | |
90 | ||
91 | These two properties are reflected by built-in macros __AVR_SP8__ resp. | |
92 | __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation | |
93 | there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */ | |
94 | ||
4a2caf6c GJL |
95 | #define AVR_HAVE_8BIT_SP \ |
96 | (TARGET_TINY_STACK || avr_sp8) | |
7fd6378e GJL |
97 | |
98 | #define AVR_HAVE_SPH (!avr_sp8) | |
90e7678c | 99 | |
693092fb BH |
100 | #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) |
101 | #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) | |
4fc2b4ff | 102 | |
4a2caf6c GJL |
103 | #define AVR_XMEGA (avr_arch->xmega_p) |
104 | #define AVR_TINY (avr_arch->tiny_p) | |
2da8c1ad | 105 | |
90e7678c | 106 | #define BITS_BIG_ENDIAN 0 |
90e7678c | 107 | #define BYTES_BIG_ENDIAN 0 |
90e7678c DC |
108 | #define WORDS_BIG_ENDIAN 0 |
109 | ||
78cf8279 MM |
110 | #ifdef IN_LIBGCC2 |
111 | /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ | |
112 | #define UNITS_PER_WORD 4 | |
113 | #else | |
d6b4baa4 | 114 | /* Width of a word, in units (bytes). */ |
90e7678c | 115 | #define UNITS_PER_WORD 1 |
78cf8279 | 116 | #endif |
90e7678c | 117 | |
90e7678c DC |
118 | #define POINTER_SIZE 16 |
119 | ||
120 | ||
121 | /* Maximum sized of reasonable data type | |
122 | DImode or Dfmode ... */ | |
123 | #define MAX_FIXED_MODE_SIZE 32 | |
124 | ||
90e7678c DC |
125 | #define PARM_BOUNDARY 8 |
126 | ||
90e7678c DC |
127 | #define FUNCTION_BOUNDARY 8 |
128 | ||
90e7678c DC |
129 | #define EMPTY_FIELD_BOUNDARY 8 |
130 | ||
d6b4baa4 | 131 | /* No data type wants to be aligned rounder than this. */ |
90e7678c DC |
132 | #define BIGGEST_ALIGNMENT 8 |
133 | ||
93976860 | 134 | #define TARGET_VTABLE_ENTRY_ALIGN 8 |
90e7678c | 135 | |
90e7678c DC |
136 | #define STRICT_ALIGNMENT 0 |
137 | ||
90e7678c | 138 | #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) |
90e7678c | 139 | #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16) |
90e7678c | 140 | #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) |
11338cda | 141 | #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) |
90e7678c | 142 | #define FLOAT_TYPE_SIZE 32 |
90e7678c | 143 | #define DOUBLE_TYPE_SIZE 32 |
90e7678c | 144 | #define LONG_DOUBLE_TYPE_SIZE 32 |
e55e4056 | 145 | #define LONG_LONG_ACCUM_TYPE_SIZE 64 |
90e7678c DC |
146 | |
147 | #define DEFAULT_SIGNED_CHAR 1 | |
90e7678c DC |
148 | |
149 | #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") | |
5fecfd8d | 150 | #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") |
90e7678c DC |
151 | |
152 | #define WCHAR_TYPE_SIZE 16 | |
90e7678c DC |
153 | |
154 | #define FIRST_PSEUDO_REGISTER 36 | |
90e7678c | 155 | |
cfbaed3b DC |
156 | #define FIXED_REGISTERS {\ |
157 | 1,1,/* r0 r1 */\ | |
158 | 0,0,/* r2 r3 */\ | |
159 | 0,0,/* r4 r5 */\ | |
160 | 0,0,/* r6 r7 */\ | |
161 | 0,0,/* r8 r9 */\ | |
162 | 0,0,/* r10 r11 */\ | |
163 | 0,0,/* r12 r13 */\ | |
164 | 0,0,/* r14 r15 */\ | |
165 | 0,0,/* r16 r17 */\ | |
166 | 0,0,/* r18 r19 */\ | |
167 | 0,0,/* r20 r21 */\ | |
168 | 0,0,/* r22 r23 */\ | |
169 | 0,0,/* r24 r25 */\ | |
170 | 0,0,/* r26 r27 */\ | |
171 | 0,0,/* r28 r29 */\ | |
172 | 0,0,/* r30 r31 */\ | |
173 | 1,1,/* STACK */\ | |
174 | 1,1 /* arg pointer */ } | |
90e7678c DC |
175 | |
176 | #define CALL_USED_REGISTERS { \ | |
177 | 1,1,/* r0 r1 */ \ | |
cfbaed3b DC |
178 | 0,0,/* r2 r3 */ \ |
179 | 0,0,/* r4 r5 */ \ | |
180 | 0,0,/* r6 r7 */ \ | |
181 | 0,0,/* r8 r9 */ \ | |
182 | 0,0,/* r10 r11 */ \ | |
183 | 0,0,/* r12 r13 */ \ | |
184 | 0,0,/* r14 r15 */ \ | |
185 | 0,0,/* r16 r17 */ \ | |
186 | 1,1,/* r18 r19 */ \ | |
187 | 1,1,/* r20 r21 */ \ | |
188 | 1,1,/* r22 r23 */ \ | |
189 | 1,1,/* r24 r25 */ \ | |
190 | 1,1,/* r26 r27 */ \ | |
191 | 0,0,/* r28 r29 */ \ | |
192 | 1,1,/* r30 r31 */ \ | |
193 | 1,1,/* STACK */ \ | |
194 | 1,1 /* arg pointer */ } | |
90e7678c | 195 | |
90e7678c DC |
196 | #define REG_ALLOC_ORDER { \ |
197 | 24,25, \ | |
198 | 18,19, \ | |
199 | 20,21, \ | |
200 | 22,23, \ | |
201 | 30,31, \ | |
202 | 26,27, \ | |
203 | 28,29, \ | |
204 | 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ | |
205 | 0,1, \ | |
206 | 32,33,34,35 \ | |
207 | } | |
90e7678c | 208 | |
00892272 | 209 | #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order() |
90e7678c DC |
210 | |
211 | ||
90e7678c DC |
212 | enum reg_class { |
213 | NO_REGS, | |
214 | R0_REG, /* r0 */ | |
215 | POINTER_X_REGS, /* r26 - r27 */ | |
216 | POINTER_Y_REGS, /* r28 - r29 */ | |
217 | POINTER_Z_REGS, /* r30 - r31 */ | |
218 | STACK_REG, /* STACK */ | |
219 | BASE_POINTER_REGS, /* r28 - r31 */ | |
220 | POINTER_REGS, /* r26 - r31 */ | |
221 | ADDW_REGS, /* r24 - r31 */ | |
222 | SIMPLE_LD_REGS, /* r16 - r23 */ | |
223 | LD_REGS, /* r16 - r31 */ | |
224 | NO_LD_REGS, /* r0 - r15 */ | |
225 | GENERAL_REGS, /* r0 - r31 */ | |
226 | ALL_REGS, LIM_REG_CLASSES | |
227 | }; | |
90e7678c DC |
228 | |
229 | ||
230 | #define N_REG_CLASSES (int)LIM_REG_CLASSES | |
90e7678c DC |
231 | |
232 | #define REG_CLASS_NAMES { \ | |
233 | "NO_REGS", \ | |
234 | "R0_REG", /* r0 */ \ | |
235 | "POINTER_X_REGS", /* r26 - r27 */ \ | |
236 | "POINTER_Y_REGS", /* r28 - r29 */ \ | |
237 | "POINTER_Z_REGS", /* r30 - r31 */ \ | |
238 | "STACK_REG", /* STACK */ \ | |
239 | "BASE_POINTER_REGS", /* r28 - r31 */ \ | |
240 | "POINTER_REGS", /* r26 - r31 */ \ | |
241 | "ADDW_REGS", /* r24 - r31 */ \ | |
242 | "SIMPLE_LD_REGS", /* r16 - r23 */ \ | |
243 | "LD_REGS", /* r16 - r31 */ \ | |
244 | "NO_LD_REGS", /* r0 - r15 */ \ | |
245 | "GENERAL_REGS", /* r0 - r31 */ \ | |
246 | "ALL_REGS" } | |
90e7678c | 247 | |
90e7678c DC |
248 | #define REG_CLASS_CONTENTS { \ |
249 | {0x00000000,0x00000000}, /* NO_REGS */ \ | |
250 | {0x00000001,0x00000000}, /* R0_REG */ \ | |
fa96aa45 GJL |
251 | {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ |
252 | {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ | |
253 | {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ | |
90e7678c | 254 | {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ |
fa96aa45 | 255 | {(3u << REG_Y) | (3u << REG_Z), \ |
cfbaed3b | 256 | 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ |
fa96aa45 | 257 | {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \ |
cfbaed3b | 258 | 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ |
fa96aa45 | 259 | {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \ |
90e7678c | 260 | 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ |
35d8c8e2 | 261 | {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ |
fa96aa45 | 262 | {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\ |
cfbaed3b | 263 | 0x00000000}, /* LD_REGS, r16 - r31 */ \ |
35d8c8e2 | 264 | {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ |
cfbaed3b DC |
265 | {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ |
266 | {0xffffffff,0x00000003} /* ALL_REGS */ \ | |
90e7678c | 267 | } |
90e7678c DC |
268 | |
269 | #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) | |
90e7678c | 270 | |
86fc3d06 UW |
271 | #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \ |
272 | avr_mode_code_base_reg_class (mode, as, outer_code, index_code) | |
90e7678c DC |
273 | |
274 | #define INDEX_REG_CLASS NO_REGS | |
90e7678c | 275 | |
86fc3d06 UW |
276 | #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \ |
277 | avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code) | |
90e7678c DC |
278 | |
279 | #define REGNO_OK_FOR_INDEX_P(NUM) 0 | |
90e7678c | 280 | |
42db504c | 281 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
90e7678c | 282 | |
90e7678c DC |
283 | #define STACK_PUSH_CODE POST_DEC |
284 | ||
62f9f30b | 285 | #define STACK_GROWS_DOWNWARD 1 |
90e7678c | 286 | |
90e7678c | 287 | #define STACK_POINTER_OFFSET 1 |
90e7678c DC |
288 | |
289 | #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
90e7678c DC |
290 | |
291 | #define STACK_BOUNDARY 8 | |
90e7678c DC |
292 | |
293 | #define STACK_POINTER_REGNUM 32 | |
90e7678c | 294 | |
cfbaed3b | 295 | #define FRAME_POINTER_REGNUM REG_Y |
90e7678c DC |
296 | |
297 | #define ARG_POINTER_REGNUM 34 | |
90e7678c | 298 | |
c1dd9790 | 299 | #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2) |
90e7678c | 300 | |
90e7678c | 301 | #define ELIMINABLE_REGS { \ |
0c9ef7ad GJL |
302 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ |
303 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \ | |
304 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
305 | { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } } | |
90e7678c | 306 | |
cfbaed3b | 307 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
c21ca196 | 308 | OFFSET = avr_initial_elimination_offset (FROM, TO) |
90e7678c | 309 | |
a212a5d4 | 310 | #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) |
3454eb73 | 311 | |
28734c39 AH |
312 | /* Don't use Push rounding. expr.c: emit_single_push_insn is broken |
313 | for POST_DEC targets (PR27386). */ | |
314 | /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ | |
90e7678c | 315 | |
00892272 GJL |
316 | typedef struct avr_args |
317 | { | |
318 | /* # Registers available for passing */ | |
319 | int nregs; | |
320 | ||
321 | /* Next available register number */ | |
322 | int regno; | |
90e7678c | 323 | } CUMULATIVE_ARGS; |
90e7678c | 324 | |
0f6937fe | 325 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ |
00892272 | 326 | avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) |
90e7678c | 327 | |
00892272 | 328 | #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r) |
90e7678c | 329 | |
90e7678c | 330 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
90e7678c | 331 | |
4fc2b4ff | 332 | #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) |
90e7678c DC |
333 | |
334 | #define HAVE_POST_INCREMENT 1 | |
90e7678c | 335 | #define HAVE_PRE_DECREMENT 1 |
90e7678c | 336 | |
90e7678c | 337 | #define MAX_REGS_PER_ADDRESS 1 |
90e7678c | 338 | |
36a50ab6 GJL |
339 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
340 | do { \ | |
c1a330ef | 341 | rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \ |
36a50ab6 GJL |
342 | ADDR_TYPE (TYPE), \ |
343 | IND_L, make_memloc); \ | |
344 | if (new_x) \ | |
345 | { \ | |
346 | X = new_x; \ | |
347 | goto WIN; \ | |
348 | } \ | |
349 | } while (0) | |
35d8c8e2 | 350 | |
1bcd0192 GJL |
351 | /* We increase branch costs after reload in order to keep basic-block |
352 | reordering from introducing out-of-line jumps and to prefer fall-through | |
353 | edges instead. The default branch costs are 0, mainly because otherwise | |
354 | do_store_flag might come up with bloated code. */ | |
355 | #define BRANCH_COST(speed_p, predictable_p) \ | |
356 | (avr_branch_cost + (reload_completed ? 4 : 0)) | |
51296ba0 | 357 | |
90e7678c | 358 | #define SLOW_BYTE_ACCESS 0 |
90e7678c | 359 | |
1e8552c2 | 360 | #define NO_FUNCTION_CSE 1 |
90e7678c | 361 | |
7c209481 GJL |
362 | #define REGISTER_TARGET_PRAGMAS() \ |
363 | do { \ | |
364 | avr_register_target_pragmas(); \ | |
365 | } while (0) | |
366 | ||
8c13c7b3 | 367 | #define TEXT_SECTION_ASM_OP "\t.text" |
90e7678c | 368 | |
8c13c7b3 | 369 | #define DATA_SECTION_ASM_OP "\t.data" |
90e7678c | 370 | |
b47cae3d | 371 | #define BSS_SECTION_ASM_OP "\t.section .bss" |
b47cae3d | 372 | |
9af145ae MM |
373 | /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. |
374 | There are no shared libraries on this target, and these sections are | |
375 | placed in the read-only program memory, so they are not writable. */ | |
376 | ||
377 | #undef CTORS_SECTION_ASM_OP | |
378 | #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits" | |
379 | ||
380 | #undef DTORS_SECTION_ASM_OP | |
381 | #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits" | |
382 | ||
383 | #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor | |
9af145ae MM |
384 | |
385 | #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor | |
9af145ae | 386 | |
34babc73 AH |
387 | #define SUPPORTS_INIT_PRIORITY 0 |
388 | ||
92383fee GJL |
389 | /* We pretend jump tables are in text section because otherwise, |
390 | final.c will switch to .rodata before jump tables and thereby | |
391 | triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC, | |
392 | we still have full control over the jump tables themselves. */ | |
2d761a37 | 393 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
90e7678c | 394 | |
90e7678c | 395 | #define ASM_COMMENT_START " ; " |
90e7678c DC |
396 | |
397 | #define ASM_APP_ON "/* #APP */\n" | |
90e7678c DC |
398 | |
399 | #define ASM_APP_OFF "/* #NOAPP */\n" | |
90e7678c | 400 | |
980d8882 | 401 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) |
90e7678c | 402 | |
516edfdd GJL |
403 | #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \ |
404 | avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false) | |
90e7678c | 405 | |
53802f27 | 406 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
f9d29866 JR |
407 | avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \ |
408 | asm_output_aligned_bss) | |
b47cae3d | 409 | |
516edfdd GJL |
410 | #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ |
411 | avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true) | |
90e7678c | 412 | |
506a61b1 KG |
413 | /* Globalizing directive for a label. */ |
414 | #define GLOBAL_ASM_OP ".global\t" | |
90e7678c | 415 | |
6bec29c9 | 416 | #define SUPPORTS_WEAK 1 |
90e7678c | 417 | |
90e7678c | 418 | #define HAS_INIT_SECTION 1 |
90e7678c DC |
419 | |
420 | #define REGISTER_NAMES { \ | |
421 | "r0","r1","r2","r3","r4","r5","r6","r7", \ | |
422 | "r8","r9","r10","r11","r12","r13","r14","r15", \ | |
423 | "r16","r17","r18","r19","r20","r21","r22","r23", \ | |
424 | "r24","r25","r26","r27","r28","r29","r30","r31", \ | |
cfbaed3b | 425 | "__SP_L__","__SP_H__","argL","argH"} |
90e7678c | 426 | |
00892272 GJL |
427 | #define FINAL_PRESCAN_INSN(insn, operand, nop) \ |
428 | avr_final_prescan_insn (insn, operand,nop) | |
90e7678c | 429 | |
90e7678c DC |
430 | #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ |
431 | { \ | |
25b9575b | 432 | gcc_assert (REGNO < 32); \ |
90e7678c DC |
433 | fprintf (STREAM, "\tpush\tr%d", REGNO); \ |
434 | } | |
90e7678c DC |
435 | |
436 | #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ | |
437 | { \ | |
25b9575b | 438 | gcc_assert (REGNO < 32); \ |
90e7678c DC |
439 | fprintf (STREAM, "\tpop\tr%d", REGNO); \ |
440 | } | |
90e7678c | 441 | |
92383fee GJL |
442 | #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \ |
443 | avr_output_addr_vec (TLABEL, TDATA) | |
90e7678c | 444 | |
b49eb0ff GJL |
445 | #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ |
446 | do { \ | |
447 | if ((POWER) > 0) \ | |
448 | fprintf (STREAM, "\t.p2align\t%d\n", POWER); \ | |
5178d50a | 449 | } while (0) |
90e7678c DC |
450 | |
451 | #define CASE_VECTOR_MODE HImode | |
90e7678c | 452 | |
90e7678c | 453 | #undef WORD_REGISTER_OPERATIONS |
90e7678c | 454 | |
998f15f3 SKS |
455 | /* Can move only a single byte from memory to reg in a |
456 | single instruction. */ | |
457 | ||
458 | #define MOVE_MAX 1 | |
459 | ||
460 | /* Allow upto two bytes moves to occur using by_pieces | |
461 | infrastructure */ | |
462 | ||
463 | #define MOVE_MAX_PIECES 2 | |
464 | ||
465 | /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen | |
466 | by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES | |
467 | was 4. When optimizing for size, allow memory moves upto 2 bytes. | |
468 | Also see avr_use_by_pieces_infrastructure_p. */ | |
469 | ||
470 | #define MOVE_RATIO(speed) ((speed) ? 3 : 2) | |
90e7678c | 471 | |
90e7678c | 472 | #define Pmode HImode |
90e7678c DC |
473 | |
474 | #define FUNCTION_MODE HImode | |
3cea4788 | 475 | |
90e7678c | 476 | #define DOLLARS_IN_IDENTIFIERS 0 |
90e7678c | 477 | |
90e7678c DC |
478 | #define TRAMPOLINE_SIZE 4 |
479 | ||
90e7678c DC |
480 | /* Store in cc_status the expressions |
481 | that the condition codes will describe | |
482 | after execution of an instruction whose pattern is EXP. | |
483 | Do not alter them if the instruction would not alter the cc's. */ | |
484 | ||
00892272 | 485 | #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN) |
90e7678c DC |
486 | |
487 | /* The add insns don't set overflow in a usable way. */ | |
488 | #define CC_OVERFLOW_UNUSABLE 01000 | |
489 | /* The mov,and,or,xor insns don't set carry. That's ok though as the | |
490 | Z bit is all we need when doing unsigned comparisons on the result of | |
491 | these insns (since they're always with 0). However, conditions.h has | |
492 | CC_NO_OVERFLOW defined for this purpose. Rename it to something more | |
493 | understandable. */ | |
494 | #define CC_NO_CARRY CC_NO_OVERFLOW | |
495 | ||
496 | ||
497 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
498 | for profiling a function entry. */ | |
499 | ||
500 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
501 | fprintf (FILE, "/* profiler %d */", (LABELNO)) | |
502 | ||
00892272 GJL |
503 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
504 | (LENGTH = avr_adjust_insn_length (INSN, LENGTH)) | |
90e7678c | 505 | |
4a2caf6c | 506 | extern const char *avr_devicespecs_file (int, const char**); |
92c392e6 | 507 | |
4a2caf6c GJL |
508 | #define EXTRA_SPEC_FUNCTIONS \ |
509 | { "device-specs-file", avr_devicespecs_file }, | |
27be769c | 510 | |
4a2caf6c GJL |
511 | /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs. |
512 | Apply '%s' to a static string to inflate the file (directory) name which | |
513 | is used to diagnose problems with reading the specs file. */ | |
9af145ae | 514 | |
4a2caf6c GJL |
515 | #undef DRIVER_SELF_SPECS |
516 | #define DRIVER_SELF_SPECS \ | |
517 | " %:device-specs-file(device-specs%s %{mmcu=*:%*})" | |
90e7678c | 518 | |
4a2caf6c GJL |
519 | /* No libstdc++ for now. Empty string doesn't work. */ |
520 | #define LIBSTDCXX "gcc" | |
90e7678c | 521 | |
4a2caf6c GJL |
522 | /* This is the default without any -mmcu=* option. */ |
523 | #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT } | |
6bec29c9 | 524 | |
90e7678c DC |
525 | #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ |
526 | TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) | |
527 | ||
90e7678c DC |
528 | #define CR_TAB "\n\t" |
529 | ||
d1fc69e4 AS |
530 | #define DWARF2_ADDR_SIZE 4 |
531 | ||
bdfe906f RH |
532 | #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx () |
533 | #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2) | |
534 | ||
535 | /* The caller's stack pointer value immediately before the call | |
536 | is one byte below the first argument. */ | |
537 | #define ARG_POINTER_CFA_OFFSET(FNDECL) -1 | |
538 | ||
91635d08 AS |
539 | #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ |
540 | avr_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
541 | ||
4fc2b4ff AH |
542 | /* A C structure for machine-specific, per-function data. |
543 | This is added to the cfun structure. */ | |
d1b38208 | 544 | struct GTY(()) machine_function |
4fc2b4ff | 545 | { |
4fc2b4ff AH |
546 | /* 'true' - if current function is a naked function. */ |
547 | int is_naked; | |
548 | ||
549 | /* 'true' - if current function is an interrupt function | |
550 | as specified by the "interrupt" attribute. */ | |
551 | int is_interrupt; | |
552 | ||
553 | /* 'true' - if current function is a signal function | |
554 | as specified by the "signal" attribute. */ | |
555 | int is_signal; | |
96ac4c9b | 556 | |
9b678d96 | 557 | /* 'true' - if current function is a 'task' function |
96ac4c9b AS |
558 | as specified by the "OS_task" attribute. */ |
559 | int is_OS_task; | |
9b678d96 AS |
560 | |
561 | /* 'true' - if current function is a 'main' function | |
562 | as specified by the "OS_main" attribute. */ | |
563 | int is_OS_main; | |
a212a5d4 AH |
564 | |
565 | /* Current function stack size. */ | |
566 | int stack_usage; | |
980a0ff4 GJL |
567 | |
568 | /* 'true' if a callee might be tail called */ | |
569 | int sibcall_fails; | |
eac188c5 GJL |
570 | |
571 | /* 'true' if the above is_foo predicates are sanity-checked to avoid | |
572 | multiple diagnose for the same function. */ | |
573 | int attributes_checked_p; | |
63866e04 GJL |
574 | |
575 | /* 'true' - if current function shall not use '__gcc_isr' pseudo | |
576 | instructions as specified by the "no_gccisr" attribute. */ | |
577 | int is_no_gccisr; | |
578 | ||
579 | /* Used for `__gcc_isr' pseudo instruction handling of | |
580 | non-naked ISR prologue / epilogue(s). */ | |
581 | struct | |
582 | { | |
583 | /* 'true' if this function actually uses "*gasisr" insns. */ | |
584 | int yes; | |
585 | /* 'true' if this function is allowed to use "*gasisr" insns. */ | |
586 | int maybe; | |
587 | /* The register numer as printed by the Done chunk. */ | |
588 | int regno; | |
589 | } gasisr; | |
590 | ||
591 | /* 'true' if this function references .L__stack_usage like with | |
592 | __builtin_return_address. */ | |
593 | int use_L__stack_usage; | |
4fc2b4ff | 594 | }; |
172c08a5 | 595 | |
073a8998 | 596 | /* AVR does not round pushes, but the existence of this macro is |
172c08a5 RH |
597 | required in order for pushes to be generated. */ |
598 | #define PUSH_ROUNDING(X) (X) | |
d702f362 | 599 | |
0545950b GJL |
600 | /* Define prototype here to avoid build warning. Some files using |
601 | ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include | |
602 | tm.h but not tm_p.h. */ | |
45958634 | 603 | extern int avr_accumulate_outgoing_args (void); |
d702f362 | 604 | #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args() |
7bc6df2c GJL |
605 | |
606 | #define INIT_EXPANDERS avr_init_expanders() | |
f9d29866 JR |
607 | |
608 | /* Flags used for io and address attributes. */ | |
609 | #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4) | |
610 | #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5) | |
611 | #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6) |