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413fc59a 1;; Predicate definitions for ATMEL AVR micro controllers.
99dee823 2;; Copyright (C) 2006-2021 Free Software Foundation, Inc.
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3;;
4;; This file is part of GCC.
5;;
6;; GCC is free software; you can redistribute it and/or modify
7;; it under the terms of the GNU General Public License as published by
2f83c7d6 8;; the Free Software Foundation; either version 3, or (at your option)
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9;; any later version.
10;;
11;; GCC is distributed in the hope that it will be useful,
12;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14;; GNU General Public License for more details.
15;;
16;; You should have received a copy of the GNU General Public License
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17;; along with GCC; see the file COPYING3. If not see
18;; <http://www.gnu.org/licenses/>.
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19
20;; Registers from r0 to r15.
21(define_predicate "l_register_operand"
22 (and (match_code "reg")
23 (match_test "REGNO (op) <= 15")))
24
25;; Registers from r16 to r31.
26(define_predicate "d_register_operand"
27 (and (match_code "reg")
28 (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
29
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30(define_predicate "even_register_operand"
31 (and (match_code "reg")
32 (and (match_test "REGNO (op) <= 31")
33 (match_test "(REGNO (op) & 1) == 0"))))
34
35(define_predicate "odd_register_operand"
36 (and (match_code "reg")
37 (and (match_test "REGNO (op) <= 31")
38 (match_test "(REGNO (op) & 1) != 0"))))
39
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40;; SP register.
41(define_predicate "stack_register_operand"
42 (and (match_code "reg")
43 (match_test "REGNO (op) == REG_SP")))
44
413fc59a 45;; Return true if OP is a valid address for lower half of I/O space.
f9d29866
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46(define_special_predicate "low_io_address_operand"
47 (ior (and (match_code "const_int")
4a2caf6c 48 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset,
f64ba10b 49 0, 0x1F)"))
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50 (and (match_code "symbol_ref")
51 (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW"))))
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52
53;; Return true if OP is a valid address for high half of I/O space.
54(define_predicate "high_io_address_operand"
413fc59a 55 (and (match_code "const_int")
4a2caf6c 56 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset,
2da8c1ad 57 0x20, 0x3F)")))
696e990b 58
e6b69d0e 59;; Return true if OP is a valid address of I/O space.
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60(define_special_predicate "io_address_operand"
61 (ior (and (match_code "const_int")
4a2caf6c 62 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset,
f64ba10b 63 0, 0x3F)"))
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64 (and (match_code "symbol_ref")
65 (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO"))))
e6b69d0e 66
3a840863 67;; Return 1 if OP is a general operand not in flash memory
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68(define_predicate "nop_general_operand"
69 (and (match_operand 0 "general_operand")
3a840863 70 (match_test "!avr_mem_flash_p (op)")))
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71
72;; Return 1 if OP is an "ordinary" general operand, i.e. a general
7bc6df2c 73;; operand whose load is not handled by a libgcc call or ELPM.
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74(define_predicate "nox_general_operand"
75 (and (match_operand 0 "general_operand")
7bc6df2c 76 (not (match_test "avr_load_libgcc_p (op)"))
3a840863 77 (not (match_test "avr_mem_memx_p (op)"))))
7c209481 78
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79;; Return 1 if OP is the zero constant for MODE.
80(define_predicate "const0_operand"
e55e4056 81 (and (match_code "const_int,const_fixed,const_double")
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82 (match_test "op == CONST0_RTX (mode)")))
83
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84;; Return 1 if OP is the one constant integer for MODE.
85(define_predicate "const1_operand"
86 (and (match_code "const_int")
87 (match_test "op == CONST1_RTX (mode)")))
88
89
90;; Return 1 if OP is constant integer 0..7 for MODE.
91(define_predicate "const_0_to_7_operand"
92 (and (match_code "const_int")
93 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
94
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95;; Return 1 if OP is constant integer 2..7 for MODE.
96(define_predicate "const_2_to_7_operand"
97 (and (match_code "const_int")
98 (match_test "IN_RANGE (INTVAL (op), 2, 7)")))
99
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100;; Return 1 if OP is constant integer 1..6 for MODE.
101(define_predicate "const_1_to_6_operand"
102 (and (match_code "const_int")
103 (match_test "IN_RANGE (INTVAL (op), 1, 6)")))
104
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105;; Return 1 if OP is constant integer 2..6 for MODE.
106(define_predicate "const_2_to_6_operand"
107 (and (match_code "const_int")
108 (match_test "IN_RANGE (INTVAL (op), 2, 6)")))
109
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110;; Return 1 if OP is constant integer -255..-1.
111(define_predicate "const_m255_to_m1_operand"
112 (and (match_code "const_int")
113 (match_test "IN_RANGE (INTVAL (op), -255, -1)")))
114
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115;; Returns true if OP is either the constant zero or a register.
116(define_predicate "reg_or_0_operand"
117 (ior (match_operand 0 "register_operand")
118 (match_operand 0 "const0_operand")))
119
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120;; Returns 1 if OP is a SYMBOL_REF.
121(define_predicate "symbol_ref_operand"
122 (match_code "symbol_ref"))
123
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124;; Return true if OP is a text segment reference.
125;; This is needed for program memory address expressions.
126(define_predicate "text_segment_operand"
127 (match_code "code_label,label_ref,symbol_ref,plus,const")
128{
129 switch (GET_CODE (op))
130 {
131 case CODE_LABEL:
132 return true;
133 case LABEL_REF :
134 return true;
135 case SYMBOL_REF :
136 return SYMBOL_REF_FUNCTION_P (op);
137 case PLUS :
138 /* Assume canonical format of symbol + constant.
139 Fall through. */
140 case CONST :
141 return text_segment_operand (XEXP (op, 0), VOIDmode);
142 default :
143 return false;
144 }
145})
146
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147;; Return true if OP is a constant that contains only one 1 in its
148;; binary representation.
149(define_predicate "single_one_operand"
150 (and (match_code "const_int")
151 (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
152
153;; Return true if OP is a constant that contains only one 0 in its
154;; binary representation.
155(define_predicate "single_zero_operand"
156 (and (match_code "const_int")
157 (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
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158
159;;
160(define_predicate "avr_sp_immediate_operand"
161 (and (match_code "const_int")
d702f362 162 (match_test "satisfies_constraint_Csp (op)")))
4fc2b4ff 163
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164;; True for EQ & NE
165(define_predicate "eqne_operator"
166 (match_code "eq,ne"))
00892272 167
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168;; True for GE & LT
169(define_predicate "gelt_operator"
170 (match_code "ge,lt"))
00892272 171
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172;; True for GT, GTU, LE & LEU
173(define_predicate "difficult_comparison_operator"
174 (match_code "gt,gtu,le,leu"))
175
176;; False for GT, GTU, LE & LEU
177(define_predicate "simple_comparison_operator"
178 (and (match_operand 0 "comparison_operator")
179 (not (match_code "gt,gtu,le,leu"))))
696e990b 180
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181;; True for SIGN_EXTEND, ZERO_EXTEND.
182(define_predicate "extend_operator"
183 (match_code "sign_extend,zero_extend"))
184
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185;; Return true if OP is a valid call operand.
186(define_predicate "call_insn_operand"
187 (and (match_code "mem")
188 (ior (match_test "register_operand (XEXP (op, 0), mode)")
189 (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
83613dbe 190
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191;; For some insns we must ensure that no hard register is inserted
192;; into their operands because the insns are split and the split
193;; involves hard registers. An example are divmod insn that are
194;; split to insns that represent implicit library calls.
195
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196;; True for register that is pseudo register.
197(define_predicate "pseudo_register_operand"
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198 (and (match_operand 0 "register_operand")
199 (not (and (match_code "reg")
200 (match_test "HARD_REGISTER_P (op)")))))
201
202;; True for operand that is pseudo register or CONST_INT.
203(define_predicate "pseudo_register_or_const_int_operand"
204 (ior (match_operand 0 "const_int_operand")
205 (match_operand 0 "pseudo_register_operand")))
206
207;; We keep combiner from inserting hard registers into the input of sign- and
208;; zero-extends. A hard register in the input operand is not wanted because
209;; 32-bit multiply patterns clobber some hard registers and extends with a
210;; hard register that overlaps these clobbers won't combine to a widening
211;; multiplication. There is no need for combine to propagate or insert
212;; hard registers, register allocation can do it just as well.
213
214;; True for operand that is pseudo register at combine time.
215(define_predicate "combine_pseudo_register_operand"
216 (ior (match_operand 0 "pseudo_register_operand")
217 (and (match_operand 0 "register_operand")
218 (match_test "reload_completed || reload_in_progress"))))
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219
220;; Return true if OP is a constant integer that is either
221;; 8 or 16 or 24.
222(define_predicate "const_8_16_24_operand"
223 (and (match_code "const_int")
01512446 224 (match_test "INTVAL(op) == 8 || INTVAL(op) == 16 || INTVAL(op) == 24")))
687027a4 225
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226;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255.
227(define_predicate "u8_operand"
228 (and (match_code "const_int")
229 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
230
231;; Signed CONST_INT that fits in 8 bits, i.e. -128..127.
232(define_predicate "s8_operand"
233 (and (match_code "const_int")
234 (match_test "IN_RANGE (INTVAL (op), -128, 127)")))
235
236;; One-extended CONST_INT that fits in 8 bits, i.e. -256..-1.
237(define_predicate "o8_operand"
238 (and (match_code "const_int")
239 (match_test "IN_RANGE (INTVAL (op), -256, -1)")))
240
241;; Signed CONST_INT that fits in 9 bits, i.e. -256..255.
242(define_predicate "s9_operand"
243 (and (match_code "const_int")
244 (match_test "IN_RANGE (INTVAL (op), -256, 255)")))
245
246(define_predicate "register_or_s9_operand"
247 (ior (match_operand 0 "register_operand")
248 (match_operand 0 "s9_operand")))
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249
250;; Unsigned CONST_INT that fits in 16 bits, i.e. 0..65536.
251(define_predicate "u16_operand"
252 (and (match_code "const_int")
253 (match_test "IN_RANGE (INTVAL (op), 0, (1<<16)-1)")))
254
255;; Signed CONST_INT that fits in 16 bits, i.e. -32768..32767.
256(define_predicate "s16_operand"
257 (and (match_code "const_int")
258 (match_test "IN_RANGE (INTVAL (op), -(1<<15), (1<<15)-1)")))
259
260;; One-extended CONST_INT that fits in 16 bits, i.e. -65536..-1.
261(define_predicate "o16_operand"
262 (and (match_code "const_int")
263 (match_test "IN_RANGE (INTVAL (op), -(1<<16), -1)")))
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264
265;; Const int, fixed, or double operand
266(define_predicate "const_operand"
267 (ior (match_code "const_fixed")
268 (match_code "const_double")
269 (match_operand 0 "const_int_operand")))
270
271;; Const int, const fixed, or const double operand
272(define_predicate "nonmemory_or_const_operand"
273 (ior (match_code "const_fixed")
274 (match_code "const_double")
275 (match_operand 0 "nonmemory_operand")))
276
277;; Immediate, const fixed, or const double operand
278(define_predicate "const_or_immediate_operand"
279 (ior (match_code "const_fixed")
280 (match_code "const_double")
281 (match_operand 0 "immediate_operand")))