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cc7232b9 | 1 | ;; Command-line options for the C-SKY back end. |
a945c346 | 2 | ;; Copyright (C) 2018-2024 Free Software Foundation, Inc. |
cc7232b9 J |
3 | ;; Contributed by C-SKY Microsystems and Mentor Graphics. |
4 | ;; | |
5 | ;; This file is part of GCC. | |
6 | ;; | |
7 | ;; GCC is free software; you can redistribute it and/or modify it under | |
8 | ;; the terms of the GNU General Public License as published by the Free | |
9 | ;; Software Foundation; either version 3, or (at your option) any later | |
10 | ;; version. | |
11 | ;; | |
12 | ;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | ;; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | ;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | ;; for more details. | |
16 | ;; | |
17 | ;; You should have received a copy of the GNU General Public License | |
18 | ;; along with GCC; see the file COPYING3. If not see | |
19 | ;; <http://www.gnu.org/licenses/>. | |
20 | ||
21 | ||
22 | HeaderInclude | |
23 | config/csky/csky_opts.h | |
24 | ||
25 | ;; Architecture/CPU options. | |
26 | ;; Normal CPU and arch enums are loaded from csky_tables.opt. | |
27 | ||
28 | ; For backward compatibility only. | |
29 | march=ck803s | |
eece52b5 | 30 | Target Var(flag_arch_ck803s) Undocumented |
cc7232b9 J |
31 | |
32 | march= | |
33 | Target RejectNegative ToLower Joined Enum(csky_arch) Var(csky_arch_option) Save | |
34 | Specify the target architecture. | |
35 | ||
36 | mcpu= | |
37 | Target RejectNegative ToLower Joined Enum(csky_processor_type) Var(csky_cpu_option) Init(TARGET_CPU_csky_none) Save | |
38 | Specify the target processor. | |
39 | ||
40 | ;; Endianness options. | |
41 | ||
42 | mbig-endian | |
eece52b5 | 43 | Target RejectNegative Mask(BIG_ENDIAN) |
cc7232b9 J |
44 | Generate big-endian code. |
45 | ||
46 | EB | |
eece52b5 | 47 | Target RejectNegative Alias(mbig-endian) Undocumented |
cc7232b9 J |
48 | |
49 | mlittle-endian | |
eece52b5 | 50 | Target RejectNegative InverseMask(BIG_ENDIAN) |
cc7232b9 J |
51 | Generate little-endian code. |
52 | ||
53 | EL | |
eece52b5 | 54 | Target RejectNegative Alias(mlittle-endian) Undocumented |
cc7232b9 J |
55 | |
56 | ;; Floating point options. These affect code generation but not | |
57 | ;; assembly. | |
58 | ||
59 | mhard-float | |
197f1e8c | 60 | Target RejectNegative Alias(mfloat-abi=, hard) Undocumented |
cc7232b9 J |
61 | |
62 | msoft-float | |
197f1e8c J |
63 | Target RejectNegative Alias(mfloat-abi=, soft) Undocumented |
64 | ||
65 | mfloat-abi=v2 | |
66 | Target RejectNegative Alias(mfloat-abi=, hard) Undocumented | |
67 | ||
68 | mfloat-abi=v1 | |
69 | Target RejectNegative Alias(mfloat-abi=, softfp) Undocumented | |
70 | ||
71 | mfloat-abi= | |
72 | Target RejectNegative Joined Enum(float_abi_type) Var(csky_float_abi) Init(CSKY_FLOAT_ABI_SOFT) | |
73 | Specify if floating point hardware should be used. | |
74 | ||
75 | Enum | |
76 | Name(float_abi_type) Type(enum float_abi_type) | |
77 | Known floating-point ABIs (for use with the -mfloat-abi= option): | |
78 | ||
79 | EnumValue | |
80 | Enum(float_abi_type) String(soft) Value(CSKY_FLOAT_ABI_SOFT) | |
81 | ||
82 | EnumValue | |
83 | Enum(float_abi_type) String(softfp) Value(CSKY_FLOAT_ABI_SOFTFP) | |
84 | ||
85 | EnumValue | |
86 | Enum(float_abi_type) String(hard) Value(CSKY_FLOAT_ABI_HARD) | |
cc7232b9 J |
87 | |
88 | mfpu= | |
89 | Target RejectNegative Joined Enum(csky_fpu) Var(csky_fpu_index) Init(TARGET_FPU_auto) Save | |
90 | Specify the target floating-point hardware/format. | |
91 | ||
92 | mdouble-float | |
eece52b5 | 93 | Target Var(TARGET_DOUBLE_FLOAT) Init(-1) |
cc7232b9 J |
94 | Generate C-SKY FPU double float instructions (default for hard float). |
95 | ||
96 | mfdivdu | |
eece52b5 | 97 | Target Var(TARGET_FDIVDU) Init(-1) |
cc7232b9 J |
98 | Generate frecipd/fsqrtd/fdivd instructions (default for hard float). |
99 | ||
100 | ;; Instruction set extensions. Most of these don't affect code | |
101 | ;; generation, and are passed through to the assembler. | |
102 | ;; There are builtin preprocessor defines for each of these. | |
103 | ||
104 | melrw | |
eece52b5 | 105 | Target Var(TARGET_ELRW) Init(-1) |
cc7232b9 J |
106 | Enable the extended LRW instruction (default for CK801). |
107 | ||
108 | mistack | |
eece52b5 | 109 | Target Mask(ISTACK) |
cc7232b9 J |
110 | Enable interrupt stack instructions. |
111 | ||
112 | mmp | |
eece52b5 | 113 | Target RejectNegative Mask(MP) |
cc7232b9 J |
114 | Enable multiprocessor instructions. |
115 | ||
116 | mcp | |
eece52b5 | 117 | Target RejectNegative Mask(CP) |
cc7232b9 J |
118 | Enable coprocessor instructions. |
119 | ||
120 | mcache | |
eece52b5 | 121 | Target RejectNegative Mask(CACHE) |
cc7232b9 J |
122 | Enable cache prefetch instructions. |
123 | ||
124 | msecurity | |
eece52b5 | 125 | Target RejectNegative Mask(SECURITY) |
cc7232b9 J |
126 | Enable C-SKY SECURE instructions. |
127 | ||
128 | mmac | |
eece52b5 | 129 | Target RejectNegative Alias(msecurity) Undocumented |
cc7232b9 J |
130 | |
131 | mtrust | |
eece52b5 | 132 | Target RejectNegative Mask(TRUST) |
cc7232b9 J |
133 | Enable C-SKY TRUST instructions. |
134 | ||
135 | mdsp | |
eece52b5 | 136 | Target RejectNegative Var(TARGET_DSP) |
cc7232b9 J |
137 | Enable C-SKY DSP instructions. |
138 | ||
139 | medsp | |
eece52b5 | 140 | Target RejectNegative Mask(EDSP) |
cc7232b9 J |
141 | Enable C-SKY Enhanced DSP instructions. |
142 | ||
143 | mvdsp | |
eece52b5 | 144 | Target RejectNegative Mask(VDSP) |
cc7232b9 J |
145 | Enable C-SKY Vector DSP instructions. |
146 | ||
147 | ;; Code generation options not passed to the assembler. | |
148 | ||
149 | mdiv | |
eece52b5 | 150 | Target Var(TARGET_DIV) Init(-1) |
cc7232b9 J |
151 | Generate divide instructions. |
152 | ||
153 | msmart | |
eece52b5 | 154 | Target Var(TARGET_MINI_REGISTERS) Init(-1) |
cc7232b9 J |
155 | Generate code for Smart Mode. |
156 | ||
157 | mhigh-registers | |
eece52b5 | 158 | Target Var(TARGET_HIGH_REGISTERS) Init(-1) |
cc7232b9 J |
159 | Enable use of R16-R31 (default). |
160 | ||
161 | manchor | |
eece52b5 | 162 | Target Var(TARGET_ANCHOR) |
cc7232b9 J |
163 | Generate code using global anchor symbol addresses. |
164 | ||
165 | mpushpop | |
eece52b5 | 166 | Target Var(TARGET_PUSHPOP) Init(1) |
cc7232b9 J |
167 | Generate push/pop instructions (default). |
168 | ||
169 | mmultiple-stld | |
eece52b5 | 170 | Target Var(TARGET_MULTIPLE_STLD) Init(-1) |
cc7232b9 J |
171 | Generate stm/ldm instructions (default). |
172 | ||
173 | mstm | |
eece52b5 | 174 | Target Alias(mmultiple-stld) Undocumented |
cc7232b9 J |
175 | |
176 | mconstpool | |
eece52b5 | 177 | Target Var(TARGET_CONSTANT_POOL) Init(-1) |
cc7232b9 J |
178 | Generate constant pools in the compiler instead of assembler. |
179 | ||
180 | mstack-size | |
eece52b5 | 181 | Target Var(TARGET_STACK_SIZE) Init(0) |
cc7232b9 J |
182 | Emit .stack_size directives. |
183 | ||
184 | mccrt | |
eece52b5 | 185 | Target Var(TARGET_LIBCCRT) Init(0) |
cc7232b9 J |
186 | Generate code for C-SKY compiler runtime instead of libgcc. |
187 | ||
188 | mbranch-cost= | |
eece52b5 | 189 | Target Joined RejectNegative UInteger Var(csky_branch_cost) Init(1) |
cc7232b9 J |
190 | Set the branch costs to roughly the specified number of instructions. |
191 | ||
192 | msched-prolog | |
eece52b5 | 193 | Target Var(flag_sched_prolog) Init(0) |
cc7232b9 | 194 | Permit scheduling of function prologue and epilogue sequences. |
6ee9c216 J |
195 | |
196 | msim | |
197 | Target | |
198 | Use the simulator runtime. |