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8d9254fc 1/* Copyright (C) 1988-2020 Free Software Foundation, Inc.
2bf6d935
ML		 2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
2bf6d935
ML		 61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "tree-vectorizer.h"
70#include "shrink-wrap.h"
71#include "builtins.h"
72#include "rtl-iter.h"
73#include "tree-iterator.h"
74#include "dbgcnt.h"
75#include "case-cfn-macros.h"
76#include "dojump.h"
77#include "fold-const-call.h"
78#include "tree-vrp.h"
79#include "tree-ssanames.h"
80#include "selftest.h"
81#include "selftest-rtl.h"
82#include "print-rtl.h"
83#include "intl.h"
84#include "ifcvt.h"
85#include "symbol-summary.h"
86#include "ipa-prop.h"
87#include "ipa-fnsummary.h"
88#include "wide-int-bitmask.h"
89#include "tree-vector-builder.h"
90#include "debug.h"
91#include "dwarf2out.h"
92#include "i386-builtins.h"
93
94#undef BDESC
95#undef BDESC_FIRST
96#undef BDESC_END
97
98/* Macros for verification of enum ix86_builtins order. */
99#define BDESC_VERIFY(x, y, z) \
100 gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
101#define BDESC_VERIFYS(x, y, z) \
102 STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
103
104BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
105 IX86_BUILTIN__BDESC_COMI_LAST, 1);
106BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
107 IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
108BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
109 IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
110BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
111 IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
112BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
113 IX86_BUILTIN__BDESC_ARGS_LAST, 1);
114BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
115 IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
116BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
117 IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
118BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
119 IX86_BUILTIN__BDESC_CET_LAST, 1);
120BDESC_VERIFYS (IX86_BUILTIN_MAX,
121 IX86_BUILTIN__BDESC_CET_NORMAL_LAST, 1);
122
123
124/* Table for the ix86 builtin non-function types. */
125static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
126
127/* Retrieve an element from the above table, building some of
128 the types lazily. */
129
130static tree
131ix86_get_builtin_type (enum ix86_builtin_type tcode)
132{
133 unsigned int index;
134 tree type, itype;
135
136 gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
137
138 type = ix86_builtin_type_tab[(int) tcode];
139 if (type != NULL)
140 return type;
141
142 gcc_assert (tcode > IX86_BT_LAST_PRIM);
143 if (tcode <= IX86_BT_LAST_VECT)
144 {
145 machine_mode mode;
146
147 index = tcode - IX86_BT_LAST_PRIM - 1;
148 itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]);
149 mode = ix86_builtin_type_vect_mode[index];
150
151 type = build_vector_type_for_mode (itype, mode);
152 }
153 else
154 {
155 int quals;
156
157 index = tcode - IX86_BT_LAST_VECT - 1;
158 if (tcode <= IX86_BT_LAST_PTR)
159 quals = TYPE_UNQUALIFIED;
160 else
161 quals = TYPE_QUAL_CONST;
162
163 itype = ix86_get_builtin_type (ix86_builtin_type_ptr_base[index]);
164 if (quals != TYPE_UNQUALIFIED)
165 itype = build_qualified_type (itype, quals);
166
167 type = build_pointer_type (itype);
168 }
169
170 ix86_builtin_type_tab[(int) tcode] = type;
171 return type;
172}
173
174/* Table for the ix86 builtin function types. */
175static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
176
177/* Retrieve an element from the above table, building some of
178 the types lazily. */
179
180static tree
181ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
182{
183 tree type;
184
185 gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
186
187 type = ix86_builtin_func_type_tab[(int) tcode];
188 if (type != NULL)
189 return type;
190
191 if (tcode <= IX86_BT_LAST_FUNC)
192 {
193 unsigned start = ix86_builtin_func_start[(int) tcode];
194 unsigned after = ix86_builtin_func_start[(int) tcode + 1];
195 tree rtype, atype, args = void_list_node;
196 unsigned i;
197
198 rtype = ix86_get_builtin_type (ix86_builtin_func_args[start]);
199 for (i = after - 1; i > start; --i)
200 {
201 atype = ix86_get_builtin_type (ix86_builtin_func_args[i]);
202 args = tree_cons (NULL, atype, args);
203 }
204
205 type = build_function_type (rtype, args);
206 }
207 else
208 {
209 unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
210 enum ix86_builtin_func_type icode;
211
212 icode = ix86_builtin_func_alias_base[index];
213 type = ix86_get_builtin_func_type (icode);
214 }
215
216 ix86_builtin_func_type_tab[(int) tcode] = type;
217 return type;
218}
219
220/* Table for the ix86 builtin decls. */
221static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX];
222
223struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
224
225tree get_ix86_builtin (enum ix86_builtins c)
226{
227 return ix86_builtins[c];
228}
229
230/* Bits that can still enable any inclusion of a builtin. */
231HOST_WIDE_INT deferred_isa_values = 0;
232HOST_WIDE_INT deferred_isa_values2 = 0;
233
234/* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the
235 MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
236 ix86_builtins_isa array. Stores the function decl in the ix86_builtins
237 array. Returns the function decl or NULL_TREE, if the builtin was not
238 added.
239
240 If the front end has a special hook for builtin functions, delay adding
241 builtin functions that aren't in the current ISA until the ISA is changed
242 with function specific optimization. Doing so, can save about 300K for the
243 default compiler. When the builtin is expanded, check at that time whether
244 it is valid.
245
246 If the front end doesn't have a special hook, record all builtins, even if
247 it isn't an instruction set in the current ISA in case the user uses
248 function specific options for a different ISA, so that we don't get scope
249 errors if a builtin is added in the middle of a function scope. */
250
251static inline tree
252def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
253 const char *name,
254 enum ix86_builtin_func_type tcode,
255 enum ix86_builtins code)
256{
257 tree decl = NULL_TREE;
258
259 /* An instruction may be 64bit only regardless of ISAs. */
260 if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
261 {
262 ix86_builtins_isa[(int) code].isa = mask;
263 ix86_builtins_isa[(int) code].isa2 = mask2;
264
265 mask &= ~OPTION_MASK_ISA_64BIT;
266
267 /* Filter out the masks most often ored together with others. */
268 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
269 && mask != OPTION_MASK_ISA_AVX512VL)
270 mask &= ~OPTION_MASK_ISA_AVX512VL;
271 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
272 && mask != OPTION_MASK_ISA_AVX512BW)
273 mask &= ~OPTION_MASK_ISA_AVX512BW;
274
275 if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
276 && (mask == 0 || (mask & ix86_isa_flags) != 0))
277 || (lang_hooks.builtin_function
278 == lang_hooks.builtin_function_ext_scope))
279 {
280 tree type = ix86_get_builtin_func_type (tcode);
281 decl = add_builtin_function (name, type, code, BUILT_IN_MD,
282 NULL, NULL_TREE);
283 ix86_builtins[(int) code] = decl;
284 ix86_builtins_isa[(int) code].set_and_not_built_p = false;
285 }
286 else
287 {
288 /* Just MASK and MASK2 where set_and_not_built_p == true can potentially
289 include a builtin. */
290 deferred_isa_values |= mask;
291 deferred_isa_values2 |= mask2;
292 ix86_builtins[(int) code] = NULL_TREE;
293 ix86_builtins_isa[(int) code].tcode = tcode;
294 ix86_builtins_isa[(int) code].name = name;
295 ix86_builtins_isa[(int) code].const_p = false;
296 ix86_builtins_isa[(int) code].pure_p = false;
297 ix86_builtins_isa[(int) code].set_and_not_built_p = true;
298 }
299 }
300
301 return decl;
302}
303
304/* Like def_builtin, but also marks the function decl "const". */
305
306static inline tree
307def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
308 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
309{
310 tree decl = def_builtin (mask, mask2, name, tcode, code);
311 if (decl)
312 TREE_READONLY (decl) = 1;
313 else
314 ix86_builtins_isa[(int) code].const_p = true;
315
316 return decl;
317}
318
319/* Like def_builtin, but also marks the function decl "pure". */
320
321static inline tree
322def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
323 enum ix86_builtin_func_type tcode, enum ix86_builtins code)
324{
325 tree decl = def_builtin (mask, mask2, name, tcode, code);
326 if (decl)
327 DECL_PURE_P (decl) = 1;
328 else
329 ix86_builtins_isa[(int) code].pure_p = true;
330
331 return decl;
332}
333
334/* Add any new builtin functions for a given ISA that may not have been
335 declared. This saves a bit of space compared to adding all of the
336 declarations to the tree, even if we didn't use them. */
337
338void
339ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
340{
341 isa &= ~OPTION_MASK_ISA_64BIT;
342
343 if ((isa & deferred_isa_values) == 0
344 && (isa2 & deferred_isa_values2) == 0)
345 return;
346
347 /* Bits in ISA value can be removed from potential isa values. */
348 deferred_isa_values &= ~isa;
349 deferred_isa_values2 &= ~isa2;
350
351 int i;
352 tree saved_current_target_pragma = current_target_pragma;
353 current_target_pragma = NULL_TREE;
354
355 for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
356 {
357 if (((ix86_builtins_isa[i].isa & isa) != 0
358 || (ix86_builtins_isa[i].isa2 & isa2) != 0)
359 && ix86_builtins_isa[i].set_and_not_built_p)
360 {
361 tree decl, type;
362
363 /* Don't define the builtin again. */
364 ix86_builtins_isa[i].set_and_not_built_p = false;
365
366 type = ix86_get_builtin_func_type (ix86_builtins_isa[i].tcode);
367 decl = add_builtin_function_ext_scope (ix86_builtins_isa[i].name,
368 type, i, BUILT_IN_MD, NULL,
369 NULL_TREE);
370
371 ix86_builtins[i] = decl;
372 if (ix86_builtins_isa[i].const_p)
373 TREE_READONLY (decl) = 1;
374 }
375 }
376
377 current_target_pragma = saved_current_target_pragma;
378}
379\f
380/* TM vector builtins. */
381
382/* Reuse the existing x86-specific `struct builtin_description' cause
383 we're lazy. Add casts to make them fit. */
384static const struct builtin_description bdesc_tm[] =
385{
0cfa5d9c
L		 386 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_WM64", (enum ix86_builtins) BUILT_IN_TM_STORE_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
387 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
388 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI },
389 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_RM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
390 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
391 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
392 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI },
2bf6d935
ML		 393
394 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WM128", (enum ix86_builtins) BUILT_IN_TM_STORE_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
395 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
396 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF },
397 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
398 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
399 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
400 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF },
401
402 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WM256", (enum ix86_builtins) BUILT_IN_TM_STORE_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
403 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
404 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF },
405 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
406 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
407 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
408 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF },
409
0cfa5d9c 410 { OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0, CODE_FOR_nothing, "__builtin__ITM_LM64", (enum ix86_builtins) BUILT_IN_TM_LOG_M64, UNKNOWN, VOID_FTYPE_PCVOID },
2bf6d935
ML		 411 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_LM128", (enum ix86_builtins) BUILT_IN_TM_LOG_M128, UNKNOWN, VOID_FTYPE_PCVOID },
412 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_LM256", (enum ix86_builtins) BUILT_IN_TM_LOG_M256, UNKNOWN, VOID_FTYPE_PCVOID },
413};
414
415/* Initialize the transactional memory vector load/store builtins. */
416
417static void
418ix86_init_tm_builtins (void)
419{
420 enum ix86_builtin_func_type ftype;
421 const struct builtin_description *d;
422 size_t i;
423 tree decl;
424 tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
425 tree attrs_log, attrs_type_log;
426
427 if (!flag_tm)
428 return;
429
430 /* If there are no builtins defined, we must be compiling in a
431 language without trans-mem support. */
432 if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1))
433 return;
434
435 /* Use whatever attributes a normal TM load has. */
436 decl = builtin_decl_explicit (BUILT_IN_TM_LOAD_1);
437 attrs_load = DECL_ATTRIBUTES (decl);
438 attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
439 /* Use whatever attributes a normal TM store has. */
440 decl = builtin_decl_explicit (BUILT_IN_TM_STORE_1);
441 attrs_store = DECL_ATTRIBUTES (decl);
442 attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
443 /* Use whatever attributes a normal TM log has. */
444 decl = builtin_decl_explicit (BUILT_IN_TM_LOG);
445 attrs_log = DECL_ATTRIBUTES (decl);
446 attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
447
448 for (i = 0, d = bdesc_tm;
449 i < ARRAY_SIZE (bdesc_tm);
450 i++, d++)
451 {
452 if ((d->mask & ix86_isa_flags) != 0
453 || (lang_hooks.builtin_function
454 == lang_hooks.builtin_function_ext_scope))
455 {
456 tree type, attrs, attrs_type;
457 enum built_in_function code = (enum built_in_function) d->code;
458
459 ftype = (enum ix86_builtin_func_type) d->flag;
460 type = ix86_get_builtin_func_type (ftype);
461
462 if (BUILTIN_TM_LOAD_P (code))
463 {
464 attrs = attrs_load;
465 attrs_type = attrs_type_load;
466 }
467 else if (BUILTIN_TM_STORE_P (code))
468 {
469 attrs = attrs_store;
470 attrs_type = attrs_type_store;
471 }
472 else
473 {
474 attrs = attrs_log;
475 attrs_type = attrs_type_log;
476 }
477 decl = add_builtin_function (d->name, type, code, BUILT_IN_NORMAL,
478 /* The builtin without the prefix for
479 calling it directly. */
480 d->name + strlen ("__builtin_"),
481 attrs);
482 /* add_builtin_function() will set the DECL_ATTRIBUTES, now
483 set the TYPE_ATTRIBUTES. */
484 decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
485
486 set_builtin_decl (code, decl, false);
487 }
488 }
489}
490
491/* Set up all the MMX/SSE builtins, even builtins for instructions that are not
492 in the current target ISA to allow the user to compile particular modules
493 with different target specific options that differ from the command line
494 options. */
495static void
496ix86_init_mmx_sse_builtins (void)
497{
498 const struct builtin_description * d;
499 enum ix86_builtin_func_type ftype;
500 size_t i;
501
502 /* Add all special builtins with variable number of operands. */
503 for (i = 0, d = bdesc_special_args;
504 i < ARRAY_SIZE (bdesc_special_args);
505 i++, d++)
506 {
507 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
508 if (d->name == 0)
509 continue;
510
511 ftype = (enum ix86_builtin_func_type) d->flag;
512 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
513 }
514 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
515 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
516 ARRAY_SIZE (bdesc_special_args) - 1);
517
518 /* Add all builtins with variable number of operands. */
519 for (i = 0, d = bdesc_args;
520 i < ARRAY_SIZE (bdesc_args);
521 i++, d++)
522 {
523 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
524 if (d->name == 0)
525 continue;
526
527 ftype = (enum ix86_builtin_func_type) d->flag;
528 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
529 }
530 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
531 IX86_BUILTIN__BDESC_ARGS_FIRST,
532 ARRAY_SIZE (bdesc_args) - 1);
533
534 /* Add all builtins with rounding. */
535 for (i = 0, d = bdesc_round_args;
536 i < ARRAY_SIZE (bdesc_round_args);
537 i++, d++)
538 {
539 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
540 if (d->name == 0)
541 continue;
542
543 ftype = (enum ix86_builtin_func_type) d->flag;
544 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
545 }
546 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
547 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
548 ARRAY_SIZE (bdesc_round_args) - 1);
549
550 /* pcmpestr[im] insns. */
551 for (i = 0, d = bdesc_pcmpestr;
552 i < ARRAY_SIZE (bdesc_pcmpestr);
553 i++, d++)
554 {
555 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
556 if (d->code == IX86_BUILTIN_PCMPESTRM128)
557 ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
558 else
559 ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
560 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
561 }
562 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
563 IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
564 ARRAY_SIZE (bdesc_pcmpestr) - 1);
565
566 /* pcmpistr[im] insns. */
567 for (i = 0, d = bdesc_pcmpistr;
568 i < ARRAY_SIZE (bdesc_pcmpistr);
569 i++, d++)
570 {
571 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
572 if (d->code == IX86_BUILTIN_PCMPISTRM128)
573 ftype = V16QI_FTYPE_V16QI_V16QI_INT;
574 else
575 ftype = INT_FTYPE_V16QI_V16QI_INT;
576 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
577 }
578 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
579 IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
580 ARRAY_SIZE (bdesc_pcmpistr) - 1);
581
582 /* comi/ucomi insns. */
583 for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
584 {
585 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
586 if (d->mask == OPTION_MASK_ISA_SSE2)
587 ftype = INT_FTYPE_V2DF_V2DF;
588 else
589 ftype = INT_FTYPE_V4SF_V4SF;
590 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
591 }
592 BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
593 IX86_BUILTIN__BDESC_COMI_FIRST,
594 ARRAY_SIZE (bdesc_comi) - 1);
595
596 /* SSE */
597 def_builtin (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_ldmxcsr",
598 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR);
599 def_builtin_pure (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_stmxcsr",
600 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR);
601
602 /* SSE or 3DNow!A */
603 def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
604 /* As it uses V4HImode, we have to require -mmmx too. */
605 | OPTION_MASK_ISA_MMX, 0,
606 "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR,
607 IX86_BUILTIN_MASKMOVQ);
608
609 /* SSE2 */
610 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_maskmovdqu",
611 VOID_FTYPE_V16QI_V16QI_PCHAR, IX86_BUILTIN_MASKMOVDQU);
612
613 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_clflush",
614 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSH);
615 x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_mfence",
616 VOID_FTYPE_VOID, IX86_BUILTIN_MFENCE);
617
618 /* SSE3. */
619 def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_monitor",
620 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITOR);
621 def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_mwait",
622 VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT);
623
624 /* AES */
625 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
626 "__builtin_ia32_aesenc128",
627 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128);
628 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
629 "__builtin_ia32_aesenclast128",
630 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128);
631 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
632 "__builtin_ia32_aesdec128",
633 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128);
634 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
635 "__builtin_ia32_aesdeclast128",
636 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128);
637 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
638 "__builtin_ia32_aesimc128",
639 V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128);
640 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0,
641 "__builtin_ia32_aeskeygenassist128",
642 V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128);
643
644 /* PCLMUL */
645 def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, 0,
646 "__builtin_ia32_pclmulqdq128",
647 V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128);
648
649 /* RDRND */
650 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand16_step",
651 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDRAND16_STEP);
652 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand32_step",
653 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDRAND32_STEP);
654 def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, 0,
655 "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG,
656 IX86_BUILTIN_RDRAND64_STEP);
657
658 /* AVX2 */
659 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2df",
660 V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
661 IX86_BUILTIN_GATHERSIV2DF);
662
663 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4df",
664 V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
665 IX86_BUILTIN_GATHERSIV4DF);
666
667 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2df",
668 V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
669 IX86_BUILTIN_GATHERDIV2DF);
670
671 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4df",
672 V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
673 IX86_BUILTIN_GATHERDIV4DF);
674
675 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4sf",
676 V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
677 IX86_BUILTIN_GATHERSIV4SF);
678
679 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8sf",
680 V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
681 IX86_BUILTIN_GATHERSIV8SF);
682
683 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf",
684 V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
685 IX86_BUILTIN_GATHERDIV4SF);
686
687 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf256",
688 V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
689 IX86_BUILTIN_GATHERDIV8SF);
690
691 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2di",
692 V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
693 IX86_BUILTIN_GATHERSIV2DI);
694
695 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4di",
696 V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
697 IX86_BUILTIN_GATHERSIV4DI);
698
699 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2di",
700 V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
701 IX86_BUILTIN_GATHERDIV2DI);
702
703 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4di",
704 V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
705 IX86_BUILTIN_GATHERDIV4DI);
706
707 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4si",
708 V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
709 IX86_BUILTIN_GATHERSIV4SI);
710
711 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8si",
712 V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
713 IX86_BUILTIN_GATHERSIV8SI);
714
715 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si",
716 V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
717 IX86_BUILTIN_GATHERDIV4SI);
718
719 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si256",
720 V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
721 IX86_BUILTIN_GATHERDIV8SI);
722
723 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4df ",
724 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
725 IX86_BUILTIN_GATHERALTSIV4DF);
726
727 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8sf ",
728 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
729 IX86_BUILTIN_GATHERALTDIV8SF);
730
731 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4di ",
732 V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
733 IX86_BUILTIN_GATHERALTSIV4DI);
734
735 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8si ",
736 V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
737 IX86_BUILTIN_GATHERALTDIV8SI);
738
739 /* AVX512F */
740 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16sf",
741 V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
742 IX86_BUILTIN_GATHER3SIV16SF);
743
744 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8df",
745 V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
746 IX86_BUILTIN_GATHER3SIV8DF);
747
748 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16sf",
749 V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
750 IX86_BUILTIN_GATHER3DIV16SF);
751
752 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8df",
753 V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
754 IX86_BUILTIN_GATHER3DIV8DF);
755
756 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16si",
757 V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
758 IX86_BUILTIN_GATHER3SIV16SI);
759
760 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8di",
761 V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
762 IX86_BUILTIN_GATHER3SIV8DI);
763
764 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16si",
765 V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
766 IX86_BUILTIN_GATHER3DIV16SI);
767
768 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8di",
769 V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
770 IX86_BUILTIN_GATHER3DIV8DI);
771
772 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8df ",
773 V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
774 IX86_BUILTIN_GATHER3ALTSIV8DF);
775
776 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16sf ",
777 V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
778 IX86_BUILTIN_GATHER3ALTDIV16SF);
779
780 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8di ",
781 V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
782 IX86_BUILTIN_GATHER3ALTSIV8DI);
783
784 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16si ",
785 V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
786 IX86_BUILTIN_GATHER3ALTDIV16SI);
787
788 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16sf",
789 VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
790 IX86_BUILTIN_SCATTERSIV16SF);
791
792 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8df",
793 VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
794 IX86_BUILTIN_SCATTERSIV8DF);
795
796 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16sf",
797 VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
798 IX86_BUILTIN_SCATTERDIV16SF);
799
800 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8df",
801 VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
802 IX86_BUILTIN_SCATTERDIV8DF);
803
804 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16si",
805 VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
806 IX86_BUILTIN_SCATTERSIV16SI);
807
808 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8di",
809 VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
810 IX86_BUILTIN_SCATTERSIV8DI);
811
812 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16si",
813 VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
814 IX86_BUILTIN_SCATTERDIV16SI);
815
816 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8di",
817 VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
818 IX86_BUILTIN_SCATTERDIV8DI);
819
820 /* AVX512VL */
821 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2df",
822 V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
823 IX86_BUILTIN_GATHER3SIV2DF);
824
825 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4df",
826 V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
827 IX86_BUILTIN_GATHER3SIV4DF);
828
829 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2df",
830 V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
831 IX86_BUILTIN_GATHER3DIV2DF);
832
833 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4df",
834 V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
835 IX86_BUILTIN_GATHER3DIV4DF);
836
837 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4sf",
838 V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
839 IX86_BUILTIN_GATHER3SIV4SF);
840
841 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8sf",
842 V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
843 IX86_BUILTIN_GATHER3SIV8SF);
844
845 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4sf",
846 V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
847 IX86_BUILTIN_GATHER3DIV4SF);
848
849 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8sf",
850 V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
851 IX86_BUILTIN_GATHER3DIV8SF);
852
853 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2di",
854 V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
855 IX86_BUILTIN_GATHER3SIV2DI);
856
857 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4di",
858 V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
859 IX86_BUILTIN_GATHER3SIV4DI);
860
861 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2di",
862 V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
863 IX86_BUILTIN_GATHER3DIV2DI);
864
865 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4di",
866 V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
867 IX86_BUILTIN_GATHER3DIV4DI);
868
869 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4si",
870 V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
871 IX86_BUILTIN_GATHER3SIV4SI);
872
873 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8si",
874 V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
875 IX86_BUILTIN_GATHER3SIV8SI);
876
877 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4si",
878 V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
879 IX86_BUILTIN_GATHER3DIV4SI);
880
881 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8si",
882 V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
883 IX86_BUILTIN_GATHER3DIV8SI);
884
885 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4df ",
886 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
887 IX86_BUILTIN_GATHER3ALTSIV4DF);
888
889 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8sf ",
890 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
891 IX86_BUILTIN_GATHER3ALTDIV8SF);
892
893 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4di ",
894 V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
895 IX86_BUILTIN_GATHER3ALTSIV4DI);
896
897 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8si ",
898 V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
899 IX86_BUILTIN_GATHER3ALTDIV8SI);
900
901 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8sf",
902 VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
903 IX86_BUILTIN_SCATTERSIV8SF);
904
905 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4sf",
906 VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
907 IX86_BUILTIN_SCATTERSIV4SF);
908
909 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4df",
910 VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
911 IX86_BUILTIN_SCATTERSIV4DF);
912
913 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2df",
914 VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
915 IX86_BUILTIN_SCATTERSIV2DF);
916
917 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8sf",
918 VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
919 IX86_BUILTIN_SCATTERDIV8SF);
920
921 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4sf",
922 VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
923 IX86_BUILTIN_SCATTERDIV4SF);
924
925 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4df",
926 VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
927 IX86_BUILTIN_SCATTERDIV4DF);
928
929 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2df",
930 VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
931 IX86_BUILTIN_SCATTERDIV2DF);
932
933 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8si",
934 VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
935 IX86_BUILTIN_SCATTERSIV8SI);
936
937 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4si",
938 VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
939 IX86_BUILTIN_SCATTERSIV4SI);
940
941 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4di",
942 VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
943 IX86_BUILTIN_SCATTERSIV4DI);
944
945 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2di",
946 VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
947 IX86_BUILTIN_SCATTERSIV2DI);
948
949 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8si",
950 VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
951 IX86_BUILTIN_SCATTERDIV8SI);
952
953 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4si",
954 VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
955 IX86_BUILTIN_SCATTERDIV4SI);
956
957 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4di",
958 VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
959 IX86_BUILTIN_SCATTERDIV4DI);
960
961 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2di",
962 VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
963 IX86_BUILTIN_SCATTERDIV2DI);
964
965 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8df ",
966 VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
967 IX86_BUILTIN_SCATTERALTSIV8DF);
968
969 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16sf ",
970 VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
971 IX86_BUILTIN_SCATTERALTDIV16SF);
972
973 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8di ",
974 VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
975 IX86_BUILTIN_SCATTERALTSIV8DI);
976
977 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16si ",
978 VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
979 IX86_BUILTIN_SCATTERALTDIV16SI);
980
981 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4df ",
982 VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
983 IX86_BUILTIN_SCATTERALTSIV4DF);
984
985 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8sf ",
986 VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
987 IX86_BUILTIN_SCATTERALTDIV8SF);
988
989 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4di ",
990 VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
991 IX86_BUILTIN_SCATTERALTSIV4DI);
992
993 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8si ",
994 VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
995 IX86_BUILTIN_SCATTERALTDIV8SI);
996
997 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2df ",
998 VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
999 IX86_BUILTIN_SCATTERALTSIV2DF);
1000
1001 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4sf ",
1002 VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
1003 IX86_BUILTIN_SCATTERALTDIV4SF);
1004
1005 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2di ",
1006 VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
1007 IX86_BUILTIN_SCATTERALTSIV2DI);
1008
1009 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4si ",
1010 VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
1011 IX86_BUILTIN_SCATTERALTDIV4SI);
1012
1013 /* AVX512PF */
1014 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdpd",
1015 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1016 IX86_BUILTIN_GATHERPFDPD);
1017 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdps",
1018 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1019 IX86_BUILTIN_GATHERPFDPS);
1020 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqpd",
1021 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1022 IX86_BUILTIN_GATHERPFQPD);
1023 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqps",
1024 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1025 IX86_BUILTIN_GATHERPFQPS);
1026 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdpd",
1027 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1028 IX86_BUILTIN_SCATTERPFDPD);
1029 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdps",
1030 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1031 IX86_BUILTIN_SCATTERPFDPS);
1032 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqpd",
1033 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1034 IX86_BUILTIN_SCATTERPFQPD);
1035 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqps",
1036 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1037 IX86_BUILTIN_SCATTERPFQPS);
1038
1039 /* SHA */
1040 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg1",
1041 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG1);
1042 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg2",
1043 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG2);
1044 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1nexte",
1045 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1NEXTE);
1046 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1rnds4",
1047 V4SI_FTYPE_V4SI_V4SI_INT, IX86_BUILTIN_SHA1RNDS4);
1048 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg1",
1049 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG1);
1050 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg2",
1051 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG2);
1052 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256rnds2",
1053 V4SI_FTYPE_V4SI_V4SI_V4SI, IX86_BUILTIN_SHA256RNDS2);
1054
1055 /* RTM. */
1056 def_builtin (OPTION_MASK_ISA_RTM, 0, "__builtin_ia32_xabort",
1057 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_XABORT);
1058
1059 /* MMX access to the vec_init patterns. */
ecfdb16c
L		 1060 def_builtin_const (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0,
1061 "__builtin_ia32_vec_init_v2si",
2bf6d935
ML		 1062 V2SI_FTYPE_INT_INT, IX86_BUILTIN_VEC_INIT_V2SI);
1063
ecfdb16c
L		 1064 def_builtin_const (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0,
1065 "__builtin_ia32_vec_init_v4hi",
2bf6d935
ML		 1066 V4HI_FTYPE_HI_HI_HI_HI,
1067 IX86_BUILTIN_VEC_INIT_V4HI);
1068
ecfdb16c
L		 1069 def_builtin_const (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0,
1070 "__builtin_ia32_vec_init_v8qi",
2bf6d935
ML		 1071 V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
1072 IX86_BUILTIN_VEC_INIT_V8QI);
1073
1074 /* Access to the vec_extract patterns. */
1075 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2df",
1076 DOUBLE_FTYPE_V2DF_INT, IX86_BUILTIN_VEC_EXT_V2DF);
1077 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2di",
1078 DI_FTYPE_V2DI_INT, IX86_BUILTIN_VEC_EXT_V2DI);
1079 def_builtin_const (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_vec_ext_v4sf",
1080 FLOAT_FTYPE_V4SF_INT, IX86_BUILTIN_VEC_EXT_V4SF);
1081 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v4si",
1082 SI_FTYPE_V4SI_INT, IX86_BUILTIN_VEC_EXT_V4SI);
1083 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v8hi",
1084 HI_FTYPE_V8HI_INT, IX86_BUILTIN_VEC_EXT_V8HI);
1085
1086 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1087 /* As it uses V4HImode, we have to require -mmmx too. */
1088 | OPTION_MASK_ISA_MMX, 0,
1089 "__builtin_ia32_vec_ext_v4hi",
1090 HI_FTYPE_V4HI_INT, IX86_BUILTIN_VEC_EXT_V4HI);
1091
ecfdb16c
L		 1092 def_builtin_const (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE2, 0,
1093 "__builtin_ia32_vec_ext_v2si",
2bf6d935
ML		 1094 SI_FTYPE_V2SI_INT, IX86_BUILTIN_VEC_EXT_V2SI);
1095
1096 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v16qi",
1097 QI_FTYPE_V16QI_INT, IX86_BUILTIN_VEC_EXT_V16QI);
1098
1099 /* Access to the vec_set patterns. */
1100 def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, 0,
1101 "__builtin_ia32_vec_set_v2di",
1102 V2DI_FTYPE_V2DI_DI_INT, IX86_BUILTIN_VEC_SET_V2DI);
1103
1104 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4sf",
1105 V4SF_FTYPE_V4SF_FLOAT_INT, IX86_BUILTIN_VEC_SET_V4SF);
1106
1107 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4si",
1108 V4SI_FTYPE_V4SI_SI_INT, IX86_BUILTIN_VEC_SET_V4SI);
1109
1110 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_set_v8hi",
1111 V8HI_FTYPE_V8HI_HI_INT, IX86_BUILTIN_VEC_SET_V8HI);
1112
1113 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1114 /* As it uses V4HImode, we have to require -mmmx too. */
1115 | OPTION_MASK_ISA_MMX, 0,
1116 "__builtin_ia32_vec_set_v4hi",
1117 V4HI_FTYPE_V4HI_HI_INT, IX86_BUILTIN_VEC_SET_V4HI);
1118
1119 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v16qi",
1120 V16QI_FTYPE_V16QI_QI_INT, IX86_BUILTIN_VEC_SET_V16QI);
1121
1122 /* RDSEED */
1123 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_hi_step",
1124 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDSEED16_STEP);
1125 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_si_step",
1126 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDSEED32_STEP);
1127 def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, 0,
1128 "__builtin_ia32_rdseed_di_step",
1129 INT_FTYPE_PULONGLONG, IX86_BUILTIN_RDSEED64_STEP);
1130
1131 /* ADCX */
1132 def_builtin (0, 0, "__builtin_ia32_addcarryx_u32",
1133 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_ADDCARRYX32);
1134 def_builtin (OPTION_MASK_ISA_64BIT, 0,
1135 "__builtin_ia32_addcarryx_u64",
1136 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1137 IX86_BUILTIN_ADDCARRYX64);
1138
1139 /* SBB */
1140 def_builtin (0, 0, "__builtin_ia32_sbb_u32",
1141 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_SBB32);
1142 def_builtin (OPTION_MASK_ISA_64BIT, 0,
1143 "__builtin_ia32_sbb_u64",
1144 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1145 IX86_BUILTIN_SBB64);
1146
1147 /* Read/write FLAGS. */
1148 if (TARGET_64BIT)
1149 {
1150 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_readeflags_u64",
1151 UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
1152 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_writeeflags_u64",
1153 VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS);
1154 }
1155 else
1156 {
1157 def_builtin (0, 0, "__builtin_ia32_readeflags_u32",
1158 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
1159 def_builtin (0, 0, "__builtin_ia32_writeeflags_u32",
1160 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS);
1161 }
1162
1163 /* CLFLUSHOPT. */
1164 def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, 0, "__builtin_ia32_clflushopt",
1165 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSHOPT);
1166
1167 /* CLWB. */
1168 def_builtin (OPTION_MASK_ISA_CLWB, 0, "__builtin_ia32_clwb",
1169 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB);
1170
1171 /* MONITORX and MWAITX. */
8cf86e14 1172 def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_monitorx",
2bf6d935 1173 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX);
8cf86e14 1174 def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_mwaitx",
2bf6d935
ML		 1175 VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX);
1176
1177 /* CLZERO. */
8cf86e14 1178 def_builtin (0, OPTION_MASK_ISA2_CLZERO, "__builtin_ia32_clzero",
2bf6d935
ML		 1179 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO);
1180
1181 /* WAITPKG. */
8cf86e14 1182 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umonitor",
2bf6d935 1183 VOID_FTYPE_PVOID, IX86_BUILTIN_UMONITOR);
8cf86e14 1184 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umwait",
2bf6d935 1185 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_UMWAIT);
8cf86e14 1186 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_tpause",
2bf6d935
ML		 1187 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_TPAUSE);
1188
1189 /* CLDEMOTE. */
8cf86e14 1190 def_builtin (0, OPTION_MASK_ISA2_CLDEMOTE, "__builtin_ia32_cldemote",
2bf6d935
ML		 1191 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLDEMOTE);
1192
1193 /* Add FMA4 multi-arg argument instructions */
1194 for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
1195 {
1196 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
1197 if (d->name == 0)
1198 continue;
1199
1200 ftype = (enum ix86_builtin_func_type) d->flag;
1201 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code);
1202 }
1203 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
1204 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
1205 ARRAY_SIZE (bdesc_multi_arg) - 1);
1206
1207 /* Add CET inrinsics. */
1208 for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
1209 {
1210 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
1211 if (d->name == 0)
1212 continue;
1213
1214 ftype = (enum ix86_builtin_func_type) d->flag;
1215 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
1216 }
1217 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
1218 IX86_BUILTIN__BDESC_CET_FIRST,
1219 ARRAY_SIZE (bdesc_cet) - 1);
1220
1221 for (i = 0, d = bdesc_cet_rdssp;
1222 i < ARRAY_SIZE (bdesc_cet_rdssp);
1223 i++, d++)
1224 {
1225 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, i);
1226 if (d->name == 0)
1227 continue;
1228
1229 ftype = (enum ix86_builtin_func_type) d->flag;
1230 def_builtin (d->mask, d->mask2, d->name, ftype, d->code);
1231 }
1232 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_LAST,
1233 IX86_BUILTIN__BDESC_CET_NORMAL_FIRST,
1234 ARRAY_SIZE (bdesc_cet_rdssp) - 1);
1235}
1236
1237#undef BDESC_VERIFY
1238#undef BDESC_VERIFYS
1239
1240/* Make builtins to detect cpu type and features supported. NAME is
1241 the builtin name, CODE is the builtin code, and FTYPE is the function
1242 type of the builtin. */
1243
1244static void
1245make_cpu_type_builtin (const char* name, int code,
1246 enum ix86_builtin_func_type ftype, bool is_const)
1247{
1248 tree decl;
1249 tree type;
1250
1251 type = ix86_get_builtin_func_type (ftype);
1252 decl = add_builtin_function (name, type, code, BUILT_IN_MD,
1253 NULL, NULL_TREE);
1254 gcc_assert (decl != NULL_TREE);
1255 ix86_builtins[(int) code] = decl;
1256 TREE_READONLY (decl) = is_const;
1257}
1258
1259/* Make builtins to get CPU type and features supported. The created
1260 builtins are :
1261
1262 __builtin_cpu_init (), to detect cpu type and features,
1263 __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
1264 __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
1265 */
1266
1267static void
1268ix86_init_platform_type_builtins (void)
1269{
1270 make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT,
1271 INT_FTYPE_VOID, false);
1272 make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS,
1273 INT_FTYPE_PCCHAR, true);
1274 make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS,
1275 INT_FTYPE_PCCHAR, true);
1276}
1277
1278/* Internal method for ix86_init_builtins. */
1279
1280static void
1281ix86_init_builtins_va_builtins_abi (void)
1282{
1283 tree ms_va_ref, sysv_va_ref;
1284 tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
1285 tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
1286 tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
1287 tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
1288
1289 if (!TARGET_64BIT)
1290 return;
1291 fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
1292 fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
1293 ms_va_ref = build_reference_type (ms_va_list_type_node);
1294 sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
1295
1296 fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
1297 NULL_TREE);
1298 fnvoid_va_start_ms
1299 = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
1300 fnvoid_va_end_sysv
1301 = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
1302 fnvoid_va_start_sysv
1303 = build_varargs_function_type_list (void_type_node, sysv_va_ref,
1304 NULL_TREE);
1305 fnvoid_va_copy_ms
1306 = build_function_type_list (void_type_node, ms_va_ref,
1307 ms_va_list_type_node, NULL_TREE);
1308 fnvoid_va_copy_sysv
1309 = build_function_type_list (void_type_node, sysv_va_ref,
1310 sysv_va_ref, NULL_TREE);
1311
1312 add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms,
1313 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_ms);
1314 add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms,
1315 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_ms);
1316 add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms,
1317 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_ms);
1318 add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv,
1319 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1320 add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv,
1321 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1322 add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv,
1323 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_sysv);
1324}
1325
1326static void
1327ix86_init_builtin_types (void)
1328{
1329 tree float80_type_node, const_string_type_node;
1330
1331 /* The __float80 type. */
1332 float80_type_node = long_double_type_node;
1333 if (TYPE_MODE (float80_type_node) != XFmode)
1334 {
1335 if (float64x_type_node != NULL_TREE
1336 && TYPE_MODE (float64x_type_node) == XFmode)
1337 float80_type_node = float64x_type_node;
1338 else
1339 {
1340 /* The __float80 type. */
1341 float80_type_node = make_node (REAL_TYPE);
1342
1343 TYPE_PRECISION (float80_type_node) = 80;
1344 layout_type (float80_type_node);
1345 }
1346 }
1347 lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
1348
1349 /* The __float128 type. The node has already been created as
1350 _Float128, so we only need to register the __float128 name for
1351 it. */
1352 lang_hooks.types.register_builtin_type (float128_type_node, "__float128");
1353
1354 const_string_type_node
1355 = build_pointer_type (build_qualified_type
1356 (char_type_node, TYPE_QUAL_CONST));
1357
1358 /* This macro is built by i386-builtin-types.awk. */
1359 DEFINE_BUILTIN_PRIMITIVE_TYPES;
1360}
1361
1362void
1363ix86_init_builtins (void)
1364{
1365 tree ftype, decl;
1366
1367 ix86_init_builtin_types ();
1368
1369 /* Builtins to get CPU type and features. */
1370 ix86_init_platform_type_builtins ();
1371
1372 /* TFmode support builtins. */
1373 def_builtin_const (0, 0, "__builtin_infq",
1374 FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ);
1375 def_builtin_const (0, 0, "__builtin_huge_valq",
1376 FLOAT128_FTYPE_VOID, IX86_BUILTIN_HUGE_VALQ);
1377
1378 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING);
1379 decl = add_builtin_function ("__builtin_nanq", ftype, IX86_BUILTIN_NANQ,
1380 BUILT_IN_MD, "nanq", NULL_TREE);
1381 TREE_READONLY (decl) = 1;
1382 ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
1383
1384 decl = add_builtin_function ("__builtin_nansq", ftype, IX86_BUILTIN_NANSQ,
1385 BUILT_IN_MD, "nansq", NULL_TREE);
1386 TREE_READONLY (decl) = 1;
1387 ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
1388
1389 /* We will expand them to normal call if SSE isn't available since
1390 they are used by libgcc. */
1391 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128);
1392 decl = add_builtin_function ("__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ,
1393 BUILT_IN_MD, "__fabstf2", NULL_TREE);
1394 TREE_READONLY (decl) = 1;
1395 ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
1396
1397 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128);
1398 decl = add_builtin_function ("__builtin_copysignq", ftype,
1399 IX86_BUILTIN_COPYSIGNQ, BUILT_IN_MD,
1400 "__copysigntf3", NULL_TREE);
1401 TREE_READONLY (decl) = 1;
1402 ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
1403
1404 ix86_init_tm_builtins ();
1405 ix86_init_mmx_sse_builtins ();
1406
1407 if (TARGET_LP64)
1408 ix86_init_builtins_va_builtins_abi ();
1409
1410#ifdef SUBTARGET_INIT_BUILTINS
1411 SUBTARGET_INIT_BUILTINS;
1412#endif
1413}
1414
1415/* Return the ix86 builtin for CODE. */
1416
1417tree
1418ix86_builtin_decl (unsigned code, bool)
1419{
1420 if (code >= IX86_BUILTIN_MAX)
1421 return error_mark_node;
1422
1423 return ix86_builtins[code];
1424}
1425
1426/* This returns the target-specific builtin with code CODE if
1427 current_function_decl has visibility on this builtin, which is checked
1428 using isa flags. Returns NULL_TREE otherwise. */
1429
1430static tree ix86_get_builtin (enum ix86_builtins code)
1431{
1432 struct cl_target_option *opts;
1433 tree target_tree = NULL_TREE;
1434
1435 /* Determine the isa flags of current_function_decl. */
1436
1437 if (current_function_decl)
1438 target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
1439
1440 if (target_tree == NULL)
1441 target_tree = target_option_default_node;
1442
1443 opts = TREE_TARGET_OPTION (target_tree);
1444
1445 if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
1446 || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
1447 return ix86_builtin_decl (code, true);
1448 else
1449 return NULL_TREE;
1450}
1451
1452/* Vectorization library interface and handlers. */
1453tree (*ix86_veclib_handler) (combined_fn, tree, tree);
1454
1455/* Returns a function decl for a vectorized version of the combined function
1456 with combined_fn code FN and the result vector type TYPE, or NULL_TREE
1457 if it is not available. */
1458
1459tree
1460ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
1461 tree type_in)
1462{
1463 machine_mode in_mode, out_mode;
1464 int in_n, out_n;
1465
1466 if (TREE_CODE (type_out) != VECTOR_TYPE
1467 || TREE_CODE (type_in) != VECTOR_TYPE)
1468 return NULL_TREE;
1469
1470 out_mode = TYPE_MODE (TREE_TYPE (type_out));
1471 out_n = TYPE_VECTOR_SUBPARTS (type_out);
1472 in_mode = TYPE_MODE (TREE_TYPE (type_in));
1473 in_n = TYPE_VECTOR_SUBPARTS (type_in);
1474
1475 switch (fn)
1476 {
1477 CASE_CFN_EXP2:
1478 if (out_mode == SFmode && in_mode == SFmode)
1479 {
1480 if (out_n == 16 && in_n == 16)
1481 return ix86_get_builtin (IX86_BUILTIN_EXP2PS);
1482 }
1483 break;
1484
1485 CASE_CFN_IFLOOR:
1486 CASE_CFN_LFLOOR:
1487 CASE_CFN_LLFLOOR:
1488 /* The round insn does not trap on denormals. */
1489 if (flag_trapping_math || !TARGET_SSE4_1)
1490 break;
1491
1492 if (out_mode == SImode && in_mode == DFmode)
1493 {
1494 if (out_n == 4 && in_n == 2)
1495 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
1496 else if (out_n == 8 && in_n == 4)
1497 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
1498 else if (out_n == 16 && in_n == 8)
1499 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
1500 }
1501 if (out_mode == SImode && in_mode == SFmode)
1502 {
1503 if (out_n == 4 && in_n == 4)
1504 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX);
1505 else if (out_n == 8 && in_n == 8)
1506 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256);
1507 else if (out_n == 16 && in_n == 16)
1508 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512);
1509 }
1510 break;
1511
1512 CASE_CFN_ICEIL:
1513 CASE_CFN_LCEIL:
1514 CASE_CFN_LLCEIL:
1515 /* The round insn does not trap on denormals. */
1516 if (flag_trapping_math || !TARGET_SSE4_1)
1517 break;
1518
1519 if (out_mode == SImode && in_mode == DFmode)
1520 {
1521 if (out_n == 4 && in_n == 2)
1522 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
1523 else if (out_n == 8 && in_n == 4)
1524 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
1525 else if (out_n == 16 && in_n == 8)
1526 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
1527 }
1528 if (out_mode == SImode && in_mode == SFmode)
1529 {
1530 if (out_n == 4 && in_n == 4)
1531 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX);
1532 else if (out_n == 8 && in_n == 8)
1533 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256);
1534 else if (out_n == 16 && in_n == 16)
1535 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512);
1536 }
1537 break;
1538
1539 CASE_CFN_IRINT:
1540 CASE_CFN_LRINT:
1541 CASE_CFN_LLRINT:
1542 if (out_mode == SImode && in_mode == DFmode)
1543 {
1544 if (out_n == 4 && in_n == 2)
1545 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX);
1546 else if (out_n == 8 && in_n == 4)
1547 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256);
1548 else if (out_n == 16 && in_n == 8)
1549 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512);
1550 }
1551 if (out_mode == SImode && in_mode == SFmode)
1552 {
1553 if (out_n == 4 && in_n == 4)
1554 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ);
1555 else if (out_n == 8 && in_n == 8)
1556 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256);
1557 else if (out_n == 16 && in_n == 16)
1558 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512);
1559 }
1560 break;
1561
1562 CASE_CFN_IROUND:
1563 CASE_CFN_LROUND:
1564 CASE_CFN_LLROUND:
1565 /* The round insn does not trap on denormals. */
1566 if (flag_trapping_math || !TARGET_SSE4_1)
1567 break;
1568
1569 if (out_mode == SImode && in_mode == DFmode)
1570 {
1571 if (out_n == 4 && in_n == 2)
1572 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
1573 else if (out_n == 8 && in_n == 4)
1574 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
1575 else if (out_n == 16 && in_n == 8)
1576 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
1577 }
1578 if (out_mode == SImode && in_mode == SFmode)
1579 {
1580 if (out_n == 4 && in_n == 4)
1581 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX);
1582 else if (out_n == 8 && in_n == 8)
1583 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256);
1584 else if (out_n == 16 && in_n == 16)
1585 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512);
1586 }
1587 break;
1588
1589 CASE_CFN_FLOOR:
1590 /* The round insn does not trap on denormals. */
1591 if (flag_trapping_math || !TARGET_SSE4_1)
1592 break;
1593
1594 if (out_mode == DFmode && in_mode == DFmode)
1595 {
1596 if (out_n == 2 && in_n == 2)
1597 return ix86_get_builtin (IX86_BUILTIN_FLOORPD);
1598 else if (out_n == 4 && in_n == 4)
1599 return ix86_get_builtin (IX86_BUILTIN_FLOORPD256);
1600 else if (out_n == 8 && in_n == 8)
1601 return ix86_get_builtin (IX86_BUILTIN_FLOORPD512);
1602 }
1603 if (out_mode == SFmode && in_mode == SFmode)
1604 {
1605 if (out_n == 4 && in_n == 4)
1606 return ix86_get_builtin (IX86_BUILTIN_FLOORPS);
1607 else if (out_n == 8 && in_n == 8)
1608 return ix86_get_builtin (IX86_BUILTIN_FLOORPS256);
1609 else if (out_n == 16 && in_n == 16)
1610 return ix86_get_builtin (IX86_BUILTIN_FLOORPS512);
1611 }
1612 break;
1613
1614 CASE_CFN_CEIL:
1615 /* The round insn does not trap on denormals. */
1616 if (flag_trapping_math || !TARGET_SSE4_1)
1617 break;
1618
1619 if (out_mode == DFmode && in_mode == DFmode)
1620 {
1621 if (out_n == 2 && in_n == 2)
1622 return ix86_get_builtin (IX86_BUILTIN_CEILPD);
1623 else if (out_n == 4 && in_n == 4)
1624 return ix86_get_builtin (IX86_BUILTIN_CEILPD256);
1625 else if (out_n == 8 && in_n == 8)
1626 return ix86_get_builtin (IX86_BUILTIN_CEILPD512);
1627 }
1628 if (out_mode == SFmode && in_mode == SFmode)
1629 {
1630 if (out_n == 4 && in_n == 4)
1631 return ix86_get_builtin (IX86_BUILTIN_CEILPS);
1632 else if (out_n == 8 && in_n == 8)
1633 return ix86_get_builtin (IX86_BUILTIN_CEILPS256);
1634 else if (out_n == 16 && in_n == 16)
1635 return ix86_get_builtin (IX86_BUILTIN_CEILPS512);
1636 }
1637 break;
1638
1639 CASE_CFN_TRUNC:
1640 /* The round insn does not trap on denormals. */
1641 if (flag_trapping_math || !TARGET_SSE4_1)
1642 break;
1643
1644 if (out_mode == DFmode && in_mode == DFmode)
1645 {
1646 if (out_n == 2 && in_n == 2)
1647 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD);
1648 else if (out_n == 4 && in_n == 4)
1649 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256);
1650 else if (out_n == 8 && in_n == 8)
1651 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512);
1652 }
1653 if (out_mode == SFmode && in_mode == SFmode)
1654 {
1655 if (out_n == 4 && in_n == 4)
1656 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS);
1657 else if (out_n == 8 && in_n == 8)
1658 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256);
1659 else if (out_n == 16 && in_n == 16)
1660 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512);
1661 }
1662 break;
1663
2bf6d935
ML		 1664 CASE_CFN_FMA:
1665 if (out_mode == DFmode && in_mode == DFmode)
1666 {
1667 if (out_n == 2 && in_n == 2)
1668 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD);
1669 if (out_n == 4 && in_n == 4)
1670 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD256);
1671 }
1672 if (out_mode == SFmode && in_mode == SFmode)
1673 {
1674 if (out_n == 4 && in_n == 4)
1675 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS);
1676 if (out_n == 8 && in_n == 8)
1677 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS256);
1678 }
1679 break;
1680
1681 default:
1682 break;
1683 }
1684
1685 /* Dispatch to a handler for a vectorization library. */
1686 if (ix86_veclib_handler)
1687 return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
1688
1689 return NULL_TREE;
1690}
1691
1692/* Returns a decl of a function that implements gather load with
1693 memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
1694 Return NULL_TREE if it is not available. */
1695
1696tree
1697ix86_vectorize_builtin_gather (const_tree mem_vectype,
1698 const_tree index_type, int scale)
1699{
1700 bool si;
1701 enum ix86_builtins code;
1702
1703 if (! TARGET_AVX2 || !TARGET_USE_GATHER)
1704 return NULL_TREE;
1705
1706 if ((TREE_CODE (index_type) != INTEGER_TYPE
1707 && !POINTER_TYPE_P (index_type))
1708 || (TYPE_MODE (index_type) != SImode
1709 && TYPE_MODE (index_type) != DImode))
1710 return NULL_TREE;
1711
1712 if (TYPE_PRECISION (index_type) > POINTER_SIZE)
1713 return NULL_TREE;
1714
1715 /* v*gather* insn sign extends index to pointer mode. */
1716 if (TYPE_PRECISION (index_type) < POINTER_SIZE
1717 && TYPE_UNSIGNED (index_type))
1718 return NULL_TREE;
1719
1720 if (scale <= 0
1721 || scale > 8
1722 || (scale & (scale - 1)) != 0)
1723 return NULL_TREE;
1724
1725 si = TYPE_MODE (index_type) == SImode;
1726 switch (TYPE_MODE (mem_vectype))
1727 {
1728 case E_V2DFmode:
1729 if (TARGET_AVX512VL)
1730 code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
1731 else
1732 code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
1733 break;
1734 case E_V4DFmode:
1735 if (TARGET_AVX512VL)
1736 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
1737 else
1738 code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
1739 break;
1740 case E_V2DImode:
1741 if (TARGET_AVX512VL)
1742 code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
1743 else
1744 code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
1745 break;
1746 case E_V4DImode:
1747 if (TARGET_AVX512VL)
1748 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
1749 else
1750 code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
1751 break;
1752 case E_V4SFmode:
1753 if (TARGET_AVX512VL)
1754 code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
1755 else
1756 code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
1757 break;
1758 case E_V8SFmode:
1759 if (TARGET_AVX512VL)
1760 code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
1761 else
1762 code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
1763 break;
1764 case E_V4SImode:
1765 if (TARGET_AVX512VL)
1766 code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
1767 else
1768 code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
1769 break;
1770 case E_V8SImode:
1771 if (TARGET_AVX512VL)
1772 code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
1773 else
1774 code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
1775 break;
1776 case E_V8DFmode:
1777 if (TARGET_AVX512F)
1778 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
1779 else
1780 return NULL_TREE;
1781 break;
1782 case E_V8DImode:
1783 if (TARGET_AVX512F)
1784 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
1785 else
1786 return NULL_TREE;
1787 break;
1788 case E_V16SFmode:
1789 if (TARGET_AVX512F)
1790 code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
1791 else
1792 return NULL_TREE;
1793 break;
1794 case E_V16SImode:
1795 if (TARGET_AVX512F)
1796 code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
1797 else
1798 return NULL_TREE;
1799 break;
1800 default:
1801 return NULL_TREE;
1802 }
1803
1804 return ix86_get_builtin (code);
1805}
1806
1807/* Returns a code for a target-specific builtin that implements
1808 reciprocal of the function, or NULL_TREE if not available. */
1809
1810tree
1811ix86_builtin_reciprocal (tree fndecl)
1812{
1813 enum ix86_builtins fn_code
4d732405 1814 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
2bf6d935
ML		 1815 switch (fn_code)
1816 {
1817 /* Vectorized version of sqrt to rsqrt conversion. */
1818 case IX86_BUILTIN_SQRTPS_NR:
1819 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR);
1820
1821 case IX86_BUILTIN_SQRTPS_NR256:
1822 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256);
1823
1824 default:
1825 return NULL_TREE;
1826 }
1827}
1828
1829/* Priority of i386 features, greater value is higher priority. This is
1830 used to decide the order in which function dispatch must happen. For
1831 instance, a version specialized for SSE4.2 should be checked for dispatch
1832 before a version for SSE3, as SSE4.2 implies SSE3. */
1833enum feature_priority
1834{
1835 P_ZERO = 0,
1836 P_MMX,
1837 P_SSE,
1838 P_SSE2,
1839 P_SSE3,
1840 P_SSSE3,
1841 P_PROC_SSSE3,
1842 P_SSE4_A,
1843 P_PROC_SSE4_A,
1844 P_SSE4_1,
1845 P_SSE4_2,
1846 P_PROC_SSE4_2,
1847 P_POPCNT,
1848 P_AES,
1849 P_PCLMUL,
1850 P_AVX,
1851 P_PROC_AVX,
1852 P_BMI,
1853 P_PROC_BMI,
1854 P_FMA4,
1855 P_XOP,
1856 P_PROC_XOP,
1857 P_FMA,
1858 P_PROC_FMA,
1859 P_BMI2,
1860 P_AVX2,
1861 P_PROC_AVX2,
1862 P_AVX512F,
1863 P_PROC_AVX512F
1864};
1865
1866/* This is the order of bit-fields in __processor_features in cpuinfo.c */
1867enum processor_features
1868{
1869 F_CMOV = 0,
1870 F_MMX,
1871 F_POPCNT,
1872 F_SSE,
1873 F_SSE2,
1874 F_SSE3,
1875 F_SSSE3,
1876 F_SSE4_1,
1877 F_SSE4_2,
1878 F_AVX,
1879 F_AVX2,
1880 F_SSE4_A,
1881 F_FMA4,
1882 F_XOP,
1883 F_FMA,
1884 F_AVX512F,
1885 F_BMI,
1886 F_BMI2,
1887 F_AES,
1888 F_PCLMUL,
1889 F_AVX512VL,
1890 F_AVX512BW,
1891 F_AVX512DQ,
1892 F_AVX512CD,
1893 F_AVX512ER,
1894 F_AVX512PF,
1895 F_AVX512VBMI,
1896 F_AVX512IFMA,
1897 F_AVX5124VNNIW,
1898 F_AVX5124FMAPS,
1899 F_AVX512VPOPCNTDQ,
1900 F_AVX512VBMI2,
1901 F_GFNI,
1902 F_VPCLMULQDQ,
1903 F_AVX512VNNI,
1904 F_AVX512BITALG,
e21b52af 1905 F_AVX512VP2INTERSECT,
4f0e90fa 1906 F_AVX512BF16,
2bf6d935
ML		 1907 F_MAX
1908};
1909
1910/* These are the values for vendor types and cpu types and subtypes
1911 in cpuinfo.c. Cpu types and subtypes should be subtracted by
1912 the corresponding start value. */
1913enum processor_model
1914{
1915 M_INTEL = 1,
1916 M_AMD,
1917 M_CPU_TYPE_START,
1918 M_INTEL_BONNELL,
1919 M_INTEL_CORE2,
1920 M_INTEL_COREI7,
1921 M_AMDFAM10H,
1922 M_AMDFAM15H,
1923 M_INTEL_SILVERMONT,
1924 M_INTEL_KNL,
1925 M_AMD_BTVER1,
1926 M_AMD_BTVER2,
1927 M_AMDFAM17H,
1928 M_INTEL_KNM,
1929 M_INTEL_GOLDMONT,
1930 M_INTEL_GOLDMONT_PLUS,
1931 M_INTEL_TREMONT,
1932 M_CPU_SUBTYPE_START,
1933 M_INTEL_COREI7_NEHALEM,
1934 M_INTEL_COREI7_WESTMERE,
1935 M_INTEL_COREI7_SANDYBRIDGE,
1936 M_AMDFAM10H_BARCELONA,
1937 M_AMDFAM10H_SHANGHAI,
1938 M_AMDFAM10H_ISTANBUL,
1939 M_AMDFAM15H_BDVER1,
1940 M_AMDFAM15H_BDVER2,
1941 M_AMDFAM15H_BDVER3,
1942 M_AMDFAM15H_BDVER4,
1943 M_AMDFAM17H_ZNVER1,
1944 M_INTEL_COREI7_IVYBRIDGE,
1945 M_INTEL_COREI7_HASWELL,
1946 M_INTEL_COREI7_BROADWELL,
1947 M_INTEL_COREI7_SKYLAKE,
1948 M_INTEL_COREI7_SKYLAKE_AVX512,
1949 M_INTEL_COREI7_CANNONLAKE,
1950 M_INTEL_COREI7_ICELAKE_CLIENT,
1951 M_INTEL_COREI7_ICELAKE_SERVER,
1952 M_AMDFAM17H_ZNVER2,
a9fcfec3
HL		 1953 M_INTEL_COREI7_CASCADELAKE,
1954 M_INTEL_COREI7_TIGERLAKE,
1955 M_INTEL_COREI7_COOPERLAKE
2bf6d935
ML		 1956};
1957
1958struct _arch_names_table
1959{
1960 const char *const name;
1961 const enum processor_model model;
1962};
1963
1964static const _arch_names_table arch_names_table[] =
1965{
1966 {"amd", M_AMD},
1967 {"intel", M_INTEL},
1968 {"atom", M_INTEL_BONNELL},
1969 {"slm", M_INTEL_SILVERMONT},
1970 {"core2", M_INTEL_CORE2},
1971 {"corei7", M_INTEL_COREI7},
1972 {"nehalem", M_INTEL_COREI7_NEHALEM},
1973 {"westmere", M_INTEL_COREI7_WESTMERE},
1974 {"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
1975 {"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
1976 {"haswell", M_INTEL_COREI7_HASWELL},
1977 {"broadwell", M_INTEL_COREI7_BROADWELL},
1978 {"skylake", M_INTEL_COREI7_SKYLAKE},
1979 {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512},
1980 {"cannonlake", M_INTEL_COREI7_CANNONLAKE},
1981 {"icelake-client", M_INTEL_COREI7_ICELAKE_CLIENT},
1982 {"icelake-server", M_INTEL_COREI7_ICELAKE_SERVER},
1983 {"cascadelake", M_INTEL_COREI7_CASCADELAKE},
a9fcfec3
HL		 1984 {"tigerlake", M_INTEL_COREI7_TIGERLAKE},
1985 {"cooperlake", M_INTEL_COREI7_COOPERLAKE},
2bf6d935
ML		 1986 {"bonnell", M_INTEL_BONNELL},
1987 {"silvermont", M_INTEL_SILVERMONT},
1988 {"goldmont", M_INTEL_GOLDMONT},
1989 {"goldmont-plus", M_INTEL_GOLDMONT_PLUS},
1990 {"tremont", M_INTEL_TREMONT},
1991 {"knl", M_INTEL_KNL},
1992 {"knm", M_INTEL_KNM},
1993 {"amdfam10h", M_AMDFAM10H},
1994 {"barcelona", M_AMDFAM10H_BARCELONA},
1995 {"shanghai", M_AMDFAM10H_SHANGHAI},
1996 {"istanbul", M_AMDFAM10H_ISTANBUL},
1997 {"btver1", M_AMD_BTVER1},
1998 {"amdfam15h", M_AMDFAM15H},
1999 {"bdver1", M_AMDFAM15H_BDVER1},
2000 {"bdver2", M_AMDFAM15H_BDVER2},
2001 {"bdver3", M_AMDFAM15H_BDVER3},
2002 {"bdver4", M_AMDFAM15H_BDVER4},
2003 {"btver2", M_AMD_BTVER2},
2004 {"amdfam17h", M_AMDFAM17H},
2005 {"znver1", M_AMDFAM17H_ZNVER1},
2006 {"znver2", M_AMDFAM17H_ZNVER2},
2007};
2008
2009/* These are the target attribute strings for which a dispatcher is
2010 available, from fold_builtin_cpu. */
2011struct _isa_names_table
2012{
2013 const char *const name;
2014 const enum processor_features feature;
2015 const enum feature_priority priority;
2016};
2017
2018static const _isa_names_table isa_names_table[] =
2019{
2020 {"cmov", F_CMOV, P_ZERO},
2021 {"mmx", F_MMX, P_MMX},
2022 {"popcnt", F_POPCNT, P_POPCNT},
2023 {"sse", F_SSE, P_SSE},
2024 {"sse2", F_SSE2, P_SSE2},
2025 {"sse3", F_SSE3, P_SSE3},
2026 {"ssse3", F_SSSE3, P_SSSE3},
2027 {"sse4a", F_SSE4_A, P_SSE4_A},
2028 {"sse4.1", F_SSE4_1, P_SSE4_1},
2029 {"sse4.2", F_SSE4_2, P_SSE4_2},
2030 {"avx", F_AVX, P_AVX},
2031 {"fma4", F_FMA4, P_FMA4},
2032 {"xop", F_XOP, P_XOP},
2033 {"fma", F_FMA, P_FMA},
2034 {"avx2", F_AVX2, P_AVX2},
2035 {"avx512f", F_AVX512F, P_AVX512F},
2036 {"bmi", F_BMI, P_BMI},
2037 {"bmi2", F_BMI2, P_BMI2},
2038 {"aes", F_AES, P_AES},
2039 {"pclmul", F_PCLMUL, P_PCLMUL},
2040 {"avx512vl",F_AVX512VL, P_ZERO},
2041 {"avx512bw",F_AVX512BW, P_ZERO},
2042 {"avx512dq",F_AVX512DQ, P_ZERO},
2043 {"avx512cd",F_AVX512CD, P_ZERO},
2044 {"avx512er",F_AVX512ER, P_ZERO},
2045 {"avx512pf",F_AVX512PF, P_ZERO},
2046 {"avx512vbmi",F_AVX512VBMI, P_ZERO},
2047 {"avx512ifma",F_AVX512IFMA, P_ZERO},
2048 {"avx5124vnniw",F_AVX5124VNNIW, P_ZERO},
2049 {"avx5124fmaps",F_AVX5124FMAPS, P_ZERO},
2050 {"avx512vpopcntdq",F_AVX512VPOPCNTDQ, P_ZERO},
2051 {"avx512vbmi2", F_AVX512VBMI2, P_ZERO},
2052 {"gfni", F_GFNI, P_ZERO},
2053 {"vpclmulqdq", F_VPCLMULQDQ, P_ZERO},
2054 {"avx512vnni", F_AVX512VNNI, P_ZERO},
4f0e90fa 2055 {"avx512bitalg", F_AVX512BITALG, P_ZERO},
e21b52af 2056 {"avx512vp2intersect",F_AVX512VP2INTERSECT, P_ZERO},
4f0e90fa 2057 {"avx512bf16", F_AVX512BF16, P_ZERO}
2bf6d935
ML		 2058};
2059
2060/* This parses the attribute arguments to target in DECL and determines
2061 the right builtin to use to match the platform specification.
2062 It returns the priority value for this version decl. If PREDICATE_LIST
2063 is not NULL, it stores the list of cpu features that need to be checked
2064 before dispatching this function. */
2065
2066unsigned int
2067get_builtin_code_for_version (tree decl, tree *predicate_list)
2068{
2069 tree attrs;
2070 struct cl_target_option cur_target;
2071 tree target_node;
2072 struct cl_target_option *new_target;
2073 const char *arg_str = NULL;
2074 const char *attrs_str = NULL;
2075 char *tok_str = NULL;
2076 char *token;
2077
2078 enum feature_priority priority = P_ZERO;
2079
2080 static unsigned int NUM_FEATURES
2081 = sizeof (isa_names_table) / sizeof (_isa_names_table);
2082
2083 unsigned int i;
2084
2085 tree predicate_chain = NULL_TREE;
2086 tree predicate_decl, predicate_arg;
2087
2088 attrs = lookup_attribute ("target", DECL_ATTRIBUTES (decl));
2089 gcc_assert (attrs != NULL);
2090
2091 attrs = TREE_VALUE (TREE_VALUE (attrs));
2092
2093 gcc_assert (TREE_CODE (attrs) == STRING_CST);
2094 attrs_str = TREE_STRING_POINTER (attrs);
2095
2096 /* Return priority zero for default function. */
2097 if (strcmp (attrs_str, "default") == 0)
2098 return 0;
2099
2100 /* Handle arch= if specified. For priority, set it to be 1 more than
2101 the best instruction set the processor can handle. For instance, if
2102 there is a version for atom and a version for ssse3 (the highest ISA
2103 priority for atom), the atom version must be checked for dispatch
2104 before the ssse3 version. */
2105 if (strstr (attrs_str, "arch=") != NULL)
2106 {
2107 cl_target_option_save (&cur_target, &global_options);
2108 target_node
2109 = ix86_valid_target_attribute_tree (decl, attrs, &global_options,
2110 &global_options_set, 0);
2111
2112 gcc_assert (target_node);
2113 if (target_node == error_mark_node)
2114 return 0;
2115 new_target = TREE_TARGET_OPTION (target_node);
2116 gcc_assert (new_target);
2117
2118 if (new_target->arch_specified && new_target->arch > 0)
2119 {
2120 switch (new_target->arch)
2121 {
2122 case PROCESSOR_CORE2:
2123 arg_str = "core2";
2124 priority = P_PROC_SSSE3;
2125 break;
2126 case PROCESSOR_NEHALEM:
2127 if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_PCLMUL)
2128 {
2129 arg_str = "westmere";
2130 priority = P_PCLMUL;
2131 }
2132 else
2133 {
2134 /* We translate "arch=corei7" and "arch=nehalem" to
2135 "corei7" so that it will be mapped to M_INTEL_COREI7
2136 as cpu type to cover all M_INTEL_COREI7_XXXs. */
2137 arg_str = "corei7";
2138 priority = P_PROC_SSE4_2;
2139 }
2140 break;
2141 case PROCESSOR_SANDYBRIDGE:
2142 if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_F16C)
2143 arg_str = "ivybridge";
2144 else
2145 arg_str = "sandybridge";
2146 priority = P_PROC_AVX;
2147 break;
2148 case PROCESSOR_HASWELL:
2149 if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_ADX)
2150 arg_str = "broadwell";
2151 else
2152 arg_str = "haswell";
2153 priority = P_PROC_AVX2;
2154 break;
2155 case PROCESSOR_SKYLAKE:
2156 arg_str = "skylake";
2157 priority = P_PROC_AVX2;
2158 break;
2159 case PROCESSOR_SKYLAKE_AVX512:
2160 arg_str = "skylake-avx512";
2161 priority = P_PROC_AVX512F;
2162 break;
2163 case PROCESSOR_CANNONLAKE:
2164 arg_str = "cannonlake";
2165 priority = P_PROC_AVX512F;
2166 break;
2167 case PROCESSOR_ICELAKE_CLIENT:
2168 arg_str = "icelake-client";
2169 priority = P_PROC_AVX512F;
2170 break;
2171 case PROCESSOR_ICELAKE_SERVER:
2172 arg_str = "icelake-server";
2173 priority = P_PROC_AVX512F;
2174 break;
2175 case PROCESSOR_CASCADELAKE:
2176 arg_str = "cascadelake";
2177 priority = P_PROC_AVX512F;
2178 break;
a9fcfec3
HL		 2179 case PROCESSOR_TIGERLAKE:
2180 arg_str = "tigerlake";
2181 priority = P_PROC_AVX512F;
2182 break;
2183 case PROCESSOR_COOPERLAKE:
2184 arg_str = "cooperlake";
2185 priority = P_PROC_AVX512F;
2186 break;
2bf6d935
ML		 2187 case PROCESSOR_BONNELL:
2188 arg_str = "bonnell";
2189 priority = P_PROC_SSSE3;
2190 break;
2191 case PROCESSOR_KNL:
2192 arg_str = "knl";
2193 priority = P_PROC_AVX512F;
2194 break;
2195 case PROCESSOR_KNM:
2196 arg_str = "knm";
2197 priority = P_PROC_AVX512F;
2198 break;
2199 case PROCESSOR_SILVERMONT:
2200 arg_str = "silvermont";
2201 priority = P_PROC_SSE4_2;
2202 break;
2203 case PROCESSOR_GOLDMONT:
2204 arg_str = "goldmont";
2205 priority = P_PROC_SSE4_2;
2206 break;
2207 case PROCESSOR_GOLDMONT_PLUS:
2208 arg_str = "goldmont-plus";
2209 priority = P_PROC_SSE4_2;
2210 break;
2211 case PROCESSOR_TREMONT:
2212 arg_str = "tremont";
2213 priority = P_PROC_SSE4_2;
2214 break;
2215 case PROCESSOR_AMDFAM10:
2216 arg_str = "amdfam10h";
2217 priority = P_PROC_SSE4_A;
2218 break;
2219 case PROCESSOR_BTVER1:
2220 arg_str = "btver1";
2221 priority = P_PROC_SSE4_A;
2222 break;
2223 case PROCESSOR_BTVER2:
2224 arg_str = "btver2";
2225 priority = P_PROC_BMI;
2226 break;
2227 case PROCESSOR_BDVER1:
2228 arg_str = "bdver1";
2229 priority = P_PROC_XOP;
2230 break;
2231 case PROCESSOR_BDVER2:
2232 arg_str = "bdver2";
2233 priority = P_PROC_FMA;
2234 break;
2235 case PROCESSOR_BDVER3:
2236 arg_str = "bdver3";
2237 priority = P_PROC_FMA;
2238 break;
2239 case PROCESSOR_BDVER4:
2240 arg_str = "bdver4";
2241 priority = P_PROC_AVX2;
2242 break;
2243 case PROCESSOR_ZNVER1:
2244 arg_str = "znver1";
2245 priority = P_PROC_AVX2;
2246 break;
2247 case PROCESSOR_ZNVER2:
2248 arg_str = "znver2";
2249 priority = P_PROC_AVX2;
2250 break;
2251 }
2252 }
2253
2254 cl_target_option_restore (&global_options, &cur_target);
2255
2256 if (predicate_list && arg_str == NULL)
2257 {
2258 error_at (DECL_SOURCE_LOCATION (decl),
2259 "no dispatcher found for the versioning attributes");
2260 return 0;
2261 }
2262
2263 if (predicate_list)
2264 {
2265 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_IS];
2266 /* For a C string literal the length includes the trailing NULL. */
2267 predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str);
2268 predicate_chain = tree_cons (predicate_decl, predicate_arg,
2269 predicate_chain);
2270 }
2271 }
2272
2273 /* Process feature name. */
2274 tok_str = (char *) xmalloc (strlen (attrs_str) + 1);
2275 strcpy (tok_str, attrs_str);
2276 token = strtok (tok_str, ",");
2277 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
2278
2279 while (token != NULL)
2280 {
2281 /* Do not process "arch=" */
2282 if (strncmp (token, "arch=", 5) == 0)
2283 {
2284 token = strtok (NULL, ",");
2285 continue;
2286 }
2287 for (i = 0; i < NUM_FEATURES; ++i)
2288 {
2289 if (strcmp (token, isa_names_table[i].name) == 0)
2290 {
2291 if (predicate_list)
2292 {
2293 predicate_arg = build_string_literal (
2294 strlen (isa_names_table[i].name) + 1,
2295 isa_names_table[i].name);
2296 predicate_chain = tree_cons (predicate_decl, predicate_arg,
2297 predicate_chain);
2298 }
2299 /* Find the maximum priority feature. */
2300 if (isa_names_table[i].priority > priority)
2301 priority = isa_names_table[i].priority;
2302
2303 break;
2304 }
2305 }
2306 if (predicate_list && priority == P_ZERO)
2307 {
2308 error_at (DECL_SOURCE_LOCATION (decl),
2309 "ISA %qs is not supported in %<target%> attribute, "
2310 "use %<arch=%> syntax", token);
2311 return 0;
2312 }
2313 token = strtok (NULL, ",");
2314 }
2315 free (tok_str);
2316
2317 if (predicate_list && predicate_chain == NULL_TREE)
2318 {
2319 error_at (DECL_SOURCE_LOCATION (decl),
2320 "no dispatcher found for the versioning attributes: %s",
2321 attrs_str);
2322 return 0;
2323 }
2324 else if (predicate_list)
2325 {
2326 predicate_chain = nreverse (predicate_chain);
2327 *predicate_list = predicate_chain;
2328 }
2329
2330 return priority;
2331}
2332
2333/* This builds the processor_model struct type defined in
2334 libgcc/config/i386/cpuinfo.c */
2335
2336static tree
2337build_processor_model_struct (void)
2338{
2339 const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
2340 "__cpu_features"};
2341 tree field = NULL_TREE, field_chain = NULL_TREE;
2342 int i;
2343 tree type = make_node (RECORD_TYPE);
2344
2345 /* The first 3 fields are unsigned int. */
2346 for (i = 0; i < 3; ++i)
2347 {
2348 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2349 get_identifier (field_name[i]), unsigned_type_node);
2350 if (field_chain != NULL_TREE)
2351 DECL_CHAIN (field) = field_chain;
2352 field_chain = field;
2353 }
2354
2355 /* The last field is an array of unsigned integers of size one. */
2356 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2357 get_identifier (field_name[3]),
2358 build_array_type (unsigned_type_node,
2359 build_index_type (size_one_node)));
2360 if (field_chain != NULL_TREE)
2361 DECL_CHAIN (field) = field_chain;
2362 field_chain = field;
2363
2364 finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
2365 return type;
2366}
2367
2368/* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
2369
2370static tree
2371make_var_decl (tree type, const char *name)
2372{
2373 tree new_decl;
2374
2375 new_decl = build_decl (UNKNOWN_LOCATION,
2376 VAR_DECL,
2377 get_identifier(name),
2378 type);
2379
2380 DECL_EXTERNAL (new_decl) = 1;
2381 TREE_STATIC (new_decl) = 1;
2382 TREE_PUBLIC (new_decl) = 1;
2383 DECL_INITIAL (new_decl) = 0;
2384 DECL_ARTIFICIAL (new_decl) = 0;
2385 DECL_PRESERVE_P (new_decl) = 1;
2386
2387 make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
2388 assemble_variable (new_decl, 0, 0, 0);
2389
2390 return new_decl;
2391}
2392
2393/* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
2394 into an integer defined in libgcc/config/i386/cpuinfo.c */
2395
2396tree
2397fold_builtin_cpu (tree fndecl, tree *args)
2398{
2399 unsigned int i;
4d732405
RS		 2400 enum ix86_builtins fn_code
2401 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl);
2bf6d935
ML		 2402 tree param_string_cst = NULL;
2403
2404 tree __processor_model_type = build_processor_model_struct ();
2405 tree __cpu_model_var = make_var_decl (__processor_model_type,
2406 "__cpu_model");
2407
2408
2409 varpool_node::add (__cpu_model_var);
2410
2411 gcc_assert ((args != NULL) && (*args != NULL));
2412
2413 param_string_cst = *args;
2414 while (param_string_cst
2415 && TREE_CODE (param_string_cst) != STRING_CST)
2416 {
2417 /* *args must be a expr that can contain other EXPRS leading to a
2418 STRING_CST. */
2419 if (!EXPR_P (param_string_cst))
2420 {
2421 error ("parameter to builtin must be a string constant or literal");
2422 return integer_zero_node;
2423 }
2424 param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
2425 }
2426
2427 gcc_assert (param_string_cst);
2428
2429 if (fn_code == IX86_BUILTIN_CPU_IS)
2430 {
2431 tree ref;
2432 tree field;
2433 tree final;
2434
2435 unsigned int field_val = 0;
2436 unsigned int NUM_ARCH_NAMES
2437 = sizeof (arch_names_table) / sizeof (struct _arch_names_table);
2438
2439 for (i = 0; i < NUM_ARCH_NAMES; i++)
2440 if (strcmp (arch_names_table[i].name,
2441 TREE_STRING_POINTER (param_string_cst)) == 0)
2442 break;
2443
2444 if (i == NUM_ARCH_NAMES)
2445 {
2446 error ("parameter to builtin not valid: %s",
2447 TREE_STRING_POINTER (param_string_cst));
2448 return integer_zero_node;
2449 }
2450
2451 field = TYPE_FIELDS (__processor_model_type);
2452 field_val = arch_names_table[i].model;
2453
2454 /* CPU types are stored in the next field. */
2455 if (field_val > M_CPU_TYPE_START
2456 && field_val < M_CPU_SUBTYPE_START)
2457 {
2458 field = DECL_CHAIN (field);
2459 field_val -= M_CPU_TYPE_START;
2460 }
2461
2462 /* CPU subtypes are stored in the next field. */
2463 if (field_val > M_CPU_SUBTYPE_START)
2464 {
2465 field = DECL_CHAIN ( DECL_CHAIN (field));
2466 field_val -= M_CPU_SUBTYPE_START;
2467 }
2468
2469 /* Get the appropriate field in __cpu_model. */
2470 ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
2471 field, NULL_TREE);
2472
2473 /* Check the value. */
2474 final = build2 (EQ_EXPR, unsigned_type_node, ref,
2475 build_int_cstu (unsigned_type_node, field_val));
2476 return build1 (CONVERT_EXPR, integer_type_node, final);
2477 }
2478 else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
2479 {
2480 tree ref;
2481 tree array_elt;
2482 tree field;
2483 tree final;
2484
2485 unsigned int field_val = 0;
2486 unsigned int NUM_ISA_NAMES
2487 = sizeof (isa_names_table) / sizeof (struct _isa_names_table);
2488
2489 for (i = 0; i < NUM_ISA_NAMES; i++)
2490 if (strcmp (isa_names_table[i].name,
2491 TREE_STRING_POINTER (param_string_cst)) == 0)
2492 break;
2493
2494 if (i == NUM_ISA_NAMES)
2495 {
2496 error ("parameter to builtin not valid: %s",
2497 TREE_STRING_POINTER (param_string_cst));
2498 return integer_zero_node;
2499 }
2500
2501 if (isa_names_table[i].feature >= 32)
2502 {
2503 tree __cpu_features2_var = make_var_decl (unsigned_type_node,
2504 "__cpu_features2");
2505
2506 varpool_node::add (__cpu_features2_var);
2507 field_val = (1U << (isa_names_table[i].feature - 32));
2508 /* Return __cpu_features2 & field_val */
2509 final = build2 (BIT_AND_EXPR, unsigned_type_node,
2510 __cpu_features2_var,
2511 build_int_cstu (unsigned_type_node, field_val));
2512 return build1 (CONVERT_EXPR, integer_type_node, final);
2513 }
2514
2515 field = TYPE_FIELDS (__processor_model_type);
2516 /* Get the last field, which is __cpu_features. */
2517 while (DECL_CHAIN (field))
2518 field = DECL_CHAIN (field);
2519
2520 /* Get the appropriate field: __cpu_model.__cpu_features */
2521 ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var,
2522 field, NULL_TREE);
2523
2524 /* Access the 0th element of __cpu_features array. */
2525 array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
2526 integer_zero_node, NULL_TREE, NULL_TREE);
2527
2528 field_val = (1U << isa_names_table[i].feature);
2529 /* Return __cpu_model.__cpu_features[0] & field_val */
2530 final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
2531 build_int_cstu (unsigned_type_node, field_val));
2532 return build1 (CONVERT_EXPR, integer_type_node, final);
2533 }
2534 gcc_unreachable ();
2535}
2536
2537#include "gt-i386-builtins.h"
Mirror of https://gcc.gnu.org/git/gcc.git