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i386: Fix up handling of target attribute [PR101180]
[thirdparty/gcc.git] / gcc / config / i386 / i386-options.c
CommitLineData
99dee823 1/* Copyright (C) 1988-2021 Free Software Foundation, Inc.
2bf6d935
ML		 2
3This file is part of GCC.
4
5GCC is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 3, or (at your option)
8any later version.
9
10GCC is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with GCC; see the file COPYING3. If not see
17<http://www.gnu.org/licenses/>. */
18
19#define IN_TARGET_CODE 1
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "backend.h"
25#include "rtl.h"
26#include "tree.h"
27#include "memmodel.h"
28#include "gimple.h"
29#include "cfghooks.h"
30#include "cfgloop.h"
31#include "df.h"
32#include "tm_p.h"
33#include "stringpool.h"
34#include "expmed.h"
35#include "optabs.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "cgraph.h"
40#include "diagnostic.h"
41#include "cfgbuild.h"
42#include "alias.h"
43#include "fold-const.h"
44#include "attribs.h"
45#include "calls.h"
46#include "stor-layout.h"
47#include "varasm.h"
48#include "output.h"
49#include "insn-attr.h"
50#include "flags.h"
51#include "except.h"
52#include "explow.h"
53#include "expr.h"
54#include "cfgrtl.h"
55#include "common/common-target.h"
56#include "langhooks.h"
57#include "reload.h"
58#include "gimplify.h"
59#include "dwarf2.h"
60#include "tm-constrs.h"
2bf6d935
ML		 61#include "cselib.h"
62#include "sched-int.h"
63#include "opts.h"
64#include "tree-pass.h"
65#include "context.h"
66#include "pass_manager.h"
67#include "target-globals.h"
68#include "gimple-iterator.h"
69#include "tree-vectorizer.h"
70#include "shrink-wrap.h"
71#include "builtins.h"
72#include "rtl-iter.h"
73#include "tree-iterator.h"
74#include "dbgcnt.h"
75#include "case-cfn-macros.h"
76#include "dojump.h"
77#include "fold-const-call.h"
78#include "tree-vrp.h"
79#include "tree-ssanames.h"
80#include "selftest.h"
81#include "selftest-rtl.h"
82#include "print-rtl.h"
83#include "intl.h"
84#include "ifcvt.h"
85#include "symbol-summary.h"
86#include "ipa-prop.h"
87#include "ipa-fnsummary.h"
88#include "wide-int-bitmask.h"
89#include "tree-vector-builder.h"
90#include "debug.h"
91#include "dwarf2out.h"
92#include "i386-options.h"
93
94#include "x86-tune-costs.h"
95
96#ifndef SUBTARGET32_DEFAULT_CPU
97#define SUBTARGET32_DEFAULT_CPU "i386"
98#endif
99
100/* Processor feature/optimization bitmasks. */
37876976
JJ		 101#define m_NONE HOST_WIDE_INT_0U
102#define m_ALL (~HOST_WIDE_INT_0U)
2bf6d935
ML		 103#define m_386 (HOST_WIDE_INT_1U<<PROCESSOR_I386)
104#define m_486 (HOST_WIDE_INT_1U<<PROCESSOR_I486)
105#define m_PENT (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM)
106#define m_LAKEMONT (HOST_WIDE_INT_1U<<PROCESSOR_LAKEMONT)
107#define m_PPRO (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUMPRO)
108#define m_PENT4 (HOST_WIDE_INT_1U<<PROCESSOR_PENTIUM4)
109#define m_NOCONA (HOST_WIDE_INT_1U<<PROCESSOR_NOCONA)
110#define m_P4_NOCONA (m_PENT4 | m_NOCONA)
111#define m_CORE2 (HOST_WIDE_INT_1U<<PROCESSOR_CORE2)
112#define m_NEHALEM (HOST_WIDE_INT_1U<<PROCESSOR_NEHALEM)
113#define m_SANDYBRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_SANDYBRIDGE)
114#define m_HASWELL (HOST_WIDE_INT_1U<<PROCESSOR_HASWELL)
115#define m_BONNELL (HOST_WIDE_INT_1U<<PROCESSOR_BONNELL)
116#define m_SILVERMONT (HOST_WIDE_INT_1U<<PROCESSOR_SILVERMONT)
117#define m_KNL (HOST_WIDE_INT_1U<<PROCESSOR_KNL)
118#define m_KNM (HOST_WIDE_INT_1U<<PROCESSOR_KNM)
119#define m_SKYLAKE (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE)
120#define m_SKYLAKE_AVX512 (HOST_WIDE_INT_1U<<PROCESSOR_SKYLAKE_AVX512)
121#define m_CANNONLAKE (HOST_WIDE_INT_1U<<PROCESSOR_CANNONLAKE)
122#define m_ICELAKE_CLIENT (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_CLIENT)
123#define m_ICELAKE_SERVER (HOST_WIDE_INT_1U<<PROCESSOR_ICELAKE_SERVER)
124#define m_CASCADELAKE (HOST_WIDE_INT_1U<<PROCESSOR_CASCADELAKE)
a9fcfec3
HL		 125#define m_TIGERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_TIGERLAKE)
126#define m_COOPERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_COOPERLAKE)
ba9c87d3
CL		 127#define m_SAPPHIRERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_SAPPHIRERAPIDS)
128#define m_ALDERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ALDERLAKE)
c02c39fa 129#define m_ROCKETLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ROCKETLAKE)
2bf6d935 130#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
a9fcfec3 131 | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
c02c39fa
CL		 132 | m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS \
133 | m_ROCKETLAKE)
4f442a3b 134#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
2bf6d935
ML		 135#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
136#define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
137#define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT_PLUS)
138#define m_TREMONT (HOST_WIDE_INT_1U<<PROCESSOR_TREMONT)
139#define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
140
141#define m_GEODE (HOST_WIDE_INT_1U<<PROCESSOR_GEODE)
142#define m_K6 (HOST_WIDE_INT_1U<<PROCESSOR_K6)
143#define m_K6_GEODE (m_K6 | m_GEODE)
144#define m_K8 (HOST_WIDE_INT_1U<<PROCESSOR_K8)
145#define m_ATHLON (HOST_WIDE_INT_1U<<PROCESSOR_ATHLON)
146#define m_ATHLON_K8 (m_K8 | m_ATHLON)
147#define m_AMDFAM10 (HOST_WIDE_INT_1U<<PROCESSOR_AMDFAM10)
148#define m_BDVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER1)
149#define m_BDVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER2)
150#define m_BDVER3 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER3)
151#define m_BDVER4 (HOST_WIDE_INT_1U<<PROCESSOR_BDVER4)
152#define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1)
153#define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2)
3e2ae3ee 154#define m_ZNVER3 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER3)
2bf6d935
ML		 155#define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1)
156#define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2)
157#define m_BDVER (m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4)
158#define m_BTVER (m_BTVER1 | m_BTVER2)
3e2ae3ee 159#define m_ZNVER (m_ZNVER1 | m_ZNVER2 | m_ZNVER3)
2bf6d935
ML		 160#define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \
161 | m_ZNVER)
162
163#define m_GENERIC (HOST_WIDE_INT_1U<<PROCESSOR_GENERIC)
164
165const char* ix86_tune_feature_names[X86_TUNE_LAST] = {
166#undef DEF_TUNE
167#define DEF_TUNE(tune, name, selector) name,
168#include "x86-tune.def"
169#undef DEF_TUNE
170};
171
172/* Feature tests against the various tunings. */
173unsigned char ix86_tune_features[X86_TUNE_LAST];
174
175/* Feature tests against the various tunings used to create ix86_tune_features
176 based on the processor mask. */
177static unsigned HOST_WIDE_INT initial_ix86_tune_features[X86_TUNE_LAST] = {
178#undef DEF_TUNE
179#define DEF_TUNE(tune, name, selector) selector,
180#include "x86-tune.def"
181#undef DEF_TUNE
182};
183
184/* Feature tests against the various architecture variations. */
185unsigned char ix86_arch_features[X86_ARCH_LAST];
186
9ba66bf5
JJ		 187struct ix86_target_opts
188{
189 const char *option; /* option string */
190 HOST_WIDE_INT mask; /* isa mask options */
191};
192
193/* This table is ordered so that options like -msse4.2 that imply other
194 ISAs come first. Target string will be displayed in the same order. */
195static struct ix86_target_opts isa2_opts[] =
196{
8cf86e14
HL		 197 { "-mcx16", OPTION_MASK_ISA2_CX16 },
198 { "-mvaes", OPTION_MASK_ISA2_VAES },
199 { "-mrdpid", OPTION_MASK_ISA2_RDPID },
200 { "-mpconfig", OPTION_MASK_ISA2_PCONFIG },
201 { "-mwbnoinvd", OPTION_MASK_ISA2_WBNOINVD },
202 { "-mavx512vp2intersect", OPTION_MASK_ISA2_AVX512VP2INTERSECT },
203 { "-msgx", OPTION_MASK_ISA2_SGX },
204 { "-mavx5124vnniw", OPTION_MASK_ISA2_AVX5124VNNIW },
205 { "-mavx5124fmaps", OPTION_MASK_ISA2_AVX5124FMAPS },
206 { "-mhle", OPTION_MASK_ISA2_HLE },
207 { "-mmovbe", OPTION_MASK_ISA2_MOVBE },
208 { "-mclzero", OPTION_MASK_ISA2_CLZERO },
209 { "-mmwaitx", OPTION_MASK_ISA2_MWAITX },
d8c6cc2c 210 { "-mmwait", OPTION_MASK_ISA2_MWAIT },
8cf86e14
HL		 211 { "-mmovdir64b", OPTION_MASK_ISA2_MOVDIR64B },
212 { "-mwaitpkg", OPTION_MASK_ISA2_WAITPKG },
213 { "-mcldemote", OPTION_MASK_ISA2_CLDEMOTE },
214 { "-mptwrite", OPTION_MASK_ISA2_PTWRITE },
215 { "-mavx512bf16", OPTION_MASK_ISA2_AVX512BF16 },
366386c7 216 { "-menqcmd", OPTION_MASK_ISA2_ENQCMD },
1e47cb35 217 { "-mserialize", OPTION_MASK_ISA2_SERIALIZE },
5c609842 218 { "-mtsxldtrk", OPTION_MASK_ISA2_TSXLDTRK },
219 { "-mamx-tile", OPTION_MASK_ISA2_AMX_TILE },
220 { "-mamx-int8", OPTION_MASK_ISA2_AMX_INT8 },
299a53d7 221 { "-mamx-bf16", OPTION_MASK_ISA2_AMX_BF16 },
83927c63 222 { "-muintr", OPTION_MASK_ISA2_UINTR },
632a2f50 223 { "-mhreset", OPTION_MASK_ISA2_HRESET },
224 { "-mkl", OPTION_MASK_ISA2_KL },
ca813880 225 { "-mwidekl", OPTION_MASK_ISA2_WIDEKL },
a6841211
GX		 226 { "-mavxvnni", OPTION_MASK_ISA2_AVXVNNI },
227 { "-mavx512fp16", OPTION_MASK_ISA2_AVX512FP16 }
9ba66bf5
JJ		 228};
229static struct ix86_target_opts isa_opts[] =
230{
231 { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
232 { "-mavx512bitalg", OPTION_MASK_ISA_AVX512BITALG },
233 { "-mvpclmulqdq", OPTION_MASK_ISA_VPCLMULQDQ },
234 { "-mgfni", OPTION_MASK_ISA_GFNI },
235 { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
236 { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
237 { "-mavx512vbmi", OPTION_MASK_ISA_AVX512VBMI },
238 { "-mavx512ifma", OPTION_MASK_ISA_AVX512IFMA },
239 { "-mavx512vl", OPTION_MASK_ISA_AVX512VL },
240 { "-mavx512bw", OPTION_MASK_ISA_AVX512BW },
241 { "-mavx512dq", OPTION_MASK_ISA_AVX512DQ },
242 { "-mavx512er", OPTION_MASK_ISA_AVX512ER },
243 { "-mavx512pf", OPTION_MASK_ISA_AVX512PF },
244 { "-mavx512cd", OPTION_MASK_ISA_AVX512CD },
245 { "-mavx512f", OPTION_MASK_ISA_AVX512F },
246 { "-mavx2", OPTION_MASK_ISA_AVX2 },
247 { "-mfma", OPTION_MASK_ISA_FMA },
248 { "-mxop", OPTION_MASK_ISA_XOP },
249 { "-mfma4", OPTION_MASK_ISA_FMA4 },
250 { "-mf16c", OPTION_MASK_ISA_F16C },
251 { "-mavx", OPTION_MASK_ISA_AVX },
252/*{ "-msse4" OPTION_MASK_ISA_SSE4 }, */
253 { "-msse4.2", OPTION_MASK_ISA_SSE4_2 },
254 { "-msse4.1", OPTION_MASK_ISA_SSE4_1 },
255 { "-msse4a", OPTION_MASK_ISA_SSE4A },
256 { "-mssse3", OPTION_MASK_ISA_SSSE3 },
257 { "-msse3", OPTION_MASK_ISA_SSE3 },
258 { "-maes", OPTION_MASK_ISA_AES },
259 { "-msha", OPTION_MASK_ISA_SHA },
260 { "-mpclmul", OPTION_MASK_ISA_PCLMUL },
261 { "-msse2", OPTION_MASK_ISA_SSE2 },
262 { "-msse", OPTION_MASK_ISA_SSE },
263 { "-m3dnowa", OPTION_MASK_ISA_3DNOW_A },
264 { "-m3dnow", OPTION_MASK_ISA_3DNOW },
265 { "-mmmx", OPTION_MASK_ISA_MMX },
266 { "-mrtm", OPTION_MASK_ISA_RTM },
267 { "-mprfchw", OPTION_MASK_ISA_PRFCHW },
268 { "-mrdseed", OPTION_MASK_ISA_RDSEED },
269 { "-madx", OPTION_MASK_ISA_ADX },
270 { "-mprefetchwt1", OPTION_MASK_ISA_PREFETCHWT1 },
271 { "-mclflushopt", OPTION_MASK_ISA_CLFLUSHOPT },
272 { "-mxsaves", OPTION_MASK_ISA_XSAVES },
273 { "-mxsavec", OPTION_MASK_ISA_XSAVEC },
274 { "-mxsaveopt", OPTION_MASK_ISA_XSAVEOPT },
275 { "-mxsave", OPTION_MASK_ISA_XSAVE },
276 { "-mabm", OPTION_MASK_ISA_ABM },
277 { "-mbmi", OPTION_MASK_ISA_BMI },
278 { "-mbmi2", OPTION_MASK_ISA_BMI2 },
279 { "-mlzcnt", OPTION_MASK_ISA_LZCNT },
280 { "-mtbm", OPTION_MASK_ISA_TBM },
281 { "-mpopcnt", OPTION_MASK_ISA_POPCNT },
282 { "-msahf", OPTION_MASK_ISA_SAHF },
283 { "-mcrc32", OPTION_MASK_ISA_CRC32 },
284 { "-mfsgsbase", OPTION_MASK_ISA_FSGSBASE },
285 { "-mrdrnd", OPTION_MASK_ISA_RDRND },
286 { "-mpku", OPTION_MASK_ISA_PKU },
287 { "-mlwp", OPTION_MASK_ISA_LWP },
288 { "-mfxsr", OPTION_MASK_ISA_FXSR },
289 { "-mclwb", OPTION_MASK_ISA_CLWB },
290 { "-mshstk", OPTION_MASK_ISA_SHSTK },
291 { "-mmovdiri", OPTION_MASK_ISA_MOVDIRI }
292};
293
294/* Return 1 if TRAIT NAME is present in the OpenMP context's
295 device trait set, return 0 if not present in any OpenMP context in the
296 whole translation unit, or -1 if not present in the current OpenMP context
297 but might be present in another OpenMP context in the same TU. */
298
299int
300ix86_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
301 const char *name)
302{
303 switch (trait)
304 {
305 case omp_device_kind:
306 return strcmp (name, "cpu") == 0;
307 case omp_device_arch:
bb75b22a
TS		 308#ifdef ACCEL_COMPILER
309 if (strcmp (name, "intel_mic") == 0)
310 return 1;
311#endif
9ba66bf5
JJ		 312 if (strcmp (name, "x86") == 0)
313 return 1;
314 if (TARGET_64BIT)
315 {
316 if (TARGET_X32)
317 return strcmp (name, "x32") == 0;
318 else
319 return strcmp (name, "x86_64") == 0;
320 }
321 if (strcmp (name, "ia32") == 0 || strcmp (name, "i386") == 0)
322 return 1;
323 if (strcmp (name, "i486") == 0)
324 return ix86_arch != PROCESSOR_I386 ? 1 : -1;
325 if (strcmp (name, "i586") == 0)
326 return (ix86_arch != PROCESSOR_I386
327 && ix86_arch != PROCESSOR_I486) ? 1 : -1;
328 if (strcmp (name, "i686") == 0)
329 return (ix86_arch != PROCESSOR_I386
330 && ix86_arch != PROCESSOR_I486
331 && ix86_arch != PROCESSOR_LAKEMONT
332 && ix86_arch != PROCESSOR_PENTIUM) ? 1 : -1;
333 return 0;
334 case omp_device_isa:
335 for (int i = 0; i < 2; i++)
336 {
337 struct ix86_target_opts *opts = i ? isa2_opts : isa_opts;
338 size_t nopts = i ? ARRAY_SIZE (isa2_opts) : ARRAY_SIZE (isa_opts);
339 HOST_WIDE_INT mask = i ? ix86_isa_flags2 : ix86_isa_flags;
340 for (size_t n = 0; n < nopts; n++)
341 {
aa16689e 342 /* Handle sse4 as an alias to sse4.2. */
9ba66bf5
JJ		 343 if (opts[n].mask == OPTION_MASK_ISA_SSE4_2)
344 {
9ba66bf5
JJ		 345 if (strcmp (name, "sse4") == 0)
346 return (mask & opts[n].mask) != 0 ? 1 : -1;
347 }
aa16689e 348 if (strcmp (name, opts[n].option + 2) == 0)
9ba66bf5
JJ		 349 return (mask & opts[n].mask) != 0 ? 1 : -1;
350 }
351 }
352 return 0;
353 default:
354 gcc_unreachable ();
355 }
356}
357
2bf6d935
ML		 358/* Return a string that documents the current -m options. The caller is
359 responsible for freeing the string. */
360
361char *
362ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
363 int flags, int flags2,
364 const char *arch, const char *tune,
46e6341f
JJ		 365 enum fpmath_unit fpmath,
366 enum prefer_vector_width pvw,
367 bool add_nl_p, bool add_abi_p)
2bf6d935 368{
2bf6d935
ML		 369 /* Flag options. */
370 static struct ix86_target_opts flag_opts[] =
371 {
372 { "-m128bit-long-double", MASK_128BIT_LONG_DOUBLE },
373 { "-mlong-double-128", MASK_LONG_DOUBLE_128 },
374 { "-mlong-double-64", MASK_LONG_DOUBLE_64 },
375 { "-m80387", MASK_80387 },
376 { "-maccumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS },
377 { "-malign-double", MASK_ALIGN_DOUBLE },
378 { "-mcld", MASK_CLD },
379 { "-mfp-ret-in-387", MASK_FLOAT_RETURNS },
380 { "-mieee-fp", MASK_IEEE_FP },
381 { "-minline-all-stringops", MASK_INLINE_ALL_STRINGOPS },
382 { "-minline-stringops-dynamically", MASK_INLINE_STRINGOPS_DYNAMICALLY },
383 { "-mms-bitfields", MASK_MS_BITFIELD_LAYOUT },
384 { "-mno-align-stringops", MASK_NO_ALIGN_STRINGOPS },
385 { "-mno-fancy-math-387", MASK_NO_FANCY_MATH_387 },
386 { "-mno-push-args", MASK_NO_PUSH_ARGS },
387 { "-mno-red-zone", MASK_NO_RED_ZONE },
388 { "-momit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER },
389 { "-mrecip", MASK_RECIP },
390 { "-mrtd", MASK_RTD },
391 { "-msseregparm", MASK_SSEREGPARM },
392 { "-mstack-arg-probe", MASK_STACK_PROBE },
393 { "-mtls-direct-seg-refs", MASK_TLS_DIRECT_SEG_REFS },
394 { "-mvect8-ret-in-mem", MASK_VECT8_RETURNS },
395 { "-m8bit-idiv", MASK_USE_8BIT_IDIV },
396 { "-mvzeroupper", MASK_VZEROUPPER },
397 { "-mstv", MASK_STV },
398 { "-mavx256-split-unaligned-load", MASK_AVX256_SPLIT_UNALIGNED_LOAD },
399 { "-mavx256-split-unaligned-store", MASK_AVX256_SPLIT_UNALIGNED_STORE },
4d281ff7
HW		 400 { "-mcall-ms2sysv-xlogues", MASK_CALL_MS2SYSV_XLOGUES },
401 { "-mrelax-cmpxchg-loop", MASK_RELAX_CMPXCHG_LOOP }
2bf6d935
ML		 402 };
403
404 /* Additional flag options. */
405 static struct ix86_target_opts flag2_opts[] =
406 {
407 { "-mgeneral-regs-only", OPTION_MASK_GENERAL_REGS_ONLY }
408 };
409
410 const char *opts[ARRAY_SIZE (isa_opts) + ARRAY_SIZE (isa2_opts)
411 + ARRAY_SIZE (flag_opts) + ARRAY_SIZE (flag2_opts) + 6][2];
412
413 char isa_other[40];
414 char isa2_other[40];
415 char flags_other[40];
416 char flags2_other[40];
417 unsigned num = 0;
418 unsigned i, j;
419 char *ret;
420 char *ptr;
421 size_t len;
422 size_t line_len;
423 size_t sep_len;
424 const char *abi;
425
426 memset (opts, '\0', sizeof (opts));
427
428 /* Add -march= option. */
429 if (arch)
430 {
431 opts[num][0] = "-march=";
432 opts[num++][1] = arch;
433 }
434
435 /* Add -mtune= option. */
436 if (tune)
437 {
438 opts[num][0] = "-mtune=";
439 opts[num++][1] = tune;
440 }
441
442 /* Add -m32/-m64/-mx32. */
443 if (add_abi_p)
444 {
445 if ((isa & OPTION_MASK_ISA_64BIT) != 0)
446 {
447 if ((isa & OPTION_MASK_ABI_64) != 0)
448 abi = "-m64";
449 else
450 abi = "-mx32";
451 }
452 else
453 abi = "-m32";
454 opts[num++][0] = abi;
455 }
456 isa &= ~(OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
457
458 /* Pick out the options in isa2 options. */
459 for (i = 0; i < ARRAY_SIZE (isa2_opts); i++)
460 {
461 if ((isa2 & isa2_opts[i].mask) != 0)
462 {
463 opts[num++][0] = isa2_opts[i].option;
464 isa2 &= ~ isa2_opts[i].mask;
465 }
466 }
467
468 if (isa2 && add_nl_p)
469 {
470 opts[num++][0] = isa2_other;
471 sprintf (isa2_other, "(other isa2: %#" HOST_WIDE_INT_PRINT "x)", isa2);
472 }
473
474 /* Pick out the options in isa options. */
475 for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
476 {
477 if ((isa & isa_opts[i].mask) != 0)
478 {
479 opts[num++][0] = isa_opts[i].option;
480 isa &= ~ isa_opts[i].mask;
481 }
482 }
483
484 if (isa && add_nl_p)
485 {
486 opts[num++][0] = isa_other;
487 sprintf (isa_other, "(other isa: %#" HOST_WIDE_INT_PRINT "x)", isa);
488 }
489
490 /* Add flag options. */
491 for (i = 0; i < ARRAY_SIZE (flag_opts); i++)
492 {
493 if ((flags & flag_opts[i].mask) != 0)
494 {
495 opts[num++][0] = flag_opts[i].option;
496 flags &= ~ flag_opts[i].mask;
497 }
498 }
499
500 if (flags && add_nl_p)
501 {
502 opts[num++][0] = flags_other;
503 sprintf (flags_other, "(other flags: %#x)", flags);
504 }
505
506 /* Add additional flag options. */
507 for (i = 0; i < ARRAY_SIZE (flag2_opts); i++)
508 {
509 if ((flags2 & flag2_opts[i].mask) != 0)
510 {
511 opts[num++][0] = flag2_opts[i].option;
512 flags2 &= ~ flag2_opts[i].mask;
513 }
514 }
515
516 if (flags2 && add_nl_p)
517 {
518 opts[num++][0] = flags2_other;
519 sprintf (flags2_other, "(other flags2: %#x)", flags2);
520 }
521
46e6341f 522 /* Add -mfpmath= option. */
2bf6d935
ML		 523 if (fpmath)
524 {
525 opts[num][0] = "-mfpmath=";
526 switch ((int) fpmath)
527 {
528 case FPMATH_387:
529 opts[num++][1] = "387";
530 break;
531
532 case FPMATH_SSE:
533 opts[num++][1] = "sse";
534 break;
535
536 case FPMATH_387 | FPMATH_SSE:
537 opts[num++][1] = "sse+387";
538 break;
539
540 default:
541 gcc_unreachable ();
542 }
543 }
544
46e6341f
JJ		 545 /* Add -mprefer-vector-width= option. */
546 if (pvw)
547 {
548 opts[num][0] = "-mprefer-vector-width=";
549 switch ((int) pvw)
550 {
551 case PVW_AVX128:
552 opts[num++][1] = "128";
553 break;
554
555 case PVW_AVX256:
556 opts[num++][1] = "256";
557 break;
558
559 case PVW_AVX512:
560 opts[num++][1] = "512";
561 break;
562
563 default:
564 gcc_unreachable ();
565 }
566 }
567
2bf6d935
ML		 568 /* Any options? */
569 if (num == 0)
570 return NULL;
571
572 gcc_assert (num < ARRAY_SIZE (opts));
573
574 /* Size the string. */
575 len = 0;
576 sep_len = (add_nl_p) ? 3 : 1;
577 for (i = 0; i < num; i++)
578 {
579 len += sep_len;
580 for (j = 0; j < 2; j++)
581 if (opts[i][j])
582 len += strlen (opts[i][j]);
583 }
584
585 /* Build the string. */
586 ret = ptr = (char *) xmalloc (len);
587 line_len = 0;
588
589 for (i = 0; i < num; i++)
590 {
591 size_t len2[2];
592
593 for (j = 0; j < 2; j++)
594 len2[j] = (opts[i][j]) ? strlen (opts[i][j]) : 0;
595
596 if (i != 0)
597 {
598 *ptr++ = ' ';
599 line_len++;
600
601 if (add_nl_p && line_len + len2[0] + len2[1] > 70)
602 {
603 *ptr++ = '\\';
604 *ptr++ = '\n';
605 line_len = 0;
606 }
607 }
608
609 for (j = 0; j < 2; j++)
610 if (opts[i][j])
611 {
612 memcpy (ptr, opts[i][j], len2[j]);
613 ptr += len2[j];
614 line_len += len2[j];
615 }
616 }
617
618 *ptr = '\0';
619 gcc_assert (ret + len >= ptr);
620
621 return ret;
622}
623
624/* Function that is callable from the debugger to print the current
625 options. */
626void ATTRIBUTE_UNUSED
627ix86_debug_options (void)
628{
629 char *opts = ix86_target_string (ix86_isa_flags, ix86_isa_flags2,
630 target_flags, ix86_target_flags,
46e6341f
JJ		 631 ix86_arch_string, ix86_tune_string,
632 ix86_fpmath, prefer_vector_width_type,
633 true, true);
2bf6d935
ML		 634
635 if (opts)
636 {
637 fprintf (stderr, "%s\n\n", opts);
638 free (opts);
639 }
640 else
641 fputs ("<no options>\n\n", stderr);
642
643 return;
644}
645
646/* Save the current options */
647
648void
649ix86_function_specific_save (struct cl_target_option *ptr,
ba948b37
JJ		 650 struct gcc_options *opts,
651 struct gcc_options */* opts_set */)
2bf6d935
ML		 652{
653 ptr->arch = ix86_arch;
654 ptr->schedule = ix86_schedule;
08a4adcf 655 ptr->prefetch_sse = ix86_prefetch_sse;
2bf6d935
ML		 656 ptr->tune = ix86_tune;
657 ptr->branch_cost = ix86_branch_cost;
658 ptr->tune_defaulted = ix86_tune_defaulted;
659 ptr->arch_specified = ix86_arch_specified;
660 ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
661 ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
662 ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
663 ptr->x_ix86_arch_string = opts->x_ix86_arch_string;
664 ptr->x_ix86_tune_string = opts->x_ix86_tune_string;
2bf6d935
ML		 665 ptr->x_ix86_abi = opts->x_ix86_abi;
666 ptr->x_ix86_asm_dialect = opts->x_ix86_asm_dialect;
667 ptr->x_ix86_branch_cost = opts->x_ix86_branch_cost;
668 ptr->x_ix86_dump_tunes = opts->x_ix86_dump_tunes;
669 ptr->x_ix86_force_align_arg_pointer = opts->x_ix86_force_align_arg_pointer;
670 ptr->x_ix86_force_drap = opts->x_ix86_force_drap;
2bf6d935 671 ptr->x_ix86_recip_name = opts->x_ix86_recip_name;
2bf6d935
ML		 672 ptr->x_ix86_section_threshold = opts->x_ix86_section_threshold;
673 ptr->x_ix86_sse2avx = opts->x_ix86_sse2avx;
674 ptr->x_ix86_stack_protector_guard = opts->x_ix86_stack_protector_guard;
675 ptr->x_ix86_stringop_alg = opts->x_ix86_stringop_alg;
676 ptr->x_ix86_tls_dialect = opts->x_ix86_tls_dialect;
677 ptr->x_ix86_tune_ctrl_string = opts->x_ix86_tune_ctrl_string;
678 ptr->x_ix86_tune_memcpy_strategy = opts->x_ix86_tune_memcpy_strategy;
679 ptr->x_ix86_tune_memset_strategy = opts->x_ix86_tune_memset_strategy;
680 ptr->x_ix86_tune_no_default = opts->x_ix86_tune_no_default;
2bf6d935
ML		 681
682 /* The fields are char but the variables are not; make sure the
683 values fit in the fields. */
684 gcc_assert (ptr->arch == ix86_arch);
685 gcc_assert (ptr->schedule == ix86_schedule);
686 gcc_assert (ptr->tune == ix86_tune);
687 gcc_assert (ptr->branch_cost == ix86_branch_cost);
688}
689
690/* Feature tests against the various architecture variations, used to create
691 ix86_arch_features based on the processor mask. */
692static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
693 /* X86_ARCH_CMOV: Conditional move was added for pentiumpro. */
694 ~(m_386 | m_486 | m_PENT | m_LAKEMONT | m_K6),
695
696 /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486. */
697 ~m_386,
698
699 /* X86_ARCH_CMPXCHG8B: Compare and exchange 8 bytes was added for pentium. */
700 ~(m_386 | m_486),
701
702 /* X86_ARCH_XADD: Exchange and add was added for 80486. */
703 ~m_386,
704
705 /* X86_ARCH_BSWAP: Byteswap was added for 80486. */
706 ~m_386,
707};
708
709/* This table must be in sync with enum processor_type in i386.h. */
710static const struct processor_costs *processor_cost_table[] =
711{
712 &generic_cost,
713 &i386_cost,
714 &i486_cost,
715 &pentium_cost,
716 &lakemont_cost,
717 &pentiumpro_cost,
718 &pentium4_cost,
719 &nocona_cost,
720 &core_cost,
721 &core_cost,
722 &core_cost,
723 &core_cost,
724 &atom_cost,
725 &slm_cost,
726 &slm_cost,
727 &slm_cost,
c3a2437f 728 &tremont_cost,
2bf6d935
ML		 729 &slm_cost,
730 &slm_cost,
731 &skylake_cost,
732 &skylake_cost,
bf24f4ec
L		 733 &icelake_cost,
734 &icelake_cost,
735 &icelake_cost,
2bf6d935 736 &skylake_cost,
bf24f4ec 737 &icelake_cost,
2bf6d935 738 &skylake_cost,
bf24f4ec 739 &icelake_cost,
4f442a3b 740 &alderlake_cost,
2cde2d62 741 &icelake_cost,
2bf6d935
ML		 742 &intel_cost,
743 &geode_cost,
744 &k6_cost,
745 &athlon_cost,
746 &k8_cost,
747 &amdfam10_cost,
748 &bdver_cost,
749 &bdver_cost,
750 &bdver_cost,
751 &bdver_cost,
752 &btver1_cost,
753 &btver2_cost,
754 &znver1_cost,
3e2ae3ee 755 &znver2_cost,
5b32a181 756 &znver3_cost
2bf6d935
ML		 757};
758
759/* Guarantee that the array is aligned with enum processor_type. */
760STATIC_ASSERT (ARRAY_SIZE (processor_cost_table) == PROCESSOR_max);
761
762static bool
763ix86_option_override_internal (bool main_args_p,
764 struct gcc_options *opts,
765 struct gcc_options *opts_set);
766static void
1e964774
L		 767set_ix86_tune_features (struct gcc_options *opts,
768 enum processor_type ix86_tune, bool dump);
2bf6d935
ML		 769
770/* Restore the current options */
771
772void
773ix86_function_specific_restore (struct gcc_options *opts,
ba948b37 774 struct gcc_options */* opts_set */,
2bf6d935
ML		 775 struct cl_target_option *ptr)
776{
777 enum processor_type old_tune = ix86_tune;
778 enum processor_type old_arch = ix86_arch;
779 unsigned HOST_WIDE_INT ix86_arch_mask;
780 int i;
781
782 /* We don't change -fPIC. */
783 opts->x_flag_pic = flag_pic;
784
785 ix86_arch = (enum processor_type) ptr->arch;
786 ix86_schedule = (enum attr_cpu) ptr->schedule;
787 ix86_tune = (enum processor_type) ptr->tune;
08a4adcf 788 ix86_prefetch_sse = ptr->prefetch_sse;
2bf6d935
ML		 789 ix86_tune_defaulted = ptr->tune_defaulted;
790 ix86_arch_specified = ptr->arch_specified;
791 opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
792 opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
793 opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
794 opts->x_ix86_arch_string = ptr->x_ix86_arch_string;
795 opts->x_ix86_tune_string = ptr->x_ix86_tune_string;
2bf6d935
ML		 796 opts->x_ix86_abi = ptr->x_ix86_abi;
797 opts->x_ix86_asm_dialect = ptr->x_ix86_asm_dialect;
798 opts->x_ix86_branch_cost = ptr->x_ix86_branch_cost;
799 opts->x_ix86_dump_tunes = ptr->x_ix86_dump_tunes;
800 opts->x_ix86_force_align_arg_pointer = ptr->x_ix86_force_align_arg_pointer;
801 opts->x_ix86_force_drap = ptr->x_ix86_force_drap;
2bf6d935 802 opts->x_ix86_recip_name = ptr->x_ix86_recip_name;
2bf6d935
ML		 803 opts->x_ix86_section_threshold = ptr->x_ix86_section_threshold;
804 opts->x_ix86_sse2avx = ptr->x_ix86_sse2avx;
805 opts->x_ix86_stack_protector_guard = ptr->x_ix86_stack_protector_guard;
806 opts->x_ix86_stringop_alg = ptr->x_ix86_stringop_alg;
807 opts->x_ix86_tls_dialect = ptr->x_ix86_tls_dialect;
808 opts->x_ix86_tune_ctrl_string = ptr->x_ix86_tune_ctrl_string;
809 opts->x_ix86_tune_memcpy_strategy = ptr->x_ix86_tune_memcpy_strategy;
810 opts->x_ix86_tune_memset_strategy = ptr->x_ix86_tune_memset_strategy;
811 opts->x_ix86_tune_no_default = ptr->x_ix86_tune_no_default;
2bf6d935
ML		 812 ix86_tune_cost = processor_cost_table[ix86_tune];
813 /* TODO: ix86_cost should be chosen at instruction or function granuality
814 so for cold code we use size_cost even in !optimize_size compilation. */
815 if (opts->x_optimize_size)
816 ix86_cost = &ix86_size_cost;
817 else
818 ix86_cost = ix86_tune_cost;
819
820 /* Recreate the arch feature tests if the arch changed */
821 if (old_arch != ix86_arch)
822 {
823 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
824 for (i = 0; i < X86_ARCH_LAST; ++i)
825 ix86_arch_features[i]
826 = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
827 }
828
829 /* Recreate the tune optimization tests */
830 if (old_tune != ix86_tune)
1e964774 831 set_ix86_tune_features (opts, ix86_tune, false);
2bf6d935
ML		 832}
833
834/* Adjust target options after streaming them in. This is mainly about
835 reconciling them with global options. */
836
837void
838ix86_function_specific_post_stream_in (struct cl_target_option *ptr)
839{
840 /* flag_pic is a global option, but ix86_cmodel is target saved option
841 partly computed from flag_pic. If flag_pic is on, adjust x_ix86_cmodel
842 for PIC, or error out. */
843 if (flag_pic)
844 switch (ptr->x_ix86_cmodel)
845 {
846 case CM_SMALL:
847 ptr->x_ix86_cmodel = CM_SMALL_PIC;
848 break;
849
850 case CM_MEDIUM:
851 ptr->x_ix86_cmodel = CM_MEDIUM_PIC;
852 break;
853
854 case CM_LARGE:
855 ptr->x_ix86_cmodel = CM_LARGE_PIC;
856 break;
857
858 case CM_KERNEL:
859 error ("code model %s does not support PIC mode", "kernel");
860 break;
861
862 default:
863 break;
864 }
865 else
866 switch (ptr->x_ix86_cmodel)
867 {
868 case CM_SMALL_PIC:
869 ptr->x_ix86_cmodel = CM_SMALL;
870 break;
871
872 case CM_MEDIUM_PIC:
873 ptr->x_ix86_cmodel = CM_MEDIUM;
874 break;
875
876 case CM_LARGE_PIC:
877 ptr->x_ix86_cmodel = CM_LARGE;
878 break;
879
880 default:
881 break;
882 }
883}
884
885/* Print the current options */
886
887void
888ix86_function_specific_print (FILE *file, int indent,
889 struct cl_target_option *ptr)
890{
891 char *target_string
892 = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_ix86_isa_flags2,
893 ptr->x_target_flags, ptr->x_ix86_target_flags,
46e6341f
JJ		 894 NULL, NULL, ptr->x_ix86_fpmath,
895 ptr->x_prefer_vector_width_type, false, true);
2bf6d935
ML		 896
897 gcc_assert (ptr->arch < PROCESSOR_max);
898 fprintf (file, "%*sarch = %d (%s)\n",
899 indent, "",
900 ptr->arch, processor_names[ptr->arch]);
901
902 gcc_assert (ptr->tune < PROCESSOR_max);
903 fprintf (file, "%*stune = %d (%s)\n",
904 indent, "",
905 ptr->tune, processor_names[ptr->tune]);
906
907 fprintf (file, "%*sbranch_cost = %d\n", indent, "", ptr->branch_cost);
908
909 if (target_string)
910 {
911 fprintf (file, "%*s%s\n", indent, "", target_string);
912 free (target_string);
913 }
914}
915
916\f
917/* Inner function to process the attribute((target(...))), take an argument and
918 set the current options from the argument. If we have a list, recursively go
919 over the list. */
920
921static bool
922ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
923 struct gcc_options *opts,
924 struct gcc_options *opts_set,
925 struct gcc_options *enum_opts_set,
926 bool target_clone_attr)
927{
928 char *next_optstr;
929 bool ret = true;
930
931#define IX86_ATTR_ISA(S,O) { S, sizeof (S)-1, ix86_opt_isa, O, 0 }
932#define IX86_ATTR_STR(S,O) { S, sizeof (S)-1, ix86_opt_str, O, 0 }
933#define IX86_ATTR_ENUM(S,O) { S, sizeof (S)-1, ix86_opt_enum, O, 0 }
934#define IX86_ATTR_YES(S,O,M) { S, sizeof (S)-1, ix86_opt_yes, O, M }
935#define IX86_ATTR_NO(S,O,M) { S, sizeof (S)-1, ix86_opt_no, O, M }
87c753ac
L		 936#define IX86_ATTR_IX86_YES(S,O,M) \
937 { S, sizeof (S)-1, ix86_opt_ix86_yes, O, M }
938#define IX86_ATTR_IX86_NO(S,O,M) \
939 { S, sizeof (S)-1, ix86_opt_ix86_no, O, M }
2bf6d935
ML		 940
941 enum ix86_opt_type
942 {
943 ix86_opt_unknown,
944 ix86_opt_yes,
945 ix86_opt_no,
87c753ac
L		 946 ix86_opt_ix86_yes,
947 ix86_opt_ix86_no,
2bf6d935
ML		 948 ix86_opt_str,
949 ix86_opt_enum,
950 ix86_opt_isa
951 };
952
953 static const struct
954 {
955 const char *string;
956 size_t len;
957 enum ix86_opt_type type;
958 int opt;
959 int mask;
960 } attrs[] = {
961 /* isa options */
962 IX86_ATTR_ISA ("pconfig", OPT_mpconfig),
963 IX86_ATTR_ISA ("wbnoinvd", OPT_mwbnoinvd),
964 IX86_ATTR_ISA ("sgx", OPT_msgx),
965 IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
966 IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
967 IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
968 IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
969 IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
970 IX86_ATTR_ISA ("avx512bitalg", OPT_mavx512bitalg),
e21b52af 971 IX86_ATTR_ISA ("avx512vp2intersect", OPT_mavx512vp2intersect),
2bf6d935
ML		 972
973 IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
974 IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
975 IX86_ATTR_ISA ("avx512vl", OPT_mavx512vl),
976 IX86_ATTR_ISA ("avx512bw", OPT_mavx512bw),
977 IX86_ATTR_ISA ("avx512dq", OPT_mavx512dq),
978 IX86_ATTR_ISA ("avx512er", OPT_mavx512er),
979 IX86_ATTR_ISA ("avx512pf", OPT_mavx512pf),
980 IX86_ATTR_ISA ("avx512cd", OPT_mavx512cd),
981 IX86_ATTR_ISA ("avx512f", OPT_mavx512f),
982 IX86_ATTR_ISA ("avx2", OPT_mavx2),
983 IX86_ATTR_ISA ("fma", OPT_mfma),
984 IX86_ATTR_ISA ("xop", OPT_mxop),
985 IX86_ATTR_ISA ("fma4", OPT_mfma4),
986 IX86_ATTR_ISA ("f16c", OPT_mf16c),
987 IX86_ATTR_ISA ("avx", OPT_mavx),
988 IX86_ATTR_ISA ("sse4", OPT_msse4),
989 IX86_ATTR_ISA ("sse4.2", OPT_msse4_2),
990 IX86_ATTR_ISA ("sse4.1", OPT_msse4_1),
991 IX86_ATTR_ISA ("sse4a", OPT_msse4a),
992 IX86_ATTR_ISA ("ssse3", OPT_mssse3),
993 IX86_ATTR_ISA ("sse3", OPT_msse3),
994 IX86_ATTR_ISA ("aes", OPT_maes),
995 IX86_ATTR_ISA ("sha", OPT_msha),
996 IX86_ATTR_ISA ("pclmul", OPT_mpclmul),
997 IX86_ATTR_ISA ("sse2", OPT_msse2),
998 IX86_ATTR_ISA ("sse", OPT_msse),
999 IX86_ATTR_ISA ("3dnowa", OPT_m3dnowa),
1000 IX86_ATTR_ISA ("3dnow", OPT_m3dnow),
1001 IX86_ATTR_ISA ("mmx", OPT_mmmx),
1002 IX86_ATTR_ISA ("rtm", OPT_mrtm),
1003 IX86_ATTR_ISA ("prfchw", OPT_mprfchw),
1004 IX86_ATTR_ISA ("rdseed", OPT_mrdseed),
1005 IX86_ATTR_ISA ("adx", OPT_madx),
1006 IX86_ATTR_ISA ("prefetchwt1", OPT_mprefetchwt1),
1007 IX86_ATTR_ISA ("clflushopt", OPT_mclflushopt),
1008 IX86_ATTR_ISA ("xsaves", OPT_mxsaves),
1009 IX86_ATTR_ISA ("xsavec", OPT_mxsavec),
1010 IX86_ATTR_ISA ("xsaveopt", OPT_mxsaveopt),
1011 IX86_ATTR_ISA ("xsave", OPT_mxsave),
1012 IX86_ATTR_ISA ("abm", OPT_mabm),
1013 IX86_ATTR_ISA ("bmi", OPT_mbmi),
1014 IX86_ATTR_ISA ("bmi2", OPT_mbmi2),
1015 IX86_ATTR_ISA ("lzcnt", OPT_mlzcnt),
1016 IX86_ATTR_ISA ("tbm", OPT_mtbm),
1017 IX86_ATTR_ISA ("popcnt", OPT_mpopcnt),
1018 IX86_ATTR_ISA ("cx16", OPT_mcx16),
1019 IX86_ATTR_ISA ("sahf", OPT_msahf),
1020 IX86_ATTR_ISA ("movbe", OPT_mmovbe),
1021 IX86_ATTR_ISA ("crc32", OPT_mcrc32),
1022 IX86_ATTR_ISA ("fsgsbase", OPT_mfsgsbase),
1023 IX86_ATTR_ISA ("rdrnd", OPT_mrdrnd),
1024 IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
d8c6cc2c 1025 IX86_ATTR_ISA ("mwait", OPT_mmwait),
2bf6d935
ML		 1026 IX86_ATTR_ISA ("clzero", OPT_mclzero),
1027 IX86_ATTR_ISA ("pku", OPT_mpku),
1028 IX86_ATTR_ISA ("lwp", OPT_mlwp),
1029 IX86_ATTR_ISA ("hle", OPT_mhle),
1030 IX86_ATTR_ISA ("fxsr", OPT_mfxsr),
1031 IX86_ATTR_ISA ("clwb", OPT_mclwb),
1032 IX86_ATTR_ISA ("rdpid", OPT_mrdpid),
1033 IX86_ATTR_ISA ("gfni", OPT_mgfni),
1034 IX86_ATTR_ISA ("shstk", OPT_mshstk),
1035 IX86_ATTR_ISA ("vaes", OPT_mvaes),
1036 IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
1037 IX86_ATTR_ISA ("movdiri", OPT_mmovdiri),
1038 IX86_ATTR_ISA ("movdir64b", OPT_mmovdir64b),
1039 IX86_ATTR_ISA ("waitpkg", OPT_mwaitpkg),
1040 IX86_ATTR_ISA ("cldemote", OPT_mcldemote),
299a53d7 1041 IX86_ATTR_ISA ("uintr", OPT_muintr),
2bf6d935 1042 IX86_ATTR_ISA ("ptwrite", OPT_mptwrite),
632a2f50 1043 IX86_ATTR_ISA ("kl", OPT_mkl),
1044 IX86_ATTR_ISA ("widekl", OPT_mwidekl),
4f0e90fa 1045 IX86_ATTR_ISA ("avx512bf16", OPT_mavx512bf16),
6a10feda 1046 IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
366386c7 1047 IX86_ATTR_ISA ("serialize", OPT_mserialize),
1e47cb35 1048 IX86_ATTR_ISA ("tsxldtrk", OPT_mtsxldtrk),
5c609842 1049 IX86_ATTR_ISA ("amx-tile", OPT_mamx_tile),
1050 IX86_ATTR_ISA ("amx-int8", OPT_mamx_int8),
1051 IX86_ATTR_ISA ("amx-bf16", OPT_mamx_bf16),
83927c63 1052 IX86_ATTR_ISA ("hreset", OPT_mhreset),
ca813880 1053 IX86_ATTR_ISA ("avxvnni", OPT_mavxvnni),
a6841211 1054 IX86_ATTR_ISA ("avx512fp16", OPT_mavx512fp16),
2bf6d935
ML		 1055
1056 /* enum options */
1057 IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
46e6341f 1058 IX86_ATTR_ENUM ("prefer-vector-width=", OPT_mprefer_vector_width_),
2bf6d935
ML		 1059
1060 /* string options */
1061 IX86_ATTR_STR ("arch=", IX86_FUNCTION_SPECIFIC_ARCH),
1062 IX86_ATTR_STR ("tune=", IX86_FUNCTION_SPECIFIC_TUNE),
1063
1064 /* flag options */
1065 IX86_ATTR_YES ("cld",
1066 OPT_mcld,
1067 MASK_CLD),
1068
1069 IX86_ATTR_NO ("fancy-math-387",
1070 OPT_mfancy_math_387,
1071 MASK_NO_FANCY_MATH_387),
1072
1073 IX86_ATTR_YES ("ieee-fp",
1074 OPT_mieee_fp,
1075 MASK_IEEE_FP),
1076
1077 IX86_ATTR_YES ("inline-all-stringops",
1078 OPT_minline_all_stringops,
1079 MASK_INLINE_ALL_STRINGOPS),
1080
1081 IX86_ATTR_YES ("inline-stringops-dynamically",
1082 OPT_minline_stringops_dynamically,
1083 MASK_INLINE_STRINGOPS_DYNAMICALLY),
1084
1085 IX86_ATTR_NO ("align-stringops",
1086 OPT_mno_align_stringops,
1087 MASK_NO_ALIGN_STRINGOPS),
1088
1089 IX86_ATTR_YES ("recip",
1090 OPT_mrecip,
1091 MASK_RECIP),
87c753ac
L		 1092
1093 IX86_ATTR_IX86_YES ("general-regs-only",
1094 OPT_mgeneral_regs_only,
1095 OPTION_MASK_GENERAL_REGS_ONLY),
4d281ff7
HW		 1096
1097 IX86_ATTR_YES ("relax-cmpxchg-loop",
1098 OPT_mrelax_cmpxchg_loop,
1099 MASK_RELAX_CMPXCHG_LOOP),
2bf6d935
ML		 1100 };
1101
1102 location_t loc
1103 = fndecl == NULL ? UNKNOWN_LOCATION : DECL_SOURCE_LOCATION (fndecl);
1104 const char *attr_name = target_clone_attr ? "target_clone" : "target";
1105
1106 /* If this is a list, recurse to get the options. */
1107 if (TREE_CODE (args) == TREE_LIST)
1108 {
2bf6d935
ML		 1109 for (; args; args = TREE_CHAIN (args))
1110 if (TREE_VALUE (args)
1111 && !ix86_valid_target_attribute_inner_p (fndecl, TREE_VALUE (args),
1112 p_strings, opts, opts_set,
1113 enum_opts_set,
1114 target_clone_attr))
1115 ret = false;
1116
1117 return ret;
1118 }
1119
1120 else if (TREE_CODE (args) != STRING_CST)
1121 {
1122 error_at (loc, "attribute %qs argument is not a string", attr_name);
1123 return false;
1124 }
1125
1126 /* Handle multiple arguments separated by commas. */
1127 next_optstr = ASTRDUP (TREE_STRING_POINTER (args));
1128
1129 while (next_optstr && *next_optstr != '\0')
1130 {
1131 char *p = next_optstr;
1132 char *orig_p = p;
1133 char *comma = strchr (next_optstr, ',');
1134 size_t len, opt_len;
1135 int opt;
1136 bool opt_set_p;
1137 char ch;
1138 unsigned i;
1139 enum ix86_opt_type type = ix86_opt_unknown;
1140 int mask = 0;
1141
1142 if (comma)
1143 {
1144 *comma = '\0';
1145 len = comma - next_optstr;
1146 next_optstr = comma + 1;
1147 }
1148 else
1149 {
1150 len = strlen (p);
1151 next_optstr = NULL;
1152 }
1153
1154 /* Recognize no-xxx. */
1155 if (len > 3 && p[0] == 'n' && p[1] == 'o' && p[2] == '-')
1156 {
1157 opt_set_p = false;
1158 p += 3;
1159 len -= 3;
1160 }
1161 else
1162 opt_set_p = true;
1163
1164 /* Find the option. */
1165 ch = *p;
1166 opt = N_OPTS;
1167 for (i = 0; i < ARRAY_SIZE (attrs); i++)
1168 {
1169 type = attrs[i].type;
1170 opt_len = attrs[i].len;
1171 if (ch == attrs[i].string[0]
1172 && ((type != ix86_opt_str && type != ix86_opt_enum)
1173 ? len == opt_len
1174 : len > opt_len)
1175 && memcmp (p, attrs[i].string, opt_len) == 0)
1176 {
1177 opt = attrs[i].opt;
1178 mask = attrs[i].mask;
1179 break;
1180 }
1181 }
1182
1183 /* Process the option. */
1184 if (opt == N_OPTS)
1185 {
1186 error_at (loc, "attribute %qs argument %qs is unknown",
1187 orig_p, attr_name);
1188 ret = false;
1189 }
1190
1191 else if (type == ix86_opt_isa)
1192 {
1193 struct cl_decoded_option decoded;
1194
1195 generate_option (opt, NULL, opt_set_p, CL_TARGET, &decoded);
1196 ix86_handle_option (opts, opts_set,
1197 &decoded, input_location);
1198 }
1199
1200 else if (type == ix86_opt_yes || type == ix86_opt_no)
1201 {
1202 if (type == ix86_opt_no)
1203 opt_set_p = !opt_set_p;
1204
1205 if (opt_set_p)
1206 opts->x_target_flags |= mask;
1207 else
1208 opts->x_target_flags &= ~mask;
1209 }
1210
87c753ac
L		 1211 else if (type == ix86_opt_ix86_yes || type == ix86_opt_ix86_no)
1212 {
1213 if (mask == OPTION_MASK_GENERAL_REGS_ONLY)
1214 {
8f1ea8dd
L		 1215 if (!opt_set_p)
1216 {
ca23341b 1217 error_at (loc, "pragma or attribute %<target(\"%s\")%> "
8f1ea8dd
L		 1218 "does not allow a negated form", p);
1219 return false;
1220 }
1221
87c753ac
L		 1222 if (type != ix86_opt_ix86_yes)
1223 gcc_unreachable ();
1224
1225 opts->x_ix86_target_flags |= mask;
1226
1227 struct cl_decoded_option decoded;
1228 generate_option (opt, NULL, opt_set_p, CL_TARGET,
1229 &decoded);
1230 ix86_handle_option (opts, opts_set, &decoded,
1231 input_location);
1232 }
1233 else
1234 {
1235 if (type == ix86_opt_ix86_no)
1236 opt_set_p = !opt_set_p;
1237
1238 if (opt_set_p)
1239 opts->x_ix86_target_flags |= mask;
1240 else
1241 opts->x_ix86_target_flags &= ~mask;
1242 }
1243 }
1244
2bf6d935
ML		 1245 else if (type == ix86_opt_str)
1246 {
1247 if (p_strings[opt])
1248 {
1249 error_at (loc, "attribute value %qs was already specified "
1250 "in %qs attribute", orig_p, attr_name);
1251 ret = false;
1252 }
1253 else
94cdd3b7
JJ		 1254 {
1255 p_strings[opt] = xstrdup (p + opt_len);
1256 if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
1257 {
1258 /* If arch= is set, clear all bits in x_ix86_isa_flags,
1259 except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
1260 and all bits in x_ix86_isa_flags2. */
1261 opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
1262 | OPTION_MASK_ABI_64
1263 | OPTION_MASK_ABI_X32
1264 | OPTION_MASK_CODE16);
1265 opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
1266 | OPTION_MASK_ABI_64
1267 | OPTION_MASK_ABI_X32
1268 | OPTION_MASK_CODE16);
1269 opts->x_ix86_isa_flags2 = 0;
1270 opts->x_ix86_isa_flags2_explicit = 0;
1271 }
1272 }
2bf6d935
ML		 1273 }
1274
1275 else if (type == ix86_opt_enum)
1276 {
1277 bool arg_ok;
1278 int value;
1279
1280 arg_ok = opt_enum_arg_to_value (opt, p + opt_len, &value, CL_TARGET);
1281 if (arg_ok)
1282 set_option (opts, enum_opts_set, opt, value,
1283 p + opt_len, DK_UNSPECIFIED, input_location,
1284 global_dc);
1285 else
1286 {
1287 error_at (loc, "attribute value %qs is unknown in %qs attribute",
1288 orig_p, attr_name);
1289 ret = false;
1290 }
1291 }
1292
1293 else
1294 gcc_unreachable ();
1295 }
1296
1297 return ret;
1298}
1299
1300/* Release allocated strings. */
1301static void
1302release_options_strings (char **option_strings)
1303{
1304 /* Free up memory allocated to hold the strings */
1305 for (unsigned i = 0; i < IX86_FUNCTION_SPECIFIC_MAX; i++)
1306 free (option_strings[i]);
1307}
1308
1309/* Return a TARGET_OPTION_NODE tree of the target options listed or NULL. */
1310
1311tree
1312ix86_valid_target_attribute_tree (tree fndecl, tree args,
1313 struct gcc_options *opts,
1314 struct gcc_options *opts_set,
1315 bool target_clone_attr)
1316{
1317 const char *orig_arch_string = opts->x_ix86_arch_string;
1318 const char *orig_tune_string = opts->x_ix86_tune_string;
1319 enum fpmath_unit orig_fpmath_set = opts_set->x_ix86_fpmath;
46e6341f 1320 enum prefer_vector_width orig_pvw_set = opts_set->x_prefer_vector_width_type;
2bf6d935
ML		 1321 int orig_tune_defaulted = ix86_tune_defaulted;
1322 int orig_arch_specified = ix86_arch_specified;
1323 char *option_strings[IX86_FUNCTION_SPECIFIC_MAX] = { NULL, NULL };
1324 tree t = NULL_TREE;
1325 struct cl_target_option *def
1326 = TREE_TARGET_OPTION (target_option_default_node);
1327 struct gcc_options enum_opts_set;
1328
1329 memset (&enum_opts_set, 0, sizeof (enum_opts_set));
1330
1331 /* Process each of the options on the chain. */
1332 if (!ix86_valid_target_attribute_inner_p (fndecl, args, option_strings, opts,
1333 opts_set, &enum_opts_set,
1334 target_clone_attr))
1335 return error_mark_node;
1336
1337 /* If the changed options are different from the default, rerun
1338 ix86_option_override_internal, and then save the options away.
1339 The string options are attribute options, and will be undone
1340 when we copy the save structure. */
1341 if (opts->x_ix86_isa_flags != def->x_ix86_isa_flags
1342 || opts->x_ix86_isa_flags2 != def->x_ix86_isa_flags2
1343 || opts->x_target_flags != def->x_target_flags
1344 || option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
1345 || option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
46e6341f
JJ		 1346 || enum_opts_set.x_ix86_fpmath
1347 || enum_opts_set.x_prefer_vector_width_type)
2bf6d935
ML		 1348 {
1349 /* If we are using the default tune= or arch=, undo the string assigned,
1350 and use the default. */
1351 if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
94cdd3b7
JJ		 1352 opts->x_ix86_arch_string
1353 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
2bf6d935
ML		 1354 else if (!orig_arch_specified)
1355 opts->x_ix86_arch_string = NULL;
1356
1357 if (option_strings[IX86_FUNCTION_SPECIFIC_TUNE])
1358 opts->x_ix86_tune_string
1359 = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]);
1360 else if (orig_tune_defaulted)
1361 opts->x_ix86_tune_string = NULL;
1362
1363 /* If fpmath= is not set, and we now have sse2 on 32-bit, use it. */
1364 if (enum_opts_set.x_ix86_fpmath)
1365 opts_set->x_ix86_fpmath = (enum fpmath_unit) 1;
46e6341f
JJ		 1366 if (enum_opts_set.x_prefer_vector_width_type)
1367 opts_set->x_prefer_vector_width_type = (enum prefer_vector_width) 1;
2bf6d935
ML		 1368
1369 /* Do any overrides, such as arch=xxx, or tune=xxx support. */
1370 bool r = ix86_option_override_internal (false, opts, opts_set);
1371 if (!r)
1372 {
1373 release_options_strings (option_strings);
1374 return error_mark_node;
1375 }
1376
1377 /* Add any builtin functions with the new isa if any. */
1378 ix86_add_new_builtins (opts->x_ix86_isa_flags, opts->x_ix86_isa_flags2);
1379
e401db7b
JJ		 1380 enum excess_precision orig_ix86_excess_precision
1381 = opts->x_ix86_excess_precision;
1382 bool orig_ix86_unsafe_math_optimizations
1383 = opts->x_ix86_unsafe_math_optimizations;
1384 opts->x_ix86_excess_precision = opts->x_flag_excess_precision;
1385 opts->x_ix86_unsafe_math_optimizations
1386 = opts->x_flag_unsafe_math_optimizations;
1387
2bf6d935
ML		 1388 /* Save the current options unless we are validating options for
1389 #pragma. */
ba948b37 1390 t = build_target_option_node (opts, opts_set);
2bf6d935
ML		 1391
1392 opts->x_ix86_arch_string = orig_arch_string;
1393 opts->x_ix86_tune_string = orig_tune_string;
1394 opts_set->x_ix86_fpmath = orig_fpmath_set;
46e6341f 1395 opts_set->x_prefer_vector_width_type = orig_pvw_set;
e401db7b
JJ		 1396 opts->x_ix86_excess_precision = orig_ix86_excess_precision;
1397 opts->x_ix86_unsafe_math_optimizations
1398 = orig_ix86_unsafe_math_optimizations;
2bf6d935
ML		 1399
1400 release_options_strings (option_strings);
1401 }
1402
1403 return t;
1404}
1405
1406/* Hook to validate attribute((target("string"))). */
1407
1408bool
1409ix86_valid_target_attribute_p (tree fndecl,
1410 tree ARG_UNUSED (name),
1411 tree args,
1412 int flags)
1413{
ba948b37 1414 struct gcc_options func_options, func_options_set;
2bf6d935
ML		 1415 tree new_target, new_optimize;
1416 bool ret = true;
1417
1418 /* attribute((target("default"))) does nothing, beyond
1419 affecting multi-versioning. */
1420 if (TREE_VALUE (args)
1421 && TREE_CODE (TREE_VALUE (args)) == STRING_CST
1422 && TREE_CHAIN (args) == NULL_TREE
1423 && strcmp (TREE_STRING_POINTER (TREE_VALUE (args)), "default") == 0)
1424 return true;
1425
ba948b37
JJ		 1426 tree old_optimize = build_optimization_node (&global_options,
1427 &global_options_set);
2bf6d935
ML		 1428
1429 /* Get the optimization options of the current function. */
1430 tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
1431
1432 if (!func_optimize)
1433 func_optimize = old_optimize;
1434
1435 /* Init func_options. */
1436 memset (&func_options, 0, sizeof (func_options));
1437 init_options_struct (&func_options, NULL);
1438 lang_hooks.init_options_struct (&func_options);
ba948b37
JJ		 1439 memset (&func_options_set, 0, sizeof (func_options_set));
1440
1441 cl_optimization_restore (&func_options, &func_options_set,
2bf6d935
ML		 1442 TREE_OPTIMIZATION (func_optimize));
1443
1444 /* Initialize func_options to the default before its target options can
1445 be set. */
36453971
JJ		 1446 tree old_target = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
1447 if (old_target == NULL_TREE)
1448 old_target = target_option_default_node;
ba948b37 1449 cl_target_option_restore (&func_options, &func_options_set,
36453971 1450 TREE_TARGET_OPTION (old_target));
2bf6d935
ML		 1451
1452 /* FLAGS == 1 is used for target_clones attribute. */
1453 new_target
1454 = ix86_valid_target_attribute_tree (fndecl, args, &func_options,
ba948b37 1455 &func_options_set, flags == 1);
2bf6d935 1456
ba948b37 1457 new_optimize = build_optimization_node (&func_options, &func_options_set);
2bf6d935
ML		 1458
1459 if (new_target == error_mark_node)
1460 ret = false;
1461
1462 else if (fndecl && new_target)
1463 {
1464 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
1465
1466 if (old_optimize != new_optimize)
1467 DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
1468 }
1469
2bf6d935
ML		 1470 return ret;
1471}
1472
1473const char *stringop_alg_names[] = {
2bf6d935
ML		 1474#define DEF_ALG(alg, name) #name,
1475#include "stringop.def"
2bf6d935
ML		 1476#undef DEF_ALG
1477};
1478
1479/* Parse parameter string passed to -mmemcpy-strategy= or -mmemset-strategy=.
1480 The string is of the following form (or comma separated list of it):
1481
1482 strategy_alg:max_size:[align|noalign]
1483
1484 where the full size range for the strategy is either [0, max_size] or
1485 [min_size, max_size], in which min_size is the max_size + 1 of the
1486 preceding range. The last size range must have max_size == -1.
1487
1488 Examples:
1489
1490 1.
1491 -mmemcpy-strategy=libcall:-1:noalign
1492
1493 this is equivalent to (for known size memcpy) -mstringop-strategy=libcall
1494
1495
1496 2.
1497 -mmemset-strategy=rep_8byte:16:noalign,vector_loop:2048:align,libcall:-1:noalign
1498
1499 This is to tell the compiler to use the following strategy for memset
1500 1) when the expected size is between [1, 16], use rep_8byte strategy;
1501 2) when the size is between [17, 2048], use vector_loop;
1502 3) when the size is > 2048, use libcall. */
1503
1504struct stringop_size_range
1505{
1506 int max;
1507 stringop_alg alg;
1508 bool noalign;
1509};
1510
1511static void
1512ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
1513{
1514 const struct stringop_algs *default_algs;
1515 stringop_size_range input_ranges[MAX_STRINGOP_ALGS];
1516 char *curr_range_str, *next_range_str;
1517 const char *opt = is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=";
1518 int i = 0, n = 0;
1519
1520 if (is_memset)
1521 default_algs = &ix86_cost->memset[TARGET_64BIT != 0];
1522 else
1523 default_algs = &ix86_cost->memcpy[TARGET_64BIT != 0];
1524
1525 curr_range_str = strategy_str;
1526
1527 do
1528 {
1529 int maxs;
1530 char alg_name[128];
1531 char align[16];
1532 next_range_str = strchr (curr_range_str, ',');
1533 if (next_range_str)
1534 *next_range_str++ = '\0';
1535
1536 if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
1537 align) != 3)
1538 {
1539 error ("wrong argument %qs to option %qs", curr_range_str, opt);
1540 return;
1541 }
1542
1543 if (n > 0 && (maxs < (input_ranges[n - 1].max + 1) && maxs != -1))
1544 {
1545 error ("size ranges of option %qs should be increasing", opt);
1546 return;
1547 }
1548
1549 for (i = 0; i < last_alg; i++)
1550 if (!strcmp (alg_name, stringop_alg_names[i]))
1551 break;
1552
1553 if (i == last_alg)
1554 {
1555 error ("wrong strategy name %qs specified for option %qs",
1556 alg_name, opt);
1557
1558 auto_vec <const char *> candidates;
1559 for (i = 0; i < last_alg; i++)
1560 if ((stringop_alg) i != rep_prefix_8_byte || TARGET_64BIT)
1561 candidates.safe_push (stringop_alg_names[i]);
1562
1563 char *s;
1564 const char *hint
1565 = candidates_list_and_hint (alg_name, s, candidates);
1566 if (hint)
1567 inform (input_location,
1568 "valid arguments to %qs are: %s; did you mean %qs?",
1569 opt, s, hint);
1570 else
1571 inform (input_location, "valid arguments to %qs are: %s",
1572 opt, s);
1573 XDELETEVEC (s);
1574 return;
1575 }
1576
1577 if ((stringop_alg) i == rep_prefix_8_byte
1578 && !TARGET_64BIT)
1579 {
1580 /* rep; movq isn't available in 32-bit code. */
1581 error ("strategy name %qs specified for option %qs "
1582 "not supported for 32-bit code", alg_name, opt);
1583 return;
1584 }
1585
1586 input_ranges[n].max = maxs;
1587 input_ranges[n].alg = (stringop_alg) i;
1588 if (!strcmp (align, "align"))
1589 input_ranges[n].noalign = false;
1590 else if (!strcmp (align, "noalign"))
1591 input_ranges[n].noalign = true;
1592 else
1593 {
1594 error ("unknown alignment %qs specified for option %qs", align, opt);
1595 return;
1596 }
1597 n++;
1598 curr_range_str = next_range_str;
1599 }
1600 while (curr_range_str);
1601
1602 if (input_ranges[n - 1].max != -1)
1603 {
1604 error ("the max value for the last size range should be -1"
1605 " for option %qs", opt);
1606 return;
1607 }
1608
1609 if (n > MAX_STRINGOP_ALGS)
1610 {
1611 error ("too many size ranges specified in option %qs", opt);
1612 return;
1613 }
1614
1615 /* Now override the default algs array. */
1616 for (i = 0; i < n; i++)
1617 {
1618 *const_cast<int *>(&default_algs->size[i].max) = input_ranges[i].max;
1619 *const_cast<stringop_alg *>(&default_algs->size[i].alg)
1620 = input_ranges[i].alg;
1621 *const_cast<int *>(&default_algs->size[i].noalign)
1622 = input_ranges[i].noalign;
1623 }
1624}
1625
1626\f
1627/* parse -mtune-ctrl= option. When DUMP is true,
1628 print the features that are explicitly set. */
1629
1630static void
1e964774 1631parse_mtune_ctrl_str (struct gcc_options *opts, bool dump)
2bf6d935 1632{
1e964774 1633 if (!opts->x_ix86_tune_ctrl_string)
2bf6d935
ML		 1634 return;
1635
1636 char *next_feature_string = NULL;
1e964774 1637 char *curr_feature_string = xstrdup (opts->x_ix86_tune_ctrl_string);
2bf6d935
ML		 1638 char *orig = curr_feature_string;
1639 int i;
1640 do
1641 {
1642 bool clear = false;
1643
1644 next_feature_string = strchr (curr_feature_string, ',');
1645 if (next_feature_string)
1646 *next_feature_string++ = '\0';
1647 if (*curr_feature_string == '^')
1648 {
1649 curr_feature_string++;
1650 clear = true;
1651 }
1652 for (i = 0; i < X86_TUNE_LAST; i++)
1653 {
1654 if (!strcmp (curr_feature_string, ix86_tune_feature_names[i]))
1655 {
1656 ix86_tune_features[i] = !clear;
1657 if (dump)
1658 fprintf (stderr, "Explicitly %s feature %s\n",
1659 clear ? "clear" : "set", ix86_tune_feature_names[i]);
1660 break;
1661 }
1662 }
1663 if (i == X86_TUNE_LAST)
1664 error ("unknown parameter to option %<-mtune-ctrl%>: %s",
1665 clear ? curr_feature_string - 1 : curr_feature_string);
1666 curr_feature_string = next_feature_string;
1667 }
1668 while (curr_feature_string);
1669 free (orig);
1670}
1671
1672/* Helper function to set ix86_tune_features. IX86_TUNE is the
1673 processor type. */
1674
1675static void
1e964774
L		 1676set_ix86_tune_features (struct gcc_options *opts,
1677 enum processor_type ix86_tune, bool dump)
2bf6d935
ML		 1678{
1679 unsigned HOST_WIDE_INT ix86_tune_mask = HOST_WIDE_INT_1U << ix86_tune;
1680 int i;
1681
1682 for (i = 0; i < X86_TUNE_LAST; ++i)
1683 {
1684 if (ix86_tune_no_default)
1685 ix86_tune_features[i] = 0;
1686 else
1687 ix86_tune_features[i]
1688 = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
1689 }
1690
1691 if (dump)
1692 {
1693 fprintf (stderr, "List of x86 specific tuning parameter names:\n");
1694 for (i = 0; i < X86_TUNE_LAST; i++)
1695 fprintf (stderr, "%s : %s\n", ix86_tune_feature_names[i],
1696 ix86_tune_features[i] ? "on" : "off");
1697 }
1698
1e964774 1699 parse_mtune_ctrl_str (opts, dump);
2bf6d935
ML		 1700}
1701
1702
1703/* Default align_* from the processor table. */
1704
1705static void
1706ix86_default_align (struct gcc_options *opts)
1707{
1708 /* -falign-foo without argument: supply one. */
1709 if (opts->x_flag_align_loops && !opts->x_str_align_loops)
1710 opts->x_str_align_loops = processor_cost_table[ix86_tune]->align_loop;
1711 if (opts->x_flag_align_jumps && !opts->x_str_align_jumps)
1712 opts->x_str_align_jumps = processor_cost_table[ix86_tune]->align_jump;
1713 if (opts->x_flag_align_labels && !opts->x_str_align_labels)
1714 opts->x_str_align_labels = processor_cost_table[ix86_tune]->align_label;
1715 if (opts->x_flag_align_functions && !opts->x_str_align_functions)
1716 opts->x_str_align_functions = processor_cost_table[ix86_tune]->align_func;
1717}
1718
6bc89193
AO		 1719#ifndef USE_IX86_FRAME_POINTER
1720#define USE_IX86_FRAME_POINTER 0
1721#endif
1722
1723/* (Re)compute option overrides affected by optimization levels in
1724 target-specific ways. */
1725
1726static void
1727ix86_recompute_optlev_based_flags (struct gcc_options *opts,
1728 struct gcc_options *opts_set)
1729{
1730 /* Set the default values for switches whose default depends on TARGET_64BIT
1731 in case they weren't overwritten by command line options. */
1732 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
1733 {
6ed76044
ML		 1734 if (opts->x_optimize >= 1)
1735 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1736 !USE_IX86_FRAME_POINTER);
6bc89193 1737 if (opts->x_flag_asynchronous_unwind_tables
6bc89193 1738 && TARGET_64BIT_MS_ABI)
6ed76044 1739 SET_OPTION_IF_UNSET (opts, opts_set, flag_unwind_tables, 1);
6bc89193
AO		 1740 if (opts->x_flag_asynchronous_unwind_tables == 2)
1741 opts->x_flag_unwind_tables
1742 = opts->x_flag_asynchronous_unwind_tables = 1;
1743 if (opts->x_flag_pcc_struct_return == 2)
1744 opts->x_flag_pcc_struct_return = 0;
1745 }
1746 else
1747 {
6ed76044
ML		 1748 if (opts->x_optimize >= 1)
1749 SET_OPTION_IF_UNSET (opts, opts_set, flag_omit_frame_pointer,
1750 !(USE_IX86_FRAME_POINTER || opts->x_optimize_size));
6bc89193
AO		 1751 if (opts->x_flag_asynchronous_unwind_tables == 2)
1752 opts->x_flag_asynchronous_unwind_tables = !USE_IX86_FRAME_POINTER;
1753 if (opts->x_flag_pcc_struct_return == 2)
1754 {
1755 /* Intel MCU psABI specifies that -freg-struct-return should
c4f63307 1756 be on. Instead of setting DEFAULT_PCC_STRUCT_RETURN to 0,
6bc89193
AO		 1757 we check -miamcu so that -freg-struct-return is always
1758 turned on if -miamcu is used. */
1759 if (TARGET_IAMCU_P (opts->x_target_flags))
1760 opts->x_flag_pcc_struct_return = 0;
1761 else
1762 opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN;
1763 }
1764 }
1765}
1766
2bf6d935
ML		 1767/* Implement TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook. */
1768
1769void
1770ix86_override_options_after_change (void)
1771{
1772 ix86_default_align (&global_options);
6bc89193 1773 ix86_recompute_optlev_based_flags (&global_options, &global_options_set);
2bf6d935
ML		 1774}
1775
1776/* Clear stack slot assignments remembered from previous functions.
1777 This is called from INIT_EXPANDERS once before RTL is emitted for each
1778 function. */
1779
1780static struct machine_function *
1781ix86_init_machine_status (void)
1782{
1783 struct machine_function *f;
1784
1785 f = ggc_cleared_alloc<machine_function> ();
1786 f->call_abi = ix86_abi;
c2080a1f 1787 f->stack_frame_required = true;
5e2eabe1 1788 f->silent_p = true;
2bf6d935
ML		 1789
1790 return f;
1791}
1792
1793/* Override various settings based on options. If MAIN_ARGS_P, the
1794 options are from the command line, otherwise they are from
1795 attributes. Return true if there's an error related to march
1796 option. */
1797
1798static bool
1799ix86_option_override_internal (bool main_args_p,
1800 struct gcc_options *opts,
1801 struct gcc_options *opts_set)
1802{
5ebdd535 1803 unsigned int i;
2bf6d935
ML		 1804 unsigned HOST_WIDE_INT ix86_arch_mask;
1805 const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
1806
1807 /* -mrecip options. */
1808 static struct
1809 {
1810 const char *string; /* option name */
1811 unsigned int mask; /* mask bits to set */
1812 }
1813 const recip_options[] =
1814 {
1815 { "all", RECIP_MASK_ALL },
1816 { "none", RECIP_MASK_NONE },
1817 { "div", RECIP_MASK_DIV },
1818 { "sqrt", RECIP_MASK_SQRT },
1819 { "vec-div", RECIP_MASK_VEC_DIV },
1820 { "vec-sqrt", RECIP_MASK_VEC_SQRT },
1821 };
1822
1823
1824 /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
1825 TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false. */
1826 if (TARGET_64BIT_DEFAULT && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1827 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
1828#ifdef TARGET_BI_ARCH
1829 else
1830 {
1831#if TARGET_BI_ARCH == 1
1832 /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
1833 is on and OPTION_MASK_ABI_X32 is off. We turn off
1834 OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
1835 -mx32. */
1836 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1837 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1838#else
1839 /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
1840 on and OPTION_MASK_ABI_64 is off. We turn off
1841 OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
1842 -m64 or OPTION_MASK_CODE16 is turned on by -m16. */
1843 if (TARGET_LP64_P (opts->x_ix86_isa_flags)
1844 || TARGET_16BIT_P (opts->x_ix86_isa_flags))
1845 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1846#endif
1847 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
1848 && TARGET_IAMCU_P (opts->x_target_flags))
1849 sorry ("Intel MCU psABI isn%'t supported in %s mode",
1850 TARGET_X32_P (opts->x_ix86_isa_flags) ? "x32" : "64-bit");
1851 }
1852#endif
1853
1854 if (TARGET_X32_P (opts->x_ix86_isa_flags))
1855 {
1856 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1857 OPTION_MASK_ABI_64 for TARGET_X32. */
1858 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1859 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_64;
1860 }
1861 else if (TARGET_16BIT_P (opts->x_ix86_isa_flags))
1862 opts->x_ix86_isa_flags &= ~(OPTION_MASK_ISA_64BIT
1863 | OPTION_MASK_ABI_X32
1864 | OPTION_MASK_ABI_64);
1865 else if (TARGET_LP64_P (opts->x_ix86_isa_flags))
1866 {
1867 /* Always turn on OPTION_MASK_ISA_64BIT and turn off
1868 OPTION_MASK_ABI_X32 for TARGET_LP64. */
1869 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
1870 opts->x_ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
1871 }
1872
1873#ifdef SUBTARGET_OVERRIDE_OPTIONS
1874 SUBTARGET_OVERRIDE_OPTIONS;
1875#endif
1876
1877#ifdef SUBSUBTARGET_OVERRIDE_OPTIONS
1878 SUBSUBTARGET_OVERRIDE_OPTIONS;
1879#endif
1880
a49a96f6
JJ		 1881#ifdef HAVE_LD_BROKEN_PE_DWARF5
1882 /* If the PE linker has broken DWARF 5 support, make
1883 DWARF 4 the default. */
1884 if (TARGET_PECOFF)
1885 SET_OPTION_IF_UNSET (opts, opts_set, dwarf_version, 4);
1886#endif
1887
2bf6d935
ML		 1888 /* -fPIC is the default for x86_64. */
1889 if (TARGET_MACHO && TARGET_64BIT_P (opts->x_ix86_isa_flags))
1890 opts->x_flag_pic = 2;
1891
1892 /* Need to check -mtune=generic first. */
1893 if (opts->x_ix86_tune_string)
1894 {
1895 /* As special support for cross compilers we read -mtune=native
1896 as -mtune=generic. With native compilers we won't see the
1897 -mtune=native, as it was changed by the driver. */
1898 if (!strcmp (opts->x_ix86_tune_string, "native"))
69bd5d47 1899 opts->x_ix86_tune_string = "generic";
2bf6d935
ML		 1900 else if (!strcmp (opts->x_ix86_tune_string, "x86-64"))
1901 warning (OPT_Wdeprecated,
1902 main_args_p
1903 ? G_("%<-mtune=x86-64%> is deprecated; use %<-mtune=k8%> "
1904 "or %<-mtune=generic%> instead as appropriate")
1905 : G_("%<target(\"tune=x86-64\")%> is deprecated; use "
1906 "%<target(\"tune=k8\")%> or %<target(\"tune=generic\")%>"
1907 " instead as appropriate"));
1908 }
1909 else
1910 {
1911 if (opts->x_ix86_arch_string)
1912 opts->x_ix86_tune_string = opts->x_ix86_arch_string;
1913 if (!opts->x_ix86_tune_string)
1914 {
1915 opts->x_ix86_tune_string = processor_names[TARGET_CPU_DEFAULT];
1916 ix86_tune_defaulted = 1;
1917 }
1918
1919 /* opts->x_ix86_tune_string is set to opts->x_ix86_arch_string
1920 or defaulted. We need to use a sensible tune option. */
c0129e2d 1921 if (startswith (opts->x_ix86_tune_string, "x86-64")
69bd5d47
JJ		 1922 && (opts->x_ix86_tune_string[6] == '\0'
1923 || (!strcmp (opts->x_ix86_tune_string + 6, "-v2")
1924 || !strcmp (opts->x_ix86_tune_string + 6, "-v3")
1925 || !strcmp (opts->x_ix86_tune_string + 6, "-v4"))))
1926 opts->x_ix86_tune_string = "generic";
2bf6d935
ML		 1927 }
1928
1929 if (opts->x_ix86_stringop_alg == rep_prefix_8_byte
1930 && !TARGET_64BIT_P (opts->x_ix86_isa_flags))
1931 {
1932 /* rep; movq isn't available in 32-bit code. */
1933 error ("%<-mstringop-strategy=rep_8byte%> not supported for 32-bit code");
1934 opts->x_ix86_stringop_alg = no_stringop;
1935 }
1936
299a53d7 1937 if (TARGET_UINTR && !TARGET_64BIT)
1938 error ("%<-muintr%> not supported for 32-bit code");
1939
2bf6d935
ML		 1940 if (!opts->x_ix86_arch_string)
1941 opts->x_ix86_arch_string
1942 = TARGET_64BIT_P (opts->x_ix86_isa_flags)
1943 ? "x86-64" : SUBTARGET32_DEFAULT_CPU;
1944 else
1945 ix86_arch_specified = 1;
1946
1947 if (opts_set->x_ix86_pmode)
1948 {
1949 if ((TARGET_LP64_P (opts->x_ix86_isa_flags)
1950 && opts->x_ix86_pmode == PMODE_SI)
1951 || (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
1952 && opts->x_ix86_pmode == PMODE_DI))
1953 error ("address mode %qs not supported in the %s bit mode",
1954 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long",
1955 TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32");
1956 }
1957 else
1958 opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags)
1959 ? PMODE_DI : PMODE_SI;
1960
6ed76044 1961 SET_OPTION_IF_UNSET (opts, opts_set, ix86_abi, DEFAULT_ABI);
2bf6d935
ML		 1962
1963 if (opts->x_ix86_abi == MS_ABI && TARGET_X32_P (opts->x_ix86_isa_flags))
1964 error ("%<-mabi=ms%> not supported with X32 ABI");
1965 gcc_assert (opts->x_ix86_abi == SYSV_ABI || opts->x_ix86_abi == MS_ABI);
1966
080629d3
ML		 1967 const char *abi_name = opts->x_ix86_abi == MS_ABI ? "ms" : "sysv";
1968 if ((opts->x_flag_sanitize & SANITIZE_USER_ADDRESS)
1969 && opts->x_ix86_abi != DEFAULT_ABI)
1970 error ("%<-mabi=%s%> not supported with %<-fsanitize=address%>", abi_name);
1971 if ((opts->x_flag_sanitize & SANITIZE_KERNEL_ADDRESS)
1972 && opts->x_ix86_abi != DEFAULT_ABI)
1973 error ("%<-mabi=%s%> not supported with %<-fsanitize=kernel-address%>",
1974 abi_name);
1975 if ((opts->x_flag_sanitize & SANITIZE_THREAD)
1976 && opts->x_ix86_abi != DEFAULT_ABI)
1977 error ("%<-mabi=%s%> not supported with %<-fsanitize=thread%>", abi_name);
2bf6d935
ML		 1978
1979 /* For targets using ms ABI enable ms-extensions, if not
1980 explicit turned off. For non-ms ABI we turn off this
1981 option. */
6ed76044
ML		 1982 SET_OPTION_IF_UNSET (opts, opts_set, flag_ms_extensions,
1983 (MS_ABI == DEFAULT_ABI));
2bf6d935
ML		 1984
1985 if (opts_set->x_ix86_cmodel)
1986 {
1987 switch (opts->x_ix86_cmodel)
1988 {
1989 case CM_SMALL:
1990 case CM_SMALL_PIC:
1991 if (opts->x_flag_pic)
1992 opts->x_ix86_cmodel = CM_SMALL_PIC;
1993 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
1994 error ("code model %qs not supported in the %s bit mode",
1995 "small", "32");
1996 break;
1997
1998 case CM_MEDIUM:
1999 case CM_MEDIUM_PIC:
2000 if (opts->x_flag_pic)
2001 opts->x_ix86_cmodel = CM_MEDIUM_PIC;
2002 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2003 error ("code model %qs not supported in the %s bit mode",
2004 "medium", "32");
2005 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
2006 error ("code model %qs not supported in x32 mode",
2007 "medium");
2008 break;
2009
2010 case CM_LARGE:
2011 case CM_LARGE_PIC:
2012 if (opts->x_flag_pic)
2013 opts->x_ix86_cmodel = CM_LARGE_PIC;
2014 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2015 error ("code model %qs not supported in the %s bit mode",
2016 "large", "32");
2017 else if (TARGET_X32_P (opts->x_ix86_isa_flags))
2018 error ("code model %qs not supported in x32 mode",
2019 "large");
2020 break;
2021
2022 case CM_32:
2023 if (opts->x_flag_pic)
2024 error ("code model %s does not support PIC mode", "32");
2025 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2026 error ("code model %qs not supported in the %s bit mode",
2027 "32", "64");
2028 break;
2029
2030 case CM_KERNEL:
2031 if (opts->x_flag_pic)
2032 {
2033 error ("code model %s does not support PIC mode", "kernel");
2034 opts->x_ix86_cmodel = CM_32;
2035 }
2036 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2037 error ("code model %qs not supported in the %s bit mode",
2038 "kernel", "32");
2039 break;
2040
2041 default:
2042 gcc_unreachable ();
2043 }
2044 }
2045 else
2046 {
2047 /* For TARGET_64BIT and MS_ABI, force pic on, in order to enable the
2048 use of rip-relative addressing. This eliminates fixups that
2049 would otherwise be needed if this object is to be placed in a
2050 DLL, and is essentially just as efficient as direct addressing. */
2051 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2052 && (TARGET_RDOS || TARGET_PECOFF))
2053 opts->x_ix86_cmodel = CM_MEDIUM_PIC, opts->x_flag_pic = 1;
2054 else if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2055 opts->x_ix86_cmodel = opts->x_flag_pic ? CM_SMALL_PIC : CM_SMALL;
2056 else
2057 opts->x_ix86_cmodel = CM_32;
2058 }
2059 if (TARGET_MACHO && opts->x_ix86_asm_dialect == ASM_INTEL)
2060 {
2061 error ("%<-masm=intel%> not supported in this configuration");
2062 opts->x_ix86_asm_dialect = ASM_ATT;
2063 }
2064 if ((TARGET_64BIT_P (opts->x_ix86_isa_flags) != 0)
2065 != ((opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) != 0))
2066 sorry ("%i-bit mode not compiled in",
2067 (opts->x_ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
2068
4f00c4d4
ML		 2069 /* Last processor_alias_table must point to "generic" entry. */
2070 gcc_checking_assert (strcmp (processor_alias_table[pta_size - 1].name,
2071 "generic") == 0);
2bf6d935
ML		 2072 for (i = 0; i < pta_size; i++)
2073 if (! strcmp (opts->x_ix86_arch_string, processor_alias_table[i].name))
2074 {
2075 if (!strcmp (opts->x_ix86_arch_string, "generic"))
2076 {
2077 error (main_args_p
2078 ? G_("%<generic%> CPU can be used only for %<-mtune=%> "
2079 "switch")
2080 : G_("%<generic%> CPU can be used only for "
2081 "%<target(\"tune=\")%> attribute"));
2082 return false;
2083 }
2084 else if (!strcmp (opts->x_ix86_arch_string, "intel"))
2085 {
2086 error (main_args_p
2087 ? G_("%<intel%> CPU can be used only for %<-mtune=%> "
2088 "switch")
2089 : G_("%<intel%> CPU can be used only for "
2090 "%<target(\"tune=\")%> attribute"));
2091 return false;
2092 }
2093
2094 if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
2095 && !((processor_alias_table[i].flags & PTA_64BIT) != 0))
2096 {
2097 error ("CPU you selected does not support x86-64 "
2098 "instruction set");
2099 return false;
2100 }
2101
2102 ix86_schedule = processor_alias_table[i].schedule;
2103 ix86_arch = processor_alias_table[i].processor;
324bec55
FW		 2104
2105 /* Default cpu tuning to the architecture, unless the table
2106 entry requests not to do this. Used by the x86-64 psABI
2107 micro-architecture levels. */
2108 if ((processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2109 ix86_tune = ix86_arch;
2110 else
2111 ix86_tune = PROCESSOR_GENERIC;
2bf6d935 2112
1751bec0
ML		 2113 /* Enable PTA flags that are enabled by default by a -march option. */
2114#define TARGET_EXPLICIT_NO_SAHF_P(opts) (false)
2115#define SET_TARGET_NO_SAHF(opts) {}
2116#define TARGET_EXPLICIT_PREFETCH_SSE_P(opts) (false)
2117#define SET_TARGET_PREFETCH_SSE(opts) {}
2118#define TARGET_EXPLICIT_NO_TUNE_P(opts) (false)
2119#define SET_TARGET_NO_TUNE(opts) {}
2120#define TARGET_EXPLICIT_NO_80387_P(opts) (false)
2121#define SET_TARGET_NO_80387(opts) {}
2122
2123#define DEF_PTA(NAME) \
2124 if (((processor_alias_table[i].flags & PTA_ ## NAME) != 0) \
2125 && PTA_ ## NAME != PTA_64BIT \
cc11b924 2126 && (TARGET_64BIT || PTA_ ## NAME != PTA_UINTR) \
1751bec0
ML		 2127 && !TARGET_EXPLICIT_ ## NAME ## _P (opts)) \
2128 SET_TARGET_ ## NAME (opts);
2129#include "i386-isa.def"
2130#undef DEF_PTA
2131
2132
2133 if (!(TARGET_64BIT_P (opts->x_ix86_isa_flags)
2134 && ((processor_alias_table[i].flags & PTA_NO_SAHF) != 0))
2135 && !TARGET_EXPLICIT_SAHF_P (opts))
2136 SET_TARGET_SAHF (opts);
2137
2bf6d935 2138 if (((processor_alias_table[i].flags & PTA_ABM) != 0)
1751bec0
ML		 2139 && !TARGET_EXPLICIT_ABM_P (opts))
2140 {
854ef6e5
L		 2141 if (!TARGET_EXPLICIT_LZCNT_P (opts))
2142 SET_TARGET_LZCNT (opts);
2143 if (!TARGET_EXPLICIT_POPCNT_P (opts))
2144 SET_TARGET_POPCNT (opts);
1751bec0 2145 }
2bf6d935
ML		 2146
2147 if ((processor_alias_table[i].flags
2148 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
08a4adcf 2149 ix86_prefetch_sse = true;
2bf6d935 2150
87c753ac
L		 2151 /* Don't enable x87 instructions if only general registers are
2152 allowed by target("general-regs-only") function attribute or
2153 -mgeneral-regs-only. */
2154 if (!(opts->x_ix86_target_flags & OPTION_MASK_GENERAL_REGS_ONLY)
2bf6d935
ML		 2155 && !(opts_set->x_target_flags & MASK_80387))
2156 {
2157 if (((processor_alias_table[i].flags & PTA_NO_80387) != 0))
2158 opts->x_target_flags &= ~MASK_80387;
2159 else
2160 opts->x_target_flags |= MASK_80387;
2161 }
2162 break;
2163 }
2164
2165 if (i == pta_size)
2166 {
2167 error (main_args_p
2168 ? G_("bad value (%qs) for %<-march=%> switch")
2169 : G_("bad value (%qs) for %<target(\"arch=\")%> attribute"),
2170 opts->x_ix86_arch_string);
2171
2172 auto_vec <const char *> candidates;
2173 for (i = 0; i < pta_size; i++)
2174 if (strcmp (processor_alias_table[i].name, "generic")
2175 && strcmp (processor_alias_table[i].name, "intel")
2176 && (!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2177 || ((processor_alias_table[i].flags & PTA_64BIT) != 0)))
2178 candidates.safe_push (processor_alias_table[i].name);
2179
2180#ifdef HAVE_LOCAL_CPU_DETECT
2181 /* Add also "native" as possible value. */
2182 candidates.safe_push ("native");
2183#endif
2184
2185 char *s;
2186 const char *hint
2187 = candidates_list_and_hint (opts->x_ix86_arch_string, s, candidates);
2188 if (hint)
2189 inform (input_location,
2190 main_args_p
2191 ? G_("valid arguments to %<-march=%> switch are: "
2192 "%s; did you mean %qs?")
2193 : G_("valid arguments to %<target(\"arch=\")%> attribute are: "
2194 "%s; did you mean %qs?"), s, hint);
2195 else
2196 inform (input_location,
2197 main_args_p
2198 ? G_("valid arguments to %<-march=%> switch are: %s")
2199 : G_("valid arguments to %<target(\"arch=\")%> attribute "
2200 "are: %s"), s);
2201 XDELETEVEC (s);
2202 }
2203
2204 ix86_arch_mask = HOST_WIDE_INT_1U << ix86_arch;
2205 for (i = 0; i < X86_ARCH_LAST; ++i)
2206 ix86_arch_features[i] = !!(initial_ix86_arch_features[i] & ix86_arch_mask);
2207
2208 for (i = 0; i < pta_size; i++)
324bec55
FW		 2209 if (! strcmp (opts->x_ix86_tune_string, processor_alias_table[i].name)
2210 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML		 2211 {
2212 ix86_schedule = processor_alias_table[i].schedule;
2213 ix86_tune = processor_alias_table[i].processor;
2214 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2215 {
2216 if (!((processor_alias_table[i].flags & PTA_64BIT) != 0))
2217 {
2218 if (ix86_tune_defaulted)
2219 {
2220 opts->x_ix86_tune_string = "x86-64";
2221 for (i = 0; i < pta_size; i++)
2222 if (! strcmp (opts->x_ix86_tune_string,
2223 processor_alias_table[i].name))
2224 break;
2225 ix86_schedule = processor_alias_table[i].schedule;
2226 ix86_tune = processor_alias_table[i].processor;
2227 }
2228 else
2229 error ("CPU you selected does not support x86-64 "
2230 "instruction set");
2231 }
2232 }
2233 /* Intel CPUs have always interpreted SSE prefetch instructions as
2234 NOPs; so, we can enable SSE prefetch instructions even when
2235 -mtune (rather than -march) points us to a processor that has them.
2236 However, the VIA C3 gives a SIGILL, so we only do that for i686 and
2237 higher processors. */
2238 if (TARGET_CMOV
2239 && ((processor_alias_table[i].flags
2240 & (PTA_PREFETCH_SSE | PTA_SSE)) != 0))
08a4adcf 2241 ix86_prefetch_sse = true;
2bf6d935
ML		 2242 break;
2243 }
2244
2245 if (ix86_tune_specified && i == pta_size)
2246 {
2247 error (main_args_p
2248 ? G_("bad value (%qs) for %<-mtune=%> switch")
2249 : G_("bad value (%qs) for %<target(\"tune=\")%> attribute"),
2250 opts->x_ix86_tune_string);
2251
2252 auto_vec <const char *> candidates;
2253 for (i = 0; i < pta_size; i++)
324bec55
FW		 2254 if ((!TARGET_64BIT_P (opts->x_ix86_isa_flags)
2255 || ((processor_alias_table[i].flags & PTA_64BIT) != 0))
2256 && (processor_alias_table[i].flags & PTA_NO_TUNE) == 0)
2bf6d935
ML		 2257 candidates.safe_push (processor_alias_table[i].name);
2258
2259#ifdef HAVE_LOCAL_CPU_DETECT
2260 /* Add also "native" as possible value. */
2261 candidates.safe_push ("native");
2262#endif
2263
2264 char *s;
2265 const char *hint
2266 = candidates_list_and_hint (opts->x_ix86_tune_string, s, candidates);
2267 if (hint)
2268 inform (input_location,
2269 main_args_p
2270 ? G_("valid arguments to %<-mtune=%> switch are: "
2271 "%s; did you mean %qs?")
2272 : G_("valid arguments to %<target(\"tune=\")%> attribute are: "
2273 "%s; did you mean %qs?"), s, hint);
2274 else
2275 inform (input_location,
2276 main_args_p
2277 ? G_("valid arguments to %<-mtune=%> switch are: %s")
2278 : G_("valid arguments to %<target(\"tune=\")%> attribute "
2279 "are: %s"), s);
2280 XDELETEVEC (s);
2281 }
2282
1e964774 2283 set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
2bf6d935 2284
6bc89193 2285 ix86_recompute_optlev_based_flags (opts, opts_set);
2bf6d935
ML		 2286
2287 ix86_tune_cost = processor_cost_table[ix86_tune];
2288 /* TODO: ix86_cost should be chosen at instruction or function granuality
2289 so for cold code we use size_cost even in !optimize_size compilation. */
2290 if (opts->x_optimize_size)
2291 ix86_cost = &ix86_size_cost;
2292 else
2293 ix86_cost = ix86_tune_cost;
2294
2295 /* Arrange to set up i386_stack_locals for all functions. */
2296 init_machine_status = ix86_init_machine_status;
2297
2298 /* Validate -mregparm= value. */
2299 if (opts_set->x_ix86_regparm)
2300 {
2301 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2302 warning (0, "%<-mregparm%> is ignored in 64-bit mode");
2303 else if (TARGET_IAMCU_P (opts->x_target_flags))
2304 warning (0, "%<-mregparm%> is ignored for Intel MCU psABI");
2305 if (opts->x_ix86_regparm > REGPARM_MAX)
2306 {
2307 error ("%<-mregparm=%d%> is not between 0 and %d",
2308 opts->x_ix86_regparm, REGPARM_MAX);
2309 opts->x_ix86_regparm = 0;
2310 }
2311 }
2312 if (TARGET_IAMCU_P (opts->x_target_flags)
2313 || TARGET_64BIT_P (opts->x_ix86_isa_flags))
2314 opts->x_ix86_regparm = REGPARM_MAX;
2315
2316 /* Default align_* from the processor table. */
2317 ix86_default_align (opts);
2318
2319 /* Provide default for -mbranch-cost= value. */
6ed76044
ML		 2320 SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
2321 ix86_tune_cost->branch_cost);
2bf6d935
ML		 2322
2323 if (TARGET_64BIT_P (opts->x_ix86_isa_flags))
2324 {
2325 opts->x_target_flags
2326 |= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
2327
2328 if (!ix86_arch_specified)
2329 opts->x_ix86_isa_flags
2330 |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2331
716bb02b
UB		 2332 if (!TARGET_128BIT_LONG_DOUBLE_P (opts->x_target_flags))
2333 error ("%<-m96bit-long-double%> is not compatible with this target");
2334
2bf6d935
ML		 2335 if (TARGET_RTD_P (opts->x_target_flags))
2336 warning (0,
2337 main_args_p
2338 ? G_("%<-mrtd%> is ignored in 64bit mode")
2339 : G_("%<target(\"rtd\")%> is ignored in 64bit mode"));
2340 }
2341 else
2342 {
2343 opts->x_target_flags
2344 |= TARGET_SUBTARGET32_DEFAULT & ~opts_set->x_target_flags;
2345
2346 if (!ix86_arch_specified)
2347 opts->x_ix86_isa_flags
2348 |= TARGET_SUBTARGET32_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
2349
2350 /* i386 ABI does not specify red zone. It still makes sense to use it
2351 when programmer takes care to stack from being destroyed. */
2352 if (!(opts_set->x_target_flags & MASK_NO_RED_ZONE))
2353 opts->x_target_flags |= MASK_NO_RED_ZONE;
2354 }
2355
2356 /* Keep nonleaf frame pointers. */
2357 if (opts->x_flag_omit_frame_pointer)
2358 opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
2359 else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags))
2360 opts->x_flag_omit_frame_pointer = 1;
2361
2362 /* If we're doing fast math, we don't care about comparison order
2363 wrt NaNs. This lets us use a shorter comparison sequence. */
2364 if (opts->x_flag_finite_math_only)
2365 opts->x_target_flags &= ~MASK_IEEE_FP;
2366
2367 /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387,
2368 since the insns won't need emulation. */
2369 if (ix86_tune_features [X86_TUNE_ALWAYS_FANCY_MATH_387])
2370 opts->x_target_flags &= ~MASK_NO_FANCY_MATH_387;
2371
2372 /* Likewise, if the target doesn't have a 387, or we've specified
2373 software floating point, don't use 387 inline intrinsics. */
2374 if (!TARGET_80387_P (opts->x_target_flags))
2375 opts->x_target_flags |= MASK_NO_FANCY_MATH_387;
2376
2377 /* Turn on MMX builtins for -msse. */
2378 if (TARGET_SSE_P (opts->x_ix86_isa_flags))
2379 opts->x_ix86_isa_flags
2380 |= OPTION_MASK_ISA_MMX & ~opts->x_ix86_isa_flags_explicit;
2381
2382 /* Enable SSE prefetch. */
2383 if (TARGET_SSE_P (opts->x_ix86_isa_flags)
2384 || (TARGET_PRFCHW_P (opts->x_ix86_isa_flags)
2385 && !TARGET_3DNOW_P (opts->x_ix86_isa_flags))
2386 || TARGET_PREFETCHWT1_P (opts->x_ix86_isa_flags))
08a4adcf 2387 ix86_prefetch_sse = true;
2bf6d935 2388
d8c6cc2c
L		 2389 /* Enable mwait/monitor instructions for -msse3. */
2390 if (TARGET_SSE3_P (opts->x_ix86_isa_flags))
2391 opts->x_ix86_isa_flags2
2392 |= OPTION_MASK_ISA2_MWAIT & ~opts->x_ix86_isa_flags2_explicit;
2393
2bf6d935
ML		 2394 /* Enable popcnt instruction for -msse4.2 or -mabm. */
2395 if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
2396 || TARGET_ABM_P (opts->x_ix86_isa_flags))
2397 opts->x_ix86_isa_flags
2398 |= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
2399
39671f87
L		 2400 /* Enable crc32 instruction for -msse4.2. */
2401 if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags))
2402 opts->x_ix86_isa_flags
2403 |= OPTION_MASK_ISA_CRC32 & ~opts->x_ix86_isa_flags_explicit;
2404
2bf6d935
ML		 2405 /* Enable lzcnt instruction for -mabm. */
2406 if (TARGET_ABM_P(opts->x_ix86_isa_flags))
2407 opts->x_ix86_isa_flags
2408 |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
2409
2410 /* Disable BMI, BMI2 and TBM instructions for -m16. */
2411 if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
2412 opts->x_ix86_isa_flags
2413 &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
2414 & ~opts->x_ix86_isa_flags_explicit);
2415
2416 /* Validate -mpreferred-stack-boundary= value or default it to
2417 PREFERRED_STACK_BOUNDARY_DEFAULT. */
2418 ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
2419 if (opts_set->x_ix86_preferred_stack_boundary_arg)
2420 {
2421 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags)? 3 : 2;
2422 int max = TARGET_SEH ? 4 : 12;
2423
2424 if (opts->x_ix86_preferred_stack_boundary_arg < min
2425 || opts->x_ix86_preferred_stack_boundary_arg > max)
2426 {
2427 if (min == max)
2428 error ("%<-mpreferred-stack-boundary%> is not supported "
2429 "for this target");
2430 else
2431 error ("%<-mpreferred-stack-boundary=%d%> is not between %d and %d",
2432 opts->x_ix86_preferred_stack_boundary_arg, min, max);
2433 }
2434 else
2435 ix86_preferred_stack_boundary
2436 = (1 << opts->x_ix86_preferred_stack_boundary_arg) * BITS_PER_UNIT;
2437 }
2438
2439 /* Set the default value for -mstackrealign. */
6ed76044
ML		 2440 SET_OPTION_IF_UNSET (opts, opts_set, ix86_force_align_arg_pointer,
2441 STACK_REALIGN_DEFAULT);
2bf6d935
ML		 2442
2443 ix86_default_incoming_stack_boundary = PREFERRED_STACK_BOUNDARY;
2444
2445 /* Validate -mincoming-stack-boundary= value or default it to
2446 MIN_STACK_BOUNDARY/PREFERRED_STACK_BOUNDARY. */
2447 ix86_incoming_stack_boundary = ix86_default_incoming_stack_boundary;
2448 if (opts_set->x_ix86_incoming_stack_boundary_arg)
2449 {
2450 int min = TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2;
2451
2452 if (opts->x_ix86_incoming_stack_boundary_arg < min
2453 || opts->x_ix86_incoming_stack_boundary_arg > 12)
2454 error ("%<-mincoming-stack-boundary=%d%> is not between %d and 12",
2455 opts->x_ix86_incoming_stack_boundary_arg, min);
2456 else
2457 {
2458 ix86_user_incoming_stack_boundary
2459 = (1 << opts->x_ix86_incoming_stack_boundary_arg) * BITS_PER_UNIT;
2460 ix86_incoming_stack_boundary
2461 = ix86_user_incoming_stack_boundary;
2462 }
2463 }
2464
2465#ifndef NO_PROFILE_COUNTERS
2466 if (flag_nop_mcount)
2467 error ("%<-mnop-mcount%> is not compatible with this target");
2468#endif
2469 if (flag_nop_mcount && flag_pic)
2470 error ("%<-mnop-mcount%> is not implemented for %<-fPIC%>");
2471
2472 /* Accept -msseregparm only if at least SSE support is enabled. */
2473 if (TARGET_SSEREGPARM_P (opts->x_target_flags)
2474 && ! TARGET_SSE_P (opts->x_ix86_isa_flags))
2475 error (main_args_p
2476 ? G_("%<-msseregparm%> used without SSE enabled")
2477 : G_("%<target(\"sseregparm\")%> used without SSE enabled"));
2478
2479 if (opts_set->x_ix86_fpmath)
2480 {
2481 if (opts->x_ix86_fpmath & FPMATH_SSE)
2482 {
2483 if (!TARGET_SSE_P (opts->x_ix86_isa_flags))
2484 {
2485 if (TARGET_80387_P (opts->x_target_flags))
2486 {
2487 warning (0, "SSE instruction set disabled, using 387 arithmetics");
2488 opts->x_ix86_fpmath = FPMATH_387;
2489 }
2490 }
2491 else if ((opts->x_ix86_fpmath & FPMATH_387)
2492 && !TARGET_80387_P (opts->x_target_flags))
2493 {
2494 warning (0, "387 instruction set disabled, using SSE arithmetics");
2495 opts->x_ix86_fpmath = FPMATH_SSE;
2496 }
2497 }
2498 }
2499 /* For all chips supporting SSE2, -mfpmath=sse performs better than
2500 fpmath=387. The second is however default at many targets since the
2501 extra 80bit precision of temporaries is considered to be part of ABI.
2502 Overwrite the default at least for -ffast-math.
2503 TODO: -mfpmath=both seems to produce same performing code with bit
2504 smaller binaries. It is however not clear if register allocation is
2505 ready for this setting.
2506 Also -mfpmath=387 is overall a lot more compact (bout 4-5%) than SSE
2507 codegen. We may switch to 387 with -ffast-math for size optimized
2508 functions. */
2509 else if (fast_math_flags_set_p (&global_options)
2510 && TARGET_SSE2_P (opts->x_ix86_isa_flags))
2511 opts->x_ix86_fpmath = FPMATH_SSE;
2512 else
2513 opts->x_ix86_fpmath = TARGET_FPMATH_DEFAULT_P (opts->x_ix86_isa_flags);
2514
2515 /* Use external vectorized library in vectorizing intrinsics. */
2516 if (opts_set->x_ix86_veclibabi_type)
2517 switch (opts->x_ix86_veclibabi_type)
2518 {
2519 case ix86_veclibabi_type_svml:
2520 ix86_veclib_handler = &ix86_veclibabi_svml;
2521 break;
2522
2523 case ix86_veclibabi_type_acml:
2524 ix86_veclib_handler = &ix86_veclibabi_acml;
2525 break;
2526
2527 default:
2528 gcc_unreachable ();
2529 }
2530
2531 if (ix86_tune_features [X86_TUNE_ACCUMULATE_OUTGOING_ARGS]
2532 && !(opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2533 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2534
2535 /* If stack probes are required, the space used for large function
2536 arguments on the stack must also be probed, so enable
2537 -maccumulate-outgoing-args so this happens in the prologue. */
2538 if (TARGET_STACK_PROBE_P (opts->x_target_flags)
2539 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2540 {
2541 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2542 warning (0,
2543 main_args_p
2544 ? G_("stack probing requires %<-maccumulate-outgoing-args%> "
2545 "for correctness")
2546 : G_("stack probing requires "
2547 "%<target(\"accumulate-outgoing-args\")%> for "
2548 "correctness"));
2549 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2550 }
2551
2552 /* Stack realignment without -maccumulate-outgoing-args requires %ebp,
2553 so enable -maccumulate-outgoing-args when %ebp is fixed. */
2554 if (fixed_regs[BP_REG]
2555 && !(opts->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS))
2556 {
2557 if (opts_set->x_target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
2558 warning (0,
2559 main_args_p
2560 ? G_("fixed ebp register requires "
2561 "%<-maccumulate-outgoing-args%>")
2562 : G_("fixed ebp register requires "
2563 "%<target(\"accumulate-outgoing-args\")%>"));
2564 opts->x_target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS;
2565 }
2566
2567 /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */
2568 {
2569 char *p;
2570 ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0);
2571 p = strchr (internal_label_prefix, 'X');
2572 internal_label_prefix_len = p - internal_label_prefix;
2573 *p = '\0';
2574 }
2575
2576 /* When scheduling description is not available, disable scheduler pass
2577 so it won't slow down the compilation and make x87 code slower. */
2578 if (!TARGET_SCHEDULE)
2579 opts->x_flag_schedule_insns_after_reload = opts->x_flag_schedule_insns = 0;
2580
028d4092
ML		 2581 SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
2582 ix86_tune_cost->simultaneous_prefetches);
2583 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
2584 ix86_tune_cost->prefetch_block);
2585 SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
2586 ix86_tune_cost->l1_cache_size);
2587 SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
2588 ix86_tune_cost->l2_cache_size);
2bf6d935 2589
76b75018
JM		 2590 /* 64B is the accepted value for these for all x86. */
2591 SET_OPTION_IF_UNSET (&global_options, &global_options_set,
2592 param_destruct_interfere_size, 64);
2593 SET_OPTION_IF_UNSET (&global_options, &global_options_set,
2594 param_construct_interfere_size, 64);
2595
2bf6d935
ML		 2596 /* Enable sw prefetching at -O3 for CPUS that prefetching is helpful. */
2597 if (opts->x_flag_prefetch_loop_arrays < 0
2598 && HAVE_prefetch
2599 && (opts->x_optimize >= 3 || opts->x_flag_profile_use)
2600 && !opts->x_optimize_size
2601 && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
2602 opts->x_flag_prefetch_loop_arrays = 1;
2603
2604 /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)
2605 can be opts->x_optimized to ap = __builtin_next_arg (0). */
2606 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
2607 targetm.expand_builtin_va_start = NULL;
2608
2bf6d935
ML		 2609#ifdef USE_IX86_CLD
2610 /* Use -mcld by default for 32-bit code if configured with --enable-cld. */
2611 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
2612 opts->x_target_flags |= MASK_CLD & ~opts_set->x_target_flags;
2613#endif
2614
2615 /* Set the default value for -mfentry. */
2616 if (!opts_set->x_flag_fentry)
2617 opts->x_flag_fentry = TARGET_SEH;
2618 else
2619 {
2620 if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && opts->x_flag_pic
2621 && opts->x_flag_fentry)
2622 sorry ("%<-mfentry%> isn%'t supported for 32-bit in combination "
2623 "with %<-fpic%>");
2624 else if (TARGET_SEH && !opts->x_flag_fentry)
2625 sorry ("%<-mno-fentry%> isn%'t compatible with SEH");
2626 }
2627
2628 if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
2629 sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH");
2630
2631 if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
2632 && TARGET_EMIT_VZEROUPPER)
2633 opts->x_target_flags |= MASK_VZEROUPPER;
2634 if (!(opts_set->x_target_flags & MASK_STV))
2635 opts->x_target_flags |= MASK_STV;
2636 /* Disable STV if -mpreferred-stack-boundary={2,3} or
2637 -mincoming-stack-boundary={2,3} or -mstackrealign - the needed
2638 stack realignment will be extra cost the pass doesn't take into
2639 account and the pass can't realign the stack. */
2640 if (ix86_preferred_stack_boundary < 128
2641 || ix86_incoming_stack_boundary < 128
2642 || opts->x_ix86_force_align_arg_pointer)
2643 opts->x_target_flags &= ~MASK_STV;
2644 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
2645 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
2646 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD;
342de04d 2647 else if (!main_args_p
2648 && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL])
2649 opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_LOAD;
2650
2bf6d935
ML		 2651 if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]
2652 && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE))
2653 opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;
342de04d 2654 else if (!main_args_p
2655 && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL])
2656 opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_STORE;
2bf6d935
ML		 2657
2658 /* Enable 128-bit AVX instruction generation
2659 for the auto-vectorizer. */
586bbef1 2660 if (ix86_tune_features[X86_TUNE_AVX128_OPTIMAL]
2bf6d935
ML		 2661 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2662 opts->x_prefer_vector_width_type = PVW_AVX128;
2663
2664 /* Use 256-bit AVX instruction generation
2665 in the auto-vectorizer. */
2666 if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL]
2667 && (opts_set->x_prefer_vector_width_type == PVW_NONE))
2668 opts->x_prefer_vector_width_type = PVW_AVX256;
2669
2670 if (opts->x_ix86_recip_name)
2671 {
2672 char *p = ASTRDUP (opts->x_ix86_recip_name);
2673 char *q;
5ebdd535 2674 unsigned int mask;
2bf6d935
ML		 2675 bool invert;
2676
2677 while ((q = strtok (p, ",")) != NULL)
2678 {
2679 p = NULL;
2680 if (*q == '!')
2681 {
2682 invert = true;
2683 q++;
2684 }
2685 else
2686 invert = false;
2687
2688 if (!strcmp (q, "default"))
2689 mask = RECIP_MASK_ALL;
2690 else
2691 {
2692 for (i = 0; i < ARRAY_SIZE (recip_options); i++)
2693 if (!strcmp (q, recip_options[i].string))
2694 {
2695 mask = recip_options[i].mask;
2696 break;
2697 }
2698
2699 if (i == ARRAY_SIZE (recip_options))
2700 {
2701 error ("unknown option for %<-mrecip=%s%>", q);
2702 invert = false;
2703 mask = RECIP_MASK_NONE;
2704 }
2705 }
2706
2707 opts->x_recip_mask_explicit |= mask;
2708 if (invert)
2709 opts->x_recip_mask &= ~mask;
2710 else
2711 opts->x_recip_mask |= mask;
2712 }
2713 }
2714
2715 if (TARGET_RECIP_P (opts->x_target_flags))
2716 opts->x_recip_mask |= RECIP_MASK_ALL & ~opts->x_recip_mask_explicit;
2717 else if (opts_set->x_target_flags & MASK_RECIP)
2718 opts->x_recip_mask &= ~(RECIP_MASK_ALL & ~opts->x_recip_mask_explicit);
2719
2720 /* Default long double to 64-bit for 32-bit Bionic and to __float128
2721 for 64-bit Bionic. Also default long double to 64-bit for Intel
2722 MCU psABI. */
2723 if ((TARGET_HAS_BIONIC || TARGET_IAMCU)
2724 && !(opts_set->x_target_flags
2725 & (MASK_LONG_DOUBLE_64 | MASK_LONG_DOUBLE_128)))
2726 opts->x_target_flags |= (TARGET_64BIT
2727 ? MASK_LONG_DOUBLE_128
2728 : MASK_LONG_DOUBLE_64);
2729
2730 /* Only one of them can be active. */
2731 gcc_assert ((opts->x_target_flags & MASK_LONG_DOUBLE_64) == 0
2732 || (opts->x_target_flags & MASK_LONG_DOUBLE_128) == 0);
2733
2734 /* Handle stack protector */
2735 if (!opts_set->x_ix86_stack_protector_guard)
2736 {
2737#ifdef TARGET_THREAD_SSP_OFFSET
2738 if (!TARGET_HAS_BIONIC)
2739 opts->x_ix86_stack_protector_guard = SSP_TLS;
2740 else
2741#endif
2742 opts->x_ix86_stack_protector_guard = SSP_GLOBAL;
2743 }
2744
2745 if (opts_set->x_ix86_stack_protector_guard_offset_str)
2746 {
2747 char *endp;
2748 const char *str = opts->x_ix86_stack_protector_guard_offset_str;
2749
2750 errno = 0;
2751 int64_t offset;
2752
2753#if defined(INT64_T_IS_LONG)
2754 offset = strtol (str, &endp, 0);
2755#else
2756 offset = strtoll (str, &endp, 0);
2757#endif
2758
2759 if (!*str || *endp || errno)
2760 error ("%qs is not a valid number "
2761 "in %<-mstack-protector-guard-offset=%>", str);
2762
2763 if (!IN_RANGE (offset, HOST_WIDE_INT_C (-0x80000000),
2764 HOST_WIDE_INT_C (0x7fffffff)))
2765 error ("%qs is not a valid offset "
2766 "in %<-mstack-protector-guard-offset=%>", str);
2767
2768 opts->x_ix86_stack_protector_guard_offset = offset;
2769 }
2770#ifdef TARGET_THREAD_SSP_OFFSET
2771 else
2772 opts->x_ix86_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
2773#endif
2774
2775 if (opts_set->x_ix86_stack_protector_guard_reg_str)
2776 {
2777 const char *str = opts->x_ix86_stack_protector_guard_reg_str;
2778 addr_space_t seg = ADDR_SPACE_GENERIC;
2779
2780 /* Discard optional register prefix. */
2781 if (str[0] == '%')
2782 str++;
2783
2784 if (strlen (str) == 2 && str[1] == 's')
2785 {
2786 if (str[0] == 'f')
2787 seg = ADDR_SPACE_SEG_FS;
2788 else if (str[0] == 'g')
2789 seg = ADDR_SPACE_SEG_GS;
2790 }
2791
2792 if (seg == ADDR_SPACE_GENERIC)
2793 error ("%qs is not a valid base register "
2794 "in %<-mstack-protector-guard-reg=%>",
2795 opts->x_ix86_stack_protector_guard_reg_str);
2796
2797 opts->x_ix86_stack_protector_guard_reg = seg;
2798 }
2799 else
2800 {
2801 opts->x_ix86_stack_protector_guard_reg = DEFAULT_TLS_SEG_REG;
2802
2803 /* The kernel uses a different segment register for performance
2804 reasons; a system call would not have to trash the userspace
2805 segment register, which would be expensive. */
2806 if (opts->x_ix86_cmodel == CM_KERNEL)
2807 opts->x_ix86_stack_protector_guard_reg = ADDR_SPACE_SEG_GS;
2808 }
2809
2810 /* Handle -mmemcpy-strategy= and -mmemset-strategy= */
2811 if (opts->x_ix86_tune_memcpy_strategy)
2812 {
2813 char *str = xstrdup (opts->x_ix86_tune_memcpy_strategy);
2814 ix86_parse_stringop_strategy_string (str, false);
2815 free (str);
2816 }
2817
2818 if (opts->x_ix86_tune_memset_strategy)
2819 {
2820 char *str = xstrdup (opts->x_ix86_tune_memset_strategy);
2821 ix86_parse_stringop_strategy_string (str, true);
2822 free (str);
2823 }
2824
2825 /* Save the initial options in case the user does function specific
2826 options. */
2827 if (main_args_p)
e401db7b
JJ		 2828 {
2829 opts->x_ix86_excess_precision
2830 = opts->x_flag_excess_precision;
2831 opts->x_ix86_unsafe_math_optimizations
2832 = opts->x_flag_unsafe_math_optimizations;
2833 target_option_default_node = target_option_current_node
2834 = build_target_option_node (opts, opts_set);
2835 }
2bf6d935
ML		 2836
2837 if (opts->x_flag_cf_protection != CF_NONE)
77d372ab
L		 2838 {
2839 if ((opts->x_flag_cf_protection & CF_BRANCH) == CF_BRANCH
2840 && !TARGET_64BIT && !TARGET_CMOV)
2841 error ("%<-fcf-protection%> is not compatible with this target");
2842
2843 opts->x_flag_cf_protection
2bf6d935 2844 = (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
77d372ab 2845 }
2bf6d935 2846
105c2795 2847 if (ix86_tune_features [X86_TUNE_AVOID_256FMA_CHAINS])
028d4092 2848 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 256);
105c2795 2849 else if (ix86_tune_features [X86_TUNE_AVOID_128FMA_CHAINS])
028d4092 2850 SET_OPTION_IF_UNSET (opts, opts_set, param_avoid_fma_max_bits, 128);
2bf6d935
ML		 2851
2852 /* PR86952: jump table usage with retpolines is slow.
2853 The PR provides some numbers about the slowness. */
6ed76044
ML		 2854 if (ix86_indirect_branch != indirect_branch_keep)
2855 SET_OPTION_IF_UNSET (opts, opts_set, flag_jump_tables, 0);
2bf6d935 2856
c64d1522
KL		 2857 SET_OPTION_IF_UNSET (opts, opts_set, param_ira_consider_dup_in_all_alts, 0);
2858
a314d503
RB		 2859 /* Fully masking the main or the epilogue vectorized loop is not
2860 profitable generally so leave it disabled until we get more
2861 fine grained control & costing. */
2862 SET_OPTION_IF_UNSET (opts, opts_set, param_vect_partial_vector_usage, 0);
2863
2bf6d935
ML		 2864 return true;
2865}
2866
2867/* Implement the TARGET_OPTION_OVERRIDE hook. */
2868
2869void
2870ix86_option_override (void)
2871{
2872 ix86_option_override_internal (true, &global_options, &global_options_set);
2873}
2874
2875/* Remember the last target of ix86_set_current_function. */
2876static GTY(()) tree ix86_previous_fndecl;
2877
2878/* Set targets globals to the default (or current #pragma GCC target
2879 if active). Invalidate ix86_previous_fndecl cache. */
2880
2881void
2882ix86_reset_previous_fndecl (void)
2883{
2884 tree new_tree = target_option_current_node;
ba948b37
JJ		 2885 cl_target_option_restore (&global_options, &global_options_set,
2886 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML		 2887 if (TREE_TARGET_GLOBALS (new_tree))
2888 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
2889 else if (new_tree == target_option_default_node)
2890 restore_target_globals (&default_target_globals);
2891 else
2892 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
2893 ix86_previous_fndecl = NULL_TREE;
2894}
2895
2896/* Add target attribute to SIMD clone NODE if needed. */
2897
2898void
2899ix86_simd_clone_adjust (struct cgraph_node *node)
2900{
2901 const char *str = NULL;
2902
2903 /* Attributes need to be adjusted for definitions, not declarations. */
2904 if (!node->definition)
2905 return;
2906
2907 gcc_assert (node->decl == cfun->decl);
2908 switch (node->simdclone->vecsize_mangle)
2909 {
2910 case 'b':
2911 if (!TARGET_SSE2)
2912 str = "sse2";
2913 break;
2914 case 'c':
1609bedd
JJ		 2915 if (TARGET_PREFER_AVX128)
2916 {
2917 if (!TARGET_AVX)
2918 str = "avx,prefer-vector-width=256";
2919 else
2920 str = "prefer-vector-width=256";
2921 }
2922 else if (!TARGET_AVX)
2bf6d935
ML		 2923 str = "avx";
2924 break;
2925 case 'd':
1609bedd
JJ		 2926 if (TARGET_PREFER_AVX128)
2927 {
2928 if (!TARGET_AVX2)
2929 str = "avx2,prefer-vector-width=256";
2930 else
2931 str = "prefer-vector-width=256";
2932 }
2933 else if (!TARGET_AVX2)
2bf6d935
ML		 2934 str = "avx2";
2935 break;
2936 case 'e':
1609bedd
JJ		 2937 if (TARGET_PREFER_AVX256)
2938 {
2939 if (!TARGET_AVX512F)
2940 str = "avx512f,prefer-vector-width=512";
2941 else
2942 str = "prefer-vector-width=512";
2943 }
2944 else if (!TARGET_AVX512F)
2bf6d935
ML		 2945 str = "avx512f";
2946 break;
2947 default:
2948 gcc_unreachable ();
2949 }
2950 if (str == NULL)
2951 return;
2952 push_cfun (NULL);
2953 tree args = build_tree_list (NULL_TREE, build_string (strlen (str), str));
2954 bool ok = ix86_valid_target_attribute_p (node->decl, NULL, args, 0);
2955 gcc_assert (ok);
2956 pop_cfun ();
2957 ix86_reset_previous_fndecl ();
2958 ix86_set_current_function (node->decl);
2959}
2960
2961
2962
2963/* Set the func_type field from the function FNDECL. */
2964
2965static void
2966ix86_set_func_type (tree fndecl)
2967{
2968 if (cfun->machine->func_type == TYPE_UNKNOWN)
2969 {
2970 if (lookup_attribute ("interrupt",
2971 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
2972 {
2973 if (ix86_function_naked (fndecl))
2974 error_at (DECL_SOURCE_LOCATION (fndecl),
2975 "interrupt and naked attributes are not compatible");
2976
2977 int nargs = 0;
2978 for (tree arg = DECL_ARGUMENTS (fndecl);
2979 arg;
2980 arg = TREE_CHAIN (arg))
2981 nargs++;
2982 cfun->machine->no_caller_saved_registers = true;
2983 cfun->machine->func_type
2984 = nargs == 2 ? TYPE_EXCEPTION : TYPE_INTERRUPT;
2985
2986 ix86_optimize_mode_switching[X86_DIRFLAG] = 1;
2987
2988 /* Only dwarf2out.c can handle -WORD(AP) as a pointer argument. */
2989 if (write_symbols != NO_DEBUG && write_symbols != DWARF2_DEBUG)
2990 sorry ("only DWARF debug format is supported for interrupt "
2991 "service routine");
2992 }
2993 else
2994 {
2995 cfun->machine->func_type = TYPE_NORMAL;
2996 if (lookup_attribute ("no_caller_saved_registers",
2997 TYPE_ATTRIBUTES (TREE_TYPE (fndecl))))
2998 cfun->machine->no_caller_saved_registers = true;
2999 }
3000 }
3001}
3002
3003/* Set the indirect_branch_type field from the function FNDECL. */
3004
3005static void
3006ix86_set_indirect_branch_type (tree fndecl)
3007{
3008 if (cfun->machine->indirect_branch_type == indirect_branch_unset)
3009 {
3010 tree attr = lookup_attribute ("indirect_branch",
3011 DECL_ATTRIBUTES (fndecl));
3012 if (attr != NULL)
3013 {
3014 tree args = TREE_VALUE (attr);
3015 if (args == NULL)
3016 gcc_unreachable ();
3017 tree cst = TREE_VALUE (args);
3018 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3019 cfun->machine->indirect_branch_type = indirect_branch_keep;
3020 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3021 cfun->machine->indirect_branch_type = indirect_branch_thunk;
3022 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3023 cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
3024 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3025 cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
3026 else
3027 gcc_unreachable ();
3028 }
3029 else
3030 cfun->machine->indirect_branch_type = ix86_indirect_branch;
3031
3032 /* -mcmodel=large is not compatible with -mindirect-branch=thunk
3033 nor -mindirect-branch=thunk-extern. */
3034 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3035 && ((cfun->machine->indirect_branch_type
3036 == indirect_branch_thunk_extern)
3037 || (cfun->machine->indirect_branch_type
3038 == indirect_branch_thunk)))
3039 error ("%<-mindirect-branch=%s%> and %<-mcmodel=large%> are not "
3040 "compatible",
3041 ((cfun->machine->indirect_branch_type
3042 == indirect_branch_thunk_extern)
3043 ? "thunk-extern" : "thunk"));
3044
3045 if (cfun->machine->indirect_branch_type != indirect_branch_keep
9be3bb2c
L		 3046 && (cfun->machine->indirect_branch_type
3047 != indirect_branch_thunk_extern)
2bf6d935
ML		 3048 && (flag_cf_protection & CF_RETURN))
3049 error ("%<-mindirect-branch%> and %<-fcf-protection%> are not "
3050 "compatible");
3051 }
3052
3053 if (cfun->machine->function_return_type == indirect_branch_unset)
3054 {
3055 tree attr = lookup_attribute ("function_return",
3056 DECL_ATTRIBUTES (fndecl));
3057 if (attr != NULL)
3058 {
3059 tree args = TREE_VALUE (attr);
3060 if (args == NULL)
3061 gcc_unreachable ();
3062 tree cst = TREE_VALUE (args);
3063 if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
3064 cfun->machine->function_return_type = indirect_branch_keep;
3065 else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
3066 cfun->machine->function_return_type = indirect_branch_thunk;
3067 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
3068 cfun->machine->function_return_type = indirect_branch_thunk_inline;
3069 else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
3070 cfun->machine->function_return_type = indirect_branch_thunk_extern;
3071 else
3072 gcc_unreachable ();
3073 }
3074 else
3075 cfun->machine->function_return_type = ix86_function_return;
3076
3077 /* -mcmodel=large is not compatible with -mfunction-return=thunk
3078 nor -mfunction-return=thunk-extern. */
3079 if ((ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3080 && ((cfun->machine->function_return_type
3081 == indirect_branch_thunk_extern)
3082 || (cfun->machine->function_return_type
3083 == indirect_branch_thunk)))
3084 error ("%<-mfunction-return=%s%> and %<-mcmodel=large%> are not "
3085 "compatible",
3086 ((cfun->machine->function_return_type
3087 == indirect_branch_thunk_extern)
3088 ? "thunk-extern" : "thunk"));
3089
3090 if (cfun->machine->function_return_type != indirect_branch_keep
9be3bb2c
L		 3091 && (cfun->machine->function_return_type
3092 != indirect_branch_thunk_extern)
2bf6d935
ML		 3093 && (flag_cf_protection & CF_RETURN))
3094 error ("%<-mfunction-return%> and %<-fcf-protection%> are not "
3095 "compatible");
3096 }
3097}
3098
3099/* Establish appropriate back-end context for processing the function
3100 FNDECL. The argument might be NULL to indicate processing at top
3101 level, outside of any function scope. */
3102void
3103ix86_set_current_function (tree fndecl)
3104{
3105 /* Only change the context if the function changes. This hook is called
3106 several times in the course of compiling a function, and we don't want to
3107 slow things down too much or call target_reinit when it isn't safe. */
3108 if (fndecl == ix86_previous_fndecl)
3109 {
3110 /* There may be 2 function bodies for the same function FNDECL,
3111 one is extern inline and one isn't. Call ix86_set_func_type
3112 to set the func_type field. */
3113 if (fndecl != NULL_TREE)
3114 {
3115 ix86_set_func_type (fndecl);
3116 ix86_set_indirect_branch_type (fndecl);
3117 }
3118 return;
3119 }
3120
3121 tree old_tree;
3122 if (ix86_previous_fndecl == NULL_TREE)
3123 old_tree = target_option_current_node;
3124 else if (DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl))
3125 old_tree = DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl);
3126 else
3127 old_tree = target_option_default_node;
3128
3129 if (fndecl == NULL_TREE)
3130 {
3131 if (old_tree != target_option_current_node)
3132 ix86_reset_previous_fndecl ();
3133 return;
3134 }
3135
3136 ix86_set_func_type (fndecl);
3137 ix86_set_indirect_branch_type (fndecl);
3138
3139 tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
3140 if (new_tree == NULL_TREE)
3141 new_tree = target_option_default_node;
3142
3143 if (old_tree != new_tree)
3144 {
ba948b37
JJ		 3145 cl_target_option_restore (&global_options, &global_options_set,
3146 TREE_TARGET_OPTION (new_tree));
2bf6d935
ML		 3147 if (TREE_TARGET_GLOBALS (new_tree))
3148 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3149 else if (new_tree == target_option_default_node)
3150 restore_target_globals (&default_target_globals);
3151 else
3152 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3153 }
e401db7b
JJ		 3154 else if (flag_unsafe_math_optimizations
3155 != TREE_TARGET_OPTION (new_tree)->x_ix86_unsafe_math_optimizations
3156 || (flag_excess_precision
3157 != TREE_TARGET_OPTION (new_tree)->x_ix86_excess_precision))
3158 {
3159 cl_target_option_restore (&global_options, &global_options_set,
3160 TREE_TARGET_OPTION (new_tree));
3161 ix86_excess_precision = flag_excess_precision;
3162 ix86_unsafe_math_optimizations = flag_unsafe_math_optimizations;
3163 DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_tree
3164 = build_target_option_node (&global_options, &global_options_set);
3165 if (TREE_TARGET_GLOBALS (new_tree))
3166 restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
3167 else if (new_tree == target_option_default_node)
3168 restore_target_globals (&default_target_globals);
3169 else
3170 TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
3171 }
2bf6d935
ML		 3172 ix86_previous_fndecl = fndecl;
3173
3174 static bool prev_no_caller_saved_registers;
3175
3176 /* 64-bit MS and SYSV ABI have different set of call used registers.
3177 Avoid expensive re-initialization of init_regs each time we switch
3178 function context. */
3179 if (TARGET_64BIT
a365fa06 3180 && (call_used_or_fixed_reg_p (SI_REG)
2bf6d935
ML		 3181 == (cfun->machine->call_abi == MS_ABI)))
3182 reinit_regs ();
3183 /* Need to re-initialize init_regs if caller-saved registers are
3184 changed. */
3185 else if (prev_no_caller_saved_registers
3186 != cfun->machine->no_caller_saved_registers)
3187 reinit_regs ();
3188
3189 if (cfun->machine->func_type != TYPE_NORMAL
3190 || cfun->machine->no_caller_saved_registers)
3191 {
3192 /* Don't allow SSE, MMX nor x87 instructions since they
3193 may change processor state. */
3194 const char *isa;
3195 if (TARGET_SSE)
3196 isa = "SSE";
3197 else if (TARGET_MMX)
3198 isa = "MMX/3Dnow";
3199 else if (TARGET_80387)
3200 isa = "80387";
3201 else
3202 isa = NULL;
3203 if (isa != NULL)
3204 {
3205 if (cfun->machine->func_type != TYPE_NORMAL)
3206 sorry (cfun->machine->func_type == TYPE_EXCEPTION
3207 ? G_("%s instructions aren%'t allowed in an"
3208 " exception service routine")
3209 : G_("%s instructions aren%'t allowed in an"
3210 " interrupt service routine"),
3211 isa);
3212 else
3213 sorry ("%s instructions aren%'t allowed in a function with "
3214 "the %<no_caller_saved_registers%> attribute", isa);
3215 /* Don't issue the same error twice. */
3216 cfun->machine->func_type = TYPE_NORMAL;
3217 cfun->machine->no_caller_saved_registers = false;
3218 }
3219 }
3220
3221 prev_no_caller_saved_registers
3222 = cfun->machine->no_caller_saved_registers;
3223}
3224
3225/* Implement the TARGET_OFFLOAD_OPTIONS hook. */
3226char *
3227ix86_offload_options (void)
3228{
3229 if (TARGET_LP64)
3230 return xstrdup ("-foffload-abi=lp64");
3231 return xstrdup ("-foffload-abi=ilp32");
3232}
3233
3234/* Handle "cdecl", "stdcall", "fastcall", "regparm", "thiscall",
3235 and "sseregparm" calling convention attributes;
3236 arguments as in struct attribute_spec.handler. */
3237
3238static tree
3239ix86_handle_cconv_attribute (tree *node, tree name, tree args, int,
3240 bool *no_add_attrs)
3241{
3242 if (TREE_CODE (*node) != FUNCTION_TYPE
3243 && TREE_CODE (*node) != METHOD_TYPE
3244 && TREE_CODE (*node) != FIELD_DECL
3245 && TREE_CODE (*node) != TYPE_DECL)
3246 {
3247 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3248 name);
3249 *no_add_attrs = true;
3250 return NULL_TREE;
3251 }
3252
3253 /* Can combine regparm with all attributes but fastcall, and thiscall. */
3254 if (is_attribute_p ("regparm", name))
3255 {
3256 tree cst;
3257
3258 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3259 {
3260 error ("fastcall and regparm attributes are not compatible");
3261 }
3262
3263 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3264 {
3265 error ("regparam and thiscall attributes are not compatible");
3266 }
3267
3268 cst = TREE_VALUE (args);
3269 if (TREE_CODE (cst) != INTEGER_CST)
3270 {
3271 warning (OPT_Wattributes,
3272 "%qE attribute requires an integer constant argument",
3273 name);
3274 *no_add_attrs = true;
3275 }
3276 else if (compare_tree_int (cst, REGPARM_MAX) > 0)
3277 {
3278 warning (OPT_Wattributes, "argument to %qE attribute larger than %d",
3279 name, REGPARM_MAX);
3280 *no_add_attrs = true;
3281 }
3282
3283 return NULL_TREE;
3284 }
3285
3286 if (TARGET_64BIT)
3287 {
3288 /* Do not warn when emulating the MS ABI. */
3289 if ((TREE_CODE (*node) != FUNCTION_TYPE
3290 && TREE_CODE (*node) != METHOD_TYPE)
3291 || ix86_function_type_abi (*node) != MS_ABI)
3292 warning (OPT_Wattributes, "%qE attribute ignored",
3293 name);
3294 *no_add_attrs = true;
3295 return NULL_TREE;
3296 }
3297
3298 /* Can combine fastcall with stdcall (redundant) and sseregparm. */
3299 if (is_attribute_p ("fastcall", name))
3300 {
3301 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3302 {
3303 error ("fastcall and cdecl attributes are not compatible");
3304 }
3305 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3306 {
3307 error ("fastcall and stdcall attributes are not compatible");
3308 }
3309 if (lookup_attribute ("regparm", TYPE_ATTRIBUTES (*node)))
3310 {
3311 error ("fastcall and regparm attributes are not compatible");
3312 }
3313 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3314 {
3315 error ("fastcall and thiscall attributes are not compatible");
3316 }
3317 }
3318
3319 /* Can combine stdcall with fastcall (redundant), regparm and
3320 sseregparm. */
3321 else if (is_attribute_p ("stdcall", name))
3322 {
3323 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3324 {
3325 error ("stdcall and cdecl attributes are not compatible");
3326 }
3327 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3328 {
3329 error ("stdcall and fastcall attributes are not compatible");
3330 }
3331 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3332 {
3333 error ("stdcall and thiscall attributes are not compatible");
3334 }
3335 }
3336
3337 /* Can combine cdecl with regparm and sseregparm. */
3338 else if (is_attribute_p ("cdecl", name))
3339 {
3340 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3341 {
3342 error ("stdcall and cdecl attributes are not compatible");
3343 }
3344 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3345 {
3346 error ("fastcall and cdecl attributes are not compatible");
3347 }
3348 if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node)))
3349 {
3350 error ("cdecl and thiscall attributes are not compatible");
3351 }
3352 }
3353 else if (is_attribute_p ("thiscall", name))
3354 {
3355 if (TREE_CODE (*node) != METHOD_TYPE && pedantic)
3356 warning (OPT_Wattributes, "%qE attribute is used for non-class method",
3357 name);
3358 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node)))
3359 {
3360 error ("stdcall and thiscall attributes are not compatible");
3361 }
3362 if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node)))
3363 {
3364 error ("fastcall and thiscall attributes are not compatible");
3365 }
3366 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node)))
3367 {
3368 error ("cdecl and thiscall attributes are not compatible");
3369 }
3370 }
3371
3372 /* Can combine sseregparm with all attributes. */
3373
3374 return NULL_TREE;
3375}
3376
3377#ifndef CHECK_STACK_LIMIT
3378#define CHECK_STACK_LIMIT (-1)
3379#endif
3380
3381/* The transactional memory builtins are implicitly regparm or fastcall
3382 depending on the ABI. Override the generic do-nothing attribute that
3383 these builtins were declared with, and replace it with one of the two
3384 attributes that we expect elsewhere. */
3385
3386static tree
3387ix86_handle_tm_regparm_attribute (tree *node, tree, tree,
3388 int flags, bool *no_add_attrs)
3389{
3390 tree alt;
3391
3392 /* In no case do we want to add the placeholder attribute. */
3393 *no_add_attrs = true;
3394
3395 /* The 64-bit ABI is unchanged for transactional memory. */
3396 if (TARGET_64BIT)
3397 return NULL_TREE;
3398
3399 /* ??? Is there a better way to validate 32-bit windows? We have
3400 cfun->machine->call_abi, but that seems to be set only for 64-bit. */
3401 if (CHECK_STACK_LIMIT > 0)
3402 alt = tree_cons (get_identifier ("fastcall"), NULL, NULL);
3403 else
3404 {
3405 alt = tree_cons (NULL, build_int_cst (NULL, 2), NULL);
3406 alt = tree_cons (get_identifier ("regparm"), alt, NULL);
3407 }
3408 decl_attributes (node, alt, flags);
3409
3410 return NULL_TREE;
3411}
3412
3413/* Handle a "force_align_arg_pointer" attribute. */
3414
3415static tree
3416ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name,
3417 tree, int, bool *no_add_attrs)
3418{
3419 if (TREE_CODE (*node) != FUNCTION_TYPE
3420 && TREE_CODE (*node) != METHOD_TYPE
3421 && TREE_CODE (*node) != FIELD_DECL
3422 && TREE_CODE (*node) != TYPE_DECL)
3423 {
3424 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3425 name);
3426 *no_add_attrs = true;
3427 }
3428
3429 return NULL_TREE;
3430}
3431
3432/* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
3433 struct attribute_spec.handler. */
3434
3435static tree
3436ix86_handle_struct_attribute (tree *node, tree name, tree, int,
3437 bool *no_add_attrs)
3438{
3439 tree *type = NULL;
3440 if (DECL_P (*node))
3441 {
3442 if (TREE_CODE (*node) == TYPE_DECL)
3443 type = &TREE_TYPE (*node);
3444 }
3445 else
3446 type = node;
3447
3448 if (!(type && RECORD_OR_UNION_TYPE_P (*type)))
3449 {
3450 warning (OPT_Wattributes, "%qE attribute ignored",
3451 name);
3452 *no_add_attrs = true;
3453 }
3454
3455 else if ((is_attribute_p ("ms_struct", name)
3456 && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
3457 || ((is_attribute_p ("gcc_struct", name)
3458 && lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
3459 {
3460 warning (OPT_Wattributes, "%qE incompatible attribute ignored",
3461 name);
3462 *no_add_attrs = true;
3463 }
3464
3465 return NULL_TREE;
3466}
3467
3468/* Handle a "callee_pop_aggregate_return" attribute; arguments as
3469 in struct attribute_spec handler. */
3470
3471static tree
3472ix86_handle_callee_pop_aggregate_return (tree *node, tree name, tree args, int,
3473 bool *no_add_attrs)
3474{
3475 if (TREE_CODE (*node) != FUNCTION_TYPE
3476 && TREE_CODE (*node) != METHOD_TYPE
3477 && TREE_CODE (*node) != FIELD_DECL
3478 && TREE_CODE (*node) != TYPE_DECL)
3479 {
3480 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3481 name);
3482 *no_add_attrs = true;
3483 return NULL_TREE;
3484 }
3485 if (TARGET_64BIT)
3486 {
3487 warning (OPT_Wattributes, "%qE attribute only available for 32-bit",
3488 name);
3489 *no_add_attrs = true;
3490 return NULL_TREE;
3491 }
3492 if (is_attribute_p ("callee_pop_aggregate_return", name))
3493 {
3494 tree cst;
3495
3496 cst = TREE_VALUE (args);
3497 if (TREE_CODE (cst) != INTEGER_CST)
3498 {
3499 warning (OPT_Wattributes,
3500 "%qE attribute requires an integer constant argument",
3501 name);
3502 *no_add_attrs = true;
3503 }
3504 else if (compare_tree_int (cst, 0) != 0
3505 && compare_tree_int (cst, 1) != 0)
3506 {
3507 warning (OPT_Wattributes,
3508 "argument to %qE attribute is neither zero, nor one",
3509 name);
3510 *no_add_attrs = true;
3511 }
3512
3513 return NULL_TREE;
3514 }
3515
3516 return NULL_TREE;
3517}
3518
3519/* Handle a "ms_abi" or "sysv" attribute; arguments as in
3520 struct attribute_spec.handler. */
3521
3522static tree
3523ix86_handle_abi_attribute (tree *node, tree name, tree, int,
3524 bool *no_add_attrs)
3525{
3526 if (TREE_CODE (*node) != FUNCTION_TYPE
3527 && TREE_CODE (*node) != METHOD_TYPE
3528 && TREE_CODE (*node) != FIELD_DECL
3529 && TREE_CODE (*node) != TYPE_DECL)
3530 {
3531 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3532 name);
3533 *no_add_attrs = true;
3534 return NULL_TREE;
3535 }
3536
3537 /* Can combine regparm with all attributes but fastcall. */
3538 if (is_attribute_p ("ms_abi", name))
3539 {
3540 if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (*node)))
3541 {
a9c697b8
MS		 3542 error ("%qs and %qs attributes are not compatible",
3543 "ms_abi", "sysv_abi");
2bf6d935
ML		 3544 }
3545
3546 return NULL_TREE;
3547 }
3548 else if (is_attribute_p ("sysv_abi", name))
3549 {
3550 if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (*node)))
3551 {
a9c697b8
MS		 3552 error ("%qs and %qs attributes are not compatible",
3553 "ms_abi", "sysv_abi");
2bf6d935
ML		 3554 }
3555
3556 return NULL_TREE;
3557 }
3558
3559 return NULL_TREE;
3560}
3561
3562static tree
3563ix86_handle_fndecl_attribute (tree *node, tree name, tree args, int,
3564 bool *no_add_attrs)
3565{
3566 if (TREE_CODE (*node) != FUNCTION_DECL)
3567 {
3568 warning (OPT_Wattributes, "%qE attribute only applies to functions",
3569 name);
3570 *no_add_attrs = true;
3571 }
3572
3573 if (is_attribute_p ("indirect_branch", name))
3574 {
3575 tree cst = TREE_VALUE (args);
3576 if (TREE_CODE (cst) != STRING_CST)
3577 {
3578 warning (OPT_Wattributes,
3579 "%qE attribute requires a string constant argument",
3580 name);
3581 *no_add_attrs = true;
3582 }
3583 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3584 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3585 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3586 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3587 {
3588 warning (OPT_Wattributes,
3589 "argument to %qE attribute is not "
3590 "(keep|thunk|thunk-inline|thunk-extern)", name);
3591 *no_add_attrs = true;
3592 }
3593 }
3594
3595 if (is_attribute_p ("function_return", name))
3596 {
3597 tree cst = TREE_VALUE (args);
3598 if (TREE_CODE (cst) != STRING_CST)
3599 {
3600 warning (OPT_Wattributes,
3601 "%qE attribute requires a string constant argument",
3602 name);
3603 *no_add_attrs = true;
3604 }
3605 else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
3606 && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
3607 && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
3608 && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
3609 {
3610 warning (OPT_Wattributes,
3611 "argument to %qE attribute is not "
3612 "(keep|thunk|thunk-inline|thunk-extern)", name);
3613 *no_add_attrs = true;
3614 }
3615 }
3616
3617 return NULL_TREE;
3618}
3619
3620static tree
3621ix86_handle_no_caller_saved_registers_attribute (tree *, tree, tree,
3622 int, bool *)
3623{
3624 return NULL_TREE;
3625}
3626
3627static tree
3628ix86_handle_interrupt_attribute (tree *node, tree, tree, int, bool *)
3629{
3630 /* DECL_RESULT and DECL_ARGUMENTS do not exist there yet,
3631 but the function type contains args and return type data. */
3632 tree func_type = *node;
3633 tree return_type = TREE_TYPE (func_type);
3634
3635 int nargs = 0;
3636 tree current_arg_type = TYPE_ARG_TYPES (func_type);
3637 while (current_arg_type
3638 && ! VOID_TYPE_P (TREE_VALUE (current_arg_type)))
3639 {
3640 if (nargs == 0)
3641 {
3642 if (! POINTER_TYPE_P (TREE_VALUE (current_arg_type)))
3643 error ("interrupt service routine should have a pointer "
3644 "as the first argument");
3645 }
3646 else if (nargs == 1)
3647 {
3648 if (TREE_CODE (TREE_VALUE (current_arg_type)) != INTEGER_TYPE
3649 || TYPE_MODE (TREE_VALUE (current_arg_type)) != word_mode)
3650 error ("interrupt service routine should have %qs "
3651 "as the second argument",
3652 TARGET_64BIT
3653 ? (TARGET_X32 ? "unsigned long long int"
3654 : "unsigned long int")
3655 : "unsigned int");
3656 }
3657 nargs++;
3658 current_arg_type = TREE_CHAIN (current_arg_type);
3659 }
3660 if (!nargs || nargs > 2)
3661 error ("interrupt service routine can only have a pointer argument "
3662 "and an optional integer argument");
3663 if (! VOID_TYPE_P (return_type))
a9c697b8 3664 error ("interrupt service routine must return %<void%>");
2bf6d935
ML		 3665
3666 return NULL_TREE;
3667}
3668
3669/* Handle fentry_name / fentry_section attribute. */
3670
3671static tree
3672ix86_handle_fentry_name (tree *node, tree name, tree args,
3673 int, bool *no_add_attrs)
3674{
3675 if (TREE_CODE (*node) == FUNCTION_DECL
3676 && TREE_CODE (TREE_VALUE (args)) == STRING_CST)
3677 /* Do nothing else, just set the attribute. We'll get at
3678 it later with lookup_attribute. */
3679 ;
3680 else
3681 {
3682 warning (OPT_Wattributes, "%qE attribute ignored", name);
3683 *no_add_attrs = true;
3684 }
3685
3686 return NULL_TREE;
3687}
3688
3689/* Table of valid machine attributes. */
3690const struct attribute_spec ix86_attribute_table[] =
3691{
3692 /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
3693 affects_type_identity, handler, exclude } */
3694 /* Stdcall attribute says callee is responsible for popping arguments
3695 if they are not variable. */
3696 { "stdcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3697 NULL },
3698 /* Fastcall attribute says callee is responsible for popping arguments
3699 if they are not variable. */
3700 { "fastcall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3701 NULL },
3702 /* Thiscall attribute says callee is responsible for popping arguments
3703 if they are not variable. */
3704 { "thiscall", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3705 NULL },
3706 /* Cdecl attribute says the callee is a normal C declaration */
3707 { "cdecl", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3708 NULL },
3709 /* Regparm attribute specifies how many integer arguments are to be
3710 passed in registers. */
3711 { "regparm", 1, 1, false, true, true, true, ix86_handle_cconv_attribute,
3712 NULL },
3713 /* Sseregparm attribute says we are using x86_64 calling conventions
3714 for FP arguments. */
3715 { "sseregparm", 0, 0, false, true, true, true, ix86_handle_cconv_attribute,
3716 NULL },
3717 /* The transactional memory builtins are implicitly regparm or fastcall
3718 depending on the ABI. Override the generic do-nothing attribute that
3719 these builtins were declared with. */
3720 { "*tm regparm", 0, 0, false, true, true, true,
3721 ix86_handle_tm_regparm_attribute, NULL },
3722 /* force_align_arg_pointer says this function realigns the stack at entry. */
3723 { "force_align_arg_pointer", 0, 0,
3724 false, true, true, false, ix86_handle_force_align_arg_pointer_attribute,
3725 NULL },
3726#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
3727 { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
3728 NULL },
3729 { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
3730 NULL },
3731 { "shared", 0, 0, true, false, false, false,
3732 ix86_handle_shared_attribute, NULL },
3733#endif
3734 { "ms_struct", 0, 0, false, false, false, false,
3735 ix86_handle_struct_attribute, NULL },
3736 { "gcc_struct", 0, 0, false, false, false, false,
3737 ix86_handle_struct_attribute, NULL },
3738#ifdef SUBTARGET_ATTRIBUTE_TABLE
3739 SUBTARGET_ATTRIBUTE_TABLE,
3740#endif
3741 /* ms_abi and sysv_abi calling convention function attributes. */
3742 { "ms_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute, NULL },
3743 { "sysv_abi", 0, 0, false, true, true, true, ix86_handle_abi_attribute,
3744 NULL },
3745 { "ms_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3746 { "sysv_abi va_list", 0, 0, false, false, false, false, NULL, NULL },
3747 { "ms_hook_prologue", 0, 0, true, false, false, false,
3748 ix86_handle_fndecl_attribute, NULL },
3749 { "callee_pop_aggregate_return", 1, 1, false, true, true, true,
3750 ix86_handle_callee_pop_aggregate_return, NULL },
3751 { "interrupt", 0, 0, false, true, true, false,
3752 ix86_handle_interrupt_attribute, NULL },
3753 { "no_caller_saved_registers", 0, 0, false, true, true, false,
3754 ix86_handle_no_caller_saved_registers_attribute, NULL },
3755 { "naked", 0, 0, true, false, false, false,
3756 ix86_handle_fndecl_attribute, NULL },
3757 { "indirect_branch", 1, 1, true, false, false, false,
3758 ix86_handle_fndecl_attribute, NULL },
3759 { "function_return", 1, 1, true, false, false, false,
3760 ix86_handle_fndecl_attribute, NULL },
3761 { "indirect_return", 0, 0, false, true, true, false,
3762 NULL, NULL },
3763 { "fentry_name", 1, 1, true, false, false, false,
3764 ix86_handle_fentry_name, NULL },
3765 { "fentry_section", 1, 1, true, false, false, false,
3766 ix86_handle_fentry_name, NULL },
3767 { "cf_check", 0, 0, true, false, false, false,
3768 ix86_handle_fndecl_attribute, NULL },
3769
3770 /* End element. */
3771 { NULL, 0, 0, false, false, false, false, NULL, NULL }
3772};
3773
3774#include "gt-i386-options.h"
Mirror of https://gcc.gnu.org/git/gcc.git