[thirdparty/gcc.git] / gcc / config / mips / sdemtk.h

/* Definitions of target machine for GNU compiler.
   MIPS SDE version, for use with the SDE C library rather than newlib.
   Copyright (C) 2007-2020 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.

GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */

#define TARGET_OS_CPP_BUILTINS()			\
  do							\
    {							\
      builtin_assert ("system=sde");			\
      builtin_assert ("system=posix");			\
      builtin_define ("__SDE_MIPS__");			\
							\
      /* Deprecated: use __mips_isa_rev >= 2.  */	\
      if (ISA_MIPS32R2)					\
        builtin_define ("__mipsr2");			\
							\
      /* Deprecated: use __mips_fpr == 64.  */		\
      if (TARGET_FLOAT64)				\
	builtin_define ("__mipsfp64");			\
							\
      if (TARGET_NO_FLOAT) 				\
	builtin_define ("__NO_FLOAT");			\
      else if (TARGET_SOFT_FLOAT_ABI)			\
	builtin_define ("__SOFT_FLOAT");		\
      else if (TARGET_SINGLE_FLOAT)			\
	builtin_define ("__SINGLE_FLOAT");		\
							\
      if (TARGET_BIG_ENDIAN)				\
        {						\
	  builtin_assert ("endian=big");		\
	  builtin_assert ("cpu=mipseb");		\
	}						\
      else						\
        {						\
	  builtin_assert ("endian=little");		\
	  builtin_assert ("cpu=mipsel");		\
	}						\
    }							\
  while (0)

/* For __clear_cache in libgcc2.c.  */
#ifdef IN_LIBGCC2
extern void mips_sync_icache (void *beg, unsigned long len);
#undef CLEAR_INSN_CACHE
#define CLEAR_INSN_CACHE(beg, end) \
  mips_sync_icache (beg, end - beg)
#endif

/* For mips_cache_flush_func in mips.opt.  */
#undef CACHE_FLUSH_FUNC
#define CACHE_FLUSH_FUNC "mips_sync_icache"

/* For inline code which needs to sync the icache and dcache,
   noting that the SDE library takes arguments (address, size).  */
#undef MIPS_ICACHE_SYNC
#define MIPS_ICACHE_SYNC(ADDR, SIZE)					\
  emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func),	\
		     LCT_NORMAL, VOIDmode, ADDR, Pmode,			\
		     SIZE, TYPE_MODE (sizetype))

/* This version of _mcount does not pop 2 words from the stack.  */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO)				\
  {									\
    mips_push_asm_switch (&mips_noat);					\
    /* _mcount treats $2 as the static chain register.  */		\
    if (cfun->static_chain_decl != NULL)				\
      fprintf (FILE, "\tmove\t%s,%s\n", reg_names[2],			\
	       reg_names[STATIC_CHAIN_REGNUM]);				\
    /* MIPS16 code passes saved $ra in $v1 instead of $at.  */		\
    fprintf (FILE, "\tmove\t%s,%s\n",					\
	     reg_names[GP_REG_FIRST + (TARGET_MIPS16 ? 3 : 1)],		\
	     reg_names[RETURN_ADDR_REGNUM]);				\
    fprintf (FILE, "\tjal\t_mcount\n");					\
    mips_pop_asm_switch (&mips_noat);					\
    /* _mcount treats $2 as the static chain register.  */		\
    if (cfun->static_chain_decl != NULL)				\
      fprintf (FILE, "\tmove\t%s,%s\n", reg_names[STATIC_CHAIN_REGNUM],	\
	       reg_names[2]);						\
  }

/* ...nor does the call sequence preserve $31.  */
#undef MIPS_SAVE_REG_FOR_PROFILING_P
#define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == RETURN_ADDR_REGNUM)

/* Compile in support for the -mno-float option.  */
#define TARGET_SUPPORTS_NO_FLOAT 1
Commit	Line	Data
d9dced13 RS	1	/* Definitions of target machine for GNU compiler.
d9dced13 RS	2	MIPS SDE version, for use with the SDE C library rather than newlib.
8d9254fc	3	Copyright (C) 2007-2020 Free Software Foundation, Inc.
d9dced13 RS	4
	5	This file is part of GCC.
	6
	7	GCC is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
5baa7f6f	9	the Free Software Foundation; either version 3, or (at your option)
d9dced13 RS	10	any later version.
	11
	12	GCC is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
5baa7f6f RS	18	along with GCC; see the file COPYING3. If not see
5baa7f6f RS	19	<http://www.gnu.org/licenses/>. */
d9dced13 RS	20
	21	#define TARGET_OS_CPP_BUILTINS() \
	22	do \
	23	{ \
	24	builtin_assert ("system=sde"); \
	25	builtin_assert ("system=posix"); \
	26	builtin_define ("__SDE_MIPS__"); \
	27	\
	28	/* Deprecated: use __mips_isa_rev >= 2. */ \
	29	if (ISA_MIPS32R2) \
	30	builtin_define ("__mipsr2"); \
	31	\
	32	/* Deprecated: use __mips_fpr == 64. */ \
	33	if (TARGET_FLOAT64) \
	34	builtin_define ("__mipsfp64"); \
	35	\
	36	if (TARGET_NO_FLOAT) \
9f946bc1	37	builtin_define ("__NO_FLOAT"); \
d9dced13 RS	38	else if (TARGET_SOFT_FLOAT_ABI) \
	39	builtin_define ("__SOFT_FLOAT"); \
	40	else if (TARGET_SINGLE_FLOAT) \
	41	builtin_define ("__SINGLE_FLOAT"); \
	42	\
	43	if (TARGET_BIG_ENDIAN) \
	44	{ \
	45	builtin_assert ("endian=big"); \
	46	builtin_assert ("cpu=mipseb"); \
	47	} \
	48	else \
	49	{ \
	50	builtin_assert ("endian=little"); \
	51	builtin_assert ("cpu=mipsel"); \
	52	} \
	53	} \
	54	while (0)
	55
d9dced13 RS	56	/* For __clear_cache in libgcc2.c. */
	57	#ifdef IN_LIBGCC2
	58	extern void mips_sync_icache (void *beg, unsigned long len);
	59	#undef CLEAR_INSN_CACHE
	60	#define CLEAR_INSN_CACHE(beg, end) \
	61	mips_sync_icache (beg, end - beg)
	62	#endif
	63
	64	/* For mips_cache_flush_func in mips.opt. */
	65	#undef CACHE_FLUSH_FUNC
	66	#define CACHE_FLUSH_FUNC "mips_sync_icache"
	67
	68	/* For inline code which needs to sync the icache and dcache,
	69	noting that the SDE library takes arguments (address, size). */
	70	#undef MIPS_ICACHE_SYNC
	71	#define MIPS_ICACHE_SYNC(ADDR, SIZE) \
	72	emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func), \
db69559b	73	LCT_NORMAL, VOIDmode, ADDR, Pmode, \
d9dced13 RS	74	SIZE, TYPE_MODE (sizetype))
	75
	76	/* This version of _mcount does not pop 2 words from the stack. */
	77	#undef FUNCTION_PROFILER
	78	#define FUNCTION_PROFILER(FILE, LABELNO) \
	79	{ \
cf5fb4b0	80	mips_push_asm_switch (&mips_noat); \
e538e028 RS	81	/* _mcount treats $2 as the static chain register. */ \
	82	if (cfun->static_chain_decl != NULL) \
	83	fprintf (FILE, "\tmove\t%s,%s\n", reg_names[2], \
	84	reg_names[STATIC_CHAIN_REGNUM]); \
d9dced13 RS	85	/* MIPS16 code passes saved $ra in $v1 instead of $at. */ \
	86	fprintf (FILE, "\tmove\t%s,%s\n", \
	87	reg_names[GP_REG_FIRST + (TARGET_MIPS16 ? 3 : 1)], \
293593b1	88	reg_names[RETURN_ADDR_REGNUM]); \
d9dced13	89	fprintf (FILE, "\tjal\t_mcount\n"); \
cf5fb4b0	90	mips_pop_asm_switch (&mips_noat); \
e538e028 RS	91	/* _mcount treats $2 as the static chain register. */ \
	92	if (cfun->static_chain_decl != NULL) \
	93	fprintf (FILE, "\tmove\t%s,%s\n", reg_names[STATIC_CHAIN_REGNUM], \
	94	reg_names[2]); \
d9dced13 RS	95	}
	96
	97	/* ...nor does the call sequence preserve $31. */
	98	#undef MIPS_SAVE_REG_FOR_PROFILING_P
293593b1	99	#define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == RETURN_ADDR_REGNUM)
9f946bc1 RS	100
	101	/* Compile in support for the -mno-float option. */
	102	#define TARGET_SUPPORTS_NO_FLOAT 1