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3965b35f SH |
1 | ; OpenRISC command line options |
2 | ||
8d9254fc | 3 | ; Copyright (C) 2010-2020 Free Software Foundation, Inc. |
3965b35f SH |
4 | ; |
5 | ; This file is part of GCC. | |
6 | ; | |
7 | ; GCC is free software; you can redistribute it and/or modify it under | |
8 | ; the terms of the GNU General Public License as published by the Free | |
9 | ; Software Foundation; either version 3, or (at your option) any later | |
10 | ; version. | |
11 | ; | |
12 | ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | ; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | ; for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
18 | ; along with GCC; see the file COPYING3. If not see | |
19 | ; <http://www.gnu.org/licenses/>. | |
20 | ||
21 | ; See the GCC internals manual (options.texi) for a description of | |
22 | ; this file's format. | |
23 | ||
3965b35f SH |
24 | mhard-div |
25 | Target RejectNegative InverseMask(SOFT_DIV) | |
1e2e81c1 SH |
26 | Enable generation of hardware divide (l.div, l.divu) instructions. This is the |
27 | default; use -msoft-div to override. | |
28 | ||
29 | msoft-div | |
30 | Target RejectNegative Mask(SOFT_DIV) | |
31 | Enable generation of binaries which use functions from libgcc to perform divide | |
32 | operations. The default is -mhard-div. | |
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33 | |
34 | mhard-mul | |
35 | Target RejectNegative InverseMask(SOFT_MUL). | |
1e2e81c1 SH |
36 | Enable generation of hardware multiply instructions (l.mul, l.muli) instructions. |
37 | This is the default; use -msoft-mul to override. | |
38 | ||
39 | msoft-mul | |
40 | Target RejectNegative Mask(SOFT_MUL). | |
41 | Enable generation of binaries which use functions from libgcc to perform | |
42 | multiply operations. The default is -mhard-mul. | |
3965b35f | 43 | |
44080af9 SH |
44 | msoft-float |
45 | Target RejectNegative InverseMask(HARD_FLOAT) | |
46 | Enable generation of binaries which use functions from libgcc to perform | |
47 | floating point operations. This is the default; use -mhard-float to override. | |
48 | ||
49 | mhard-float | |
50 | Target RejectNegative Mask(HARD_FLOAT) | |
51 | Enable generation of hardware floating point instructions. The default is | |
52 | -msoft-float. | |
53 | ||
54 | mdouble-float | |
55 | Target Mask(DOUBLE_FLOAT) | |
56 | When -mhard-float is selected, enables generation of double-precision floating | |
57 | point instructions. By default functions from libgcc are used to perform | |
58 | double-precision floating point operations. | |
59 | ||
60 | munordered-float | |
61 | Target RejectNegative Mask(FP_UNORDERED) | |
62 | When -mhard-float is selected, enables generation of unordered floating point | |
63 | compare and set flag (lf.sfun*) instructions. By default functions from libgcc | |
64 | are used to perform unordered floating point compare and set flag operations. | |
65 | ||
3965b35f SH |
66 | mcmov |
67 | Target RejectNegative Mask(CMOV) | |
1e2e81c1 SH |
68 | Enable generation of conditional move (l.cmov) instructions. By default the |
69 | equivalent will be generated using using set and branch. | |
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70 | |
71 | mror | |
72 | Target RejectNegative Mask(ROR) | |
1e2e81c1 SH |
73 | Enable generation of rotate right (l.ror) instructions. By default functions |
74 | from libgcc are used to perform rotate right operations. | |
75 | ||
76 | mrori | |
77 | Target RejectNegative Mask(RORI) | |
78 | Enable generation of rotate right with immediate (l.rori) instructions. By | |
79 | default functions from libgcc are used to perform rotate right with immediate | |
80 | operations. | |
3965b35f SH |
81 | |
82 | msext | |
83 | Target RejectNegative Mask(SEXT) | |
1e2e81c1 SH |
84 | Enable generation of sign extension (l.ext*) instructions. By default memory |
85 | loads are used to perform sign extension. | |
3965b35f SH |
86 | |
87 | msfimm | |
88 | Target RejectNegative Mask(SFIMM) | |
1e2e81c1 SH |
89 | Enable generation of compare and set flag with immediate (l.sf*i) instructions. |
90 | By default extra instructions will be generated to store the immediate to a | |
91 | register first. | |
3965b35f SH |
92 | |
93 | mshftimm | |
94 | Target RejectNegative Mask(SHFTIMM) | |
1e2e81c1 SH |
95 | Enable generation of shift with immediate (l.srai, l.srli, l.slli) instructions. |
96 | By default extra instructions will be generated to store the immediate to a | |
97 | register first. |