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eabd3262 | 1 | /* Definitions of target machine for GNU compiler, for the HP Spectrum. |
cf011243 | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, |
8f949e7e | 3 | 2001, 2002 Free Software Foundation, Inc. |
8b109b37 | 4 | Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support |
eabd3262 RK |
5 | and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for |
6 | Software Science at the University of Utah. | |
7 | ||
8 | This file is part of GNU CC. | |
9 | ||
10 | GNU CC is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
c063dc98 | 12 | the Free Software Foundation; either version 2, or (at your option) |
eabd3262 RK |
13 | any later version. |
14 | ||
15 | GNU CC is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with GNU CC; see the file COPYING. If not, write to | |
0e29e3c9 RK |
22 | the Free Software Foundation, 59 Temple Place - Suite 330, |
23 | Boston, MA 02111-1307, USA. */ | |
eabd3262 RK |
24 | |
25 | enum cmp_type /* comparison type */ | |
26 | { | |
27 | CMP_SI, /* compare integers */ | |
28 | CMP_SF, /* compare single precision floats */ | |
29 | CMP_DF, /* compare double precision floats */ | |
30 | CMP_MAX /* max comparison type */ | |
31 | }; | |
32 | ||
279c9bde JL |
33 | /* For long call handling. */ |
34 | extern unsigned int total_code_bytes; | |
35 | ||
c47decad JL |
36 | /* Which processor to schedule for. */ |
37 | ||
38 | enum processor_type | |
39 | { | |
40 | PROCESSOR_700, | |
41 | PROCESSOR_7100, | |
42 | PROCESSOR_7100LC, | |
e14b50ce | 43 | PROCESSOR_7200, |
fae15c93 | 44 | PROCESSOR_7300, |
e14b50ce | 45 | PROCESSOR_8000 |
c47decad JL |
46 | }; |
47 | ||
c47decad | 48 | /* For -mschedule= option. */ |
519104fe | 49 | extern const char *pa_cpu_string; |
c47decad JL |
50 | extern enum processor_type pa_cpu; |
51 | ||
62d65906 JL |
52 | #define pa_cpu_attr ((enum attr_cpu)pa_cpu) |
53 | ||
ea3bfbfe JQ |
54 | /* Which architecture to generate code for. */ |
55 | ||
56 | enum architecture_type | |
57 | { | |
58 | ARCHITECTURE_10, | |
59 | ARCHITECTURE_11, | |
60 | ARCHITECTURE_20 | |
61 | }; | |
62 | ||
5dfcd8e1 | 63 | struct rtx_def; |
5dfcd8e1 | 64 | |
ea3bfbfe | 65 | /* For -march= option. */ |
519104fe | 66 | extern const char *pa_arch_string; |
ea3bfbfe JQ |
67 | extern enum architecture_type pa_arch; |
68 | ||
eabd3262 RK |
69 | /* Print subsidiary information on the compiler version in use. */ |
70 | ||
e236a9ff | 71 | #define TARGET_VERSION fputs (" (hppa)", stderr); |
eabd3262 | 72 | |
3f8f5a3f | 73 | /* Run-time compilation parameters selecting different hardware subsets. */ |
eabd3262 RK |
74 | |
75 | extern int target_flags; | |
76 | ||
3f8f5a3f | 77 | /* compile code for HP-PA 1.1 ("Snake") */ |
eabd3262 | 78 | |
13ee407e | 79 | #define MASK_PA_11 1 |
520babc7 JL |
80 | |
81 | #ifndef TARGET_PA_11 | |
13ee407e | 82 | #define TARGET_PA_11 (target_flags & MASK_PA_11) |
520babc7 | 83 | #endif |
eabd3262 | 84 | |
8c0a7019 JL |
85 | /* Disable all FP registers (they all become fixed). This may be necessary |
86 | for compiling kernels which perform lazy context switching of FP regs. | |
5a1c10de | 87 | Note if you use this option and try to perform floating point operations |
8c0a7019 JL |
88 | the compiler will abort! */ |
89 | ||
3723cad9 JL |
90 | #define MASK_DISABLE_FPREGS 2 |
91 | #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS) | |
8c0a7019 | 92 | |
a7721dc0 AM |
93 | /* Generate code which assumes that all space register are equivalent. |
94 | Triggers aggressive unscaled index addressing and faster | |
95 | builtin_return_address. */ | |
3723cad9 JL |
96 | #define MASK_NO_SPACE_REGS 4 |
97 | #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS) | |
105ce113 | 98 | |
0a1daad4 | 99 | /* Allow unconditional jumps in the delay slots of call instructions. */ |
3723cad9 JL |
100 | #define MASK_JUMP_IN_DELAY 8 |
101 | #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY) | |
0a1daad4 | 102 | |
24c6ab1c | 103 | /* Disable indexed addressing modes. */ |
3723cad9 JL |
104 | #define MASK_DISABLE_INDEXING 32 |
105 | #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING) | |
8c0a7019 | 106 | |
2822d96e JL |
107 | /* Emit code which follows the new portable runtime calling conventions |
108 | HP wants everyone to use for ELF objects. If at all possible you want | |
f726ea7d JL |
109 | to avoid this since it's a performance loss for non-prototyped code. |
110 | ||
279c9bde JL |
111 | Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline |
112 | long-call stubs which is quite expensive. */ | |
3723cad9 JL |
113 | #define MASK_PORTABLE_RUNTIME 64 |
114 | #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME) | |
2822d96e | 115 | |
c87ba671 JL |
116 | /* Emit directives only understood by GAS. This allows parameter |
117 | relocations to work for static functions. There is no way | |
2822d96e | 118 | to make them work the HP assembler at this time. */ |
3723cad9 JL |
119 | #define MASK_GAS 128 |
120 | #define TARGET_GAS (target_flags & MASK_GAS) | |
c87ba671 | 121 | |
74356a72 | 122 | /* Emit code for processors which do not have an FPU. */ |
3723cad9 JL |
123 | #define MASK_SOFT_FLOAT 256 |
124 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) | |
74356a72 | 125 | |
c3d4f633 JL |
126 | /* Use 3-insn load/store sequences for access to large data segments |
127 | in shared libraries on hpux10. */ | |
3723cad9 JL |
128 | #define MASK_LONG_LOAD_STORE 512 |
129 | #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE) | |
c3d4f633 | 130 | |
a7721dc0 AM |
131 | /* Use a faster sequence for indirect calls. This assumes that calls |
132 | through function pointers will never cross a space boundary, and | |
133 | that the executable is not dynamically linked. Such assumptions | |
134 | are generally safe for building kernels and statically linked | |
135 | executables. Code compiled with this option will fail miserably if | |
136 | the executable is dynamically linked or uses nested functions! */ | |
3723cad9 JL |
137 | #define MASK_FAST_INDIRECT_CALLS 1024 |
138 | #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS) | |
3aba034b | 139 | |
3e056efc | 140 | /* Generate code with big switch statements to avoid out of range branches |
956d6950 | 141 | occurring within the switch table. */ |
3723cad9 JL |
142 | #define MASK_BIG_SWITCH 2048 |
143 | #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH) | |
3e056efc | 144 | |
ea3bfbfe JQ |
145 | |
146 | /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be | |
147 | true when this is true. */ | |
148 | #define MASK_PA_20 4096 | |
520babc7 | 149 | #ifndef TARGET_PA_20 |
ea3bfbfe | 150 | #define TARGET_PA_20 (target_flags & MASK_PA_20) |
520babc7 JL |
151 | #endif |
152 | ||
153 | /* Generate code for the HPPA 2.0 architecture in 64bit mode. */ | |
154 | #ifndef TARGET_64BIT | |
155 | #define TARGET_64BIT 0 | |
156 | #endif | |
ea3bfbfe | 157 | |
fe19a83d | 158 | /* Generate code for ELF32 ABI. */ |
e25724d8 AM |
159 | #ifndef TARGET_ELF32 |
160 | #define TARGET_ELF32 0 | |
161 | #endif | |
162 | ||
3d9268b6 JDA |
163 | /* Generate code for SOM 32bit ABI. */ |
164 | #ifndef TARGET_SOM | |
165 | #define TARGET_SOM 0 | |
166 | #endif | |
167 | ||
eabd3262 RK |
168 | /* Macro to define tables used to set the flags. |
169 | This is a list in braces of pairs in braces, | |
170 | each pair being { "NAME", VALUE } | |
171 | where VALUE is the bits to set or minus the bits to clear. | |
172 | An empty string NAME is used to identify the default VALUE. */ | |
173 | ||
174 | #define TARGET_SWITCHES \ | |
13ee407e | 175 | {{"snake", MASK_PA_11, "Generate PA1.1 code"}, \ |
ea3bfbfe JQ |
176 | {"nosnake", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \ |
177 | {"pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \ | |
13ee407e | 178 | {"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \ |
21b90691 | 179 | {"pa-risc-2-0", MASK_PA_20, "Generate PA2.0 code. This option requires binutils 2.10 or later"}, \ |
e10dfab2 JL |
180 | {"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \ |
181 | {"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\ | |
182 | {"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \ | |
183 | {"space-regs", -MASK_NO_SPACE_REGS, "Do not disable space regs"}, \ | |
184 | {"jump-in-delay", MASK_JUMP_IN_DELAY, "Put jumps in call delay slots"},\ | |
185 | {"no-jump-in-delay", -MASK_JUMP_IN_DELAY, "Do not put jumps in call delay slots"}, \ | |
e10dfab2 JL |
186 | {"disable-indexing", MASK_DISABLE_INDEXING, "Disable indexed addressing"},\ |
187 | {"no-disable-indexing", -MASK_DISABLE_INDEXING, "Do not disable indexed addressing"},\ | |
188 | {"portable-runtime", MASK_PORTABLE_RUNTIME, "Use portable calling conventions"}, \ | |
189 | {"no-portable-runtime", -MASK_PORTABLE_RUNTIME, "Do not use portable calling conventions"},\ | |
190 | {"gas", MASK_GAS, "Assume code will be assembled by GAS"}, \ | |
191 | {"no-gas", -MASK_GAS, "Do not assume code will be assembled by GAS"}, \ | |
192 | {"soft-float", MASK_SOFT_FLOAT, "Use software floating point"}, \ | |
193 | {"no-soft-float", -MASK_SOFT_FLOAT, "Do not use software floating point"}, \ | |
194 | {"long-load-store", MASK_LONG_LOAD_STORE, "Emit long load/store sequences"}, \ | |
195 | {"no-long-load-store", -MASK_LONG_LOAD_STORE, "Do not emit long load/store sequences"},\ | |
196 | {"fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, "Generate fast indirect calls"},\ | |
197 | {"no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, "Do not generate fast indirect calls"},\ | |
198 | {"big-switch", MASK_BIG_SWITCH, "Generate code for huge switch statements"}, \ | |
199 | {"no-big-switch", -MASK_BIG_SWITCH, "Do not generate code for huge switch statements"}, \ | |
200 | {"linker-opt", 0, "Enable linker optimizations"}, \ | |
880b8fb8 | 201 | { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, NULL}} |
eabd3262 | 202 | |
233c0fef | 203 | #ifndef TARGET_DEFAULT |
3723cad9 | 204 | #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY) |
233c0fef TG |
205 | #endif |
206 | ||
b34ec578 RK |
207 | #ifndef TARGET_CPU_DEFAULT |
208 | #define TARGET_CPU_DEFAULT 0 | |
209 | #endif | |
210 | ||
806bf413 JDA |
211 | #ifndef TARGET_SCHED_DEFAULT |
212 | #define TARGET_SCHED_DEFAULT "8000" | |
213 | #endif | |
214 | ||
c47decad JL |
215 | #define TARGET_OPTIONS \ |
216 | { \ | |
ea3bfbfe JQ |
217 | { "schedule=", &pa_cpu_string, "Specify CPU for scheduling purposes" },\ |
218 | { "arch=", &pa_arch_string, "Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later." }\ | |
c47decad JL |
219 | } |
220 | ||
f38b27c7 JL |
221 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
222 | and the old mnemonics are dialect zero. */ | |
223 | #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0) | |
224 | ||
c47decad JL |
225 | #define OVERRIDE_OPTIONS override_options () |
226 | ||
0d381b47 JL |
227 | /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless |
228 | code duplication we simply include this file and override as needed. */ | |
229 | #include "dbxelf.h" | |
230 | ||
231 | /* We do not have to be compatible with dbx, so we enable gdb extensions | |
232 | by default. */ | |
794b7f56 | 233 | #define DEFAULT_GDB_EXTENSIONS 1 |
233c0fef | 234 | |
0d381b47 JL |
235 | /* This used to be zero (no max length), but big enums and such can |
236 | cause huge strings which killed gas. | |
237 | ||
238 | We also have to avoid lossage in dbxout.c -- it does not compute the | |
239 | string size accurately, so we are real conservative here. */ | |
240 | #undef DBX_CONTIN_LENGTH | |
241 | #define DBX_CONTIN_LENGTH 3000 | |
75600ead | 242 | |
ddd5a7c1 | 243 | /* Only labels should ever begin in column zero. */ |
76bbee81 HPN |
244 | #define ASM_STABS_OP "\t.stabs\t" |
245 | #define ASM_STABN_OP "\t.stabn\t" | |
bb2049d1 | 246 | |
2e7e7121 JL |
247 | /* GDB always assumes the current function's frame begins at the value |
248 | of the stack pointer upon entry to the current function. Accessing | |
6a5c0a8e JL |
249 | local variables and parameters passed on the stack is done using the |
250 | base of the frame + an offset provided by GCC. | |
2e7e7121 JL |
251 | |
252 | For functions which have frame pointers this method works fine; | |
253 | the (frame pointer) == (stack pointer at function entry) and GCC provides | |
254 | an offset relative to the frame pointer. | |
255 | ||
256 | This loses for functions without a frame pointer; GCC provides an offset | |
257 | which is relative to the stack pointer after adjusting for the function's | |
258 | frame size. GDB would prefer the offset to be relative to the value of | |
259 | the stack pointer at the function's entry. Yuk! */ | |
260 | #define DEBUGGER_AUTO_OFFSET(X) \ | |
261 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ | |
262 | + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
263 | ||
6a5c0a8e JL |
264 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ |
265 | ((GET_CODE (X) == PLUS ? OFFSET : 0) \ | |
266 | + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
267 | ||
520babc7 JL |
268 | #define CPP_PA10_SPEC "" |
269 | #define CPP_PA11_SPEC "-D_PA_RISC1_1 -D__hp9000s700" | |
270 | #define CPP_PA20_SPEC "-D_PA_RISC2_0 -D__hp9000s800" | |
271 | #define CPP_64BIT_SPEC "-D__LP64__ -D__LONG_MAX__=9223372036854775807L" | |
272 | ||
13ee407e | 273 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0 |
520babc7 JL |
274 | #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa10)" |
275 | #endif | |
276 | ||
277 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) != 0 | |
278 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_20) != 0 | |
279 | #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11) %(cpp_pa20)" | |
233c0fef | 280 | #else |
520babc7 JL |
281 | #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11)" |
282 | #endif | |
283 | #endif | |
284 | ||
285 | #if TARGET_64BIT | |
286 | #define CPP_64BIT_DEFAULT_SPEC "%(cpp_64bit)" | |
287 | #else | |
288 | #define CPP_64BIT_DEFAULT_SPEC "" | |
289 | #endif | |
290 | ||
291 | /* This macro defines names of additional specifications to put in the | |
292 | specs that can be used in various specifications like CC1_SPEC. Its | |
293 | definition is an initializer with a subgrouping for each command option. | |
294 | ||
295 | Each subgrouping contains a string constant, that defines the | |
296 | specification name, and a string constant that used by the GNU CC driver | |
297 | program. | |
298 | ||
299 | Do not define this macro if it does not need to do anything. */ | |
300 | ||
301 | #ifndef SUBTARGET_EXTRA_SPECS | |
302 | #define SUBTARGET_EXTRA_SPECS | |
233c0fef TG |
303 | #endif |
304 | ||
520babc7 JL |
305 | #define EXTRA_SPECS \ |
306 | { "cpp_pa10", CPP_PA10_SPEC}, \ | |
307 | { "cpp_pa11", CPP_PA11_SPEC}, \ | |
308 | { "cpp_pa20", CPP_PA20_SPEC}, \ | |
309 | { "cpp_64bit", CPP_64BIT_SPEC}, \ | |
310 | { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ | |
311 | { "cpp_64bit_default", CPP_64BIT_DEFAULT_SPEC }, \ | |
312 | SUBTARGET_EXTRA_SPECS | |
313 | ||
314 | #define CPP_SPEC "\ | |
315 | %{mpa-risc-1-0:%(cpp_pa10)} \ | |
316 | %{mpa-risc-1-1:%(cpp_pa11)} \ | |
317 | %{msnake:%(cpp_pa11)} \ | |
318 | %{mpa-risc-2-0:%(cpp_pa20)} \ | |
319 | %{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \ | |
320 | %{m64bit:%(cpp_64bit)} \ | |
321 | %{!m64bit:%(cpp_64bit_default)} \ | |
67c49dc7 | 322 | %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG} \ |
d9893a68 | 323 | %{threads: -D_REENTRANT -D_DCE_THREADS}" |
520babc7 | 324 | |
fe6adb3e | 325 | #define CPLUSPLUS_CPP_SPEC "\ |
67c49dc7 | 326 | -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG \ |
fe6adb3e JL |
327 | %{mpa-risc-1-0:%(cpp_pa10)} \ |
328 | %{mpa-risc-1-1:%(cpp_pa11)} \ | |
329 | %{msnake:%(cpp_pa11)} \ | |
330 | %{mpa-risc-2-0:%(cpp_pa20)} \ | |
331 | %{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \ | |
332 | %{m64bit:%(cpp_64bit)} \ | |
333 | %{!m64bit:%(cpp_64bit_default)} \ | |
334 | %{threads: -D_REENTRANT -D_DCE_THREADS}" | |
335 | ||
233c0fef TG |
336 | /* Defines for a K&R CC */ |
337 | ||
233c0fef | 338 | #define CC1_SPEC "%{pg:} %{p:}" |
5a1c10de | 339 | |
ad238e4b | 340 | #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" |
233c0fef | 341 | |
0fffa5e1 RK |
342 | /* We don't want -lg. */ |
343 | #ifndef LIB_SPEC | |
344 | #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
345 | #endif | |
346 | ||
dc36ec2c RK |
347 | /* This macro defines command-line switches that modify the default |
348 | target name. | |
349 | ||
350 | The definition is be an initializer for an array of structures. Each | |
351 | array element has have three elements: the switch name, one of the | |
352 | enumeration codes ADD or DELETE to indicate whether the string should be | |
fe19a83d | 353 | inserted or deleted, and the string to be inserted or deleted. */ |
dc36ec2c RK |
354 | #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}} |
355 | ||
233c0fef TG |
356 | /* Make gcc agree with <machine/ansi.h> */ |
357 | ||
358 | #define SIZE_TYPE "unsigned int" | |
359 | #define PTRDIFF_TYPE "int" | |
3c9a7b64 JL |
360 | #define WCHAR_TYPE "unsigned int" |
361 | #define WCHAR_TYPE_SIZE 32 | |
233c0fef | 362 | |
4f074454 RK |
363 | /* Show we can debug even without a frame pointer. */ |
364 | #define CAN_DEBUG_WITHOUT_FP | |
233c0fef | 365 | |
746a9efa JL |
366 | /* Machine dependent reorg pass. */ |
367 | #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X) | |
368 | ||
233c0fef TG |
369 | /* Names to predefine in the preprocessor for this target machine. */ |
370 | ||
2b57e919 | 371 | #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem=unix -Asystem=bsd -Acpu=hppa -Amachine=hppa" |
eabd3262 RK |
372 | \f |
373 | /* target machine storage layout */ | |
374 | ||
9f9fba36 TG |
375 | /* Define this macro if it is advisable to hold scalars in registers |
376 | in a wider mode than that declared by the program. In such cases, | |
377 | the value is constrained to be within the bounds of the declared | |
378 | type, but kept valid in the wider mode. The signedness of the | |
379 | extension may differ from that of the type. */ | |
380 | ||
381 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
382 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
d7735a07 | 383 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ |
690d4228 | 384 | (MODE) = word_mode; |
9f9fba36 | 385 | |
eabd3262 RK |
386 | /* Define this if most significant bit is lowest numbered |
387 | in instructions that operate on numbered bit-fields. */ | |
388 | #define BITS_BIG_ENDIAN 1 | |
389 | ||
390 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
23643037 | 391 | /* That is true on the HP-PA. */ |
eabd3262 RK |
392 | #define BYTES_BIG_ENDIAN 1 |
393 | ||
394 | /* Define this if most significant word of a multiword number is lowest | |
395 | numbered. */ | |
eabd3262 RK |
396 | #define WORDS_BIG_ENDIAN 1 |
397 | ||
520babc7 | 398 | #define MAX_BITS_PER_WORD 64 |
b73bff7e | 399 | #define MAX_LONG_TYPE_SIZE 32 |
eabd3262 RK |
400 | |
401 | /* Width of a word, in units (bytes). */ | |
520babc7 JL |
402 | #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) |
403 | #define MIN_UNITS_PER_WORD 4 | |
eabd3262 | 404 | |
eabd3262 | 405 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ |
cb16fe9f | 406 | #define PARM_BOUNDARY BITS_PER_WORD |
eabd3262 RK |
407 | |
408 | /* Largest alignment required for any stack parameter, in bits. | |
409 | Don't define this if it is equal to PARM_BOUNDARY */ | |
410 | #define MAX_PARM_BOUNDARY 64 | |
411 | ||
981e5cd9 JL |
412 | /* Boundary (in *bits*) on which stack pointer is always aligned; |
413 | certain optimizations in combine depend on this. | |
414 | ||
415 | GCC for the PA always rounds its stacks to a 512bit boundary, | |
416 | but that happens late in the compilation process. */ | |
520babc7 | 417 | #define STACK_BOUNDARY (TARGET_64BIT ? 128 : 64) |
eabd3262 | 418 | |
79109502 JDA |
419 | #define PREFERRED_STACK_BOUNDARY 512 |
420 | ||
eabd3262 | 421 | /* Allocation boundary (in *bits*) for the code of a function. */ |
520babc7 | 422 | #define FUNCTION_BOUNDARY (TARGET_64BIT ? 64 : 32) |
eabd3262 RK |
423 | |
424 | /* Alignment of field after `int : 0' in a structure. */ | |
425 | #define EMPTY_FIELD_BOUNDARY 32 | |
426 | ||
427 | /* Every structure's size must be a multiple of this. */ | |
428 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
429 | ||
430 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
431 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
432 | ||
79109502 JDA |
433 | /* No data type wants to be aligned rounder than this. This is set |
434 | to 128 bits to allow for lock semaphores in the stack frame.*/ | |
435 | #define BIGGEST_ALIGNMENT 128 | |
eabd3262 | 436 | |
fe19a83d | 437 | /* Get around hp-ux assembler bug, and make strcpy of constants fast. */ |
eabd3262 RK |
438 | #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \ |
439 | ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN)) | |
440 | ||
441 | /* Make arrays of chars word-aligned for the same reasons. */ | |
442 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
443 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
444 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
445 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
446 | ||
447 | ||
448 | /* Set this nonzero if move instructions will actually fail to work | |
449 | when given unaligned data. */ | |
450 | #define STRICT_ALIGNMENT 1 | |
451 | ||
452 | /* Generate calls to memcpy, memcmp and memset. */ | |
453 | #define TARGET_MEM_FUNCTIONS | |
eabd3262 RK |
454 | |
455 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
456 | when one has mode MODE1 and one has mode MODE2. | |
457 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
458 | for any hard reg, then this must be 0 for correct output. */ | |
459 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
3518f904 | 460 | (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) |
eabd3262 RK |
461 | |
462 | /* Specify the registers used for certain standard purposes. | |
463 | The values of these macros are register numbers. */ | |
464 | ||
3f8f5a3f | 465 | /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */ |
eabd3262 RK |
466 | /* #define PC_REGNUM */ |
467 | ||
468 | /* Register to use for pushing function arguments. */ | |
469 | #define STACK_POINTER_REGNUM 30 | |
470 | ||
471 | /* Base register for access to local variables of the function. */ | |
75600ead | 472 | #define FRAME_POINTER_REGNUM 3 |
eabd3262 | 473 | |
e63ffc38 | 474 | /* Value should be nonzero if functions must have frame pointers. */ |
9e18f575 | 475 | #define FRAME_POINTER_REQUIRED \ |
e63ffc38 | 476 | (current_function_calls_alloca) |
eabd3262 RK |
477 | |
478 | /* C statement to store the difference between the frame pointer | |
479 | and the stack pointer values immediately after the function prologue. | |
480 | ||
481 | Note, we always pretend that this is a leaf function because if | |
482 | it's not, there's no point in trying to eliminate the | |
483 | frame pointer. If it is a leaf function, we guessed right! */ | |
484 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
86daf4a6 | 485 | do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0) |
eabd3262 RK |
486 | |
487 | /* Base register for access to arguments of the function. */ | |
75600ead | 488 | #define ARG_POINTER_REGNUM 3 |
eabd3262 RK |
489 | |
490 | /* Register in which static-chain is passed to a function. */ | |
eabd3262 RK |
491 | #define STATIC_CHAIN_REGNUM 29 |
492 | ||
493 | /* Register which holds offset table for position-independent | |
494 | data references. */ | |
495 | ||
520babc7 | 496 | #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19) |
6bb36601 | 497 | #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1 |
eabd3262 | 498 | |
d777856d JDA |
499 | /* Function to return the rtx used to save the pic offset table register |
500 | across function calls. */ | |
501 | extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void)); | |
eabd3262 | 502 | |
451d86c2 | 503 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
520babc7 JL |
504 | |
505 | /* SOM ABI says that objects larger than 64 bits are returned in memory. | |
0779eeb2 | 506 | PA64 ABI says that objects larger than 128 bits are returned in memory. |
010dc908 JDA |
507 | Note, int_size_in_bytes can return -1 if the size of the object is |
508 | variable or larger than the maximum value that can be expressed as | |
509 | a HOST_WIDE_INT. */ | |
11734ce8 | 510 | #define RETURN_IN_MEMORY(TYPE) \ |
0779eeb2 | 511 | ((unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8)) |
11734ce8 | 512 | |
eabd3262 RK |
513 | /* Register in which address to store a structure value |
514 | is passed to a function. */ | |
515 | #define STRUCT_VALUE_REGNUM 28 | |
e25724d8 AM |
516 | |
517 | /* Describe how we implement __builtin_eh_return. */ | |
823fbbce | 518 | /* FIXME: What's a good choice for the EH data registers on TARGET_64BIT? */ |
e25724d8 | 519 | #define EH_RETURN_DATA_REGNO(N) \ |
823fbbce JDA |
520 | (TARGET_64BIT \ |
521 | ? ((N) < 4 ? (N) + 4 : INVALID_REGNUM) \ | |
522 | : ((N) < 3 ? (N) + 20 : (N) == 4 ? 31 : INVALID_REGNUM)) | |
e25724d8 | 523 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29) |
823fbbce JDA |
524 | #define EH_RETURN_HANDLER_RTX \ |
525 | gen_rtx_MEM (word_mode, \ | |
526 | gen_rtx_PLUS (word_mode, frame_pointer_rtx, \ | |
527 | TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20))) | |
528 | ||
529 | ||
530 | /* Offset from the argument pointer register value to the top of | |
531 | stack. This is different from FIRST_PARM_OFFSET because of the | |
532 | frame marker. */ | |
533 | #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 | |
eabd3262 | 534 | \f |
eabd3262 RK |
535 | /* The letters I, J, K, L and M in a register constraint string |
536 | can be used to stand for particular ranges of immediate operands. | |
537 | This macro defines what the ranges are. | |
538 | C is the letter, and VALUE is a constant value. | |
539 | Return 1 if VALUE is in the range specified by C. | |
540 | ||
eabd3262 RK |
541 | `I' is used for the 11 bit constants. |
542 | `J' is used for the 14 bit constants. | |
7e8b33d9 | 543 | `K' is used for values that can be moved with a zdepi insn. |
eabd3262 | 544 | `L' is used for the 5 bit constants. |
7e8b33d9 | 545 | `M' is used for 0. |
520babc7 JL |
546 | `N' is used for values with the least significant 11 bits equal to zero |
547 | and when sign extended from 32 to 64 bits the | |
548 | value does not change. | |
7e8b33d9 TG |
549 | `O' is used for numbers n such that n+1 is a power of 2. |
550 | */ | |
eabd3262 RK |
551 | |
552 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
e0c556d3 AM |
553 | ((C) == 'I' ? VAL_11_BITS_P (VALUE) \ |
554 | : (C) == 'J' ? VAL_14_BITS_P (VALUE) \ | |
555 | : (C) == 'K' ? zdepi_cint_p (VALUE) \ | |
556 | : (C) == 'L' ? VAL_5_BITS_P (VALUE) \ | |
557 | : (C) == 'M' ? (VALUE) == 0 \ | |
558 | : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \ | |
559 | || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \ | |
560 | == (HOST_WIDE_INT) -1 << 31)) \ | |
561 | : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \ | |
562 | : (C) == 'P' ? and_mask_p (VALUE) \ | |
eabd3262 RK |
563 | : 0) |
564 | ||
af69aabb JL |
565 | /* Similar, but for floating or large integer constants, and defining letters |
566 | G and H. Here VALUE is the CONST_DOUBLE rtx itself. | |
eabd3262 | 567 | |
af69aabb JL |
568 | For PA, `G' is the floating-point constant zero. `H' is undefined. */ |
569 | ||
570 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
571 | ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ | |
572 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ | |
573 | : 0) | |
eabd3262 | 574 | |
88624c0e JL |
575 | /* The class value for index registers, and the one for base regs. */ |
576 | #define INDEX_REG_CLASS GENERAL_REGS | |
577 | #define BASE_REG_CLASS GENERAL_REGS | |
578 | ||
579 | #define FP_REG_CLASS_P(CLASS) \ | |
580 | ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) | |
581 | ||
582 | /* True if register is floating-point. */ | |
583 | #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST) | |
584 | ||
eabd3262 RK |
585 | /* Given an rtx X being reloaded into a reg required to be |
586 | in class CLASS, return the class of reg to actually use. | |
587 | In general this is just CLASS; but on some machines | |
588 | in some cases it is preferable to use a more restrictive class. */ | |
589 | #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
590 | ||
591 | /* Return the register class of a scratch register needed to copy IN into | |
e236a9ff JL |
592 | or out of a register in CLASS in MODE. If it can be done directly |
593 | NO_REGS is returned. | |
594 | ||
595 | Avoid doing any work for the common case calls. */ | |
eabd3262 RK |
596 | |
597 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
e236a9ff JL |
598 | ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \ |
599 | && REGNO (IN) < FIRST_PSEUDO_REGISTER) \ | |
600 | ? NO_REGS : secondary_reload_class (CLASS, MODE, IN)) | |
eabd3262 | 601 | |
5a1c10de | 602 | /* On the PA it is not possible to directly move data between |
6b0ae684 JL |
603 | GENERAL_REGS and FP_REGS. */ |
604 | #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ | |
a40ed31b | 605 | (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)) |
6b0ae684 JL |
606 | |
607 | /* Return the stack location to use for secondary memory needed reloads. */ | |
608 | #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ | |
ad2c71b7 | 609 | gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16))) |
6b0ae684 | 610 | |
eabd3262 RK |
611 | \f |
612 | /* Stack layout; function entry, exit and calling. */ | |
613 | ||
614 | /* Define this if pushing a word on the stack | |
615 | makes the stack pointer a smaller address. */ | |
616 | /* #define STACK_GROWS_DOWNWARD */ | |
617 | ||
618 | /* Believe it or not. */ | |
619 | #define ARGS_GROW_DOWNWARD | |
620 | ||
621 | /* Define this if the nominal address of the stack frame | |
622 | is at the high-address end of the local variables; | |
623 | that is, each additional local variable allocated | |
624 | goes at a more negative offset in the frame. */ | |
625 | /* #define FRAME_GROWS_DOWNWARD */ | |
626 | ||
627 | /* Offset within stack frame to start allocating local variables at. | |
628 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
629 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
630 | of the first local allocated. */ | |
631 | #define STARTING_FRAME_OFFSET 8 | |
632 | ||
633 | /* If we generate an insn to push BYTES bytes, | |
634 | this says how many the stack pointer really advances by. | |
3f8f5a3f | 635 | On the HP-PA, don't define this because there are no push insns. */ |
eabd3262 RK |
636 | /* #define PUSH_ROUNDING(BYTES) */ |
637 | ||
638 | /* Offset of first parameter from the argument pointer register value. | |
639 | This value will be negated because the arguments grow down. | |
640 | Also note that on STACK_GROWS_UPWARD machines (such as this one) | |
641 | this is the distance from the frame pointer to the end of the first | |
642 | argument, not it's beginning. To get the real offset of the first | |
8c417c25 | 643 | argument, the size of the argument must be added. */ |
eabd3262 | 644 | |
520babc7 | 645 | #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32) |
eabd3262 | 646 | |
eabd3262 RK |
647 | /* When a parameter is passed in a register, stack space is still |
648 | allocated for it. */ | |
520babc7 | 649 | #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16) |
eabd3262 RK |
650 | |
651 | /* Define this if the above stack space is to be considered part of the | |
652 | space allocated by the caller. */ | |
653 | #define OUTGOING_REG_PARM_STACK_SPACE | |
654 | ||
655 | /* Keep the stack pointer constant throughout the function. | |
656 | This is both an optimization and a necessity: longjmp | |
657 | doesn't behave itself when the stack pointer moves within | |
658 | the function! */ | |
f73ad30e | 659 | #define ACCUMULATE_OUTGOING_ARGS 1 |
5a1c10de TG |
660 | |
661 | /* The weird HPPA calling conventions require a minimum of 48 bytes on | |
eabd3262 RK |
662 | the stack: 16 bytes for register saves, and 32 bytes for magic. |
663 | This is the difference between the logical top of stack and the | |
fe19a83d | 664 | actual sp. */ |
520babc7 JL |
665 | #define STACK_POINTER_OFFSET \ |
666 | (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32) | |
eabd3262 RK |
667 | |
668 | #define STACK_DYNAMIC_OFFSET(FNDECL) \ | |
520babc7 JL |
669 | (TARGET_64BIT \ |
670 | ? (STACK_POINTER_OFFSET) \ | |
671 | : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)) | |
eabd3262 RK |
672 | |
673 | /* Value is 1 if returning from a function call automatically | |
674 | pops the arguments described by the number-of-args field in the call. | |
8b109b37 | 675 | FUNDECL is the declaration node of the function (as a tree), |
eabd3262 RK |
676 | FUNTYPE is the data type of the function (as a tree), |
677 | or for a library call it is an identifier node for the subroutine name. */ | |
678 | ||
8b109b37 | 679 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
eabd3262 RK |
680 | |
681 | /* Define how to find the value returned by a function. | |
682 | VALTYPE is the data type of the value (as a tree). | |
683 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
684 | otherwise, FUNC is 0. */ | |
685 | ||
3f8f5a3f | 686 | /* On the HP-PA the value is found in register(s) 28(-29), unless |
c2ae03cb | 687 | the mode is SF or DF. Then the value is returned in fr4 (32, ) */ |
eabd3262 | 688 | |
520babc7 JL |
689 | /* This must perform the same promotions as PROMOTE_MODE, else |
690 | PROMOTE_FUNCTION_RETURN will not work correctly. */ | |
691 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
692 | gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \ | |
693 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ | |
694 | || POINTER_TYPE_P (VALTYPE)) \ | |
695 | ? word_mode : TYPE_MODE (VALTYPE), \ | |
696 | TREE_CODE (VALTYPE) == REAL_TYPE && !TARGET_SOFT_FLOAT ? 32 : 28) | |
eabd3262 | 697 | |
eabd3262 RK |
698 | /* Define how to find the value returned by a library function |
699 | assuming the value has mode MODE. */ | |
700 | ||
74356a72 | 701 | #define LIBCALL_VALUE(MODE) \ |
ad2c71b7 JL |
702 | gen_rtx_REG (MODE, \ |
703 | (! TARGET_SOFT_FLOAT \ | |
c5c76735 | 704 | && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) |
eabd3262 RK |
705 | |
706 | /* 1 if N is a possible register number for a function value | |
707 | as seen by the caller. */ | |
708 | ||
a40ed31b | 709 | #define FUNCTION_VALUE_REGNO_P(N) \ |
74356a72 | 710 | ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32)) |
eabd3262 | 711 | |
eabd3262 RK |
712 | \f |
713 | /* Define a data type for recording info about an argument list | |
714 | during the scan of that argument list. This data type should | |
715 | hold all necessary information about the function itself | |
716 | and about the args processed so far, enough to enable macros | |
717 | such as FUNCTION_ARG to determine where the next arg should go. | |
718 | ||
3f8f5a3f | 719 | On the HP-PA, this is a single integer, which is a number of words |
eabd3262 RK |
720 | of arguments scanned so far (including the invisible argument, |
721 | if any, which holds the structure-value-address). | |
722 | Thus 4 or more means all following args should go on the stack. */ | |
723 | ||
2c7ee1a6 | 724 | struct hppa_args {int words, nargs_prototype, indirect; }; |
2822d96e JL |
725 | |
726 | #define CUMULATIVE_ARGS struct hppa_args | |
eabd3262 RK |
727 | |
728 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
729 | for a call to a function whose data type is FNTYPE. | |
2822d96e | 730 | For a library call, FNTYPE is 0. */ |
eabd3262 | 731 | |
2c7ee1a6 | 732 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
2822d96e | 733 | (CUM).words = 0, \ |
2c7ee1a6 | 734 | (CUM).indirect = INDIRECT, \ |
2822d96e JL |
735 | (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ |
736 | ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ | |
737 | + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ | |
738 | || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \ | |
739 | : 0) | |
740 | ||
741 | ||
742 | ||
743 | /* Similar, but when scanning the definition of a procedure. We always | |
bd625e21 | 744 | set NARGS_PROTOTYPE large so we never return a PARALLEL. */ |
2822d96e JL |
745 | |
746 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ | |
747 | (CUM).words = 0, \ | |
a5bbd4b8 | 748 | (CUM).indirect = 0, \ |
2822d96e | 749 | (CUM).nargs_prototype = 1000 |
eabd3262 | 750 | |
fe19a83d | 751 | /* Figure out the size in words of the function argument. */ |
eabd3262 RK |
752 | |
753 | #define FUNCTION_ARG_SIZE(MODE, TYPE) \ | |
d7735a07 | 754 | ((((MODE) != BLKmode \ |
6e9c53b4 | 755 | ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \ |
d7735a07 | 756 | : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
eabd3262 RK |
757 | |
758 | /* Update the data in CUM to advance over an argument | |
759 | of mode MODE and data type TYPE. | |
760 | (TYPE is null for libcalls where that information may not be available.) */ | |
761 | ||
762 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
2822d96e | 763 | { (CUM).nargs_prototype--; \ |
d8bea1c6 RB |
764 | (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \ |
765 | + (((CUM).words & 01) && (TYPE) != 0 \ | |
766 | && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \ | |
2822d96e | 767 | } |
eabd3262 RK |
768 | |
769 | /* Determine where to put an argument to a function. | |
770 | Value is zero to push the argument on the stack, | |
771 | or a hard register in which to store the argument. | |
772 | ||
773 | MODE is the argument's machine mode. | |
774 | TYPE is the data type of the argument (as a tree). | |
775 | This is null for libcalls where that information may | |
776 | not be available. | |
777 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
778 | the preceding args and about the function being called. | |
779 | NAMED is nonzero if this argument is a named parameter | |
2822d96e | 780 | (otherwise it is an extra parameter matching an ellipsis). |
eabd3262 | 781 | |
2822d96e | 782 | On the HP-PA the first four words of args are normally in registers |
eabd3262 | 783 | and the rest are pushed. But any arg that won't entirely fit in regs |
3d247e85 TM |
784 | is pushed. |
785 | ||
99977c61 RS |
786 | Arguments passed in registers are either 1 or 2 words long. |
787 | ||
788 | The caller must make a distinction between calls to explicitly named | |
789 | functions and calls through pointers to functions -- the conventions | |
790 | are different! Calls through pointers to functions only use general | |
279c9bde | 791 | registers for the first four argument words. |
eabd3262 | 792 | |
2822d96e JL |
793 | Of course all this is different for the portable runtime model |
794 | HP wants everyone to use for ELF. Ugh. Here's a quick description | |
795 | of how it's supposed to work. | |
796 | ||
797 | 1) callee side remains unchanged. It expects integer args to be | |
798 | in the integer registers, float args in the float registers and | |
799 | unnamed args in integer registers. | |
800 | ||
801 | 2) caller side now depends on if the function being called has | |
802 | a prototype in scope (rather than if it's being called indirectly). | |
803 | ||
804 | 2a) If there is a prototype in scope, then arguments are passed | |
805 | according to their type (ints in integer registers, floats in float | |
806 | registers, unnamed args in integer registers. | |
807 | ||
808 | 2b) If there is no prototype in scope, then floating point arguments | |
809 | are passed in both integer and float registers. egad. | |
810 | ||
811 | FYI: The portable parameter passing conventions are almost exactly like | |
812 | the standard parameter passing conventions on the RS6000. That's why | |
813 | you'll see lots of similar code in rs6000.h. */ | |
a40ed31b | 814 | |
eabd3262 RK |
815 | #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE)) |
816 | ||
2822d96e JL |
817 | /* Do not expect to understand this without reading it several times. I'm |
818 | tempted to try and simply it, but I worry about breaking something. */ | |
819 | ||
520babc7 JL |
820 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
821 | function_arg (&CUM, MODE, TYPE, NAMED, 0) | |
822 | ||
823 | #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ | |
824 | function_arg (&CUM, MODE, TYPE, NAMED, 1) | |
eabd3262 | 825 | |
eabd3262 RK |
826 | /* For an arg passed partly in registers and partly in memory, |
827 | this is the number of registers used. | |
828 | For args passed entirely in registers or entirely in memory, zero. */ | |
829 | ||
520babc7 | 830 | /* For PA32 there are never split arguments. PA64, on the other hand, can |
fe19a83d | 831 | pass arguments partially in registers and partially in memory. */ |
520babc7 JL |
832 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ |
833 | (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0) | |
eabd3262 RK |
834 | |
835 | /* If defined, a C expression that gives the alignment boundary, in | |
836 | bits, of an argument with the specified mode and type. If it is | |
837 | not defined, `PARM_BOUNDARY' is used for all arguments. */ | |
838 | ||
ca098a1d RK |
839 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ |
840 | (((TYPE) != 0) \ | |
841 | ? ((integer_zerop (TYPE_SIZE (TYPE)) \ | |
842 | || ! TREE_CONSTANT (TYPE_SIZE (TYPE))) \ | |
843 | ? BITS_PER_UNIT \ | |
844 | : (((int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) \ | |
845 | / UNITS_PER_WORD) * BITS_PER_WORD) \ | |
846 | : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ | |
847 | ? PARM_BOUNDARY : GET_MODE_ALIGNMENT(MODE))) | |
eabd3262 RK |
848 | |
849 | /* Arguments larger than eight bytes are passed by invisible reference */ | |
850 | ||
fe19a83d | 851 | /* PA64 does not pass anything by invisible reference. */ |
eabd3262 | 852 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ |
520babc7 JL |
853 | (TARGET_64BIT \ |
854 | ? 0 \ | |
855 | : (((TYPE) && int_size_in_bytes (TYPE) > 8) \ | |
856 | || ((MODE) && GET_MODE_SIZE (MODE) > 8))) | |
32addcdf | 857 | |
520babc7 JL |
858 | /* PA64 does not pass anything by invisible reference. |
859 | This should be undef'ed for 64bit, but we'll see if this works. The | |
fe19a83d | 860 | problem is that we can't test TARGET_64BIT from the preprocessor. */ |
32addcdf | 861 | #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ |
520babc7 JL |
862 | (TARGET_64BIT \ |
863 | ? 0 \ | |
864 | : (((TYPE) && int_size_in_bytes (TYPE) > 8) \ | |
865 | || ((MODE) && GET_MODE_SIZE (MODE) > 8))) | |
32addcdf | 866 | |
eabd3262 | 867 | \f |
e2500fed GK |
868 | extern GTY(()) rtx hppa_compare_op0; |
869 | extern GTY(()) rtx hppa_compare_op1; | |
eabd3262 RK |
870 | extern enum cmp_type hppa_branch_type; |
871 | ||
54374491 | 872 | #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ |
ae02eae8 | 873 | pa_asm_output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION) |
e38fd454 | 874 | |
1c7a8112 | 875 | /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than |
f6f315fe AM |
876 | as assembly via FUNCTION_PROFILER. Just output a local label. |
877 | We can't use the function label because the GAS SOM target can't | |
878 | handle the difference of a global symbol and a local symbol. */ | |
eabd3262 | 879 | |
f6f315fe AM |
880 | #ifndef FUNC_BEGIN_PROLOG_LABEL |
881 | #define FUNC_BEGIN_PROLOG_LABEL "LFBP" | |
882 | #endif | |
883 | ||
884 | #define FUNCTION_PROFILER(FILE, LABEL) \ | |
885 | ASM_OUTPUT_INTERNAL_LABEL (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) | |
eabd3262 | 886 | |
1c7a8112 AM |
887 | #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no) |
888 | void hppa_profile_hook PARAMS ((int label_no)); | |
eabd3262 | 889 | |
8f949e7e JDA |
890 | /* The profile counter if emitted must come before the prologue. */ |
891 | #define PROFILE_BEFORE_PROLOGUE 1 | |
892 | ||
eabd3262 RK |
893 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
894 | the stack pointer does not matter. The value is tested only in | |
895 | functions that have frame pointers. | |
896 | No definition is equivalent to always zero. */ | |
897 | ||
898 | extern int may_call_alloca; | |
eabd3262 RK |
899 | |
900 | #define EXIT_IGNORE_STACK \ | |
901 | (get_frame_size () != 0 \ | |
902 | || current_function_calls_alloca || current_function_outgoing_args_size) | |
903 | ||
eabd3262 | 904 | /* Output assembler code for a block containing the constant parts |
f16fe394 | 905 | of a trampoline, leaving space for the variable parts.\ |
eabd3262 | 906 | |
f16fe394 JL |
907 | The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM |
908 | and then branches to the specified routine. | |
eabd3262 | 909 | |
f16fe394 JL |
910 | This code template is copied from text segment to stack location |
911 | and then patched with INITIALIZE_TRAMPOLINE to contain | |
5a1c10de | 912 | valid values, and then entered as a subroutine. |
eabd3262 | 913 | |
5a1c10de | 914 | It is best to keep this as small as possible to avoid having to |
f16fe394 JL |
915 | flush multiple lines in the cache. */ |
916 | ||
520babc7 JL |
917 | #define TRAMPOLINE_TEMPLATE(FILE) \ |
918 | { \ | |
919 | if (! TARGET_64BIT) \ | |
920 | { \ | |
921 | fputs ("\tldw 36(%r22),%r21\n", FILE); \ | |
922 | fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \ | |
923 | if (ASSEMBLER_DIALECT == 0) \ | |
924 | fputs ("\tdepi 0,31,2,%r21\n", FILE); \ | |
925 | else \ | |
926 | fputs ("\tdepwi 0,31,2,%r21\n", FILE); \ | |
927 | fputs ("\tldw 4(%r21),%r19\n", FILE); \ | |
928 | fputs ("\tldw 0(%r21),%r21\n", FILE); \ | |
929 | fputs ("\tldsid (%r21),%r1\n", FILE); \ | |
930 | fputs ("\tmtsp %r1,%sr0\n", FILE); \ | |
931 | fputs ("\tbe 0(%sr0,%r21)\n", FILE); \ | |
932 | fputs ("\tldw 40(%r22),%r29\n", FILE); \ | |
933 | fputs ("\t.word 0\n", FILE); \ | |
934 | fputs ("\t.word 0\n", FILE); \ | |
8e1494b7 JDA |
935 | fputs ("\t.word 0\n", FILE); \ |
936 | fputs ("\t.word 0\n", FILE); \ | |
520babc7 JL |
937 | } \ |
938 | else \ | |
939 | { \ | |
940 | fputs ("\t.dword 0\n", FILE); \ | |
941 | fputs ("\t.dword 0\n", FILE); \ | |
942 | fputs ("\t.dword 0\n", FILE); \ | |
943 | fputs ("\t.dword 0\n", FILE); \ | |
944 | fputs ("\tmfia %r31\n", FILE); \ | |
945 | fputs ("\tldd 24(%r31),%r1\n", FILE); \ | |
946 | fputs ("\tldd 24(%r1),%r27\n", FILE); \ | |
947 | fputs ("\tldd 16(%r1),%r1\n", FILE); \ | |
948 | fputs ("\tbve (%r1)\n", FILE); \ | |
949 | fputs ("\tldd 32(%r31),%r31\n", FILE); \ | |
950 | fputs ("\t.dword 0 ; fptr\n", FILE); \ | |
951 | fputs ("\t.dword 0 ; static link\n", FILE); \ | |
952 | } \ | |
77a2f698 | 953 | } |
f16fe394 JL |
954 | |
955 | /* Length in units of the trampoline for entering a nested function. | |
afcc28b2 RS |
956 | |
957 | Flush the cache entries corresponding to the first and last addresses | |
958 | of the trampoline. This is necessary as the trampoline may cross two | |
5a1c10de | 959 | cache lines. |
afcc28b2 | 960 | |
77a2f698 TG |
961 | If the code part of the trampoline ever grows to > 32 bytes, then it |
962 | will become necessary to hack on the cacheflush pattern in pa.md. */ | |
f16fe394 | 963 | |
8e1494b7 | 964 | #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52) |
eabd3262 RK |
965 | |
966 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
967 | FNADDR is an RTX for the address of the function's pure code. | |
968 | CXT is an RTX for the static chain value for the function. | |
969 | ||
8e1494b7 JDA |
970 | Move the function address to the trampoline template at offset 36. |
971 | Move the static chain value to trampoline template at offset 40. | |
972 | Move the trampoline address to trampoline template at offset 44. | |
973 | Move r19 to trampoline template at offset 48. The latter two | |
974 | words create a plabel for the indirect call to the trampoline. */ | |
f16fe394 | 975 | |
520babc7 | 976 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ |
77a2f698 | 977 | { \ |
520babc7 JL |
978 | if (! TARGET_64BIT) \ |
979 | { \ | |
980 | rtx start_addr, end_addr; \ | |
981 | \ | |
982 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \ | |
983 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \ | |
984 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \ | |
985 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \ | |
8e1494b7 JDA |
986 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \ |
987 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \ | |
988 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \ | |
989 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \ | |
990 | gen_rtx_REG (Pmode, 19)); \ | |
520babc7 JL |
991 | /* fdc and fic only use registers for the address to flush, \ |
992 | they do not accept integer displacements. */ \ | |
993 | start_addr = force_reg (Pmode, (TRAMP)); \ | |
994 | end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \ | |
995 | emit_insn (gen_dcacheflush (start_addr, end_addr)); \ | |
996 | end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \ | |
997 | emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \ | |
998 | gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\ | |
999 | } \ | |
1000 | else \ | |
1001 | { \ | |
1002 | rtx start_addr, end_addr; \ | |
77a2f698 | 1003 | \ |
520babc7 JL |
1004 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \ |
1005 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \ | |
1006 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \ | |
1007 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \ | |
fe19a83d | 1008 | /* Create a fat pointer for the trampoline. */ \ |
520babc7 JL |
1009 | end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \ |
1010 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ | |
1011 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \ | |
1012 | end_addr = gen_rtx_REG (Pmode, 27); \ | |
1013 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ | |
1014 | emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \ | |
1015 | /* fdc and fic only use registers for the address to flush, \ | |
1016 | they do not accept integer displacements. */ \ | |
1017 | start_addr = force_reg (Pmode, (TRAMP)); \ | |
1018 | end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \ | |
1019 | emit_insn (gen_dcacheflush (start_addr, end_addr)); \ | |
1020 | end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \ | |
1021 | emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \ | |
1022 | gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\ | |
1023 | } \ | |
f16fe394 | 1024 | } |
eabd3262 | 1025 | |
8e1494b7 JDA |
1026 | /* Perform any machine-specific adjustment in the address of the trampoline. |
1027 | ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE. | |
1028 | Adjust the trampoline address to point to the plabel at offset 44. */ | |
1029 | ||
1030 | #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \ | |
1031 | if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46)) | |
1032 | ||
eabd3262 RK |
1033 | /* Emit code for a call to builtin_saveregs. We must emit USE insns which |
1034 | reference the 4 integer arg registers and 4 fp arg registers. | |
1035 | Ordinarily they are not call used registers, but they are for | |
1036 | _builtin_saveregs, so we must make this explicit. */ | |
1037 | ||
648d2ffc | 1038 | #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs () |
eabd3262 | 1039 | |
ca5f4364 RH |
1040 | /* Implement `va_start' for varargs and stdarg. */ |
1041 | ||
ca5f4364 RH |
1042 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ |
1043 | hppa_va_start (stdarg, valist, nextarg) | |
1044 | ||
1045 | /* Implement `va_arg'. */ | |
1046 | ||
ca5f4364 RH |
1047 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ |
1048 | hppa_va_arg (valist, type) | |
eabd3262 | 1049 | \f |
51c2de46 | 1050 | /* Addressing modes, and classification of registers for them. |
eabd3262 | 1051 | |
51c2de46 JQ |
1052 | Using autoincrement addressing modes on PA8000 class machines is |
1053 | not profitable. */ | |
eabd3262 | 1054 | |
42a21f70 JQ |
1055 | #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000) |
1056 | #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000) | |
51c2de46 | 1057 | |
42a21f70 JQ |
1058 | #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000) |
1059 | #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000) | |
eabd3262 RK |
1060 | |
1061 | /* Macros to check register numbers against specific register classes. */ | |
1062 | ||
1063 | /* These assume that REGNO is a hard or pseudo reg number. | |
1064 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1065 | or a pseudo reg currently allocated to a suitable hard reg. | |
1066 | Since they use reg_renumber, they are safe only once reg_renumber | |
1067 | has been allocated, which happens in local-alloc.c. */ | |
1068 | ||
1069 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1070 | ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) | |
1071 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1072 | ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) | |
1073 | #define REGNO_OK_FOR_FP_P(REGNO) \ | |
5345f91a | 1074 | (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO])) |
eabd3262 RK |
1075 | |
1076 | /* Now macros that check whether X is a register and also, | |
1077 | strictly, whether it is in a specified class. | |
1078 | ||
38e01259 | 1079 | These macros are specific to the HP-PA, and may be used only |
eabd3262 RK |
1080 | in code for printing assembler insns and in conditions for |
1081 | define_optimization. */ | |
1082 | ||
1083 | /* 1 if X is an fp register. */ | |
1084 | ||
1085 | #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
1086 | \f | |
1087 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1088 | ||
1089 | #define MAX_REGS_PER_ADDRESS 2 | |
1090 | ||
901a8cea JL |
1091 | /* Recognize any constant value that is a valid address except |
1092 | for symbolic addresses. We get better CSE by rejecting them | |
6eff269e BK |
1093 | here and allowing hppa_legitimize_address to break them up. We |
1094 | use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */ | |
eabd3262 | 1095 | |
901a8cea | 1096 | #define CONSTANT_ADDRESS_P(X) \ |
6eff269e BK |
1097 | ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ |
1098 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
6e11a328 JL |
1099 | || GET_CODE (X) == HIGH) \ |
1100 | && (reload_in_progress || reload_completed || ! symbolic_expression_p (X))) | |
6eff269e | 1101 | |
af69aabb | 1102 | /* Include all constant integers and constant doubles, but not |
f45ebe47 | 1103 | floating-point, except for floating-point zero. |
af69aabb | 1104 | |
520babc7 JL |
1105 | Reject LABEL_REFs if we're not using gas or the new HP assembler. |
1106 | ||
1107 | ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need | |
1108 | further work. */ | |
8d913d99 AM |
1109 | #ifndef NEW_HP_ASSEMBLER |
1110 | #define NEW_HP_ASSEMBLER 0 | |
f45ebe47 | 1111 | #endif |
8d913d99 AM |
1112 | #define LEGITIMATE_CONSTANT_P(X) \ |
1113 | ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
1114 | || (X) == CONST0_RTX (GET_MODE (X))) \ | |
1115 | && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \ | |
1116 | && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \ | |
1117 | && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \ | |
1118 | && !(HOST_BITS_PER_WIDE_INT <= 32 \ | |
b8e42321 JDA |
1119 | || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \ |
1120 | && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \ | |
8d913d99 AM |
1121 | || cint_ok_for_move (INTVAL (X)))) \ |
1122 | && !function_label_operand (X, VOIDmode)) | |
eabd3262 | 1123 | |
5a1c10de | 1124 | /* Subroutine for EXTRA_CONSTRAINT. |
eabd3262 | 1125 | |
16594451 JL |
1126 | Return 1 iff OP is a pseudo which did not get a hard register and |
1127 | we are running the reload pass. */ | |
1128 | ||
1129 | #define IS_RELOADING_PSEUDO_P(OP) \ | |
1130 | ((reload_in_progress \ | |
1131 | && GET_CODE (OP) == REG \ | |
1132 | && REGNO (OP) >= FIRST_PSEUDO_REGISTER \ | |
1133 | && reg_renumber [REGNO (OP)] < 0)) | |
eabd3262 RK |
1134 | |
1135 | /* Optional extra constraints for this machine. Borrowed from sparc.h. | |
1136 | ||
1137 | For the HPPA, `Q' means that this is a memory operand but not a | |
1138 | symbolic memory operand. Note that an unassigned pseudo register | |
1139 | is such a memory operand. Needed because reload will generate | |
1140 | these things in insns and then not re-recognize the insns, causing | |
1141 | constrain_operands to fail. | |
1142 | ||
1c6c21c8 | 1143 | `R' is used for scaled indexed addresses. |
eabd3262 | 1144 | |
80559c31 | 1145 | `S' is the constant 31. |
eabd3262 | 1146 | |
84721fbd | 1147 | `T' is for fp loads and stores. */ |
ec241c19 JL |
1148 | #define EXTRA_CONSTRAINT(OP, C) \ |
1149 | ((C) == 'Q' ? \ | |
16594451 | 1150 | (IS_RELOADING_PSEUDO_P (OP) \ |
16594451 | 1151 | || (GET_CODE (OP) == MEM \ |
78c0acfd JL |
1152 | && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ |
1153 | || reload_in_progress) \ | |
2414e0e2 JL |
1154 | && ! symbolic_memory_operand (OP, VOIDmode) \ |
1155 | && !(GET_CODE (XEXP (OP, 0)) == PLUS \ | |
1156 | && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ | |
1157 | || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\ | |
1158 | : ((C) == 'R' ? \ | |
1159 | (GET_CODE (OP) == MEM \ | |
1160 | && GET_CODE (XEXP (OP, 0)) == PLUS \ | |
1161 | && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \ | |
1162 | || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \ | |
1163 | && (move_operand (OP, GET_MODE (OP)) \ | |
78c0acfd JL |
1164 | || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ |
1165 | || reload_in_progress)) \ | |
16594451 | 1166 | : ((C) == 'T' ? \ |
84721fbd JL |
1167 | (GET_CODE (OP) == MEM \ |
1168 | /* Using DFmode forces only short displacements \ | |
f9bd8d8e JL |
1169 | to be recognized as valid in reg+d addresses. \ |
1170 | However, this is not necessary for PA2.0 since\ | |
1171 | it has long FP loads/stores. */ \ | |
1172 | && memory_address_p ((TARGET_PA_20 \ | |
1173 | ? GET_MODE (OP) \ | |
1174 | : DFmode), \ | |
1175 | XEXP (OP, 0)) \ | |
ecab2143 | 1176 | && GET_CODE (XEXP (OP, 0)) != LO_SUM \ |
2414e0e2 JL |
1177 | && !(GET_CODE (XEXP (OP, 0)) == PLUS \ |
1178 | && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ | |
625bcba8 | 1179 | || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\ |
520babc7 JL |
1180 | : ((C) == 'U' ? \ |
1181 | (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \ | |
f8eb41cc JL |
1182 | : ((C) == 'A' ? \ |
1183 | (GET_CODE (OP) == MEM \ | |
1184 | && GET_CODE (XEXP (OP, 0)) == LO_SUM \ | |
1185 | && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ | |
1186 | && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \ | |
1187 | && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \ | |
1188 | && GET_MODE (XEXP (OP, 0)) == Pmode) \ | |
80559c31 | 1189 | : ((C) == 'S' ? \ |
f8eb41cc | 1190 | (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0)))))) |
520babc7 | 1191 | |
16594451 JL |
1192 | |
1193 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1194 | and check its validity for a certain class. | |
1195 | We have two alternate definitions for each of them. | |
1196 | The usual definition accepts all pseudo regs; the other rejects | |
1197 | them unless they have been allocated suitable hard regs. | |
1198 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1199 | ||
1200 | Most source files want to accept pseudo regs in the hope that | |
1201 | they will get allocated to the class that the insn wants them to be in. | |
1202 | Source files for reload pass need to be strict. | |
1203 | After reload, it makes no difference, since pseudo regs have | |
1204 | been eliminated by then. */ | |
ec241c19 | 1205 | |
eabd3262 RK |
1206 | #ifndef REG_OK_STRICT |
1207 | ||
1208 | /* Nonzero if X is a hard reg that can be used as an index | |
1209 | or if it is a pseudo reg. */ | |
1210 | #define REG_OK_FOR_INDEX_P(X) \ | |
e515e507 | 1211 | (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
eabd3262 RK |
1212 | /* Nonzero if X is a hard reg that can be used as a base reg |
1213 | or if it is a pseudo reg. */ | |
1214 | #define REG_OK_FOR_BASE_P(X) \ | |
e515e507 | 1215 | (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
eabd3262 | 1216 | |
eabd3262 RK |
1217 | #else |
1218 | ||
1219 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1220 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1221 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1222 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1223 | ||
eabd3262 RK |
1224 | #endif |
1225 | \f | |
1226 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1227 | that is a valid memory address for an instruction. | |
1228 | The MODE argument is the machine mode for the MEM expression | |
1229 | that wants to use this address. | |
1230 | ||
3f8f5a3f | 1231 | On the HP-PA, the actual legitimate addresses must be |
eabd3262 RK |
1232 | REG+REG, REG+(REG*SCALE) or REG+SMALLINT. |
1233 | But we can treat a SYMBOL_REF as legitimate if it is part of this | |
1234 | function's constant-pool, because such addresses can actually | |
a08e7493 JL |
1235 | be output as REG+SMALLINT. |
1236 | ||
1237 | Note we only allow 5 bit immediates for access to a constant address; | |
1238 | doing so avoids losing for loading/storing a FP register at an address | |
1239 | which will not fit in 5 bits. */ | |
eabd3262 | 1240 | |
520babc7 | 1241 | #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20) |
eabd3262 RK |
1242 | #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X)) |
1243 | ||
520babc7 | 1244 | #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20) |
eabd3262 RK |
1245 | #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X)) |
1246 | ||
520babc7 | 1247 | #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800) |
eabd3262 RK |
1248 | #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X)) |
1249 | ||
520babc7 | 1250 | #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000) |
eabd3262 RK |
1251 | #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X)) |
1252 | ||
eabd3262 RK |
1253 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
1254 | { \ | |
1255 | if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
1256 | || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \ | |
1257 | || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \ | |
1258 | && REG_P (XEXP (X, 0)) \ | |
1259 | && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \ | |
1260 | goto ADDR; \ | |
1261 | else if (GET_CODE (X) == PLUS) \ | |
1262 | { \ | |
516c2342 | 1263 | rtx base = 0, index = 0; \ |
7ee72796 | 1264 | if (REG_P (XEXP (X, 0)) \ |
eabd3262 RK |
1265 | && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ |
1266 | base = XEXP (X, 0), index = XEXP (X, 1); \ | |
1267 | else if (REG_P (XEXP (X, 1)) \ | |
1268 | && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ | |
1269 | base = XEXP (X, 1), index = XEXP (X, 0); \ | |
1270 | if (base != 0) \ | |
1271 | if (GET_CODE (index) == CONST_INT \ | |
74356a72 TG |
1272 | && ((INT_14_BITS (index) \ |
1273 | && (TARGET_SOFT_FLOAT \ | |
f9bd8d8e JL |
1274 | || (TARGET_PA_20 \ |
1275 | && ((MODE == SFmode \ | |
1276 | && (INTVAL (index) % 4) == 0)\ | |
1277 | || (MODE == DFmode \ | |
1278 | && (INTVAL (index) % 8) == 0)))\ | |
74356a72 | 1279 | || ((MODE) != SFmode && (MODE) != DFmode))) \ |
eabd3262 RK |
1280 | || INT_5_BITS (index))) \ |
1281 | goto ADDR; \ | |
1e0e41d2 | 1282 | if (! TARGET_SOFT_FLOAT \ |
96b63cd7 | 1283 | && ! TARGET_DISABLE_INDEXING \ |
1e0e41d2 | 1284 | && base \ |
fc209487 | 1285 | && ((MODE) == SFmode || (MODE) == DFmode) \ |
2414e0e2 JL |
1286 | && GET_CODE (index) == MULT \ |
1287 | && GET_CODE (XEXP (index, 0)) == REG \ | |
1288 | && REG_OK_FOR_BASE_P (XEXP (index, 0)) \ | |
1289 | && GET_CODE (XEXP (index, 1)) == CONST_INT \ | |
fc209487 | 1290 | && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\ |
2414e0e2 | 1291 | goto ADDR; \ |
eabd3262 RK |
1292 | } \ |
1293 | else if (GET_CODE (X) == LO_SUM \ | |
1294 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1295 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1296 | && CONSTANT_P (XEXP (X, 1)) \ | |
74356a72 | 1297 | && (TARGET_SOFT_FLOAT \ |
f9b5668e JL |
1298 | /* We can allow symbolic LO_SUM addresses\ |
1299 | for PA2.0. */ \ | |
1300 | || (TARGET_PA_20 \ | |
1301 | && GET_CODE (XEXP (X, 1)) != CONST_INT)\ | |
74356a72 TG |
1302 | || ((MODE) != SFmode \ |
1303 | && (MODE) != DFmode))) \ | |
eabd3262 RK |
1304 | goto ADDR; \ |
1305 | else if (GET_CODE (X) == LO_SUM \ | |
1306 | && GET_CODE (XEXP (X, 0)) == SUBREG \ | |
1307 | && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\ | |
1308 | && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\ | |
1309 | && CONSTANT_P (XEXP (X, 1)) \ | |
74356a72 | 1310 | && (TARGET_SOFT_FLOAT \ |
f9b5668e JL |
1311 | /* We can allow symbolic LO_SUM addresses\ |
1312 | for PA2.0. */ \ | |
1313 | || (TARGET_PA_20 \ | |
1314 | && GET_CODE (XEXP (X, 1)) != CONST_INT)\ | |
74356a72 TG |
1315 | || ((MODE) != SFmode \ |
1316 | && (MODE) != DFmode))) \ | |
eabd3262 RK |
1317 | goto ADDR; \ |
1318 | else if (GET_CODE (X) == LABEL_REF \ | |
1319 | || (GET_CODE (X) == CONST_INT \ | |
a08e7493 | 1320 | && INT_5_BITS (X))) \ |
eabd3262 | 1321 | goto ADDR; \ |
a205e34b JL |
1322 | /* Needed for -fPIC */ \ |
1323 | else if (GET_CODE (X) == LO_SUM \ | |
1324 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1325 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
7eb07bdb AM |
1326 | && GET_CODE (XEXP (X, 1)) == UNSPEC \ |
1327 | && (TARGET_SOFT_FLOAT \ | |
1328 | || TARGET_PA_20 \ | |
1329 | || ((MODE) != SFmode \ | |
1330 | && (MODE) != DFmode))) \ | |
a205e34b | 1331 | goto ADDR; \ |
eabd3262 | 1332 | } |
cc46ae8e JL |
1333 | |
1334 | /* Look for machine dependent ways to make the invalid address AD a | |
1335 | valid address. | |
1336 | ||
1337 | For the PA, transform: | |
1338 | ||
1339 | memory(X + <large int>) | |
1340 | ||
1341 | into: | |
1342 | ||
1343 | if (<large int> & mask) >= 16 | |
1344 | Y = (<large int> & ~mask) + mask + 1 Round up. | |
1345 | else | |
1346 | Y = (<large int> & ~mask) Round down. | |
1347 | Z = X + Y | |
1348 | memory (Z + (<large int> - Y)); | |
1349 | ||
1350 | This makes reload inheritance and reload_cse work better since Z | |
1351 | can be reused. | |
1352 | ||
1353 | There may be more opportunities to improve code with this hook. */ | |
1354 | #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ | |
1355 | do { \ | |
1356 | int offset, newoffset, mask; \ | |
5f0c590d | 1357 | rtx new, temp = NULL_RTX; \ |
f9bd8d8e JL |
1358 | \ |
1359 | mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1360 | ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \ | |
cc46ae8e | 1361 | \ |
2872409d | 1362 | if (optimize \ |
5f0c590d JL |
1363 | && GET_CODE (AD) == PLUS) \ |
1364 | temp = simplify_binary_operation (PLUS, Pmode, \ | |
1365 | XEXP (AD, 0), XEXP (AD, 1)); \ | |
1366 | \ | |
1367 | new = temp ? temp : AD; \ | |
1368 | \ | |
1369 | if (optimize \ | |
1370 | && GET_CODE (new) == PLUS \ | |
1371 | && GET_CODE (XEXP (new, 0)) == REG \ | |
1372 | && GET_CODE (XEXP (new, 1)) == CONST_INT) \ | |
cc46ae8e | 1373 | { \ |
5f0c590d | 1374 | offset = INTVAL (XEXP ((new), 1)); \ |
cc46ae8e JL |
1375 | \ |
1376 | /* Choose rounding direction. Round up if we are >= halfway. */ \ | |
1377 | if ((offset & mask) >= ((mask + 1) / 2)) \ | |
1378 | newoffset = (offset & ~mask) + mask + 1; \ | |
1379 | else \ | |
1380 | newoffset = offset & ~mask; \ | |
1381 | \ | |
1382 | if (newoffset != 0 \ | |
1383 | && VAL_14_BITS_P (newoffset)) \ | |
1384 | { \ | |
cc46ae8e | 1385 | \ |
5f0c590d | 1386 | temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \ |
cc46ae8e JL |
1387 | GEN_INT (newoffset)); \ |
1388 | AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\ | |
1389 | push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \ | |
1390 | BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \ | |
1391 | (OPNUM), (TYPE)); \ | |
1392 | goto WIN; \ | |
1393 | } \ | |
1394 | } \ | |
1395 | } while (0) | |
1396 | ||
1397 | ||
1398 | ||
eabd3262 RK |
1399 | \f |
1400 | /* Try machine-dependent ways of modifying an illegitimate address | |
1401 | to be legitimate. If we find one, return the new, valid address. | |
1402 | This macro is used in only one place: `memory_address' in explow.c. | |
1403 | ||
1404 | OLDX is the address as it was before break_out_memory_refs was called. | |
1405 | In some cases it is useful to look at this to decide what needs to be done. | |
1406 | ||
1407 | MODE and WIN are passed so that this macro can use | |
1408 | GO_IF_LEGITIMATE_ADDRESS. | |
1409 | ||
1410 | It is always safe for this macro to do nothing. It exists to recognize | |
901a8cea JL |
1411 | opportunities to optimize the output. */ |
1412 | ||
901a8cea JL |
1413 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ |
1414 | { rtx orig_x = (X); \ | |
1415 | (X) = hppa_legitimize_address (X, OLDX, MODE); \ | |
1416 | if ((X) != orig_x && memory_address_p (MODE, X)) \ | |
1417 | goto WIN; } | |
eabd3262 RK |
1418 | |
1419 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1420 | has an effect that depends on the machine mode it is used for. */ | |
1421 | ||
1422 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1423 | if (GET_CODE (ADDR) == PRE_DEC \ | |
1424 | || GET_CODE (ADDR) == POST_DEC \ | |
1425 | || GET_CODE (ADDR) == PRE_INC \ | |
1426 | || GET_CODE (ADDR) == POST_INC) \ | |
1427 | goto LABEL | |
1428 | \f | |
ae46c4e0 | 1429 | #define TARGET_ASM_SELECT_SECTION pa_select_section |
8f851c1f | 1430 | |
e7eacc8e JL |
1431 | /* Define this macro if references to a symbol must be treated |
1432 | differently depending on something about the variable or | |
1433 | function named by the symbol (such as what section it is in). | |
1434 | ||
1435 | The macro definition, if any, is executed immediately after the | |
1436 | rtl for DECL or other node is created. | |
1437 | The value of the rtl will be a `mem' whose address is a | |
1438 | `symbol_ref'. | |
1439 | ||
1440 | The usual thing for this macro to do is to a flag in the | |
1441 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
1442 | name string in the `symbol_ref' (if one bit is not enough | |
1443 | information). | |
1444 | ||
1445 | On the HP-PA we use this to indicate if a symbol is in text or | |
fe19a83d | 1446 | data space. Also, function labels need special treatment. */ |
e7eacc8e JL |
1447 | |
1448 | #define TEXT_SPACE_P(DECL)\ | |
1449 | (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1450 | || (TREE_CODE (DECL) == VAR_DECL \ | |
1451 | && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ | |
1452 | && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ | |
1453 | && !flag_pic) \ | |
1454 | || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \ | |
1455 | && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings))) | |
1456 | ||
10d17cb7 | 1457 | #define FUNCTION_NAME_P(NAME) (*(NAME) == '@') |
e7eacc8e | 1458 | |
eabd3262 RK |
1459 | /* Specify the machine mode that this machine uses |
1460 | for the index in the tablejump instruction. */ | |
3e056efc | 1461 | #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode) |
eabd3262 | 1462 | |
937ac3f9 JL |
1463 | /* Jump tables must be 32 bit aligned, no matter the size of the element. */ |
1464 | #define ADDR_VEC_ALIGN(ADDR_VEC) 2 | |
1465 | ||
eabd3262 RK |
1466 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
1467 | #define DEFAULT_SIGNED_CHAR 1 | |
1468 | ||
1469 | /* Max number of bytes we can move from memory to memory | |
1470 | in one reasonably fast instruction. */ | |
1471 | #define MOVE_MAX 8 | |
1472 | ||
68944452 JL |
1473 | /* Higher than the default as we prefer to use simple move insns |
1474 | (better scheduling and delay slot filling) and because our | |
520babc7 JL |
1475 | built-in block move is really a 2X unrolled loop. |
1476 | ||
1477 | Believe it or not, this has to be big enough to allow for copying all | |
1478 | arguments passed in registers to avoid infinite recursion during argument | |
1479 | setup for a function call. Why? Consider how we copy the stack slots | |
1480 | reserved for parameters when they may be trashed by a call. */ | |
1481 | #define MOVE_RATIO (TARGET_64BIT ? 8 : 4) | |
68944452 | 1482 | |
9a63901f RK |
1483 | /* Define if operations between registers always perform the operation |
1484 | on the full register even if a narrower mode is specified. */ | |
1485 | #define WORD_REGISTER_OPERATIONS | |
1486 | ||
1487 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1488 | will either zero-extend or sign-extend. The value of this macro should | |
1489 | be the code that says which one of the two operations is implicitly | |
1490 | done, NIL if none. */ | |
1491 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
eabd3262 RK |
1492 | |
1493 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1494 | #define SLOW_BYTE_ACCESS 1 | |
1495 | ||
eabd3262 RK |
1496 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1497 | is done just by pretending it is already truncated. */ | |
1498 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1499 | ||
1500 | /* We assume that the store-condition-codes instructions store 0 for false | |
1501 | and some other value for true. This is the value stored for true. */ | |
1502 | ||
1503 | #define STORE_FLAG_VALUE 1 | |
1504 | ||
1505 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
cb560352 | 1506 | #define PROMOTE_PROTOTYPES 1 |
520babc7 | 1507 | #define PROMOTE_FUNCTION_RETURN 1 |
eabd3262 RK |
1508 | |
1509 | /* Specify the machine mode that pointers have. | |
1510 | After generation of rtl, the compiler makes no further distinction | |
1511 | between pointers and any other objects of this machine mode. */ | |
0a16ce6f | 1512 | #define Pmode word_mode |
eabd3262 RK |
1513 | |
1514 | /* Add any extra modes needed to represent the condition code. | |
1515 | ||
fe19a83d | 1516 | HPPA floating comparisons produce condition codes. */ |
aa0b4465 | 1517 | #define EXTRA_CC_MODES CC(CCFPmode, "CCFP") |
eabd3262 RK |
1518 | |
1519 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1520 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
1521 | should be used. CC_NOOVmode should be used when the first operand is a | |
1522 | PLUS, MINUS, or NEG. CCmode should be used when no special processing is | |
1523 | needed. */ | |
b565a316 | 1524 | #define SELECT_CC_MODE(OP,X,Y) \ |
eabd3262 RK |
1525 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \ |
1526 | ||
1527 | /* A function address in a call instruction | |
1528 | is a byte address (for indexing purposes) | |
1529 | so give the MEM rtx a byte's mode. */ | |
1530 | #define FUNCTION_MODE SImode | |
5a1c10de | 1531 | |
eabd3262 RK |
1532 | /* Define this if addresses of constant functions |
1533 | shouldn't be put through pseudo regs where they can be cse'd. | |
1534 | Desirable on machines where ordinary constants are expensive | |
1535 | but a CALL with constant address is cheap. */ | |
1536 | #define NO_FUNCTION_CSE | |
1537 | ||
d969caf8 | 1538 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
fe19a83d | 1539 | few bits. */ |
d969caf8 | 1540 | #define SHIFT_COUNT_TRUNCATED 1 |
e061ef25 | 1541 | |
eabd3262 RK |
1542 | /* Compute the cost of computing a constant rtl expression RTX |
1543 | whose rtx-code is CODE. The body of this macro is a portion | |
1544 | of a switch statement. If the code is computed here, | |
1545 | return it with a return statement. Otherwise, break from the switch. */ | |
1546 | ||
1547 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ | |
5feca984 KG |
1548 | case CONST_INT: \ |
1549 | if (INTVAL (RTX) == 0) return 0; \ | |
1550 | if (INT_14_BITS (RTX)) return 1; \ | |
1551 | case HIGH: \ | |
1552 | return 2; \ | |
1553 | case CONST: \ | |
1554 | case LABEL_REF: \ | |
1555 | case SYMBOL_REF: \ | |
1556 | return 4; \ | |
1557 | case CONST_DOUBLE: \ | |
1558 | if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \ | |
1559 | && OUTER_CODE != SET) \ | |
1560 | return 0; \ | |
1561 | else \ | |
af69aabb | 1562 | return 8; |
eabd3262 RK |
1563 | |
1564 | #define ADDRESS_COST(RTX) \ | |
1565 | (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX)) | |
1566 | ||
1567 | /* Compute extra cost of moving data between one register class | |
5de7c240 JL |
1568 | and another. |
1569 | ||
5ac6158d TG |
1570 | Make moves from SAR so expensive they should never happen. We used to |
1571 | have 0xffff here, but that generates overflow in rare cases. | |
5de7c240 | 1572 | |
5a1c10de | 1573 | Copies involving a FP register and a non-FP register are relatively |
5de7c240 JL |
1574 | expensive because they must go through memory. |
1575 | ||
1576 | Other copies are reasonably cheap. */ | |
cf011243 | 1577 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ |
5ac6158d | 1578 | (CLASS1 == SHIFT_REGS ? 0x100 \ |
5de7c240 JL |
1579 | : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \ |
1580 | : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \ | |
1581 | : 2) | |
1582 | ||
eabd3262 RK |
1583 | |
1584 | /* Provide the costs of a rtl expression. This is in the body of a | |
1585 | switch on CODE. The purpose for the cost of MULT is to encourage | |
1586 | `synth_mult' to find a synthetic multiply when reasonable. */ | |
1587 | ||
68944452 JL |
1588 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
1589 | case MULT: \ | |
1590 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1591 | return COSTS_N_INSNS (3); \ | |
13ee407e | 1592 | return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \ |
68944452 JL |
1593 | ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \ |
1594 | case DIV: \ | |
1595 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1596 | return COSTS_N_INSNS (14); \ | |
1597 | case UDIV: \ | |
1598 | case MOD: \ | |
1599 | case UMOD: \ | |
1600 | return COSTS_N_INSNS (60); \ | |
1601 | case PLUS: /* this includes shNadd insns */ \ | |
1602 | case MINUS: \ | |
1603 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1604 | return COSTS_N_INSNS (3); \ | |
1605 | return COSTS_N_INSNS (1); \ | |
1606 | case ASHIFT: \ | |
1607 | case ASHIFTRT: \ | |
1608 | case LSHIFTRT: \ | |
1609 | return COSTS_N_INSNS (1); | |
eabd3262 | 1610 | |
3e47bea8 JL |
1611 | /* Adjust the cost of branches. */ |
1612 | #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1) | |
1613 | ||
04664e24 RS |
1614 | /* Handling the special cases is going to get too complicated for a macro, |
1615 | just call `pa_adjust_insn_length' to do the real work. */ | |
eabd3262 | 1616 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
04664e24 RS |
1617 | LENGTH += pa_adjust_insn_length (INSN, LENGTH); |
1618 | ||
72abf941 JL |
1619 | /* Millicode insns are actually function calls with some special |
1620 | constraints on arguments and register usage. | |
1621 | ||
1622 | Millicode calls always expect their arguments in the integer argument | |
1623 | registers, and always return their result in %r29 (ret1). They | |
7d8b1412 AM |
1624 | are expected to clobber their arguments, %r1, %r29, and the return |
1625 | pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else. | |
72abf941 | 1626 | |
2561a923 JL |
1627 | This macro tells reorg that the references to arguments and |
1628 | millicode calls do not appear to happen until after the millicode call. | |
1629 | This allows reorg to put insns which set the argument registers into the | |
1630 | delay slot of the millicode call -- thus they act more like traditional | |
1631 | CALL_INSNs. | |
1632 | ||
1633 | Note we can not consider side effects of the insn to be delayed because | |
1634 | the branch and link insn will clobber the return pointer. If we happened | |
1635 | to use the return pointer in the delay slot of the call, then we lose. | |
72abf941 JL |
1636 | |
1637 | get_attr_type will try to recognize the given insn, so make sure to | |
d0ca05ef RS |
1638 | filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns |
1639 | in particular. */ | |
2561a923 | 1640 | #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X)) |
72abf941 | 1641 | |
eabd3262 RK |
1642 | \f |
1643 | /* Control the assembler format that we output. */ | |
1644 | ||
eabd3262 RK |
1645 | /* Output to assembler file text saying following lines |
1646 | may contain character constants, extra white space, comments, etc. */ | |
1647 | ||
1648 | #define ASM_APP_ON "" | |
1649 | ||
1650 | /* Output to assembler file text saying following lines | |
1651 | no longer contain unusual constructs. */ | |
1652 | ||
1653 | #define ASM_APP_OFF "" | |
1654 | ||
50b424a9 JDA |
1655 | /* Output deferred plabels at the end of the file. */ |
1656 | ||
1657 | #define ASM_FILE_END(FILE) output_deferred_plabels (FILE) | |
1658 | ||
eabd3262 RK |
1659 | /* This is how to output the definition of a user-level label named NAME, |
1660 | such as the label on a static function or variable NAME. */ | |
1661 | ||
1662 | #define ASM_OUTPUT_LABEL(FILE, NAME) \ | |
37d7333e | 1663 | do { assemble_name (FILE, NAME); \ |
37d7333e | 1664 | fputc ('\n', FILE); } while (0) |
eabd3262 | 1665 | |
eabd3262 RK |
1666 | /* This is how to output a reference to a user-level label named NAME. |
1667 | `assemble_name' uses this. */ | |
1668 | ||
1669 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
ff2b6252 | 1670 | fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0)) |
eabd3262 RK |
1671 | |
1672 | /* This is how to output an internal numbered label where | |
1673 | PREFIX is the class of label and NUM is the number within the class. */ | |
1674 | ||
1675 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
2822d96e | 1676 | {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);} |
eabd3262 RK |
1677 | |
1678 | /* This is how to store into the string LABEL | |
1679 | the symbol_ref name of an internal numbered label where | |
1680 | PREFIX is the class of label and NUM is the number within the class. | |
1681 | This is suitable for output with `assemble_name'. */ | |
1682 | ||
1683 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
e59f7d3d | 1684 | sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM)) |
eabd3262 | 1685 | |
e7eacc8e JL |
1686 | #define ASM_GLOBALIZE_LABEL(FILE, NAME) \ |
1687 | do { \ | |
1688 | /* We only handle DATA objects here, functions are globalized in \ | |
1689 | ASM_DECLARE_FUNCTION_NAME. */ \ | |
1690 | if (! FUNCTION_NAME_P (NAME)) \ | |
1691 | { \ | |
1692 | fputs ("\t.EXPORT ", FILE); \ | |
1693 | assemble_name (FILE, NAME); \ | |
1694 | fputs (",DATA\n", FILE); \ | |
1695 | } \ | |
1696 | } while (0) | |
1697 | ||
eabd3262 RK |
1698 | #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ |
1699 | output_ascii ((FILE), (P), (SIZE)) | |
1700 | ||
eabd3262 RK |
1701 | /* This is how to output an element of a case-vector that is absolute. |
1702 | Note that this method makes filling these branch delay slots | |
3518f904 | 1703 | impossible. */ |
eabd3262 RK |
1704 | |
1705 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
3e056efc JL |
1706 | if (TARGET_BIG_SWITCH) \ |
1707 | fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \ | |
1708 | else \ | |
1709 | fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
eabd3262 | 1710 | |
63671b34 | 1711 | /* Jump tables are executable code and live in the TEXT section on the PA. */ |
75197b37 | 1712 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
63671b34 | 1713 | |
eabd3262 | 1714 | /* This is how to output an element of a case-vector that is relative. |
cface026 JL |
1715 | This must be defined correctly as it is used when generating PIC code. |
1716 | ||
ddd5a7c1 | 1717 | I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT |
cface026 JL |
1718 | on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions |
1719 | rather than a table of absolute addresses. */ | |
eabd3262 | 1720 | |
33f7f353 | 1721 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
3e056efc | 1722 | if (TARGET_BIG_SWITCH) \ |
f24d52e1 | 1723 | fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \ |
3e056efc JL |
1724 | else \ |
1725 | fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
eabd3262 RK |
1726 | |
1727 | /* This is how to output an assembler line | |
1728 | that says to advance the location counter | |
1729 | to a multiple of 2**LOG bytes. */ | |
1730 | ||
1731 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1732 | fprintf (FILE, "\t.align %d\n", (1<<(LOG))) | |
1733 | ||
1734 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1735 | fprintf (FILE, "\t.blockz %d\n", (SIZE)) | |
1736 | ||
6b282118 JL |
1737 | /* This says how to output an assembler line to define a global common symbol |
1738 | with size SIZE (in bytes) and alignment ALIGN (in bits). */ | |
a291e551 | 1739 | |
6b282118 JL |
1740 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \ |
1741 | { bss_section (); \ | |
1742 | assemble_name ((FILE), (NAME)); \ | |
1743 | fputs ("\t.comm ", (FILE)); \ | |
1744 | fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));} | |
a291e551 | 1745 | |
6b282118 JL |
1746 | /* This says how to output an assembler line to define a local common symbol |
1747 | with size SIZE (in bytes) and alignment ALIGN (in bits). */ | |
eabd3262 | 1748 | |
6b282118 JL |
1749 | #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \ |
1750 | { bss_section (); \ | |
1751 | fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \ | |
37d7333e | 1752 | assemble_name ((FILE), (NAME)); \ |
6b282118 JL |
1753 | fprintf ((FILE), "\n\t.block %d\n", (SIZE));} |
1754 | ||
eabd3262 RK |
1755 | /* Store in OUTPUT a string (made with alloca) containing |
1756 | an assembler-name for a local static variable named NAME. | |
1757 | LABELNO is an integer which is different for each call. */ | |
1758 | ||
1759 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1760 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ | |
1761 | sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) | |
1762 | ||
5921f26b JL |
1763 | /* All HP assemblers use "!" to separate logical lines. */ |
1764 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!') | |
1765 | ||
eabd3262 RK |
1766 | #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ |
1767 | ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^') | |
1768 | ||
1769 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1770 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1771 | For `%' followed by punctuation, CODE is the punctuation and X is null. | |
1772 | ||
3f8f5a3f | 1773 | On the HP-PA, the CODE can be `r', meaning this is a register-only operand |
eabd3262 RK |
1774 | and an immediate zero should be represented as `r0'. |
1775 | ||
1776 | Several % codes are defined: | |
1777 | O an operation | |
1778 | C compare conditions | |
1779 | N extract conditions | |
1780 | M modifier to handle preincrement addressing for memory refs. | |
1781 | F modifier to handle preincrement addressing for fp memory refs */ | |
1782 | ||
1783 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1784 | ||
1785 | \f | |
1786 | /* Print a memory address as an operand to reference that memory location. */ | |
1787 | ||
1788 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1789 | { register rtx addr = ADDR; \ | |
1790 | register rtx base; \ | |
1791 | int offset; \ | |
1792 | switch (GET_CODE (addr)) \ | |
1793 | { \ | |
1794 | case REG: \ | |
d2d28085 | 1795 | fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \ |
eabd3262 RK |
1796 | break; \ |
1797 | case PLUS: \ | |
1798 | if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \ | |
1799 | offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \ | |
1800 | else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \ | |
1801 | offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \ | |
1802 | else \ | |
1803 | abort (); \ | |
d2d28085 | 1804 | fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \ |
eabd3262 RK |
1805 | break; \ |
1806 | case LO_SUM: \ | |
519104fe | 1807 | if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \ |
0f8f654e RK |
1808 | fputs ("R'", FILE); \ |
1809 | else if (flag_pic == 0) \ | |
1810 | fputs ("RR'", FILE); \ | |
7ee72796 | 1811 | else \ |
6bb36601 | 1812 | fputs ("RT'", FILE); \ |
ad238e4b | 1813 | output_global_address (FILE, XEXP (addr, 1), 0); \ |
eabd3262 RK |
1814 | fputs ("(", FILE); \ |
1815 | output_operand (XEXP (addr, 0), 0); \ | |
1816 | fputs (")", FILE); \ | |
1817 | break; \ | |
09a1d028 | 1818 | case CONST_INT: \ |
e59f7d3d KG |
1819 | fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \ |
1820 | fprintf (FILE, "(%%r0)"); \ | |
09a1d028 | 1821 | break; \ |
eabd3262 RK |
1822 | default: \ |
1823 | output_addr_const (FILE, addr); \ | |
1824 | }} | |
1825 | ||
1826 | \f | |
e99d6592 MS |
1827 | /* Find the return address associated with the frame given by |
1828 | FRAMEADDR. */ | |
1829 | #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ | |
1830 | (return_addr_rtx (COUNT, FRAMEADDR)) | |
bbe79f84 MS |
1831 | |
1832 | /* Used to mask out junk bits from the return address, such as | |
1833 | processor state, interrupt status, condition codes and the like. */ | |
e99d6592 MS |
1834 | #define MASK_RETURN_ADDR \ |
1835 | /* The privilege level is in the two low order bits, mask em out \ | |
bbe79f84 | 1836 | of the return address. */ \ |
2a2ea744 | 1837 | (GEN_INT (-4)) |
27a36778 MS |
1838 | |
1839 | /* The number of Pmode words for the setjmp buffer. */ | |
1840 | #define JMP_BUF_SIZE 50 | |
0c273d11 | 1841 | |
520babc7 JL |
1842 | /* Only direct calls to static functions are allowed to be sibling (tail) |
1843 | call optimized. | |
1844 | ||
1845 | This restriction is necessary because some linker generated stubs will | |
1846 | store return pointers into rp' in some cases which might clobber a | |
1847 | live value already in rp'. | |
1848 | ||
1849 | In a sibcall the current function and the target function share stack | |
1850 | space. Thus if the path to the current function and the path to the | |
1851 | target function save a value in rp', they save the value into the | |
1852 | same stack slot, which has undesirable consequences. | |
1853 | ||
1854 | Because of the deferred binding nature of shared libraries any function | |
1855 | with external scope could be in a different load module and thus require | |
1856 | rp' to be saved when calling that function. So sibcall optimizations | |
1857 | can only be safe for static function. | |
1858 | ||
1859 | Note that GCC never needs return value relocations, so we don't have to | |
1860 | worry about static calls with return value relocations (which require | |
1861 | saving rp'). | |
1862 | ||
1863 | It is safe to perform a sibcall optimization when the target function | |
1864 | will never return. */ | |
1865 | #define FUNCTION_OK_FOR_SIBCALL(DECL) \ | |
1866 | (DECL \ | |
5e56f909 | 1867 | && ! TARGET_PORTABLE_RUNTIME \ |
520babc7 | 1868 | && ! TARGET_64BIT \ |
9a1ba437 | 1869 | && ! TREE_PUBLIC (DECL)) |
520babc7 | 1870 | |
0c273d11 RH |
1871 | #define PREDICATE_CODES \ |
1872 | {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ | |
1873 | {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \ | |
1874 | CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \ | |
1875 | {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ | |
1876 | {"symbolic_memory_operand", {SUBREG, MEM}}, \ | |
276ef573 | 1877 | {"reg_before_reload_operand", {REG, MEM}}, \ |
0c273d11 RH |
1878 | {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \ |
1879 | {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \ | |
1880 | CONST_DOUBLE}}, \ | |
1881 | {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \ | |
1882 | {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \ | |
1883 | {"pic_label_operand", {LABEL_REF, CONST}}, \ | |
1884 | {"fp_reg_operand", {REG}}, \ | |
1885 | {"arith_operand", {SUBREG, REG, CONST_INT}}, \ | |
1886 | {"arith11_operand", {SUBREG, REG, CONST_INT}}, \ | |
1887 | {"pre_cint_operand", {CONST_INT}}, \ | |
1888 | {"post_cint_operand", {CONST_INT}}, \ | |
1889 | {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \ | |
1890 | {"ireg_or_int5_operand", {CONST_INT, REG}}, \ | |
1891 | {"int5_operand", {CONST_INT}}, \ | |
1892 | {"uint5_operand", {CONST_INT}}, \ | |
1893 | {"int11_operand", {CONST_INT}}, \ | |
1894 | {"uint32_operand", {CONST_INT, \ | |
1895 | HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \ | |
1896 | {"arith5_operand", {SUBREG, REG, CONST_INT}}, \ | |
1897 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ | |
1898 | {"ior_operand", {CONST_INT}}, \ | |
1899 | {"lhs_lshift_cint_operand", {CONST_INT}}, \ | |
1900 | {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \ | |
1901 | {"arith32_operand", {SUBREG, REG, CONST_INT}}, \ | |
1902 | {"pc_or_label_operand", {PC, LABEL_REF}}, \ | |
1903 | {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \ | |
1904 | {"shadd_operand", {CONST_INT}}, \ | |
1905 | {"basereg_operand", {REG}}, \ | |
1906 | {"div_operand", {REG, CONST_INT}}, \ | |
eb5a4898 | 1907 | {"ireg_operand", {REG}}, \ |
27b18383 JL |
1908 | {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \ |
1909 | GT, GTU, GE}}, \ | |
0c273d11 | 1910 | {"movb_comparison_operator", {EQ, NE, LT, GE}}, |