[thirdparty/gcc.git] / gcc / config / sparc / sol2.h

/* Definitions of target machine for GCC, for SPARC running Solaris 2
   Copyright (C) 1992-2022 Free Software Foundation, Inc.
   Contributed by Ron Guilmette (rfg@netcom.com).
   Additional changes by David V. Henkel-Wallace (gumby@cygnus.com).

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.

GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */

/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
   sparc_override_options will disable V8+ if either not generating V9 code
   or generating 64-bit code.  */
#undef TARGET_DEFAULT
#ifdef TARGET_64BIT_DEFAULT
#define TARGET_DEFAULT \
  (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
   MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
#else
#define TARGET_DEFAULT \
  (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
#endif

/* The default code model used to be CM_MEDANY on Solaris
   but even Sun eventually found it to be quite wasteful
   and changed it to CM_MEDMID in the Studio 9 compiler.  */
#undef SPARC_DEFAULT_CMODEL
#define SPARC_DEFAULT_CMODEL CM_MEDMID

/* Select a format to encode pointers in exception handling data.  CODE
   is 0 for data, 1 for code labels, 2 for function pointers.  GLOBAL is
   true if the symbol may be affected by dynamic relocations.

   Some Solaris dynamic linkers don't handle unaligned section relative
   relocs properly, so force them to be aligned.  */
#ifndef HAVE_AS_SPARC_UA_PCREL
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)		\
  ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
#endif

\f

/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */

/* If the assembler supports -xarch=sparc4, we switch to the explicit
   word size selection mechanism available both in GNU as and Sun as,
   for the Niagara4 and above configurations.  */
#ifdef HAVE_AS_SPARC4

#define AS_SPARC32_FLAG ""
#define AS_SPARC64_FLAG ""

#ifndef USE_GAS
#undef ASM_ARCH32_SPEC
#define ASM_ARCH32_SPEC "-m32"
#undef ASM_ARCH64_SPEC
#define ASM_ARCH64_SPEC "-m64"
#endif

/* Both Sun as and GNU as understand -K PIC.  */
#undef ASM_SPEC
#define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC

#else /* HAVE_AS_SPARC4 */

#define AS_SPARC32_FLAG "-xarch=v8plus"
#define AS_SPARC64_FLAG "-xarch=v9"

#undef AS_NIAGARA4_FLAG
#define AS_NIAGARA4_FLAG AS_NIAGARA3_FLAG

#undef ASM_ARCH32_SPEC
#define ASM_ARCH32_SPEC ""

#undef ASM_ARCH64_SPEC
#define ASM_ARCH64_SPEC ""

#undef ASM_ARCH_DEFAULT_SPEC
#define ASM_ARCH_DEFAULT_SPEC ""

#undef ASM_ARCH_SPEC
#define ASM_ARCH_SPEC ""

/* Both Sun as and GNU as understand -K PIC.  */
#undef ASM_SPEC
#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC

#endif /* HAVE_AS_SPARC4 */


#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC	""
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC	"-xarch=v9"

#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara7
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA7_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA7_FLAG
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_m8
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_M8_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_M8_FLAG
#endif

#undef CPP_CPU_SPEC
#define CPP_CPU_SPEC "\
%{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \
%{mcpu=sparclite|mcpu-f930|mcpu=f934:-D__sparclite__} \
%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=v9|mcpu=ultrasparc|mcpu=ultrasparc3|mcpu=niagara|mcpu=niagara2|mcpu=niagara3|mcpu=niagara4|mcpu=niagara7|mcpu=m8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{!mcpu*:%(cpp_cpu_default)} \
"

#undef CPP_CPU_DEFAULT_SPEC
#define CPP_CPU_DEFAULT_SPEC \
(DEFAULT_ARCH32_P ? "\
%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
" : "\
%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
")

#undef CPP_ARCH32_SPEC
#define CPP_ARCH32_SPEC ""
#undef CPP_ARCH64_SPEC
#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"

#undef CPP_ARCH_SPEC
#define CPP_ARCH_SPEC "\
%{m32:%(cpp_arch32)} \
%{m64:%(cpp_arch64)} \
%{!m32:%{!m64:%(cpp_arch_default)}} \
"

/* -mcpu=native handling only makes sense with compiler running on
   a SPARC chip.  */
#if defined(__sparc__) && defined(__SVR4)
extern const char *host_detect_local_cpu (int argc, const char **argv);
# define EXTRA_SPEC_FUNCTIONS						\
  { "local_cpu_detect", host_detect_local_cpu },

# define MCPU_MTUNE_NATIVE_SPECS					\
   " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}"		\
   " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
#else
# define MCPU_MTUNE_NATIVE_SPECS ""
#endif

#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS

#undef	CC1_SPEC
#if DEFAULT_ARCH32_P
#define CC1_SPEC "\
%{m64:%{m32:%emay not use both -m32 and -m64}} \
%{m64:-mptr64 -mstack-bias -mno-v8plus \
  %{!mcpu*:-%{!mv8plus:mcpu=v9}}} \
" ASAN_CC1_SPEC
#else
#define CC1_SPEC "\
%{m32:%{m64:%emay not use both -m32 and -m64}} \
%{m32:-mptr32 -mno-stack-bias \
  %{!mcpu*:%{!mv8plus:-mcpu=v9}}} \
%{mv8plus:-m32 -mptr32 -mno-stack-bias \
  %{!mcpu*:-mcpu=v9}} \
" ASAN_CC1_SPEC
#endif

/* Support for a compile-time default CPU, et cetera.  The rules are:
   --with-cpu is ignored if -mcpu is specified; likewise --with-cpu-32
     and --with-cpu-64.
   --with-tune is ignored if -mtune is specified; likewise --with-tune-32
     and --with-tune-64.
   --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
     are specified.
   In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
   here, otherwise say -mcpu=v7 would be passed even when -m64.
   CC1_SPEC above takes care of this instead.

   Note that the order of the cpu* and tune* options matters: the
   config.gcc file always sets with_cpu to some value, even if the
   user didn't use --with-cpu when invoking the configure script.
   This value is based on the target name.  Therefore we have to make
   sure that --with-cpu-32 takes precedence to --with-cpu in < v9
   systems, and that --with-cpu-64 takes precedence to --with-cpu in
   >= v9 systems.  As for the tune* options, in some platforms
   config.gcc also sets a default value for it if the user didn't use
   --with-tune when invoking the configure script.  */
#undef OPTION_DEFAULT_SPECS
#if DEFAULT_ARCH32_P
#define OPTION_DEFAULT_SPECS \
  {"cpu_32", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"cpu_64", "%{m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune_32", "%{!m64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
  {"tune_64", "%{m64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
  {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
#else
#define OPTION_DEFAULT_SPECS \
  {"cpu_32", "%{m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"cpu_64", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune_32", "%{m32:%{!mtune=*:-mtune=%(VALUE)}}" },	\
  {"tune_64", "%{!m32:%{!mtune=*:-mtune=%(VALUE)}}" },	\
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
  {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
#endif

#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC "\
%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \
%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \
%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \
%{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \
%{mcpu=niagara7:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA7_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA7_FLAG) "} \
%{mcpu=m8:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_M8_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_M8_FLAG) "} \
%{!mcpu=m8:%{!mcpu=niagara7:%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}}}} \
%{!mcpu*:%(asm_cpu_default)} \
"

#ifdef USE_GLD
/* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
   follow the Solaris 2 ABI.  Prefer them if present.  */
#ifdef HAVE_LD_SOL2_EMULATION
#define ARCH32_EMULATION "elf32_sparc_sol2"
#define ARCH64_EMULATION "elf64_sparc_sol2"
#else
#define ARCH32_EMULATION "elf32_sparc"
#define ARCH64_EMULATION "elf64_sparc"
#endif
#endif

#define ARCH64_SUBDIR "sparcv9"

#define SUBTARGET_CPU_EXTRA_SPECS

#define ENDFILE_ARCH_SPEC ""

/* -fsanitize=address is currently only supported for 32-bit.  */
#define ASAN_REJECT_SPEC \
  DEF_ARCH64_SPEC("%e-fsanitize=address is not supported in this configuration")
\f

/* Register the Solaris-specific #pragma directives.  */
#define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()

#if defined(USE_GAS) && defined(HAVE_AS_TLS)
/* Use GNU extensions to TLS support.  */
#undef TARGET_SUN_TLS
#undef TARGET_GNU_TLS
#define TARGET_SUN_TLS 0
#define TARGET_GNU_TLS 1
#endif

#undef  LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX  "."

/* The Solaris 2 assembler uses .skip, not .zero, so put this back.  */
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
  fprintf (FILE, "\t.skip %u\n", (int)(SIZE))

/* This is how to store into the string LABEL
   the symbol_ref name of an internal numbered label where
   PREFIX is the class of label and NUM is the number within the class.
   This is suitable for output with `assemble_name'.  */

#undef  ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)	\
  sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))

/* The native TLS-enabled assembler requires the directive #tls_object
   to be put on objects in TLS sections (as of v7.1).  This is not
   required by GNU as but supported on SPARC.  */
#undef  ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)		\
  do								\
    {								\
      HOST_WIDE_INT size;					\
								\
      if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL))	\
	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object");	\
      else							\
	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");	\
								\
      size_directive_output = 0;				\
      if (!flag_inhibit_size_directive				\
	  && (DECL) && DECL_SIZE (DECL))			\
	{							\
	  size_directive_output = 1;				\
	  size = int_size_in_bytes (TREE_TYPE (DECL));		\
	  ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size);		\
	}							\
								\
      ASM_OUTPUT_LABEL (FILE, NAME);				\
    }								\
  while (0)

/* Output a simple call for .init/.fini.  */
#define ASM_OUTPUT_CALL(FILE, FN)				        \
  do									\
    {									\
      fprintf (FILE, "\tcall\t");					\
      targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0);	\
      fprintf (FILE, "\n\tnop\n");					\
    }									\
  while (0)

/* Solaris as has a bug: a .common directive in .tbss or .tdata section
   behaves as .tls_common rather than normal non-TLS .common.  */
#undef  ASM_OUTPUT_ALIGNED_COMMON
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)		\
  do									\
    {									\
      if (TARGET_SUN_TLS						\
	  && in_section							\
	  && ((in_section->common.flags & SECTION_TLS) == SECTION_TLS))	\
	switch_to_section (bss_section);				\
      fprintf ((FILE), "%s", COMMON_ASM_OP);				\
      assemble_name ((FILE), (NAME));					\
      fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",		\
	       (SIZE), (ALIGN) / BITS_PER_UNIT);			\
    }									\
  while (0)

#ifndef USE_GAS
/* This is how to output an assembler line that says to advance
   the location counter to a multiple of 2**LOG bytes using the
   NOP instruction as padding.  The filler pattern doesn't work
   with GNU as. */
#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG)   \
  if ((LOG) != 0)                             \
    fprintf (FILE, "\t.align %d,0x1000000\n", (1 << (LOG)))

/* Use Solaris ELF section syntax with Sun as.  */
#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section

/* Sun as requires doublequoted section names on SPARC.  While GNU as
   supports that, too, we prefer the standard variant.  */
#define SECTION_NAME_FORMAT	"\"%s\""
#endif /* !USE_GAS */

/* Undefine this so that attribute((init_priority)) works with GNU ld.  */
#ifdef USE_GLD
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
#endif

\f

/* Define for support of TFmode long double.
   SPARC ABI says that long double is 4 words.  */
#define LONG_DOUBLE_TYPE_SIZE 128

/* Solaris's _Qp_* library routine implementation clobbers the output
   memory before the inputs are fully consumed.  */

#undef TARGET_BUGGY_QP_LIB
#define TARGET_BUGGY_QP_LIB	1

#undef SUN_CONVERSION_LIBFUNCS
#define SUN_CONVERSION_LIBFUNCS 1

#undef DITF_CONVERSION_LIBFUNCS
#define DITF_CONVERSION_LIBFUNCS 1

#undef SUN_INTEGER_MULTIPLY_64
#define SUN_INTEGER_MULTIPLY_64 1

#undef SPARC_LOW_FE_EXCEPT_VALUES
#define SPARC_LOW_FE_EXCEPT_VALUES 1
Commit	Line	Data
de0a398e	1	/* Definitions of target machine for GCC, for SPARC running Solaris 2
7adcbafe	2	Copyright (C) 1992-2022 Free Software Foundation, Inc.
7d4ea832	3	Contributed by Ron Guilmette (rfg@netcom.com).
ed1817c6	4	Additional changes by David V. Henkel-Wallace (gumby@cygnus.com).
4ab76dcd	5
de0a398e	6	This file is part of GCC.
4ab76dcd	7
de0a398e	8	GCC is free software; you can redistribute it and/or modify
4ab76dcd	9	it under the terms of the GNU General Public License as published by
2f83c7d6	10	the Free Software Foundation; either version 3, or (at your option)
4ab76dcd RK	11	any later version.
4ab76dcd RK	12
de0a398e	13	GCC is distributed in the hope that it will be useful,
4ab76dcd RK	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
2f83c7d6 NC	19	along with GCC; see the file COPYING3. If not see
2f83c7d6 NC	20	<http://www.gnu.org/licenses/>. */
4ab76dcd	21
b286d9ed EB	22	/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
	23	sparc_override_options will disable V8+ if either not generating V9 code
	24	or generating 64-bit code. */
6138f9bd RO	25	#undef TARGET_DEFAULT
	26	#ifdef TARGET_64BIT_DEFAULT
	27	#define TARGET_DEFAULT \
b286d9ed EB	28	(MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
b286d9ed EB	29	MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
6138f9bd	30	#else
b286d9ed EB	31	#define TARGET_DEFAULT \
b286d9ed EB	32	(MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
6138f9bd	33	#endif
7ecfa34f RO	34
	35	/* The default code model used to be CM_MEDANY on Solaris
	36	but even Sun eventually found it to be quite wasteful
	37	and changed it to CM_MEDMID in the Studio 9 compiler. */
	38	#undef SPARC_DEFAULT_CMODEL
	39	#define SPARC_DEFAULT_CMODEL CM_MEDMID
	40
	41	/* Select a format to encode pointers in exception handling data. CODE
	42	is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
	43	true if the symbol may be affected by dynamic relocations.
	44
	45	Some Solaris dynamic linkers don't handle unaligned section relative
	46	relocs properly, so force them to be aligned. */
	47	#ifndef HAVE_AS_SPARC_UA_PCREL
	48	#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
	49	((flag_pic \|\| GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
	50	#endif
	51
	52	\f
	53
8f3d7f00	54	/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */
4ab76dcd	55
8b98b5fd DM	56	/* If the assembler supports -xarch=sparc4, we switch to the explicit
	57	word size selection mechanism available both in GNU as and Sun as,
	58	for the Niagara4 and above configurations. */
	59	#ifdef HAVE_AS_SPARC4
	60
	61	#define AS_SPARC32_FLAG ""
	62	#define AS_SPARC64_FLAG ""
b7764693	63
7ecfa34f	64	#ifndef USE_GAS
8b98b5fd DM	65	#undef ASM_ARCH32_SPEC
	66	#define ASM_ARCH32_SPEC "-m32"
	67	#undef ASM_ARCH64_SPEC
	68	#define ASM_ARCH64_SPEC "-m64"
7ecfa34f RO	69	#endif
7ecfa34f RO	70
8b98b5fd DM	71	/* Both Sun as and GNU as understand -K PIC. */
	72	#undef ASM_SPEC
	73	#define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC
	74
	75	#else /* HAVE_AS_SPARC4 */
	76
	77	#define AS_SPARC32_FLAG "-xarch=v8plus"
	78	#define AS_SPARC64_FLAG "-xarch=v9"
	79
	80	#undef AS_NIAGARA4_FLAG
	81	#define AS_NIAGARA4_FLAG AS_NIAGARA3_FLAG
	82
	83	#undef ASM_ARCH32_SPEC
	84	#define ASM_ARCH32_SPEC ""
	85
	86	#undef ASM_ARCH64_SPEC
	87	#define ASM_ARCH64_SPEC ""
	88
	89	#undef ASM_ARCH_DEFAULT_SPEC
	90	#define ASM_ARCH_DEFAULT_SPEC ""
	91
	92	#undef ASM_ARCH_SPEC
	93	#define ASM_ARCH_SPEC ""
	94
	95	/* Both Sun as and GNU as understand -K PIC. */
	96	#undef ASM_SPEC
	97	#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC
	98
	99	#endif /* HAVE_AS_SPARC4 */
	100
	101
7ecfa34f RO	102	#undef ASM_CPU32_DEFAULT_SPEC
	103	#define ASM_CPU32_DEFAULT_SPEC ""
	104	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	105	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9"
7ecfa34f	106
a0a301fc	107	#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
7ecfa34f RO	108	#undef CPP_CPU64_DEFAULT_SPEC
	109	#define CPP_CPU64_DEFAULT_SPEC ""
	110	#undef ASM_CPU32_DEFAULT_SPEC
	111	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
a0a301fc	112	#endif
b7764693	113
a0a301fc	114	#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
7ecfa34f RO	115	#undef CPP_CPU64_DEFAULT_SPEC
	116	#define CPP_CPU64_DEFAULT_SPEC ""
	117	#undef ASM_CPU32_DEFAULT_SPEC
	118	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
	119	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	120	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a"
cbe16f8a	121	#endif
b7764693	122
5202c5fe	123	#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
7ecfa34f RO	124	#undef CPP_CPU64_DEFAULT_SPEC
	125	#define CPP_CPU64_DEFAULT_SPEC ""
	126	#undef ASM_CPU32_DEFAULT_SPEC
	127	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	128	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	129	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
5202c5fe EB	130	#endif
5202c5fe EB	131
4c837a1e	132	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
7ecfa34f RO	133	#undef CPP_CPU64_DEFAULT_SPEC
	134	#define CPP_CPU64_DEFAULT_SPEC ""
	135	#undef ASM_CPU32_DEFAULT_SPEC
	136	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	137	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	138	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
4c837a1e DM	139	#endif
4c837a1e DM	140
9eeaed6e	141	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
7ecfa34f RO	142	#undef CPP_CPU64_DEFAULT_SPEC
	143	#define CPP_CPU64_DEFAULT_SPEC ""
	144	#undef ASM_CPU32_DEFAULT_SPEC
	145	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	146	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	147	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
7ecfa34f RO	148	#endif
7ecfa34f RO	149
3e64c239 DM	150	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3
	151	#undef CPP_CPU64_DEFAULT_SPEC
	152	#define CPP_CPU64_DEFAULT_SPEC ""
	153	#undef ASM_CPU32_DEFAULT_SPEC
e8b141b5	154	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
3e64c239	155	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	156	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG
3e64c239 DM	157	#endif
	158
	159	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
	160	#undef CPP_CPU64_DEFAULT_SPEC
	161	#define CPP_CPU64_DEFAULT_SPEC ""
	162	#undef ASM_CPU32_DEFAULT_SPEC
8b98b5fd	163	#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG
3e64c239	164	#undef ASM_CPU64_DEFAULT_SPEC
8b98b5fd	165	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG
3e64c239 DM	166	#endif
3e64c239 DM	167
690f24b7 JM	168	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara7
	169	#undef CPP_CPU64_DEFAULT_SPEC
	170	#define CPP_CPU64_DEFAULT_SPEC ""
	171	#undef ASM_CPU32_DEFAULT_SPEC
00a84d0e	172	#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA7_FLAG
690f24b7 JM	173	#undef ASM_CPU64_DEFAULT_SPEC
	174	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA7_FLAG
	175	#endif
	176
bcc3c3f1 JM	177	#if TARGET_CPU_DEFAULT == TARGET_CPU_m8
	178	#undef CPP_CPU64_DEFAULT_SPEC
	179	#define CPP_CPU64_DEFAULT_SPEC ""
	180	#undef ASM_CPU32_DEFAULT_SPEC
	181	#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_M8_FLAG
	182	#undef ASM_CPU64_DEFAULT_SPEC
	183	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_M8_FLAG
	184	#endif
	185
7ecfa34f RO	186	#undef CPP_CPU_SPEC
	187	#define CPP_CPU_SPEC "\
	188	%{mcpu=sparclet\|mcpu=tsc701:-D__sparclet__} \
	189	%{mcpu=sparclite\|mcpu-f930\|mcpu=f934:-D__sparclite__} \
	190	%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
	191	%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
bcc3c3f1	192	%{mcpu=v9\|mcpu=ultrasparc\|mcpu=ultrasparc3\|mcpu=niagara\|mcpu=niagara2\|mcpu=niagara3\|mcpu=niagara4\|mcpu=niagara7\|mcpu=m8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
7ecfa34f RO	193	%{!mcpu*:%(cpp_cpu_default)} \
	194	"
	195
	196	#undef CPP_CPU_DEFAULT_SPEC
	197	#define CPP_CPU_DEFAULT_SPEC \
	198	(DEFAULT_ARCH32_P ? "\
	199	%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
	200	%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
	201	" : "\
	202	%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
	203	%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
	204	")
	205
	206	#undef CPP_ARCH32_SPEC
	207	#define CPP_ARCH32_SPEC ""
	208	#undef CPP_ARCH64_SPEC
	209	#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"
	210
	211	#undef CPP_ARCH_SPEC
	212	#define CPP_ARCH_SPEC "\
	213	%{m32:%(cpp_arch32)} \
	214	%{m64:%(cpp_arch64)} \
	215	%{!m32:%{!m64:%(cpp_arch_default)}} \
	216	"
	217
e3b3fa45 RO	218	/* -mcpu=native handling only makes sense with compiler running on
e3b3fa45 RO	219	a SPARC chip. */
a0bd60d1	220	#if defined(__sparc__) && defined(__SVR4)
e3b3fa45 RO	221	extern const char host_detect_local_cpu (int argc, const char *argv);
	222	# define EXTRA_SPEC_FUNCTIONS \
	223	{ "local_cpu_detect", host_detect_local_cpu },
	224
	225	# define MCPU_MTUNE_NATIVE_SPECS \
	226	" %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \
	227	" %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
	228	#else
	229	# define MCPU_MTUNE_NATIVE_SPECS ""
	230	#endif
	231
	232	#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS
	233
7ecfa34f RO	234	#undef CC1_SPEC
	235	#if DEFAULT_ARCH32_P
	236	#define CC1_SPEC "\
	237	%{m64:%{m32:%emay not use both -m32 and -m64}} \
	238	%{m64:-mptr64 -mstack-bias -mno-v8plus \
	239	%{!mcpu*:-%{!mv8plus:mcpu=v9}}} \
aaabfd71	240	" ASAN_CC1_SPEC
7ecfa34f RO	241	#else
	242	#define CC1_SPEC "\
	243	%{m32:%{m64:%emay not use both -m32 and -m64}} \
	244	%{m32:-mptr32 -mno-stack-bias \
	245	%{!mcpu*:%{!mv8plus:-mcpu=v9}}} \
	246	%{mv8plus:-m32 -mptr32 -mno-stack-bias \
	247	%{!mcpu*:-mcpu=v9}} \
aaabfd71	248	" ASAN_CC1_SPEC
7ecfa34f RO	249	#endif
	250
	251	/* Support for a compile-time default CPU, et cetera. The rules are:
31177ef2 JM	252	--with-cpu is ignored if -mcpu is specified; likewise --with-cpu-32
	253	and --with-cpu-64.
	254	--with-tune is ignored if -mtune is specified; likewise --with-tune-32
	255	and --with-tune-64.
7ecfa34f RO	256	--with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
	257	are specified.
	258	In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
	259	here, otherwise say -mcpu=v7 would be passed even when -m64.
31177ef2 JM	260	CC1_SPEC above takes care of this instead.
	261
	262	Note that the order of the cpu* and tune* options matters: the
	263	config.gcc file always sets with_cpu to some value, even if the
	264	user didn't use --with-cpu when invoking the configure script.
	265	This value is based on the target name. Therefore we have to make
	266	sure that --with-cpu-32 takes precedence to --with-cpu in < v9
	267	systems, and that --with-cpu-64 takes precedence to --with-cpu in
	268	>= v9 systems. As for the tune* options, in some platforms
	269	config.gcc also sets a default value for it if the user didn't use
	270	--with-tune when invoking the configure script. */
7ecfa34f RO	271	#undef OPTION_DEFAULT_SPECS
	272	#if DEFAULT_ARCH32_P
	273	#define OPTION_DEFAULT_SPECS \
31177ef2 JM	274	{"cpu_32", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
31177ef2 JM	275	{"cpu_64", "%{m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
7ecfa34f	276	{"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
31177ef2 JM	277	{"tune_32", "%{!m64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
31177ef2 JM	278	{"tune_64", "%{m64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
7ecfa34f RO	279	{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
	280	{"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
	281	#else
	282	#define OPTION_DEFAULT_SPECS \
31177ef2 JM	283	{"cpu_32", "%{m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
31177ef2 JM	284	{"cpu_64", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
7ecfa34f	285	{"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
31177ef2 JM	286	{"tune_32", "%{m32:%{!mtune=*:-mtune=%(VALUE)}}" }, \
31177ef2 JM	287	{"tune_64", "%{!m32:%{!mtune=*:-mtune=%(VALUE)}}" }, \
7ecfa34f RO	288	{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
7ecfa34f RO	289	{"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
9eeaed6e DM	290	#endif
9eeaed6e DM	291
cbe16f8a DE	292	#undef ASM_CPU_SPEC
cbe16f8a DE	293	#define ASM_CPU_SPEC "\
8b98b5fd DM	294	%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \
	295	%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \
	296	%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
	297	%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
	298	%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
	299	%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \
	300	%{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \
690f24b7	301	%{mcpu=niagara7:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA7_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA7_FLAG) "} \
bcc3c3f1 JM	302	%{mcpu=m8:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_M8_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_M8_FLAG) "} \
bcc3c3f1 JM	303	%{!mcpu=m8:%{!mcpu=niagara7:%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}}}} \
a0a301fc	304	%{!mcpu*:%(asm_cpu_default)} \
cbe16f8a	305	"
8f3d7f00	306
7ecfa34f RO	307	#ifdef USE_GLD
	308	/* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
	309	follow the Solaris 2 ABI. Prefer them if present. */
	310	#ifdef HAVE_LD_SOL2_EMULATION
	311	#define ARCH32_EMULATION "elf32_sparc_sol2"
	312	#define ARCH64_EMULATION "elf64_sparc_sol2"
	313	#else
	314	#define ARCH32_EMULATION "elf32_sparc"
	315	#define ARCH64_EMULATION "elf64_sparc"
	316	#endif
	317	#endif
	318
	319	#define ARCH64_SUBDIR "sparcv9"
be3a0ce2	320
7ecfa34f RO	321	#define SUBTARGET_CPU_EXTRA_SPECS
7ecfa34f RO	322
df2a1cc4 RO	323	#define ENDFILE_ARCH_SPEC ""
df2a1cc4 RO	324
aaabfd71 RO	325	/* -fsanitize=address is currently only supported for 32-bit. */
aaabfd71 RO	326	#define ASAN_REJECT_SPEC \
381a3c75	327	DEF_ARCH64_SPEC("%e-fsanitize=address is not supported in this configuration")
7ecfa34f RO	328	\f
	329
	330	/* Register the Solaris-specific #pragma directives. */
	331	#define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()
	332
	333	#if defined(USE_GAS) && defined(HAVE_AS_TLS)
	334	/* Use GNU extensions to TLS support. */
	335	#undef TARGET_SUN_TLS
	336	#undef TARGET_GNU_TLS
	337	#define TARGET_SUN_TLS 0
	338	#define TARGET_GNU_TLS 1
	339	#endif
	340
	341	#undef LOCAL_LABEL_PREFIX
	342	#define LOCAL_LABEL_PREFIX "."
8f3d7f00	343
80ffc95e	344	/* The Solaris 2 assembler uses .skip, not .zero, so put this back. */
8f3d7f00 RS	345	#undef ASM_OUTPUT_SKIP
8f3d7f00 RS	346	#define ASM_OUTPUT_SKIP(FILE,SIZE) \
58e15542	347	fprintf (FILE, "\t.skip %u\n", (int)(SIZE))
8f3d7f00	348
8f3d7f00 RS	349	/* This is how to store into the string LABEL
	350	the symbol_ref name of an internal numbered label where
	351	PREFIX is the class of label and NUM is the number within the class.
	352	This is suitable for output with `assemble_name'. */
	353
	354	#undef ASM_GENERATE_INTERNAL_LABEL
	355	#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
fca0efd4	356	sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))
8f3d7f00	357
2f3321ca EB	358	/* The native TLS-enabled assembler requires the directive #tls_object
2f3321ca EB	359	to be put on objects in TLS sections (as of v7.1). This is not
7ecfa34f	360	required by GNU as but supported on SPARC. */
2f3321ca EB	361	#undef ASM_DECLARE_OBJECT_NAME
	362	#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
	363	do \
	364	{ \
	365	HOST_WIDE_INT size; \
	366	\
8893239d	367	if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL)) \
2f3321ca EB	368	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object"); \
	369	else \
	370	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
	371	\
	372	size_directive_output = 0; \
	373	if (!flag_inhibit_size_directive \
	374	&& (DECL) && DECL_SIZE (DECL)) \
	375	{ \
	376	size_directive_output = 1; \
	377	size = int_size_in_bytes (TREE_TYPE (DECL)); \
	378	ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
	379	} \
	380	\
	381	ASM_OUTPUT_LABEL (FILE, NAME); \
	382	} \
	383	while (0)
	384
07a43492	385	/* Output a simple call for .init/.fini. */
d634bfa1 RO	386	#define ASM_OUTPUT_CALL(FILE, FN) \
	387	do \
	388	{ \
	389	fprintf (FILE, "\tcall\t"); \
	390	targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0); \
	391	fprintf (FILE, "\n\tnop\n"); \
	392	} \
dbdd0cf3	393	while (0)
6ac16442	394
2cf03b11 RO	395	/* Solaris as has a bug: a .common directive in .tbss or .tdata section
	396	behaves as .tls_common rather than normal non-TLS .common. */
	397	#undef ASM_OUTPUT_ALIGNED_COMMON
	398	#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
	399	do \
	400	{ \
	401	if (TARGET_SUN_TLS \
	402	&& in_section \
	403	&& ((in_section->common.flags & SECTION_TLS) == SECTION_TLS)) \
	404	switch_to_section (bss_section); \
	405	fprintf ((FILE), "%s", COMMON_ASM_OP); \
	406	assemble_name ((FILE), (NAME)); \
16998094	407	fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
2cf03b11 RO	408	(SIZE), (ALIGN) / BITS_PER_UNIT); \
	409	} \
	410	while (0)
	411
7ecfa34f	412	#ifndef USE_GAS
233db724 EB	413	/* This is how to output an assembler line that says to advance
233db724 EB	414	the location counter to a multiple of 2**LOG bytes using the
7ecfa34f RO	415	NOP instruction as padding. The filler pattern doesn't work
7ecfa34f RO	416	with GNU as. */
233db724 EB	417	#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \
233db724 EB	418	if ((LOG) != 0) \
3f1a2e57	419	fprintf (FILE, "\t.align %d,0x1000000\n", (1 << (LOG)))
233db724	420
7ecfa34f	421	/* Use Solaris ELF section syntax with Sun as. */
d1ced155 EB	422	#undef TARGET_ASM_NAMED_SECTION
	423	#define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section
	424
7ecfa34f	425	/* Sun as requires doublequoted section names on SPARC. While GNU as
2ca48caa	426	supports that, too, we prefer the standard variant. */
2ca48caa	427	#define SECTION_NAME_FORMAT "\"%s\""
7ecfa34f RO	428	#endif /* !USE_GAS */
	429
	430	/* Undefine this so that attribute((init_priority)) works with GNU ld. */
	431	#ifdef USE_GLD
	432	#undef CTORS_SECTION_ASM_OP
	433	#undef DTORS_SECTION_ASM_OP
2ca48caa	434	#endif
a0c21029	435
7ecfa34f RO	436	\f
	437
	438	/* Define for support of TFmode long double.
	439	SPARC ABI says that long double is 4 words. */
	440	#define LONG_DOUBLE_TYPE_SIZE 128
	441
	442	/* Solaris's _Qp_* library routine implementation clobbers the output
	443	memory before the inputs are fully consumed. */
	444
	445	#undef TARGET_BUGGY_QP_LIB
	446	#define TARGET_BUGGY_QP_LIB 1
	447
	448	#undef SUN_CONVERSION_LIBFUNCS
	449	#define SUN_CONVERSION_LIBFUNCS 1
	450
	451	#undef DITF_CONVERSION_LIBFUNCS
	452	#define DITF_CONVERSION_LIBFUNCS 1
	453
	454	#undef SUN_INTEGER_MULTIPLY_64
	455	#define SUN_INTEGER_MULTIPLY_64 1
fde66fde EB	456
	457	#undef SPARC_LOW_FE_EXCEPT_VALUES
	458	#define SPARC_LOW_FE_EXCEPT_VALUES 1