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1; Options for the SPARC port of the compiler
2;
818ab71a 3; Copyright (C) 2005-2016 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
fe609b0f 20
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21HeaderInclude
22config/sparc/sparc-opts.h
23
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24;; Debug flags
25TargetVariable
26unsigned int sparc_debug
27
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28mfpu
29Target Report Mask(FPU)
a7b2e184 30Use hardware FP.
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31
32mhard-float
719e1e80 33Target RejectNegative Mask(FPU)
a7b2e184 34Use hardware FP.
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35
36msoft-float
37Target RejectNegative InverseMask(FPU)
a7b2e184 38Do not use hardware FP.
fe609b0f 39
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40mflat
41Target Report Mask(FLAT)
a7b2e184 42Use flat register window model.
b11b0904 43
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44munaligned-doubles
45Target Report Mask(UNALIGNED_DOUBLES)
a7b2e184 46Assume possible double misalignment.
fe609b0f 47
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48mapp-regs
49Target Report Mask(APP_REGS)
a7b2e184 50Use ABI reserved registers.
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51
52mhard-quad-float
53Target Report RejectNegative Mask(HARD_QUAD)
a7b2e184 54Use hardware quad FP instructions.
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55
56msoft-quad-float
57Target Report RejectNegative InverseMask(HARD_QUAD)
a7b2e184 58Do not use hardware quad fp instructions.
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59
60mv8plus
61Target Report Mask(V8PLUS)
a7b2e184 62Compile for V8+ ABI.
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63
64mvis
65Target Report Mask(VIS)
a7b2e184 66Use UltraSPARC Visual Instruction Set version 1.0 extensions.
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67
68mvis2
69Target Report Mask(VIS2)
a7b2e184 70Use UltraSPARC Visual Instruction Set version 2.0 extensions.
fe609b0f 71
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72mvis3
73Target Report Mask(VIS3)
a7b2e184 74Use UltraSPARC Visual Instruction Set version 3.0 extensions.
96d7b15f 75
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76mcbcond
77Target Report Mask(CBCOND)
a7b2e184 78Use UltraSPARC Compare-and-Branch extensions.
8b98b5fd 79
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80mfmaf
81Target Report Mask(FMAF)
a7b2e184 82Use UltraSPARC Fused Multiply-Add extensions.
e8b141b5 83
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84mpopc
85Target Report Mask(POPC)
a7b2e184 86Use UltraSPARC Population-Count instruction.
dc78280f 87
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88mptr64
89Target Report RejectNegative Mask(PTR64)
a7b2e184 90Pointers are 64-bit.
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91
92mptr32
93Target Report RejectNegative InverseMask(PTR64)
a7b2e184 94Pointers are 32-bit.
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95
96m64
97Target Report RejectNegative Mask(64BIT)
a7b2e184 98Use 64-bit ABI.
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99
100m32
101Target Report RejectNegative InverseMask(64BIT)
a7b2e184 102Use 32-bit ABI.
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103
104mstack-bias
105Target Report Mask(STACK_BIAS)
a7b2e184 106Use stack bias.
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107
108mfaster-structs
109Target Report Mask(FASTER_STRUCTS)
a7b2e184 110Use structs on stronger alignment for double-word copies.
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111
112mrelax
113Target
a7b2e184 114Optimize tail call instructions in assembler and linker.
fe609b0f 115
ba21a04a 116muser-mode
a01a33a2 117Target Report InverseMask(SV_MODE)
a7b2e184 118Do not generate code that can only run in supervisor mode (default).
ba21a04a 119
fe609b0f 120mcpu=
023592aa 121Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
a7b2e184 122Use features of and schedule code for given CPU.
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123
124mtune=
023592aa 125Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
a7b2e184 126Schedule code for given CPU.
fe609b0f 127
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128Enum
129Name(sparc_processor_type) Type(enum processor_type)
130
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131EnumValue
132Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
133
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134EnumValue
135Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
136
137EnumValue
138Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
139
140EnumValue
141Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
142
143EnumValue
144Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
145
146EnumValue
147Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
148
149EnumValue
150Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
151
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152EnumValue
153Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
154
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155EnumValue
156Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
157
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158EnumValue
159Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
160
161EnumValue
162Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
163
164EnumValue
165Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
166
167EnumValue
168Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
169
170EnumValue
171Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
172
173EnumValue
174Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
175
176EnumValue
177Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
178
179EnumValue
180Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
181
182EnumValue
183Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
184
185EnumValue
186Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
187
188EnumValue
189Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
190
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191EnumValue
192Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
193
194EnumValue
195Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
196
fe609b0f 197mcmodel=
55bea00a 198Target RejectNegative Joined Var(sparc_cmodel_string)
a7b2e184 199Use given SPARC-V9 code model.
fe609b0f 200
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201mdebug=
202Target RejectNegative Joined Var(sparc_debug_string)
a7b2e184 203Enable debug output.
a0bd60d1 204
2225b57c 205mstd-struct-return
9250444b 206Target Report Var(sparc_std_struct_return)
2225b57c 207Enable strict 32-bit psABI struct return checking.
fe609b0f 208
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209mfix-at697f
210Target Report RejectNegative Var(sparc_fix_at697f)
211Enable workaround for single erratum of AT697F processor
cad669df 212(corresponding to erratum #13 of AT697E processor).
c49c4c85 213
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214mfix-ut699
215Target Report RejectNegative Var(sparc_fix_ut699)
a7b2e184 216Enable workarounds for the errata of the UT699 processor.
5c3eacbb 217
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218Mask(LONG_DOUBLE_128)
219;; Use 128-bit long double
220
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221Mask(LEON)
222;; Generate code for LEON
223
224Mask(LEON3)
225;; Generate code for LEON3
226
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227Mask(SPARCLITE)
228;; Generate code for SPARClite
229
230Mask(SPARCLET)
231;; Generate code for SPARClet
232
233Mask(V8)
234;; Generate code for SPARC-V8
235
236Mask(V9)
237;; Generate code for SPARC-V9
238
239Mask(DEPRECATED_V8_INSNS)
240;; Generate code that uses the V8 instructions deprecated
241;; in the V9 architecture.
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242
243mmemory-model=
244Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
245Specify the memory model in effect for the program.
246
247Enum
248Name(sparc_memory_model) Type(enum sparc_memory_model_type)
249
250EnumValue
251Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
252
253EnumValue
254Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
255
256EnumValue
257Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
258
259EnumValue
260Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
261
262EnumValue
263Enum(sparc_memory_model) String(sc) Value(SMM_SC)