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1 | ; Options for the SPARC port of the compiler |
2 | ; | |
818ab71a | 3 | ; Copyright (C) 2005-2016 Free Software Foundation, Inc. |
fe609b0f EB |
4 | ; |
5 | ; This file is part of GCC. | |
6 | ; | |
7 | ; GCC is free software; you can redistribute it and/or modify it under | |
8 | ; the terms of the GNU General Public License as published by the Free | |
2f83c7d6 | 9 | ; Software Foundation; either version 3, or (at your option) any later |
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10 | ; version. |
11 | ; | |
12 | ; GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | ; License for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
18 | ; along with GCC; see the file COPYING3. If not see |
19 | ; <http://www.gnu.org/licenses/>. | |
fe609b0f | 20 | |
aa53e58b JM |
21 | HeaderInclude |
22 | config/sparc/sparc-opts.h | |
23 | ||
a0bd60d1 DM |
24 | ;; Debug flags |
25 | TargetVariable | |
26 | unsigned int sparc_debug | |
27 | ||
fe609b0f EB |
28 | mfpu |
29 | Target Report Mask(FPU) | |
a7b2e184 | 30 | Use hardware FP. |
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31 | |
32 | mhard-float | |
719e1e80 | 33 | Target RejectNegative Mask(FPU) |
a7b2e184 | 34 | Use hardware FP. |
fe609b0f EB |
35 | |
36 | msoft-float | |
37 | Target RejectNegative InverseMask(FPU) | |
a7b2e184 | 38 | Do not use hardware FP. |
fe609b0f | 39 | |
b11b0904 EB |
40 | mflat |
41 | Target Report Mask(FLAT) | |
a7b2e184 | 42 | Use flat register window model. |
b11b0904 | 43 | |
fe609b0f EB |
44 | munaligned-doubles |
45 | Target Report Mask(UNALIGNED_DOUBLES) | |
a7b2e184 | 46 | Assume possible double misalignment. |
fe609b0f | 47 | |
fe609b0f EB |
48 | mapp-regs |
49 | Target Report Mask(APP_REGS) | |
a7b2e184 | 50 | Use ABI reserved registers. |
fe609b0f EB |
51 | |
52 | mhard-quad-float | |
53 | Target Report RejectNegative Mask(HARD_QUAD) | |
a7b2e184 | 54 | Use hardware quad FP instructions. |
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55 | |
56 | msoft-quad-float | |
57 | Target Report RejectNegative InverseMask(HARD_QUAD) | |
a7b2e184 | 58 | Do not use hardware quad fp instructions. |
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59 | |
60 | mv8plus | |
61 | Target Report Mask(V8PLUS) | |
a7b2e184 | 62 | Compile for V8+ ABI. |
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63 | |
64 | mvis | |
65 | Target Report Mask(VIS) | |
a7b2e184 | 66 | Use UltraSPARC Visual Instruction Set version 1.0 extensions. |
c4728c6b DM |
67 | |
68 | mvis2 | |
69 | Target Report Mask(VIS2) | |
a7b2e184 | 70 | Use UltraSPARC Visual Instruction Set version 2.0 extensions. |
fe609b0f | 71 | |
96d7b15f DM |
72 | mvis3 |
73 | Target Report Mask(VIS3) | |
a7b2e184 | 74 | Use UltraSPARC Visual Instruction Set version 3.0 extensions. |
96d7b15f | 75 | |
8b98b5fd DM |
76 | mcbcond |
77 | Target Report Mask(CBCOND) | |
a7b2e184 | 78 | Use UltraSPARC Compare-and-Branch extensions. |
8b98b5fd | 79 | |
e8b141b5 DM |
80 | mfmaf |
81 | Target Report Mask(FMAF) | |
a7b2e184 | 82 | Use UltraSPARC Fused Multiply-Add extensions. |
e8b141b5 | 83 | |
dc78280f DM |
84 | mpopc |
85 | Target Report Mask(POPC) | |
a7b2e184 | 86 | Use UltraSPARC Population-Count instruction. |
dc78280f | 87 | |
fe609b0f EB |
88 | mptr64 |
89 | Target Report RejectNegative Mask(PTR64) | |
a7b2e184 | 90 | Pointers are 64-bit. |
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91 | |
92 | mptr32 | |
93 | Target Report RejectNegative InverseMask(PTR64) | |
a7b2e184 | 94 | Pointers are 32-bit. |
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95 | |
96 | m64 | |
97 | Target Report RejectNegative Mask(64BIT) | |
a7b2e184 | 98 | Use 64-bit ABI. |
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99 | |
100 | m32 | |
101 | Target Report RejectNegative InverseMask(64BIT) | |
a7b2e184 | 102 | Use 32-bit ABI. |
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103 | |
104 | mstack-bias | |
105 | Target Report Mask(STACK_BIAS) | |
a7b2e184 | 106 | Use stack bias. |
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107 | |
108 | mfaster-structs | |
109 | Target Report Mask(FASTER_STRUCTS) | |
a7b2e184 | 110 | Use structs on stronger alignment for double-word copies. |
fe609b0f EB |
111 | |
112 | mrelax | |
113 | Target | |
a7b2e184 | 114 | Optimize tail call instructions in assembler and linker. |
fe609b0f | 115 | |
ba21a04a | 116 | muser-mode |
a01a33a2 | 117 | Target Report InverseMask(SV_MODE) |
a7b2e184 | 118 | Do not generate code that can only run in supervisor mode (default). |
ba21a04a | 119 | |
fe609b0f | 120 | mcpu= |
023592aa | 121 | Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7) |
a7b2e184 | 122 | Use features of and schedule code for given CPU. |
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123 | |
124 | mtune= | |
023592aa | 125 | Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7) |
a7b2e184 | 126 | Schedule code for given CPU. |
fe609b0f | 127 | |
aa53e58b JM |
128 | Enum |
129 | Name(sparc_processor_type) Type(enum processor_type) | |
130 | ||
e3b3fa45 RO |
131 | EnumValue |
132 | Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly | |
133 | ||
aa53e58b JM |
134 | EnumValue |
135 | Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7) | |
136 | ||
137 | EnumValue | |
138 | Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS) | |
139 | ||
140 | EnumValue | |
141 | Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8) | |
142 | ||
143 | EnumValue | |
144 | Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC) | |
145 | ||
146 | EnumValue | |
147 | Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC) | |
148 | ||
149 | EnumValue | |
150 | Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON) | |
151 | ||
38ae58ca EB |
152 | EnumValue |
153 | Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3) | |
154 | ||
d81230b5 DH |
155 | EnumValue |
156 | Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7) | |
157 | ||
aa53e58b JM |
158 | EnumValue |
159 | Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE) | |
160 | ||
161 | EnumValue | |
162 | Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930) | |
163 | ||
164 | EnumValue | |
165 | Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934) | |
166 | ||
167 | EnumValue | |
168 | Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X) | |
169 | ||
170 | EnumValue | |
171 | Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET) | |
172 | ||
173 | EnumValue | |
174 | Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701) | |
175 | ||
176 | EnumValue | |
177 | Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9) | |
178 | ||
179 | EnumValue | |
180 | Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC) | |
181 | ||
182 | EnumValue | |
183 | Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3) | |
184 | ||
185 | EnumValue | |
186 | Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA) | |
187 | ||
188 | EnumValue | |
189 | Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2) | |
190 | ||
3e64c239 DM |
191 | EnumValue |
192 | Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3) | |
193 | ||
194 | EnumValue | |
195 | Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4) | |
196 | ||
fe609b0f | 197 | mcmodel= |
55bea00a | 198 | Target RejectNegative Joined Var(sparc_cmodel_string) |
a7b2e184 | 199 | Use given SPARC-V9 code model. |
fe609b0f | 200 | |
a0bd60d1 DM |
201 | mdebug= |
202 | Target RejectNegative Joined Var(sparc_debug_string) | |
a7b2e184 | 203 | Enable debug output. |
a0bd60d1 | 204 | |
2225b57c | 205 | mstd-struct-return |
9250444b | 206 | Target Report Var(sparc_std_struct_return) |
2225b57c | 207 | Enable strict 32-bit psABI struct return checking. |
fe609b0f | 208 | |
c49c4c85 EB |
209 | mfix-at697f |
210 | Target Report RejectNegative Var(sparc_fix_at697f) | |
211 | Enable workaround for single erratum of AT697F processor | |
cad669df | 212 | (corresponding to erratum #13 of AT697E processor). |
c49c4c85 | 213 | |
5c3eacbb EB |
214 | mfix-ut699 |
215 | Target Report RejectNegative Var(sparc_fix_ut699) | |
a7b2e184 | 216 | Enable workarounds for the errata of the UT699 processor. |
5c3eacbb | 217 | |
fe609b0f EB |
218 | Mask(LONG_DOUBLE_128) |
219 | ;; Use 128-bit long double | |
220 | ||
1f65ae7a EB |
221 | Mask(LEON) |
222 | ;; Generate code for LEON | |
223 | ||
224 | Mask(LEON3) | |
225 | ;; Generate code for LEON3 | |
226 | ||
fe609b0f EB |
227 | Mask(SPARCLITE) |
228 | ;; Generate code for SPARClite | |
229 | ||
230 | Mask(SPARCLET) | |
231 | ;; Generate code for SPARClet | |
232 | ||
233 | Mask(V8) | |
234 | ;; Generate code for SPARC-V8 | |
235 | ||
236 | Mask(V9) | |
237 | ;; Generate code for SPARC-V9 | |
238 | ||
239 | Mask(DEPRECATED_V8_INSNS) | |
240 | ;; Generate code that uses the V8 instructions deprecated | |
241 | ;; in the V9 architecture. | |
2e65f38f RH |
242 | |
243 | mmemory-model= | |
244 | Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT) | |
245 | Specify the memory model in effect for the program. | |
246 | ||
247 | Enum | |
248 | Name(sparc_memory_model) Type(enum sparc_memory_model_type) | |
249 | ||
250 | EnumValue | |
251 | Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT) | |
252 | ||
253 | EnumValue | |
254 | Enum(sparc_memory_model) String(rmo) Value(SMM_RMO) | |
255 | ||
256 | EnumValue | |
257 | Enum(sparc_memory_model) String(pso) Value(SMM_PSO) | |
258 | ||
259 | EnumValue | |
260 | Enum(sparc_memory_model) String(tso) Value(SMM_TSO) | |
261 | ||
262 | EnumValue | |
263 | Enum(sparc_memory_model) String(sc) Value(SMM_SC) |