[thirdparty/gcc.git] / gcc / doc / gcc / gcc-command-options / machine-dependent-options / nds32-options.rst

..
  Copyright 1988-2022 Free Software Foundation, Inc.
  This is part of the GCC manual.
  For copying conditions, see the copyright.rst file.

.. program:: NDS32

.. index:: NDS32 Options

.. _nds32-options:

NDS32 Options
^^^^^^^^^^^^^

These options are defined for NDS32 implementations:

.. option:: -mbig-endian

  Generate code in big-endian mode.

.. option:: -mlittle-endian

  Generate code in little-endian mode.

.. option:: -mreduced-regs

  Use reduced-set registers for register allocation.

.. option:: -mfull-regs

  Use full-set registers for register allocation.

.. option:: -mcmov

  Generate conditional move instructions.

.. option:: -mno-cmov

  Do not generate conditional move instructions.

.. option:: -mext-perf

  Generate performance extension instructions.

.. option:: -mno-ext-perf

  Do not generate performance extension instructions.

.. option:: -mext-perf2

  Generate performance extension 2 instructions.

.. option:: -mno-ext-perf2

  Do not generate performance extension 2 instructions.

.. option:: -mext-string

  Generate string extension instructions.

.. option:: -mno-ext-string

  Do not generate string extension instructions.

.. option:: -mv3push

  Generate v3 push25/pop25 instructions.

.. option:: -mno-v3push

  Do not generate v3 push25/pop25 instructions.

.. option:: -m16-bit

  Generate 16-bit instructions.

.. option:: -mno-16-bit

  Do not generate 16-bit instructions.

.. option:: -misr-vector-size={num}

  Specify the size of each interrupt vector, which must be 4 or 16.

.. option:: -mcache-block-size={num}

  Specify the size of each cache block,
  which must be a power of 2 between 4 and 512.

.. option:: -march={arch}

  Specify the name of the target architecture.

.. option:: -mcmodel={code-model}

  Set the code model to one of

  small
    All the data and read-only data segments must be within 512KB addressing space.
    The text segment must be within 16MB addressing space.

  medium
    The data segment must be within 512KB while the read-only data segment can be
    within 4GB addressing space.  The text segment should be still within 16MB
    addressing space.

  large
    All the text and data segments can be within 4GB addressing space.

.. option:: -mctor-dtor

  Enable constructor/destructor feature.

.. option:: -mrelax

  Guide linker to relax instructions.
Commit	Line	Data
c63539ff ML	1	..
	2	Copyright 1988-2022 Free Software Foundation, Inc.
	3	This is part of the GCC manual.
	4	For copying conditions, see the copyright.rst file.
	5
	6	.. program:: NDS32
	7
	8	.. index:: NDS32 Options
	9
	10	.. _nds32-options:
	11
	12	NDS32 Options
	13	^^^^^^^^^^^^^
	14
	15	These options are defined for NDS32 implementations:
	16
	17	.. option:: -mbig-endian
	18
	19	Generate code in big-endian mode.
	20
	21	.. option:: -mlittle-endian
	22
	23	Generate code in little-endian mode.
	24
	25	.. option:: -mreduced-regs
	26
	27	Use reduced-set registers for register allocation.
	28
	29	.. option:: -mfull-regs
	30
	31	Use full-set registers for register allocation.
	32
	33	.. option:: -mcmov
	34
	35	Generate conditional move instructions.
	36
	37	.. option:: -mno-cmov
	38
	39	Do not generate conditional move instructions.
	40
	41	.. option:: -mext-perf
	42
	43	Generate performance extension instructions.
	44
	45	.. option:: -mno-ext-perf
	46
	47	Do not generate performance extension instructions.
	48
	49	.. option:: -mext-perf2
	50
	51	Generate performance extension 2 instructions.
	52
	53	.. option:: -mno-ext-perf2
	54
	55	Do not generate performance extension 2 instructions.
	56
	57	.. option:: -mext-string
	58
	59	Generate string extension instructions.
	60
	61	.. option:: -mno-ext-string
	62
	63	Do not generate string extension instructions.
	64
65	.. option:: -mv3push
66
67	Generate v3 push25/pop25 instructions.
68
69	.. option:: -mno-v3push
70
71	Do not generate v3 push25/pop25 instructions.
72
73	.. option:: -m16-bit
74
75	Generate 16-bit instructions.
76
77	.. option:: -mno-16-bit
78
79	Do not generate 16-bit instructions.
80
81	.. option:: -misr-vector-size={num}
82
83	Specify the size of each interrupt vector, which must be 4 or 16.
84
85	.. option:: -mcache-block-size={num}
86
87	Specify the size of each cache block,
88	which must be a power of 2 between 4 and 512.
89
90	.. option:: -march={arch}
91
92	Specify the name of the target architecture.
93
94	.. option:: -mcmodel={code-model}
95
96	Set the code model to one of
97
98	small
99	All the data and read-only data segments must be within 512KB addressing space.
100	The text segment must be within 16MB addressing space.
101
102	medium
103	The data segment must be within 512KB while the read-only data segment can be
104	within 4GB addressing space. The text segment should be still within 16MB
105	addressing space.
106
107	large
108	All the text and data segments can be within 4GB addressing space.
109
110	.. option:: -mctor-dtor
111
112	Enable constructor/destructor feature.
113
114	.. option:: -mrelax
115
3ed1b4ce	116	Guide linker to relax instructions.