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3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
8d9254fc 2 Copyright (C) 1987-2020 Free Software Foundation, Inc.
3cf2715d 3
1322177d 4This file is part of GCC.
3cf2715d 5
1322177d
LB
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
9dcd6f09 8Software Foundation; either version 3, or (at your option) any later
1322177d 9version.
3cf2715d 10
1322177d
LB
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
3cf2715d
DE
15
16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
3cf2715d 19
3cf2715d
DE
20/* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
08c148a8
NB
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
3cf2715d
DE
44
45#include "config.h"
01736018 46#define INCLUDE_ALGORITHM /* reverse */
670ee920 47#include "system.h"
4977bab6 48#include "coretypes.h"
c7131fb2 49#include "backend.h"
957060b5 50#include "target.h"
3cf2715d 51#include "rtl.h"
957060b5
AM
52#include "tree.h"
53#include "cfghooks.h"
c7131fb2 54#include "df.h"
4d0cdd0c 55#include "memmodel.h"
6baf1cc8 56#include "tm_p.h"
3cf2715d 57#include "insn-config.h"
957060b5
AM
58#include "regs.h"
59#include "emit-rtl.h"
3cf2715d 60#include "recog.h"
957060b5 61#include "cgraph.h"
957060b5 62#include "tree-pretty-print.h" /* for dump_function_header */
957060b5
AM
63#include "varasm.h"
64#include "insn-attr.h"
3cf2715d
DE
65#include "conditions.h"
66#include "flags.h"
3cf2715d 67#include "output.h"
3d195391 68#include "except.h"
0cbd9993
MLI
69#include "rtl-error.h"
70#include "toplev.h" /* exact_log2, floor_log2 */
d6f4ec51 71#include "reload.h"
ab87f8c8 72#include "intl.h"
60393bbc 73#include "cfgrtl.h"
a5a42b92 74#include "debug.h"
ef330312 75#include "tree-pass.h"
442b4905 76#include "tree-ssa.h"
edbed3d3 77#include "cfgloop.h"
314e6352
ML
78#include "stringpool.h"
79#include "attribs.h"
ef1b3fda 80#include "asan.h"
effb8a26 81#include "rtl-iter.h"
013a8899 82#include "print-rtl.h"
5a5a3bc5 83#include "function-abi.h"
3cf2715d 84
440aabf8 85#ifdef XCOFF_DEBUGGING_INFO
957060b5 86#include "xcoffout.h" /* Needed for external data declarations. */
440aabf8
NB
87#endif
88
76ead72b 89#include "dwarf2out.h"
76ead72b 90
6a08f7b3
DP
91#ifdef DBX_DEBUGGING_INFO
92#include "dbxout.h"
93#endif
94
906668bb
BS
95/* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
96 So define a null default for it to save conditionalization later. */
3cf2715d
DE
97#ifndef CC_STATUS_INIT
98#define CC_STATUS_INIT
99#endif
100
3cf2715d
DE
101/* Is the given character a logical line separator for the assembler? */
102#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
980d8882 103#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
3cf2715d
DE
104#endif
105
75197b37
BS
106#ifndef JUMP_TABLES_IN_TEXT_SECTION
107#define JUMP_TABLES_IN_TEXT_SECTION 0
108#endif
109
589fe865 110/* Bitflags used by final_scan_insn. */
70aacc97
JJ
111#define SEEN_NOTE 1
112#define SEEN_EMITTED 2
bd2b9f1e 113#define SEEN_NEXT_VIEW 4
589fe865 114
3cf2715d 115/* Last insn processed by final_scan_insn. */
fa7af581
DM
116static rtx_insn *debug_insn;
117rtx_insn *current_output_insn;
3cf2715d
DE
118
119/* Line number of last NOTE. */
120static int last_linenum;
121
497b7c47
JJ
122/* Column number of last NOTE. */
123static int last_columnnum;
124
fa6fd7b7 125/* Discriminator written to assembly. */
6c52e687
CC
126static int last_discriminator;
127
fa6fd7b7
AO
128/* Discriminator to be written to assembly for current instruction.
129 Note: actual usage depends on loc_discriminator_kind setting. */
6c52e687 130static int discriminator;
6bdb055e 131static inline int compute_discriminator (location_t loc);
6c52e687 132
fa6fd7b7
AO
133/* Discriminator identifying current basic block among others sharing
134 the same locus. */
135static int bb_discriminator;
136
137/* Basic block discriminator for previous instruction. */
138static int last_bb_discriminator;
139
eac40081
RK
140/* Highest line number in current block. */
141static int high_block_linenum;
142
143/* Likewise for function. */
144static int high_function_linenum;
145
3cf2715d 146/* Filename of last NOTE. */
3cce094d 147static const char *last_filename;
3cf2715d 148
497b7c47 149/* Override filename, line and column number. */
d752cfdb
JJ
150static const char *override_filename;
151static int override_linenum;
497b7c47 152static int override_columnnum;
6bdb055e 153static int override_discriminator;
d752cfdb 154
b8176fe4
EB
155/* Whether to force emission of a line note before the next insn. */
156static bool force_source_line = false;
b0efb46b 157
5f2f0edd 158extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
fc470718 159
3cf2715d 160/* Nonzero while outputting an `asm' with operands.
535a42b1 161 This means that inconsistencies are the user's fault, so don't die.
3cf2715d 162 The precise value is the insn being output, to pass to error_for_asm. */
1c22488e 163const rtx_insn *this_is_asm_operands;
3cf2715d
DE
164
165/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 166static unsigned int insn_noperands;
3cf2715d
DE
167
168/* Compare optimization flag. */
169
170static rtx last_ignored_compare = 0;
171
3cf2715d
DE
172/* Assign a unique number to each insn that is output.
173 This can be used to generate unique local labels. */
174
175static int insn_counter = 0;
176
3cf2715d
DE
177/* This variable contains machine-dependent flags (defined in tm.h)
178 set and examined by output routines
179 that describe how to interpret the condition codes properly. */
180
181CC_STATUS cc_status;
182
183/* During output of an insn, this contains a copy of cc_status
184 from before the insn. */
185
186CC_STATUS cc_prev_status;
3cf2715d 187
18c038b9 188/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
3cf2715d
DE
189
190static int block_depth;
191
192/* Nonzero if have enabled APP processing of our assembler output. */
193
194static int app_on;
195
196/* If we are outputting an insn sequence, this contains the sequence rtx.
197 Zero otherwise. */
198
b32d5189 199rtx_sequence *final_sequence;
3cf2715d
DE
200
201#ifdef ASSEMBLER_DIALECT
202
203/* Number of the assembler dialect to use, starting at 0. */
204static int dialect_number;
205#endif
206
afe48e06
RH
207/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
208rtx current_insn_predicate;
afe48e06 209
7365279f 210/* True if printing into -fdump-final-insns= dump. */
6ca5d1f6
JJ
211bool final_insns_dump_p;
212
ddd84654
JJ
213/* True if profile_function should be called, but hasn't been called yet. */
214static bool need_profile_function;
215
6cf9ac28 216static int asm_insn_count (rtx);
6cf9ac28
AJ
217static void profile_function (FILE *);
218static void profile_after_prologue (FILE *);
fa7af581 219static bool notice_source_line (rtx_insn *, bool *);
6fb5fa3c 220static rtx walk_alter_subreg (rtx *, bool *);
6cf9ac28 221static void output_asm_name (void);
fa7af581 222static void output_alternate_entry_point (FILE *, rtx_insn *);
6cf9ac28
AJ
223static tree get_mem_expr_from_op (rtx, int *);
224static void output_asm_operand_names (rtx *, int *, int);
e9a25f70 225#ifdef LEAF_REGISTERS
fa7af581 226static void leaf_renumber_regs (rtx_insn *);
e9a25f70 227#endif
f1e52ed6 228#if HAVE_cc0
6cf9ac28 229static int alter_cond (rtx);
e9a25f70 230#endif
6cf9ac28 231static int align_fuzz (rtx, rtx, int, unsigned);
27c07cc5 232static void collect_fn_hard_reg_usage (void);
3cf2715d
DE
233\f
234/* Initialize data in final at the beginning of a compilation. */
235
236void
6cf9ac28 237init_final (const char *filename ATTRIBUTE_UNUSED)
3cf2715d 238{
3cf2715d 239 app_on = 0;
3cf2715d
DE
240 final_sequence = 0;
241
242#ifdef ASSEMBLER_DIALECT
243 dialect_number = ASSEMBLER_DIALECT;
244#endif
245}
246
08c148a8 247/* Default target function prologue and epilogue assembler output.
b9f22704 248
08c148a8
NB
249 If not overridden for epilogue code, then the function body itself
250 contains return instructions wherever needed. */
251void
42776416 252default_function_pro_epilogue (FILE *)
08c148a8
NB
253{
254}
255
14d11d40
IS
256void
257default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
258 tree decl ATTRIBUTE_UNUSED,
259 bool new_is_cold ATTRIBUTE_UNUSED)
260{
261}
262
b4c25db2
NB
263/* Default target hook that outputs nothing to a stream. */
264void
6cf9ac28 265no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
b4c25db2
NB
266{
267}
268
3cf2715d
DE
269/* Enable APP processing of subsequent output.
270 Used before the output from an `asm' statement. */
271
272void
6cf9ac28 273app_enable (void)
3cf2715d
DE
274{
275 if (! app_on)
276 {
51723711 277 fputs (ASM_APP_ON, asm_out_file);
3cf2715d
DE
278 app_on = 1;
279 }
280}
281
282/* Disable APP processing of subsequent output.
283 Called from varasm.c before most kinds of output. */
284
285void
6cf9ac28 286app_disable (void)
3cf2715d
DE
287{
288 if (app_on)
289 {
51723711 290 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
DE
291 app_on = 0;
292 }
293}
294\f
f5d927c0 295/* Return the number of slots filled in the current
3cf2715d
DE
296 delayed branch sequence (we don't count the insn needing the
297 delay slot). Zero if not in a delayed branch sequence. */
298
3cf2715d 299int
6cf9ac28 300dbr_sequence_length (void)
3cf2715d
DE
301{
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
306}
3cf2715d
DE
307\f
308/* The next two pages contain routines used to compute the length of an insn
309 and to shorten branches. */
310
311/* Arrays for insn lengths, and addresses. The latter is referenced by
312 `insn_current_length'. */
313
addd7df6 314static int *insn_lengths;
9d98a694 315
9771b263 316vec<int> insn_addresses_;
3cf2715d 317
ea3cbda5
R
318/* Max uid for which the above arrays are valid. */
319static int insn_lengths_max_uid;
320
3cf2715d
DE
321/* Address of insn being processed. Used by `insn_current_length'. */
322int insn_current_address;
323
fc470718
R
324/* Address of insn being processed in previous iteration. */
325int insn_last_address;
326
d6a7951f 327/* known invariant alignment of insn being processed. */
fc470718
R
328int insn_current_align;
329
95707627
R
330/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
331 gives the next following alignment insn that increases the known
332 alignment, or NULL_RTX if there is no such insn.
333 For any alignment obtained this way, we can again index uid_align with
334 its uid to obtain the next following align that in turn increases the
335 alignment, till we reach NULL_RTX; the sequence obtained this way
336 for each insn we'll call the alignment chain of this insn in the following
337 comments. */
338
9e423e6d
JW
339static rtx *uid_align;
340static int *uid_shuid;
e6de5335 341static vec<align_flags> label_align;
95707627 342
3cf2715d
DE
343/* Indicate that branch shortening hasn't yet been done. */
344
345void
6cf9ac28 346init_insn_lengths (void)
3cf2715d 347{
95707627
R
348 if (uid_shuid)
349 {
350 free (uid_shuid);
351 uid_shuid = 0;
352 }
353 if (insn_lengths)
354 {
355 free (insn_lengths);
356 insn_lengths = 0;
ea3cbda5 357 insn_lengths_max_uid = 0;
95707627 358 }
d327457f
JR
359 if (HAVE_ATTR_length)
360 INSN_ADDRESSES_FREE ();
95707627
R
361 if (uid_align)
362 {
363 free (uid_align);
364 uid_align = 0;
365 }
3cf2715d
DE
366}
367
368/* Obtain the current length of an insn. If branch shortening has been done,
6fc0bb99 369 get its actual length. Otherwise, use FALLBACK_FN to calculate the
070a7956 370 length. */
4df199d1 371static int
84034c69 372get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
3cf2715d 373{
3cf2715d
DE
374 rtx body;
375 int i;
376 int length = 0;
377
d327457f
JR
378 if (!HAVE_ATTR_length)
379 return 0;
380
ea3cbda5 381 if (insn_lengths_max_uid > INSN_UID (insn))
3cf2715d
DE
382 return insn_lengths[INSN_UID (insn)];
383 else
384 switch (GET_CODE (insn))
385 {
386 case NOTE:
387 case BARRIER:
388 case CODE_LABEL:
b5b8b0ac 389 case DEBUG_INSN:
3cf2715d
DE
390 return 0;
391
392 case CALL_INSN:
3cf2715d 393 case JUMP_INSN:
39718607 394 length = fallback_fn (insn);
3cf2715d
DE
395 break;
396
397 case INSN:
398 body = PATTERN (insn);
399 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
400 return 0;
401
402 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
070a7956 403 length = asm_insn_count (body) * fallback_fn (insn);
e429a50b
DM
404 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
405 for (i = 0; i < seq->len (); i++)
406 length += get_attr_length_1 (seq->insn (i), fallback_fn);
3cf2715d 407 else
070a7956 408 length = fallback_fn (insn);
e9a25f70
JL
409 break;
410
411 default:
412 break;
3cf2715d
DE
413 }
414
415#ifdef ADJUST_INSN_LENGTH
416 ADJUST_INSN_LENGTH (insn, length);
417#endif
418 return length;
3cf2715d 419}
070a7956
R
420
421/* Obtain the current length of an insn. If branch shortening has been done,
422 get its actual length. Otherwise, get its maximum length. */
423int
84034c69 424get_attr_length (rtx_insn *insn)
070a7956
R
425{
426 return get_attr_length_1 (insn, insn_default_length);
427}
428
429/* Obtain the current length of an insn. If branch shortening has been done,
430 get its actual length. Otherwise, get its minimum length. */
431int
84034c69 432get_attr_min_length (rtx_insn *insn)
070a7956
R
433{
434 return get_attr_length_1 (insn, insn_min_length);
435}
3cf2715d 436\f
fc470718
R
437/* Code to handle alignment inside shorten_branches. */
438
439/* Here is an explanation how the algorithm in align_fuzz can give
440 proper results:
441
442 Call a sequence of instructions beginning with alignment point X
443 and continuing until the next alignment point `block X'. When `X'
f5d927c0 444 is used in an expression, it means the alignment value of the
fc470718 445 alignment point.
f5d927c0 446
fc470718
R
447 Call the distance between the start of the first insn of block X, and
448 the end of the last insn of block X `IX', for the `inner size of X'.
449 This is clearly the sum of the instruction lengths.
f5d927c0 450
fc470718
R
451 Likewise with the next alignment-delimited block following X, which we
452 shall call block Y.
f5d927c0 453
fc470718
R
454 Call the distance between the start of the first insn of block X, and
455 the start of the first insn of block Y `OX', for the `outer size of X'.
f5d927c0 456
fc470718 457 The estimated padding is then OX - IX.
f5d927c0 458
fc470718 459 OX can be safely estimated as
f5d927c0 460
fc470718
R
461 if (X >= Y)
462 OX = round_up(IX, Y)
463 else
464 OX = round_up(IX, X) + Y - X
f5d927c0 465
fc470718
R
466 Clearly est(IX) >= real(IX), because that only depends on the
467 instruction lengths, and those being overestimated is a given.
f5d927c0 468
fc470718
R
469 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
470 we needn't worry about that when thinking about OX.
f5d927c0 471
fc470718
R
472 When X >= Y, the alignment provided by Y adds no uncertainty factor
473 for branch ranges starting before X, so we can just round what we have.
474 But when X < Y, we don't know anything about the, so to speak,
475 `middle bits', so we have to assume the worst when aligning up from an
476 address mod X to one mod Y, which is Y - X. */
477
478#ifndef LABEL_ALIGN
e6de5335 479#define LABEL_ALIGN(LABEL) align_labels
fc470718
R
480#endif
481
482#ifndef LOOP_ALIGN
e6de5335 483#define LOOP_ALIGN(LABEL) align_loops
fc470718
R
484#endif
485
486#ifndef LABEL_ALIGN_AFTER_BARRIER
340f7e7c 487#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
fc470718
R
488#endif
489
247a370b 490#ifndef JUMP_ALIGN
e6de5335 491#define JUMP_ALIGN(LABEL) align_jumps
247a370b
JH
492#endif
493
fc470718 494#ifndef ADDR_VEC_ALIGN
ca3075bd 495static int
d305ca88 496final_addr_vec_align (rtx_jump_table_data *addr_vec)
fc470718 497{
d305ca88 498 int align = GET_MODE_SIZE (addr_vec->get_data_mode ());
fc470718
R
499
500 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
501 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
2a841588 502 return exact_log2 (align);
fc470718
R
503
504}
f5d927c0 505
fc470718
R
506#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
507#endif
508
509#ifndef INSN_LENGTH_ALIGNMENT
510#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
511#endif
512
fc470718
R
513#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
514
de7987a6 515static int min_labelno, max_labelno;
fc470718
R
516
517#define LABEL_TO_ALIGNMENT(LABEL) \
e6de5335 518 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno])
fc470718
R
519
520/* For the benefit of port specific code do this also as a function. */
f5d927c0 521
e6de5335 522align_flags
6cf9ac28 523label_to_alignment (rtx label)
fc470718 524{
40a8f07a
JJ
525 if (CODE_LABEL_NUMBER (label) <= max_labelno)
526 return LABEL_TO_ALIGNMENT (label);
e6de5335 527 return align_flags ();
fc470718
R
528}
529
fc470718
R
530/* The differences in addresses
531 between a branch and its target might grow or shrink depending on
532 the alignment the start insn of the range (the branch for a forward
533 branch or the label for a backward branch) starts out on; if these
534 differences are used naively, they can even oscillate infinitely.
535 We therefore want to compute a 'worst case' address difference that
536 is independent of the alignment the start insn of the range end
537 up on, and that is at least as large as the actual difference.
538 The function align_fuzz calculates the amount we have to add to the
539 naively computed difference, by traversing the part of the alignment
540 chain of the start insn of the range that is in front of the end insn
541 of the range, and considering for each alignment the maximum amount
542 that it might contribute to a size increase.
543
544 For casesi tables, we also want to know worst case minimum amounts of
545 address difference, in case a machine description wants to introduce
546 some common offset that is added to all offsets in a table.
d6a7951f 547 For this purpose, align_fuzz with a growth argument of 0 computes the
fc470718
R
548 appropriate adjustment. */
549
fc470718
R
550/* Compute the maximum delta by which the difference of the addresses of
551 START and END might grow / shrink due to a different address for start
552 which changes the size of alignment insns between START and END.
553 KNOWN_ALIGN_LOG is the alignment known for START.
554 GROWTH should be ~0 if the objective is to compute potential code size
555 increase, and 0 if the objective is to compute potential shrink.
556 The return value is undefined for any other value of GROWTH. */
f5d927c0 557
ca3075bd 558static int
6cf9ac28 559align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
fc470718
R
560{
561 int uid = INSN_UID (start);
562 rtx align_label;
563 int known_align = 1 << known_align_log;
564 int end_shuid = INSN_SHUID (end);
565 int fuzz = 0;
566
567 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
568 {
569 int align_addr, new_align;
570
571 uid = INSN_UID (align_label);
9d98a694 572 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
fc470718
R
573 if (uid_shuid[uid] > end_shuid)
574 break;
e6de5335
ML
575 align_flags alignment = LABEL_TO_ALIGNMENT (align_label);
576 new_align = 1 << alignment.levels[0].log;
fc470718
R
577 if (new_align < known_align)
578 continue;
579 fuzz += (-align_addr ^ growth) & (new_align - known_align);
580 known_align = new_align;
581 }
582 return fuzz;
583}
584
585/* Compute a worst-case reference address of a branch so that it
586 can be safely used in the presence of aligned labels. Since the
587 size of the branch itself is unknown, the size of the branch is
588 not included in the range. I.e. for a forward branch, the reference
589 address is the end address of the branch as known from the previous
590 branch shortening pass, minus a value to account for possible size
591 increase due to alignment. For a backward branch, it is the start
592 address of the branch as known from the current pass, plus a value
593 to account for possible size increase due to alignment.
594 NB.: Therefore, the maximum offset allowed for backward branches needs
595 to exclude the branch size. */
f5d927c0 596
fc470718 597int
8ba24b7b 598insn_current_reference_address (rtx_insn *branch)
fc470718 599{
e67d1102 600 rtx dest;
5527bf14
RH
601 int seq_uid;
602
603 if (! INSN_ADDRESSES_SET_P ())
604 return 0;
605
e67d1102 606 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
5527bf14 607 seq_uid = INSN_UID (seq);
bf7988f1 608 if (!jump_to_label_p (branch))
fc470718
R
609 /* This can happen for example on the PA; the objective is to know the
610 offset to address something in front of the start of the function.
611 Thus, we can treat it like a backward branch.
612 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
613 any alignment we'd encounter, so we skip the call to align_fuzz. */
614 return insn_current_address;
615 dest = JUMP_LABEL (branch);
5527bf14 616
b9f22704 617 /* BRANCH has no proper alignment chain set, so use SEQ.
afc6898e
BS
618 BRANCH also has no INSN_SHUID. */
619 if (INSN_SHUID (seq) < INSN_SHUID (dest))
fc470718 620 {
f5d927c0 621 /* Forward branch. */
fc470718 622 return (insn_last_address + insn_lengths[seq_uid]
26024475 623 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
624 }
625 else
626 {
f5d927c0 627 /* Backward branch. */
fc470718 628 return (insn_current_address
923f7cf9 629 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
630 }
631}
fc470718 632\f
6786ba1a 633/* Compute branch alignments based on CFG profile. */
65727068 634
e855c69d 635unsigned int
6cf9ac28 636compute_alignments (void)
247a370b 637{
e0082a72 638 basic_block bb;
e6de5335 639 align_flags max_alignment;
247a370b 640
e6de5335 641 label_align.truncate (0);
247a370b
JH
642
643 max_labelno = max_label_num ();
644 min_labelno = get_first_label_num ();
e6de5335 645 label_align.safe_grow_cleared (max_labelno - min_labelno + 1);
247a370b
JH
646
647 /* If not optimizing or optimizing for size, don't assign any alignments. */
efd8f750 648 if (! optimize || optimize_function_for_size_p (cfun))
c2924966 649 return 0;
247a370b 650
edbed3d3
JH
651 if (dump_file)
652 {
532aafad 653 dump_reg_info (dump_file);
edbed3d3
JH
654 dump_flow_info (dump_file, TDF_DETAILS);
655 flow_loops_dump (dump_file, NULL, 1);
edbed3d3 656 }
58082ff6 657 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
6786ba1a 658 profile_count count_threshold = cfun->cfg->count_max.apply_scale
028d4092 659 (1, param_align_threshold);
edbed3d3
JH
660
661 if (dump_file)
6786ba1a
JH
662 {
663 fprintf (dump_file, "count_max: ");
664 cfun->cfg->count_max.dump (dump_file);
665 fprintf (dump_file, "\n");
666 }
11cd3bed 667 FOR_EACH_BB_FN (bb, cfun)
247a370b 668 {
fa7af581 669 rtx_insn *label = BB_HEAD (bb);
6786ba1a 670 bool has_fallthru = 0;
247a370b 671 edge e;
628f6a4e 672 edge_iterator ei;
247a370b 673
4b4bf941 674 if (!LABEL_P (label)
8bcf15f6 675 || optimize_bb_for_size_p (bb))
edbed3d3
JH
676 {
677 if (dump_file)
c3284718 678 fprintf (dump_file,
6786ba1a
JH
679 "BB %4i loop %2i loop_depth %2i skipped.\n",
680 bb->index,
e7a74006 681 bb->loop_father->num,
c3284718 682 bb_loop_depth (bb));
edbed3d3
JH
683 continue;
684 }
e6de5335 685 max_alignment = LABEL_ALIGN (label);
6786ba1a
JH
686 profile_count fallthru_count = profile_count::zero ();
687 profile_count branch_count = profile_count::zero ();
247a370b 688
628f6a4e 689 FOR_EACH_EDGE (e, ei, bb->preds)
247a370b
JH
690 {
691 if (e->flags & EDGE_FALLTHRU)
6786ba1a 692 has_fallthru = 1, fallthru_count += e->count ();
247a370b 693 else
6786ba1a 694 branch_count += e->count ();
247a370b 695 }
edbed3d3
JH
696 if (dump_file)
697 {
6786ba1a
JH
698 fprintf (dump_file, "BB %4i loop %2i loop_depth"
699 " %2i fall ",
700 bb->index, bb->loop_father->num,
701 bb_loop_depth (bb));
702 fallthru_count.dump (dump_file);
703 fprintf (dump_file, " branch ");
704 branch_count.dump (dump_file);
edbed3d3
JH
705 if (!bb->loop_father->inner && bb->loop_father->num)
706 fprintf (dump_file, " inner_loop");
707 if (bb->loop_father->header == bb)
708 fprintf (dump_file, " loop_header");
709 fprintf (dump_file, "\n");
710 }
6786ba1a
JH
711 if (!fallthru_count.initialized_p () || !branch_count.initialized_p ())
712 continue;
247a370b 713
f63d1bf7 714 /* There are two purposes to align block with no fallthru incoming edge:
247a370b 715 1) to avoid fetch stalls when branch destination is near cache boundary
d6a7951f 716 2) to improve cache efficiency in case the previous block is not executed
247a370b
JH
717 (so it does not need to be in the cache).
718
719 We to catch first case, we align frequently executed blocks.
720 To catch the second, we align blocks that are executed more frequently
eaec9b3d 721 than the predecessor and the predecessor is likely to not be executed
247a370b
JH
722 when function is called. */
723
724 if (!has_fallthru
6786ba1a
JH
725 && (branch_count > count_threshold
726 || (bb->count > bb->prev_bb->count.apply_scale (10, 1)
7365279f 727 && (bb->prev_bb->count
6786ba1a
JH
728 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)
729 ->count.apply_scale (1, 2)))))
247a370b 730 {
e6de5335 731 align_flags alignment = JUMP_ALIGN (label);
edbed3d3 732 if (dump_file)
c3284718 733 fprintf (dump_file, " jump alignment added.\n");
e6de5335 734 max_alignment = align_flags::max (max_alignment, alignment);
247a370b
JH
735 }
736 /* In case block is frequent and reached mostly by non-fallthru edge,
09da1532 737 align it. It is most likely a first block of loop. */
247a370b 738 if (has_fallthru
82b9c015
EB
739 && !(single_succ_p (bb)
740 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
efd8f750 741 && optimize_bb_for_speed_p (bb)
6786ba1a
JH
742 && branch_count + fallthru_count > count_threshold
743 && (branch_count
744 > fallthru_count.apply_scale
028d4092 745 (param_align_loop_iterations, 1)))
247a370b 746 {
e6de5335 747 align_flags alignment = LOOP_ALIGN (label);
edbed3d3 748 if (dump_file)
c3284718 749 fprintf (dump_file, " internal loop alignment added.\n");
e6de5335 750 max_alignment = align_flags::max (max_alignment, alignment);
247a370b 751 }
e6de5335 752 LABEL_TO_ALIGNMENT (label) = max_alignment;
247a370b 753 }
edbed3d3 754
58082ff6
PH
755 loop_optimizer_finalize ();
756 free_dominance_info (CDI_DOMINATORS);
c2924966 757 return 0;
247a370b 758}
ef330312 759
5cf6635b
EB
760/* Grow the LABEL_ALIGN array after new labels are created. */
761
7365279f 762static void
5cf6635b
EB
763grow_label_align (void)
764{
765 int old = max_labelno;
766 int n_labels;
767 int n_old_labels;
768
769 max_labelno = max_label_num ();
770
771 n_labels = max_labelno - min_labelno + 1;
772 n_old_labels = old - min_labelno + 1;
773
e6de5335 774 label_align.safe_grow_cleared (n_labels);
5cf6635b
EB
775
776 /* Range of labels grows monotonically in the function. Failing here
777 means that the initialization of array got lost. */
778 gcc_assert (n_old_labels <= n_labels);
5cf6635b
EB
779}
780
781/* Update the already computed alignment information. LABEL_PAIRS is a vector
782 made up of pairs of labels for which the alignment information of the first
783 element will be copied from that of the second element. */
784
785void
786update_alignments (vec<rtx> &label_pairs)
787{
788 unsigned int i = 0;
33fd5699 789 rtx iter, label = NULL_RTX;
5cf6635b
EB
790
791 if (max_labelno != max_label_num ())
792 grow_label_align ();
793
794 FOR_EACH_VEC_ELT (label_pairs, i, iter)
795 if (i & 1)
e6de5335 796 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
5cf6635b
EB
797 else
798 label = iter;
799}
800
27a4cd48
DM
801namespace {
802
803const pass_data pass_data_compute_alignments =
ef330312 804{
27a4cd48
DM
805 RTL_PASS, /* type */
806 "alignments", /* name */
807 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
808 TV_NONE, /* tv_id */
809 0, /* properties_required */
810 0, /* properties_provided */
811 0, /* properties_destroyed */
812 0, /* todo_flags_start */
3bea341f 813 0, /* todo_flags_finish */
ef330312
PB
814};
815
27a4cd48
DM
816class pass_compute_alignments : public rtl_opt_pass
817{
818public:
c3284718
RS
819 pass_compute_alignments (gcc::context *ctxt)
820 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
27a4cd48
DM
821 {}
822
823 /* opt_pass methods: */
be55bfe6 824 virtual unsigned int execute (function *) { return compute_alignments (); }
27a4cd48
DM
825
826}; // class pass_compute_alignments
827
828} // anon namespace
829
830rtl_opt_pass *
831make_pass_compute_alignments (gcc::context *ctxt)
832{
833 return new pass_compute_alignments (ctxt);
834}
835
247a370b 836\f
3cf2715d
DE
837/* Make a pass over all insns and compute their actual lengths by shortening
838 any branches of variable length if possible. */
839
fc470718
R
840/* shorten_branches might be called multiple times: for example, the SH
841 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
842 In order to do this, it needs proper length information, which it obtains
843 by calling shorten_branches. This cannot be collapsed with
d6a7951f 844 shorten_branches itself into a single pass unless we also want to integrate
fc470718
R
845 reorg.c, since the branch splitting exposes new instructions with delay
846 slots. */
847
3cf2715d 848void
49922db8 849shorten_branches (rtx_insn *first)
3cf2715d 850{
fa7af581 851 rtx_insn *insn;
fc470718
R
852 int max_uid;
853 int i;
fa7af581 854 rtx_insn *seq;
3cf2715d 855 int something_changed = 1;
3cf2715d
DE
856 char *varying_length;
857 rtx body;
858 int uid;
5bbccd92 859 rtx align_tab[MAX_CODE_ALIGN + 1];
3cf2715d 860
3446405d
JH
861 /* Compute maximum UID and allocate label_align / uid_shuid. */
862 max_uid = get_max_uid ();
d9b6874b 863
471854f8 864 /* Free uid_shuid before reallocating it. */
07a1f795 865 free (uid_shuid);
b0efb46b 866
5ed6ace5 867 uid_shuid = XNEWVEC (int, max_uid);
25e22dc0 868
247a370b 869 if (max_labelno != max_label_num ())
5cf6635b 870 grow_label_align ();
247a370b 871
fc470718
R
872 /* Initialize label_align and set up uid_shuid to be strictly
873 monotonically rising with insn order. */
e6de5335 874 /* We use alignment here to keep track of the maximum alignment we want to
e2faec75
R
875 impose on the next CODE_LABEL (or the current one if we are processing
876 the CODE_LABEL itself). */
f5d927c0 877
e6de5335 878 align_flags max_alignment;
9e423e6d
JW
879
880 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718 881 {
fc470718 882 INSN_SHUID (insn) = i++;
2c3c49de 883 if (INSN_P (insn))
80838531 884 continue;
b0efb46b 885
d305ca88 886 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
fc470718 887 {
247a370b 888 /* Merge in alignments computed by compute_alignments. */
e6de5335
ML
889 align_flags alignment = LABEL_TO_ALIGNMENT (label);
890 max_alignment = align_flags::max (max_alignment, alignment);
fc470718 891
d305ca88
RS
892 rtx_jump_table_data *table = jump_table_for_label (label);
893 if (!table)
9e423e6d 894 {
e6de5335
ML
895 align_flags alignment = LABEL_ALIGN (label);
896 max_alignment = align_flags::max (max_alignment, alignment);
9e423e6d 897 }
75197b37
BS
898 /* ADDR_VECs only take room if read-only data goes into the text
899 section. */
0676c393
MM
900 if ((JUMP_TABLES_IN_TEXT_SECTION
901 || readonly_data_section == text_section)
d305ca88 902 && table)
0676c393 903 {
e6de5335
ML
904 align_flags alignment = align_flags (ADDR_VEC_ALIGN (table));
905 max_alignment = align_flags::max (max_alignment, alignment);
0676c393 906 }
e6de5335
ML
907 LABEL_TO_ALIGNMENT (label) = max_alignment;
908 max_alignment = align_flags ();
fc470718 909 }
4b4bf941 910 else if (BARRIER_P (insn))
fc470718 911 {
fa7af581 912 rtx_insn *label;
fc470718 913
2c3c49de 914 for (label = insn; label && ! INSN_P (label);
fc470718 915 label = NEXT_INSN (label))
4b4bf941 916 if (LABEL_P (label))
fc470718 917 {
e6de5335
ML
918 align_flags alignment
919 = align_flags (LABEL_ALIGN_AFTER_BARRIER (insn));
920 max_alignment = align_flags::max (max_alignment, alignment);
fc470718
R
921 break;
922 }
923 }
fc470718 924 }
d327457f
JR
925 if (!HAVE_ATTR_length)
926 return;
fc470718
R
927
928 /* Allocate the rest of the arrays. */
5ed6ace5 929 insn_lengths = XNEWVEC (int, max_uid);
ea3cbda5 930 insn_lengths_max_uid = max_uid;
af035616
R
931 /* Syntax errors can lead to labels being outside of the main insn stream.
932 Initialize insn_addresses, so that we get reproducible results. */
9d98a694 933 INSN_ADDRESSES_ALLOC (max_uid);
fc470718 934
5ed6ace5 935 varying_length = XCNEWVEC (char, max_uid);
fc470718
R
936
937 /* Initialize uid_align. We scan instructions
938 from end to start, and keep in align_tab[n] the last seen insn
939 that does an alignment of at least n+1, i.e. the successor
940 in the alignment chain for an insn that does / has a known
941 alignment of n. */
5ed6ace5 942 uid_align = XCNEWVEC (rtx, max_uid);
fc470718 943
5bbccd92 944 for (i = MAX_CODE_ALIGN + 1; --i >= 0;)
fc470718
R
945 align_tab[i] = NULL_RTX;
946 seq = get_last_insn ();
33f7f353 947 for (; seq; seq = PREV_INSN (seq))
fc470718
R
948 {
949 int uid = INSN_UID (seq);
950 int log;
e6de5335 951 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq).levels[0].log : 0);
fc470718 952 uid_align[uid] = align_tab[0];
fc470718
R
953 if (log)
954 {
955 /* Found an alignment label. */
e6de5335 956 gcc_checking_assert (log < MAX_CODE_ALIGN + 1);
fc470718
R
957 uid_align[uid] = align_tab[log];
958 for (i = log - 1; i >= 0; i--)
959 align_tab[i] = seq;
960 }
33f7f353 961 }
f6df08e6
JR
962
963 /* When optimizing, we start assuming minimum length, and keep increasing
964 lengths as we find the need for this, till nothing changes.
965 When not optimizing, we start assuming maximum lengths, and
966 do a single pass to update the lengths. */
967 bool increasing = optimize != 0;
968
33f7f353
JR
969#ifdef CASE_VECTOR_SHORTEN_MODE
970 if (optimize)
971 {
972 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
973 label fields. */
974
975 int min_shuid = INSN_SHUID (get_insns ()) - 1;
976 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
977 int rel;
978
979 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 980 {
33f7f353
JR
981 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
982 int len, i, min, max, insn_shuid;
983 int min_align;
984 addr_diff_vec_flags flags;
985
34f0d87a 986 if (! JUMP_TABLE_DATA_P (insn)
33f7f353
JR
987 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
988 continue;
989 pat = PATTERN (insn);
990 len = XVECLEN (pat, 1);
0bccc606 991 gcc_assert (len > 0);
33f7f353
JR
992 min_align = MAX_CODE_ALIGN;
993 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
994 {
995 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
996 int shuid = INSN_SHUID (lab);
997 if (shuid < min)
998 {
999 min = shuid;
1000 min_lab = lab;
1001 }
1002 if (shuid > max)
1003 {
1004 max = shuid;
1005 max_lab = lab;
1006 }
e6de5335
ML
1007
1008 int label_alignment = LABEL_TO_ALIGNMENT (lab).levels[0].log;
1009 if (min_align > label_alignment)
1010 min_align = label_alignment;
33f7f353 1011 }
4c33cb26
R
1012 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1013 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
33f7f353
JR
1014 insn_shuid = INSN_SHUID (insn);
1015 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
5921f276 1016 memset (&flags, 0, sizeof (flags));
33f7f353
JR
1017 flags.min_align = min_align;
1018 flags.base_after_vec = rel > insn_shuid;
1019 flags.min_after_vec = min > insn_shuid;
1020 flags.max_after_vec = max > insn_shuid;
1021 flags.min_after_base = min > rel;
1022 flags.max_after_base = max > rel;
1023 ADDR_DIFF_VEC_FLAGS (pat) = flags;
f6df08e6
JR
1024
1025 if (increasing)
1026 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
fc470718
R
1027 }
1028 }
33f7f353 1029#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1030
3cf2715d 1031 /* Compute initial lengths, addresses, and varying flags for each insn. */
84034c69 1032 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
f6df08e6 1033
b816f339 1034 for (insn_current_address = 0, insn = first;
3cf2715d
DE
1035 insn != 0;
1036 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1037 {
1038 uid = INSN_UID (insn);
fc470718 1039
3cf2715d 1040 insn_lengths[uid] = 0;
fc470718 1041
4b4bf941 1042 if (LABEL_P (insn))
fc470718 1043 {
e6de5335 1044 int log = LABEL_TO_ALIGNMENT (insn).levels[0].log;
fc470718
R
1045 if (log)
1046 {
1047 int align = 1 << log;
ecb06768 1048 int new_address = (insn_current_address + align - 1) & -align;
fc470718 1049 insn_lengths[uid] = new_address - insn_current_address;
fc470718
R
1050 }
1051 }
1052
5a09edba 1053 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
f5d927c0 1054
4b4bf941 1055 if (NOTE_P (insn) || BARRIER_P (insn)
c3284718 1056 || LABEL_P (insn) || DEBUG_INSN_P (insn))
3cf2715d 1057 continue;
4654c0cf 1058 if (insn->deleted ())
04da53bd 1059 continue;
3cf2715d
DE
1060
1061 body = PATTERN (insn);
d305ca88 1062 if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn))
5a32a90c
JR
1063 {
1064 /* This only takes room if read-only data goes into the text
1065 section. */
d6b5193b
RS
1066 if (JUMP_TABLES_IN_TEXT_SECTION
1067 || readonly_data_section == text_section)
75197b37
BS
1068 insn_lengths[uid] = (XVECLEN (body,
1069 GET_CODE (body) == ADDR_DIFF_VEC)
d305ca88 1070 * GET_MODE_SIZE (table->get_data_mode ()));
5a32a90c 1071 /* Alignment is handled by ADDR_VEC_ALIGN. */
5a32a90c 1072 }
a30caf5c 1073 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
3cf2715d 1074 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
e429a50b 1075 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
3cf2715d
DE
1076 {
1077 int i;
1078 int const_delay_slots;
e90bedf5
TS
1079 if (DELAY_SLOTS)
1080 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1081 else
1082 const_delay_slots = 0;
1083
84034c69 1084 int (*inner_length_fun) (rtx_insn *)
f6df08e6 1085 = const_delay_slots ? length_fun : insn_default_length;
3cf2715d
DE
1086 /* Inside a delay slot sequence, we do not do any branch shortening
1087 if the shortening could change the number of delay slots
0f41302f 1088 of the branch. */
e429a50b 1089 for (i = 0; i < body_seq->len (); i++)
3cf2715d 1090 {
e429a50b 1091 rtx_insn *inner_insn = body_seq->insn (i);
3cf2715d
DE
1092 int inner_uid = INSN_UID (inner_insn);
1093 int inner_length;
1094
5dd2902a 1095 if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT
e429a50b 1096 || asm_noperands (PATTERN (inner_insn)) >= 0)
3cf2715d
DE
1097 inner_length = (asm_insn_count (PATTERN (inner_insn))
1098 * insn_default_length (inner_insn));
1099 else
f6df08e6 1100 inner_length = inner_length_fun (inner_insn);
f5d927c0 1101
3cf2715d
DE
1102 insn_lengths[inner_uid] = inner_length;
1103 if (const_delay_slots)
1104 {
1105 if ((varying_length[inner_uid]
1106 = insn_variable_length_p (inner_insn)) != 0)
1107 varying_length[uid] = 1;
9d98a694
AO
1108 INSN_ADDRESSES (inner_uid) = (insn_current_address
1109 + insn_lengths[uid]);
3cf2715d
DE
1110 }
1111 else
1112 varying_length[inner_uid] = 0;
1113 insn_lengths[uid] += inner_length;
1114 }
1115 }
1116 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1117 {
f6df08e6 1118 insn_lengths[uid] = length_fun (insn);
3cf2715d
DE
1119 varying_length[uid] = insn_variable_length_p (insn);
1120 }
1121
1122 /* If needed, do any adjustment. */
1123#ifdef ADJUST_INSN_LENGTH
1124 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
04b6000c 1125 if (insn_lengths[uid] < 0)
c725bd79 1126 fatal_insn ("negative insn length", insn);
3cf2715d
DE
1127#endif
1128 }
1129
1130 /* Now loop over all the insns finding varying length insns. For each,
1131 get the current insn length. If it has changed, reflect the change.
1132 When nothing changes for a full pass, we are done. */
1133
1134 while (something_changed)
1135 {
1136 something_changed = 0;
fc470718 1137 insn_current_align = MAX_CODE_ALIGN - 1;
b816f339 1138 for (insn_current_address = 0, insn = first;
3cf2715d
DE
1139 insn != 0;
1140 insn = NEXT_INSN (insn))
1141 {
1142 int new_length;
b729186a 1143#ifdef ADJUST_INSN_LENGTH
3cf2715d 1144 int tmp_length;
b729186a 1145#endif
fc470718 1146 int length_align;
3cf2715d
DE
1147
1148 uid = INSN_UID (insn);
fc470718 1149
d305ca88 1150 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
fc470718 1151 {
e6de5335 1152 int log = LABEL_TO_ALIGNMENT (label).levels[0].log;
b0fe107e
JM
1153
1154#ifdef CASE_VECTOR_SHORTEN_MODE
1155 /* If the mode of a following jump table was changed, we
1156 may need to update the alignment of this label. */
d305ca88
RS
1157
1158 if (JUMP_TABLES_IN_TEXT_SECTION
1159 || readonly_data_section == text_section)
b0fe107e 1160 {
d305ca88
RS
1161 rtx_jump_table_data *table = jump_table_for_label (label);
1162 if (table)
b0fe107e 1163 {
d305ca88
RS
1164 int newlog = ADDR_VEC_ALIGN (table);
1165 if (newlog != log)
1166 {
1167 log = newlog;
1168 LABEL_TO_ALIGNMENT (insn) = log;
1169 something_changed = 1;
1170 }
b0fe107e
JM
1171 }
1172 }
1173#endif
1174
fc470718
R
1175 if (log > insn_current_align)
1176 {
1177 int align = 1 << log;
ecb06768 1178 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1179 insn_lengths[uid] = new_address - insn_current_address;
1180 insn_current_align = log;
1181 insn_current_address = new_address;
1182 }
1183 else
1184 insn_lengths[uid] = 0;
9d98a694 1185 INSN_ADDRESSES (uid) = insn_current_address;
fc470718
R
1186 continue;
1187 }
1188
1189 length_align = INSN_LENGTH_ALIGNMENT (insn);
1190 if (length_align < insn_current_align)
1191 insn_current_align = length_align;
1192
9d98a694
AO
1193 insn_last_address = INSN_ADDRESSES (uid);
1194 INSN_ADDRESSES (uid) = insn_current_address;
fc470718 1195
5e75ef4a 1196#ifdef CASE_VECTOR_SHORTEN_MODE
34f0d87a
SB
1197 if (optimize
1198 && JUMP_TABLE_DATA_P (insn)
33f7f353
JR
1199 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1200 {
d305ca88 1201 rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn);
33f7f353
JR
1202 rtx body = PATTERN (insn);
1203 int old_length = insn_lengths[uid];
b32d5189
DM
1204 rtx_insn *rel_lab =
1205 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
33f7f353
JR
1206 rtx min_lab = XEXP (XEXP (body, 2), 0);
1207 rtx max_lab = XEXP (XEXP (body, 3), 0);
9d98a694
AO
1208 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1209 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1210 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
b32d5189 1211 rtx_insn *prev;
33f7f353 1212 int rel_align = 0;
950a3816 1213 addr_diff_vec_flags flags;
095a2d76 1214 scalar_int_mode vec_mode;
950a3816
KG
1215
1216 /* Avoid automatic aggregate initialization. */
1217 flags = ADDR_DIFF_VEC_FLAGS (body);
33f7f353
JR
1218
1219 /* Try to find a known alignment for rel_lab. */
1220 for (prev = rel_lab;
1221 prev
1222 && ! insn_lengths[INSN_UID (prev)]
1223 && ! (varying_length[INSN_UID (prev)] & 1);
1224 prev = PREV_INSN (prev))
1225 if (varying_length[INSN_UID (prev)] & 2)
1226 {
e6de5335 1227 rel_align = LABEL_TO_ALIGNMENT (prev).levels[0].log;
33f7f353
JR
1228 break;
1229 }
1230
1231 /* See the comment on addr_diff_vec_flags in rtl.h for the
1232 meaning of the flags values. base: REL_LAB vec: INSN */
1233 /* Anything after INSN has still addresses from the last
1234 pass; adjust these so that they reflect our current
1235 estimate for this pass. */
1236 if (flags.base_after_vec)
1237 rel_addr += insn_current_address - insn_last_address;
1238 if (flags.min_after_vec)
1239 min_addr += insn_current_address - insn_last_address;
1240 if (flags.max_after_vec)
1241 max_addr += insn_current_address - insn_last_address;
1242 /* We want to know the worst case, i.e. lowest possible value
1243 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1244 its offset is positive, and we have to be wary of code shrink;
1245 otherwise, it is negative, and we have to be vary of code
1246 size increase. */
1247 if (flags.min_after_base)
1248 {
1249 /* If INSN is between REL_LAB and MIN_LAB, the size
1250 changes we are about to make can change the alignment
1251 within the observed offset, therefore we have to break
1252 it up into two parts that are independent. */
1253 if (! flags.base_after_vec && flags.min_after_vec)
1254 {
1255 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1256 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1257 }
1258 else
1259 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1260 }
1261 else
1262 {
1263 if (flags.base_after_vec && ! flags.min_after_vec)
1264 {
1265 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1266 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1267 }
1268 else
1269 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1270 }
1271 /* Likewise, determine the highest lowest possible value
1272 for the offset of MAX_LAB. */
1273 if (flags.max_after_base)
1274 {
1275 if (! flags.base_after_vec && flags.max_after_vec)
1276 {
1277 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1278 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1279 }
1280 else
1281 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1282 }
1283 else
1284 {
1285 if (flags.base_after_vec && ! flags.max_after_vec)
1286 {
1287 max_addr += align_fuzz (max_lab, insn, 0, 0);
1288 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1289 }
1290 else
1291 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1292 }
f6df08e6
JR
1293 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1294 max_addr - rel_addr, body);
1295 if (!increasing
1296 || (GET_MODE_SIZE (vec_mode)
d305ca88 1297 >= GET_MODE_SIZE (table->get_data_mode ())))
f6df08e6 1298 PUT_MODE (body, vec_mode);
d6b5193b
RS
1299 if (JUMP_TABLES_IN_TEXT_SECTION
1300 || readonly_data_section == text_section)
75197b37
BS
1301 {
1302 insn_lengths[uid]
d305ca88
RS
1303 = (XVECLEN (body, 1)
1304 * GET_MODE_SIZE (table->get_data_mode ()));
75197b37
BS
1305 insn_current_address += insn_lengths[uid];
1306 if (insn_lengths[uid] != old_length)
1307 something_changed = 1;
1308 }
1309
33f7f353 1310 continue;
33f7f353 1311 }
5e75ef4a
JL
1312#endif /* CASE_VECTOR_SHORTEN_MODE */
1313
1314 if (! (varying_length[uid]))
3cf2715d 1315 {
4b4bf941 1316 if (NONJUMP_INSN_P (insn)
674fc07d
GS
1317 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1318 {
1319 int i;
1320
1321 body = PATTERN (insn);
1322 for (i = 0; i < XVECLEN (body, 0); i++)
1323 {
1324 rtx inner_insn = XVECEXP (body, 0, i);
1325 int inner_uid = INSN_UID (inner_insn);
1326
1327 INSN_ADDRESSES (inner_uid) = insn_current_address;
1328
1329 insn_current_address += insn_lengths[inner_uid];
1330 }
dd3f0101 1331 }
674fc07d
GS
1332 else
1333 insn_current_address += insn_lengths[uid];
1334
3cf2715d
DE
1335 continue;
1336 }
674fc07d 1337
4b4bf941 1338 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3cf2715d 1339 {
84034c69 1340 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
3cf2715d 1341 int i;
f5d927c0 1342
3cf2715d
DE
1343 body = PATTERN (insn);
1344 new_length = 0;
84034c69 1345 for (i = 0; i < seqn->len (); i++)
3cf2715d 1346 {
84034c69 1347 rtx_insn *inner_insn = seqn->insn (i);
3cf2715d
DE
1348 int inner_uid = INSN_UID (inner_insn);
1349 int inner_length;
1350
9d98a694 1351 INSN_ADDRESSES (inner_uid) = insn_current_address;
3cf2715d
DE
1352
1353 /* insn_current_length returns 0 for insns with a
1354 non-varying length. */
1355 if (! varying_length[inner_uid])
1356 inner_length = insn_lengths[inner_uid];
1357 else
1358 inner_length = insn_current_length (inner_insn);
1359
1360 if (inner_length != insn_lengths[inner_uid])
1361 {
f6df08e6
JR
1362 if (!increasing || inner_length > insn_lengths[inner_uid])
1363 {
1364 insn_lengths[inner_uid] = inner_length;
1365 something_changed = 1;
1366 }
1367 else
1368 inner_length = insn_lengths[inner_uid];
3cf2715d 1369 }
f6df08e6 1370 insn_current_address += inner_length;
3cf2715d
DE
1371 new_length += inner_length;
1372 }
1373 }
1374 else
1375 {
1376 new_length = insn_current_length (insn);
1377 insn_current_address += new_length;
1378 }
1379
3cf2715d
DE
1380#ifdef ADJUST_INSN_LENGTH
1381 /* If needed, do any adjustment. */
1382 tmp_length = new_length;
1383 ADJUST_INSN_LENGTH (insn, new_length);
1384 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1385#endif
1386
f6df08e6
JR
1387 if (new_length != insn_lengths[uid]
1388 && (!increasing || new_length > insn_lengths[uid]))
3cf2715d
DE
1389 {
1390 insn_lengths[uid] = new_length;
1391 something_changed = 1;
1392 }
f6df08e6
JR
1393 else
1394 insn_current_address += insn_lengths[uid] - new_length;
3cf2715d 1395 }
bb4aaf18 1396 /* For a non-optimizing compile, do only a single pass. */
f6df08e6 1397 if (!increasing)
bb4aaf18 1398 break;
3cf2715d 1399 }
8cac4d85 1400 crtl->max_insn_address = insn_current_address;
fc470718 1401 free (varying_length);
3cf2715d
DE
1402}
1403
3cf2715d
DE
1404/* Given the body of an INSN known to be generated by an ASM statement, return
1405 the number of machine instructions likely to be generated for this insn.
1406 This is used to compute its length. */
1407
1408static int
6cf9ac28 1409asm_insn_count (rtx body)
3cf2715d 1410{
48c54229 1411 const char *templ;
3cf2715d 1412
5d0930ea 1413 if (GET_CODE (body) == ASM_INPUT)
48c54229 1414 templ = XSTR (body, 0);
5d0930ea 1415 else
48c54229 1416 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
5d0930ea 1417
2bd1d2c8
AP
1418 return asm_str_count (templ);
1419}
2bd1d2c8
AP
1420
1421/* Return the number of machine instructions likely to be generated for the
1422 inline-asm template. */
1423int
1424asm_str_count (const char *templ)
1425{
1426 int count = 1;
b8698a0f 1427
48c54229 1428 if (!*templ)
5bc4fa7c
MS
1429 return 0;
1430
48c54229
KG
1431 for (; *templ; templ++)
1432 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1433 || *templ == '\n')
3cf2715d
DE
1434 count++;
1435
1436 return count;
1437}
3cf2715d 1438\f
725730f2
EB
1439/* Return true if DWARF2 debug info can be emitted for DECL. */
1440
1441static bool
1442dwarf2_debug_info_emitted_p (tree decl)
1443{
1444 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1445 return false;
1446
1447 if (DECL_IGNORED_P (decl))
1448 return false;
1449
1450 return true;
1451}
1452
78bde837
SB
1453/* Return scope resulting from combination of S1 and S2. */
1454static tree
1455choose_inner_scope (tree s1, tree s2)
1456{
1457 if (!s1)
1458 return s2;
1459 if (!s2)
1460 return s1;
1461 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1462 return s1;
1463 return s2;
1464}
1465
1466/* Emit lexical block notes needed to change scope from S1 to S2. */
1467
1468static void
fa7af581 1469change_scope (rtx_insn *orig_insn, tree s1, tree s2)
78bde837 1470{
fa7af581 1471 rtx_insn *insn = orig_insn;
78bde837
SB
1472 tree com = NULL_TREE;
1473 tree ts1 = s1, ts2 = s2;
1474 tree s;
1475
1476 while (ts1 != ts2)
1477 {
1478 gcc_assert (ts1 && ts2);
1479 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1480 ts1 = BLOCK_SUPERCONTEXT (ts1);
1481 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1482 ts2 = BLOCK_SUPERCONTEXT (ts2);
1483 else
1484 {
1485 ts1 = BLOCK_SUPERCONTEXT (ts1);
1486 ts2 = BLOCK_SUPERCONTEXT (ts2);
1487 }
1488 }
1489 com = ts1;
1490
1491 /* Close scopes. */
1492 s = s1;
1493 while (s != com)
1494 {
66e8df53 1495 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
78bde837
SB
1496 NOTE_BLOCK (note) = s;
1497 s = BLOCK_SUPERCONTEXT (s);
1498 }
1499
1500 /* Open scopes. */
1501 s = s2;
1502 while (s != com)
1503 {
1504 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1505 NOTE_BLOCK (insn) = s;
1506 s = BLOCK_SUPERCONTEXT (s);
1507 }
1508}
1509
1510/* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1511 on the scope tree and the newly reordered instructions. */
1512
1513static void
1514reemit_insn_block_notes (void)
1515{
1516 tree cur_block = DECL_INITIAL (cfun->decl);
66e8df53 1517 rtx_insn *insn;
78bde837
SB
1518
1519 insn = get_insns ();
97aba8e9 1520 for (; insn; insn = NEXT_INSN (insn))
78bde837
SB
1521 {
1522 tree this_block;
1523
67598720 1524 /* Prevent lexical blocks from straddling section boundaries. */
96a95ac1
AO
1525 if (NOTE_P (insn))
1526 switch (NOTE_KIND (insn))
1527 {
1528 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1529 {
1530 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1531 s = BLOCK_SUPERCONTEXT (s))
1532 {
1533 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1534 NOTE_BLOCK (note) = s;
1535 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1536 NOTE_BLOCK (note) = s;
1537 }
1538 }
1539 break;
1540
1541 case NOTE_INSN_BEGIN_STMT:
58006663 1542 case NOTE_INSN_INLINE_ENTRY:
96a95ac1
AO
1543 this_block = LOCATION_BLOCK (NOTE_MARKER_LOCATION (insn));
1544 goto set_cur_block_to_this_block;
1545
1546 default:
1547 continue;
1548 }
67598720
TJ
1549
1550 if (!active_insn_p (insn))
1551 continue;
1552
78bde837
SB
1553 /* Avoid putting scope notes between jump table and its label. */
1554 if (JUMP_TABLE_DATA_P (insn))
1555 continue;
1556
1557 this_block = insn_scope (insn);
1558 /* For sequences compute scope resulting from merging all scopes
1559 of instructions nested inside. */
e429a50b 1560 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
78bde837
SB
1561 {
1562 int i;
78bde837
SB
1563
1564 this_block = NULL;
e429a50b 1565 for (i = 0; i < body->len (); i++)
78bde837 1566 this_block = choose_inner_scope (this_block,
e429a50b 1567 insn_scope (body->insn (i)));
78bde837 1568 }
96a95ac1 1569 set_cur_block_to_this_block:
78bde837 1570 if (! this_block)
48866799
DC
1571 {
1572 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1573 continue;
1574 else
1575 this_block = DECL_INITIAL (cfun->decl);
1576 }
78bde837
SB
1577
1578 if (this_block != cur_block)
1579 {
1580 change_scope (insn, cur_block, this_block);
1581 cur_block = this_block;
1582 }
1583 }
1584
1585 /* change_scope emits before the insn, not after. */
96a95ac1 1586 rtx_note *note = emit_note (NOTE_INSN_DELETED);
78bde837
SB
1587 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1588 delete_insn (note);
1589
1590 reorder_blocks ();
1591}
1592
4fbca4ba
RS
1593static const char *some_local_dynamic_name;
1594
1595/* Locate some local-dynamic symbol still in use by this function
1596 so that we can print its name in local-dynamic base patterns.
1597 Return null if there are no local-dynamic references. */
1598
1599const char *
1600get_some_local_dynamic_name ()
1601{
1602 subrtx_iterator::array_type array;
1603 rtx_insn *insn;
1604
1605 if (some_local_dynamic_name)
1606 return some_local_dynamic_name;
1607
1608 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1609 if (NONDEBUG_INSN_P (insn))
1610 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1611 {
1612 const_rtx x = *iter;
1613 if (GET_CODE (x) == SYMBOL_REF)
1614 {
1615 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1616 return some_local_dynamic_name = XSTR (x, 0);
1617 if (CONSTANT_POOL_ADDRESS_P (x))
1618 iter.substitute (get_pool_constant (x));
1619 }
1620 }
1621
1622 return 0;
1623}
1624
bd2b9f1e
AO
1625/* Arrange for us to emit a source location note before any further
1626 real insns or section changes, by setting the SEEN_NEXT_VIEW bit in
1627 *SEEN, as long as we are keeping track of location views. The bit
1628 indicates we have referenced the next view at the current PC, so we
1629 have to emit it. This should be called next to the var_location
1630 debug hook. */
1631
1632static inline void
1633set_next_view_needed (int *seen)
1634{
1635 if (debug_variable_location_views)
1636 *seen |= SEEN_NEXT_VIEW;
1637}
1638
1639/* Clear the flag in *SEEN indicating we need to emit the next view.
1640 This should be called next to the source_line debug hook. */
1641
1642static inline void
1643clear_next_view_needed (int *seen)
1644{
1645 *seen &= ~SEEN_NEXT_VIEW;
1646}
1647
1648/* Test whether we have a pending request to emit the next view in
1649 *SEEN, and emit it if needed, clearing the request bit. */
1650
1651static inline void
1652maybe_output_next_view (int *seen)
1653{
1654 if ((*seen & SEEN_NEXT_VIEW) != 0)
1655 {
1656 clear_next_view_needed (seen);
1657 (*debug_hooks->source_line) (last_linenum, last_columnnum,
1658 last_filename, last_discriminator,
1659 false);
1660 }
1661}
1662
1663/* We want to emit param bindings (before the first begin_stmt) in the
1664 initial view, if we are emitting views. To that end, we may
1665 consume initial notes in the function, processing them in
1666 final_start_function, before signaling the beginning of the
1667 prologue, rather than in final.
1668
1669 We don't test whether the DECLs are PARM_DECLs: the assumption is
1670 that there will be a NOTE_INSN_BEGIN_STMT marker before any
1671 non-parameter NOTE_INSN_VAR_LOCATION. It's ok if the marker is not
1672 there, we'll just have more variable locations bound in the initial
1673 view, which is consistent with their being bound without any code
1674 that would give them a value. */
1675
1676static inline bool
1677in_initial_view_p (rtx_insn *insn)
1678{
1679 return (!DECL_IGNORED_P (current_function_decl)
1680 && debug_variable_location_views
1681 && insn && GET_CODE (insn) == NOTE
1682 && (NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION
1683 || NOTE_KIND (insn) == NOTE_INSN_DELETED));
1684}
1685
3cf2715d
DE
1686/* Output assembler code for the start of a function,
1687 and initialize some of the variables in this file
1688 for the new function. The label for the function and associated
1689 assembler pseudo-ops have already been output in `assemble_start_function'.
1690
1691 FIRST is the first insn of the rtl for the function being compiled.
1692 FILE is the file to write assembler code to.
bd2b9f1e
AO
1693 SEEN should be initially set to zero, and it may be updated to
1694 indicate we have references to the next location view, that would
1695 require us to emit it at the current PC.
46625112 1696 OPTIMIZE_P is nonzero if we should eliminate redundant
3cf2715d
DE
1697 test and compare insns. */
1698
bd2b9f1e
AO
1699static void
1700final_start_function_1 (rtx_insn **firstp, FILE *file, int *seen,
1701 int optimize_p ATTRIBUTE_UNUSED)
3cf2715d
DE
1702{
1703 block_depth = 0;
1704
1705 this_is_asm_operands = 0;
1706
ddd84654
JJ
1707 need_profile_function = false;
1708
5368224f
DC
1709 last_filename = LOCATION_FILE (prologue_location);
1710 last_linenum = LOCATION_LINE (prologue_location);
497b7c47 1711 last_columnnum = LOCATION_COLUMN (prologue_location);
6c52e687 1712 last_discriminator = discriminator = 0;
fa6fd7b7 1713 last_bb_discriminator = bb_discriminator = 0;
9ae130f8 1714
653e276c 1715 high_block_linenum = high_function_linenum = last_linenum;
eac40081 1716
ef1b3fda
KS
1717 if (flag_sanitize & SANITIZE_ADDRESS)
1718 asan_function_start ();
1719
bd2b9f1e
AO
1720 rtx_insn *first = *firstp;
1721 if (in_initial_view_p (first))
1722 {
1723 do
1724 {
1725 final_scan_insn (first, file, 0, 0, seen);
1726 first = NEXT_INSN (first);
1727 }
1728 while (in_initial_view_p (first));
1729 *firstp = first;
1730 }
1731
725730f2 1732 if (!DECL_IGNORED_P (current_function_decl))
bd2b9f1e
AO
1733 debug_hooks->begin_prologue (last_linenum, last_columnnum,
1734 last_filename);
d291dd49 1735
725730f2 1736 if (!dwarf2_debug_info_emitted_p (current_function_decl))
497b7c47 1737 dwarf2out_begin_prologue (0, 0, NULL);
3cf2715d
DE
1738
1739#ifdef LEAF_REG_REMAP
416ff32e 1740 if (crtl->uses_only_leaf_regs)
3cf2715d
DE
1741 leaf_renumber_regs (first);
1742#endif
1743
1744 /* The Sun386i and perhaps other machines don't work right
1745 if the profiling code comes after the prologue. */
3c5273a9 1746 if (targetm.profile_before_prologue () && crtl->profile)
ddd84654 1747 {
e86a9946
RS
1748 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1749 && targetm.have_prologue ())
ddd84654 1750 {
fa7af581 1751 rtx_insn *insn;
ddd84654
JJ
1752 for (insn = first; insn; insn = NEXT_INSN (insn))
1753 if (!NOTE_P (insn))
1754 {
fa7af581 1755 insn = NULL;
ddd84654
JJ
1756 break;
1757 }
1758 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1759 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1760 break;
1761 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1762 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1763 continue;
1764 else
1765 {
fa7af581 1766 insn = NULL;
ddd84654
JJ
1767 break;
1768 }
1769
1770 if (insn)
1771 need_profile_function = true;
1772 else
1773 profile_function (file);
1774 }
1775 else
1776 profile_function (file);
1777 }
3cf2715d 1778
18c038b9
MM
1779 /* If debugging, assign block numbers to all of the blocks in this
1780 function. */
1781 if (write_symbols)
1782 {
0435312e 1783 reemit_insn_block_notes ();
a20612aa 1784 number_blocks (current_function_decl);
18c038b9
MM
1785 /* We never actually put out begin/end notes for the top-level
1786 block in the function. But, conceptually, that block is
1787 always needed. */
1788 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1789 }
1790
00abf86c
MS
1791 unsigned HOST_WIDE_INT min_frame_size
1792 = constant_lower_bound (get_frame_size ());
1793 if (min_frame_size > (unsigned HOST_WIDE_INT) warn_frame_larger_than_size)
f075bd95 1794 {
a214518f
SP
1795 /* Issue a warning */
1796 warning (OPT_Wframe_larger_than_,
00abf86c
MS
1797 "the frame size of %wu bytes is larger than %wu bytes",
1798 min_frame_size, warn_frame_larger_than_size);
f075bd95 1799 }
a214518f 1800
3cf2715d 1801 /* First output the function prologue: code to set up the stack frame. */
42776416 1802 targetm.asm_out.function_prologue (file);
3cf2715d 1803
3cf2715d
DE
1804 /* If the machine represents the prologue as RTL, the profiling code must
1805 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
e86a9946 1806 if (! targetm.have_prologue ())
3cf2715d 1807 profile_after_prologue (file);
3cf2715d
DE
1808}
1809
bd2b9f1e
AO
1810/* This is an exported final_start_function_1, callable without SEEN. */
1811
1812void
1813final_start_function (rtx_insn *first, FILE *file,
1814 int optimize_p ATTRIBUTE_UNUSED)
1815{
1816 int seen = 0;
1817 final_start_function_1 (&first, file, &seen, optimize_p);
1818 gcc_assert (seen == 0);
1819}
1820
3cf2715d 1821static void
6cf9ac28 1822profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
3cf2715d 1823{
3c5273a9 1824 if (!targetm.profile_before_prologue () && crtl->profile)
3cf2715d 1825 profile_function (file);
3cf2715d
DE
1826}
1827
1828static void
6cf9ac28 1829profile_function (FILE *file ATTRIBUTE_UNUSED)
3cf2715d 1830{
dcacfa04 1831#ifndef NO_PROFILE_COUNTERS
9739c90c 1832# define NO_PROFILE_COUNTERS 0
dcacfa04 1833#endif
531ca746
RH
1834#ifdef ASM_OUTPUT_REG_PUSH
1835 rtx sval = NULL, chain = NULL;
1836
1837 if (cfun->returns_struct)
1838 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1839 true);
1840 if (cfun->static_chain_decl)
1841 chain = targetm.calls.static_chain (current_function_decl, true);
b729186a 1842#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d 1843
9739c90c
JJ
1844 if (! NO_PROFILE_COUNTERS)
1845 {
1846 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
d6b5193b 1847 switch_to_section (data_section);
9739c90c 1848 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
5fd9b178 1849 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
9739c90c
JJ
1850 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1851 }
3cf2715d 1852
d6b5193b 1853 switch_to_section (current_function_section ());
3cf2715d 1854
531ca746
RH
1855#ifdef ASM_OUTPUT_REG_PUSH
1856 if (sval && REG_P (sval))
1857 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1858 if (chain && REG_P (chain))
1859 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
3cf2715d 1860#endif
3cf2715d 1861
df696a75 1862 FUNCTION_PROFILER (file, current_function_funcdef_no);
3cf2715d 1863
531ca746
RH
1864#ifdef ASM_OUTPUT_REG_PUSH
1865 if (chain && REG_P (chain))
1866 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1867 if (sval && REG_P (sval))
1868 ASM_OUTPUT_REG_POP (file, REGNO (sval));
3cf2715d
DE
1869#endif
1870}
1871
1872/* Output assembler code for the end of a function.
1873 For clarity, args are same as those of `final_start_function'
1874 even though not all of them are needed. */
1875
1876void
6cf9ac28 1877final_end_function (void)
3cf2715d 1878{
be1bb652 1879 app_disable ();
3cf2715d 1880
725730f2
EB
1881 if (!DECL_IGNORED_P (current_function_decl))
1882 debug_hooks->end_function (high_function_linenum);
3cf2715d 1883
3cf2715d
DE
1884 /* Finally, output the function epilogue:
1885 code to restore the stack frame and return to the caller. */
42776416 1886 targetm.asm_out.function_epilogue (asm_out_file);
3cf2715d 1887
e2a12aca 1888 /* And debug output. */
725730f2
EB
1889 if (!DECL_IGNORED_P (current_function_decl))
1890 debug_hooks->end_epilogue (last_linenum, last_filename);
3cf2715d 1891
725730f2 1892 if (!dwarf2_debug_info_emitted_p (current_function_decl)
7a0c8d71 1893 && dwarf2out_do_frame ())
702ada3d 1894 dwarf2out_end_epilogue (last_linenum, last_filename);
4fbca4ba
RS
1895
1896 some_local_dynamic_name = 0;
3cf2715d
DE
1897}
1898\f
6a801cf2
XDL
1899
1900/* Dumper helper for basic block information. FILE is the assembly
1901 output file, and INSN is the instruction being emitted. */
1902
1903static void
fa7af581 1904dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
6a801cf2
XDL
1905 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1906{
1907 basic_block bb;
1908
1909 if (!flag_debug_asm)
1910 return;
1911
1912 if (INSN_UID (insn) < bb_map_size
1913 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1914 {
1915 edge e;
1916 edge_iterator ei;
1917
1c13f168 1918 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
3995f3a2
JH
1919 if (bb->count.initialized_p ())
1920 {
1921 fprintf (file, ", count:");
1922 bb->count.dump (file);
1923 }
6a801cf2 1924 fprintf (file, " seq:%d", (*bb_seqn)++);
1c13f168 1925 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
6a801cf2
XDL
1926 FOR_EACH_EDGE (e, ei, bb->preds)
1927 {
a315c44c 1928 dump_edge_info (file, e, TDF_DETAILS, 0);
6a801cf2
XDL
1929 }
1930 fprintf (file, "\n");
1931 }
1932 if (INSN_UID (insn) < bb_map_size
1933 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1934 {
1935 edge e;
1936 edge_iterator ei;
1937
1c13f168 1938 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
6a801cf2
XDL
1939 FOR_EACH_EDGE (e, ei, bb->succs)
1940 {
a315c44c 1941 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
6a801cf2
XDL
1942 }
1943 fprintf (file, "\n");
1944 }
1945}
1946
3cf2715d 1947/* Output assembler code for some insns: all or part of a function.
c9d691e9 1948 For description of args, see `final_start_function', above. */
3cf2715d 1949
bd2b9f1e
AO
1950static void
1951final_1 (rtx_insn *first, FILE *file, int seen, int optimize_p)
3cf2715d 1952{
fa7af581 1953 rtx_insn *insn, *next;
3cf2715d 1954
6a801cf2
XDL
1955 /* Used for -dA dump. */
1956 basic_block *start_to_bb = NULL;
1957 basic_block *end_to_bb = NULL;
1958 int bb_map_size = 0;
1959 int bb_seqn = 0;
1960
3cf2715d 1961 last_ignored_compare = 0;
3cf2715d 1962
618f4073
TS
1963 if (HAVE_cc0)
1964 for (insn = first; insn; insn = NEXT_INSN (insn))
1965 {
1966 /* If CC tracking across branches is enabled, record the insn which
1967 jumps to each branch only reached from one place. */
1968 if (optimize_p && JUMP_P (insn))
1969 {
1970 rtx lab = JUMP_LABEL (insn);
1971 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1972 {
1973 LABEL_REFS (lab) = insn;
1974 }
1975 }
1976 }
a8c3510c 1977
3cf2715d
DE
1978 init_recog ();
1979
1980 CC_STATUS_INIT;
1981
6a801cf2
XDL
1982 if (flag_debug_asm)
1983 {
1984 basic_block bb;
1985
1986 bb_map_size = get_max_uid () + 1;
1987 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1988 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1989
292ffe86
CC
1990 /* There is no cfg for a thunk. */
1991 if (!cfun->is_thunk)
4f42035e 1992 FOR_EACH_BB_REVERSE_FN (bb, cfun)
292ffe86
CC
1993 {
1994 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1995 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1996 }
6a801cf2
XDL
1997 }
1998
3cf2715d 1999 /* Output the insns. */
9ff57809 2000 for (insn = first; insn;)
2f16edb1 2001 {
d327457f 2002 if (HAVE_ATTR_length)
0ac76ad9 2003 {
d327457f
JR
2004 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2005 {
2006 /* This can be triggered by bugs elsewhere in the compiler if
2007 new insns are created after init_insn_lengths is called. */
2008 gcc_assert (NOTE_P (insn));
2009 insn_current_address = -1;
2010 }
2011 else
2012 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
02149a78
RS
2013 /* final can be seen as an iteration of shorten_branches that
2014 does nothing (since a fixed point has already been reached). */
2015 insn_last_address = insn_current_address;
0ac76ad9 2016 }
0ac76ad9 2017
6a801cf2
XDL
2018 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2019 bb_map_size, &bb_seqn);
46625112 2020 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2f16edb1 2021 }
6a801cf2 2022
bd2b9f1e
AO
2023 maybe_output_next_view (&seen);
2024
6a801cf2
XDL
2025 if (flag_debug_asm)
2026 {
2027 free (start_to_bb);
2028 free (end_to_bb);
2029 }
bc5612ed
BS
2030
2031 /* Remove CFI notes, to avoid compare-debug failures. */
2032 for (insn = first; insn; insn = next)
2033 {
2034 next = NEXT_INSN (insn);
2035 if (NOTE_P (insn)
2036 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2037 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2038 delete_insn (insn);
2039 }
3cf2715d 2040}
bd2b9f1e
AO
2041
2042/* This is an exported final_1, callable without SEEN. */
2043
2044void
2045final (rtx_insn *first, FILE *file, int optimize_p)
2046{
2047 /* Those that use the internal final_start_function_1/final_1 API
2048 skip initial debug bind notes in final_start_function_1, and pass
2049 the modified FIRST to final_1. But those that use the public
2050 final_start_function/final APIs, final_start_function can't move
2051 FIRST because it's not passed by reference, so if they were
2052 skipped there, skip them again here. */
2053 while (in_initial_view_p (first))
2054 first = NEXT_INSN (first);
2055
2056 final_1 (first, file, 0, optimize_p);
2057}
3cf2715d 2058\f
4bbf910e 2059const char *
df0b55f0 2060get_insn_template (int code, rtx_insn *insn)
4bbf910e 2061{
4bbf910e
RH
2062 switch (insn_data[code].output_format)
2063 {
2064 case INSN_OUTPUT_FORMAT_SINGLE:
3897f229 2065 return insn_data[code].output.single;
4bbf910e 2066 case INSN_OUTPUT_FORMAT_MULTI:
3897f229 2067 return insn_data[code].output.multi[which_alternative];
4bbf910e 2068 case INSN_OUTPUT_FORMAT_FUNCTION:
0bccc606 2069 gcc_assert (insn);
df0b55f0 2070 return (*insn_data[code].output.function) (recog_data.operand, insn);
4bbf910e
RH
2071
2072 default:
0bccc606 2073 gcc_unreachable ();
4bbf910e
RH
2074 }
2075}
f5d927c0 2076
0dc36574
ZW
2077/* Emit the appropriate declaration for an alternate-entry-point
2078 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2079 LABEL_KIND != LABEL_NORMAL.
2080
2081 The case fall-through in this function is intentional. */
2082static void
fa7af581 2083output_alternate_entry_point (FILE *file, rtx_insn *insn)
0dc36574
ZW
2084{
2085 const char *name = LABEL_NAME (insn);
2086
2087 switch (LABEL_KIND (insn))
2088 {
2089 case LABEL_WEAK_ENTRY:
2090#ifdef ASM_WEAKEN_LABEL
2091 ASM_WEAKEN_LABEL (file, name);
81fea426 2092 gcc_fallthrough ();
0dc36574
ZW
2093#endif
2094 case LABEL_GLOBAL_ENTRY:
5fd9b178 2095 targetm.asm_out.globalize_label (file, name);
81fea426 2096 gcc_fallthrough ();
0dc36574 2097 case LABEL_STATIC_ENTRY:
905173eb
ZW
2098#ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2099 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2100#endif
0dc36574
ZW
2101 ASM_OUTPUT_LABEL (file, name);
2102 break;
2103
2104 case LABEL_NORMAL:
2105 default:
0bccc606 2106 gcc_unreachable ();
0dc36574
ZW
2107 }
2108}
2109
f410e1b3
RAE
2110/* Given a CALL_INSN, find and return the nested CALL. */
2111static rtx
fa7af581 2112call_from_call_insn (rtx_call_insn *insn)
f410e1b3
RAE
2113{
2114 rtx x;
2115 gcc_assert (CALL_P (insn));
2116 x = PATTERN (insn);
2117
2118 while (GET_CODE (x) != CALL)
2119 {
2120 switch (GET_CODE (x))
2121 {
2122 default:
2123 gcc_unreachable ();
b8c71e40
RAE
2124 case COND_EXEC:
2125 x = COND_EXEC_CODE (x);
2126 break;
f410e1b3
RAE
2127 case PARALLEL:
2128 x = XVECEXP (x, 0, 0);
2129 break;
2130 case SET:
2131 x = XEXP (x, 1);
2132 break;
2133 }
2134 }
2135 return x;
2136}
2137
82f72146
DM
2138/* Print a comment into the asm showing FILENAME, LINENUM, and the
2139 corresponding source line, if available. */
2140
2141static void
2142asm_show_source (const char *filename, int linenum)
2143{
2144 if (!filename)
2145 return;
2146
7761dfbe 2147 char_span line = location_get_source_line (filename, linenum);
82f72146
DM
2148 if (!line)
2149 return;
2150
2151 fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum);
7761dfbe
DM
2152 /* "line" is not 0-terminated, so we must use its length. */
2153 fwrite (line.get_buffer (), 1, line.length (), asm_out_file);
82f72146
DM
2154 fputc ('\n', asm_out_file);
2155}
2156
3cf2715d
DE
2157/* The final scan for one insn, INSN.
2158 Args are same as in `final', except that INSN
2159 is the insn being scanned.
2160 Value returned is the next insn to be scanned.
2161
ff8cea7e
EB
2162 NOPEEPHOLES is the flag to disallow peephole processing (currently
2163 used for within delayed branch sequence output).
3cf2715d 2164
589fe865
DJ
2165 SEEN is used to track the end of the prologue, for emitting
2166 debug information. We force the emission of a line note after
70aacc97 2167 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
589fe865 2168
e094c0bf
AO
2169static rtx_insn *
2170final_scan_insn_1 (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2171 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
3cf2715d 2172{
f1e52ed6 2173#if HAVE_cc0
90ca38bb
MM
2174 rtx set;
2175#endif
fa7af581 2176 rtx_insn *next;
d305ca88 2177 rtx_jump_table_data *table;
fa7af581 2178
3cf2715d
DE
2179 insn_counter++;
2180
2181 /* Ignore deleted insns. These can occur when we split insns (due to a
2182 template of "#") while not optimizing. */
4654c0cf 2183 if (insn->deleted ())
3cf2715d
DE
2184 return NEXT_INSN (insn);
2185
2186 switch (GET_CODE (insn))
2187 {
2188 case NOTE:
a38e7aa5 2189 switch (NOTE_KIND (insn))
be1bb652
RH
2190 {
2191 case NOTE_INSN_DELETED:
d33606c3 2192 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
be1bb652 2193 break;
3cf2715d 2194
87c8b4be 2195 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
bd2b9f1e
AO
2196 maybe_output_next_view (seen);
2197
b78b513e
EB
2198 output_function_exception_table (0);
2199
2200 if (targetm.asm_out.unwind_emit)
2201 targetm.asm_out.unwind_emit (asm_out_file, insn);
2202
c543ca49 2203 in_cold_section_p = !in_cold_section_p;
f0a0390e 2204
b8cb3096
JJ
2205 if (in_cold_section_p)
2206 cold_function_name
2207 = clone_function_name (current_function_decl, "cold");
2208
a4b6974e 2209 if (dwarf2out_do_frame ())
b8cb3096
JJ
2210 {
2211 dwarf2out_switch_text_section ();
2212 if (!dwarf2_debug_info_emitted_p (current_function_decl)
2213 && !DECL_IGNORED_P (current_function_decl))
2214 debug_hooks->switch_text_section ();
2215 }
f0a0390e 2216 else if (!DECL_IGNORED_P (current_function_decl))
725730f2 2217 debug_hooks->switch_text_section ();
a4b6974e 2218
c543ca49 2219 switch_to_section (current_function_section ());
14d11d40
IS
2220 targetm.asm_out.function_switched_text_sections (asm_out_file,
2221 current_function_decl,
2222 in_cold_section_p);
2ae367c1
ST
2223 /* Emit a label for the split cold section. Form label name by
2224 suffixing "cold" to the original function's name. */
2225 if (in_cold_section_p)
2226 {
11c3d071
CT
2227#ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2228 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2229 IDENTIFIER_POINTER
2230 (cold_function_name),
2231 current_function_decl);
16d710b1 2232#else
2ae367c1
ST
2233 ASM_OUTPUT_LABEL (asm_out_file,
2234 IDENTIFIER_POINTER (cold_function_name));
16d710b1 2235#endif
333a29f9
IS
2236 if (dwarf2out_do_frame ()
2237 && cfun->fde->dw_fde_second_begin != NULL)
2238 ASM_OUTPUT_LABEL (asm_out_file, cfun->fde->dw_fde_second_begin);
2ae367c1 2239 }
750054a2 2240 break;
b0efb46b 2241
be1bb652 2242 case NOTE_INSN_BASIC_BLOCK:
ddd84654
JJ
2243 if (need_profile_function)
2244 {
2245 profile_function (asm_out_file);
2246 need_profile_function = false;
2247 }
2248
2784ed9c
KT
2249 if (targetm.asm_out.unwind_emit)
2250 targetm.asm_out.unwind_emit (asm_out_file, insn);
951120ea 2251
fa6fd7b7 2252 bb_discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
be1bb652 2253 break;
3cf2715d 2254
be1bb652 2255 case NOTE_INSN_EH_REGION_BEG:
52a11cbf
RH
2256 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2257 NOTE_EH_HANDLER (insn));
3d195391 2258 break;
3d195391 2259
be1bb652 2260 case NOTE_INSN_EH_REGION_END:
52a11cbf
RH
2261 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2262 NOTE_EH_HANDLER (insn));
3d195391 2263 break;
3d195391 2264
be1bb652 2265 case NOTE_INSN_PROLOGUE_END:
5fd9b178 2266 targetm.asm_out.function_end_prologue (file);
3cf2715d 2267 profile_after_prologue (file);
589fe865
DJ
2268
2269 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2270 {
2271 *seen |= SEEN_EMITTED;
b8176fe4 2272 force_source_line = true;
589fe865
DJ
2273 }
2274 else
2275 *seen |= SEEN_NOTE;
2276
3cf2715d 2277 break;
3cf2715d 2278
be1bb652 2279 case NOTE_INSN_EPILOGUE_BEG:
bc45e4ba
TG
2280 if (!DECL_IGNORED_P (current_function_decl))
2281 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
5fd9b178 2282 targetm.asm_out.function_begin_epilogue (file);
be1bb652 2283 break;
3cf2715d 2284
bc5612ed
BS
2285 case NOTE_INSN_CFI:
2286 dwarf2out_emit_cfi (NOTE_CFI (insn));
2287 break;
2288
2289 case NOTE_INSN_CFI_LABEL:
2290 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2291 NOTE_LABEL_NUMBER (insn));
cd9c1ca8
RH
2292 break;
2293
be1bb652 2294 case NOTE_INSN_FUNCTION_BEG:
ddd84654
JJ
2295 if (need_profile_function)
2296 {
2297 profile_function (asm_out_file);
2298 need_profile_function = false;
2299 }
2300
653e276c 2301 app_disable ();
725730f2
EB
2302 if (!DECL_IGNORED_P (current_function_decl))
2303 debug_hooks->end_prologue (last_linenum, last_filename);
589fe865
DJ
2304
2305 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2306 {
2307 *seen |= SEEN_EMITTED;
b8176fe4 2308 force_source_line = true;
589fe865
DJ
2309 }
2310 else
2311 *seen |= SEEN_NOTE;
2312
3cf2715d 2313 break;
be1bb652
RH
2314
2315 case NOTE_INSN_BLOCK_BEG:
2316 if (debug_info_level == DINFO_LEVEL_NORMAL
3cf2715d 2317 || debug_info_level == DINFO_LEVEL_VERBOSE
7a0c8d71
DR
2318 || write_symbols == DWARF2_DEBUG
2319 || write_symbols == VMS_AND_DWARF2_DEBUG
2320 || write_symbols == VMS_DEBUG)
be1bb652
RH
2321 {
2322 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2323
be1bb652
RH
2324 app_disable ();
2325 ++block_depth;
2326 high_block_linenum = last_linenum;
eac40081 2327
a5a42b92 2328 /* Output debugging info about the symbol-block beginning. */
725730f2
EB
2329 if (!DECL_IGNORED_P (current_function_decl))
2330 debug_hooks->begin_block (last_linenum, n);
3cf2715d 2331
be1bb652
RH
2332 /* Mark this block as output. */
2333 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
aaec3d85 2334 BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p;
be1bb652 2335 }
180295ed 2336 if (write_symbols == DBX_DEBUG)
d752cfdb
JJ
2337 {
2338 location_t *locus_ptr
2339 = block_nonartificial_location (NOTE_BLOCK (insn));
2340
2341 if (locus_ptr != NULL)
2342 {
2343 override_filename = LOCATION_FILE (*locus_ptr);
2344 override_linenum = LOCATION_LINE (*locus_ptr);
497b7c47 2345 override_columnnum = LOCATION_COLUMN (*locus_ptr);
6bdb055e 2346 override_discriminator = compute_discriminator (*locus_ptr);
d752cfdb
JJ
2347 }
2348 }
be1bb652 2349 break;
18c038b9 2350
be1bb652 2351 case NOTE_INSN_BLOCK_END:
bd2b9f1e
AO
2352 maybe_output_next_view (seen);
2353
be1bb652
RH
2354 if (debug_info_level == DINFO_LEVEL_NORMAL
2355 || debug_info_level == DINFO_LEVEL_VERBOSE
7a0c8d71
DR
2356 || write_symbols == DWARF2_DEBUG
2357 || write_symbols == VMS_AND_DWARF2_DEBUG
2358 || write_symbols == VMS_DEBUG)
be1bb652
RH
2359 {
2360 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2361
be1bb652
RH
2362 app_disable ();
2363
2364 /* End of a symbol-block. */
2365 --block_depth;
0bccc606 2366 gcc_assert (block_depth >= 0);
3cf2715d 2367
725730f2
EB
2368 if (!DECL_IGNORED_P (current_function_decl))
2369 debug_hooks->end_block (high_block_linenum, n);
aaec3d85
JJ
2370 gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn))
2371 == in_cold_section_p);
be1bb652 2372 }
180295ed 2373 if (write_symbols == DBX_DEBUG)
d752cfdb
JJ
2374 {
2375 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2376 location_t *locus_ptr
2377 = block_nonartificial_location (outer_block);
2378
2379 if (locus_ptr != NULL)
2380 {
2381 override_filename = LOCATION_FILE (*locus_ptr);
2382 override_linenum = LOCATION_LINE (*locus_ptr);
497b7c47 2383 override_columnnum = LOCATION_COLUMN (*locus_ptr);
6bdb055e 2384 override_discriminator = compute_discriminator (*locus_ptr);
d752cfdb
JJ
2385 }
2386 else
2387 {
2388 override_filename = NULL;
2389 override_linenum = 0;
497b7c47 2390 override_columnnum = 0;
6bdb055e 2391 override_discriminator = 0;
d752cfdb
JJ
2392 }
2393 }
be1bb652
RH
2394 break;
2395
2396 case NOTE_INSN_DELETED_LABEL:
2397 /* Emit the label. We may have deleted the CODE_LABEL because
2398 the label could be proved to be unreachable, though still
2399 referenced (in the form of having its address taken. */
8215347e 2400 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
be1bb652 2401 break;
3cf2715d 2402
5619e52c
JJ
2403 case NOTE_INSN_DELETED_DEBUG_LABEL:
2404 /* Similarly, but need to use different namespace for it. */
2405 if (CODE_LABEL_NUMBER (insn) != -1)
2406 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2407 break;
2408
014a1138 2409 case NOTE_INSN_VAR_LOCATION:
725730f2 2410 if (!DECL_IGNORED_P (current_function_decl))
bd2b9f1e
AO
2411 {
2412 debug_hooks->var_location (insn);
2413 set_next_view_needed (seen);
2414 }
014a1138
JZ
2415 break;
2416
96a95ac1
AO
2417 case NOTE_INSN_BEGIN_STMT:
2418 gcc_checking_assert (cfun->debug_nonbind_markers);
2419 if (!DECL_IGNORED_P (current_function_decl)
2420 && notice_source_line (insn, NULL))
2421 {
58006663 2422 output_source_line:
96a95ac1
AO
2423 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2424 last_filename, last_discriminator,
2425 true);
bd2b9f1e 2426 clear_next_view_needed (seen);
96a95ac1
AO
2427 }
2428 break;
2429
58006663
AO
2430 case NOTE_INSN_INLINE_ENTRY:
2431 gcc_checking_assert (cfun->debug_nonbind_markers);
dd9bf787
EB
2432 if (!DECL_IGNORED_P (current_function_decl)
2433 && notice_source_line (insn, NULL))
58006663 2434 {
58006663
AO
2435 (*debug_hooks->inline_entry) (LOCATION_BLOCK
2436 (NOTE_MARKER_LOCATION (insn)));
2437 goto output_source_line;
2438 }
2439 break;
2440
be1bb652 2441 default:
a38e7aa5 2442 gcc_unreachable ();
f5d927c0 2443 break;
3cf2715d
DE
2444 }
2445 break;
2446
2447 case BARRIER:
3cf2715d
DE
2448 break;
2449
2450 case CODE_LABEL:
1dd8faa8
R
2451 /* The target port might emit labels in the output function for
2452 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2453 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2454 {
e6de5335
ML
2455 align_flags alignment = LABEL_TO_ALIGNMENT (insn);
2456 if (alignment.levels[0].log && NEXT_INSN (insn))
40cdfca6 2457 {
9e423e6d 2458#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
e6de5335
ML
2459 /* Output both primary and secondary alignment. */
2460 ASM_OUTPUT_MAX_SKIP_ALIGN (file, alignment.levels[0].log,
2461 alignment.levels[0].maxskip);
2462 ASM_OUTPUT_MAX_SKIP_ALIGN (file, alignment.levels[1].log,
2463 alignment.levels[1].maxskip);
8e16ab99
SF
2464#else
2465#ifdef ASM_OUTPUT_ALIGN_WITH_NOP
e6de5335 2466 ASM_OUTPUT_ALIGN_WITH_NOP (file, alignment.levels[0].log);
9e423e6d 2467#else
e6de5335 2468 ASM_OUTPUT_ALIGN (file, alignment.levels[0].log);
8e16ab99 2469#endif
9e423e6d 2470#endif
40cdfca6 2471 }
de7987a6 2472 }
3cf2715d 2473 CC_STATUS_INIT;
03ffa171 2474
725730f2 2475 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
f630fc6a 2476 debug_hooks->label (as_a <rtx_code_label *> (insn));
e1772ac0 2477
bad4f40b 2478 app_disable ();
b2a6a2fb 2479
0676c393
MM
2480 /* If this label is followed by a jump-table, make sure we put
2481 the label in the read-only section. Also possibly write the
2482 label and jump table together. */
d305ca88
RS
2483 table = jump_table_for_label (as_a <rtx_code_label *> (insn));
2484 if (table)
3cf2715d 2485 {
e0d80184 2486#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
0676c393
MM
2487 /* In this case, the case vector is being moved by the
2488 target, so don't output the label at all. Leave that
2489 to the back end macros. */
e0d80184 2490#else
0676c393
MM
2491 if (! JUMP_TABLES_IN_TEXT_SECTION)
2492 {
2493 int log_align;
340f7e7c 2494
0676c393
MM
2495 switch_to_section (targetm.asm_out.function_rodata_section
2496 (current_function_decl));
340f7e7c
RH
2497
2498#ifdef ADDR_VEC_ALIGN
d305ca88 2499 log_align = ADDR_VEC_ALIGN (table);
340f7e7c 2500#else
0676c393 2501 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
340f7e7c 2502#endif
0676c393
MM
2503 ASM_OUTPUT_ALIGN (file, log_align);
2504 }
2505 else
2506 switch_to_section (current_function_section ());
75197b37 2507
3cf2715d 2508#ifdef ASM_OUTPUT_CASE_LABEL
d305ca88 2509 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table);
3cf2715d 2510#else
0676c393 2511 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
e0d80184 2512#endif
3cf2715d 2513#endif
0676c393 2514 break;
3cf2715d 2515 }
0dc36574
ZW
2516 if (LABEL_ALT_ENTRY_P (insn))
2517 output_alternate_entry_point (file, insn);
8cd0faaf 2518 else
5fd9b178 2519 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
3cf2715d
DE
2520 break;
2521
2522 default:
2523 {
b3694847 2524 rtx body = PATTERN (insn);
3cf2715d 2525 int insn_code_number;
48c54229 2526 const char *templ;
96a95ac1
AO
2527 bool is_stmt, *is_stmt_p;
2528
2529 if (MAY_HAVE_DEBUG_MARKER_INSNS && cfun->debug_nonbind_markers)
2530 {
2531 is_stmt = false;
2532 is_stmt_p = NULL;
2533 }
2534 else
2535 is_stmt_p = &is_stmt;
3cf2715d 2536
9a1a4737
PB
2537 /* Reset this early so it is correct for ASM statements. */
2538 current_insn_predicate = NULL_RTX;
2929029c 2539
3cf2715d
DE
2540 /* An INSN, JUMP_INSN or CALL_INSN.
2541 First check for special kinds that recog doesn't recognize. */
2542
6614fd40 2543 if (GET_CODE (body) == USE /* These are just declarations. */
3cf2715d
DE
2544 || GET_CODE (body) == CLOBBER)
2545 break;
2546
f1e52ed6 2547#if HAVE_cc0
4928181c
SB
2548 {
2549 /* If there is a REG_CC_SETTER note on this insn, it means that
2550 the setting of the condition code was done in the delay slot
2551 of the insn that branched here. So recover the cc status
2552 from the insn that set it. */
3cf2715d 2553
4928181c
SB
2554 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2555 if (note)
2556 {
647d790d
DM
2557 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2558 NOTICE_UPDATE_CC (PATTERN (other), other);
4928181c
SB
2559 cc_prev_status = cc_status;
2560 }
2561 }
3cf2715d
DE
2562#endif
2563
2564 /* Detect insns that are really jump-tables
2565 and output them as such. */
2566
34f0d87a 2567 if (JUMP_TABLE_DATA_P (insn))
3cf2715d 2568 {
7f7f8214 2569#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
b3694847 2570 int vlen, idx;
7f7f8214 2571#endif
3cf2715d 2572
b2a6a2fb 2573 if (! JUMP_TABLES_IN_TEXT_SECTION)
d6b5193b
RS
2574 switch_to_section (targetm.asm_out.function_rodata_section
2575 (current_function_decl));
b2a6a2fb 2576 else
d6b5193b 2577 switch_to_section (current_function_section ());
b2a6a2fb 2578
bad4f40b 2579 app_disable ();
3cf2715d 2580
e0d80184
DM
2581#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2582 if (GET_CODE (body) == ADDR_VEC)
2583 {
2584#ifdef ASM_OUTPUT_ADDR_VEC
2585 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2586#else
0bccc606 2587 gcc_unreachable ();
e0d80184
DM
2588#endif
2589 }
2590 else
2591 {
2592#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2593 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2594#else
0bccc606 2595 gcc_unreachable ();
e0d80184
DM
2596#endif
2597 }
2598#else
3cf2715d
DE
2599 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2600 for (idx = 0; idx < vlen; idx++)
2601 {
2602 if (GET_CODE (body) == ADDR_VEC)
2603 {
2604#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2605 ASM_OUTPUT_ADDR_VEC_ELT
2606 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2607#else
0bccc606 2608 gcc_unreachable ();
3cf2715d
DE
2609#endif
2610 }
2611 else
2612 {
2613#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2614 ASM_OUTPUT_ADDR_DIFF_ELT
2615 (file,
33f7f353 2616 body,
3cf2715d
DE
2617 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2618 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2619#else
0bccc606 2620 gcc_unreachable ();
3cf2715d
DE
2621#endif
2622 }
2623 }
2624#ifdef ASM_OUTPUT_CASE_END
2625 ASM_OUTPUT_CASE_END (file,
2626 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2627 insn);
e0d80184 2628#endif
3cf2715d
DE
2629#endif
2630
d6b5193b 2631 switch_to_section (current_function_section ());
3cf2715d 2632
bd2b9f1e
AO
2633 if (debug_variable_location_views
2634 && !DECL_IGNORED_P (current_function_decl))
2635 debug_hooks->var_location (insn);
2636
3cf2715d
DE
2637 break;
2638 }
0435312e
JH
2639 /* Output this line note if it is the first or the last line
2640 note in a row. */
725730f2 2641 if (!DECL_IGNORED_P (current_function_decl)
96a95ac1 2642 && notice_source_line (insn, is_stmt_p))
82f72146
DM
2643 {
2644 if (flag_verbose_asm)
2645 asm_show_source (last_filename, last_linenum);
497b7c47
JJ
2646 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2647 last_filename, last_discriminator,
2648 is_stmt);
bd2b9f1e 2649 clear_next_view_needed (seen);
82f72146 2650 }
bd2b9f1e
AO
2651 else
2652 maybe_output_next_view (seen);
2653
2654 gcc_checking_assert (!DEBUG_INSN_P (insn));
3cf2715d 2655
93671519
BE
2656 if (GET_CODE (body) == PARALLEL
2657 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
2658 body = XVECEXP (body, 0, 0);
2659
3cf2715d
DE
2660 if (GET_CODE (body) == ASM_INPUT)
2661 {
36d7136e
RH
2662 const char *string = XSTR (body, 0);
2663
3cf2715d
DE
2664 /* There's no telling what that did to the condition codes. */
2665 CC_STATUS_INIT;
36d7136e
RH
2666
2667 if (string[0])
3cf2715d 2668 {
5ffeb913 2669 expanded_location loc;
bff4b63d 2670
3a694d86 2671 app_enable ();
5ffeb913 2672 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
0de2ae02 2673 if (*loc.file && loc.line)
bff4b63d
AO
2674 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2675 ASM_COMMENT_START, loc.line, loc.file);
36d7136e 2676 fprintf (asm_out_file, "\t%s\n", string);
03943c05
AO
2677#if HAVE_AS_LINE_ZERO
2678 if (*loc.file && loc.line)
bff4b63d 2679 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
03943c05 2680#endif
3cf2715d 2681 }
3cf2715d
DE
2682 break;
2683 }
2684
2685 /* Detect `asm' construct with operands. */
2686 if (asm_noperands (body) >= 0)
2687 {
22bf4422 2688 unsigned int noperands = asm_noperands (body);
1b4572a8 2689 rtx *ops = XALLOCAVEC (rtx, noperands);
3cce094d 2690 const char *string;
bff4b63d 2691 location_t loc;
5ffeb913 2692 expanded_location expanded;
3cf2715d
DE
2693
2694 /* There's no telling what that did to the condition codes. */
2695 CC_STATUS_INIT;
3cf2715d 2696
3cf2715d 2697 /* Get out the operand values. */
bff4b63d 2698 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
41129be2 2699 /* Inhibit dying on what would otherwise be compiler bugs. */
3cf2715d
DE
2700 insn_noperands = noperands;
2701 this_is_asm_operands = insn;
5ffeb913 2702 expanded = expand_location (loc);
3cf2715d 2703
ad7e39ca
AO
2704#ifdef FINAL_PRESCAN_INSN
2705 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2706#endif
2707
3cf2715d 2708 /* Output the insn using them. */
36d7136e
RH
2709 if (string[0])
2710 {
3a694d86 2711 app_enable ();
5ffeb913 2712 if (expanded.file && expanded.line)
bff4b63d 2713 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
5ffeb913 2714 ASM_COMMENT_START, expanded.line, expanded.file);
36d7136e 2715 output_asm_insn (string, ops);
03943c05 2716#if HAVE_AS_LINE_ZERO
5ffeb913 2717 if (expanded.file && expanded.line)
bff4b63d 2718 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
03943c05 2719#endif
36d7136e
RH
2720 }
2721
1afc5373
CF
2722 if (targetm.asm_out.final_postscan_insn)
2723 targetm.asm_out.final_postscan_insn (file, insn, ops,
2724 insn_noperands);
2725
3cf2715d
DE
2726 this_is_asm_operands = 0;
2727 break;
2728 }
2729
bad4f40b 2730 app_disable ();
3cf2715d 2731
e429a50b 2732 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
3cf2715d
DE
2733 {
2734 /* A delayed-branch sequence */
b3694847 2735 int i;
3cf2715d 2736
b32d5189 2737 final_sequence = seq;
3cf2715d
DE
2738
2739 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2740 force the restoration of a comparison that was previously
2741 thought unnecessary. If that happens, cancel this sequence
2742 and cause that insn to be restored. */
2743
e429a50b
DM
2744 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2745 if (next != seq->insn (1))
3cf2715d
DE
2746 {
2747 final_sequence = 0;
2748 return next;
2749 }
2750
e429a50b 2751 for (i = 1; i < seq->len (); i++)
c7eee2df 2752 {
e429a50b 2753 rtx_insn *insn = seq->insn (i);
fa7af581 2754 rtx_insn *next = NEXT_INSN (insn);
c7eee2df
RK
2755 /* We loop in case any instruction in a delay slot gets
2756 split. */
2757 do
c9d691e9 2758 insn = final_scan_insn (insn, file, 0, 1, seen);
c7eee2df
RK
2759 while (insn != next);
2760 }
3cf2715d
DE
2761#ifdef DBR_OUTPUT_SEQEND
2762 DBR_OUTPUT_SEQEND (file);
2763#endif
2764 final_sequence = 0;
2765
2766 /* If the insn requiring the delay slot was a CALL_INSN, the
2767 insns in the delay slot are actually executed before the
2768 called function. Hence we don't preserve any CC-setting
2769 actions in these insns and the CC must be marked as being
2770 clobbered by the function. */
e429a50b 2771 if (CALL_P (seq->insn (0)))
b729186a
JL
2772 {
2773 CC_STATUS_INIT;
2774 }
3cf2715d
DE
2775 break;
2776 }
2777
2778 /* We have a real machine instruction as rtl. */
2779
2780 body = PATTERN (insn);
2781
f1e52ed6 2782#if HAVE_cc0
f5d927c0 2783 set = single_set (insn);
b88c92cc 2784
3cf2715d
DE
2785 /* Check for redundant test and compare instructions
2786 (when the condition codes are already set up as desired).
2787 This is done only when optimizing; if not optimizing,
2788 it should be possible for the user to alter a variable
2789 with the debugger in between statements
2790 and the next statement should reexamine the variable
2791 to compute the condition codes. */
2792
46625112 2793 if (optimize_p)
3cf2715d 2794 {
30f5e9f5
RK
2795 if (set
2796 && GET_CODE (SET_DEST (set)) == CC0
2797 && insn != last_ignored_compare)
3cf2715d 2798 {
f90b7a5a 2799 rtx src1, src2;
30f5e9f5 2800 if (GET_CODE (SET_SRC (set)) == SUBREG)
55a2c322 2801 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
f90b7a5a
PB
2802
2803 src1 = SET_SRC (set);
2804 src2 = NULL_RTX;
2805 if (GET_CODE (SET_SRC (set)) == COMPARE)
30f5e9f5
RK
2806 {
2807 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2808 XEXP (SET_SRC (set), 0)
55a2c322 2809 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
30f5e9f5
RK
2810 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2811 XEXP (SET_SRC (set), 1)
55a2c322 2812 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
f90b7a5a
PB
2813 if (XEXP (SET_SRC (set), 1)
2814 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2815 src2 = XEXP (SET_SRC (set), 0);
30f5e9f5
RK
2816 }
2817 if ((cc_status.value1 != 0
f90b7a5a 2818 && rtx_equal_p (src1, cc_status.value1))
30f5e9f5 2819 || (cc_status.value2 != 0
f90b7a5a
PB
2820 && rtx_equal_p (src1, cc_status.value2))
2821 || (src2 != 0 && cc_status.value1 != 0
2822 && rtx_equal_p (src2, cc_status.value1))
2823 || (src2 != 0 && cc_status.value2 != 0
2824 && rtx_equal_p (src2, cc_status.value2)))
3cf2715d 2825 {
30f5e9f5 2826 /* Don't delete insn if it has an addressing side-effect. */
ff81832f 2827 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
30f5e9f5
RK
2828 /* or if anything in it is volatile. */
2829 && ! volatile_refs_p (PATTERN (insn)))
2830 {
2831 /* We don't really delete the insn; just ignore it. */
2832 last_ignored_compare = insn;
2833 break;
2834 }
3cf2715d
DE
2835 }
2836 }
2837 }
3cf2715d 2838
3cf2715d
DE
2839 /* If this is a conditional branch, maybe modify it
2840 if the cc's are in a nonstandard state
2841 so that it accomplishes the same thing that it would
2842 do straightforwardly if the cc's were set up normally. */
2843
2844 if (cc_status.flags != 0
4b4bf941 2845 && JUMP_P (insn)
3cf2715d
DE
2846 && GET_CODE (body) == SET
2847 && SET_DEST (body) == pc_rtx
2848 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
ec8e098d 2849 && COMPARISON_P (XEXP (SET_SRC (body), 0))
c9d691e9 2850 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
3cf2715d
DE
2851 {
2852 /* This function may alter the contents of its argument
2853 and clear some of the cc_status.flags bits.
2854 It may also return 1 meaning condition now always true
2855 or -1 meaning condition now always false
2856 or 2 meaning condition nontrivial but altered. */
b3694847 2857 int result = alter_cond (XEXP (SET_SRC (body), 0));
3cf2715d
DE
2858 /* If condition now has fixed value, replace the IF_THEN_ELSE
2859 with its then-operand or its else-operand. */
2860 if (result == 1)
2861 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2862 if (result == -1)
2863 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2864
2865 /* The jump is now either unconditional or a no-op.
2866 If it has become a no-op, don't try to output it.
2867 (It would not be recognized.) */
2868 if (SET_SRC (body) == pc_rtx)
2869 {
ca6c03ca 2870 delete_insn (insn);
3cf2715d
DE
2871 break;
2872 }
26898771 2873 else if (ANY_RETURN_P (SET_SRC (body)))
3cf2715d
DE
2874 /* Replace (set (pc) (return)) with (return). */
2875 PATTERN (insn) = body = SET_SRC (body);
2876
2877 /* Rerecognize the instruction if it has changed. */
2878 if (result != 0)
2879 INSN_CODE (insn) = -1;
2880 }
2881
604e4ce3 2882 /* If this is a conditional trap, maybe modify it if the cc's
604e4ce3
KH
2883 are in a nonstandard state so that it accomplishes the same
2884 thing that it would do straightforwardly if the cc's were
2885 set up normally. */
2886 if (cc_status.flags != 0
2887 && NONJUMP_INSN_P (insn)
2888 && GET_CODE (body) == TRAP_IF
2889 && COMPARISON_P (TRAP_CONDITION (body))
2890 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2891 {
2892 /* This function may alter the contents of its argument
2893 and clear some of the cc_status.flags bits.
2894 It may also return 1 meaning condition now always true
2895 or -1 meaning condition now always false
2896 or 2 meaning condition nontrivial but altered. */
2897 int result = alter_cond (TRAP_CONDITION (body));
2898
2899 /* If TRAP_CONDITION has become always false, delete the
2900 instruction. */
2901 if (result == -1)
2902 {
2903 delete_insn (insn);
2904 break;
2905 }
2906
2907 /* If TRAP_CONDITION has become always true, replace
2908 TRAP_CONDITION with const_true_rtx. */
2909 if (result == 1)
2910 TRAP_CONDITION (body) = const_true_rtx;
2911
2912 /* Rerecognize the instruction if it has changed. */
2913 if (result != 0)
2914 INSN_CODE (insn) = -1;
2915 }
2916
3cf2715d 2917 /* Make same adjustments to instructions that examine the
462da2af
SC
2918 condition codes without jumping and instructions that
2919 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2920
2921 if (cc_status.flags != 0
b88c92cc 2922 && set != 0)
3cf2715d 2923 {
462da2af 2924 rtx cond_rtx, then_rtx, else_rtx;
f5d927c0 2925
4b4bf941 2926 if (!JUMP_P (insn)
b88c92cc 2927 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2928 {
b88c92cc
RK
2929 cond_rtx = XEXP (SET_SRC (set), 0);
2930 then_rtx = XEXP (SET_SRC (set), 1);
2931 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2932 }
2933 else
2934 {
b88c92cc 2935 cond_rtx = SET_SRC (set);
462da2af
SC
2936 then_rtx = const_true_rtx;
2937 else_rtx = const0_rtx;
2938 }
f5d927c0 2939
511d31d8
AS
2940 if (COMPARISON_P (cond_rtx)
2941 && XEXP (cond_rtx, 0) == cc0_rtx)
3cf2715d 2942 {
511d31d8
AS
2943 int result;
2944 result = alter_cond (cond_rtx);
2945 if (result == 1)
2946 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2947 else if (result == -1)
2948 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2949 else if (result == 2)
2950 INSN_CODE (insn) = -1;
2951 if (SET_DEST (set) == SET_SRC (set))
2952 delete_insn (insn);
3cf2715d
DE
2953 }
2954 }
462da2af 2955
3cf2715d
DE
2956#endif
2957
2958 /* Do machine-specific peephole optimizations if desired. */
2959
d87834de 2960 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
3cf2715d 2961 {
fa7af581 2962 rtx_insn *next = peephole (insn);
3cf2715d
DE
2963 /* When peepholing, if there were notes within the peephole,
2964 emit them before the peephole. */
2965 if (next != 0 && next != NEXT_INSN (insn))
2966 {
fa7af581 2967 rtx_insn *note, *prev = PREV_INSN (insn);
3cf2715d
DE
2968
2969 for (note = NEXT_INSN (insn); note != next;
2970 note = NEXT_INSN (note))
46625112 2971 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
a2785739
ILT
2972
2973 /* Put the notes in the proper position for a later
2974 rescan. For example, the SH target can do this
2975 when generating a far jump in a delayed branch
2976 sequence. */
2977 note = NEXT_INSN (insn);
0f82e5c9
DM
2978 SET_PREV_INSN (note) = prev;
2979 SET_NEXT_INSN (prev) = note;
2980 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2981 SET_PREV_INSN (insn) = PREV_INSN (next);
2982 SET_NEXT_INSN (insn) = next;
2983 SET_PREV_INSN (next) = insn;
3cf2715d
DE
2984 }
2985
2986 /* PEEPHOLE might have changed this. */
2987 body = PATTERN (insn);
2988 }
2989
2990 /* Try to recognize the instruction.
2991 If successful, verify that the operands satisfy the
2992 constraints for the instruction. Crash if they don't,
2993 since `reload' should have changed them so that they do. */
2994
2995 insn_code_number = recog_memoized (insn);
0304f787 2996 cleanup_subreg_operands (insn);
3cf2715d 2997
8c503f0d
SB
2998 /* Dump the insn in the assembly for debugging (-dAP).
2999 If the final dump is requested as slim RTL, dump slim
3000 RTL to the assembly file also. */
dd3f0101
KH
3001 if (flag_dump_rtl_in_asm)
3002 {
3003 print_rtx_head = ASM_COMMENT_START;
8c503f0d
SB
3004 if (! (dump_flags & TDF_SLIM))
3005 print_rtl_single (asm_out_file, insn);
3006 else
3007 dump_insn_slim (asm_out_file, insn);
dd3f0101
KH
3008 print_rtx_head = "";
3009 }
b9f22704 3010
daca1a96 3011 if (! constrain_operands_cached (insn, 1))
3cf2715d 3012 fatal_insn_not_found (insn);
3cf2715d
DE
3013
3014 /* Some target machines need to prescan each insn before
3015 it is output. */
3016
3017#ifdef FINAL_PRESCAN_INSN
1ccbefce 3018 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
3cf2715d
DE
3019#endif
3020
2929029c
WG
3021 if (targetm.have_conditional_execution ()
3022 && GET_CODE (PATTERN (insn)) == COND_EXEC)
afe48e06 3023 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
afe48e06 3024
f1e52ed6 3025#if HAVE_cc0
3cf2715d
DE
3026 cc_prev_status = cc_status;
3027
3028 /* Update `cc_status' for this instruction.
3029 The instruction's output routine may change it further.
3030 If the output routine for a jump insn needs to depend
3031 on the cc status, it should look at cc_prev_status. */
3032
3033 NOTICE_UPDATE_CC (body, insn);
3034#endif
3035
b1a9f6a0 3036 current_output_insn = debug_insn = insn;
3cf2715d 3037
4bbf910e 3038 /* Find the proper template for this insn. */
48c54229 3039 templ = get_insn_template (insn_code_number, insn);
3cf2715d 3040
4bbf910e
RH
3041 /* If the C code returns 0, it means that it is a jump insn
3042 which follows a deleted test insn, and that test insn
3043 needs to be reinserted. */
48c54229 3044 if (templ == 0)
3cf2715d 3045 {
fa7af581 3046 rtx_insn *prev;
efd0378b 3047
0bccc606 3048 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
efd0378b
HPN
3049
3050 /* We have already processed the notes between the setter and
3051 the user. Make sure we don't process them again, this is
3052 particularly important if one of the notes is a block
3053 scope note or an EH note. */
3054 for (prev = insn;
3055 prev != last_ignored_compare;
3056 prev = PREV_INSN (prev))
3057 {
4b4bf941 3058 if (NOTE_P (prev))
ca6c03ca 3059 delete_insn (prev); /* Use delete_note. */
efd0378b
HPN
3060 }
3061
3062 return prev;
3cf2715d
DE
3063 }
3064
3065 /* If the template is the string "#", it means that this insn must
3066 be split. */
48c54229 3067 if (templ[0] == '#' && templ[1] == '\0')
3cf2715d 3068 {
fa7af581 3069 rtx_insn *new_rtx = try_split (body, insn, 0);
3cf2715d
DE
3070
3071 /* If we didn't split the insn, go away. */
48c54229 3072 if (new_rtx == insn && PATTERN (new_rtx) == body)
c725bd79 3073 fatal_insn ("could not split insn", insn);
f5d927c0 3074
d327457f
JR
3075 /* If we have a length attribute, this instruction should have
3076 been split in shorten_branches, to ensure that we would have
3077 valid length info for the splitees. */
3078 gcc_assert (!HAVE_ATTR_length);
3d14e82f 3079
48c54229 3080 return new_rtx;
3cf2715d 3081 }
f5d927c0 3082
951120ea
PB
3083 /* ??? This will put the directives in the wrong place if
3084 get_insn_template outputs assembly directly. However calling it
3085 before get_insn_template breaks if the insns is split. */
3bc6b3e6
RH
3086 if (targetm.asm_out.unwind_emit_before_insn
3087 && targetm.asm_out.unwind_emit)
2784ed9c 3088 targetm.asm_out.unwind_emit (asm_out_file, insn);
3cf2715d 3089
f2834b5d
PMR
3090 rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn);
3091 if (call_insn != NULL)
f410e1b3 3092 {
fa7af581 3093 rtx x = call_from_call_insn (call_insn);
f410e1b3
RAE
3094 x = XEXP (x, 0);
3095 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3096 {
3097 tree t;
3098 x = XEXP (x, 0);
3099 t = SYMBOL_REF_DECL (x);
3100 if (t)
3101 assemble_external (t);
3102 }
3103 }
3104
951120ea 3105 /* Output assembler code from the template. */
48c54229 3106 output_asm_insn (templ, recog_data.operand);
3cf2715d 3107
1afc5373
CF
3108 /* Some target machines need to postscan each insn after
3109 it is output. */
3110 if (targetm.asm_out.final_postscan_insn)
3111 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3112 recog_data.n_operands);
3113
3bc6b3e6
RH
3114 if (!targetm.asm_out.unwind_emit_before_insn
3115 && targetm.asm_out.unwind_emit)
3116 targetm.asm_out.unwind_emit (asm_out_file, insn);
3117
f2834b5d
PMR
3118 /* Let the debug info back-end know about this call. We do this only
3119 after the instruction has been emitted because labels that may be
3120 created to reference the call instruction must appear after it. */
bd2b9f1e
AO
3121 if ((debug_variable_location_views || call_insn != NULL)
3122 && !DECL_IGNORED_P (current_function_decl))
f2834b5d
PMR
3123 debug_hooks->var_location (insn);
3124
b1a9f6a0 3125 current_output_insn = debug_insn = 0;
3cf2715d
DE
3126 }
3127 }
3128 return NEXT_INSN (insn);
3129}
e094c0bf
AO
3130
3131/* This is a wrapper around final_scan_insn_1 that allows ports to
3132 call it recursively without a known value for SEEN. The value is
3133 saved at the outermost call, and recovered for recursive calls.
3134 Recursive calls MUST pass NULL, or the same pointer if they can
3135 otherwise get to it. */
3136
3137rtx_insn *
3138final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p,
3139 int nopeepholes, int *seen)
3140{
3141 static int *enclosing_seen;
3142 static int recursion_counter;
3143
3144 gcc_assert (seen || recursion_counter);
3145 gcc_assert (!recursion_counter || !seen || seen == enclosing_seen);
3146
3147 if (!recursion_counter++)
3148 enclosing_seen = seen;
3149 else if (!seen)
3150 seen = enclosing_seen;
3151
3152 rtx_insn *ret = final_scan_insn_1 (insn, file, optimize_p, nopeepholes, seen);
3153
3154 if (!--recursion_counter)
3155 enclosing_seen = NULL;
3156
3157 return ret;
3158}
3159
3cf2715d 3160\f
fa6fd7b7
AO
3161
3162/* Map DECLs to instance discriminators. This is allocated and
b348c78a
AO
3163 defined in ada/gcc-interfaces/trans.c, when compiling with -gnateS.
3164 Mappings from this table are saved and restored for LTO, so
3165 link-time compilation will have this map set, at least in
3166 partitions containing at least one DECL with an associated instance
3167 discriminator. */
fa6fd7b7
AO
3168
3169decl_to_instance_map_t *decl_to_instance_map;
3170
3171/* Return the instance number assigned to DECL. */
3172
3173static inline int
3174map_decl_to_instance (const_tree decl)
3175{
3176 int *inst;
3177
3178 if (!decl_to_instance_map || !decl || !DECL_P (decl))
3179 return 0;
3180
3181 inst = decl_to_instance_map->get (decl);
3182
3183 if (!inst)
3184 return 0;
3185
3186 return *inst;
3187}
3188
3189/* Set DISCRIMINATOR to the appropriate value, possibly derived from LOC. */
3190
6bdb055e
AO
3191static inline int
3192compute_discriminator (location_t loc)
fa6fd7b7 3193{
6bdb055e
AO
3194 int discriminator;
3195
fa6fd7b7
AO
3196 if (!decl_to_instance_map)
3197 discriminator = bb_discriminator;
3198 else
3199 {
3200 tree block = LOCATION_BLOCK (loc);
3201
3202 while (block && TREE_CODE (block) == BLOCK
3203 && !inlined_function_outer_scope_p (block))
3204 block = BLOCK_SUPERCONTEXT (block);
3205
3206 tree decl;
3207
3208 if (!block)
3209 decl = current_function_decl;
3210 else if (DECL_P (block))
3211 decl = block;
3212 else
3213 decl = block_ultimate_origin (block);
3214
3215 discriminator = map_decl_to_instance (decl);
3216 }
6bdb055e
AO
3217
3218 return discriminator;
fa6fd7b7
AO
3219}
3220
ed5ef2e4
CC
3221/* Return whether a source line note needs to be emitted before INSN.
3222 Sets IS_STMT to TRUE if the line should be marked as a possible
3223 breakpoint location. */
3cf2715d 3224
0435312e 3225static bool
fa7af581 3226notice_source_line (rtx_insn *insn, bool *is_stmt)
3cf2715d 3227{
d752cfdb 3228 const char *filename;
497b7c47 3229 int linenum, columnnum;
d752cfdb 3230
96a95ac1
AO
3231 if (NOTE_MARKER_P (insn))
3232 {
3233 location_t loc = NOTE_MARKER_LOCATION (insn);
3234 expanded_location xloc = expand_location (loc);
3235 if (xloc.line == 0)
3236 {
3237 gcc_checking_assert (LOCATION_LOCUS (loc) == UNKNOWN_LOCATION
3238 || LOCATION_LOCUS (loc) == BUILTINS_LOCATION);
3239 return false;
3240 }
3241 filename = xloc.file;
3242 linenum = xloc.line;
3243 columnnum = xloc.column;
6bdb055e 3244 discriminator = compute_discriminator (loc);
96a95ac1
AO
3245 force_source_line = true;
3246 }
3247 else if (override_filename)
d752cfdb
JJ
3248 {
3249 filename = override_filename;
3250 linenum = override_linenum;
497b7c47 3251 columnnum = override_columnnum;
6bdb055e 3252 discriminator = override_discriminator;
d752cfdb 3253 }
ffa4602f
EB
3254 else if (INSN_HAS_LOCATION (insn))
3255 {
3256 expanded_location xloc = insn_location (insn);
3257 filename = xloc.file;
3258 linenum = xloc.line;
497b7c47 3259 columnnum = xloc.column;
6bdb055e 3260 discriminator = compute_discriminator (INSN_LOCATION (insn));
ffa4602f 3261 }
d752cfdb
JJ
3262 else
3263 {
ffa4602f
EB
3264 filename = NULL;
3265 linenum = 0;
497b7c47 3266 columnnum = 0;
6bdb055e 3267 discriminator = 0;
d752cfdb 3268 }
3cf2715d 3269
ed5ef2e4
CC
3270 if (filename == NULL)
3271 return false;
3272
3273 if (force_source_line
3274 || filename != last_filename
497b7c47
JJ
3275 || last_linenum != linenum
3276 || (debug_column_info && last_columnnum != columnnum))
0435312e 3277 {
b8176fe4 3278 force_source_line = false;
0435312e
JH
3279 last_filename = filename;
3280 last_linenum = linenum;
497b7c47 3281 last_columnnum = columnnum;
6c52e687 3282 last_discriminator = discriminator;
96a95ac1
AO
3283 if (is_stmt)
3284 *is_stmt = true;
0435312e
JH
3285 high_block_linenum = MAX (last_linenum, high_block_linenum);
3286 high_function_linenum = MAX (last_linenum, high_function_linenum);
3287 return true;
3288 }
ed5ef2e4
CC
3289
3290 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3291 {
3292 /* If the discriminator changed, but the line number did not,
3293 output the line table entry with is_stmt false so the
3294 debugger does not treat this as a breakpoint location. */
3295 last_discriminator = discriminator;
96a95ac1
AO
3296 if (is_stmt)
3297 *is_stmt = false;
ed5ef2e4
CC
3298 return true;
3299 }
3300
0435312e 3301 return false;
3cf2715d
DE
3302}
3303\f
0304f787
JL
3304/* For each operand in INSN, simplify (subreg (reg)) so that it refers
3305 directly to the desired hard register. */
f5d927c0 3306
0304f787 3307void
647d790d 3308cleanup_subreg_operands (rtx_insn *insn)
0304f787 3309{
f62a15e3 3310 int i;
6fb5fa3c 3311 bool changed = false;
6c698a6d 3312 extract_insn_cached (insn);
1ccbefce 3313 for (i = 0; i < recog_data.n_operands; i++)
0304f787 3314 {
2067c116 3315 /* The following test cannot use recog_data.operand when testing
9f4524f2
RE
3316 for a SUBREG: the underlying object might have been changed
3317 already if we are inside a match_operator expression that
3318 matches the else clause. Instead we test the underlying
3319 expression directly. */
3320 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
6fb5fa3c 3321 {
55a2c322 3322 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
6fb5fa3c
DB
3323 changed = true;
3324 }
1ccbefce 3325 else if (GET_CODE (recog_data.operand[i]) == PLUS
04337620 3326 || GET_CODE (recog_data.operand[i]) == MULT
3c0cb5de 3327 || MEM_P (recog_data.operand[i]))
6fb5fa3c 3328 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
0304f787
JL
3329 }
3330
1ccbefce 3331 for (i = 0; i < recog_data.n_dups; i++)
0304f787 3332 {
1ccbefce 3333 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
6fb5fa3c 3334 {
55a2c322 3335 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
6fb5fa3c
DB
3336 changed = true;
3337 }
1ccbefce 3338 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
04337620 3339 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3c0cb5de 3340 || MEM_P (*recog_data.dup_loc[i]))
6fb5fa3c 3341 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
0304f787 3342 }
6fb5fa3c 3343 if (changed)
647d790d 3344 df_insn_rescan (insn);
0304f787
JL
3345}
3346
55a2c322
VM
3347/* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3348 the thing it is a subreg of. Do it anyway if FINAL_P. */
3cf2715d
DE
3349
3350rtx
55a2c322 3351alter_subreg (rtx *xp, bool final_p)
3cf2715d 3352{
49d801d3 3353 rtx x = *xp;
b3694847 3354 rtx y = SUBREG_REG (x);
f5963e61 3355
49d801d3
JH
3356 /* simplify_subreg does not remove subreg from volatile references.
3357 We are required to. */
3c0cb5de 3358 if (MEM_P (y))
fd326ba8 3359 {
91914e56 3360 poly_int64 offset = SUBREG_BYTE (x);
fd326ba8
UW
3361
3362 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3363 contains 0 instead of the proper offset. See simplify_subreg. */
03a95621 3364 if (paradoxical_subreg_p (x))
90f2b7e2 3365 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
fd326ba8 3366
55a2c322
VM
3367 if (final_p)
3368 *xp = adjust_address (y, GET_MODE (x), offset);
3369 else
3370 *xp = adjust_address_nv (y, GET_MODE (x), offset);
fd326ba8 3371 }
a50fa76a 3372 else if (REG_P (y) && HARD_REGISTER_P (y))
fea54805 3373 {
48c54229 3374 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
55a2c322 3375 SUBREG_BYTE (x));
fea54805 3376
48c54229
KG
3377 if (new_rtx != 0)
3378 *xp = new_rtx;
55a2c322 3379 else if (final_p && REG_P (y))
fea54805 3380 {
0bccc606 3381 /* Simplify_subreg can't handle some REG cases, but we have to. */
38ae7651 3382 unsigned int regno;
91914e56 3383 poly_int64 offset;
38ae7651
RS
3384
3385 regno = subreg_regno (x);
3386 if (subreg_lowpart_p (x))
3387 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3388 else
3389 offset = SUBREG_BYTE (x);
3390 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
fea54805 3391 }
fea54805
RK
3392 }
3393
49d801d3 3394 return *xp;
3cf2715d
DE
3395}
3396
3397/* Do alter_subreg on all the SUBREGs contained in X. */
3398
3399static rtx
6fb5fa3c 3400walk_alter_subreg (rtx *xp, bool *changed)
3cf2715d 3401{
49d801d3 3402 rtx x = *xp;
3cf2715d
DE
3403 switch (GET_CODE (x))
3404 {
3405 case PLUS:
3406 case MULT:
beed8fc0 3407 case AND:
6fb5fa3c
DB
3408 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3409 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3cf2715d
DE
3410 break;
3411
3412 case MEM:
beed8fc0 3413 case ZERO_EXTEND:
6fb5fa3c 3414 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3cf2715d
DE
3415 break;
3416
3417 case SUBREG:
6fb5fa3c 3418 *changed = true;
55a2c322 3419 return alter_subreg (xp, true);
f5d927c0 3420
e9a25f70
JL
3421 default:
3422 break;
3cf2715d
DE
3423 }
3424
5bc72aeb 3425 return *xp;
3cf2715d
DE
3426}
3427\f
f1e52ed6 3428#if HAVE_cc0
3cf2715d
DE
3429
3430/* Given BODY, the body of a jump instruction, alter the jump condition
3431 as required by the bits that are set in cc_status.flags.
3432 Not all of the bits there can be handled at this level in all cases.
3433
3434 The value is normally 0.
3435 1 means that the condition has become always true.
3436 -1 means that the condition has become always false.
3437 2 means that COND has been altered. */
3438
3439static int
6cf9ac28 3440alter_cond (rtx cond)
3cf2715d
DE
3441{
3442 int value = 0;
3443
3444 if (cc_status.flags & CC_REVERSED)
3445 {
3446 value = 2;
3447 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3448 }
3449
3450 if (cc_status.flags & CC_INVERTED)
3451 {
3452 value = 2;
3453 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3454 }
3455
3456 if (cc_status.flags & CC_NOT_POSITIVE)
3457 switch (GET_CODE (cond))
3458 {
3459 case LE:
3460 case LEU:
3461 case GEU:
3462 /* Jump becomes unconditional. */
3463 return 1;
3464
3465 case GT:
3466 case GTU:
3467 case LTU:
3468 /* Jump becomes no-op. */
3469 return -1;
3470
3471 case GE:
3472 PUT_CODE (cond, EQ);
3473 value = 2;
3474 break;
3475
3476 case LT:
3477 PUT_CODE (cond, NE);
3478 value = 2;
3479 break;
f5d927c0 3480
e9a25f70
JL
3481 default:
3482 break;
3cf2715d
DE
3483 }
3484
3485 if (cc_status.flags & CC_NOT_NEGATIVE)
3486 switch (GET_CODE (cond))
3487 {
3488 case GE:
3489 case GEU:
3490 /* Jump becomes unconditional. */
3491 return 1;
3492
3493 case LT:
3494 case LTU:
3495 /* Jump becomes no-op. */
3496 return -1;
3497
3498 case LE:
3499 case LEU:
3500 PUT_CODE (cond, EQ);
3501 value = 2;
3502 break;
3503
3504 case GT:
3505 case GTU:
3506 PUT_CODE (cond, NE);
3507 value = 2;
3508 break;
f5d927c0 3509
e9a25f70
JL
3510 default:
3511 break;
3cf2715d
DE
3512 }
3513
3514 if (cc_status.flags & CC_NO_OVERFLOW)
3515 switch (GET_CODE (cond))
3516 {
3517 case GEU:
3518 /* Jump becomes unconditional. */
3519 return 1;
3520
3521 case LEU:
3522 PUT_CODE (cond, EQ);
3523 value = 2;
3524 break;
3525
3526 case GTU:
3527 PUT_CODE (cond, NE);
3528 value = 2;
3529 break;
3530
3531 case LTU:
3532 /* Jump becomes no-op. */
3533 return -1;
f5d927c0 3534
e9a25f70
JL
3535 default:
3536 break;
3cf2715d
DE
3537 }
3538
3539 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3540 switch (GET_CODE (cond))
3541 {
e9a25f70 3542 default:
0bccc606 3543 gcc_unreachable ();
3cf2715d
DE
3544
3545 case NE:
3546 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3547 value = 2;
3548 break;
3549
3550 case EQ:
3551 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3552 value = 2;
3553 break;
3554 }
3555
3556 if (cc_status.flags & CC_NOT_SIGNED)
3557 /* The flags are valid if signed condition operators are converted
3558 to unsigned. */
3559 switch (GET_CODE (cond))
3560 {
3561 case LE:
3562 PUT_CODE (cond, LEU);
3563 value = 2;
3564 break;
3565
3566 case LT:
3567 PUT_CODE (cond, LTU);
3568 value = 2;
3569 break;
3570
3571 case GT:
3572 PUT_CODE (cond, GTU);
3573 value = 2;
3574 break;
3575
3576 case GE:
3577 PUT_CODE (cond, GEU);
3578 value = 2;
3579 break;
e9a25f70
JL
3580
3581 default:
3582 break;
3cf2715d
DE
3583 }
3584
3585 return value;
3586}
3587#endif
3588\f
3589/* Report inconsistency between the assembler template and the operands.
3590 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3591
3592void
4b794eaf 3593output_operand_lossage (const char *cmsgid, ...)
3cf2715d 3594{
a52453cc
PT
3595 char *fmt_string;
3596 char *new_message;
fd478a0a 3597 const char *pfx_str;
e34d07f2 3598 va_list ap;
6cf9ac28 3599
4b794eaf 3600 va_start (ap, cmsgid);
a52453cc 3601
9e637a26 3602 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
582f770b
UB
3603 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3604 new_message = xvasprintf (fmt_string, ap);
dd3f0101 3605
3cf2715d 3606 if (this_is_asm_operands)
a52453cc 3607 error_for_asm (this_is_asm_operands, "%s", new_message);
3cf2715d 3608 else
a52453cc
PT
3609 internal_error ("%s", new_message);
3610
3611 free (fmt_string);
3612 free (new_message);
e34d07f2 3613 va_end (ap);
3cf2715d
DE
3614}
3615\f
3616/* Output of assembler code from a template, and its subroutines. */
3617
0d4903b8
RK
3618/* Annotate the assembly with a comment describing the pattern and
3619 alternative used. */
3620
3621static void
6cf9ac28 3622output_asm_name (void)
0d4903b8
RK
3623{
3624 if (debug_insn)
3625 {
dff125eb
SB
3626 fprintf (asm_out_file, "\t%s %d\t",
3627 ASM_COMMENT_START, INSN_UID (debug_insn));
d327457f 3628
dff125eb
SB
3629 fprintf (asm_out_file, "[c=%d",
3630 insn_cost (debug_insn, optimize_insn_for_speed_p ()));
d327457f 3631 if (HAVE_ATTR_length)
dff125eb 3632 fprintf (asm_out_file, " l=%d",
d327457f 3633 get_attr_length (debug_insn));
dff125eb
SB
3634 fprintf (asm_out_file, "] ");
3635
3636 int num = INSN_CODE (debug_insn);
3637 fprintf (asm_out_file, "%s", insn_data[num].name);
3638 if (insn_data[num].n_alternatives > 1)
3639 fprintf (asm_out_file, "/%d", which_alternative);
d327457f 3640
0d4903b8
RK
3641 /* Clear this so only the first assembler insn
3642 of any rtl insn will get the special comment for -dp. */
3643 debug_insn = 0;
3644 }
3645}
3646
998d7deb
RH
3647/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3648 or its address, return that expr . Set *PADDRESSP to 1 if the expr
c5adc06a
RK
3649 corresponds to the address of the object and 0 if to the object. */
3650
3651static tree
6cf9ac28 3652get_mem_expr_from_op (rtx op, int *paddressp)
c5adc06a 3653{
998d7deb 3654 tree expr;
c5adc06a
RK
3655 int inner_addressp;
3656
3657 *paddressp = 0;
3658
f8cfc6aa 3659 if (REG_P (op))
a560d4d4 3660 return REG_EXPR (op);
3c0cb5de 3661 else if (!MEM_P (op))
c5adc06a
RK
3662 return 0;
3663
998d7deb
RH
3664 if (MEM_EXPR (op) != 0)
3665 return MEM_EXPR (op);
c5adc06a
RK
3666
3667 /* Otherwise we have an address, so indicate it and look at the address. */
3668 *paddressp = 1;
3669 op = XEXP (op, 0);
3670
3671 /* First check if we have a decl for the address, then look at the right side
3672 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3673 But don't allow the address to itself be indirect. */
998d7deb
RH
3674 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3675 return expr;
c5adc06a 3676 else if (GET_CODE (op) == PLUS
998d7deb
RH
3677 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3678 return expr;
c5adc06a 3679
481683e1 3680 while (UNARY_P (op)
ec8e098d 3681 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
c5adc06a
RK
3682 op = XEXP (op, 0);
3683
998d7deb
RH
3684 expr = get_mem_expr_from_op (op, &inner_addressp);
3685 return inner_addressp ? 0 : expr;
c5adc06a 3686}
ff81832f 3687
4f9b4029
RK
3688/* Output operand names for assembler instructions. OPERANDS is the
3689 operand vector, OPORDER is the order to write the operands, and NOPS
3690 is the number of operands to write. */
3691
3692static void
6cf9ac28 3693output_asm_operand_names (rtx *operands, int *oporder, int nops)
4f9b4029
RK
3694{
3695 int wrote = 0;
3696 int i;
3697
3698 for (i = 0; i < nops; i++)
3699 {
3700 int addressp;
a560d4d4
JH
3701 rtx op = operands[oporder[i]];
3702 tree expr = get_mem_expr_from_op (op, &addressp);
4f9b4029 3703
a560d4d4
JH
3704 fprintf (asm_out_file, "%c%s",
3705 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3706 wrote = 1;
998d7deb 3707 if (expr)
4f9b4029 3708 {
a560d4d4 3709 fprintf (asm_out_file, "%s",
998d7deb
RH
3710 addressp ? "*" : "");
3711 print_mem_expr (asm_out_file, expr);
4f9b4029
RK
3712 wrote = 1;
3713 }
a560d4d4
JH
3714 else if (REG_P (op) && ORIGINAL_REGNO (op)
3715 && ORIGINAL_REGNO (op) != REGNO (op))
3716 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
4f9b4029
RK
3717 }
3718}
3719
d1658619
SP
3720#ifdef ASSEMBLER_DIALECT
3721/* Helper function to parse assembler dialects in the asm string.
3722 This is called from output_asm_insn and asm_fprintf. */
3723static const char *
3724do_assembler_dialects (const char *p, int *dialect)
3725{
3726 char c = *(p - 1);
3727
3728 switch (c)
3729 {
3730 case '{':
3731 {
3732 int i;
3733
3734 if (*dialect)
3735 output_operand_lossage ("nested assembly dialect alternatives");
3736 else
3737 *dialect = 1;
3738
3739 /* If we want the first dialect, do nothing. Otherwise, skip
3740 DIALECT_NUMBER of strings ending with '|'. */
3741 for (i = 0; i < dialect_number; i++)
3742 {
382522cb
MK
3743 while (*p && *p != '}')
3744 {
3745 if (*p == '|')
3746 {
3747 p++;
3748 break;
3749 }
3750
3751 /* Skip over any character after a percent sign. */
3752 if (*p == '%')
3753 p++;
3754 if (*p)
3755 p++;
3756 }
3757
d1658619
SP
3758 if (*p == '}')
3759 break;
3760 }
3761
3762 if (*p == '\0')
3763 output_operand_lossage ("unterminated assembly dialect alternative");
3764 }
3765 break;
3766
3767 case '|':
3768 if (*dialect)
3769 {
3770 /* Skip to close brace. */
3771 do
3772 {
3773 if (*p == '\0')
3774 {
3775 output_operand_lossage ("unterminated assembly dialect alternative");
3776 break;
3777 }
382522cb
MK
3778
3779 /* Skip over any character after a percent sign. */
3780 if (*p == '%' && p[1])
3781 {
3782 p += 2;
3783 continue;
3784 }
3785
3786 if (*p++ == '}')
3787 break;
d1658619 3788 }
382522cb
MK
3789 while (1);
3790
d1658619
SP
3791 *dialect = 0;
3792 }
3793 else
3794 putc (c, asm_out_file);
3795 break;
3796
3797 case '}':
3798 if (! *dialect)
3799 putc (c, asm_out_file);
3800 *dialect = 0;
3801 break;
3802 default:
3803 gcc_unreachable ();
3804 }
3805
3806 return p;
3807}
3808#endif
3809
3cf2715d
DE
3810/* Output text from TEMPLATE to the assembler output file,
3811 obeying %-directions to substitute operands taken from
3812 the vector OPERANDS.
3813
3814 %N (for N a digit) means print operand N in usual manner.
3815 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3816 and print the label name with no punctuation.
3817 %cN means require operand N to be a constant
3818 and print the constant expression with no punctuation.
3819 %aN means expect operand N to be a memory address
3820 (not a memory reference!) and print a reference
3821 to that address.
3822 %nN means expect operand N to be a constant
3823 and print a constant expression for minus the value
3824 of the operand, with no other punctuation. */
3825
3826void
48c54229 3827output_asm_insn (const char *templ, rtx *operands)
3cf2715d 3828{
b3694847
SS
3829 const char *p;
3830 int c;
8554d9a4
JJ
3831#ifdef ASSEMBLER_DIALECT
3832 int dialect = 0;
3833#endif
0d4903b8 3834 int oporder[MAX_RECOG_OPERANDS];
4f9b4029 3835 char opoutput[MAX_RECOG_OPERANDS];
0d4903b8 3836 int ops = 0;
3cf2715d
DE
3837
3838 /* An insn may return a null string template
3839 in a case where no assembler code is needed. */
48c54229 3840 if (*templ == 0)
3cf2715d
DE
3841 return;
3842
4f9b4029 3843 memset (opoutput, 0, sizeof opoutput);
48c54229 3844 p = templ;
3cf2715d
DE
3845 putc ('\t', asm_out_file);
3846
3847#ifdef ASM_OUTPUT_OPCODE
3848 ASM_OUTPUT_OPCODE (asm_out_file, p);
3849#endif
3850
b729186a 3851 while ((c = *p++))
3cf2715d
DE
3852 switch (c)
3853 {
3cf2715d 3854 case '\n':
4f9b4029
RK
3855 if (flag_verbose_asm)
3856 output_asm_operand_names (operands, oporder, ops);
0d4903b8
RK
3857 if (flag_print_asm_name)
3858 output_asm_name ();
3859
4f9b4029
RK
3860 ops = 0;
3861 memset (opoutput, 0, sizeof opoutput);
3862
3cf2715d 3863 putc (c, asm_out_file);
cb649530 3864#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3865 while ((c = *p) == '\t')
3866 {
3867 putc (c, asm_out_file);
3868 p++;
3869 }
3870 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3871#endif
cb649530 3872 break;
3cf2715d
DE
3873
3874#ifdef ASSEMBLER_DIALECT
3875 case '{':
3cf2715d 3876 case '}':
d1658619
SP
3877 case '|':
3878 p = do_assembler_dialects (p, &dialect);
3cf2715d
DE
3879 break;
3880#endif
3881
3882 case '%':
382522cb
MK
3883 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3884 if ASSEMBLER_DIALECT defined and these characters have a special
3885 meaning as dialect delimiters.*/
3886 if (*p == '%'
3887#ifdef ASSEMBLER_DIALECT
3888 || *p == '{' || *p == '}' || *p == '|'
3889#endif
3890 )
3cf2715d 3891 {
382522cb 3892 putc (*p, asm_out_file);
3cf2715d 3893 p++;
3cf2715d
DE
3894 }
3895 /* %= outputs a number which is unique to each insn in the entire
3896 compilation. This is useful for making local labels that are
3897 referred to more than once in a given insn. */
3898 else if (*p == '=')
3899 {
3900 p++;
3901 fprintf (asm_out_file, "%d", insn_counter);
3902 }
3903 /* % followed by a letter and some digits
3904 outputs an operand in a special way depending on the letter.
3905 Letters `acln' are implemented directly.
3906 Other letters are passed to `output_operand' so that
6e2188e0 3907 the TARGET_PRINT_OPERAND hook can define them. */
0df6c2c7 3908 else if (ISALPHA (*p))
3cf2715d
DE
3909 {
3910 int letter = *p++;
c383c15f
GK
3911 unsigned long opnum;
3912 char *endptr;
b0efb46b 3913
c383c15f
GK
3914 opnum = strtoul (p, &endptr, 10);
3915
3916 if (endptr == p)
3917 output_operand_lossage ("operand number missing "
3918 "after %%-letter");
3919 else if (this_is_asm_operands && opnum >= insn_noperands)
3cf2715d
DE
3920 output_operand_lossage ("operand number out of range");
3921 else if (letter == 'l')
c383c15f 3922 output_asm_label (operands[opnum]);
3cf2715d 3923 else if (letter == 'a')
cc8ca59e 3924 output_address (VOIDmode, operands[opnum]);
3cf2715d
DE
3925 else if (letter == 'c')
3926 {
c383c15f
GK
3927 if (CONSTANT_ADDRESS_P (operands[opnum]))
3928 output_addr_const (asm_out_file, operands[opnum]);
3cf2715d 3929 else
c383c15f 3930 output_operand (operands[opnum], 'c');
3cf2715d
DE
3931 }
3932 else if (letter == 'n')
3933 {
481683e1 3934 if (CONST_INT_P (operands[opnum]))
21e3a81b 3935 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
c383c15f 3936 - INTVAL (operands[opnum]));
3cf2715d
DE
3937 else
3938 {
3939 putc ('-', asm_out_file);
c383c15f 3940 output_addr_const (asm_out_file, operands[opnum]);
3cf2715d
DE
3941 }
3942 }
3943 else
c383c15f 3944 output_operand (operands[opnum], letter);
f5d927c0 3945
c383c15f 3946 if (!opoutput[opnum])
dc9d0b14 3947 oporder[ops++] = opnum;
c383c15f 3948 opoutput[opnum] = 1;
0d4903b8 3949
c383c15f
GK
3950 p = endptr;
3951 c = *p;
3cf2715d
DE
3952 }
3953 /* % followed by a digit outputs an operand the default way. */
0df6c2c7 3954 else if (ISDIGIT (*p))
3cf2715d 3955 {
c383c15f
GK
3956 unsigned long opnum;
3957 char *endptr;
b0efb46b 3958
c383c15f
GK
3959 opnum = strtoul (p, &endptr, 10);
3960 if (this_is_asm_operands && opnum >= insn_noperands)
3cf2715d
DE
3961 output_operand_lossage ("operand number out of range");
3962 else
c383c15f 3963 output_operand (operands[opnum], 0);
0d4903b8 3964
c383c15f 3965 if (!opoutput[opnum])
dc9d0b14 3966 oporder[ops++] = opnum;
c383c15f 3967 opoutput[opnum] = 1;
4f9b4029 3968
c383c15f
GK
3969 p = endptr;
3970 c = *p;
3cf2715d
DE
3971 }
3972 /* % followed by punctuation: output something for that
6e2188e0
NF
3973 punctuation character alone, with no operand. The
3974 TARGET_PRINT_OPERAND hook decides what is actually done. */
3975 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3cf2715d 3976 output_operand (NULL_RTX, *p++);
3cf2715d
DE
3977 else
3978 output_operand_lossage ("invalid %%-code");
3979 break;
3980
3981 default:
3982 putc (c, asm_out_file);
3983 }
3984
dff125eb
SB
3985 /* Try to keep the asm a bit more readable. */
3986 if ((flag_verbose_asm || flag_print_asm_name) && strlen (templ) < 9)
3987 putc ('\t', asm_out_file);
3988
0d4903b8
RK
3989 /* Write out the variable names for operands, if we know them. */
3990 if (flag_verbose_asm)
4f9b4029 3991 output_asm_operand_names (operands, oporder, ops);
0d4903b8
RK
3992 if (flag_print_asm_name)
3993 output_asm_name ();
3cf2715d
DE
3994
3995 putc ('\n', asm_out_file);
3996}
3997\f
3998/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3999
4000void
6cf9ac28 4001output_asm_label (rtx x)
3cf2715d
DE
4002{
4003 char buf[256];
4004
4005 if (GET_CODE (x) == LABEL_REF)
04a121a7 4006 x = label_ref_label (x);
4b4bf941
JQ
4007 if (LABEL_P (x)
4008 || (NOTE_P (x)
a38e7aa5 4009 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3cf2715d
DE
4010 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
4011 else
9e637a26 4012 output_operand_lossage ("'%%l' operand isn't a label");
3cf2715d
DE
4013
4014 assemble_name (asm_out_file, buf);
4015}
4016
a7fe25b8
JJ
4017/* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
4018
4019void
4020mark_symbol_refs_as_used (rtx x)
4021{
effb8a26
RS
4022 subrtx_iterator::array_type array;
4023 FOR_EACH_SUBRTX (iter, array, x, ALL)
4024 {
4025 const_rtx x = *iter;
4026 if (GET_CODE (x) == SYMBOL_REF)
4027 if (tree t = SYMBOL_REF_DECL (x))
4028 assemble_external (t);
4029 }
a7fe25b8
JJ
4030}
4031
3cf2715d 4032/* Print operand X using machine-dependent assembler syntax.
3cf2715d
DE
4033 CODE is a non-digit that preceded the operand-number in the % spec,
4034 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
4035 between the % and the digits.
4036 When CODE is a non-letter, X is 0.
4037
4038 The meanings of the letters are machine-dependent and controlled
6e2188e0 4039 by TARGET_PRINT_OPERAND. */
3cf2715d 4040
6b3c42ae 4041void
6cf9ac28 4042output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3cf2715d
DE
4043{
4044 if (x && GET_CODE (x) == SUBREG)
55a2c322 4045 x = alter_subreg (&x, true);
3cf2715d 4046
04c7ae48 4047 /* X must not be a pseudo reg. */
a50fa76a
BS
4048 if (!targetm.no_register_allocation)
4049 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3cf2715d 4050
6e2188e0 4051 targetm.asm_out.print_operand (asm_out_file, x, code);
c70d0414
HPN
4052
4053 if (x == NULL_RTX)
4054 return;
4055
effb8a26 4056 mark_symbol_refs_as_used (x);
3cf2715d
DE
4057}
4058
6e2188e0
NF
4059/* Print a memory reference operand for address X using
4060 machine-dependent assembler syntax. */
3cf2715d
DE
4061
4062void
cc8ca59e 4063output_address (machine_mode mode, rtx x)
3cf2715d 4064{
6fb5fa3c
DB
4065 bool changed = false;
4066 walk_alter_subreg (&x, &changed);
cc8ca59e 4067 targetm.asm_out.print_operand_address (asm_out_file, mode, x);
3cf2715d
DE
4068}
4069\f
4070/* Print an integer constant expression in assembler syntax.
4071 Addition and subtraction are the only arithmetic
4072 that may appear in these expressions. */
4073
4074void
6cf9ac28 4075output_addr_const (FILE *file, rtx x)
3cf2715d
DE
4076{
4077 char buf[256];
4078
4079 restart:
4080 switch (GET_CODE (x))
4081 {
4082 case PC:
eac50d7a 4083 putc ('.', file);
3cf2715d
DE
4084 break;
4085
4086 case SYMBOL_REF:
21dad7e6 4087 if (SYMBOL_REF_DECL (x))
152464d2 4088 assemble_external (SYMBOL_REF_DECL (x));
99c8c61c
AO
4089#ifdef ASM_OUTPUT_SYMBOL_REF
4090 ASM_OUTPUT_SYMBOL_REF (file, x);
4091#else
3cf2715d 4092 assemble_name (file, XSTR (x, 0));
99c8c61c 4093#endif
3cf2715d
DE
4094 break;
4095
4096 case LABEL_REF:
04a121a7 4097 x = label_ref_label (x);
422be3c3 4098 /* Fall through. */
3cf2715d
DE
4099 case CODE_LABEL:
4100 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
2f0b7af6
GK
4101#ifdef ASM_OUTPUT_LABEL_REF
4102 ASM_OUTPUT_LABEL_REF (file, buf);
4103#else
3cf2715d 4104 assemble_name (file, buf);
2f0b7af6 4105#endif
3cf2715d
DE
4106 break;
4107
4108 case CONST_INT:
6725cc58 4109 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
4110 break;
4111
4112 case CONST:
4113 /* This used to output parentheses around the expression,
4114 but that does not work on the 386 (either ATT or BSD assembler). */
4115 output_addr_const (file, XEXP (x, 0));
4116 break;
4117
807e902e
KZ
4118 case CONST_WIDE_INT:
4119 /* We do not know the mode here so we have to use a round about
4120 way to build a wide-int to get it printed properly. */
4121 {
4122 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
4123 CONST_WIDE_INT_NUNITS (x),
4124 CONST_WIDE_INT_NUNITS (x)
4125 * HOST_BITS_PER_WIDE_INT,
4126 false);
4127 print_decs (w, file);
4128 }
4129 break;
4130
3cf2715d 4131 case CONST_DOUBLE:
807e902e 4132 if (CONST_DOUBLE_AS_INT_P (x))
3cf2715d
DE
4133 {
4134 /* We can use %d if the number is one word and positive. */
4135 if (CONST_DOUBLE_HIGH (x))
21e3a81b 4136 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3d57d7ce
DK
4137 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
4138 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
f5d927c0 4139 else if (CONST_DOUBLE_LOW (x) < 0)
3d57d7ce
DK
4140 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
4141 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3cf2715d 4142 else
21e3a81b 4143 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
4144 }
4145 else
4146 /* We can't handle floating point constants;
4147 PRINT_OPERAND must handle them. */
4148 output_operand_lossage ("floating constant misused");
4149 break;
4150
14c931f1 4151 case CONST_FIXED:
848fac28 4152 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
14c931f1
CF
4153 break;
4154
3cf2715d
DE
4155 case PLUS:
4156 /* Some assemblers need integer constants to appear last (eg masm). */
481683e1 4157 if (CONST_INT_P (XEXP (x, 0)))
3cf2715d
DE
4158 {
4159 output_addr_const (file, XEXP (x, 1));
4160 if (INTVAL (XEXP (x, 0)) >= 0)
4161 fprintf (file, "+");
4162 output_addr_const (file, XEXP (x, 0));
4163 }
4164 else
4165 {
4166 output_addr_const (file, XEXP (x, 0));
481683e1 4167 if (!CONST_INT_P (XEXP (x, 1))
08106825 4168 || INTVAL (XEXP (x, 1)) >= 0)
3cf2715d
DE
4169 fprintf (file, "+");
4170 output_addr_const (file, XEXP (x, 1));
4171 }
4172 break;
4173
4174 case MINUS:
4175 /* Avoid outputting things like x-x or x+5-x,
4176 since some assemblers can't handle that. */
4177 x = simplify_subtraction (x);
4178 if (GET_CODE (x) != MINUS)
4179 goto restart;
4180
4181 output_addr_const (file, XEXP (x, 0));
4182 fprintf (file, "-");
481683e1 4183 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
301d03af
RS
4184 || GET_CODE (XEXP (x, 1)) == PC
4185 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
4186 output_addr_const (file, XEXP (x, 1));
4187 else
3cf2715d 4188 {
17b53c33 4189 fputs (targetm.asm_out.open_paren, file);
3cf2715d 4190 output_addr_const (file, XEXP (x, 1));
17b53c33 4191 fputs (targetm.asm_out.close_paren, file);
3cf2715d 4192 }
3cf2715d
DE
4193 break;
4194
4195 case ZERO_EXTEND:
4196 case SIGN_EXTEND:
fdf473ae 4197 case SUBREG:
c01e4479 4198 case TRUNCATE:
3cf2715d
DE
4199 output_addr_const (file, XEXP (x, 0));
4200 break;
4201
4202 default:
6cbd8875
AS
4203 if (targetm.asm_out.output_addr_const_extra (file, x))
4204 break;
422be3c3 4205
3cf2715d
DE
4206 output_operand_lossage ("invalid expression as operand");
4207 }
4208}
4209\f
a803773f
JM
4210/* Output a quoted string. */
4211
4212void
4213output_quoted_string (FILE *asm_file, const char *string)
4214{
4215#ifdef OUTPUT_QUOTED_STRING
4216 OUTPUT_QUOTED_STRING (asm_file, string);
4217#else
4218 char c;
4219
4220 putc ('\"', asm_file);
4221 while ((c = *string++) != 0)
4222 {
4223 if (ISPRINT (c))
4224 {
4225 if (c == '\"' || c == '\\')
4226 putc ('\\', asm_file);
4227 putc (c, asm_file);
4228 }
4229 else
4230 fprintf (asm_file, "\\%03o", (unsigned char) c);
4231 }
4232 putc ('\"', asm_file);
4233#endif
4234}
4235\f
5e3929ed
DA
4236/* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4237
4238void
4239fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4240{
4241 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4242 if (value == 0)
4243 putc ('0', f);
4244 else
4245 {
4246 char *p = buf + sizeof (buf);
4247 do
4248 *--p = "0123456789abcdef"[value % 16];
4249 while ((value /= 16) != 0);
4250 *--p = 'x';
4251 *--p = '0';
4252 fwrite (p, 1, buf + sizeof (buf) - p, f);
4253 }
4254}
4255
4256/* Internal function that prints an unsigned long in decimal in reverse.
4257 The output string IS NOT null-terminated. */
4258
4259static int
4260sprint_ul_rev (char *s, unsigned long value)
4261{
4262 int i = 0;
4263 do
4264 {
4265 s[i] = "0123456789"[value % 10];
4266 value /= 10;
4267 i++;
4268 /* alternate version, without modulo */
4269 /* oldval = value; */
4270 /* value /= 10; */
4271 /* s[i] = "0123456789" [oldval - 10*value]; */
4272 /* i++ */
4273 }
4274 while (value != 0);
4275 return i;
4276}
4277
5e3929ed
DA
4278/* Write an unsigned long as decimal to a file, fast. */
4279
4280void
4281fprint_ul (FILE *f, unsigned long value)
4282{
4283 /* python says: len(str(2**64)) == 20 */
4284 char s[20];
4285 int i;
4286
4287 i = sprint_ul_rev (s, value);
4288
4289 /* It's probably too small to bother with string reversal and fputs. */
4290 do
4291 {
4292 i--;
4293 putc (s[i], f);
4294 }
4295 while (i != 0);
4296}
4297
4298/* Write an unsigned long as decimal to a string, fast.
4299 s must be wide enough to not overflow, at least 21 chars.
4300 Returns the length of the string (without terminating '\0'). */
4301
4302int
4303sprint_ul (char *s, unsigned long value)
4304{
fab27f52 4305 int len = sprint_ul_rev (s, value);
5e3929ed
DA
4306 s[len] = '\0';
4307
fab27f52 4308 std::reverse (s, s + len);
5e3929ed
DA
4309 return len;
4310}
4311
3cf2715d
DE
4312/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4313 %R prints the value of REGISTER_PREFIX.
4314 %L prints the value of LOCAL_LABEL_PREFIX.
4315 %U prints the value of USER_LABEL_PREFIX.
4316 %I prints the value of IMMEDIATE_PREFIX.
4317 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
b1721339 4318 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3cf2715d
DE
4319
4320 We handle alternate assembler dialects here, just like output_asm_insn. */
4321
4322void
e34d07f2 4323asm_fprintf (FILE *file, const char *p, ...)
3cf2715d 4324{
3cf2715d
DE
4325 char buf[10];
4326 char *q, c;
d1658619
SP
4327#ifdef ASSEMBLER_DIALECT
4328 int dialect = 0;
4329#endif
e34d07f2 4330 va_list argptr;
6cf9ac28 4331
e34d07f2 4332 va_start (argptr, p);
3cf2715d
DE
4333
4334 buf[0] = '%';
4335
b729186a 4336 while ((c = *p++))
3cf2715d
DE
4337 switch (c)
4338 {
4339#ifdef ASSEMBLER_DIALECT
4340 case '{':
3cf2715d 4341 case '}':
d1658619
SP
4342 case '|':
4343 p = do_assembler_dialects (p, &dialect);
3cf2715d
DE
4344 break;
4345#endif
4346
4347 case '%':
4348 c = *p++;
4349 q = &buf[1];
b1721339
KG
4350 while (strchr ("-+ #0", c))
4351 {
4352 *q++ = c;
4353 c = *p++;
4354 }
0df6c2c7 4355 while (ISDIGIT (c) || c == '.')
3cf2715d
DE
4356 {
4357 *q++ = c;
4358 c = *p++;
4359 }
4360 switch (c)
4361 {
4362 case '%':
b1721339 4363 putc ('%', file);
3cf2715d
DE
4364 break;
4365
4366 case 'd': case 'i': case 'u':
b1721339
KG
4367 case 'x': case 'X': case 'o':
4368 case 'c':
3cf2715d
DE
4369 *q++ = c;
4370 *q = 0;
4371 fprintf (file, buf, va_arg (argptr, int));
4372 break;
4373
4374 case 'w':
b1721339
KG
4375 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4376 'o' cases, but we do not check for those cases. It
4377 means that the value is a HOST_WIDE_INT, which may be
4378 either `long' or `long long'. */
85f015e1
KG
4379 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4380 q += strlen (HOST_WIDE_INT_PRINT);
3cf2715d
DE
4381 *q++ = *p++;
4382 *q = 0;
4383 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4384 break;
4385
4386 case 'l':
4387 *q++ = c;
b1721339
KG
4388#ifdef HAVE_LONG_LONG
4389 if (*p == 'l')
4390 {
4391 *q++ = *p++;
4392 *q++ = *p++;
4393 *q = 0;
4394 fprintf (file, buf, va_arg (argptr, long long));
4395 }
4396 else
4397#endif
4398 {
4399 *q++ = *p++;
4400 *q = 0;
4401 fprintf (file, buf, va_arg (argptr, long));
4402 }
6cf9ac28 4403
3cf2715d
DE
4404 break;
4405
4406 case 's':
4407 *q++ = c;
4408 *q = 0;
4409 fprintf (file, buf, va_arg (argptr, char *));
4410 break;
4411
4412 case 'O':
4413#ifdef ASM_OUTPUT_OPCODE
4414 ASM_OUTPUT_OPCODE (asm_out_file, p);
4415#endif
4416 break;
4417
4418 case 'R':
4419#ifdef REGISTER_PREFIX
4420 fprintf (file, "%s", REGISTER_PREFIX);
4421#endif
4422 break;
4423
4424 case 'I':
4425#ifdef IMMEDIATE_PREFIX
4426 fprintf (file, "%s", IMMEDIATE_PREFIX);
4427#endif
4428 break;
4429
4430 case 'L':
4431#ifdef LOCAL_LABEL_PREFIX
4432 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4433#endif
4434 break;
4435
4436 case 'U':
19283265 4437 fputs (user_label_prefix, file);
3cf2715d
DE
4438 break;
4439
fe0503ea 4440#ifdef ASM_FPRINTF_EXTENSIONS
7ef0daad 4441 /* Uppercase letters are reserved for general use by asm_fprintf
fe0503ea
NC
4442 and so are not available to target specific code. In order to
4443 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4444 they are defined here. As they get turned into real extensions
4445 to asm_fprintf they should be removed from this list. */
4446 case 'A': case 'B': case 'C': case 'D': case 'E':
4447 case 'F': case 'G': case 'H': case 'J': case 'K':
4448 case 'M': case 'N': case 'P': case 'Q': case 'S':
4449 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4450 break;
f5d927c0 4451
fe0503ea
NC
4452 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4453#endif
3cf2715d 4454 default:
0bccc606 4455 gcc_unreachable ();
3cf2715d
DE
4456 }
4457 break;
4458
4459 default:
b1721339 4460 putc (c, file);
3cf2715d 4461 }
e34d07f2 4462 va_end (argptr);
3cf2715d
DE
4463}
4464\f
3cf2715d
DE
4465/* Return nonzero if this function has no function calls. */
4466
4467int
6cf9ac28 4468leaf_function_p (void)
3cf2715d 4469{
fa7af581 4470 rtx_insn *insn;
3cf2715d 4471
00d60013
WD
4472 /* Ensure we walk the entire function body. */
4473 gcc_assert (!in_sequence_p ());
4474
d56a43a0
AK
4475 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4476 functions even if they call mcount. */
4477 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
3cf2715d
DE
4478 return 0;
4479
4480 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4481 {
4b4bf941 4482 if (CALL_P (insn)
7d167afd 4483 && ! SIBLING_CALL_P (insn))
3cf2715d 4484 return 0;
4b4bf941 4485 if (NONJUMP_INSN_P (insn)
3cf2715d 4486 && GET_CODE (PATTERN (insn)) == SEQUENCE
4b4bf941 4487 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
0a1c58a2 4488 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3cf2715d
DE
4489 return 0;
4490 }
3cf2715d
DE
4491
4492 return 1;
4493}
4494
09da1532 4495/* Return 1 if branch is a forward branch.
ef6257cd
JH
4496 Uses insn_shuid array, so it works only in the final pass. May be used by
4497 output templates to customary add branch prediction hints.
4498 */
4499int
fa7af581 4500final_forward_branch_p (rtx_insn *insn)
ef6257cd
JH
4501{
4502 int insn_id, label_id;
b0efb46b 4503
0bccc606 4504 gcc_assert (uid_shuid);
ef6257cd
JH
4505 insn_id = INSN_SHUID (insn);
4506 label_id = INSN_SHUID (JUMP_LABEL (insn));
4507 /* We've hit some insns that does not have id information available. */
0bccc606 4508 gcc_assert (insn_id && label_id);
ef6257cd
JH
4509 return insn_id < label_id;
4510}
4511
3cf2715d
DE
4512/* On some machines, a function with no call insns
4513 can run faster if it doesn't create its own register window.
4514 When output, the leaf function should use only the "output"
4515 registers. Ordinarily, the function would be compiled to use
4516 the "input" registers to find its arguments; it is a candidate
4517 for leaf treatment if it uses only the "input" registers.
4518 Leaf function treatment means renumbering so the function
4519 uses the "output" registers instead. */
4520
4521#ifdef LEAF_REGISTERS
4522
3cf2715d
DE
4523/* Return 1 if this function uses only the registers that can be
4524 safely renumbered. */
4525
4526int
6cf9ac28 4527only_leaf_regs_used (void)
3cf2715d
DE
4528{
4529 int i;
4977bab6 4530 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3cf2715d
DE
4531
4532 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6fb5fa3c 4533 if ((df_regs_ever_live_p (i) || global_regs[i])
e5e809f4
JL
4534 && ! permitted_reg_in_leaf_functions[i])
4535 return 0;
4536
e3b5732b 4537 if (crtl->uses_pic_offset_table
e5e809f4 4538 && pic_offset_table_rtx != 0
f8cfc6aa 4539 && REG_P (pic_offset_table_rtx)
e5e809f4
JL
4540 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4541 return 0;
4542
3cf2715d
DE
4543 return 1;
4544}
4545
4546/* Scan all instructions and renumber all registers into those
4547 available in leaf functions. */
4548
4549static void
fa7af581 4550leaf_renumber_regs (rtx_insn *first)
3cf2715d 4551{
fa7af581 4552 rtx_insn *insn;
3cf2715d
DE
4553
4554 /* Renumber only the actual patterns.
4555 The reg-notes can contain frame pointer refs,
4556 and renumbering them could crash, and should not be needed. */
4557 for (insn = first; insn; insn = NEXT_INSN (insn))
2c3c49de 4558 if (INSN_P (insn))
3cf2715d 4559 leaf_renumber_regs_insn (PATTERN (insn));
3cf2715d
DE
4560}
4561
4562/* Scan IN_RTX and its subexpressions, and renumber all regs into those
4563 available in leaf functions. */
4564
4565void
6cf9ac28 4566leaf_renumber_regs_insn (rtx in_rtx)
3cf2715d 4567{
b3694847
SS
4568 int i, j;
4569 const char *format_ptr;
3cf2715d
DE
4570
4571 if (in_rtx == 0)
4572 return;
4573
4574 /* Renumber all input-registers into output-registers.
4575 renumbered_regs would be 1 for an output-register;
4576 they */
4577
f8cfc6aa 4578 if (REG_P (in_rtx))
3cf2715d
DE
4579 {
4580 int newreg;
4581
4582 /* Don't renumber the same reg twice. */
4583 if (in_rtx->used)
4584 return;
4585
4586 newreg = REGNO (in_rtx);
4587 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4588 to reach here as part of a REG_NOTE. */
4589 if (newreg >= FIRST_PSEUDO_REGISTER)
4590 {
4591 in_rtx->used = 1;
4592 return;
4593 }
4594 newreg = LEAF_REG_REMAP (newreg);
0bccc606 4595 gcc_assert (newreg >= 0);
6fb5fa3c
DB
4596 df_set_regs_ever_live (REGNO (in_rtx), false);
4597 df_set_regs_ever_live (newreg, true);
4598 SET_REGNO (in_rtx, newreg);
3cf2715d 4599 in_rtx->used = 1;
9fccb335 4600 return;
3cf2715d
DE
4601 }
4602
2c3c49de 4603 if (INSN_P (in_rtx))
3cf2715d
DE
4604 {
4605 /* Inside a SEQUENCE, we find insns.
4606 Renumber just the patterns of these insns,
4607 just as we do for the top-level insns. */
4608 leaf_renumber_regs_insn (PATTERN (in_rtx));
4609 return;
4610 }
4611
4612 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4613
4614 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4615 switch (*format_ptr++)
4616 {
4617 case 'e':
4618 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4619 break;
4620
4621 case 'E':
01512446
JJ
4622 if (XVEC (in_rtx, i) != NULL)
4623 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4624 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3cf2715d
DE
4625 break;
4626
4627 case 'S':
4628 case 's':
4629 case '0':
4630 case 'i':
4631 case 'w':
91914e56 4632 case 'p':
3cf2715d
DE
4633 case 'n':
4634 case 'u':
4635 break;
4636
4637 default:
0bccc606 4638 gcc_unreachable ();
3cf2715d
DE
4639 }
4640}
4641#endif
ef330312
PB
4642\f
4643/* Turn the RTL into assembly. */
c2924966 4644static unsigned int
ef330312
PB
4645rest_of_handle_final (void)
4646{
0d4b5b86 4647 const char *fnname = get_fnname_from_decl (current_function_decl);
ef330312 4648
60012ddc
JJ
4649 /* Turn debug markers into notes if the var-tracking pass has not
4650 been invoked. */
4651 if (!flag_var_tracking && MAY_HAVE_DEBUG_MARKER_INSNS)
e3a174d0 4652 delete_vta_debug_insns (false);
96a95ac1 4653
ef330312 4654 assemble_start_function (current_function_decl, fnname);
bd2b9f1e
AO
4655 rtx_insn *first = get_insns ();
4656 int seen = 0;
4657 final_start_function_1 (&first, asm_out_file, &seen, optimize);
4658 final_1 (first, asm_out_file, seen, optimize);
036ea399 4659 if (flag_ipa_ra
820037ec
JJ
4660 && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl))
4661 /* Functions with naked attributes are supported only with basic asm
4662 statements in the body, thus for supported use cases the information
4663 on clobbered registers is not available. */
4664 && !lookup_attribute ("naked", DECL_ATTRIBUTES (current_function_decl)))
27c07cc5 4665 collect_fn_hard_reg_usage ();
ef330312
PB
4666 final_end_function ();
4667
182a0c11
RH
4668 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4669 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4670 Otherwise it's not strictly necessary, but it doesn't hurt either. */
b78b513e 4671 output_function_exception_table (crtl->has_bb_partition ? 1 : 0);
ef330312
PB
4672
4673 assemble_end_function (current_function_decl, fnname);
4674
6fb5fa3c
DB
4675 /* Free up reg info memory. */
4676 free_reg_info ();
4677
ef330312
PB
4678 if (! quiet_flag)
4679 fflush (asm_out_file);
4680
ef330312
PB
4681 /* Write DBX symbols if requested. */
4682
4683 /* Note that for those inline functions where we don't initially
4684 know for certain that we will be generating an out-of-line copy,
4685 the first invocation of this routine (rest_of_compilation) will
4686 skip over this code by doing a `goto exit_rest_of_compilation;'.
4687 Later on, wrapup_global_declarations will (indirectly) call
4688 rest_of_compilation again for those inline functions that need
4689 to have out-of-line copies generated. During that call, we
4690 *will* be routed past here. */
4691
4692 timevar_push (TV_SYMOUT);
725730f2
EB
4693 if (!DECL_IGNORED_P (current_function_decl))
4694 debug_hooks->function_decl (current_function_decl);
ef330312 4695 timevar_pop (TV_SYMOUT);
6b20f353
DS
4696
4697 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4698 DECL_INITIAL (current_function_decl) = error_mark_node;
4699
395a40e0
JH
4700 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4701 && targetm.have_ctors_dtors)
4702 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4703 decl_init_priority_lookup
4704 (current_function_decl));
4705 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4706 && targetm.have_ctors_dtors)
4707 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4708 decl_fini_priority_lookup
4709 (current_function_decl));
c2924966 4710 return 0;
ef330312
PB
4711}
4712
27a4cd48
DM
4713namespace {
4714
4715const pass_data pass_data_final =
ef330312 4716{
27a4cd48
DM
4717 RTL_PASS, /* type */
4718 "final", /* name */
4719 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
4720 TV_FINAL, /* tv_id */
4721 0, /* properties_required */
4722 0, /* properties_provided */
4723 0, /* properties_destroyed */
4724 0, /* todo_flags_start */
4725 0, /* todo_flags_finish */
ef330312
PB
4726};
4727
27a4cd48
DM
4728class pass_final : public rtl_opt_pass
4729{
4730public:
c3284718
RS
4731 pass_final (gcc::context *ctxt)
4732 : rtl_opt_pass (pass_data_final, ctxt)
27a4cd48
DM
4733 {}
4734
4735 /* opt_pass methods: */
be55bfe6 4736 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
27a4cd48
DM
4737
4738}; // class pass_final
4739
4740} // anon namespace
4741
4742rtl_opt_pass *
4743make_pass_final (gcc::context *ctxt)
4744{
4745 return new pass_final (ctxt);
4746}
4747
ef330312 4748
c2924966 4749static unsigned int
ef330312
PB
4750rest_of_handle_shorten_branches (void)
4751{
4752 /* Shorten branches. */
4753 shorten_branches (get_insns ());
c2924966 4754 return 0;
ef330312 4755}
b0efb46b 4756
27a4cd48
DM
4757namespace {
4758
4759const pass_data pass_data_shorten_branches =
ef330312 4760{
27a4cd48
DM
4761 RTL_PASS, /* type */
4762 "shorten", /* name */
4763 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
4764 TV_SHORTEN_BRANCH, /* tv_id */
4765 0, /* properties_required */
4766 0, /* properties_provided */
4767 0, /* properties_destroyed */
4768 0, /* todo_flags_start */
4769 0, /* todo_flags_finish */
ef330312
PB
4770};
4771
27a4cd48
DM
4772class pass_shorten_branches : public rtl_opt_pass
4773{
4774public:
c3284718
RS
4775 pass_shorten_branches (gcc::context *ctxt)
4776 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
27a4cd48
DM
4777 {}
4778
4779 /* opt_pass methods: */
be55bfe6
TS
4780 virtual unsigned int execute (function *)
4781 {
4782 return rest_of_handle_shorten_branches ();
4783 }
27a4cd48
DM
4784
4785}; // class pass_shorten_branches
4786
4787} // anon namespace
4788
4789rtl_opt_pass *
4790make_pass_shorten_branches (gcc::context *ctxt)
4791{
4792 return new pass_shorten_branches (ctxt);
4793}
4794
ef330312 4795
c2924966 4796static unsigned int
ef330312
PB
4797rest_of_clean_state (void)
4798{
fa7af581 4799 rtx_insn *insn, *next;
2153915d
AO
4800 FILE *final_output = NULL;
4801 int save_unnumbered = flag_dump_unnumbered;
4802 int save_noaddr = flag_dump_noaddr;
4803
4804 if (flag_dump_final_insns)
4805 {
4806 final_output = fopen (flag_dump_final_insns, "a");
4807 if (!final_output)
4808 {
7ca92787
JM
4809 error ("could not open final insn dump file %qs: %m",
4810 flag_dump_final_insns);
2153915d
AO
4811 flag_dump_final_insns = NULL;
4812 }
4813 else
4814 {
2153915d 4815 flag_dump_noaddr = flag_dump_unnumbered = 1;
c7ba0cfb 4816 if (flag_compare_debug_opt || flag_compare_debug)
171a55e7 4817 dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG;
6d8402ac
AO
4818 dump_function_header (final_output, current_function_decl,
4819 dump_flags);
6ca5d1f6 4820 final_insns_dump_p = true;
2153915d
AO
4821
4822 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4823 if (LABEL_P (insn))
4824 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4825 else
a59d15cf
AO
4826 {
4827 if (NOTE_P (insn))
4828 set_block_for_insn (insn, NULL);
4829 INSN_UID (insn) = 0;
4830 }
2153915d
AO
4831 }
4832 }
ef330312
PB
4833
4834 /* It is very important to decompose the RTL instruction chain here:
4835 debug information keeps pointing into CODE_LABEL insns inside the function
4836 body. If these remain pointing to the other insns, we end up preserving
4837 whole RTL chain and attached detailed debug info in memory. */
4838 for (insn = get_insns (); insn; insn = next)
4839 {
4840 next = NEXT_INSN (insn);
0f82e5c9
DM
4841 SET_NEXT_INSN (insn) = NULL;
4842 SET_PREV_INSN (insn) = NULL;
2153915d 4843
24086c20
EB
4844 rtx_insn *call_insn = insn;
4845 if (NONJUMP_INSN_P (call_insn)
4846 && GET_CODE (PATTERN (call_insn)) == SEQUENCE)
00b94487 4847 {
24086c20
EB
4848 rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (call_insn));
4849 call_insn = seq->insn (0);
4850 }
4851 if (CALL_P (call_insn))
4852 {
4853 rtx note
4854 = find_reg_note (call_insn, REG_CALL_ARG_LOCATION, NULL_RTX);
00b94487 4855 if (note)
24086c20 4856 remove_note (call_insn, note);
00b94487
JJ
4857 }
4858
2153915d 4859 if (final_output
00b94487
JJ
4860 && (!NOTE_P (insn)
4861 || (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4862 && NOTE_KIND (insn) != NOTE_INSN_BEGIN_STMT
4863 && NOTE_KIND (insn) != NOTE_INSN_INLINE_ENTRY
4864 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4865 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4866 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
2153915d 4867 print_rtl_single (final_output, insn);
2153915d
AO
4868 }
4869
4870 if (final_output)
4871 {
4872 flag_dump_noaddr = save_noaddr;
4873 flag_dump_unnumbered = save_unnumbered;
6ca5d1f6 4874 final_insns_dump_p = false;
2153915d
AO
4875
4876 if (fclose (final_output))
4877 {
7ca92787
JM
4878 error ("could not close final insn dump file %qs: %m",
4879 flag_dump_final_insns);
2153915d
AO
4880 flag_dump_final_insns = NULL;
4881 }
ef330312
PB
4882 }
4883
5f39ad47 4884 flag_rerun_cse_after_global_opts = 0;
ef330312
PB
4885 reload_completed = 0;
4886 epilogue_completed = 0;
23249ac4
DB
4887#ifdef STACK_REGS
4888 regstack_completed = 0;
4889#endif
ef330312
PB
4890
4891 /* Clear out the insn_length contents now that they are no
4892 longer valid. */
4893 init_insn_lengths ();
4894
4895 /* Show no temporary slots allocated. */
4896 init_temp_slots ();
4897
ef330312
PB
4898 free_bb_for_insn ();
4899
c2e84327
DM
4900 if (cfun->gimple_df)
4901 delete_tree_ssa (cfun);
55b34b5f 4902
051f8cc6
JH
4903 /* We can reduce stack alignment on call site only when we are sure that
4904 the function body just produced will be actually used in the final
4905 executable. */
47b840eb
ML
4906 if (flag_ipa_stack_alignment
4907 && decl_binds_to_current_def_p (current_function_decl))
ef330312 4908 {
17b29c0a 4909 unsigned int pref = crtl->preferred_stack_boundary;
cb91fab0
JH
4910 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4911 pref = crtl->stack_alignment_needed;
3dafb85c
ML
4912 cgraph_node::rtl_info (current_function_decl)
4913 ->preferred_incoming_stack_boundary = pref;
ef330312
PB
4914 }
4915
4916 /* Make sure volatile mem refs aren't considered valid operands for
4917 arithmetic insns. We must call this here if this is a nested inline
4918 function, since the above code leaves us in the init_recog state,
4919 and the function context push/pop code does not save/restore volatile_ok.
4920
4921 ??? Maybe it isn't necessary for expand_start_function to call this
4922 anymore if we do it here? */
4923
4924 init_recog_no_volatile ();
4925
4926 /* We're done with this function. Free up memory if we can. */
4927 free_after_parsing (cfun);
4928 free_after_compilation (cfun);
c2924966 4929 return 0;
ef330312
PB
4930}
4931
27a4cd48
DM
4932namespace {
4933
4934const pass_data pass_data_clean_state =
ef330312 4935{
27a4cd48
DM
4936 RTL_PASS, /* type */
4937 "*clean_state", /* name */
4938 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
4939 TV_FINAL, /* tv_id */
4940 0, /* properties_required */
4941 0, /* properties_provided */
4942 PROP_rtl, /* properties_destroyed */
4943 0, /* todo_flags_start */
4944 0, /* todo_flags_finish */
ef330312 4945};
27a4cd48
DM
4946
4947class pass_clean_state : public rtl_opt_pass
4948{
4949public:
c3284718
RS
4950 pass_clean_state (gcc::context *ctxt)
4951 : rtl_opt_pass (pass_data_clean_state, ctxt)
27a4cd48
DM
4952 {}
4953
4954 /* opt_pass methods: */
be55bfe6
TS
4955 virtual unsigned int execute (function *)
4956 {
4957 return rest_of_clean_state ();
4958 }
27a4cd48
DM
4959
4960}; // class pass_clean_state
4961
4962} // anon namespace
4963
4964rtl_opt_pass *
4965make_pass_clean_state (gcc::context *ctxt)
4966{
4967 return new pass_clean_state (ctxt);
4968}
27c07cc5 4969
026c3cfd 4970/* Return true if INSN is a call to the current function. */
26e288ba
TV
4971
4972static bool
fa7af581 4973self_recursive_call_p (rtx_insn *insn)
26e288ba
TV
4974{
4975 tree fndecl = get_call_fndecl (insn);
4976 return (fndecl == current_function_decl
4977 && decl_binds_to_current_def_p (fndecl));
4978}
4979
27c07cc5
RO
4980/* Collect hard register usage for the current function. */
4981
4982static void
4983collect_fn_hard_reg_usage (void)
4984{
fa7af581 4985 rtx_insn *insn;
4b29b965 4986#ifdef STACK_REGS
27c07cc5 4987 int i;
4b29b965 4988#endif
27c07cc5 4989 struct cgraph_rtl_info *node;
53f2f6c1 4990 HARD_REG_SET function_used_regs;
27c07cc5
RO
4991
4992 /* ??? To be removed when all the ports have been fixed. */
4993 if (!targetm.call_fusage_contains_non_callee_clobbers)
4994 return;
4995
5a5a3bc5
RS
4996 /* Be conservative - mark fixed and global registers as used. */
4997 function_used_regs = fixed_reg_set;
4998
4999#ifdef STACK_REGS
5000 /* Handle STACK_REGS conservatively, since the df-framework does not
5001 provide accurate information for them. */
5002
5003 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
5004 SET_HARD_REG_BIT (function_used_regs, i);
5005#endif
27c07cc5
RO
5006
5007 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
5008 {
5009 HARD_REG_SET insn_used_regs;
5010
5011 if (!NONDEBUG_INSN_P (insn))
5012 continue;
5013
26e288ba
TV
5014 if (CALL_P (insn)
5015 && !self_recursive_call_p (insn))
5a5a3bc5
RS
5016 function_used_regs
5017 |= insn_callee_abi (insn).full_and_partial_reg_clobbers ();
27c07cc5 5018
6621ab68 5019 find_all_hard_reg_sets (insn, &insn_used_regs, false);
44942965 5020 function_used_regs |= insn_used_regs;
27c07cc5 5021
5a5a3bc5
RS
5022 if (hard_reg_set_subset_p (crtl->abi->full_and_partial_reg_clobbers (),
5023 function_used_regs))
5024 return;
5025 }
27c07cc5 5026
5a5a3bc5
RS
5027 /* Mask out fully-saved registers, so that they don't affect equality
5028 comparisons between function_abis. */
5029 function_used_regs &= crtl->abi->full_and_partial_reg_clobbers ();
5fea8186 5030
3dafb85c 5031 node = cgraph_node::rtl_info (current_function_decl);
53f2f6c1
TV
5032 gcc_assert (node != NULL);
5033
6576d245 5034 node->function_used_regs = function_used_regs;
27c07cc5 5035}