]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/regcprop.cc
Update copyright years.
[thirdparty/gcc.git] / gcc / regcprop.cc
CommitLineData
fac41238 1/* Copy propagation on hard registers for the GNU compiler.
a945c346 2 Copyright (C) 2000-2024 Free Software Foundation, Inc.
fac41238
PB
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
c7131fb2 23#include "backend.h"
fac41238 24#include "rtl.h"
c7131fb2 25#include "df.h"
4d0cdd0c 26#include "memmodel.h"
fac41238
PB
27#include "tm_p.h"
28#include "insn-config.h"
29#include "regs.h"
957060b5
AM
30#include "emit-rtl.h"
31#include "recog.h"
32#include "diagnostic-core.h"
fac41238 33#include "addresses.h"
fac41238 34#include "tree-pass.h"
4ca738b3 35#include "rtl-iter.h"
c049b107 36#include "cfgrtl.h"
80ec73f4 37#include "target.h"
5a5a3bc5 38#include "function-abi.h"
fac41238
PB
39
40/* The following code does forward propagation of hard register copies.
41 The object is to eliminate as many dependencies as possible, so that
42 we have the most scheduling freedom. As a side effect, we also clean
43 up some silly register allocation decisions made by reload. This
44 code may be obsoleted by a new register allocator. */
45
e7140c8d
JJ
46/* DEBUG_INSNs aren't changed right away, as doing so might extend the
47 lifetime of a register and get the DEBUG_INSN subsequently reset.
48 So they are queued instead, and updated only when the register is
49 used in some subsequent real insn before it is set. */
50struct queued_debug_insn_change
51{
52 struct queued_debug_insn_change *next;
ea8175a4 53 rtx_insn *insn;
e7140c8d
JJ
54 rtx *loc;
55 rtx new_rtx;
56};
57
fac41238
PB
58/* For each register, we have a list of registers that contain the same
59 value. The OLDEST_REGNO field points to the head of the list, and
60 the NEXT_REGNO field runs through the list. The MODE field indicates
61 what mode the data is known to be in; this field is VOIDmode when the
62 register is not known to contain valid data. */
63
64struct value_data_entry
65{
ef4bddc2 66 machine_mode mode;
fac41238
PB
67 unsigned int oldest_regno;
68 unsigned int next_regno;
e7140c8d 69 struct queued_debug_insn_change *debug_insn_changes;
fac41238
PB
70};
71
72struct value_data
73{
74 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
75 unsigned int max_value_regs;
e7140c8d 76 unsigned int n_debug_insn_changes;
fac41238
PB
77};
78
fb0b2914 79static object_allocator<queued_debug_insn_change> queued_debug_insn_change_pool
fcb87c50 80 ("debug insn changes pool");
5c7337c5 81
a2e6c10c 82static bool skip_debug_insn_p;
e7140c8d 83
fac41238
PB
84static void kill_value_one_regno (unsigned, struct value_data *);
85static void kill_value_regno (unsigned, unsigned, struct value_data *);
4ca738b3 86static void kill_value (const_rtx, struct value_data *);
ef4bddc2 87static void set_value_regno (unsigned, machine_mode, struct value_data *);
fac41238
PB
88static void init_value_data (struct value_data *);
89static void kill_clobbered_value (rtx, const_rtx, void *);
90static void kill_set_value (rtx, const_rtx, void *);
fac41238 91static void copy_value (rtx, rtx, struct value_data *);
ef4bddc2 92static bool mode_change_ok (machine_mode, machine_mode,
fac41238 93 unsigned int);
ef4bddc2
RS
94static rtx maybe_mode_change (machine_mode, machine_mode,
95 machine_mode, unsigned int, unsigned int);
fac41238 96static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
ea8175a4 97static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
fac41238
PB
98 struct value_data *);
99static bool replace_oldest_value_addr (rtx *, enum reg_class,
ef4bddc2 100 machine_mode, addr_space_t,
ea8175a4
DM
101 rtx_insn *, struct value_data *);
102static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
fac41238
PB
103static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
104extern void debug_value_data (struct value_data *);
fac41238 105static void validate_value_data (struct value_data *);
fac41238 106
e7140c8d
JJ
107/* Free all queued updates for DEBUG_INSNs that change some reg to
108 register REGNO. */
109
110static void
111free_debug_insn_changes (struct value_data *vd, unsigned int regno)
112{
113 struct queued_debug_insn_change *cur, *next;
114 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
115 {
116 next = cur->next;
117 --vd->n_debug_insn_changes;
fb0b2914 118 queued_debug_insn_change_pool.remove (cur);
e7140c8d
JJ
119 }
120 vd->e[regno].debug_insn_changes = NULL;
121}
122
fac41238
PB
123/* Kill register REGNO. This involves removing it from any value
124 lists, and resetting the value mode to VOIDmode. This is only a
125 helper function; it does not handle any hard registers overlapping
126 with REGNO. */
127
128static void
129kill_value_one_regno (unsigned int regno, struct value_data *vd)
130{
131 unsigned int i, next;
132
133 if (vd->e[regno].oldest_regno != regno)
134 {
135 for (i = vd->e[regno].oldest_regno;
136 vd->e[i].next_regno != regno;
137 i = vd->e[i].next_regno)
138 continue;
139 vd->e[i].next_regno = vd->e[regno].next_regno;
140 }
141 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
142 {
143 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
144 vd->e[i].oldest_regno = next;
145 }
146
147 vd->e[regno].mode = VOIDmode;
148 vd->e[regno].oldest_regno = regno;
149 vd->e[regno].next_regno = INVALID_REGNUM;
e7140c8d
JJ
150 if (vd->e[regno].debug_insn_changes)
151 free_debug_insn_changes (vd, regno);
fac41238 152
b2b29377
MM
153 if (flag_checking)
154 validate_value_data (vd);
fac41238
PB
155}
156
157/* Kill the value in register REGNO for NREGS, and any other registers
158 whose values overlap. */
159
160static void
161kill_value_regno (unsigned int regno, unsigned int nregs,
162 struct value_data *vd)
163{
164 unsigned int j;
165
166 /* Kill the value we're told to kill. */
167 for (j = 0; j < nregs; ++j)
168 kill_value_one_regno (regno + j, vd);
169
170 /* Kill everything that overlapped what we're told to kill. */
171 if (regno < vd->max_value_regs)
172 j = 0;
173 else
174 j = regno - vd->max_value_regs;
175 for (; j < regno; ++j)
176 {
177 unsigned int i, n;
178 if (vd->e[j].mode == VOIDmode)
179 continue;
ad474626 180 n = hard_regno_nregs (j, vd->e[j].mode);
fac41238
PB
181 if (j + n > regno)
182 for (i = 0; i < n; ++i)
183 kill_value_one_regno (j + i, vd);
184 }
185}
186
187/* Kill X. This is a convenience function wrapping kill_value_regno
188 so that we mind the mode the register is in. */
189
190static void
4ca738b3 191kill_value (const_rtx x, struct value_data *vd)
fac41238 192{
fac41238
PB
193 if (GET_CODE (x) == SUBREG)
194 {
4ca738b3
RS
195 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
196 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
197 x = tmp ? tmp : SUBREG_REG (x);
fac41238
PB
198 }
199 if (REG_P (x))
dc8afb70 200 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
fac41238
PB
201}
202
203/* Remember that REGNO is valid in MODE. */
204
205static void
ef4bddc2 206set_value_regno (unsigned int regno, machine_mode mode,
fac41238
PB
207 struct value_data *vd)
208{
209 unsigned int nregs;
210
211 vd->e[regno].mode = mode;
212
ad474626 213 nregs = hard_regno_nregs (regno, mode);
fac41238
PB
214 if (nregs > vd->max_value_regs)
215 vd->max_value_regs = nregs;
216}
217
218/* Initialize VD such that there are no known relationships between regs. */
219
220static void
221init_value_data (struct value_data *vd)
222{
223 int i;
224 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
225 {
226 vd->e[i].mode = VOIDmode;
227 vd->e[i].oldest_regno = i;
228 vd->e[i].next_regno = INVALID_REGNUM;
e7140c8d 229 vd->e[i].debug_insn_changes = NULL;
fac41238
PB
230 }
231 vd->max_value_regs = 0;
e7140c8d 232 vd->n_debug_insn_changes = 0;
fac41238
PB
233}
234
235/* Called through note_stores. If X is clobbered, kill its value. */
236
237static void
238kill_clobbered_value (rtx x, const_rtx set, void *data)
239{
240 struct value_data *const vd = (struct value_data *) data;
8df47bdf 241
17d184e5 242 if (GET_CODE (set) == CLOBBER)
fac41238
PB
243 kill_value (x, vd);
244}
245
e384e6b5
BS
246/* A structure passed as data to kill_set_value through note_stores. */
247struct kill_set_value_data
248{
249 struct value_data *vd;
250 rtx ignore_set_reg;
251};
252
fac41238
PB
253/* Called through note_stores. If X is set, not clobbered, kill its
254 current value and install it as the root of its own value list. */
255
256static void
257kill_set_value (rtx x, const_rtx set, void *data)
258{
e384e6b5
BS
259 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
260 if (rtx_equal_p (x, ksvd->ignore_set_reg))
261 return;
8df47bdf 262
17d184e5 263 if (GET_CODE (set) != CLOBBER)
fac41238 264 {
e384e6b5 265 kill_value (x, ksvd->vd);
fac41238 266 if (REG_P (x))
e384e6b5 267 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
fac41238
PB
268 }
269}
270
4ca738b3
RS
271/* Kill any register used in X as the base of an auto-increment expression,
272 and install that register as the root of its own value list. */
fac41238 273
4ca738b3 274static void
15cd50fb 275kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
fac41238 276{
4ca738b3
RS
277 subrtx_iterator::array_type array;
278 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
fac41238 279 {
4ca738b3
RS
280 const_rtx x = *iter;
281 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
282 {
283 x = XEXP (x, 0);
284 kill_value (x, vd);
285 set_value_regno (REGNO (x), GET_MODE (x), vd);
286 iter.skip_subrtxes ();
287 }
fac41238 288 }
fac41238
PB
289}
290
291/* Assert that SRC has been copied to DEST. Adjust the data structures
292 to reflect that SRC contains an older copy of the shared value. */
293
294static void
295copy_value (rtx dest, rtx src, struct value_data *vd)
296{
297 unsigned int dr = REGNO (dest);
298 unsigned int sr = REGNO (src);
299 unsigned int dn, sn;
300 unsigned int i;
301
302 /* ??? At present, it's possible to see noop sets. It'd be nice if
303 this were cleaned up beforehand... */
304 if (sr == dr)
305 return;
306
307 /* Do not propagate copies to the stack pointer, as that can leave
308 memory accesses with no scheduling dependency on the stack update. */
309 if (dr == STACK_POINTER_REGNUM)
310 return;
311
312 /* Likewise with the frame pointer, if we're using one. */
313 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
314 return;
315
316 /* Do not propagate copies to fixed or global registers, patterns
317 can be relying to see particular fixed register or users can
318 expect the chosen global register in asm. */
319 if (fixed_regs[dr] || global_regs[dr])
320 return;
321
322 /* If SRC and DEST overlap, don't record anything. */
dc8afb70
RS
323 dn = REG_NREGS (dest);
324 sn = REG_NREGS (src);
fac41238
PB
325 if ((dr > sr && dr < sr + sn)
326 || (sr > dr && sr < dr + dn))
327 return;
328
329 /* If SRC had no assigned mode (i.e. we didn't know it was live)
330 assign it now and assume the value came from an input argument
331 or somesuch. */
332 if (vd->e[sr].mode == VOIDmode)
333 set_value_regno (sr, vd->e[dr].mode, vd);
334
335 /* If we are narrowing the input to a smaller number of hard regs,
336 and it is in big endian, we are really extracting a high part.
337 Since we generally associate a low part of a value with the value itself,
338 we must not do the same for the high part.
339 Note we can still get low parts for the same mode combination through
340 a two-step copy involving differently sized hard regs.
026c3cfd 341 Assume hard regs fr* are 32 bits each, while r* are 64 bits each:
fac41238
PB
342 (set (reg:DI r0) (reg:DI fr0))
343 (set (reg:SI fr2) (reg:SI r0))
344 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
345 (set (reg:SI fr2) (reg:SI fr0))
346 loads the high part of (reg:DI fr0) into fr2.
347
348 We can't properly represent the latter case in our tables, so don't
349 record anything then. */
ad474626 350 else if (sn < hard_regno_nregs (sr, vd->e[sr].mode)
91914e56
RS
351 && maybe_ne (subreg_lowpart_offset (GET_MODE (dest),
352 vd->e[sr].mode), 0U))
fac41238
PB
353 return;
354
355 /* If SRC had been assigned a mode narrower than the copy, we can't
356 link DEST into the chain, because not all of the pieces of the
357 copy came from oldest_regno. */
ad474626 358 else if (sn > hard_regno_nregs (sr, vd->e[sr].mode))
fac41238
PB
359 return;
360
425ad87d
JJ
361 /* If a narrower value is copied using wider mode, the upper bits
362 are undefined (could be e.g. a former paradoxical subreg). Signal
363 in that case we've only copied value using the narrower mode.
364 Consider:
365 (set (reg:DI r14) (mem:DI ...))
366 (set (reg:QI si) (reg:QI r14))
367 (set (reg:DI bp) (reg:DI r14))
368 (set (reg:DI r14) (const_int ...))
369 (set (reg:DI dx) (reg:DI si))
370 (set (reg:DI si) (const_int ...))
371 (set (reg:DI dx) (reg:DI bp))
372 The last set is not redundant, while the low 8 bits of dx are already
373 equal to low 8 bits of bp, the other bits are undefined. */
374 else if (partial_subreg_p (vd->e[sr].mode, GET_MODE (src)))
375 {
376 if (!REG_CAN_CHANGE_MODE_P (sr, GET_MODE (src), vd->e[sr].mode)
377 || !REG_CAN_CHANGE_MODE_P (dr, vd->e[sr].mode, GET_MODE (dest)))
378 return;
379 set_value_regno (dr, vd->e[sr].mode, vd);
380 }
e711b67a 381
fac41238
PB
382 /* Link DR at the end of the value chain used by SR. */
383
384 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
385
386 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
387 continue;
388 vd->e[i].next_regno = dr;
389
b2b29377
MM
390 if (flag_checking)
391 validate_value_data (vd);
fac41238
PB
392}
393
394/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
395
396static bool
ef4bddc2 397mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
fac41238
PB
398 unsigned int regno ATTRIBUTE_UNUSED)
399{
bd4288c0 400 if (partial_subreg_p (orig_mode, new_mode))
fac41238
PB
401 return false;
402
0d803030 403 return REG_CAN_CHANGE_MODE_P (regno, orig_mode, new_mode);
fac41238
PB
404}
405
406/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
407 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
408 in NEW_MODE.
409 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
410
411static rtx
ef4bddc2
RS
412maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
413 machine_mode new_mode, unsigned int regno,
fac41238
PB
414 unsigned int copy_regno ATTRIBUTE_UNUSED)
415{
bd4288c0
RS
416 if (partial_subreg_p (copy_mode, orig_mode)
417 && partial_subreg_p (copy_mode, new_mode))
fac41238
PB
418 return NULL_RTX;
419
d1446456
JL
420 /* Avoid creating multiple copies of the stack pointer. Some ports
421 assume there is one and only one stack pointer.
422
423 It's unclear if we need to do the same for other special registers. */
424 if (regno == STACK_POINTER_REGNUM)
6a2e8dcb 425 {
893883f2 426 if (orig_mode == new_mode && new_mode == GET_MODE (stack_pointer_rtx))
6a2e8dcb
MT
427 return stack_pointer_rtx;
428 else
429 return NULL_RTX;
430 }
d1446456 431
fac41238 432 if (orig_mode == new_mode)
9fccb335 433 return gen_raw_REG (new_mode, regno);
b9ebf6c3
AK
434 else if (mode_change_ok (orig_mode, new_mode, regno)
435 && mode_change_ok (copy_mode, new_mode, copy_regno))
fac41238 436 {
ad474626
RS
437 int copy_nregs = hard_regno_nregs (copy_regno, copy_mode);
438 int use_nregs = hard_regno_nregs (copy_regno, new_mode);
cf098191
RS
439 poly_uint64 bytes_per_reg;
440 if (!can_div_trunc_p (GET_MODE_SIZE (copy_mode),
441 copy_nregs, &bytes_per_reg))
442 return NULL_RTX;
443 poly_uint64 copy_offset = bytes_per_reg * (copy_nregs - use_nregs);
91914e56 444 poly_uint64 offset
e10326ff
RS
445 = subreg_size_lowpart_offset (GET_MODE_SIZE (new_mode) + copy_offset,
446 GET_MODE_SIZE (orig_mode));
d6f23738 447 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
f939c3e6 448 if (targetm.hard_regno_mode_ok (regno, new_mode))
9fccb335 449 return gen_raw_REG (new_mode, regno);
fac41238
PB
450 }
451 return NULL_RTX;
452}
453
454/* Find the oldest copy of the value contained in REGNO that is in
455 register class CL and has mode MODE. If found, return an rtx
456 of that oldest register, otherwise return NULL. */
457
458static rtx
459find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
460{
461 unsigned int regno = REGNO (reg);
ef4bddc2 462 machine_mode mode = GET_MODE (reg);
fac41238
PB
463 unsigned int i;
464
65f4b875
AO
465 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
466
fac41238
PB
467 /* If we are accessing REG in some mode other that what we set it in,
468 make sure that the replacement is valid. In particular, consider
469 (set (reg:DI r11) (...))
470 (set (reg:SI r9) (reg:SI r11))
471 (set (reg:SI r10) (...))
472 (set (...) (reg:DI r9))
473 Replacing r9 with r11 is invalid. */
462a99aa 474 if (mode != vd->e[regno].mode
a28cc94a
SSF
475 && (REG_NREGS (reg) > hard_regno_nregs (regno, vd->e[regno].mode)
476 || !REG_CAN_CHANGE_MODE_P (regno, mode, vd->e[regno].mode)))
462a99aa 477 return NULL_RTX;
fac41238
PB
478
479 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
480 {
ef4bddc2 481 machine_mode oldmode = vd->e[i].mode;
fac41238
PB
482 rtx new_rtx;
483
484 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
f90333eb 485 continue;
fac41238
PB
486
487 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
488 if (new_rtx)
adfc236c
MT
489 {
490 /* NEW_RTX may be the global stack pointer rtx, in which case we
491 must not modify it's attributes. */
492 if (new_rtx != stack_pointer_rtx)
493 {
494 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
495 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
496 REG_POINTER (new_rtx) = REG_POINTER (reg);
497 }
498 return new_rtx;
499 }
fac41238
PB
500 }
501
502 return NULL_RTX;
503}
504
505/* If possible, replace the register at *LOC with the oldest register
506 in register class CL. Return true if successfully replaced. */
507
508static bool
ea8175a4 509replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
fac41238
PB
510 struct value_data *vd)
511{
512 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
a2e6c10c 513 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
fac41238 514 {
e7140c8d
JJ
515 if (DEBUG_INSN_P (insn))
516 {
517 struct queued_debug_insn_change *change;
518
519 if (dump_file)
520 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
521 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
522
fb0b2914 523 change = queued_debug_insn_change_pool.allocate ();
e7140c8d
JJ
524 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
525 change->insn = insn;
526 change->loc = loc;
527 change->new_rtx = new_rtx;
528 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
529 ++vd->n_debug_insn_changes;
530 return true;
531 }
fac41238
PB
532 if (dump_file)
533 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
534 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
535
536 validate_change (insn, loc, new_rtx, 1);
537 return true;
538 }
539 return false;
540}
541
542/* Similar to replace_oldest_value_reg, but *LOC contains an address.
543 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
544 BASE_REG_CLASS depending on how the register is being considered. */
545
546static bool
547replace_oldest_value_addr (rtx *loc, enum reg_class cl,
ef4bddc2 548 machine_mode mode, addr_space_t as,
ea8175a4 549 rtx_insn *insn, struct value_data *vd)
fac41238
PB
550{
551 rtx x = *loc;
552 RTX_CODE code = GET_CODE (x);
553 const char *fmt;
554 int i, j;
555 bool changed = false;
556
557 switch (code)
558 {
559 case PLUS:
b5b8b0ac
AO
560 if (DEBUG_INSN_P (insn))
561 break;
562
fac41238
PB
563 {
564 rtx orig_op0 = XEXP (x, 0);
565 rtx orig_op1 = XEXP (x, 1);
566 RTX_CODE code0 = GET_CODE (orig_op0);
567 RTX_CODE code1 = GET_CODE (orig_op1);
568 rtx op0 = orig_op0;
569 rtx op1 = orig_op1;
570 rtx *locI = NULL;
571 rtx *locB = NULL;
572 enum rtx_code index_code = SCRATCH;
573
574 if (GET_CODE (op0) == SUBREG)
575 {
576 op0 = SUBREG_REG (op0);
577 code0 = GET_CODE (op0);
578 }
579
580 if (GET_CODE (op1) == SUBREG)
581 {
582 op1 = SUBREG_REG (op1);
583 code1 = GET_CODE (op1);
584 }
585
586 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
587 || code0 == ZERO_EXTEND || code1 == MEM)
588 {
589 locI = &XEXP (x, 0);
590 locB = &XEXP (x, 1);
591 index_code = GET_CODE (*locI);
592 }
593 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
594 || code1 == ZERO_EXTEND || code0 == MEM)
595 {
596 locI = &XEXP (x, 1);
597 locB = &XEXP (x, 0);
598 index_code = GET_CODE (*locI);
599 }
600 else if (code0 == CONST_INT || code0 == CONST
601 || code0 == SYMBOL_REF || code0 == LABEL_REF)
602 {
603 locB = &XEXP (x, 1);
604 index_code = GET_CODE (XEXP (x, 0));
605 }
606 else if (code1 == CONST_INT || code1 == CONST
607 || code1 == SYMBOL_REF || code1 == LABEL_REF)
608 {
609 locB = &XEXP (x, 0);
610 index_code = GET_CODE (XEXP (x, 1));
611 }
612 else if (code0 == REG && code1 == REG)
613 {
614 int index_op;
615 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
616
617 if (REGNO_OK_FOR_INDEX_P (regno1)
86fc3d06 618 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
fac41238
PB
619 index_op = 1;
620 else if (REGNO_OK_FOR_INDEX_P (regno0)
86fc3d06 621 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238 622 index_op = 0;
86fc3d06 623 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
fac41238
PB
624 || REGNO_OK_FOR_INDEX_P (regno1))
625 index_op = 1;
86fc3d06 626 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238
PB
627 index_op = 0;
628 else
629 index_op = 1;
630
631 locI = &XEXP (x, index_op);
632 locB = &XEXP (x, !index_op);
633 index_code = GET_CODE (*locI);
634 }
635 else if (code0 == REG)
636 {
637 locI = &XEXP (x, 0);
638 locB = &XEXP (x, 1);
639 index_code = GET_CODE (*locI);
640 }
641 else if (code1 == REG)
642 {
643 locI = &XEXP (x, 1);
644 locB = &XEXP (x, 0);
645 index_code = GET_CODE (*locI);
646 }
647
648 if (locI)
86fc3d06
UW
649 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
650 mode, as, insn, vd);
fac41238
PB
651 if (locB)
652 changed |= replace_oldest_value_addr (locB,
86fc3d06 653 base_reg_class (mode, as, PLUS,
fac41238 654 index_code),
86fc3d06 655 mode, as, insn, vd);
fac41238
PB
656 return changed;
657 }
658
659 case POST_INC:
660 case POST_DEC:
661 case POST_MODIFY:
662 case PRE_INC:
663 case PRE_DEC:
664 case PRE_MODIFY:
665 return false;
666
667 case MEM:
668 return replace_oldest_value_mem (x, insn, vd);
669
670 case REG:
671 return replace_oldest_value_reg (loc, cl, insn, vd);
672
673 default:
674 break;
675 }
676
677 fmt = GET_RTX_FORMAT (code);
678 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
679 {
680 if (fmt[i] == 'e')
86fc3d06 681 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
fac41238
PB
682 insn, vd);
683 else if (fmt[i] == 'E')
684 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
685 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
86fc3d06 686 mode, as, insn, vd);
fac41238
PB
687 }
688
689 return changed;
690}
691
692/* Similar to replace_oldest_value_reg, but X contains a memory. */
693
694static bool
ea8175a4 695replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
fac41238 696{
b5b8b0ac
AO
697 enum reg_class cl;
698
699 if (DEBUG_INSN_P (insn))
700 cl = ALL_REGS;
701 else
86fc3d06 702 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
b5b8b0ac
AO
703
704 return replace_oldest_value_addr (&XEXP (x, 0), cl,
86fc3d06
UW
705 GET_MODE (x), MEM_ADDR_SPACE (x),
706 insn, vd);
fac41238
PB
707}
708
e7140c8d
JJ
709/* Apply all queued updates for DEBUG_INSNs that change some reg to
710 register REGNO. */
711
712static void
713apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
714{
715 struct queued_debug_insn_change *change;
ea8175a4 716 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
e7140c8d
JJ
717
718 for (change = vd->e[regno].debug_insn_changes;
719 change;
720 change = change->next)
721 {
722 if (last_insn != change->insn)
723 {
724 apply_change_group ();
725 last_insn = change->insn;
726 }
727 validate_change (change->insn, change->loc, change->new_rtx, 1);
728 }
729 apply_change_group ();
730}
731
e7140c8d
JJ
732/* Called via note_uses, for all used registers in a real insn
733 apply DEBUG_INSN changes that change registers to the used
734 registers. */
735
736static void
0d2e76b8 737cprop_find_used_regs (rtx *loc, void *data)
e7140c8d 738{
0d2e76b8
RS
739 struct value_data *const vd = (struct value_data *) data;
740 subrtx_iterator::array_type array;
741 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
742 {
743 const_rtx x = *iter;
744 if (REG_P (x))
745 {
746 unsigned int regno = REGNO (x);
747 if (vd->e[regno].debug_insn_changes)
748 {
749 apply_debug_insn_changes (vd, regno);
750 free_debug_insn_changes (vd, regno);
751 }
752 }
753 }
e7140c8d
JJ
754}
755
486b97f2
TV
756/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
757
758static void
759kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
760{
e8448ba5 761 note_stores (insn, kill_clobbered_value, vd);
486b97f2
TV
762}
763
fac41238
PB
764/* Perform the forward copy propagation on basic block BB. */
765
766static bool
767copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
768{
b5b8b0ac 769 bool anything_changed = false;
c049b107 770 rtx_insn *insn, *next;
fac41238 771
c049b107 772 for (insn = BB_HEAD (bb); ; insn = next)
fac41238 773 {
29d70a0f 774 int n_ops, i, predicated;
fac41238
PB
775 bool is_asm, any_replacements;
776 rtx set;
c34fb198 777 rtx link;
b5b8b0ac 778 bool changed = false;
e384e6b5 779 struct kill_set_value_data ksvd;
fac41238 780
c049b107 781 next = NEXT_INSN (insn);
b5b8b0ac 782 if (!NONDEBUG_INSN_P (insn))
fac41238 783 {
36f52e8f 784 if (DEBUG_BIND_INSN_P (insn))
b5b8b0ac
AO
785 {
786 rtx loc = INSN_VAR_LOCATION_LOC (insn);
e7140c8d
JJ
787 if (!VAR_LOC_UNKNOWN_P (loc))
788 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
789 ALL_REGS, GET_MODE (loc),
86fc3d06 790 ADDR_SPACE_GENERIC, insn, vd);
b5b8b0ac
AO
791 }
792
fac41238
PB
793 if (insn == BB_END (bb))
794 break;
795 else
796 continue;
797 }
798
799 set = single_set (insn);
d6da226a
JH
800
801 /* Detect noop sets and remove them before processing side effects. */
802 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
803 {
804 unsigned int regno = REGNO (SET_SRC (set));
805 rtx r1 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
806 SET_DEST (set), vd);
807 rtx r2 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
808 SET_SRC (set), vd);
809 if (rtx_equal_p (r1 ? r1 : SET_DEST (set), r2 ? r2 : SET_SRC (set)))
810 {
811 bool last = insn == BB_END (bb);
d6da226a
JH
812 delete_insn (insn);
813 if (last)
814 break;
815 continue;
816 }
817 }
818
f73675e3
JL
819 /* Detect obviously dead sets (via REG_UNUSED notes) and remove them. */
820 if (set
4dd11305 821 && !RTX_FRAME_RELATED_P (insn)
c81704b3 822 && NONJUMP_INSN_P (insn)
52295c2d 823 && !may_trap_p (set)
f73675e3
JL
824 && find_reg_note (insn, REG_UNUSED, SET_DEST (set))
825 && !side_effects_p (SET_SRC (set))
826 && !side_effects_p (SET_DEST (set)))
827 {
828 bool last = insn == BB_END (bb);
829 delete_insn (insn);
830 if (last)
831 break;
832 continue;
833 }
834
835
75d25a02 836 extract_constrain_insn (insn);
1145837d 837 preprocess_constraints (insn);
5efe5dec 838 const operand_alternative *op_alt = which_op_alt ();
fac41238
PB
839 n_ops = recog_data.n_operands;
840 is_asm = asm_noperands (PATTERN (insn)) >= 0;
841
5efe5dec 842 /* Simplify the code below by promoting OP_OUT to OP_INOUT
fac41238
PB
843 in predicated instructions. */
844
845 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
846 for (i = 0; i < n_ops; ++i)
847 {
29d70a0f 848 int matches = op_alt[i].matches;
29d70a0f 849 if (matches >= 0 || op_alt[i].matched >= 0
fac41238
PB
850 || (predicated && recog_data.operand_type[i] == OP_OUT))
851 recog_data.operand_type[i] = OP_INOUT;
852 }
853
e7140c8d
JJ
854 /* Apply changes to earlier DEBUG_INSNs if possible. */
855 if (vd->n_debug_insn_changes)
856 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
857
fac41238
PB
858 /* For each earlyclobber operand, zap the value data. */
859 for (i = 0; i < n_ops; i++)
29d70a0f 860 if (op_alt[i].earlyclobber)
fac41238
PB
861 kill_value (recog_data.operand[i], vd);
862
863 /* Within asms, a clobber cannot overlap inputs or outputs.
864 I wouldn't think this were true for regular insns, but
865 scan_rtx treats them like that... */
486b97f2 866 kill_clobbered_values (insn, vd);
fac41238
PB
867
868 /* Kill all auto-incremented values. */
869 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
4ca738b3 870 kill_autoinc_value (insn, vd);
fac41238
PB
871
872 /* Kill all early-clobbered operands. */
873 for (i = 0; i < n_ops; i++)
29d70a0f 874 if (op_alt[i].earlyclobber)
fac41238
PB
875 kill_value (recog_data.operand[i], vd);
876
c34fb198
RE
877 /* If we have dead sets in the insn, then we need to note these as we
878 would clobbers. */
879 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
880 {
881 if (REG_NOTE_KIND (link) == REG_UNUSED)
882 {
883 kill_value (XEXP (link, 0), vd);
884 /* Furthermore, if the insn looked like a single-set,
885 but the dead store kills the source value of that
886 set, then we can no-longer use the plain move
887 special case below. */
888 if (set
889 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
890 set = NULL;
891 }
c35533d7
SB
892
893 /* We need to keep CFI info correct, and the same on all paths,
894 so we cannot normally replace the registers REG_CFA_REGISTER
895 refers to. Bail. */
896 if (REG_NOTE_KIND (link) == REG_CFA_REGISTER)
897 goto did_replacement;
c34fb198
RE
898 }
899
fac41238
PB
900 /* Special-case plain move instructions, since we may well
901 be able to do the move from a different register class. */
902 if (set && REG_P (SET_SRC (set)))
903 {
904 rtx src = SET_SRC (set);
0103c2e4 905 rtx dest = SET_DEST (set);
fac41238 906 unsigned int regno = REGNO (src);
ef4bddc2 907 machine_mode mode = GET_MODE (src);
fac41238
PB
908 unsigned int i;
909 rtx new_rtx;
910
911 /* If we are accessing SRC in some mode other that what we
912 set it in, make sure that the replacement is valid. */
913 if (mode != vd->e[regno].mode)
914 {
462a99aa 915 if (REG_NREGS (src)
ad474626 916 > hard_regno_nregs (regno, vd->e[regno].mode))
fac41238 917 goto no_move_special_case;
26689420
DM
918
919 /* And likewise, if we are narrowing on big endian the transformation
920 is also invalid. */
ad474626 921 if (REG_NREGS (src) < hard_regno_nregs (regno, vd->e[regno].mode)
91914e56
RS
922 && maybe_ne (subreg_lowpart_offset (mode,
923 vd->e[regno].mode), 0U))
26689420 924 goto no_move_special_case;
fac41238
PB
925 }
926
927 /* If the destination is also a register, try to find a source
928 register in the same class. */
0103c2e4 929 if (REG_P (dest))
fac41238 930 {
d6da226a
JH
931 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno),
932 src, vd);
933
fac41238
PB
934 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
935 {
936 if (dump_file)
937 fprintf (dump_file,
938 "insn %u: replaced reg %u with %u\n",
939 INSN_UID (insn), regno, REGNO (new_rtx));
940 changed = true;
941 goto did_replacement;
942 }
3147591f
MS
943 /* We need to re-extract as validate_change clobbers
944 recog_data. */
75d25a02 945 extract_constrain_insn (insn);
1145837d 946 preprocess_constraints (insn);
fac41238
PB
947 }
948
949 /* Otherwise, try all valid registers and see if its valid. */
950 for (i = vd->e[regno].oldest_regno; i != regno;
951 i = vd->e[i].next_regno)
952 {
953 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
954 mode, i, regno);
955 if (new_rtx != NULL_RTX)
956 {
0103c2e4 957 /* Don't propagate for a more expensive reg-reg move. */
958 if (REG_P (dest))
959 {
960 enum reg_class from = REGNO_REG_CLASS (regno);
961 enum reg_class to = REGNO_REG_CLASS (REGNO (dest));
962 enum reg_class new_from = REGNO_REG_CLASS (i);
963 unsigned int original_cost
964 = targetm.register_move_cost (mode, from, to);
965 unsigned int after_cost
966 = targetm.register_move_cost (mode, new_from, to);
967 if (after_cost > original_cost)
968 continue;
969 }
970
fac41238
PB
971 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
972 {
adfc236c
MT
973 /* NEW_RTX may be the global stack pointer rtx, in which
974 case we must not modify it's attributes. */
975 if (new_rtx != stack_pointer_rtx)
893883f2 976 {
adfc236c
MT
977 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
978 REG_ATTRS (new_rtx) = REG_ATTRS (src);
979 REG_POINTER (new_rtx) = REG_POINTER (src);
893883f2 980 }
adfc236c
MT
981 if (dump_file)
982 fprintf (dump_file,
983 "insn %u: replaced reg %u with %u\n",
984 INSN_UID (insn), regno, REGNO (new_rtx));
985 changed = true;
986 goto did_replacement;
fac41238 987 }
3147591f
MS
988 /* We need to re-extract as validate_change clobbers
989 recog_data. */
75d25a02 990 extract_constrain_insn (insn);
1145837d 991 preprocess_constraints (insn);
fac41238
PB
992 }
993 }
994 }
995 no_move_special_case:
996
997 any_replacements = false;
998
999 /* For each input operand, replace a hard register with the
1000 eldest live copy that's in an appropriate register class. */
1001 for (i = 0; i < n_ops; i++)
1002 {
868865f4 1003 bool replaced = false;
fac41238
PB
1004
1005 /* Don't scan match_operand here, since we've no reg class
1006 information to pass down. Any operands that we could
1007 substitute in will be represented elsewhere. */
1008 if (recog_data.constraints[i][0] == '\0')
1009 continue;
1010
1011 /* Don't replace in asms intentionally referencing hard regs. */
1012 if (is_asm && REG_P (recog_data.operand[i])
1013 && (REGNO (recog_data.operand[i])
1014 == ORIGINAL_REGNO (recog_data.operand[i])))
1015 continue;
1016
1017 if (recog_data.operand_type[i] == OP_IN)
1018 {
29d70a0f 1019 if (op_alt[i].is_address)
868865f4 1020 replaced
fac41238 1021 = replace_oldest_value_addr (recog_data.operand_loc[i],
5efe5dec
RS
1022 alternative_class (op_alt, i),
1023 VOIDmode, ADDR_SPACE_GENERIC,
1024 insn, vd);
fac41238 1025 else if (REG_P (recog_data.operand[i]))
868865f4 1026 replaced
fac41238 1027 = replace_oldest_value_reg (recog_data.operand_loc[i],
5efe5dec
RS
1028 alternative_class (op_alt, i),
1029 insn, vd);
fac41238 1030 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1031 replaced = replace_oldest_value_mem (recog_data.operand[i],
1032 insn, vd);
fac41238
PB
1033 }
1034 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1035 replaced = replace_oldest_value_mem (recog_data.operand[i],
1036 insn, vd);
fac41238
PB
1037
1038 /* If we performed any replacement, update match_dups. */
868865f4 1039 if (replaced)
fac41238
PB
1040 {
1041 int j;
1042 rtx new_rtx;
1043
1044 new_rtx = *recog_data.operand_loc[i];
1045 recog_data.operand[i] = new_rtx;
1046 for (j = 0; j < recog_data.n_dups; j++)
1047 if (recog_data.dup_num[j] == i)
1048 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
1049
1050 any_replacements = true;
1051 }
1052 }
1053
1054 if (any_replacements)
1055 {
1056 if (! apply_change_group ())
1057 {
fac41238
PB
1058 if (dump_file)
1059 fprintf (dump_file,
1060 "insn %u: reg replacements not verified\n",
1061 INSN_UID (insn));
1062 }
1063 else
1064 changed = true;
1065 }
1066
1067 did_replacement:
b5b8b0ac 1068 if (changed)
828f2c8b
JJ
1069 {
1070 anything_changed = true;
1071
1072 /* If something changed, perhaps further changes to earlier
1073 DEBUG_INSNs can be applied. */
1074 if (vd->n_debug_insn_changes)
1075 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
4dd11305 1076 df_insn_rescan (insn);
828f2c8b 1077 }
b5b8b0ac 1078
e384e6b5
BS
1079 ksvd.vd = vd;
1080 ksvd.ignore_set_reg = NULL_RTX;
1081
fac41238
PB
1082 /* Clobber call-clobbered registers. */
1083 if (CALL_P (insn))
e384e6b5 1084 {
c7fb4c7a
SB
1085 unsigned int set_regno = INVALID_REGNUM;
1086 unsigned int set_nregs = 0;
1087 unsigned int regno;
e384e6b5 1088 rtx exp;
c7fb4c7a 1089
e384e6b5
BS
1090 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1091 {
1092 rtx x = XEXP (exp, 0);
1093 if (GET_CODE (x) == SET)
1094 {
1095 rtx dest = SET_DEST (x);
1096 kill_value (dest, vd);
1097 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1098 copy_value (dest, SET_SRC (x), vd);
1099 ksvd.ignore_set_reg = dest;
1100 set_regno = REGNO (dest);
dc8afb70 1101 set_nregs = REG_NREGS (dest);
e384e6b5
BS
1102 break;
1103 }
1104 }
c7fb4c7a 1105
5a5a3bc5 1106 function_abi callee_abi = insn_callee_abi (insn);
9ccac701 1107 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
30503f4e
RS
1108 if (vd->e[regno].mode != VOIDmode
1109 && callee_abi.clobbers_reg_p (vd->e[regno].mode, regno)
9ccac701 1110 && (regno < set_regno || regno >= set_regno + set_nregs))
c7fb4c7a 1111 kill_value_regno (regno, 1, vd);
c5a44004
JJ
1112
1113 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
30503f4e
RS
1114 of the SET isn't clobbered by CALLEE_ABI, but instead among
1115 CLOBBERs on the CALL_INSN, we could wrongly assume the
1116 value in it is still live. */
c5a44004 1117 if (ksvd.ignore_set_reg)
486b97f2 1118 kill_clobbered_values (insn, vd);
e384e6b5 1119 }
fac41238 1120
8c8fe663
TV
1121 bool copy_p = (set
1122 && REG_P (SET_DEST (set))
1123 && REG_P (SET_SRC (set)));
1124 bool noop_p = (copy_p
1125 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
fac41238 1126
c049b107
JJ
1127 /* If a noop move is using narrower mode than we have recorded,
1128 we need to either remove the noop move, or kill_set_value. */
1129 if (noop_p
bd4288c0
RS
1130 && partial_subreg_p (GET_MODE (SET_DEST (set)),
1131 vd->e[REGNO (SET_DEST (set))].mode))
c049b107
JJ
1132 {
1133 if (noop_move_p (insn))
1134 {
1135 bool last = insn == BB_END (bb);
1136 delete_insn (insn);
1137 if (last)
1138 break;
1139 }
1140 else
1141 noop_p = false;
1142 }
1143
8c8fe663
TV
1144 if (!noop_p)
1145 {
1146 /* Notice stores. */
e8448ba5 1147 note_stores (insn, kill_set_value, &ksvd);
8c8fe663
TV
1148
1149 /* Notice copies. */
1150 if (copy_p)
4dd11305
JL
1151 {
1152 df_insn_rescan (insn);
1153 copy_value (SET_DEST (set), SET_SRC (set), vd);
1154 }
8c8fe663 1155 }
fac41238
PB
1156
1157 if (insn == BB_END (bb))
1158 break;
1159 }
1160
b5b8b0ac 1161 return anything_changed;
fac41238
PB
1162}
1163
fac41238
PB
1164/* Dump the value chain data to stderr. */
1165
24e47c76 1166DEBUG_FUNCTION void
fac41238
PB
1167debug_value_data (struct value_data *vd)
1168{
1169 HARD_REG_SET set;
1170 unsigned int i, j;
1171
1172 CLEAR_HARD_REG_SET (set);
1173
1174 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1175 if (vd->e[i].oldest_regno == i)
1176 {
1177 if (vd->e[i].mode == VOIDmode)
1178 {
1179 if (vd->e[i].next_regno != INVALID_REGNUM)
1180 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1181 i, vd->e[i].next_regno);
1182 continue;
1183 }
1184
1185 SET_HARD_REG_BIT (set, i);
1186 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1187
1188 for (j = vd->e[i].next_regno;
1189 j != INVALID_REGNUM;
1190 j = vd->e[j].next_regno)
1191 {
1192 if (TEST_HARD_REG_BIT (set, j))
1193 {
1194 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1195 return;
1196 }
1197
1198 if (vd->e[j].oldest_regno != i)
1199 {
1200 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1201 j, vd->e[j].oldest_regno);
1202 return;
1203 }
1204 SET_HARD_REG_BIT (set, j);
1205 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1206 }
1207 fputc ('\n', stderr);
1208 }
1209
1210 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1211 if (! TEST_HARD_REG_BIT (set, i)
1212 && (vd->e[i].mode != VOIDmode
1213 || vd->e[i].oldest_regno != i
1214 || vd->e[i].next_regno != INVALID_REGNUM))
1215 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1216 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1217 vd->e[i].next_regno);
1218}
1219
a2e6c10c
ZC
1220/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1221 DEBUG_INSN is skipped since we do not want to involve DF related
1222 staff as how it is handled in function pass_cprop_hardreg::execute.
1223
1224 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1225 to handle DEBUG_INSN for other uses. */
1226
1227void
1228copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1229{
1230 struct value_data *vd;
1231 vd = XNEWVEC (struct value_data, 1);
1232 init_value_data (vd);
1233
1234 skip_debug_insn_p = true;
1235 copyprop_hardreg_forward_1 (bb, vd);
1236 free (vd);
1237 skip_debug_insn_p = false;
1238}
1239
fac41238
PB
1240static void
1241validate_value_data (struct value_data *vd)
1242{
1243 HARD_REG_SET set;
1244 unsigned int i, j;
1245
1246 CLEAR_HARD_REG_SET (set);
1247
1248 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1249 if (vd->e[i].oldest_regno == i)
1250 {
1251 if (vd->e[i].mode == VOIDmode)
1252 {
1253 if (vd->e[i].next_regno != INVALID_REGNUM)
a9c697b8
MS
1254 internal_error ("%qs: [%u] bad %<next_regno%> for empty chain (%u)",
1255 __func__, i, vd->e[i].next_regno);
fac41238
PB
1256 continue;
1257 }
1258
1259 SET_HARD_REG_BIT (set, i);
1260
1261 for (j = vd->e[i].next_regno;
1262 j != INVALID_REGNUM;
1263 j = vd->e[j].next_regno)
1264 {
1265 if (TEST_HARD_REG_BIT (set, j))
a9c697b8
MS
1266 internal_error ("%qs: loop in %<next_regno%> chain (%u)",
1267 __func__, j);
fac41238 1268 if (vd->e[j].oldest_regno != i)
a9c697b8
MS
1269 internal_error ("%qs: [%u] bad %<oldest_regno%> (%u)",
1270 __func__, j, vd->e[j].oldest_regno);
fac41238
PB
1271
1272 SET_HARD_REG_BIT (set, j);
1273 }
1274 }
1275
1276 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1277 if (! TEST_HARD_REG_BIT (set, i)
1278 && (vd->e[i].mode != VOIDmode
1279 || vd->e[i].oldest_regno != i
1280 || vd->e[i].next_regno != INVALID_REGNUM))
a9c697b8
MS
1281 internal_error ("%qs: [%u] non-empty register in chain (%s %u %i)",
1282 __func__, i,
1283 GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
fac41238
PB
1284 vd->e[i].next_regno);
1285}
b2b29377 1286
fac41238 1287\f
27a4cd48
DM
1288namespace {
1289
1290const pass_data pass_data_cprop_hardreg =
fac41238 1291{
27a4cd48
DM
1292 RTL_PASS, /* type */
1293 "cprop_hardreg", /* name */
1294 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1295 TV_CPROP_REGISTERS, /* tv_id */
1296 0, /* properties_required */
1297 0, /* properties_provided */
1298 0, /* properties_destroyed */
1299 0, /* todo_flags_start */
3bea341f 1300 TODO_df_finish, /* todo_flags_finish */
fac41238 1301};
27a4cd48
DM
1302
1303class pass_cprop_hardreg : public rtl_opt_pass
1304{
1305public:
c3284718
RS
1306 pass_cprop_hardreg (gcc::context *ctxt)
1307 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
27a4cd48
DM
1308 {}
1309
1310 /* opt_pass methods: */
725793af 1311 bool gate (function *) final override
1a3d085c
TS
1312 {
1313 return (optimize > 0 && (flag_cprop_registers));
1314 }
1315
725793af 1316 unsigned int execute (function *) final override;
27a4cd48
DM
1317
1318}; // class pass_cprop_hardreg
1319
cdd82c1e
JJ
1320static bool
1321cprop_hardreg_bb (basic_block bb, struct value_data *all_vd, sbitmap visited)
1322{
1323 bitmap_set_bit (visited, bb->index);
1324
1325 /* If a block has a single predecessor, that we've already
1326 processed, begin with the value data that was live at
1327 the end of the predecessor block. */
1328 /* ??? Ought to use more intelligent queuing of blocks. */
1329 if (single_pred_p (bb)
1330 && bitmap_bit_p (visited, single_pred (bb)->index)
1331 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1332 {
1333 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1334 if (all_vd[bb->index].n_debug_insn_changes)
1335 {
1336 unsigned int regno;
1337
1338 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1339 {
1340 if (all_vd[bb->index].e[regno].debug_insn_changes)
1341 {
1342 struct queued_debug_insn_change *cur;
1343 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1344 cur; cur = cur->next)
1345 --all_vd[bb->index].n_debug_insn_changes;
1346 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1347 if (all_vd[bb->index].n_debug_insn_changes == 0)
1348 break;
1349 }
1350 }
1351 }
1352 }
1353 else
1354 init_value_data (all_vd + bb->index);
1355
1356 return copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1357}
1358
1359static void
1360cprop_hardreg_debug (function *fun, struct value_data *all_vd)
1361{
1362 basic_block bb;
1363
1364 FOR_EACH_BB_FN (bb, fun)
1365 if (all_vd[bb->index].n_debug_insn_changes)
1366 {
1367 unsigned int regno;
1368 bitmap live;
1369
1370 live = df_get_live_out (bb);
1371 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1372 if (all_vd[bb->index].e[regno].debug_insn_changes)
1373 {
1374 if (REGNO_REG_SET_P (live, regno))
1375 apply_debug_insn_changes (all_vd + bb->index, regno);
1376
1377 struct queued_debug_insn_change *cur;
1378 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1379 cur; cur = cur->next)
1380 --all_vd[bb->index].n_debug_insn_changes;
1381 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1382 if (all_vd[bb->index].n_debug_insn_changes == 0)
1383 break;
1384 }
1385 }
1386
1387 queued_debug_insn_change_pool.release ();
1388}
1389
be55bfe6
TS
1390unsigned int
1391pass_cprop_hardreg::execute (function *fun)
1392{
1393 struct value_data *all_vd;
1394 basic_block bb;
be55bfe6
TS
1395
1396 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1397
7ba9e72d 1398 auto_sbitmap visited (last_basic_block_for_fn (fun));
be55bfe6
TS
1399 bitmap_clear (visited);
1400
defa8537
RS
1401 auto_vec<int> worklist1, worklist2;
1402 auto_vec<int> *curr = &worklist1;
1403 auto_vec<int> *next = &worklist2;
cdd82c1e
JJ
1404 bool any_debug_changes = false;
1405
52295c2d
JL
1406 /* We need accurate notes. Earlier passes such as if-conversion may
1407 leave notes in an inconsistent state. */
4dd11305 1408 df_note_add_problem ();
52295c2d 1409 df_analyze ();
4dd11305
JL
1410
1411 /* It is tempting to set DF_LR_RUN_DCE, but DCE may choose to delete
1412 an insn and this pass would not have visibility into the removal.
1413 This pass would then potentially use the source of that
1414 INSN for propagation purposes, generating invalid code.
1415
1416 So we just ask for updated notes and handle trivial deletions
1417 within this pass where we can update this passes internal
1418 data structures appropriately. */
1419 df_set_flags (DF_DEFER_INSN_RESCAN);
1420
be55bfe6
TS
1421 FOR_EACH_BB_FN (bb, fun)
1422 {
cdd82c1e 1423 if (cprop_hardreg_bb (bb, all_vd, visited))
defa8537 1424 curr->safe_push (bb->index);
cdd82c1e
JJ
1425 if (all_vd[bb->index].n_debug_insn_changes)
1426 any_debug_changes = true;
be55bfe6
TS
1427 }
1428
4dd11305
JL
1429 /* We must call df_analyze here unconditionally to ensure that the
1430 REG_UNUSED and REG_DEAD notes are consistent with and without -g. */
1431 df_analyze ();
1432
cdd82c1e
JJ
1433 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1434 cprop_hardreg_debug (fun, all_vd);
1435
defa8537
RS
1436 /* Repeat pass up to PASSES times, but only processing basic blocks
1437 that have changed on the previous iteration. CURR points to the
1438 current worklist, and each iteration populates the NEXT worklist,
1439 swapping pointers after each cycle. */
1440
1441 unsigned int passes = optimize > 1 ? 3 : 2;
1442 for (unsigned int pass = 2; pass <= passes && !curr->is_empty (); pass++)
be55bfe6 1443 {
cdd82c1e
JJ
1444 any_debug_changes = false;
1445 bitmap_clear (visited);
defa8537
RS
1446 next->truncate (0);
1447 for (int index : *curr)
cdd82c1e
JJ
1448 {
1449 bb = BASIC_BLOCK_FOR_FN (fun, index);
defa8537
RS
1450 if (cprop_hardreg_bb (bb, all_vd, visited))
1451 next->safe_push (bb->index);
cdd82c1e
JJ
1452 if (all_vd[bb->index].n_debug_insn_changes)
1453 any_debug_changes = true;
1454 }
be55bfe6 1455
cdd82c1e
JJ
1456 df_analyze ();
1457 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1458 cprop_hardreg_debug (fun, all_vd);
defa8537 1459 std::swap (curr, next);
be55bfe6
TS
1460 }
1461
be55bfe6
TS
1462 free (all_vd);
1463 return 0;
1464}
1465
27a4cd48
DM
1466} // anon namespace
1467
1468rtl_opt_pass *
1469make_pass_cprop_hardreg (gcc::context *ctxt)
1470{
1471 return new pass_cprop_hardreg (ctxt);
1472}