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c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
dc129d82
JT
42
43#include "elf-bfd.h"
44
45#include "alpha-tdep.h"
46
c906108c 47\f
fa88f677 48static const char *
636a6dfc
JT
49alpha_register_name (int regno)
50{
5ab84872 51 static const char * const register_names[] =
636a6dfc
JT
52 {
53 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
54 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
55 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
56 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
57 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
58 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
59 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
60 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 61 "pc", "", "unique"
636a6dfc
JT
62 };
63
64 if (regno < 0)
5ab84872 65 return NULL;
636a6dfc 66 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
67 return NULL;
68 return register_names[regno];
636a6dfc 69}
d734c450 70
dc129d82 71static int
d734c450
JT
72alpha_cannot_fetch_register (int regno)
73{
44d88583 74 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
75}
76
dc129d82 77static int
d734c450
JT
78alpha_cannot_store_register (int regno)
79{
44d88583 80 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
81}
82
dc129d82 83static int
d734c450
JT
84alpha_register_convertible (int regno)
85{
86 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
87}
0d056799 88
dc129d82 89static struct type *
0d056799
JT
90alpha_register_virtual_type (int regno)
91{
72667056
RH
92 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
93 return builtin_type_void_data_ptr;
94 if (regno == ALPHA_PC_REGNUM)
95 return builtin_type_void_func_ptr;
96
97 /* Don't need to worry about little vs big endian until
98 some jerk tries to port to alpha-unicosmk. */
99 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 31)
100 return builtin_type_ieee_double_little;
101
102 return builtin_type_int64;
0d056799 103}
f8453e34 104
615967cb
RH
105/* Is REGNUM a member of REGGROUP? */
106
107static int
108alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
109 struct reggroup *group)
110{
111 /* Filter out any registers eliminated, but whose regnum is
112 reserved for backward compatibility, e.g. the vfp. */
113 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
114 return 0;
115
116 /* Since we implement no pseudo registers, save/restore is equal to all. */
117 if (group == all_reggroup
118 || group == save_reggroup
119 || group == restore_reggroup)
120 return 1;
121
122 /* All other groups are non-overlapping. */
123
124 /* Since this is really a PALcode memory slot... */
125 if (regnum == ALPHA_UNIQUE_REGNUM)
126 return group == system_reggroup;
127
128 /* Force the FPCR to be considered part of the floating point state. */
129 if (regnum == ALPHA_FPCR_REGNUM)
130 return group == float_reggroup;
131
132 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
133 return group == float_reggroup;
134 else
135 return group == general_reggroup;
136}
137
dc129d82 138static int
f8453e34
JT
139alpha_register_byte (int regno)
140{
141 return (regno * 8);
142}
143
dc129d82 144static int
f8453e34
JT
145alpha_register_raw_size (int regno)
146{
147 return 8;
148}
149
dc129d82 150static int
f8453e34
JT
151alpha_register_virtual_size (int regno)
152{
153 return 8;
154}
636a6dfc 155
d2427a71
RH
156/* The alpha needs a conversion between register and memory format if the
157 register is a floating point register and memory format is float, as the
158 register format must be double or memory format is an integer with 4
159 bytes or less, as the representation of integers in floating point
160 registers is different. */
161
14696584
RH
162static void
163alpha_convert_flt_dbl (void *out, const void *in)
164{
165 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_single_little);
166 store_typed_floating (out, builtin_type_ieee_double_little, d);
167}
168
169static void
170alpha_convert_dbl_flt (void *out, const void *in)
171{
172 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_double_little);
173 store_typed_floating (out, builtin_type_ieee_single_little, d);
174}
175
d2427a71
RH
176static void
177alpha_register_convert_to_virtual (int regnum, struct type *valtype,
178 char *raw_buffer, char *virtual_buffer)
5868c862 179{
14696584 180 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 181 {
14696584 182 memcpy (virtual_buffer, raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
183 return;
184 }
185
14696584
RH
186 /* Note that everything below is less than 8 bytes long. */
187
d2427a71 188 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
189 alpha_convert_dbl_flt (virtual_buffer, raw_buffer);
190 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71
RH
191 {
192 ULONGEST l;
14696584 193 l = extract_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
194 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
195 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
196 }
197 else
198 error ("Cannot retrieve value from floating point register");
199}
5868c862 200
d2427a71
RH
201static void
202alpha_register_convert_to_raw (struct type *valtype, int regnum,
203 char *virtual_buffer, char *raw_buffer)
204{
14696584 205 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 206 {
14696584 207 memcpy (raw_buffer, virtual_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
208 return;
209 }
5868c862 210
14696584
RH
211 /* Note that everything below is less than 8 bytes long. */
212
d2427a71 213 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
214 alpha_convert_flt_dbl (raw_buffer, virtual_buffer);
215 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71 216 {
14696584 217 ULONGEST l = unpack_long (valtype, virtual_buffer);
d2427a71 218 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
14696584 219 store_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE, l);
d2427a71
RH
220 }
221 else
222 error ("Cannot store value in floating point register");
5868c862
JT
223}
224
d2427a71
RH
225\f
226/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
227 the stack. The register arguments are stored in ARG_REG_BUFFER, and
228 then moved into the register file; this simplifies the passing of a
229 large struct which extends from the registers to the stack, plus avoids
230 three ptrace invocations per word.
231
232 We don't bother tracking which register values should go in integer
233 regs or fp regs; we load the same values into both.
234
d2427a71
RH
235 If the called function is returning a structure, the address of the
236 structure to be returned is passed as a hidden first argument. */
c906108c 237
d2427a71 238static CORE_ADDR
c88e30c0
RH
239alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
240 struct regcache *regcache, CORE_ADDR bp_addr,
241 int nargs, struct value **args, CORE_ADDR sp,
242 int struct_return, CORE_ADDR struct_addr)
c906108c 243{
d2427a71
RH
244 int i;
245 int accumulate_size = struct_return ? 8 : 0;
d2427a71 246 struct alpha_arg
c906108c 247 {
d2427a71
RH
248 char *contents;
249 int len;
250 int offset;
251 };
c88e30c0
RH
252 struct alpha_arg *alpha_args
253 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 254 register struct alpha_arg *m_arg;
c88e30c0 255 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 256 int required_arg_regs;
c906108c 257
c88e30c0
RH
258 /* The ABI places the address of the called function in T12. */
259 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
260
261 /* Set the return address register to point to the entry point
262 of the program, where a breakpoint lies in wait. */
263 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
264
265 /* Lay out the arguments in memory. */
d2427a71
RH
266 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
267 {
268 struct value *arg = args[i];
269 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 270
d2427a71
RH
271 /* Cast argument to long if necessary as the compiler does it too. */
272 switch (TYPE_CODE (arg_type))
c906108c 273 {
d2427a71
RH
274 case TYPE_CODE_INT:
275 case TYPE_CODE_BOOL:
276 case TYPE_CODE_CHAR:
277 case TYPE_CODE_RANGE:
278 case TYPE_CODE_ENUM:
279 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
280 {
281 arg_type = builtin_type_long;
282 arg = value_cast (arg_type, arg);
283 }
284 break;
c88e30c0
RH
285 case TYPE_CODE_FLT:
286 /* "float" arguments loaded in registers must be passed in
287 register format, aka "double". */
288 if (accumulate_size < sizeof (arg_reg_buffer)
289 && TYPE_LENGTH (arg_type) == 4)
290 {
291 arg_type = builtin_type_double;
292 arg = value_cast (arg_type, arg);
293 }
294 /* Tru64 5.1 has a 128-bit long double, and passes this by
295 invisible reference. No one else uses this data type. */
296 else if (TYPE_LENGTH (arg_type) == 16)
297 {
298 /* Allocate aligned storage. */
299 sp = (sp & -16) - 16;
300
301 /* Write the real data into the stack. */
302 write_memory (sp, VALUE_CONTENTS (arg), 16);
303
304 /* Construct the indirection. */
305 arg_type = lookup_pointer_type (arg_type);
306 arg = value_from_pointer (arg_type, sp);
307 }
308 break;
d2427a71
RH
309 default:
310 break;
c906108c 311 }
d2427a71
RH
312 m_arg->len = TYPE_LENGTH (arg_type);
313 m_arg->offset = accumulate_size;
314 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
315 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
316 }
317
d2427a71
RH
318 /* Determine required argument register loads, loading an argument register
319 is expensive as it uses three ptrace calls. */
320 required_arg_regs = accumulate_size / 8;
321 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
322 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 323
d2427a71 324 /* Make room for the arguments on the stack. */
c88e30c0
RH
325 if (accumulate_size < sizeof(arg_reg_buffer))
326 accumulate_size = 0;
327 else
328 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 329 sp -= accumulate_size;
c906108c 330
c88e30c0 331 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 332 sp &= ~15;
c906108c 333
d2427a71
RH
334 /* `Push' arguments on the stack. */
335 for (i = nargs; m_arg--, --i >= 0;)
c906108c 336 {
c88e30c0
RH
337 char *contents = m_arg->contents;
338 int offset = m_arg->offset;
339 int len = m_arg->len;
340
341 /* Copy the bytes destined for registers into arg_reg_buffer. */
342 if (offset < sizeof(arg_reg_buffer))
343 {
344 if (offset + len <= sizeof(arg_reg_buffer))
345 {
346 memcpy (arg_reg_buffer + offset, contents, len);
347 continue;
348 }
349 else
350 {
351 int tlen = sizeof(arg_reg_buffer) - offset;
352 memcpy (arg_reg_buffer + offset, contents, tlen);
353 offset += tlen;
354 contents += tlen;
355 len -= tlen;
356 }
357 }
358
359 /* Everything else goes to the stack. */
360 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 361 }
c88e30c0
RH
362 if (struct_return)
363 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 364
d2427a71
RH
365 /* Load the argument registers. */
366 for (i = 0; i < required_arg_regs; i++)
367 {
09cc52fd
RH
368 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
369 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
370 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
371 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 372 }
c906108c 373
09cc52fd
RH
374 /* Finally, update the stack pointer. */
375 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
376
c88e30c0 377 return sp;
c906108c
SS
378}
379
d2427a71
RH
380/* Given a return value in `regbuf' with a type `valtype',
381 extract and copy its value into `valbuf'. */
382
dc129d82 383static void
d2427a71
RH
384alpha_extract_return_value (struct type *valtype,
385 char regbuf[ALPHA_REGISTER_BYTES], char *valbuf)
140f9984 386{
d2427a71
RH
387 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
388 alpha_register_convert_to_virtual (FP0_REGNUM, valtype,
389 regbuf + REGISTER_BYTE (FP0_REGNUM),
390 valbuf);
391 else
392 memcpy (valbuf, regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
393 TYPE_LENGTH (valtype));
140f9984
JT
394}
395
d2427a71
RH
396/* Given a return value in `regbuf' with a type `valtype',
397 write its value into the appropriate register. */
0d056799 398
d2427a71
RH
399static void
400alpha_store_return_value (struct type *valtype, char *valbuf)
c906108c 401{
5ab84872 402 char raw_buffer[ALPHA_REGISTER_SIZE];
d2427a71
RH
403 int regnum = ALPHA_V0_REGNUM;
404 int length = TYPE_LENGTH (valtype);
405
406 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
c906108c 407 {
d2427a71 408 regnum = FP0_REGNUM;
5ab84872 409 length = ALPHA_REGISTER_SIZE;
d2427a71 410 alpha_register_convert_to_raw (valtype, regnum, valbuf, raw_buffer);
c906108c 411 }
d2427a71
RH
412 else
413 memcpy (raw_buffer, valbuf, length);
414
415 deprecated_write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, length);
c906108c
SS
416}
417
d2427a71
RH
418static int
419alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 420{
d2427a71
RH
421 /* Structures are returned by ref in extra arg0. */
422 return 1;
423}
c906108c 424
d2427a71
RH
425static void
426alpha_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
427{
428 /* Store the address of the place in which to copy the structure the
429 subroutine will return. Handled by alpha_push_arguments. */
c906108c
SS
430}
431
dc129d82 432static CORE_ADDR
d2427a71 433alpha_extract_struct_value_address (char *regbuf)
c906108c 434{
7c0b4a20
AC
435 return (extract_unsigned_integer (regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
436 REGISTER_RAW_SIZE (ALPHA_V0_REGNUM)));
c906108c
SS
437}
438
d2427a71
RH
439\f
440static const unsigned char *
441alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 442{
d2427a71
RH
443 static const unsigned char alpha_breakpoint[] =
444 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 445
d2427a71
RH
446 *lenptr = sizeof(alpha_breakpoint);
447 return (alpha_breakpoint);
448}
c906108c 449
d2427a71
RH
450\f
451/* This returns the PC of the first insn after the prologue.
452 If we can't find the prologue, then return 0. */
c906108c 453
d2427a71
RH
454CORE_ADDR
455alpha_after_prologue (CORE_ADDR pc)
c906108c 456{
d2427a71
RH
457 struct symtab_and_line sal;
458 CORE_ADDR func_addr, func_end;
c906108c 459
d2427a71 460 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 461 return 0;
c906108c 462
d2427a71
RH
463 sal = find_pc_line (func_addr, 0);
464 if (sal.end < func_end)
465 return sal.end;
c5aa993b 466
d2427a71
RH
467 /* The line after the prologue is after the end of the function. In this
468 case, tell the caller to find the prologue the hard way. */
469 return 0;
c906108c
SS
470}
471
d2427a71
RH
472/* Read an instruction from memory at PC, looking through breakpoints. */
473
474unsigned int
475alpha_read_insn (CORE_ADDR pc)
c906108c 476{
d2427a71
RH
477 char buf[4];
478 int status;
c5aa993b 479
d2427a71
RH
480 status = read_memory_nobpt (pc, buf, 4);
481 if (status)
482 memory_error (status, pc);
483 return extract_unsigned_integer (buf, 4);
484}
c5aa993b 485
d2427a71
RH
486/* To skip prologues, I use this predicate. Returns either PC itself
487 if the code at PC does not look like a function prologue; otherwise
488 returns an address that (if we're lucky) follows the prologue. If
489 LENIENT, then we must skip everything which is involved in setting
490 up the frame (it's OK to skip more, just so long as we don't skip
491 anything which might clobber the registers which are being saved. */
c906108c 492
d2427a71
RH
493static CORE_ADDR
494alpha_skip_prologue (CORE_ADDR pc)
495{
496 unsigned long inst;
497 int offset;
498 CORE_ADDR post_prologue_pc;
499 char buf[4];
c906108c 500
d2427a71
RH
501 /* Silently return the unaltered pc upon memory errors.
502 This could happen on OSF/1 if decode_line_1 tries to skip the
503 prologue for quickstarted shared library functions when the
504 shared library is not yet mapped in.
505 Reading target memory is slow over serial lines, so we perform
506 this check only if the target has shared libraries (which all
507 Alpha targets do). */
508 if (target_read_memory (pc, buf, 4))
509 return pc;
c906108c 510
d2427a71
RH
511 /* See if we can determine the end of the prologue via the symbol table.
512 If so, then return either PC, or the PC after the prologue, whichever
513 is greater. */
c906108c 514
d2427a71
RH
515 post_prologue_pc = alpha_after_prologue (pc);
516 if (post_prologue_pc != 0)
517 return max (pc, post_prologue_pc);
c906108c 518
d2427a71
RH
519 /* Can't determine prologue from the symbol table, need to examine
520 instructions. */
dc1b0db2 521
d2427a71
RH
522 /* Skip the typical prologue instructions. These are the stack adjustment
523 instruction and the instructions that save registers on the stack
524 or in the gcc frame. */
525 for (offset = 0; offset < 100; offset += 4)
526 {
527 inst = alpha_read_insn (pc + offset);
c906108c 528
d2427a71
RH
529 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
530 continue;
531 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
532 continue;
533 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
534 continue;
535 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
536 continue;
c906108c 537
d2427a71
RH
538 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
539 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
540 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
541 continue;
c906108c 542
d2427a71
RH
543 if (inst == 0x47de040f) /* bis sp,sp,fp */
544 continue;
545 if (inst == 0x47fe040f) /* bis zero,sp,fp */
546 continue;
c906108c 547
d2427a71 548 break;
c906108c 549 }
d2427a71
RH
550 return pc + offset;
551}
c906108c 552
d2427a71
RH
553\f
554/* Figure out where the longjmp will land.
555 We expect the first arg to be a pointer to the jmp_buf structure from
556 which we extract the PC (JB_PC) that we will land at. The PC is copied
557 into the "pc". This routine returns true on success. */
c906108c
SS
558
559static int
d2427a71 560alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 561{
d2427a71
RH
562 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
563 CORE_ADDR jb_addr;
5ab84872 564 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 565
d2427a71 566 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 567
d2427a71
RH
568 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
569 raw_buffer, tdep->jb_elt_size))
c906108c 570 return 0;
d2427a71 571
7c0b4a20 572 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 573 return 1;
c906108c
SS
574}
575
d2427a71
RH
576\f
577/* Frame unwinder for signal trampolines. We use alpha tdep bits that
578 describe the location and shape of the sigcontext structure. After
579 that, all registers are in memory, so it's easy. */
580/* ??? Shouldn't we be able to do this generically, rather than with
581 OSABI data specific to Alpha? */
582
583struct alpha_sigtramp_unwind_cache
c906108c 584{
d2427a71
RH
585 CORE_ADDR sigcontext_addr;
586};
c906108c 587
d2427a71
RH
588static struct alpha_sigtramp_unwind_cache *
589alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
590 void **this_prologue_cache)
591{
592 struct alpha_sigtramp_unwind_cache *info;
593 struct gdbarch_tdep *tdep;
c906108c 594
d2427a71
RH
595 if (*this_prologue_cache)
596 return *this_prologue_cache;
c906108c 597
d2427a71
RH
598 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
599 *this_prologue_cache = info;
c906108c 600
d2427a71
RH
601 tdep = gdbarch_tdep (current_gdbarch);
602 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 603
d2427a71 604 return info;
c906108c
SS
605}
606
d2427a71
RH
607/* Return the address of REGNO in a sigtramp frame. Since this is all
608 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 609
d2427a71
RH
610#ifndef SIGFRAME_PC_OFF
611#define SIGFRAME_PC_OFF (2 * 8)
612#define SIGFRAME_REGSAVE_OFF (4 * 8)
613#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
614#endif
c5aa993b 615
d2427a71
RH
616static CORE_ADDR
617alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
618{
619 if (regno < 32)
620 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
621 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
622 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
623 if (regno == PC_REGNUM)
624 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 625
d2427a71 626 return 0;
c906108c
SS
627}
628
d2427a71
RH
629/* Given a GDB frame, determine the address of the calling function's
630 frame. This will be used to create a new GDB frame struct. */
140f9984 631
dc129d82 632static void
d2427a71
RH
633alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
634 void **this_prologue_cache,
635 struct frame_id *this_id)
c906108c 636{
d2427a71
RH
637 struct alpha_sigtramp_unwind_cache *info
638 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
639 struct gdbarch_tdep *tdep;
640 CORE_ADDR stack_addr, code_addr;
641
642 /* If the OSABI couldn't locate the sigcontext, give up. */
643 if (info->sigcontext_addr == 0)
644 return;
645
646 /* If we have dynamic signal trampolines, find their start.
647 If we do not, then we must assume there is a symbol record
648 that can provide the start address. */
649 tdep = gdbarch_tdep (current_gdbarch);
650 if (tdep->dynamic_sigtramp_offset)
c906108c 651 {
d2427a71
RH
652 int offset;
653 code_addr = frame_pc_unwind (next_frame);
654 offset = tdep->dynamic_sigtramp_offset (code_addr);
655 if (offset >= 0)
656 code_addr -= offset;
c906108c 657 else
d2427a71 658 code_addr = 0;
c906108c 659 }
d2427a71
RH
660 else
661 code_addr = frame_func_unwind (next_frame);
c906108c 662
d2427a71
RH
663 /* The stack address is trivially read from the sigcontext. */
664 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
665 ALPHA_SP_REGNUM);
666 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 667
d2427a71 668 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
669}
670
d2427a71 671/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 672
d2427a71
RH
673static void
674alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
675 void **this_prologue_cache,
676 int regnum, int *optimizedp,
677 enum lval_type *lvalp, CORE_ADDR *addrp,
678 int *realnump, void *bufferp)
c906108c 679{
d2427a71
RH
680 struct alpha_sigtramp_unwind_cache *info
681 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
682 CORE_ADDR addr;
c906108c 683
d2427a71 684 if (info->sigcontext_addr != 0)
c906108c 685 {
d2427a71
RH
686 /* All integer and fp registers are stored in memory. */
687 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
688 if (addr != 0)
c906108c 689 {
d2427a71
RH
690 *optimizedp = 0;
691 *lvalp = lval_memory;
692 *addrp = addr;
693 *realnump = -1;
694 if (bufferp != NULL)
695 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
696 return;
c906108c 697 }
c906108c
SS
698 }
699
d2427a71
RH
700 /* This extra register may actually be in the sigcontext, but our
701 current description of it in alpha_sigtramp_frame_unwind_cache
702 doesn't include it. Too bad. Fall back on whatever's in the
703 outer frame. */
704 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
705 realnump, bufferp);
706}
c906108c 707
d2427a71
RH
708static const struct frame_unwind alpha_sigtramp_frame_unwind = {
709 SIGTRAMP_FRAME,
710 alpha_sigtramp_frame_this_id,
711 alpha_sigtramp_frame_prev_register
712};
c906108c 713
d2427a71
RH
714static const struct frame_unwind *
715alpha_sigtramp_frame_p (CORE_ADDR pc)
716{
717 char *name;
c906108c 718
d2427a71
RH
719 /* We shouldn't even bother to try if the OSABI didn't register
720 a sigcontext_addr handler. */
721 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
722 return NULL;
c906108c 723
d2427a71
RH
724 /* Otherwise we should be in a signal frame. */
725 find_pc_partial_function (pc, &name, NULL, NULL);
726 if (PC_IN_SIGTRAMP (pc, name))
727 return &alpha_sigtramp_frame_unwind;
c906108c 728
d2427a71 729 return NULL;
c906108c 730}
d2427a71
RH
731\f
732/* Fallback alpha frame unwinder. Uses instruction scanning and knows
733 something about the traditional layout of alpha stack frames. */
c906108c 734
d2427a71 735struct alpha_heuristic_unwind_cache
c906108c 736{
d2427a71
RH
737 CORE_ADDR *saved_regs;
738 CORE_ADDR vfp;
739 CORE_ADDR start_pc;
740 int return_reg;
741};
c906108c 742
d2427a71
RH
743/* Heuristic_proc_start may hunt through the text section for a long
744 time across a 2400 baud serial line. Allows the user to limit this
745 search. */
746static unsigned int heuristic_fence_post = 0;
c906108c 747
d2427a71
RH
748/* Attempt to locate the start of the function containing PC. We assume that
749 the previous function ends with an about_to_return insn. Not foolproof by
750 any means, since gcc is happy to put the epilogue in the middle of a
751 function. But we're guessing anyway... */
c906108c 752
d2427a71
RH
753static CORE_ADDR
754alpha_heuristic_proc_start (CORE_ADDR pc)
755{
756 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
757 CORE_ADDR last_non_nop = pc;
758 CORE_ADDR fence = pc - heuristic_fence_post;
759 CORE_ADDR orig_pc = pc;
fbe586ae 760 CORE_ADDR func;
9e0b60a8 761
d2427a71
RH
762 if (pc == 0)
763 return 0;
9e0b60a8 764
fbe586ae
RH
765 /* First see if we can find the start of the function from minimal
766 symbol information. This can succeed with a binary that doesn't
767 have debug info, but hasn't been stripped. */
768 func = get_pc_function_start (pc);
769 if (func)
770 return func;
771
d2427a71
RH
772 if (heuristic_fence_post == UINT_MAX
773 || fence < tdep->vm_min_address)
774 fence = tdep->vm_min_address;
c906108c 775
d2427a71
RH
776 /* Search back for previous return; also stop at a 0, which might be
777 seen for instance before the start of a code section. Don't include
778 nops, since this usually indicates padding between functions. */
779 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 780 {
d2427a71
RH
781 unsigned int insn = alpha_read_insn (pc);
782 switch (insn)
c906108c 783 {
d2427a71
RH
784 case 0: /* invalid insn */
785 case 0x6bfa8001: /* ret $31,($26),1 */
786 return last_non_nop;
787
788 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
789 case 0x47ff041f: /* nop: bis $31,$31,$31 */
790 break;
791
792 default:
793 last_non_nop = pc;
794 break;
c906108c 795 }
d2427a71 796 }
c906108c 797
d2427a71
RH
798 /* It's not clear to me why we reach this point when stopping quietly,
799 but with this test, at least we don't print out warnings for every
800 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
801 if (stop_soon == NO_STOP_QUIETLY)
802 {
803 static int blurb_printed = 0;
c906108c 804
d2427a71
RH
805 if (fence == tdep->vm_min_address)
806 warning ("Hit beginning of text section without finding");
c906108c 807 else
d2427a71
RH
808 warning ("Hit heuristic-fence-post without finding");
809 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 810
d2427a71
RH
811 if (!blurb_printed)
812 {
813 printf_filtered ("\
814This warning occurs if you are debugging a function without any symbols\n\
815(for example, in a stripped executable). In that case, you may wish to\n\
816increase the size of the search with the `set heuristic-fence-post' command.\n\
817\n\
818Otherwise, you told GDB there was a function where there isn't one, or\n\
819(more likely) you have encountered a bug in GDB.\n");
820 blurb_printed = 1;
821 }
822 }
c906108c 823
d2427a71
RH
824 return 0;
825}
c906108c 826
fbe586ae 827static struct alpha_heuristic_unwind_cache *
d2427a71
RH
828alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
829 void **this_prologue_cache,
830 CORE_ADDR start_pc)
831{
832 struct alpha_heuristic_unwind_cache *info;
833 ULONGEST val;
834 CORE_ADDR limit_pc, cur_pc;
835 int frame_reg, frame_size, return_reg, reg;
c906108c 836
d2427a71
RH
837 if (*this_prologue_cache)
838 return *this_prologue_cache;
c906108c 839
d2427a71
RH
840 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
841 *this_prologue_cache = info;
842 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 843
d2427a71
RH
844 limit_pc = frame_pc_unwind (next_frame);
845 if (start_pc == 0)
846 start_pc = alpha_heuristic_proc_start (limit_pc);
847 info->start_pc = start_pc;
c906108c 848
d2427a71
RH
849 frame_reg = ALPHA_SP_REGNUM;
850 frame_size = 0;
851 return_reg = -1;
c906108c 852
d2427a71
RH
853 /* If we've identified a likely place to start, do code scanning. */
854 if (start_pc != 0)
c5aa993b 855 {
d2427a71
RH
856 /* Limit the forward search to 50 instructions. */
857 if (start_pc + 200 < limit_pc)
858 limit_pc = start_pc + 200;
c5aa993b 859
d2427a71
RH
860 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
861 {
862 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 863
d2427a71
RH
864 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
865 {
866 if (word & 0x8000)
867 {
868 /* Consider only the first stack allocation instruction
869 to contain the static size of the frame. */
870 if (frame_size == 0)
871 frame_size = (-word) & 0xffff;
872 }
873 else
874 {
875 /* Exit loop if a positive stack adjustment is found, which
876 usually means that the stack cleanup code in the function
877 epilogue is reached. */
878 break;
879 }
880 }
881 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
882 {
883 reg = (word & 0x03e00000) >> 21;
884
885 if (reg == 31)
886 continue;
887
888 /* Do not compute the address where the register was saved yet,
889 because we don't know yet if the offset will need to be
890 relative to $sp or $fp (we can not compute the address
891 relative to $sp if $sp is updated during the execution of
892 the current subroutine, for instance when doing some alloca).
893 So just store the offset for the moment, and compute the
894 address later when we know whether this frame has a frame
895 pointer or not. */
896 /* Hack: temporarily add one, so that the offset is non-zero
897 and we can tell which registers have save offsets below. */
898 info->saved_regs[reg] = (word & 0xffff) + 1;
899
900 /* Starting with OSF/1-3.2C, the system libraries are shipped
901 without local symbols, but they still contain procedure
902 descriptors without a symbol reference. GDB is currently
903 unable to find these procedure descriptors and uses
904 heuristic_proc_desc instead.
905 As some low level compiler support routines (__div*, __add*)
906 use a non-standard return address register, we have to
907 add some heuristics to determine the return address register,
908 or stepping over these routines will fail.
909 Usually the return address register is the first register
910 saved on the stack, but assembler optimization might
911 rearrange the register saves.
912 So we recognize only a few registers (t7, t9, ra) within
913 the procedure prologue as valid return address registers.
914 If we encounter a return instruction, we extract the
915 the return address register from it.
916
917 FIXME: Rewriting GDB to access the procedure descriptors,
918 e.g. via the minimal symbol table, might obviate this hack. */
919 if (return_reg == -1
920 && cur_pc < (start_pc + 80)
921 && (reg == ALPHA_T7_REGNUM
922 || reg == ALPHA_T9_REGNUM
923 || reg == ALPHA_RA_REGNUM))
924 return_reg = reg;
925 }
926 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
927 return_reg = (word >> 16) & 0x1f;
928 else if (word == 0x47de040f) /* bis sp,sp,fp */
929 frame_reg = ALPHA_GCC_FP_REGNUM;
930 else if (word == 0x47fe040f) /* bis zero,sp,fp */
931 frame_reg = ALPHA_GCC_FP_REGNUM;
932 }
c5aa993b 933
d2427a71
RH
934 /* If we haven't found a valid return address register yet, keep
935 searching in the procedure prologue. */
936 if (return_reg == -1)
937 {
938 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
939 {
940 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 941
d2427a71
RH
942 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
943 {
944 reg = (word & 0x03e00000) >> 21;
945 if (reg == ALPHA_T7_REGNUM
946 || reg == ALPHA_T9_REGNUM
947 || reg == ALPHA_RA_REGNUM)
948 {
949 return_reg = reg;
950 break;
951 }
952 }
953 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
954 {
955 return_reg = (word >> 16) & 0x1f;
956 break;
957 }
85b32d22
RH
958
959 cur_pc += 4;
d2427a71
RH
960 }
961 }
c906108c 962 }
c906108c 963
d2427a71
RH
964 /* Failing that, do default to the customary RA. */
965 if (return_reg == -1)
966 return_reg = ALPHA_RA_REGNUM;
967 info->return_reg = return_reg;
f8453e34 968
d2427a71
RH
969 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
970 info->vfp = val + frame_size;
c906108c 971
d2427a71
RH
972 /* Convert offsets to absolute addresses. See above about adding
973 one to the offsets to make all detected offsets non-zero. */
974 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
975 if (info->saved_regs[reg])
976 info->saved_regs[reg] += val - 1;
977
978 return info;
c906108c 979}
c906108c 980
d2427a71
RH
981/* Given a GDB frame, determine the address of the calling function's
982 frame. This will be used to create a new GDB frame struct. */
983
fbe586ae 984static void
d2427a71
RH
985alpha_heuristic_frame_this_id (struct frame_info *next_frame,
986 void **this_prologue_cache,
987 struct frame_id *this_id)
c906108c 988{
d2427a71
RH
989 struct alpha_heuristic_unwind_cache *info
990 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 991
fbe586ae
RH
992 /* This is meant to halt the backtrace at "_start". Make sure we
993 don't halt it at a generic dummy frame. */
994 if (inside_entry_file (info->start_pc))
995 return;
996
d2427a71 997 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
998}
999
d2427a71
RH
1000/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1001
fbe586ae 1002static void
d2427a71
RH
1003alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1004 void **this_prologue_cache,
1005 int regnum, int *optimizedp,
1006 enum lval_type *lvalp, CORE_ADDR *addrp,
1007 int *realnump, void *bufferp)
c906108c 1008{
d2427a71
RH
1009 struct alpha_heuristic_unwind_cache *info
1010 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1011
1012 /* The PC of the previous frame is stored in the link register of
1013 the current frame. Frob regnum so that we pull the value from
1014 the correct place. */
1015 if (regnum == ALPHA_PC_REGNUM)
1016 regnum = info->return_reg;
1017
1018 /* For all registers known to be saved in the current frame,
1019 do the obvious and pull the value out. */
1020 if (info->saved_regs[regnum])
c906108c 1021 {
d2427a71
RH
1022 *optimizedp = 0;
1023 *lvalp = lval_memory;
1024 *addrp = info->saved_regs[regnum];
1025 *realnump = -1;
1026 if (bufferp != NULL)
1027 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1028 return;
1029 }
1030
d2427a71
RH
1031 /* The stack pointer of the previous frame is computed by popping
1032 the current stack frame. */
1033 if (regnum == ALPHA_SP_REGNUM)
c906108c 1034 {
d2427a71
RH
1035 *optimizedp = 0;
1036 *lvalp = not_lval;
1037 *addrp = 0;
1038 *realnump = -1;
1039 if (bufferp != NULL)
1040 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1041 return;
c906108c 1042 }
95b80706 1043
d2427a71
RH
1044 /* Otherwise assume the next frame has the same register value. */
1045 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1046 realnump, bufferp);
95b80706
JT
1047}
1048
d2427a71
RH
1049static const struct frame_unwind alpha_heuristic_frame_unwind = {
1050 NORMAL_FRAME,
1051 alpha_heuristic_frame_this_id,
1052 alpha_heuristic_frame_prev_register
1053};
c906108c 1054
d2427a71
RH
1055static const struct frame_unwind *
1056alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1057{
d2427a71 1058 return &alpha_heuristic_frame_unwind;
c906108c
SS
1059}
1060
fbe586ae 1061static CORE_ADDR
d2427a71
RH
1062alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1063 void **this_prologue_cache)
c906108c 1064{
d2427a71
RH
1065 struct alpha_heuristic_unwind_cache *info
1066 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1067
d2427a71 1068 return info->vfp;
c906108c
SS
1069}
1070
d2427a71
RH
1071static const struct frame_base alpha_heuristic_frame_base = {
1072 &alpha_heuristic_frame_unwind,
1073 alpha_heuristic_frame_base_address,
1074 alpha_heuristic_frame_base_address,
1075 alpha_heuristic_frame_base_address
1076};
1077
c906108c 1078/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1079 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1080
1081static void
fba45db2 1082reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1083{
1084 reinit_frame_cache ();
1085}
1086
d2427a71
RH
1087\f
1088/* ALPHA stack frames are almost impenetrable. When execution stops,
1089 we basically have to look at symbol information for the function
1090 that we stopped in, which tells us *which* register (if any) is
1091 the base of the frame pointer, and what offset from that register
1092 the frame itself is at.
c906108c 1093
d2427a71
RH
1094 This presents a problem when trying to examine a stack in memory
1095 (that isn't executing at the moment), using the "frame" command. We
1096 don't have a PC, nor do we have any registers except SP.
c906108c 1097
d2427a71
RH
1098 This routine takes two arguments, SP and PC, and tries to make the
1099 cached frames look as if these two arguments defined a frame on the
1100 cache. This allows the rest of info frame to extract the important
1101 arguments without difficulty. */
ec32e4be 1102
d2427a71
RH
1103struct frame_info *
1104alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1105{
d2427a71
RH
1106 if (argc != 2)
1107 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1108
d2427a71 1109 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1110}
1111
d2427a71
RH
1112/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1113 dummy frame. The frame ID's base needs to match the TOS value
1114 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1115 breakpoint. */
d734c450 1116
d2427a71
RH
1117static struct frame_id
1118alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1119{
d2427a71
RH
1120 ULONGEST base;
1121 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1122 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1123}
1124
dc129d82 1125static CORE_ADDR
d2427a71 1126alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1127{
d2427a71
RH
1128 ULONGEST pc;
1129 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1130 return pc;
accc6d1f
JT
1131}
1132
d2427a71 1133\f
ec32e4be
JT
1134/* alpha_software_single_step() is called just before we want to resume
1135 the inferior, if we want to single-step it but there is no hardware
1136 or kernel single-step support (NetBSD on Alpha, for example). We find
1137 the target of the coming instruction and breakpoint it.
1138
1139 single_step is also called just after the inferior stops. If we had
1140 set up a simulated single-step, we undo our damage. */
1141
1142static CORE_ADDR
1143alpha_next_pc (CORE_ADDR pc)
1144{
1145 unsigned int insn;
1146 unsigned int op;
1147 int offset;
1148 LONGEST rav;
1149
1150 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1151
1152 /* Opcode is top 6 bits. */
1153 op = (insn >> 26) & 0x3f;
1154
1155 if (op == 0x1a)
1156 {
1157 /* Jump format: target PC is:
1158 RB & ~3 */
1159 return (read_register ((insn >> 16) & 0x1f) & ~3);
1160 }
1161
1162 if ((op & 0x30) == 0x30)
1163 {
1164 /* Branch format: target PC is:
1165 (new PC) + (4 * sext(displacement)) */
1166 if (op == 0x30 || /* BR */
1167 op == 0x34) /* BSR */
1168 {
1169 branch_taken:
1170 offset = (insn & 0x001fffff);
1171 if (offset & 0x00100000)
1172 offset |= 0xffe00000;
1173 offset *= 4;
1174 return (pc + 4 + offset);
1175 }
1176
1177 /* Need to determine if branch is taken; read RA. */
1178 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1179 switch (op)
1180 {
1181 case 0x38: /* BLBC */
1182 if ((rav & 1) == 0)
1183 goto branch_taken;
1184 break;
1185 case 0x3c: /* BLBS */
1186 if (rav & 1)
1187 goto branch_taken;
1188 break;
1189 case 0x39: /* BEQ */
1190 if (rav == 0)
1191 goto branch_taken;
1192 break;
1193 case 0x3d: /* BNE */
1194 if (rav != 0)
1195 goto branch_taken;
1196 break;
1197 case 0x3a: /* BLT */
1198 if (rav < 0)
1199 goto branch_taken;
1200 break;
1201 case 0x3b: /* BLE */
1202 if (rav <= 0)
1203 goto branch_taken;
1204 break;
1205 case 0x3f: /* BGT */
1206 if (rav > 0)
1207 goto branch_taken;
1208 break;
1209 case 0x3e: /* BGE */
1210 if (rav >= 0)
1211 goto branch_taken;
1212 break;
d2427a71
RH
1213
1214 /* ??? Missing floating-point branches. */
ec32e4be
JT
1215 }
1216 }
1217
1218 /* Not a branch or branch not taken; target PC is:
1219 pc + 4 */
1220 return (pc + 4);
1221}
1222
1223void
1224alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1225{
1226 static CORE_ADDR next_pc;
1227 typedef char binsn_quantum[BREAKPOINT_MAX];
1228 static binsn_quantum break_mem;
1229 CORE_ADDR pc;
1230
1231 if (insert_breakpoints_p)
1232 {
1233 pc = read_pc ();
1234 next_pc = alpha_next_pc (pc);
1235
1236 target_insert_breakpoint (next_pc, break_mem);
1237 }
1238 else
1239 {
1240 target_remove_breakpoint (next_pc, break_mem);
1241 write_pc (next_pc);
1242 }
c906108c
SS
1243}
1244
dc129d82 1245\f
dc129d82
JT
1246/* Initialize the current architecture based on INFO. If possible, re-use an
1247 architecture from ARCHES, which is a list of architectures already created
1248 during this debugging session.
1249
1250 Called e.g. at program startup, when reading a core file, and when reading
1251 a binary file. */
1252
1253static struct gdbarch *
1254alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1255{
1256 struct gdbarch_tdep *tdep;
1257 struct gdbarch *gdbarch;
dc129d82
JT
1258
1259 /* Try to determine the ABI of the object we are loading. */
4be87837 1260 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1261 {
4be87837
DJ
1262 /* If it's an ECOFF file, assume it's OSF/1. */
1263 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1264 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1265 }
1266
1267 /* Find a candidate among extant architectures. */
4be87837
DJ
1268 arches = gdbarch_list_lookup_by_info (arches, &info);
1269 if (arches != NULL)
1270 return arches->gdbarch;
dc129d82
JT
1271
1272 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1273 gdbarch = gdbarch_alloc (&info, tdep);
1274
d2427a71
RH
1275 /* Lowest text address. This is used by heuristic_proc_start()
1276 to decide when to stop looking. */
d9b023cc
JT
1277 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1278
36a6271d 1279 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1280 tdep->sigcontext_addr = NULL;
36a6271d 1281
accc6d1f
JT
1282 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1283
dc129d82
JT
1284 /* Type sizes */
1285 set_gdbarch_short_bit (gdbarch, 16);
1286 set_gdbarch_int_bit (gdbarch, 32);
1287 set_gdbarch_long_bit (gdbarch, 64);
1288 set_gdbarch_long_long_bit (gdbarch, 64);
1289 set_gdbarch_float_bit (gdbarch, 32);
1290 set_gdbarch_double_bit (gdbarch, 64);
1291 set_gdbarch_long_double_bit (gdbarch, 64);
1292 set_gdbarch_ptr_bit (gdbarch, 64);
1293
1294 /* Register info */
1295 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1296 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1297 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1298 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1299
1300 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1301 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1302 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1303 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1304 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1305
1306 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1307 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1308
1309 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1310 set_gdbarch_register_convert_to_virtual (gdbarch,
1311 alpha_register_convert_to_virtual);
1312 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1313
615967cb
RH
1314 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1315
d2427a71 1316 /* Prologue heuristics. */
dc129d82
JT
1317 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1318
5ef165c2
RH
1319 /* Disassembler. */
1320 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1321
d2427a71 1322 /* Call info. */
dc129d82
JT
1323 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1324 set_gdbarch_frameless_function_invocation (gdbarch,
1325 generic_frameless_function_invocation_not);
1326
dc129d82 1327 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
26e9b323 1328 set_gdbarch_deprecated_extract_return_value (gdbarch, alpha_extract_return_value);
4183d812 1329 set_gdbarch_deprecated_store_struct_return (gdbarch, alpha_store_struct_return);
ebba8386 1330 set_gdbarch_deprecated_store_return_value (gdbarch, alpha_store_return_value);
26e9b323 1331 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
dc129d82
JT
1332 alpha_extract_struct_value_address);
1333
1334 /* Settings for calling functions in the inferior. */
c88e30c0 1335 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1336
1337 /* Methods for saving / extracting a dummy frame's ID. */
1338 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1339 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1340
1341 /* Return the unwound PC value. */
1342 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1343
1344 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1345 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1346
95b80706 1347 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1348 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1349
1350 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1351 set_gdbarch_frame_args_skip (gdbarch, 0);
1352
44dffaac 1353 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1354 gdbarch_init_osabi (info, gdbarch);
44dffaac 1355
accc6d1f
JT
1356 /* Now that we have tuned the configuration, set a few final things
1357 based on what the OS ABI has told us. */
1358
1359 if (tdep->jb_pc >= 0)
1360 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1361
d2427a71
RH
1362 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1363 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1364
d2427a71 1365 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1366
d2427a71 1367 return gdbarch;
dc129d82
JT
1368}
1369
c906108c 1370void
fba45db2 1371_initialize_alpha_tdep (void)
c906108c
SS
1372{
1373 struct cmd_list_element *c;
1374
d2427a71 1375 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1376
1377 /* Let the user set the fence post for heuristic_proc_start. */
1378
1379 /* We really would like to have both "0" and "unlimited" work, but
1380 command.c doesn't deal with that. So make it a var_zinteger
1381 because the user can always use "999999" or some such for unlimited. */
1382 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1383 (char *) &heuristic_fence_post,
1384 "\
1385Set the distance searched for the start of a function.\n\
1386If you are debugging a stripped executable, GDB needs to search through the\n\
1387program for the start of a function. This command sets the distance of the\n\
1388search. The only need to set it is when debugging a stripped executable.",
1389 &setlist);
1390 /* We need to throw away the frame cache when we set this, since it
1391 might change our ability to get backtraces. */
9f60d481 1392 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1393 add_show_from_set (c, &showlist);
1394}