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c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
dc129d82
JT
42
43#include "elf-bfd.h"
44
45#include "alpha-tdep.h"
46
c906108c 47\f
fa88f677 48static const char *
636a6dfc
JT
49alpha_register_name (int regno)
50{
5ab84872 51 static const char * const register_names[] =
636a6dfc
JT
52 {
53 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
54 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
55 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
56 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
57 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
58 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
59 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
60 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 61 "pc", "", "unique"
636a6dfc
JT
62 };
63
64 if (regno < 0)
5ab84872 65 return NULL;
636a6dfc 66 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
67 return NULL;
68 return register_names[regno];
636a6dfc 69}
d734c450 70
dc129d82 71static int
d734c450
JT
72alpha_cannot_fetch_register (int regno)
73{
44d88583 74 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
75}
76
dc129d82 77static int
d734c450
JT
78alpha_cannot_store_register (int regno)
79{
44d88583 80 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
81}
82
dc129d82 83static int
d734c450
JT
84alpha_register_convertible (int regno)
85{
86 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
87}
0d056799 88
dc129d82 89static struct type *
0d056799
JT
90alpha_register_virtual_type (int regno)
91{
72667056
RH
92 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
93 return builtin_type_void_data_ptr;
94 if (regno == ALPHA_PC_REGNUM)
95 return builtin_type_void_func_ptr;
96
97 /* Don't need to worry about little vs big endian until
98 some jerk tries to port to alpha-unicosmk. */
99 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 31)
100 return builtin_type_ieee_double_little;
101
102 return builtin_type_int64;
0d056799 103}
f8453e34 104
615967cb
RH
105/* Is REGNUM a member of REGGROUP? */
106
107static int
108alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
109 struct reggroup *group)
110{
111 /* Filter out any registers eliminated, but whose regnum is
112 reserved for backward compatibility, e.g. the vfp. */
113 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
114 return 0;
115
116 /* Since we implement no pseudo registers, save/restore is equal to all. */
117 if (group == all_reggroup
118 || group == save_reggroup
119 || group == restore_reggroup)
120 return 1;
121
122 /* All other groups are non-overlapping. */
123
124 /* Since this is really a PALcode memory slot... */
125 if (regnum == ALPHA_UNIQUE_REGNUM)
126 return group == system_reggroup;
127
128 /* Force the FPCR to be considered part of the floating point state. */
129 if (regnum == ALPHA_FPCR_REGNUM)
130 return group == float_reggroup;
131
132 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
133 return group == float_reggroup;
134 else
135 return group == general_reggroup;
136}
137
dc129d82 138static int
f8453e34
JT
139alpha_register_byte (int regno)
140{
141 return (regno * 8);
142}
143
dc129d82 144static int
f8453e34
JT
145alpha_register_raw_size (int regno)
146{
147 return 8;
148}
149
dc129d82 150static int
f8453e34
JT
151alpha_register_virtual_size (int regno)
152{
153 return 8;
154}
636a6dfc 155
d2427a71
RH
156/* The alpha needs a conversion between register and memory format if the
157 register is a floating point register and memory format is float, as the
158 register format must be double or memory format is an integer with 4
159 bytes or less, as the representation of integers in floating point
160 registers is different. */
161
162static void
163alpha_register_convert_to_virtual (int regnum, struct type *valtype,
164 char *raw_buffer, char *virtual_buffer)
5868c862 165{
d2427a71
RH
166 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
167 {
168 memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (regnum));
169 return;
170 }
171
172 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
173 {
174 double d = deprecated_extract_floating (raw_buffer, REGISTER_RAW_SIZE (regnum));
175 deprecated_store_floating (virtual_buffer, TYPE_LENGTH (valtype), d);
176 }
177 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
178 {
179 ULONGEST l;
180 l = extract_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum));
181 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
182 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
183 }
184 else
185 error ("Cannot retrieve value from floating point register");
186}
5868c862 187
d2427a71
RH
188static void
189alpha_register_convert_to_raw (struct type *valtype, int regnum,
190 char *virtual_buffer, char *raw_buffer)
191{
192 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
193 {
194 memcpy (raw_buffer, virtual_buffer, REGISTER_RAW_SIZE (regnum));
195 return;
196 }
5868c862 197
d2427a71
RH
198 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
199 {
200 double d = deprecated_extract_floating (virtual_buffer, TYPE_LENGTH (valtype));
201 deprecated_store_floating (raw_buffer, REGISTER_RAW_SIZE (regnum), d);
202 }
203 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
204 {
205 ULONGEST l;
206 if (TYPE_UNSIGNED (valtype))
207 l = extract_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype));
208 else
209 l = extract_signed_integer (virtual_buffer, TYPE_LENGTH (valtype));
210 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
211 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), l);
212 }
213 else
214 error ("Cannot store value in floating point register");
5868c862
JT
215}
216
d2427a71
RH
217\f
218/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
219 the stack. The register arguments are stored in ARG_REG_BUFFER, and
220 then moved into the register file; this simplifies the passing of a
221 large struct which extends from the registers to the stack, plus avoids
222 three ptrace invocations per word.
223
224 We don't bother tracking which register values should go in integer
225 regs or fp regs; we load the same values into both.
226
d2427a71
RH
227 If the called function is returning a structure, the address of the
228 structure to be returned is passed as a hidden first argument. */
c906108c 229
d2427a71 230static CORE_ADDR
c88e30c0
RH
231alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
232 struct regcache *regcache, CORE_ADDR bp_addr,
233 int nargs, struct value **args, CORE_ADDR sp,
234 int struct_return, CORE_ADDR struct_addr)
c906108c 235{
d2427a71
RH
236 int i;
237 int accumulate_size = struct_return ? 8 : 0;
d2427a71 238 struct alpha_arg
c906108c 239 {
d2427a71
RH
240 char *contents;
241 int len;
242 int offset;
243 };
c88e30c0
RH
244 struct alpha_arg *alpha_args
245 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 246 register struct alpha_arg *m_arg;
c88e30c0 247 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 248 int required_arg_regs;
c906108c 249
c88e30c0
RH
250 /* The ABI places the address of the called function in T12. */
251 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
252
253 /* Set the return address register to point to the entry point
254 of the program, where a breakpoint lies in wait. */
255 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
256
257 /* Lay out the arguments in memory. */
d2427a71
RH
258 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
259 {
260 struct value *arg = args[i];
261 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 262
d2427a71
RH
263 /* Cast argument to long if necessary as the compiler does it too. */
264 switch (TYPE_CODE (arg_type))
c906108c 265 {
d2427a71
RH
266 case TYPE_CODE_INT:
267 case TYPE_CODE_BOOL:
268 case TYPE_CODE_CHAR:
269 case TYPE_CODE_RANGE:
270 case TYPE_CODE_ENUM:
271 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
272 {
273 arg_type = builtin_type_long;
274 arg = value_cast (arg_type, arg);
275 }
276 break;
c88e30c0
RH
277 case TYPE_CODE_FLT:
278 /* "float" arguments loaded in registers must be passed in
279 register format, aka "double". */
280 if (accumulate_size < sizeof (arg_reg_buffer)
281 && TYPE_LENGTH (arg_type) == 4)
282 {
283 arg_type = builtin_type_double;
284 arg = value_cast (arg_type, arg);
285 }
286 /* Tru64 5.1 has a 128-bit long double, and passes this by
287 invisible reference. No one else uses this data type. */
288 else if (TYPE_LENGTH (arg_type) == 16)
289 {
290 /* Allocate aligned storage. */
291 sp = (sp & -16) - 16;
292
293 /* Write the real data into the stack. */
294 write_memory (sp, VALUE_CONTENTS (arg), 16);
295
296 /* Construct the indirection. */
297 arg_type = lookup_pointer_type (arg_type);
298 arg = value_from_pointer (arg_type, sp);
299 }
300 break;
d2427a71
RH
301 default:
302 break;
c906108c 303 }
d2427a71
RH
304 m_arg->len = TYPE_LENGTH (arg_type);
305 m_arg->offset = accumulate_size;
306 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
307 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
308 }
309
d2427a71
RH
310 /* Determine required argument register loads, loading an argument register
311 is expensive as it uses three ptrace calls. */
312 required_arg_regs = accumulate_size / 8;
313 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
314 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 315
d2427a71 316 /* Make room for the arguments on the stack. */
c88e30c0
RH
317 if (accumulate_size < sizeof(arg_reg_buffer))
318 accumulate_size = 0;
319 else
320 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 321 sp -= accumulate_size;
c906108c 322
c88e30c0 323 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 324 sp &= ~15;
c906108c 325
d2427a71
RH
326 /* `Push' arguments on the stack. */
327 for (i = nargs; m_arg--, --i >= 0;)
c906108c 328 {
c88e30c0
RH
329 char *contents = m_arg->contents;
330 int offset = m_arg->offset;
331 int len = m_arg->len;
332
333 /* Copy the bytes destined for registers into arg_reg_buffer. */
334 if (offset < sizeof(arg_reg_buffer))
335 {
336 if (offset + len <= sizeof(arg_reg_buffer))
337 {
338 memcpy (arg_reg_buffer + offset, contents, len);
339 continue;
340 }
341 else
342 {
343 int tlen = sizeof(arg_reg_buffer) - offset;
344 memcpy (arg_reg_buffer + offset, contents, tlen);
345 offset += tlen;
346 contents += tlen;
347 len -= tlen;
348 }
349 }
350
351 /* Everything else goes to the stack. */
352 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 353 }
c88e30c0
RH
354 if (struct_return)
355 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 356
d2427a71
RH
357 /* Load the argument registers. */
358 for (i = 0; i < required_arg_regs; i++)
359 {
09cc52fd
RH
360 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
361 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
362 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
363 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 364 }
c906108c 365
09cc52fd
RH
366 /* Finally, update the stack pointer. */
367 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
368
c88e30c0 369 return sp;
c906108c
SS
370}
371
d2427a71
RH
372/* Given a return value in `regbuf' with a type `valtype',
373 extract and copy its value into `valbuf'. */
374
dc129d82 375static void
d2427a71
RH
376alpha_extract_return_value (struct type *valtype,
377 char regbuf[ALPHA_REGISTER_BYTES], char *valbuf)
140f9984 378{
d2427a71
RH
379 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
380 alpha_register_convert_to_virtual (FP0_REGNUM, valtype,
381 regbuf + REGISTER_BYTE (FP0_REGNUM),
382 valbuf);
383 else
384 memcpy (valbuf, regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
385 TYPE_LENGTH (valtype));
140f9984
JT
386}
387
d2427a71
RH
388/* Given a return value in `regbuf' with a type `valtype',
389 write its value into the appropriate register. */
0d056799 390
d2427a71
RH
391static void
392alpha_store_return_value (struct type *valtype, char *valbuf)
c906108c 393{
5ab84872 394 char raw_buffer[ALPHA_REGISTER_SIZE];
d2427a71
RH
395 int regnum = ALPHA_V0_REGNUM;
396 int length = TYPE_LENGTH (valtype);
397
398 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
c906108c 399 {
d2427a71 400 regnum = FP0_REGNUM;
5ab84872 401 length = ALPHA_REGISTER_SIZE;
d2427a71 402 alpha_register_convert_to_raw (valtype, regnum, valbuf, raw_buffer);
c906108c 403 }
d2427a71
RH
404 else
405 memcpy (raw_buffer, valbuf, length);
406
407 deprecated_write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, length);
c906108c
SS
408}
409
d2427a71
RH
410static int
411alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 412{
d2427a71
RH
413 /* Structures are returned by ref in extra arg0. */
414 return 1;
415}
c906108c 416
d2427a71
RH
417static void
418alpha_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
419{
420 /* Store the address of the place in which to copy the structure the
421 subroutine will return. Handled by alpha_push_arguments. */
c906108c
SS
422}
423
dc129d82 424static CORE_ADDR
d2427a71 425alpha_extract_struct_value_address (char *regbuf)
c906108c 426{
7c0b4a20
AC
427 return (extract_unsigned_integer (regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
428 REGISTER_RAW_SIZE (ALPHA_V0_REGNUM)));
c906108c
SS
429}
430
d2427a71
RH
431\f
432static const unsigned char *
433alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 434{
d2427a71
RH
435 static const unsigned char alpha_breakpoint[] =
436 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 437
d2427a71
RH
438 *lenptr = sizeof(alpha_breakpoint);
439 return (alpha_breakpoint);
440}
c906108c 441
d2427a71
RH
442\f
443/* This returns the PC of the first insn after the prologue.
444 If we can't find the prologue, then return 0. */
c906108c 445
d2427a71
RH
446CORE_ADDR
447alpha_after_prologue (CORE_ADDR pc)
c906108c 448{
d2427a71
RH
449 struct symtab_and_line sal;
450 CORE_ADDR func_addr, func_end;
c906108c 451
d2427a71 452 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 453 return 0;
c906108c 454
d2427a71
RH
455 sal = find_pc_line (func_addr, 0);
456 if (sal.end < func_end)
457 return sal.end;
c5aa993b 458
d2427a71
RH
459 /* The line after the prologue is after the end of the function. In this
460 case, tell the caller to find the prologue the hard way. */
461 return 0;
c906108c
SS
462}
463
d2427a71
RH
464/* Read an instruction from memory at PC, looking through breakpoints. */
465
466unsigned int
467alpha_read_insn (CORE_ADDR pc)
c906108c 468{
d2427a71
RH
469 char buf[4];
470 int status;
c5aa993b 471
d2427a71
RH
472 status = read_memory_nobpt (pc, buf, 4);
473 if (status)
474 memory_error (status, pc);
475 return extract_unsigned_integer (buf, 4);
476}
c5aa993b 477
d2427a71
RH
478/* To skip prologues, I use this predicate. Returns either PC itself
479 if the code at PC does not look like a function prologue; otherwise
480 returns an address that (if we're lucky) follows the prologue. If
481 LENIENT, then we must skip everything which is involved in setting
482 up the frame (it's OK to skip more, just so long as we don't skip
483 anything which might clobber the registers which are being saved. */
c906108c 484
d2427a71
RH
485static CORE_ADDR
486alpha_skip_prologue (CORE_ADDR pc)
487{
488 unsigned long inst;
489 int offset;
490 CORE_ADDR post_prologue_pc;
491 char buf[4];
c906108c 492
d2427a71
RH
493 /* Silently return the unaltered pc upon memory errors.
494 This could happen on OSF/1 if decode_line_1 tries to skip the
495 prologue for quickstarted shared library functions when the
496 shared library is not yet mapped in.
497 Reading target memory is slow over serial lines, so we perform
498 this check only if the target has shared libraries (which all
499 Alpha targets do). */
500 if (target_read_memory (pc, buf, 4))
501 return pc;
c906108c 502
d2427a71
RH
503 /* See if we can determine the end of the prologue via the symbol table.
504 If so, then return either PC, or the PC after the prologue, whichever
505 is greater. */
c906108c 506
d2427a71
RH
507 post_prologue_pc = alpha_after_prologue (pc);
508 if (post_prologue_pc != 0)
509 return max (pc, post_prologue_pc);
c906108c 510
d2427a71
RH
511 /* Can't determine prologue from the symbol table, need to examine
512 instructions. */
dc1b0db2 513
d2427a71
RH
514 /* Skip the typical prologue instructions. These are the stack adjustment
515 instruction and the instructions that save registers on the stack
516 or in the gcc frame. */
517 for (offset = 0; offset < 100; offset += 4)
518 {
519 inst = alpha_read_insn (pc + offset);
c906108c 520
d2427a71
RH
521 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
522 continue;
523 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
524 continue;
525 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
526 continue;
527 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
528 continue;
c906108c 529
d2427a71
RH
530 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
531 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
532 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
533 continue;
c906108c 534
d2427a71
RH
535 if (inst == 0x47de040f) /* bis sp,sp,fp */
536 continue;
537 if (inst == 0x47fe040f) /* bis zero,sp,fp */
538 continue;
c906108c 539
d2427a71 540 break;
c906108c 541 }
d2427a71
RH
542 return pc + offset;
543}
c906108c 544
d2427a71
RH
545\f
546/* Figure out where the longjmp will land.
547 We expect the first arg to be a pointer to the jmp_buf structure from
548 which we extract the PC (JB_PC) that we will land at. The PC is copied
549 into the "pc". This routine returns true on success. */
c906108c
SS
550
551static int
d2427a71 552alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 553{
d2427a71
RH
554 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
555 CORE_ADDR jb_addr;
5ab84872 556 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 557
d2427a71 558 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 559
d2427a71
RH
560 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
561 raw_buffer, tdep->jb_elt_size))
c906108c 562 return 0;
d2427a71 563
7c0b4a20 564 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 565 return 1;
c906108c
SS
566}
567
d2427a71
RH
568\f
569/* Frame unwinder for signal trampolines. We use alpha tdep bits that
570 describe the location and shape of the sigcontext structure. After
571 that, all registers are in memory, so it's easy. */
572/* ??? Shouldn't we be able to do this generically, rather than with
573 OSABI data specific to Alpha? */
574
575struct alpha_sigtramp_unwind_cache
c906108c 576{
d2427a71
RH
577 CORE_ADDR sigcontext_addr;
578};
c906108c 579
d2427a71
RH
580static struct alpha_sigtramp_unwind_cache *
581alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
582 void **this_prologue_cache)
583{
584 struct alpha_sigtramp_unwind_cache *info;
585 struct gdbarch_tdep *tdep;
c906108c 586
d2427a71
RH
587 if (*this_prologue_cache)
588 return *this_prologue_cache;
c906108c 589
d2427a71
RH
590 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
591 *this_prologue_cache = info;
c906108c 592
d2427a71
RH
593 tdep = gdbarch_tdep (current_gdbarch);
594 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 595
d2427a71 596 return info;
c906108c
SS
597}
598
d2427a71
RH
599/* Return the address of REGNO in a sigtramp frame. Since this is all
600 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 601
d2427a71
RH
602#ifndef SIGFRAME_PC_OFF
603#define SIGFRAME_PC_OFF (2 * 8)
604#define SIGFRAME_REGSAVE_OFF (4 * 8)
605#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
606#endif
c5aa993b 607
d2427a71
RH
608static CORE_ADDR
609alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
610{
611 if (regno < 32)
612 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
613 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
614 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
615 if (regno == PC_REGNUM)
616 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 617
d2427a71 618 return 0;
c906108c
SS
619}
620
d2427a71
RH
621/* Given a GDB frame, determine the address of the calling function's
622 frame. This will be used to create a new GDB frame struct. */
140f9984 623
dc129d82 624static void
d2427a71
RH
625alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
626 void **this_prologue_cache,
627 struct frame_id *this_id)
c906108c 628{
d2427a71
RH
629 struct alpha_sigtramp_unwind_cache *info
630 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
631 struct gdbarch_tdep *tdep;
632 CORE_ADDR stack_addr, code_addr;
633
634 /* If the OSABI couldn't locate the sigcontext, give up. */
635 if (info->sigcontext_addr == 0)
636 return;
637
638 /* If we have dynamic signal trampolines, find their start.
639 If we do not, then we must assume there is a symbol record
640 that can provide the start address. */
641 tdep = gdbarch_tdep (current_gdbarch);
642 if (tdep->dynamic_sigtramp_offset)
c906108c 643 {
d2427a71
RH
644 int offset;
645 code_addr = frame_pc_unwind (next_frame);
646 offset = tdep->dynamic_sigtramp_offset (code_addr);
647 if (offset >= 0)
648 code_addr -= offset;
c906108c 649 else
d2427a71 650 code_addr = 0;
c906108c 651 }
d2427a71
RH
652 else
653 code_addr = frame_func_unwind (next_frame);
c906108c 654
d2427a71
RH
655 /* The stack address is trivially read from the sigcontext. */
656 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
657 ALPHA_SP_REGNUM);
658 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 659
d2427a71 660 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
661}
662
d2427a71 663/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 664
d2427a71
RH
665static void
666alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
667 void **this_prologue_cache,
668 int regnum, int *optimizedp,
669 enum lval_type *lvalp, CORE_ADDR *addrp,
670 int *realnump, void *bufferp)
c906108c 671{
d2427a71
RH
672 struct alpha_sigtramp_unwind_cache *info
673 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
674 CORE_ADDR addr;
c906108c 675
d2427a71 676 if (info->sigcontext_addr != 0)
c906108c 677 {
d2427a71
RH
678 /* All integer and fp registers are stored in memory. */
679 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
680 if (addr != 0)
c906108c 681 {
d2427a71
RH
682 *optimizedp = 0;
683 *lvalp = lval_memory;
684 *addrp = addr;
685 *realnump = -1;
686 if (bufferp != NULL)
687 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
688 return;
c906108c 689 }
c906108c
SS
690 }
691
d2427a71
RH
692 /* This extra register may actually be in the sigcontext, but our
693 current description of it in alpha_sigtramp_frame_unwind_cache
694 doesn't include it. Too bad. Fall back on whatever's in the
695 outer frame. */
696 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
697 realnump, bufferp);
698}
c906108c 699
d2427a71
RH
700static const struct frame_unwind alpha_sigtramp_frame_unwind = {
701 SIGTRAMP_FRAME,
702 alpha_sigtramp_frame_this_id,
703 alpha_sigtramp_frame_prev_register
704};
c906108c 705
d2427a71
RH
706static const struct frame_unwind *
707alpha_sigtramp_frame_p (CORE_ADDR pc)
708{
709 char *name;
c906108c 710
d2427a71
RH
711 /* We shouldn't even bother to try if the OSABI didn't register
712 a sigcontext_addr handler. */
713 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
714 return NULL;
c906108c 715
d2427a71
RH
716 /* Otherwise we should be in a signal frame. */
717 find_pc_partial_function (pc, &name, NULL, NULL);
718 if (PC_IN_SIGTRAMP (pc, name))
719 return &alpha_sigtramp_frame_unwind;
c906108c 720
d2427a71 721 return NULL;
c906108c 722}
d2427a71
RH
723\f
724/* Fallback alpha frame unwinder. Uses instruction scanning and knows
725 something about the traditional layout of alpha stack frames. */
c906108c 726
d2427a71 727struct alpha_heuristic_unwind_cache
c906108c 728{
d2427a71
RH
729 CORE_ADDR *saved_regs;
730 CORE_ADDR vfp;
731 CORE_ADDR start_pc;
732 int return_reg;
733};
c906108c 734
d2427a71
RH
735/* Heuristic_proc_start may hunt through the text section for a long
736 time across a 2400 baud serial line. Allows the user to limit this
737 search. */
738static unsigned int heuristic_fence_post = 0;
c906108c 739
d2427a71
RH
740/* Attempt to locate the start of the function containing PC. We assume that
741 the previous function ends with an about_to_return insn. Not foolproof by
742 any means, since gcc is happy to put the epilogue in the middle of a
743 function. But we're guessing anyway... */
c906108c 744
d2427a71
RH
745static CORE_ADDR
746alpha_heuristic_proc_start (CORE_ADDR pc)
747{
748 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
749 CORE_ADDR last_non_nop = pc;
750 CORE_ADDR fence = pc - heuristic_fence_post;
751 CORE_ADDR orig_pc = pc;
fbe586ae 752 CORE_ADDR func;
9e0b60a8 753
d2427a71
RH
754 if (pc == 0)
755 return 0;
9e0b60a8 756
fbe586ae
RH
757 /* First see if we can find the start of the function from minimal
758 symbol information. This can succeed with a binary that doesn't
759 have debug info, but hasn't been stripped. */
760 func = get_pc_function_start (pc);
761 if (func)
762 return func;
763
d2427a71
RH
764 if (heuristic_fence_post == UINT_MAX
765 || fence < tdep->vm_min_address)
766 fence = tdep->vm_min_address;
c906108c 767
d2427a71
RH
768 /* Search back for previous return; also stop at a 0, which might be
769 seen for instance before the start of a code section. Don't include
770 nops, since this usually indicates padding between functions. */
771 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 772 {
d2427a71
RH
773 unsigned int insn = alpha_read_insn (pc);
774 switch (insn)
c906108c 775 {
d2427a71
RH
776 case 0: /* invalid insn */
777 case 0x6bfa8001: /* ret $31,($26),1 */
778 return last_non_nop;
779
780 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
781 case 0x47ff041f: /* nop: bis $31,$31,$31 */
782 break;
783
784 default:
785 last_non_nop = pc;
786 break;
c906108c 787 }
d2427a71 788 }
c906108c 789
d2427a71
RH
790 /* It's not clear to me why we reach this point when stopping quietly,
791 but with this test, at least we don't print out warnings for every
792 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
793 if (stop_soon == NO_STOP_QUIETLY)
794 {
795 static int blurb_printed = 0;
c906108c 796
d2427a71
RH
797 if (fence == tdep->vm_min_address)
798 warning ("Hit beginning of text section without finding");
c906108c 799 else
d2427a71
RH
800 warning ("Hit heuristic-fence-post without finding");
801 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 802
d2427a71
RH
803 if (!blurb_printed)
804 {
805 printf_filtered ("\
806This warning occurs if you are debugging a function without any symbols\n\
807(for example, in a stripped executable). In that case, you may wish to\n\
808increase the size of the search with the `set heuristic-fence-post' command.\n\
809\n\
810Otherwise, you told GDB there was a function where there isn't one, or\n\
811(more likely) you have encountered a bug in GDB.\n");
812 blurb_printed = 1;
813 }
814 }
c906108c 815
d2427a71
RH
816 return 0;
817}
c906108c 818
fbe586ae 819static struct alpha_heuristic_unwind_cache *
d2427a71
RH
820alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
821 void **this_prologue_cache,
822 CORE_ADDR start_pc)
823{
824 struct alpha_heuristic_unwind_cache *info;
825 ULONGEST val;
826 CORE_ADDR limit_pc, cur_pc;
827 int frame_reg, frame_size, return_reg, reg;
c906108c 828
d2427a71
RH
829 if (*this_prologue_cache)
830 return *this_prologue_cache;
c906108c 831
d2427a71
RH
832 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
833 *this_prologue_cache = info;
834 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 835
d2427a71
RH
836 limit_pc = frame_pc_unwind (next_frame);
837 if (start_pc == 0)
838 start_pc = alpha_heuristic_proc_start (limit_pc);
839 info->start_pc = start_pc;
c906108c 840
d2427a71
RH
841 frame_reg = ALPHA_SP_REGNUM;
842 frame_size = 0;
843 return_reg = -1;
c906108c 844
d2427a71
RH
845 /* If we've identified a likely place to start, do code scanning. */
846 if (start_pc != 0)
c5aa993b 847 {
d2427a71
RH
848 /* Limit the forward search to 50 instructions. */
849 if (start_pc + 200 < limit_pc)
850 limit_pc = start_pc + 200;
c5aa993b 851
d2427a71
RH
852 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
853 {
854 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 855
d2427a71
RH
856 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
857 {
858 if (word & 0x8000)
859 {
860 /* Consider only the first stack allocation instruction
861 to contain the static size of the frame. */
862 if (frame_size == 0)
863 frame_size = (-word) & 0xffff;
864 }
865 else
866 {
867 /* Exit loop if a positive stack adjustment is found, which
868 usually means that the stack cleanup code in the function
869 epilogue is reached. */
870 break;
871 }
872 }
873 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
874 {
875 reg = (word & 0x03e00000) >> 21;
876
877 if (reg == 31)
878 continue;
879
880 /* Do not compute the address where the register was saved yet,
881 because we don't know yet if the offset will need to be
882 relative to $sp or $fp (we can not compute the address
883 relative to $sp if $sp is updated during the execution of
884 the current subroutine, for instance when doing some alloca).
885 So just store the offset for the moment, and compute the
886 address later when we know whether this frame has a frame
887 pointer or not. */
888 /* Hack: temporarily add one, so that the offset is non-zero
889 and we can tell which registers have save offsets below. */
890 info->saved_regs[reg] = (word & 0xffff) + 1;
891
892 /* Starting with OSF/1-3.2C, the system libraries are shipped
893 without local symbols, but they still contain procedure
894 descriptors without a symbol reference. GDB is currently
895 unable to find these procedure descriptors and uses
896 heuristic_proc_desc instead.
897 As some low level compiler support routines (__div*, __add*)
898 use a non-standard return address register, we have to
899 add some heuristics to determine the return address register,
900 or stepping over these routines will fail.
901 Usually the return address register is the first register
902 saved on the stack, but assembler optimization might
903 rearrange the register saves.
904 So we recognize only a few registers (t7, t9, ra) within
905 the procedure prologue as valid return address registers.
906 If we encounter a return instruction, we extract the
907 the return address register from it.
908
909 FIXME: Rewriting GDB to access the procedure descriptors,
910 e.g. via the minimal symbol table, might obviate this hack. */
911 if (return_reg == -1
912 && cur_pc < (start_pc + 80)
913 && (reg == ALPHA_T7_REGNUM
914 || reg == ALPHA_T9_REGNUM
915 || reg == ALPHA_RA_REGNUM))
916 return_reg = reg;
917 }
918 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
919 return_reg = (word >> 16) & 0x1f;
920 else if (word == 0x47de040f) /* bis sp,sp,fp */
921 frame_reg = ALPHA_GCC_FP_REGNUM;
922 else if (word == 0x47fe040f) /* bis zero,sp,fp */
923 frame_reg = ALPHA_GCC_FP_REGNUM;
924 }
c5aa993b 925
d2427a71
RH
926 /* If we haven't found a valid return address register yet, keep
927 searching in the procedure prologue. */
928 if (return_reg == -1)
929 {
930 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
931 {
932 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 933
d2427a71
RH
934 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
935 {
936 reg = (word & 0x03e00000) >> 21;
937 if (reg == ALPHA_T7_REGNUM
938 || reg == ALPHA_T9_REGNUM
939 || reg == ALPHA_RA_REGNUM)
940 {
941 return_reg = reg;
942 break;
943 }
944 }
945 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
946 {
947 return_reg = (word >> 16) & 0x1f;
948 break;
949 }
85b32d22
RH
950
951 cur_pc += 4;
d2427a71
RH
952 }
953 }
c906108c 954 }
c906108c 955
d2427a71
RH
956 /* Failing that, do default to the customary RA. */
957 if (return_reg == -1)
958 return_reg = ALPHA_RA_REGNUM;
959 info->return_reg = return_reg;
f8453e34 960
d2427a71
RH
961 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
962 info->vfp = val + frame_size;
c906108c 963
d2427a71
RH
964 /* Convert offsets to absolute addresses. See above about adding
965 one to the offsets to make all detected offsets non-zero. */
966 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
967 if (info->saved_regs[reg])
968 info->saved_regs[reg] += val - 1;
969
970 return info;
c906108c 971}
c906108c 972
d2427a71
RH
973/* Given a GDB frame, determine the address of the calling function's
974 frame. This will be used to create a new GDB frame struct. */
975
fbe586ae 976static void
d2427a71
RH
977alpha_heuristic_frame_this_id (struct frame_info *next_frame,
978 void **this_prologue_cache,
979 struct frame_id *this_id)
c906108c 980{
d2427a71
RH
981 struct alpha_heuristic_unwind_cache *info
982 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 983
fbe586ae
RH
984 /* This is meant to halt the backtrace at "_start". Make sure we
985 don't halt it at a generic dummy frame. */
986 if (inside_entry_file (info->start_pc))
987 return;
988
d2427a71 989 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
990}
991
d2427a71
RH
992/* Retrieve the value of REGNUM in FRAME. Don't give up! */
993
fbe586ae 994static void
d2427a71
RH
995alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
996 void **this_prologue_cache,
997 int regnum, int *optimizedp,
998 enum lval_type *lvalp, CORE_ADDR *addrp,
999 int *realnump, void *bufferp)
c906108c 1000{
d2427a71
RH
1001 struct alpha_heuristic_unwind_cache *info
1002 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1003
1004 /* The PC of the previous frame is stored in the link register of
1005 the current frame. Frob regnum so that we pull the value from
1006 the correct place. */
1007 if (regnum == ALPHA_PC_REGNUM)
1008 regnum = info->return_reg;
1009
1010 /* For all registers known to be saved in the current frame,
1011 do the obvious and pull the value out. */
1012 if (info->saved_regs[regnum])
c906108c 1013 {
d2427a71
RH
1014 *optimizedp = 0;
1015 *lvalp = lval_memory;
1016 *addrp = info->saved_regs[regnum];
1017 *realnump = -1;
1018 if (bufferp != NULL)
1019 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1020 return;
1021 }
1022
d2427a71
RH
1023 /* The stack pointer of the previous frame is computed by popping
1024 the current stack frame. */
1025 if (regnum == ALPHA_SP_REGNUM)
c906108c 1026 {
d2427a71
RH
1027 *optimizedp = 0;
1028 *lvalp = not_lval;
1029 *addrp = 0;
1030 *realnump = -1;
1031 if (bufferp != NULL)
1032 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1033 return;
c906108c 1034 }
95b80706 1035
d2427a71
RH
1036 /* Otherwise assume the next frame has the same register value. */
1037 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1038 realnump, bufferp);
95b80706
JT
1039}
1040
d2427a71
RH
1041static const struct frame_unwind alpha_heuristic_frame_unwind = {
1042 NORMAL_FRAME,
1043 alpha_heuristic_frame_this_id,
1044 alpha_heuristic_frame_prev_register
1045};
c906108c 1046
d2427a71
RH
1047static const struct frame_unwind *
1048alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1049{
d2427a71 1050 return &alpha_heuristic_frame_unwind;
c906108c
SS
1051}
1052
fbe586ae 1053static CORE_ADDR
d2427a71
RH
1054alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1055 void **this_prologue_cache)
c906108c 1056{
d2427a71
RH
1057 struct alpha_heuristic_unwind_cache *info
1058 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1059
d2427a71 1060 return info->vfp;
c906108c
SS
1061}
1062
d2427a71
RH
1063static const struct frame_base alpha_heuristic_frame_base = {
1064 &alpha_heuristic_frame_unwind,
1065 alpha_heuristic_frame_base_address,
1066 alpha_heuristic_frame_base_address,
1067 alpha_heuristic_frame_base_address
1068};
1069
c906108c 1070/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1071 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1072
1073static void
fba45db2 1074reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1075{
1076 reinit_frame_cache ();
1077}
1078
d2427a71
RH
1079\f
1080/* ALPHA stack frames are almost impenetrable. When execution stops,
1081 we basically have to look at symbol information for the function
1082 that we stopped in, which tells us *which* register (if any) is
1083 the base of the frame pointer, and what offset from that register
1084 the frame itself is at.
c906108c 1085
d2427a71
RH
1086 This presents a problem when trying to examine a stack in memory
1087 (that isn't executing at the moment), using the "frame" command. We
1088 don't have a PC, nor do we have any registers except SP.
c906108c 1089
d2427a71
RH
1090 This routine takes two arguments, SP and PC, and tries to make the
1091 cached frames look as if these two arguments defined a frame on the
1092 cache. This allows the rest of info frame to extract the important
1093 arguments without difficulty. */
ec32e4be 1094
d2427a71
RH
1095struct frame_info *
1096alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1097{
d2427a71
RH
1098 if (argc != 2)
1099 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1100
d2427a71 1101 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1102}
1103
d2427a71
RH
1104/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1105 dummy frame. The frame ID's base needs to match the TOS value
1106 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1107 breakpoint. */
d734c450 1108
d2427a71
RH
1109static struct frame_id
1110alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1111{
d2427a71
RH
1112 ULONGEST base;
1113 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1114 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1115}
1116
dc129d82 1117static CORE_ADDR
d2427a71 1118alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1119{
d2427a71
RH
1120 ULONGEST pc;
1121 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1122 return pc;
accc6d1f
JT
1123}
1124
d2427a71 1125\f
ec32e4be
JT
1126/* alpha_software_single_step() is called just before we want to resume
1127 the inferior, if we want to single-step it but there is no hardware
1128 or kernel single-step support (NetBSD on Alpha, for example). We find
1129 the target of the coming instruction and breakpoint it.
1130
1131 single_step is also called just after the inferior stops. If we had
1132 set up a simulated single-step, we undo our damage. */
1133
1134static CORE_ADDR
1135alpha_next_pc (CORE_ADDR pc)
1136{
1137 unsigned int insn;
1138 unsigned int op;
1139 int offset;
1140 LONGEST rav;
1141
1142 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1143
1144 /* Opcode is top 6 bits. */
1145 op = (insn >> 26) & 0x3f;
1146
1147 if (op == 0x1a)
1148 {
1149 /* Jump format: target PC is:
1150 RB & ~3 */
1151 return (read_register ((insn >> 16) & 0x1f) & ~3);
1152 }
1153
1154 if ((op & 0x30) == 0x30)
1155 {
1156 /* Branch format: target PC is:
1157 (new PC) + (4 * sext(displacement)) */
1158 if (op == 0x30 || /* BR */
1159 op == 0x34) /* BSR */
1160 {
1161 branch_taken:
1162 offset = (insn & 0x001fffff);
1163 if (offset & 0x00100000)
1164 offset |= 0xffe00000;
1165 offset *= 4;
1166 return (pc + 4 + offset);
1167 }
1168
1169 /* Need to determine if branch is taken; read RA. */
1170 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1171 switch (op)
1172 {
1173 case 0x38: /* BLBC */
1174 if ((rav & 1) == 0)
1175 goto branch_taken;
1176 break;
1177 case 0x3c: /* BLBS */
1178 if (rav & 1)
1179 goto branch_taken;
1180 break;
1181 case 0x39: /* BEQ */
1182 if (rav == 0)
1183 goto branch_taken;
1184 break;
1185 case 0x3d: /* BNE */
1186 if (rav != 0)
1187 goto branch_taken;
1188 break;
1189 case 0x3a: /* BLT */
1190 if (rav < 0)
1191 goto branch_taken;
1192 break;
1193 case 0x3b: /* BLE */
1194 if (rav <= 0)
1195 goto branch_taken;
1196 break;
1197 case 0x3f: /* BGT */
1198 if (rav > 0)
1199 goto branch_taken;
1200 break;
1201 case 0x3e: /* BGE */
1202 if (rav >= 0)
1203 goto branch_taken;
1204 break;
d2427a71
RH
1205
1206 /* ??? Missing floating-point branches. */
ec32e4be
JT
1207 }
1208 }
1209
1210 /* Not a branch or branch not taken; target PC is:
1211 pc + 4 */
1212 return (pc + 4);
1213}
1214
1215void
1216alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1217{
1218 static CORE_ADDR next_pc;
1219 typedef char binsn_quantum[BREAKPOINT_MAX];
1220 static binsn_quantum break_mem;
1221 CORE_ADDR pc;
1222
1223 if (insert_breakpoints_p)
1224 {
1225 pc = read_pc ();
1226 next_pc = alpha_next_pc (pc);
1227
1228 target_insert_breakpoint (next_pc, break_mem);
1229 }
1230 else
1231 {
1232 target_remove_breakpoint (next_pc, break_mem);
1233 write_pc (next_pc);
1234 }
c906108c
SS
1235}
1236
dc129d82 1237\f
dc129d82
JT
1238/* Initialize the current architecture based on INFO. If possible, re-use an
1239 architecture from ARCHES, which is a list of architectures already created
1240 during this debugging session.
1241
1242 Called e.g. at program startup, when reading a core file, and when reading
1243 a binary file. */
1244
1245static struct gdbarch *
1246alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1247{
1248 struct gdbarch_tdep *tdep;
1249 struct gdbarch *gdbarch;
dc129d82
JT
1250
1251 /* Try to determine the ABI of the object we are loading. */
4be87837 1252 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1253 {
4be87837
DJ
1254 /* If it's an ECOFF file, assume it's OSF/1. */
1255 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1256 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1257 }
1258
1259 /* Find a candidate among extant architectures. */
4be87837
DJ
1260 arches = gdbarch_list_lookup_by_info (arches, &info);
1261 if (arches != NULL)
1262 return arches->gdbarch;
dc129d82
JT
1263
1264 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1265 gdbarch = gdbarch_alloc (&info, tdep);
1266
d2427a71
RH
1267 /* Lowest text address. This is used by heuristic_proc_start()
1268 to decide when to stop looking. */
d9b023cc
JT
1269 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1270
36a6271d 1271 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1272 tdep->sigcontext_addr = NULL;
36a6271d 1273
accc6d1f
JT
1274 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1275
dc129d82
JT
1276 /* Type sizes */
1277 set_gdbarch_short_bit (gdbarch, 16);
1278 set_gdbarch_int_bit (gdbarch, 32);
1279 set_gdbarch_long_bit (gdbarch, 64);
1280 set_gdbarch_long_long_bit (gdbarch, 64);
1281 set_gdbarch_float_bit (gdbarch, 32);
1282 set_gdbarch_double_bit (gdbarch, 64);
1283 set_gdbarch_long_double_bit (gdbarch, 64);
1284 set_gdbarch_ptr_bit (gdbarch, 64);
1285
1286 /* Register info */
1287 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1288 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1289 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1290 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1291
1292 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1293 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1294 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1295 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1296 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1297
1298 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1299 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1300
1301 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1302 set_gdbarch_register_convert_to_virtual (gdbarch,
1303 alpha_register_convert_to_virtual);
1304 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1305
615967cb
RH
1306 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1307
d2427a71 1308 /* Prologue heuristics. */
dc129d82
JT
1309 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1310
5ef165c2
RH
1311 /* Disassembler. */
1312 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1313
d2427a71 1314 /* Call info. */
dc129d82
JT
1315 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1316 set_gdbarch_frameless_function_invocation (gdbarch,
1317 generic_frameless_function_invocation_not);
1318
dc129d82 1319 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
26e9b323 1320 set_gdbarch_deprecated_extract_return_value (gdbarch, alpha_extract_return_value);
4183d812 1321 set_gdbarch_deprecated_store_struct_return (gdbarch, alpha_store_struct_return);
ebba8386 1322 set_gdbarch_deprecated_store_return_value (gdbarch, alpha_store_return_value);
26e9b323 1323 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
dc129d82
JT
1324 alpha_extract_struct_value_address);
1325
1326 /* Settings for calling functions in the inferior. */
c88e30c0 1327 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1328
1329 /* Methods for saving / extracting a dummy frame's ID. */
1330 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1331 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1332
1333 /* Return the unwound PC value. */
1334 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1335
1336 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1337 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1338
95b80706 1339 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1340 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1341
1342 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1343 set_gdbarch_frame_args_skip (gdbarch, 0);
1344
44dffaac 1345 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1346 gdbarch_init_osabi (info, gdbarch);
44dffaac 1347
accc6d1f
JT
1348 /* Now that we have tuned the configuration, set a few final things
1349 based on what the OS ABI has told us. */
1350
1351 if (tdep->jb_pc >= 0)
1352 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1353
d2427a71
RH
1354 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1355 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1356
d2427a71 1357 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1358
d2427a71 1359 return gdbarch;
dc129d82
JT
1360}
1361
c906108c 1362void
fba45db2 1363_initialize_alpha_tdep (void)
c906108c
SS
1364{
1365 struct cmd_list_element *c;
1366
d2427a71 1367 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1368
1369 /* Let the user set the fence post for heuristic_proc_start. */
1370
1371 /* We really would like to have both "0" and "unlimited" work, but
1372 command.c doesn't deal with that. So make it a var_zinteger
1373 because the user can always use "999999" or some such for unlimited. */
1374 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1375 (char *) &heuristic_fence_post,
1376 "\
1377Set the distance searched for the start of a function.\n\
1378If you are debugging a stripped executable, GDB needs to search through the\n\
1379program for the start of a function. This command sets the distance of the\n\
1380search. The only need to set it is when debugging a stripped executable.",
1381 &setlist);
1382 /* We need to throw away the frame cache when we set this, since it
1383 might change our ability to get backtraces. */
9f60d481 1384 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1385 add_show_from_set (c, &showlist);
1386}