]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/alpha-tdep.c
2003-06-01 Andrew Cagney <cagney@redhat.com>
[thirdparty/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "frame.h"
d2427a71
RH
24#include "frame-unwind.h"
25#include "frame-base.h"
c906108c
SS
26#include "inferior.h"
27#include "symtab.h"
28#include "value.h"
29#include "gdbcmd.h"
30#include "gdbcore.h"
31#include "dis-asm.h"
32#include "symfile.h"
33#include "objfiles.h"
34#include "gdb_string.h"
c5f0f3d0 35#include "linespec.h"
4e052eda 36#include "regcache.h"
d16aafd8 37#include "doublest.h"
dc129d82 38#include "arch-utils.h"
4be87837 39#include "osabi.h"
fe898f56 40#include "block.h"
dc129d82
JT
41
42#include "elf-bfd.h"
43
44#include "alpha-tdep.h"
45
c906108c 46\f
fa88f677 47static const char *
636a6dfc
JT
48alpha_register_name (int regno)
49{
5ab84872 50 static const char * const register_names[] =
636a6dfc
JT
51 {
52 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
53 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
54 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
55 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
56 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
57 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
58 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
59 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 60 "pc", "", "unique"
636a6dfc
JT
61 };
62
63 if (regno < 0)
5ab84872 64 return NULL;
636a6dfc 65 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
66 return NULL;
67 return register_names[regno];
636a6dfc 68}
d734c450 69
dc129d82 70static int
d734c450
JT
71alpha_cannot_fetch_register (int regno)
72{
44d88583 73 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
74}
75
dc129d82 76static int
d734c450
JT
77alpha_cannot_store_register (int regno)
78{
44d88583 79 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
80}
81
dc129d82 82static int
d734c450
JT
83alpha_register_convertible (int regno)
84{
85 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
86}
0d056799 87
dc129d82 88static struct type *
0d056799
JT
89alpha_register_virtual_type (int regno)
90{
91 return ((regno >= FP0_REGNUM && regno < (FP0_REGNUM+31))
92 ? builtin_type_double : builtin_type_long);
93}
f8453e34 94
dc129d82 95static int
f8453e34
JT
96alpha_register_byte (int regno)
97{
98 return (regno * 8);
99}
100
dc129d82 101static int
f8453e34
JT
102alpha_register_raw_size (int regno)
103{
104 return 8;
105}
106
dc129d82 107static int
f8453e34
JT
108alpha_register_virtual_size (int regno)
109{
110 return 8;
111}
636a6dfc 112
d2427a71
RH
113/* The alpha needs a conversion between register and memory format if the
114 register is a floating point register and memory format is float, as the
115 register format must be double or memory format is an integer with 4
116 bytes or less, as the representation of integers in floating point
117 registers is different. */
118
119static void
120alpha_register_convert_to_virtual (int regnum, struct type *valtype,
121 char *raw_buffer, char *virtual_buffer)
5868c862 122{
d2427a71
RH
123 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
124 {
125 memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (regnum));
126 return;
127 }
128
129 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
130 {
131 double d = deprecated_extract_floating (raw_buffer, REGISTER_RAW_SIZE (regnum));
132 deprecated_store_floating (virtual_buffer, TYPE_LENGTH (valtype), d);
133 }
134 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
135 {
136 ULONGEST l;
137 l = extract_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum));
138 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
139 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
140 }
141 else
142 error ("Cannot retrieve value from floating point register");
143}
5868c862 144
d2427a71
RH
145static void
146alpha_register_convert_to_raw (struct type *valtype, int regnum,
147 char *virtual_buffer, char *raw_buffer)
148{
149 if (TYPE_LENGTH (valtype) >= REGISTER_RAW_SIZE (regnum))
150 {
151 memcpy (raw_buffer, virtual_buffer, REGISTER_RAW_SIZE (regnum));
152 return;
153 }
5868c862 154
d2427a71
RH
155 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
156 {
157 double d = deprecated_extract_floating (virtual_buffer, TYPE_LENGTH (valtype));
158 deprecated_store_floating (raw_buffer, REGISTER_RAW_SIZE (regnum), d);
159 }
160 else if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 4)
161 {
162 ULONGEST l;
163 if (TYPE_UNSIGNED (valtype))
164 l = extract_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype));
165 else
166 l = extract_signed_integer (virtual_buffer, TYPE_LENGTH (valtype));
167 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
168 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), l);
169 }
170 else
171 error ("Cannot store value in floating point register");
5868c862
JT
172}
173
d2427a71
RH
174\f
175/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
176 the stack. The register arguments are stored in ARG_REG_BUFFER, and
177 then moved into the register file; this simplifies the passing of a
178 large struct which extends from the registers to the stack, plus avoids
179 three ptrace invocations per word.
180
181 We don't bother tracking which register values should go in integer
182 regs or fp regs; we load the same values into both.
183
d2427a71
RH
184 If the called function is returning a structure, the address of the
185 structure to be returned is passed as a hidden first argument. */
c906108c 186
d2427a71 187static CORE_ADDR
c88e30c0
RH
188alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
189 struct regcache *regcache, CORE_ADDR bp_addr,
190 int nargs, struct value **args, CORE_ADDR sp,
191 int struct_return, CORE_ADDR struct_addr)
c906108c 192{
d2427a71
RH
193 int i;
194 int accumulate_size = struct_return ? 8 : 0;
d2427a71 195 struct alpha_arg
c906108c 196 {
d2427a71
RH
197 char *contents;
198 int len;
199 int offset;
200 };
c88e30c0
RH
201 struct alpha_arg *alpha_args
202 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 203 register struct alpha_arg *m_arg;
c88e30c0 204 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 205 int required_arg_regs;
c906108c 206
c88e30c0
RH
207 /* The ABI places the address of the called function in T12. */
208 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
209
210 /* Set the return address register to point to the entry point
211 of the program, where a breakpoint lies in wait. */
212 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
213
214 /* Lay out the arguments in memory. */
d2427a71
RH
215 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
216 {
217 struct value *arg = args[i];
218 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 219
d2427a71
RH
220 /* Cast argument to long if necessary as the compiler does it too. */
221 switch (TYPE_CODE (arg_type))
c906108c 222 {
d2427a71
RH
223 case TYPE_CODE_INT:
224 case TYPE_CODE_BOOL:
225 case TYPE_CODE_CHAR:
226 case TYPE_CODE_RANGE:
227 case TYPE_CODE_ENUM:
228 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
229 {
230 arg_type = builtin_type_long;
231 arg = value_cast (arg_type, arg);
232 }
233 break;
c88e30c0
RH
234 case TYPE_CODE_FLT:
235 /* "float" arguments loaded in registers must be passed in
236 register format, aka "double". */
237 if (accumulate_size < sizeof (arg_reg_buffer)
238 && TYPE_LENGTH (arg_type) == 4)
239 {
240 arg_type = builtin_type_double;
241 arg = value_cast (arg_type, arg);
242 }
243 /* Tru64 5.1 has a 128-bit long double, and passes this by
244 invisible reference. No one else uses this data type. */
245 else if (TYPE_LENGTH (arg_type) == 16)
246 {
247 /* Allocate aligned storage. */
248 sp = (sp & -16) - 16;
249
250 /* Write the real data into the stack. */
251 write_memory (sp, VALUE_CONTENTS (arg), 16);
252
253 /* Construct the indirection. */
254 arg_type = lookup_pointer_type (arg_type);
255 arg = value_from_pointer (arg_type, sp);
256 }
257 break;
d2427a71
RH
258 default:
259 break;
c906108c 260 }
d2427a71
RH
261 m_arg->len = TYPE_LENGTH (arg_type);
262 m_arg->offset = accumulate_size;
263 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
264 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
265 }
266
d2427a71
RH
267 /* Determine required argument register loads, loading an argument register
268 is expensive as it uses three ptrace calls. */
269 required_arg_regs = accumulate_size / 8;
270 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
271 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 272
d2427a71 273 /* Make room for the arguments on the stack. */
c88e30c0
RH
274 if (accumulate_size < sizeof(arg_reg_buffer))
275 accumulate_size = 0;
276 else
277 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 278 sp -= accumulate_size;
c906108c 279
c88e30c0 280 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 281 sp &= ~15;
c906108c 282
d2427a71
RH
283 /* `Push' arguments on the stack. */
284 for (i = nargs; m_arg--, --i >= 0;)
c906108c 285 {
c88e30c0
RH
286 char *contents = m_arg->contents;
287 int offset = m_arg->offset;
288 int len = m_arg->len;
289
290 /* Copy the bytes destined for registers into arg_reg_buffer. */
291 if (offset < sizeof(arg_reg_buffer))
292 {
293 if (offset + len <= sizeof(arg_reg_buffer))
294 {
295 memcpy (arg_reg_buffer + offset, contents, len);
296 continue;
297 }
298 else
299 {
300 int tlen = sizeof(arg_reg_buffer) - offset;
301 memcpy (arg_reg_buffer + offset, contents, tlen);
302 offset += tlen;
303 contents += tlen;
304 len -= tlen;
305 }
306 }
307
308 /* Everything else goes to the stack. */
309 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 310 }
c88e30c0
RH
311 if (struct_return)
312 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 313
d2427a71
RH
314 /* Load the argument registers. */
315 for (i = 0; i < required_arg_regs; i++)
316 {
09cc52fd
RH
317 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
318 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
319 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
320 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 321 }
c906108c 322
09cc52fd
RH
323 /* Finally, update the stack pointer. */
324 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
325
c88e30c0 326 return sp;
c906108c
SS
327}
328
d2427a71
RH
329/* Given a return value in `regbuf' with a type `valtype',
330 extract and copy its value into `valbuf'. */
331
dc129d82 332static void
d2427a71
RH
333alpha_extract_return_value (struct type *valtype,
334 char regbuf[ALPHA_REGISTER_BYTES], char *valbuf)
140f9984 335{
d2427a71
RH
336 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
337 alpha_register_convert_to_virtual (FP0_REGNUM, valtype,
338 regbuf + REGISTER_BYTE (FP0_REGNUM),
339 valbuf);
340 else
341 memcpy (valbuf, regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
342 TYPE_LENGTH (valtype));
140f9984
JT
343}
344
d2427a71
RH
345/* Given a return value in `regbuf' with a type `valtype',
346 write its value into the appropriate register. */
0d056799 347
d2427a71
RH
348static void
349alpha_store_return_value (struct type *valtype, char *valbuf)
c906108c 350{
5ab84872 351 char raw_buffer[ALPHA_REGISTER_SIZE];
d2427a71
RH
352 int regnum = ALPHA_V0_REGNUM;
353 int length = TYPE_LENGTH (valtype);
354
355 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
c906108c 356 {
d2427a71 357 regnum = FP0_REGNUM;
5ab84872 358 length = ALPHA_REGISTER_SIZE;
d2427a71 359 alpha_register_convert_to_raw (valtype, regnum, valbuf, raw_buffer);
c906108c 360 }
d2427a71
RH
361 else
362 memcpy (raw_buffer, valbuf, length);
363
364 deprecated_write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, length);
c906108c
SS
365}
366
d2427a71
RH
367static int
368alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 369{
d2427a71
RH
370 /* Structures are returned by ref in extra arg0. */
371 return 1;
372}
c906108c 373
d2427a71
RH
374static void
375alpha_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
376{
377 /* Store the address of the place in which to copy the structure the
378 subroutine will return. Handled by alpha_push_arguments. */
c906108c
SS
379}
380
dc129d82 381static CORE_ADDR
d2427a71 382alpha_extract_struct_value_address (char *regbuf)
c906108c 383{
7c0b4a20
AC
384 return (extract_unsigned_integer (regbuf + REGISTER_BYTE (ALPHA_V0_REGNUM),
385 REGISTER_RAW_SIZE (ALPHA_V0_REGNUM)));
c906108c
SS
386}
387
d2427a71
RH
388\f
389static const unsigned char *
390alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 391{
d2427a71
RH
392 static const unsigned char alpha_breakpoint[] =
393 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 394
d2427a71
RH
395 *lenptr = sizeof(alpha_breakpoint);
396 return (alpha_breakpoint);
397}
c906108c 398
d2427a71
RH
399\f
400/* This returns the PC of the first insn after the prologue.
401 If we can't find the prologue, then return 0. */
c906108c 402
d2427a71
RH
403CORE_ADDR
404alpha_after_prologue (CORE_ADDR pc)
c906108c 405{
d2427a71
RH
406 struct symtab_and_line sal;
407 CORE_ADDR func_addr, func_end;
c906108c 408
d2427a71 409 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 410 return 0;
c906108c 411
d2427a71
RH
412 sal = find_pc_line (func_addr, 0);
413 if (sal.end < func_end)
414 return sal.end;
c5aa993b 415
d2427a71
RH
416 /* The line after the prologue is after the end of the function. In this
417 case, tell the caller to find the prologue the hard way. */
418 return 0;
c906108c
SS
419}
420
d2427a71
RH
421/* Read an instruction from memory at PC, looking through breakpoints. */
422
423unsigned int
424alpha_read_insn (CORE_ADDR pc)
c906108c 425{
d2427a71
RH
426 char buf[4];
427 int status;
c5aa993b 428
d2427a71
RH
429 status = read_memory_nobpt (pc, buf, 4);
430 if (status)
431 memory_error (status, pc);
432 return extract_unsigned_integer (buf, 4);
433}
c5aa993b 434
d2427a71
RH
435/* To skip prologues, I use this predicate. Returns either PC itself
436 if the code at PC does not look like a function prologue; otherwise
437 returns an address that (if we're lucky) follows the prologue. If
438 LENIENT, then we must skip everything which is involved in setting
439 up the frame (it's OK to skip more, just so long as we don't skip
440 anything which might clobber the registers which are being saved. */
c906108c 441
d2427a71
RH
442static CORE_ADDR
443alpha_skip_prologue (CORE_ADDR pc)
444{
445 unsigned long inst;
446 int offset;
447 CORE_ADDR post_prologue_pc;
448 char buf[4];
c906108c 449
d2427a71
RH
450 /* Silently return the unaltered pc upon memory errors.
451 This could happen on OSF/1 if decode_line_1 tries to skip the
452 prologue for quickstarted shared library functions when the
453 shared library is not yet mapped in.
454 Reading target memory is slow over serial lines, so we perform
455 this check only if the target has shared libraries (which all
456 Alpha targets do). */
457 if (target_read_memory (pc, buf, 4))
458 return pc;
c906108c 459
d2427a71
RH
460 /* See if we can determine the end of the prologue via the symbol table.
461 If so, then return either PC, or the PC after the prologue, whichever
462 is greater. */
c906108c 463
d2427a71
RH
464 post_prologue_pc = alpha_after_prologue (pc);
465 if (post_prologue_pc != 0)
466 return max (pc, post_prologue_pc);
c906108c 467
d2427a71
RH
468 /* Can't determine prologue from the symbol table, need to examine
469 instructions. */
dc1b0db2 470
d2427a71
RH
471 /* Skip the typical prologue instructions. These are the stack adjustment
472 instruction and the instructions that save registers on the stack
473 or in the gcc frame. */
474 for (offset = 0; offset < 100; offset += 4)
475 {
476 inst = alpha_read_insn (pc + offset);
c906108c 477
d2427a71
RH
478 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
479 continue;
480 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
481 continue;
482 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
483 continue;
484 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
485 continue;
c906108c 486
d2427a71
RH
487 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
488 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
489 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
490 continue;
c906108c 491
d2427a71
RH
492 if (inst == 0x47de040f) /* bis sp,sp,fp */
493 continue;
494 if (inst == 0x47fe040f) /* bis zero,sp,fp */
495 continue;
c906108c 496
d2427a71 497 break;
c906108c 498 }
d2427a71
RH
499 return pc + offset;
500}
c906108c 501
d2427a71
RH
502\f
503/* Figure out where the longjmp will land.
504 We expect the first arg to be a pointer to the jmp_buf structure from
505 which we extract the PC (JB_PC) that we will land at. The PC is copied
506 into the "pc". This routine returns true on success. */
c906108c
SS
507
508static int
d2427a71 509alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 510{
d2427a71
RH
511 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
512 CORE_ADDR jb_addr;
5ab84872 513 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 514
d2427a71 515 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 516
d2427a71
RH
517 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
518 raw_buffer, tdep->jb_elt_size))
c906108c 519 return 0;
d2427a71 520
7c0b4a20 521 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 522 return 1;
c906108c
SS
523}
524
d2427a71
RH
525\f
526/* Frame unwinder for signal trampolines. We use alpha tdep bits that
527 describe the location and shape of the sigcontext structure. After
528 that, all registers are in memory, so it's easy. */
529/* ??? Shouldn't we be able to do this generically, rather than with
530 OSABI data specific to Alpha? */
531
532struct alpha_sigtramp_unwind_cache
c906108c 533{
d2427a71
RH
534 CORE_ADDR sigcontext_addr;
535};
c906108c 536
d2427a71
RH
537static struct alpha_sigtramp_unwind_cache *
538alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
539 void **this_prologue_cache)
540{
541 struct alpha_sigtramp_unwind_cache *info;
542 struct gdbarch_tdep *tdep;
c906108c 543
d2427a71
RH
544 if (*this_prologue_cache)
545 return *this_prologue_cache;
c906108c 546
d2427a71
RH
547 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
548 *this_prologue_cache = info;
c906108c 549
d2427a71
RH
550 tdep = gdbarch_tdep (current_gdbarch);
551 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 552
d2427a71 553 return info;
c906108c
SS
554}
555
d2427a71
RH
556/* Return the address of REGNO in a sigtramp frame. Since this is all
557 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 558
d2427a71
RH
559#ifndef SIGFRAME_PC_OFF
560#define SIGFRAME_PC_OFF (2 * 8)
561#define SIGFRAME_REGSAVE_OFF (4 * 8)
562#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
563#endif
c5aa993b 564
d2427a71
RH
565static CORE_ADDR
566alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
567{
568 if (regno < 32)
569 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
570 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
571 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
572 if (regno == PC_REGNUM)
573 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 574
d2427a71 575 return 0;
c906108c
SS
576}
577
d2427a71
RH
578/* Given a GDB frame, determine the address of the calling function's
579 frame. This will be used to create a new GDB frame struct. */
140f9984 580
dc129d82 581static void
d2427a71
RH
582alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
583 void **this_prologue_cache,
584 struct frame_id *this_id)
c906108c 585{
d2427a71
RH
586 struct alpha_sigtramp_unwind_cache *info
587 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
588 struct gdbarch_tdep *tdep;
589 CORE_ADDR stack_addr, code_addr;
590
591 /* If the OSABI couldn't locate the sigcontext, give up. */
592 if (info->sigcontext_addr == 0)
593 return;
594
595 /* If we have dynamic signal trampolines, find their start.
596 If we do not, then we must assume there is a symbol record
597 that can provide the start address. */
598 tdep = gdbarch_tdep (current_gdbarch);
599 if (tdep->dynamic_sigtramp_offset)
c906108c 600 {
d2427a71
RH
601 int offset;
602 code_addr = frame_pc_unwind (next_frame);
603 offset = tdep->dynamic_sigtramp_offset (code_addr);
604 if (offset >= 0)
605 code_addr -= offset;
c906108c 606 else
d2427a71 607 code_addr = 0;
c906108c 608 }
d2427a71
RH
609 else
610 code_addr = frame_func_unwind (next_frame);
c906108c 611
d2427a71
RH
612 /* The stack address is trivially read from the sigcontext. */
613 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
614 ALPHA_SP_REGNUM);
615 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 616
d2427a71 617 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
618}
619
d2427a71 620/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 621
d2427a71
RH
622static void
623alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
624 void **this_prologue_cache,
625 int regnum, int *optimizedp,
626 enum lval_type *lvalp, CORE_ADDR *addrp,
627 int *realnump, void *bufferp)
c906108c 628{
d2427a71
RH
629 struct alpha_sigtramp_unwind_cache *info
630 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
631 CORE_ADDR addr;
c906108c 632
d2427a71 633 if (info->sigcontext_addr != 0)
c906108c 634 {
d2427a71
RH
635 /* All integer and fp registers are stored in memory. */
636 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
637 if (addr != 0)
c906108c 638 {
d2427a71
RH
639 *optimizedp = 0;
640 *lvalp = lval_memory;
641 *addrp = addr;
642 *realnump = -1;
643 if (bufferp != NULL)
644 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
645 return;
c906108c 646 }
c906108c
SS
647 }
648
d2427a71
RH
649 /* This extra register may actually be in the sigcontext, but our
650 current description of it in alpha_sigtramp_frame_unwind_cache
651 doesn't include it. Too bad. Fall back on whatever's in the
652 outer frame. */
653 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
654 realnump, bufferp);
655}
c906108c 656
d2427a71
RH
657static const struct frame_unwind alpha_sigtramp_frame_unwind = {
658 SIGTRAMP_FRAME,
659 alpha_sigtramp_frame_this_id,
660 alpha_sigtramp_frame_prev_register
661};
c906108c 662
d2427a71
RH
663static const struct frame_unwind *
664alpha_sigtramp_frame_p (CORE_ADDR pc)
665{
666 char *name;
c906108c 667
d2427a71
RH
668 /* We shouldn't even bother to try if the OSABI didn't register
669 a sigcontext_addr handler. */
670 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
671 return NULL;
c906108c 672
d2427a71
RH
673 /* Otherwise we should be in a signal frame. */
674 find_pc_partial_function (pc, &name, NULL, NULL);
675 if (PC_IN_SIGTRAMP (pc, name))
676 return &alpha_sigtramp_frame_unwind;
c906108c 677
d2427a71 678 return NULL;
c906108c 679}
d2427a71
RH
680\f
681/* Fallback alpha frame unwinder. Uses instruction scanning and knows
682 something about the traditional layout of alpha stack frames. */
c906108c 683
d2427a71 684struct alpha_heuristic_unwind_cache
c906108c 685{
d2427a71
RH
686 CORE_ADDR *saved_regs;
687 CORE_ADDR vfp;
688 CORE_ADDR start_pc;
689 int return_reg;
690};
c906108c 691
d2427a71
RH
692/* Heuristic_proc_start may hunt through the text section for a long
693 time across a 2400 baud serial line. Allows the user to limit this
694 search. */
695static unsigned int heuristic_fence_post = 0;
c906108c 696
d2427a71
RH
697/* Attempt to locate the start of the function containing PC. We assume that
698 the previous function ends with an about_to_return insn. Not foolproof by
699 any means, since gcc is happy to put the epilogue in the middle of a
700 function. But we're guessing anyway... */
c906108c 701
d2427a71
RH
702static CORE_ADDR
703alpha_heuristic_proc_start (CORE_ADDR pc)
704{
705 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
706 CORE_ADDR last_non_nop = pc;
707 CORE_ADDR fence = pc - heuristic_fence_post;
708 CORE_ADDR orig_pc = pc;
fbe586ae 709 CORE_ADDR func;
9e0b60a8 710
d2427a71
RH
711 if (pc == 0)
712 return 0;
9e0b60a8 713
fbe586ae
RH
714 /* First see if we can find the start of the function from minimal
715 symbol information. This can succeed with a binary that doesn't
716 have debug info, but hasn't been stripped. */
717 func = get_pc_function_start (pc);
718 if (func)
719 return func;
720
d2427a71
RH
721 if (heuristic_fence_post == UINT_MAX
722 || fence < tdep->vm_min_address)
723 fence = tdep->vm_min_address;
c906108c 724
d2427a71
RH
725 /* Search back for previous return; also stop at a 0, which might be
726 seen for instance before the start of a code section. Don't include
727 nops, since this usually indicates padding between functions. */
728 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 729 {
d2427a71
RH
730 unsigned int insn = alpha_read_insn (pc);
731 switch (insn)
c906108c 732 {
d2427a71
RH
733 case 0: /* invalid insn */
734 case 0x6bfa8001: /* ret $31,($26),1 */
735 return last_non_nop;
736
737 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
738 case 0x47ff041f: /* nop: bis $31,$31,$31 */
739 break;
740
741 default:
742 last_non_nop = pc;
743 break;
c906108c 744 }
d2427a71 745 }
c906108c 746
d2427a71
RH
747 /* It's not clear to me why we reach this point when stopping quietly,
748 but with this test, at least we don't print out warnings for every
749 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
750 if (stop_soon == NO_STOP_QUIETLY)
751 {
752 static int blurb_printed = 0;
c906108c 753
d2427a71
RH
754 if (fence == tdep->vm_min_address)
755 warning ("Hit beginning of text section without finding");
c906108c 756 else
d2427a71
RH
757 warning ("Hit heuristic-fence-post without finding");
758 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 759
d2427a71
RH
760 if (!blurb_printed)
761 {
762 printf_filtered ("\
763This warning occurs if you are debugging a function without any symbols\n\
764(for example, in a stripped executable). In that case, you may wish to\n\
765increase the size of the search with the `set heuristic-fence-post' command.\n\
766\n\
767Otherwise, you told GDB there was a function where there isn't one, or\n\
768(more likely) you have encountered a bug in GDB.\n");
769 blurb_printed = 1;
770 }
771 }
c906108c 772
d2427a71
RH
773 return 0;
774}
c906108c 775
fbe586ae 776static struct alpha_heuristic_unwind_cache *
d2427a71
RH
777alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
778 void **this_prologue_cache,
779 CORE_ADDR start_pc)
780{
781 struct alpha_heuristic_unwind_cache *info;
782 ULONGEST val;
783 CORE_ADDR limit_pc, cur_pc;
784 int frame_reg, frame_size, return_reg, reg;
c906108c 785
d2427a71
RH
786 if (*this_prologue_cache)
787 return *this_prologue_cache;
c906108c 788
d2427a71
RH
789 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
790 *this_prologue_cache = info;
791 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 792
d2427a71
RH
793 limit_pc = frame_pc_unwind (next_frame);
794 if (start_pc == 0)
795 start_pc = alpha_heuristic_proc_start (limit_pc);
796 info->start_pc = start_pc;
c906108c 797
d2427a71
RH
798 frame_reg = ALPHA_SP_REGNUM;
799 frame_size = 0;
800 return_reg = -1;
c906108c 801
d2427a71
RH
802 /* If we've identified a likely place to start, do code scanning. */
803 if (start_pc != 0)
c5aa993b 804 {
d2427a71
RH
805 /* Limit the forward search to 50 instructions. */
806 if (start_pc + 200 < limit_pc)
807 limit_pc = start_pc + 200;
c5aa993b 808
d2427a71
RH
809 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
810 {
811 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 812
d2427a71
RH
813 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
814 {
815 if (word & 0x8000)
816 {
817 /* Consider only the first stack allocation instruction
818 to contain the static size of the frame. */
819 if (frame_size == 0)
820 frame_size = (-word) & 0xffff;
821 }
822 else
823 {
824 /* Exit loop if a positive stack adjustment is found, which
825 usually means that the stack cleanup code in the function
826 epilogue is reached. */
827 break;
828 }
829 }
830 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
831 {
832 reg = (word & 0x03e00000) >> 21;
833
834 if (reg == 31)
835 continue;
836
837 /* Do not compute the address where the register was saved yet,
838 because we don't know yet if the offset will need to be
839 relative to $sp or $fp (we can not compute the address
840 relative to $sp if $sp is updated during the execution of
841 the current subroutine, for instance when doing some alloca).
842 So just store the offset for the moment, and compute the
843 address later when we know whether this frame has a frame
844 pointer or not. */
845 /* Hack: temporarily add one, so that the offset is non-zero
846 and we can tell which registers have save offsets below. */
847 info->saved_regs[reg] = (word & 0xffff) + 1;
848
849 /* Starting with OSF/1-3.2C, the system libraries are shipped
850 without local symbols, but they still contain procedure
851 descriptors without a symbol reference. GDB is currently
852 unable to find these procedure descriptors and uses
853 heuristic_proc_desc instead.
854 As some low level compiler support routines (__div*, __add*)
855 use a non-standard return address register, we have to
856 add some heuristics to determine the return address register,
857 or stepping over these routines will fail.
858 Usually the return address register is the first register
859 saved on the stack, but assembler optimization might
860 rearrange the register saves.
861 So we recognize only a few registers (t7, t9, ra) within
862 the procedure prologue as valid return address registers.
863 If we encounter a return instruction, we extract the
864 the return address register from it.
865
866 FIXME: Rewriting GDB to access the procedure descriptors,
867 e.g. via the minimal symbol table, might obviate this hack. */
868 if (return_reg == -1
869 && cur_pc < (start_pc + 80)
870 && (reg == ALPHA_T7_REGNUM
871 || reg == ALPHA_T9_REGNUM
872 || reg == ALPHA_RA_REGNUM))
873 return_reg = reg;
874 }
875 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
876 return_reg = (word >> 16) & 0x1f;
877 else if (word == 0x47de040f) /* bis sp,sp,fp */
878 frame_reg = ALPHA_GCC_FP_REGNUM;
879 else if (word == 0x47fe040f) /* bis zero,sp,fp */
880 frame_reg = ALPHA_GCC_FP_REGNUM;
881 }
c5aa993b 882
d2427a71
RH
883 /* If we haven't found a valid return address register yet, keep
884 searching in the procedure prologue. */
885 if (return_reg == -1)
886 {
887 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
888 {
889 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 890
d2427a71
RH
891 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
892 {
893 reg = (word & 0x03e00000) >> 21;
894 if (reg == ALPHA_T7_REGNUM
895 || reg == ALPHA_T9_REGNUM
896 || reg == ALPHA_RA_REGNUM)
897 {
898 return_reg = reg;
899 break;
900 }
901 }
902 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
903 {
904 return_reg = (word >> 16) & 0x1f;
905 break;
906 }
85b32d22
RH
907
908 cur_pc += 4;
d2427a71
RH
909 }
910 }
c906108c 911 }
c906108c 912
d2427a71
RH
913 /* Failing that, do default to the customary RA. */
914 if (return_reg == -1)
915 return_reg = ALPHA_RA_REGNUM;
916 info->return_reg = return_reg;
f8453e34 917
d2427a71
RH
918 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
919 info->vfp = val + frame_size;
c906108c 920
d2427a71
RH
921 /* Convert offsets to absolute addresses. See above about adding
922 one to the offsets to make all detected offsets non-zero. */
923 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
924 if (info->saved_regs[reg])
925 info->saved_regs[reg] += val - 1;
926
927 return info;
c906108c 928}
c906108c 929
d2427a71
RH
930/* Given a GDB frame, determine the address of the calling function's
931 frame. This will be used to create a new GDB frame struct. */
932
fbe586ae 933static void
d2427a71
RH
934alpha_heuristic_frame_this_id (struct frame_info *next_frame,
935 void **this_prologue_cache,
936 struct frame_id *this_id)
c906108c 937{
d2427a71
RH
938 struct alpha_heuristic_unwind_cache *info
939 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 940
fbe586ae
RH
941 /* This is meant to halt the backtrace at "_start". Make sure we
942 don't halt it at a generic dummy frame. */
943 if (inside_entry_file (info->start_pc))
944 return;
945
d2427a71 946 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
947}
948
d2427a71
RH
949/* Retrieve the value of REGNUM in FRAME. Don't give up! */
950
fbe586ae 951static void
d2427a71
RH
952alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
953 void **this_prologue_cache,
954 int regnum, int *optimizedp,
955 enum lval_type *lvalp, CORE_ADDR *addrp,
956 int *realnump, void *bufferp)
c906108c 957{
d2427a71
RH
958 struct alpha_heuristic_unwind_cache *info
959 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
960
961 /* The PC of the previous frame is stored in the link register of
962 the current frame. Frob regnum so that we pull the value from
963 the correct place. */
964 if (regnum == ALPHA_PC_REGNUM)
965 regnum = info->return_reg;
966
967 /* For all registers known to be saved in the current frame,
968 do the obvious and pull the value out. */
969 if (info->saved_regs[regnum])
c906108c 970 {
d2427a71
RH
971 *optimizedp = 0;
972 *lvalp = lval_memory;
973 *addrp = info->saved_regs[regnum];
974 *realnump = -1;
975 if (bufferp != NULL)
976 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
977 return;
978 }
979
d2427a71
RH
980 /* The stack pointer of the previous frame is computed by popping
981 the current stack frame. */
982 if (regnum == ALPHA_SP_REGNUM)
c906108c 983 {
d2427a71
RH
984 *optimizedp = 0;
985 *lvalp = not_lval;
986 *addrp = 0;
987 *realnump = -1;
988 if (bufferp != NULL)
989 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
990 return;
c906108c 991 }
95b80706 992
d2427a71
RH
993 /* Otherwise assume the next frame has the same register value. */
994 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
995 realnump, bufferp);
95b80706
JT
996}
997
d2427a71
RH
998static const struct frame_unwind alpha_heuristic_frame_unwind = {
999 NORMAL_FRAME,
1000 alpha_heuristic_frame_this_id,
1001 alpha_heuristic_frame_prev_register
1002};
c906108c 1003
d2427a71
RH
1004static const struct frame_unwind *
1005alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1006{
d2427a71 1007 return &alpha_heuristic_frame_unwind;
c906108c
SS
1008}
1009
fbe586ae 1010static CORE_ADDR
d2427a71
RH
1011alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1012 void **this_prologue_cache)
c906108c 1013{
d2427a71
RH
1014 struct alpha_heuristic_unwind_cache *info
1015 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1016
d2427a71 1017 return info->vfp;
c906108c
SS
1018}
1019
d2427a71
RH
1020static const struct frame_base alpha_heuristic_frame_base = {
1021 &alpha_heuristic_frame_unwind,
1022 alpha_heuristic_frame_base_address,
1023 alpha_heuristic_frame_base_address,
1024 alpha_heuristic_frame_base_address
1025};
1026
c906108c 1027/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1028 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1029
1030static void
fba45db2 1031reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1032{
1033 reinit_frame_cache ();
1034}
1035
d2427a71
RH
1036\f
1037/* ALPHA stack frames are almost impenetrable. When execution stops,
1038 we basically have to look at symbol information for the function
1039 that we stopped in, which tells us *which* register (if any) is
1040 the base of the frame pointer, and what offset from that register
1041 the frame itself is at.
c906108c 1042
d2427a71
RH
1043 This presents a problem when trying to examine a stack in memory
1044 (that isn't executing at the moment), using the "frame" command. We
1045 don't have a PC, nor do we have any registers except SP.
c906108c 1046
d2427a71
RH
1047 This routine takes two arguments, SP and PC, and tries to make the
1048 cached frames look as if these two arguments defined a frame on the
1049 cache. This allows the rest of info frame to extract the important
1050 arguments without difficulty. */
ec32e4be 1051
d2427a71
RH
1052struct frame_info *
1053alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1054{
d2427a71
RH
1055 if (argc != 2)
1056 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1057
d2427a71 1058 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1059}
1060
d2427a71
RH
1061/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1062 dummy frame. The frame ID's base needs to match the TOS value
1063 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1064 breakpoint. */
d734c450 1065
d2427a71
RH
1066static struct frame_id
1067alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1068{
d2427a71
RH
1069 ULONGEST base;
1070 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1071 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1072}
1073
dc129d82 1074static CORE_ADDR
d2427a71 1075alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1076{
d2427a71
RH
1077 ULONGEST pc;
1078 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1079 return pc;
accc6d1f
JT
1080}
1081
d2427a71 1082\f
ec32e4be
JT
1083/* alpha_software_single_step() is called just before we want to resume
1084 the inferior, if we want to single-step it but there is no hardware
1085 or kernel single-step support (NetBSD on Alpha, for example). We find
1086 the target of the coming instruction and breakpoint it.
1087
1088 single_step is also called just after the inferior stops. If we had
1089 set up a simulated single-step, we undo our damage. */
1090
1091static CORE_ADDR
1092alpha_next_pc (CORE_ADDR pc)
1093{
1094 unsigned int insn;
1095 unsigned int op;
1096 int offset;
1097 LONGEST rav;
1098
1099 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1100
1101 /* Opcode is top 6 bits. */
1102 op = (insn >> 26) & 0x3f;
1103
1104 if (op == 0x1a)
1105 {
1106 /* Jump format: target PC is:
1107 RB & ~3 */
1108 return (read_register ((insn >> 16) & 0x1f) & ~3);
1109 }
1110
1111 if ((op & 0x30) == 0x30)
1112 {
1113 /* Branch format: target PC is:
1114 (new PC) + (4 * sext(displacement)) */
1115 if (op == 0x30 || /* BR */
1116 op == 0x34) /* BSR */
1117 {
1118 branch_taken:
1119 offset = (insn & 0x001fffff);
1120 if (offset & 0x00100000)
1121 offset |= 0xffe00000;
1122 offset *= 4;
1123 return (pc + 4 + offset);
1124 }
1125
1126 /* Need to determine if branch is taken; read RA. */
1127 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1128 switch (op)
1129 {
1130 case 0x38: /* BLBC */
1131 if ((rav & 1) == 0)
1132 goto branch_taken;
1133 break;
1134 case 0x3c: /* BLBS */
1135 if (rav & 1)
1136 goto branch_taken;
1137 break;
1138 case 0x39: /* BEQ */
1139 if (rav == 0)
1140 goto branch_taken;
1141 break;
1142 case 0x3d: /* BNE */
1143 if (rav != 0)
1144 goto branch_taken;
1145 break;
1146 case 0x3a: /* BLT */
1147 if (rav < 0)
1148 goto branch_taken;
1149 break;
1150 case 0x3b: /* BLE */
1151 if (rav <= 0)
1152 goto branch_taken;
1153 break;
1154 case 0x3f: /* BGT */
1155 if (rav > 0)
1156 goto branch_taken;
1157 break;
1158 case 0x3e: /* BGE */
1159 if (rav >= 0)
1160 goto branch_taken;
1161 break;
d2427a71
RH
1162
1163 /* ??? Missing floating-point branches. */
ec32e4be
JT
1164 }
1165 }
1166
1167 /* Not a branch or branch not taken; target PC is:
1168 pc + 4 */
1169 return (pc + 4);
1170}
1171
1172void
1173alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1174{
1175 static CORE_ADDR next_pc;
1176 typedef char binsn_quantum[BREAKPOINT_MAX];
1177 static binsn_quantum break_mem;
1178 CORE_ADDR pc;
1179
1180 if (insert_breakpoints_p)
1181 {
1182 pc = read_pc ();
1183 next_pc = alpha_next_pc (pc);
1184
1185 target_insert_breakpoint (next_pc, break_mem);
1186 }
1187 else
1188 {
1189 target_remove_breakpoint (next_pc, break_mem);
1190 write_pc (next_pc);
1191 }
c906108c
SS
1192}
1193
dc129d82 1194\f
dc129d82
JT
1195/* Initialize the current architecture based on INFO. If possible, re-use an
1196 architecture from ARCHES, which is a list of architectures already created
1197 during this debugging session.
1198
1199 Called e.g. at program startup, when reading a core file, and when reading
1200 a binary file. */
1201
1202static struct gdbarch *
1203alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1204{
1205 struct gdbarch_tdep *tdep;
1206 struct gdbarch *gdbarch;
dc129d82
JT
1207
1208 /* Try to determine the ABI of the object we are loading. */
4be87837 1209 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1210 {
4be87837
DJ
1211 /* If it's an ECOFF file, assume it's OSF/1. */
1212 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1213 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1214 }
1215
1216 /* Find a candidate among extant architectures. */
4be87837
DJ
1217 arches = gdbarch_list_lookup_by_info (arches, &info);
1218 if (arches != NULL)
1219 return arches->gdbarch;
dc129d82
JT
1220
1221 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1222 gdbarch = gdbarch_alloc (&info, tdep);
1223
d2427a71
RH
1224 /* Lowest text address. This is used by heuristic_proc_start()
1225 to decide when to stop looking. */
d9b023cc
JT
1226 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1227
36a6271d 1228 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1229 tdep->sigcontext_addr = NULL;
36a6271d 1230
accc6d1f
JT
1231 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1232
dc129d82
JT
1233 /* Type sizes */
1234 set_gdbarch_short_bit (gdbarch, 16);
1235 set_gdbarch_int_bit (gdbarch, 32);
1236 set_gdbarch_long_bit (gdbarch, 64);
1237 set_gdbarch_long_long_bit (gdbarch, 64);
1238 set_gdbarch_float_bit (gdbarch, 32);
1239 set_gdbarch_double_bit (gdbarch, 64);
1240 set_gdbarch_long_double_bit (gdbarch, 64);
1241 set_gdbarch_ptr_bit (gdbarch, 64);
1242
1243 /* Register info */
1244 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1245 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1246 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1247 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1248
1249 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1250 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1251 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1252 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1253 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1254
1255 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1256 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1257
1258 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1259 set_gdbarch_register_convert_to_virtual (gdbarch,
1260 alpha_register_convert_to_virtual);
1261 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1262
d2427a71 1263 /* Prologue heuristics. */
dc129d82
JT
1264 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1265
5ef165c2
RH
1266 /* Disassembler. */
1267 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1268
d2427a71 1269 /* Call info. */
dc129d82
JT
1270 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1271 set_gdbarch_frameless_function_invocation (gdbarch,
1272 generic_frameless_function_invocation_not);
1273
dc129d82 1274 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
26e9b323 1275 set_gdbarch_deprecated_extract_return_value (gdbarch, alpha_extract_return_value);
4183d812 1276 set_gdbarch_deprecated_store_struct_return (gdbarch, alpha_store_struct_return);
ebba8386 1277 set_gdbarch_deprecated_store_return_value (gdbarch, alpha_store_return_value);
26e9b323 1278 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
dc129d82
JT
1279 alpha_extract_struct_value_address);
1280
1281 /* Settings for calling functions in the inferior. */
c88e30c0 1282 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1283
1284 /* Methods for saving / extracting a dummy frame's ID. */
1285 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1286 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1287
1288 /* Return the unwound PC value. */
1289 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1290
1291 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1292 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1293
95b80706 1294 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1295 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1296
1297 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1298 set_gdbarch_frame_args_skip (gdbarch, 0);
1299
44dffaac 1300 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1301 gdbarch_init_osabi (info, gdbarch);
44dffaac 1302
accc6d1f
JT
1303 /* Now that we have tuned the configuration, set a few final things
1304 based on what the OS ABI has told us. */
1305
1306 if (tdep->jb_pc >= 0)
1307 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1308
d2427a71
RH
1309 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1310 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1311
d2427a71 1312 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1313
d2427a71 1314 return gdbarch;
dc129d82
JT
1315}
1316
c906108c 1317void
fba45db2 1318_initialize_alpha_tdep (void)
c906108c
SS
1319{
1320 struct cmd_list_element *c;
1321
d2427a71 1322 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1323
1324 /* Let the user set the fence post for heuristic_proc_start. */
1325
1326 /* We really would like to have both "0" and "unlimited" work, but
1327 command.c doesn't deal with that. So make it a var_zinteger
1328 because the user can always use "999999" or some such for unlimited. */
1329 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1330 (char *) &heuristic_fence_post,
1331 "\
1332Set the distance searched for the start of a function.\n\
1333If you are debugging a stripped executable, GDB needs to search through the\n\
1334program for the start of a function. This command sets the distance of the\n\
1335search. The only need to set it is when debugging a stripped executable.",
1336 &setlist);
1337 /* We need to throw away the frame cache when we set this, since it
1338 might change our ability to get backtraces. */
9f60d481 1339 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1340 add_show_from_set (c, &showlist);
1341}