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c906108c | 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
1e698235 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
b6ba6518 | 3 | Free Software Foundation, Inc. |
c906108c | 4 | |
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
c906108c | 16 | |
c5aa993b JM |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | #include "defs.h" | |
615967cb | 23 | #include "doublest.h" |
c906108c | 24 | #include "frame.h" |
d2427a71 RH |
25 | #include "frame-unwind.h" |
26 | #include "frame-base.h" | |
c906108c SS |
27 | #include "inferior.h" |
28 | #include "symtab.h" | |
29 | #include "value.h" | |
30 | #include "gdbcmd.h" | |
31 | #include "gdbcore.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | #include "gdb_string.h" | |
c5f0f3d0 | 36 | #include "linespec.h" |
4e052eda | 37 | #include "regcache.h" |
615967cb | 38 | #include "reggroups.h" |
dc129d82 | 39 | #include "arch-utils.h" |
4be87837 | 40 | #include "osabi.h" |
fe898f56 | 41 | #include "block.h" |
dc129d82 JT |
42 | |
43 | #include "elf-bfd.h" | |
44 | ||
45 | #include "alpha-tdep.h" | |
46 | ||
c906108c | 47 | \f |
fa88f677 | 48 | static const char * |
636a6dfc JT |
49 | alpha_register_name (int regno) |
50 | { | |
5ab84872 | 51 | static const char * const register_names[] = |
636a6dfc JT |
52 | { |
53 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", | |
54 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", | |
55 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", | |
56 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", | |
57 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
58 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
59 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
60 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", | |
44d88583 | 61 | "pc", "", "unique" |
636a6dfc JT |
62 | }; |
63 | ||
64 | if (regno < 0) | |
5ab84872 | 65 | return NULL; |
636a6dfc | 66 | if (regno >= (sizeof(register_names) / sizeof(*register_names))) |
5ab84872 RH |
67 | return NULL; |
68 | return register_names[regno]; | |
636a6dfc | 69 | } |
d734c450 | 70 | |
dc129d82 | 71 | static int |
d734c450 JT |
72 | alpha_cannot_fetch_register (int regno) |
73 | { | |
44d88583 | 74 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
75 | } |
76 | ||
dc129d82 | 77 | static int |
d734c450 JT |
78 | alpha_cannot_store_register (int regno) |
79 | { | |
44d88583 | 80 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
81 | } |
82 | ||
dc129d82 | 83 | static struct type * |
c483c494 | 84 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
0d056799 | 85 | { |
72667056 RH |
86 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
87 | return builtin_type_void_data_ptr; | |
88 | if (regno == ALPHA_PC_REGNUM) | |
89 | return builtin_type_void_func_ptr; | |
90 | ||
91 | /* Don't need to worry about little vs big endian until | |
92 | some jerk tries to port to alpha-unicosmk. */ | |
b38b6be2 | 93 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
72667056 RH |
94 | return builtin_type_ieee_double_little; |
95 | ||
96 | return builtin_type_int64; | |
0d056799 | 97 | } |
f8453e34 | 98 | |
615967cb RH |
99 | /* Is REGNUM a member of REGGROUP? */ |
100 | ||
101 | static int | |
102 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
103 | struct reggroup *group) | |
104 | { | |
105 | /* Filter out any registers eliminated, but whose regnum is | |
106 | reserved for backward compatibility, e.g. the vfp. */ | |
107 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') | |
108 | return 0; | |
109 | ||
110 | /* Since we implement no pseudo registers, save/restore is equal to all. */ | |
111 | if (group == all_reggroup | |
112 | || group == save_reggroup | |
113 | || group == restore_reggroup) | |
114 | return 1; | |
115 | ||
116 | /* All other groups are non-overlapping. */ | |
117 | ||
118 | /* Since this is really a PALcode memory slot... */ | |
119 | if (regnum == ALPHA_UNIQUE_REGNUM) | |
120 | return group == system_reggroup; | |
121 | ||
122 | /* Force the FPCR to be considered part of the floating point state. */ | |
123 | if (regnum == ALPHA_FPCR_REGNUM) | |
124 | return group == float_reggroup; | |
125 | ||
126 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) | |
127 | return group == float_reggroup; | |
128 | else | |
129 | return group == general_reggroup; | |
130 | } | |
131 | ||
dc129d82 | 132 | static int |
f8453e34 JT |
133 | alpha_register_byte (int regno) |
134 | { | |
135 | return (regno * 8); | |
136 | } | |
137 | ||
dc129d82 | 138 | static int |
f8453e34 JT |
139 | alpha_register_raw_size (int regno) |
140 | { | |
141 | return 8; | |
142 | } | |
143 | ||
dc129d82 | 144 | static int |
f8453e34 JT |
145 | alpha_register_virtual_size (int regno) |
146 | { | |
147 | return 8; | |
148 | } | |
636a6dfc | 149 | |
c483c494 RH |
150 | /* The following represents exactly the conversion performed by |
151 | the LDS instruction. This applies to both single-precision | |
152 | floating point and 32-bit integers. */ | |
153 | ||
154 | static void | |
155 | alpha_lds (void *out, const void *in) | |
156 | { | |
157 | ULONGEST mem = extract_unsigned_integer (in, 4); | |
158 | ULONGEST frac = (mem >> 0) & 0x7fffff; | |
159 | ULONGEST sign = (mem >> 31) & 1; | |
160 | ULONGEST exp_msb = (mem >> 30) & 1; | |
161 | ULONGEST exp_low = (mem >> 23) & 0x7f; | |
162 | ULONGEST exp, reg; | |
163 | ||
164 | exp = (exp_msb << 10) | exp_low; | |
165 | if (exp_msb) | |
166 | { | |
167 | if (exp_low == 0x7f) | |
168 | exp = 0x7ff; | |
169 | } | |
170 | else | |
171 | { | |
172 | if (exp_low != 0x00) | |
173 | exp |= 0x380; | |
174 | } | |
175 | ||
176 | reg = (sign << 63) | (exp << 52) | (frac << 29); | |
177 | store_unsigned_integer (out, 8, reg); | |
178 | } | |
179 | ||
180 | /* Similarly, this represents exactly the conversion performed by | |
181 | the STS instruction. */ | |
182 | ||
183 | static inline void | |
184 | alpha_sts (void *out, const void *in) | |
185 | { | |
186 | ULONGEST reg, mem; | |
187 | ||
188 | reg = extract_unsigned_integer (in, 8); | |
189 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); | |
190 | store_unsigned_integer (out, 4, mem); | |
191 | } | |
192 | ||
d2427a71 RH |
193 | /* The alpha needs a conversion between register and memory format if the |
194 | register is a floating point register and memory format is float, as the | |
195 | register format must be double or memory format is an integer with 4 | |
196 | bytes or less, as the representation of integers in floating point | |
197 | registers is different. */ | |
198 | ||
c483c494 RH |
199 | static int |
200 | alpha_convert_register_p (int regno) | |
14696584 | 201 | { |
c483c494 | 202 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); |
14696584 RH |
203 | } |
204 | ||
d2427a71 | 205 | static void |
c483c494 | 206 | alpha_register_to_value (int regnum, struct type *valtype, char *in, char *out) |
5868c862 | 207 | { |
c483c494 | 208 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 209 | { |
c483c494 RH |
210 | case 4: |
211 | alpha_sts (out, in); | |
212 | break; | |
213 | case 8: | |
214 | memcpy (out, in, 8); | |
215 | break; | |
216 | default: | |
217 | error ("Cannot retrieve value from floating point register"); | |
d2427a71 | 218 | } |
d2427a71 | 219 | } |
5868c862 | 220 | |
d2427a71 | 221 | static void |
c483c494 | 222 | alpha_value_to_register (struct type *valtype, int regnum, char *in, char *out) |
d2427a71 | 223 | { |
c483c494 | 224 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 225 | { |
c483c494 RH |
226 | case 4: |
227 | alpha_lds (out, in); | |
228 | break; | |
229 | case 8: | |
230 | memcpy (out, in, 8); | |
231 | break; | |
232 | default: | |
233 | error ("Cannot store value in floating point register"); | |
d2427a71 | 234 | } |
5868c862 JT |
235 | } |
236 | ||
d2427a71 RH |
237 | \f |
238 | /* The alpha passes the first six arguments in the registers, the rest on | |
c88e30c0 RH |
239 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
240 | then moved into the register file; this simplifies the passing of a | |
241 | large struct which extends from the registers to the stack, plus avoids | |
242 | three ptrace invocations per word. | |
243 | ||
244 | We don't bother tracking which register values should go in integer | |
245 | regs or fp regs; we load the same values into both. | |
246 | ||
d2427a71 RH |
247 | If the called function is returning a structure, the address of the |
248 | structure to be returned is passed as a hidden first argument. */ | |
c906108c | 249 | |
d2427a71 | 250 | static CORE_ADDR |
c88e30c0 RH |
251 | alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
252 | struct regcache *regcache, CORE_ADDR bp_addr, | |
253 | int nargs, struct value **args, CORE_ADDR sp, | |
254 | int struct_return, CORE_ADDR struct_addr) | |
c906108c | 255 | { |
d2427a71 RH |
256 | int i; |
257 | int accumulate_size = struct_return ? 8 : 0; | |
d2427a71 | 258 | struct alpha_arg |
c906108c | 259 | { |
d2427a71 RH |
260 | char *contents; |
261 | int len; | |
262 | int offset; | |
263 | }; | |
c88e30c0 RH |
264 | struct alpha_arg *alpha_args |
265 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); | |
d2427a71 | 266 | register struct alpha_arg *m_arg; |
c88e30c0 | 267 | char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
d2427a71 | 268 | int required_arg_regs; |
c906108c | 269 | |
c88e30c0 RH |
270 | /* The ABI places the address of the called function in T12. */ |
271 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); | |
272 | ||
273 | /* Set the return address register to point to the entry point | |
274 | of the program, where a breakpoint lies in wait. */ | |
275 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); | |
276 | ||
277 | /* Lay out the arguments in memory. */ | |
d2427a71 RH |
278 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
279 | { | |
280 | struct value *arg = args[i]; | |
281 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
c88e30c0 | 282 | |
d2427a71 RH |
283 | /* Cast argument to long if necessary as the compiler does it too. */ |
284 | switch (TYPE_CODE (arg_type)) | |
c906108c | 285 | { |
d2427a71 RH |
286 | case TYPE_CODE_INT: |
287 | case TYPE_CODE_BOOL: | |
288 | case TYPE_CODE_CHAR: | |
289 | case TYPE_CODE_RANGE: | |
290 | case TYPE_CODE_ENUM: | |
0ede8eca | 291 | if (TYPE_LENGTH (arg_type) == 4) |
d2427a71 | 292 | { |
0ede8eca RH |
293 | /* 32-bit values must be sign-extended to 64 bits |
294 | even if the base data type is unsigned. */ | |
295 | arg_type = builtin_type_int32; | |
296 | arg = value_cast (arg_type, arg); | |
297 | } | |
298 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) | |
299 | { | |
300 | arg_type = builtin_type_int64; | |
d2427a71 RH |
301 | arg = value_cast (arg_type, arg); |
302 | } | |
303 | break; | |
7b5e1cb3 | 304 | |
c88e30c0 RH |
305 | case TYPE_CODE_FLT: |
306 | /* "float" arguments loaded in registers must be passed in | |
307 | register format, aka "double". */ | |
308 | if (accumulate_size < sizeof (arg_reg_buffer) | |
309 | && TYPE_LENGTH (arg_type) == 4) | |
310 | { | |
eb4edb88 | 311 | arg_type = builtin_type_ieee_double_little; |
c88e30c0 RH |
312 | arg = value_cast (arg_type, arg); |
313 | } | |
314 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
315 | invisible reference. No one else uses this data type. */ | |
316 | else if (TYPE_LENGTH (arg_type) == 16) | |
317 | { | |
318 | /* Allocate aligned storage. */ | |
319 | sp = (sp & -16) - 16; | |
320 | ||
321 | /* Write the real data into the stack. */ | |
322 | write_memory (sp, VALUE_CONTENTS (arg), 16); | |
323 | ||
324 | /* Construct the indirection. */ | |
325 | arg_type = lookup_pointer_type (arg_type); | |
326 | arg = value_from_pointer (arg_type, sp); | |
327 | } | |
328 | break; | |
7b5e1cb3 RH |
329 | |
330 | case TYPE_CODE_COMPLEX: | |
331 | /* ??? The ABI says that complex values are passed as two | |
332 | separate scalar values. This distinction only matters | |
333 | for complex float. However, GCC does not implement this. */ | |
334 | ||
335 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
336 | invisible reference. */ | |
337 | if (TYPE_LENGTH (arg_type) == 32) | |
338 | { | |
339 | /* Allocate aligned storage. */ | |
340 | sp = (sp & -16) - 16; | |
341 | ||
342 | /* Write the real data into the stack. */ | |
343 | write_memory (sp, VALUE_CONTENTS (arg), 32); | |
344 | ||
345 | /* Construct the indirection. */ | |
346 | arg_type = lookup_pointer_type (arg_type); | |
347 | arg = value_from_pointer (arg_type, sp); | |
348 | } | |
349 | break; | |
350 | ||
d2427a71 RH |
351 | default: |
352 | break; | |
c906108c | 353 | } |
d2427a71 RH |
354 | m_arg->len = TYPE_LENGTH (arg_type); |
355 | m_arg->offset = accumulate_size; | |
356 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; | |
357 | m_arg->contents = VALUE_CONTENTS (arg); | |
c906108c SS |
358 | } |
359 | ||
d2427a71 RH |
360 | /* Determine required argument register loads, loading an argument register |
361 | is expensive as it uses three ptrace calls. */ | |
362 | required_arg_regs = accumulate_size / 8; | |
363 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) | |
364 | required_arg_regs = ALPHA_NUM_ARG_REGS; | |
c906108c | 365 | |
d2427a71 | 366 | /* Make room for the arguments on the stack. */ |
c88e30c0 RH |
367 | if (accumulate_size < sizeof(arg_reg_buffer)) |
368 | accumulate_size = 0; | |
369 | else | |
370 | accumulate_size -= sizeof(arg_reg_buffer); | |
d2427a71 | 371 | sp -= accumulate_size; |
c906108c | 372 | |
c88e30c0 | 373 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
d2427a71 | 374 | sp &= ~15; |
c906108c | 375 | |
d2427a71 RH |
376 | /* `Push' arguments on the stack. */ |
377 | for (i = nargs; m_arg--, --i >= 0;) | |
c906108c | 378 | { |
c88e30c0 RH |
379 | char *contents = m_arg->contents; |
380 | int offset = m_arg->offset; | |
381 | int len = m_arg->len; | |
382 | ||
383 | /* Copy the bytes destined for registers into arg_reg_buffer. */ | |
384 | if (offset < sizeof(arg_reg_buffer)) | |
385 | { | |
386 | if (offset + len <= sizeof(arg_reg_buffer)) | |
387 | { | |
388 | memcpy (arg_reg_buffer + offset, contents, len); | |
389 | continue; | |
390 | } | |
391 | else | |
392 | { | |
393 | int tlen = sizeof(arg_reg_buffer) - offset; | |
394 | memcpy (arg_reg_buffer + offset, contents, tlen); | |
395 | offset += tlen; | |
396 | contents += tlen; | |
397 | len -= tlen; | |
398 | } | |
399 | } | |
400 | ||
401 | /* Everything else goes to the stack. */ | |
402 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); | |
c906108c | 403 | } |
c88e30c0 RH |
404 | if (struct_return) |
405 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); | |
c906108c | 406 | |
d2427a71 RH |
407 | /* Load the argument registers. */ |
408 | for (i = 0; i < required_arg_regs; i++) | |
409 | { | |
09cc52fd RH |
410 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
411 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
412 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, | |
413 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
d2427a71 | 414 | } |
c906108c | 415 | |
09cc52fd RH |
416 | /* Finally, update the stack pointer. */ |
417 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); | |
418 | ||
c88e30c0 | 419 | return sp; |
c906108c SS |
420 | } |
421 | ||
5ec2bb99 RH |
422 | /* Extract from REGCACHE the value about to be returned from a function |
423 | and copy it into VALBUF. */ | |
d2427a71 | 424 | |
dc129d82 | 425 | static void |
5ec2bb99 RH |
426 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
427 | void *valbuf) | |
140f9984 | 428 | { |
7b5e1cb3 | 429 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
430 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
431 | ULONGEST l; | |
432 | ||
433 | switch (TYPE_CODE (valtype)) | |
434 | { | |
435 | case TYPE_CODE_FLT: | |
7b5e1cb3 | 436 | switch (length) |
5ec2bb99 RH |
437 | { |
438 | case 4: | |
439 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); | |
c483c494 | 440 | alpha_sts (valbuf, raw_buffer); |
5ec2bb99 RH |
441 | break; |
442 | ||
443 | case 8: | |
444 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
445 | break; | |
446 | ||
24064b5c RH |
447 | case 16: |
448 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
449 | read_memory (l, valbuf, 16); | |
450 | break; | |
451 | ||
5ec2bb99 | 452 | default: |
67dfac52 | 453 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
454 | } |
455 | break; | |
456 | ||
7b5e1cb3 RH |
457 | case TYPE_CODE_COMPLEX: |
458 | switch (length) | |
459 | { | |
460 | case 8: | |
461 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
462 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
463 | break; | |
464 | ||
465 | case 16: | |
466 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
467 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1, | |
468 | (char *)valbuf + 8); | |
469 | break; | |
470 | ||
471 | case 32: | |
472 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); | |
473 | read_memory (l, valbuf, 32); | |
474 | break; | |
475 | ||
476 | default: | |
67dfac52 | 477 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
478 | } |
479 | break; | |
480 | ||
5ec2bb99 RH |
481 | default: |
482 | /* Assume everything else degenerates to an integer. */ | |
483 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
7b5e1cb3 | 484 | store_unsigned_integer (valbuf, length, l); |
5ec2bb99 RH |
485 | break; |
486 | } | |
140f9984 JT |
487 | } |
488 | ||
5ec2bb99 RH |
489 | /* Extract from REGCACHE the address of a structure about to be returned |
490 | from a function. */ | |
491 | ||
492 | static CORE_ADDR | |
493 | alpha_extract_struct_value_address (struct regcache *regcache) | |
494 | { | |
495 | ULONGEST addr; | |
496 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); | |
497 | return addr; | |
498 | } | |
499 | ||
500 | /* Insert the given value into REGCACHE as if it was being | |
501 | returned by a function. */ | |
0d056799 | 502 | |
d2427a71 | 503 | static void |
5ec2bb99 RH |
504 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
505 | const void *valbuf) | |
c906108c | 506 | { |
d2427a71 | 507 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
508 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
509 | ULONGEST l; | |
d2427a71 | 510 | |
5ec2bb99 | 511 | switch (TYPE_CODE (valtype)) |
c906108c | 512 | { |
5ec2bb99 RH |
513 | case TYPE_CODE_FLT: |
514 | switch (length) | |
515 | { | |
516 | case 4: | |
c483c494 | 517 | alpha_lds (raw_buffer, valbuf); |
f75d70cc RH |
518 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
519 | break; | |
5ec2bb99 RH |
520 | |
521 | case 8: | |
522 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
523 | break; | |
524 | ||
24064b5c RH |
525 | case 16: |
526 | /* FIXME: 128-bit long doubles are returned like structures: | |
527 | by writing into indirect storage provided by the caller | |
528 | as the first argument. */ | |
529 | error ("Cannot set a 128-bit long double return value."); | |
530 | ||
5ec2bb99 | 531 | default: |
67dfac52 | 532 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
533 | } |
534 | break; | |
d2427a71 | 535 | |
7b5e1cb3 RH |
536 | case TYPE_CODE_COMPLEX: |
537 | switch (length) | |
538 | { | |
539 | case 8: | |
540 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
541 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
542 | break; | |
543 | ||
544 | case 16: | |
545 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
546 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1, | |
547 | (const char *)valbuf + 8); | |
548 | break; | |
549 | ||
550 | case 32: | |
551 | /* FIXME: 128-bit long doubles are returned like structures: | |
552 | by writing into indirect storage provided by the caller | |
553 | as the first argument. */ | |
554 | error ("Cannot set a 128-bit long double return value."); | |
555 | ||
556 | default: | |
67dfac52 | 557 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
558 | } |
559 | break; | |
560 | ||
5ec2bb99 RH |
561 | default: |
562 | /* Assume everything else degenerates to an integer. */ | |
0ede8eca RH |
563 | /* 32-bit values must be sign-extended to 64 bits |
564 | even if the base data type is unsigned. */ | |
565 | if (length == 4) | |
566 | valtype = builtin_type_int32; | |
5ec2bb99 RH |
567 | l = unpack_long (valtype, valbuf); |
568 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); | |
569 | break; | |
570 | } | |
c906108c SS |
571 | } |
572 | ||
d2427a71 RH |
573 | static int |
574 | alpha_use_struct_convention (int gcc_p, struct type *type) | |
c906108c | 575 | { |
d2427a71 RH |
576 | /* Structures are returned by ref in extra arg0. */ |
577 | return 1; | |
578 | } | |
c906108c | 579 | |
d2427a71 RH |
580 | \f |
581 | static const unsigned char * | |
582 | alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
c906108c | 583 | { |
d2427a71 RH |
584 | static const unsigned char alpha_breakpoint[] = |
585 | { 0x80, 0, 0, 0 }; /* call_pal bpt */ | |
c906108c | 586 | |
d2427a71 RH |
587 | *lenptr = sizeof(alpha_breakpoint); |
588 | return (alpha_breakpoint); | |
589 | } | |
c906108c | 590 | |
d2427a71 RH |
591 | \f |
592 | /* This returns the PC of the first insn after the prologue. | |
593 | If we can't find the prologue, then return 0. */ | |
c906108c | 594 | |
d2427a71 RH |
595 | CORE_ADDR |
596 | alpha_after_prologue (CORE_ADDR pc) | |
c906108c | 597 | { |
d2427a71 RH |
598 | struct symtab_and_line sal; |
599 | CORE_ADDR func_addr, func_end; | |
c906108c | 600 | |
d2427a71 | 601 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
c5aa993b | 602 | return 0; |
c906108c | 603 | |
d2427a71 RH |
604 | sal = find_pc_line (func_addr, 0); |
605 | if (sal.end < func_end) | |
606 | return sal.end; | |
c5aa993b | 607 | |
d2427a71 RH |
608 | /* The line after the prologue is after the end of the function. In this |
609 | case, tell the caller to find the prologue the hard way. */ | |
610 | return 0; | |
c906108c SS |
611 | } |
612 | ||
d2427a71 RH |
613 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
614 | ||
615 | unsigned int | |
616 | alpha_read_insn (CORE_ADDR pc) | |
c906108c | 617 | { |
d2427a71 RH |
618 | char buf[4]; |
619 | int status; | |
c5aa993b | 620 | |
d2427a71 RH |
621 | status = read_memory_nobpt (pc, buf, 4); |
622 | if (status) | |
623 | memory_error (status, pc); | |
624 | return extract_unsigned_integer (buf, 4); | |
625 | } | |
c5aa993b | 626 | |
d2427a71 RH |
627 | /* To skip prologues, I use this predicate. Returns either PC itself |
628 | if the code at PC does not look like a function prologue; otherwise | |
629 | returns an address that (if we're lucky) follows the prologue. If | |
630 | LENIENT, then we must skip everything which is involved in setting | |
631 | up the frame (it's OK to skip more, just so long as we don't skip | |
632 | anything which might clobber the registers which are being saved. */ | |
c906108c | 633 | |
d2427a71 RH |
634 | static CORE_ADDR |
635 | alpha_skip_prologue (CORE_ADDR pc) | |
636 | { | |
637 | unsigned long inst; | |
638 | int offset; | |
639 | CORE_ADDR post_prologue_pc; | |
640 | char buf[4]; | |
c906108c | 641 | |
d2427a71 RH |
642 | /* Silently return the unaltered pc upon memory errors. |
643 | This could happen on OSF/1 if decode_line_1 tries to skip the | |
644 | prologue for quickstarted shared library functions when the | |
645 | shared library is not yet mapped in. | |
646 | Reading target memory is slow over serial lines, so we perform | |
647 | this check only if the target has shared libraries (which all | |
648 | Alpha targets do). */ | |
649 | if (target_read_memory (pc, buf, 4)) | |
650 | return pc; | |
c906108c | 651 | |
d2427a71 RH |
652 | /* See if we can determine the end of the prologue via the symbol table. |
653 | If so, then return either PC, or the PC after the prologue, whichever | |
654 | is greater. */ | |
c906108c | 655 | |
d2427a71 RH |
656 | post_prologue_pc = alpha_after_prologue (pc); |
657 | if (post_prologue_pc != 0) | |
658 | return max (pc, post_prologue_pc); | |
c906108c | 659 | |
d2427a71 RH |
660 | /* Can't determine prologue from the symbol table, need to examine |
661 | instructions. */ | |
dc1b0db2 | 662 | |
d2427a71 RH |
663 | /* Skip the typical prologue instructions. These are the stack adjustment |
664 | instruction and the instructions that save registers on the stack | |
665 | or in the gcc frame. */ | |
666 | for (offset = 0; offset < 100; offset += 4) | |
667 | { | |
668 | inst = alpha_read_insn (pc + offset); | |
c906108c | 669 | |
d2427a71 RH |
670 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
671 | continue; | |
672 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ | |
673 | continue; | |
674 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ | |
675 | continue; | |
676 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ | |
677 | continue; | |
c906108c | 678 | |
d2427a71 RH |
679 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
680 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ | |
681 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ | |
682 | continue; | |
c906108c | 683 | |
d2427a71 RH |
684 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
685 | continue; | |
686 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ | |
687 | continue; | |
c906108c | 688 | |
d2427a71 | 689 | break; |
c906108c | 690 | } |
d2427a71 RH |
691 | return pc + offset; |
692 | } | |
c906108c | 693 | |
d2427a71 RH |
694 | \f |
695 | /* Figure out where the longjmp will land. | |
696 | We expect the first arg to be a pointer to the jmp_buf structure from | |
697 | which we extract the PC (JB_PC) that we will land at. The PC is copied | |
698 | into the "pc". This routine returns true on success. */ | |
c906108c SS |
699 | |
700 | static int | |
d2427a71 | 701 | alpha_get_longjmp_target (CORE_ADDR *pc) |
c906108c | 702 | { |
d2427a71 RH |
703 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
704 | CORE_ADDR jb_addr; | |
5ab84872 | 705 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
c906108c | 706 | |
d2427a71 | 707 | jb_addr = read_register (ALPHA_A0_REGNUM); |
c906108c | 708 | |
d2427a71 RH |
709 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
710 | raw_buffer, tdep->jb_elt_size)) | |
c906108c | 711 | return 0; |
d2427a71 | 712 | |
7c0b4a20 | 713 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); |
d2427a71 | 714 | return 1; |
c906108c SS |
715 | } |
716 | ||
d2427a71 RH |
717 | \f |
718 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that | |
719 | describe the location and shape of the sigcontext structure. After | |
720 | that, all registers are in memory, so it's easy. */ | |
721 | /* ??? Shouldn't we be able to do this generically, rather than with | |
722 | OSABI data specific to Alpha? */ | |
723 | ||
724 | struct alpha_sigtramp_unwind_cache | |
c906108c | 725 | { |
d2427a71 RH |
726 | CORE_ADDR sigcontext_addr; |
727 | }; | |
c906108c | 728 | |
d2427a71 RH |
729 | static struct alpha_sigtramp_unwind_cache * |
730 | alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, | |
731 | void **this_prologue_cache) | |
732 | { | |
733 | struct alpha_sigtramp_unwind_cache *info; | |
734 | struct gdbarch_tdep *tdep; | |
c906108c | 735 | |
d2427a71 RH |
736 | if (*this_prologue_cache) |
737 | return *this_prologue_cache; | |
c906108c | 738 | |
d2427a71 RH |
739 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
740 | *this_prologue_cache = info; | |
c906108c | 741 | |
d2427a71 RH |
742 | tdep = gdbarch_tdep (current_gdbarch); |
743 | info->sigcontext_addr = tdep->sigcontext_addr (next_frame); | |
c906108c | 744 | |
d2427a71 | 745 | return info; |
c906108c SS |
746 | } |
747 | ||
d2427a71 RH |
748 | /* Return the address of REGNO in a sigtramp frame. Since this is all |
749 | arithmetic, it doesn't seem worthwhile to cache it. */ | |
c5aa993b | 750 | |
d2427a71 RH |
751 | #ifndef SIGFRAME_PC_OFF |
752 | #define SIGFRAME_PC_OFF (2 * 8) | |
753 | #define SIGFRAME_REGSAVE_OFF (4 * 8) | |
754 | #define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8) | |
755 | #endif | |
c5aa993b | 756 | |
d2427a71 RH |
757 | static CORE_ADDR |
758 | alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno) | |
759 | { | |
760 | if (regno < 32) | |
761 | return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8; | |
b38b6be2 | 762 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 32) |
d2427a71 | 763 | return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8; |
b38b6be2 | 764 | if (regno == ALPHA_PC_REGNUM) |
d2427a71 | 765 | return sigcontext_addr + SIGFRAME_PC_OFF; |
c5aa993b | 766 | |
d2427a71 | 767 | return 0; |
c906108c SS |
768 | } |
769 | ||
d2427a71 RH |
770 | /* Given a GDB frame, determine the address of the calling function's |
771 | frame. This will be used to create a new GDB frame struct. */ | |
140f9984 | 772 | |
dc129d82 | 773 | static void |
d2427a71 RH |
774 | alpha_sigtramp_frame_this_id (struct frame_info *next_frame, |
775 | void **this_prologue_cache, | |
776 | struct frame_id *this_id) | |
c906108c | 777 | { |
d2427a71 RH |
778 | struct alpha_sigtramp_unwind_cache *info |
779 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
780 | struct gdbarch_tdep *tdep; | |
781 | CORE_ADDR stack_addr, code_addr; | |
782 | ||
783 | /* If the OSABI couldn't locate the sigcontext, give up. */ | |
784 | if (info->sigcontext_addr == 0) | |
785 | return; | |
786 | ||
787 | /* If we have dynamic signal trampolines, find their start. | |
788 | If we do not, then we must assume there is a symbol record | |
789 | that can provide the start address. */ | |
790 | tdep = gdbarch_tdep (current_gdbarch); | |
791 | if (tdep->dynamic_sigtramp_offset) | |
c906108c | 792 | { |
d2427a71 RH |
793 | int offset; |
794 | code_addr = frame_pc_unwind (next_frame); | |
795 | offset = tdep->dynamic_sigtramp_offset (code_addr); | |
796 | if (offset >= 0) | |
797 | code_addr -= offset; | |
c906108c | 798 | else |
d2427a71 | 799 | code_addr = 0; |
c906108c | 800 | } |
d2427a71 RH |
801 | else |
802 | code_addr = frame_func_unwind (next_frame); | |
c906108c | 803 | |
d2427a71 RH |
804 | /* The stack address is trivially read from the sigcontext. */ |
805 | stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, | |
806 | ALPHA_SP_REGNUM); | |
807 | stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE); | |
c906108c | 808 | |
d2427a71 | 809 | *this_id = frame_id_build (stack_addr, code_addr); |
c906108c SS |
810 | } |
811 | ||
d2427a71 | 812 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
c906108c | 813 | |
d2427a71 RH |
814 | static void |
815 | alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
816 | void **this_prologue_cache, | |
817 | int regnum, int *optimizedp, | |
818 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
819 | int *realnump, void *bufferp) | |
c906108c | 820 | { |
d2427a71 RH |
821 | struct alpha_sigtramp_unwind_cache *info |
822 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
823 | CORE_ADDR addr; | |
c906108c | 824 | |
d2427a71 | 825 | if (info->sigcontext_addr != 0) |
c906108c | 826 | { |
d2427a71 RH |
827 | /* All integer and fp registers are stored in memory. */ |
828 | addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); | |
829 | if (addr != 0) | |
c906108c | 830 | { |
d2427a71 RH |
831 | *optimizedp = 0; |
832 | *lvalp = lval_memory; | |
833 | *addrp = addr; | |
834 | *realnump = -1; | |
835 | if (bufferp != NULL) | |
836 | read_memory (addr, bufferp, ALPHA_REGISTER_SIZE); | |
837 | return; | |
c906108c | 838 | } |
c906108c SS |
839 | } |
840 | ||
d2427a71 RH |
841 | /* This extra register may actually be in the sigcontext, but our |
842 | current description of it in alpha_sigtramp_frame_unwind_cache | |
843 | doesn't include it. Too bad. Fall back on whatever's in the | |
844 | outer frame. */ | |
845 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
846 | realnump, bufferp); | |
847 | } | |
c906108c | 848 | |
d2427a71 RH |
849 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { |
850 | SIGTRAMP_FRAME, | |
851 | alpha_sigtramp_frame_this_id, | |
852 | alpha_sigtramp_frame_prev_register | |
853 | }; | |
c906108c | 854 | |
d2427a71 RH |
855 | static const struct frame_unwind * |
856 | alpha_sigtramp_frame_p (CORE_ADDR pc) | |
857 | { | |
858 | char *name; | |
c906108c | 859 | |
d2427a71 RH |
860 | /* We shouldn't even bother to try if the OSABI didn't register |
861 | a sigcontext_addr handler. */ | |
862 | if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) | |
863 | return NULL; | |
c906108c | 864 | |
d2427a71 RH |
865 | /* Otherwise we should be in a signal frame. */ |
866 | find_pc_partial_function (pc, &name, NULL, NULL); | |
867 | if (PC_IN_SIGTRAMP (pc, name)) | |
868 | return &alpha_sigtramp_frame_unwind; | |
c906108c | 869 | |
d2427a71 | 870 | return NULL; |
c906108c | 871 | } |
d2427a71 RH |
872 | \f |
873 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows | |
874 | something about the traditional layout of alpha stack frames. */ | |
c906108c | 875 | |
d2427a71 | 876 | struct alpha_heuristic_unwind_cache |
c906108c | 877 | { |
d2427a71 RH |
878 | CORE_ADDR *saved_regs; |
879 | CORE_ADDR vfp; | |
880 | CORE_ADDR start_pc; | |
881 | int return_reg; | |
882 | }; | |
c906108c | 883 | |
d2427a71 RH |
884 | /* Heuristic_proc_start may hunt through the text section for a long |
885 | time across a 2400 baud serial line. Allows the user to limit this | |
886 | search. */ | |
887 | static unsigned int heuristic_fence_post = 0; | |
c906108c | 888 | |
d2427a71 RH |
889 | /* Attempt to locate the start of the function containing PC. We assume that |
890 | the previous function ends with an about_to_return insn. Not foolproof by | |
891 | any means, since gcc is happy to put the epilogue in the middle of a | |
892 | function. But we're guessing anyway... */ | |
c906108c | 893 | |
d2427a71 RH |
894 | static CORE_ADDR |
895 | alpha_heuristic_proc_start (CORE_ADDR pc) | |
896 | { | |
897 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
898 | CORE_ADDR last_non_nop = pc; | |
899 | CORE_ADDR fence = pc - heuristic_fence_post; | |
900 | CORE_ADDR orig_pc = pc; | |
fbe586ae | 901 | CORE_ADDR func; |
9e0b60a8 | 902 | |
d2427a71 RH |
903 | if (pc == 0) |
904 | return 0; | |
9e0b60a8 | 905 | |
fbe586ae RH |
906 | /* First see if we can find the start of the function from minimal |
907 | symbol information. This can succeed with a binary that doesn't | |
908 | have debug info, but hasn't been stripped. */ | |
909 | func = get_pc_function_start (pc); | |
910 | if (func) | |
911 | return func; | |
912 | ||
d2427a71 RH |
913 | if (heuristic_fence_post == UINT_MAX |
914 | || fence < tdep->vm_min_address) | |
915 | fence = tdep->vm_min_address; | |
c906108c | 916 | |
d2427a71 RH |
917 | /* Search back for previous return; also stop at a 0, which might be |
918 | seen for instance before the start of a code section. Don't include | |
919 | nops, since this usually indicates padding between functions. */ | |
920 | for (pc -= 4; pc >= fence; pc -= 4) | |
c906108c | 921 | { |
d2427a71 RH |
922 | unsigned int insn = alpha_read_insn (pc); |
923 | switch (insn) | |
c906108c | 924 | { |
d2427a71 RH |
925 | case 0: /* invalid insn */ |
926 | case 0x6bfa8001: /* ret $31,($26),1 */ | |
927 | return last_non_nop; | |
928 | ||
929 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ | |
930 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ | |
931 | break; | |
932 | ||
933 | default: | |
934 | last_non_nop = pc; | |
935 | break; | |
c906108c | 936 | } |
d2427a71 | 937 | } |
c906108c | 938 | |
d2427a71 RH |
939 | /* It's not clear to me why we reach this point when stopping quietly, |
940 | but with this test, at least we don't print out warnings for every | |
941 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ | |
942 | if (stop_soon == NO_STOP_QUIETLY) | |
943 | { | |
944 | static int blurb_printed = 0; | |
c906108c | 945 | |
d2427a71 RH |
946 | if (fence == tdep->vm_min_address) |
947 | warning ("Hit beginning of text section without finding"); | |
c906108c | 948 | else |
d2427a71 RH |
949 | warning ("Hit heuristic-fence-post without finding"); |
950 | warning ("enclosing function for address 0x%s", paddr_nz (orig_pc)); | |
c906108c | 951 | |
d2427a71 RH |
952 | if (!blurb_printed) |
953 | { | |
954 | printf_filtered ("\ | |
955 | This warning occurs if you are debugging a function without any symbols\n\ | |
956 | (for example, in a stripped executable). In that case, you may wish to\n\ | |
957 | increase the size of the search with the `set heuristic-fence-post' command.\n\ | |
958 | \n\ | |
959 | Otherwise, you told GDB there was a function where there isn't one, or\n\ | |
960 | (more likely) you have encountered a bug in GDB.\n"); | |
961 | blurb_printed = 1; | |
962 | } | |
963 | } | |
c906108c | 964 | |
d2427a71 RH |
965 | return 0; |
966 | } | |
c906108c | 967 | |
fbe586ae | 968 | static struct alpha_heuristic_unwind_cache * |
d2427a71 RH |
969 | alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, |
970 | void **this_prologue_cache, | |
971 | CORE_ADDR start_pc) | |
972 | { | |
973 | struct alpha_heuristic_unwind_cache *info; | |
974 | ULONGEST val; | |
975 | CORE_ADDR limit_pc, cur_pc; | |
976 | int frame_reg, frame_size, return_reg, reg; | |
c906108c | 977 | |
d2427a71 RH |
978 | if (*this_prologue_cache) |
979 | return *this_prologue_cache; | |
c906108c | 980 | |
d2427a71 RH |
981 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
982 | *this_prologue_cache = info; | |
983 | info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); | |
c906108c | 984 | |
d2427a71 RH |
985 | limit_pc = frame_pc_unwind (next_frame); |
986 | if (start_pc == 0) | |
987 | start_pc = alpha_heuristic_proc_start (limit_pc); | |
988 | info->start_pc = start_pc; | |
c906108c | 989 | |
d2427a71 RH |
990 | frame_reg = ALPHA_SP_REGNUM; |
991 | frame_size = 0; | |
992 | return_reg = -1; | |
c906108c | 993 | |
d2427a71 RH |
994 | /* If we've identified a likely place to start, do code scanning. */ |
995 | if (start_pc != 0) | |
c5aa993b | 996 | { |
d2427a71 RH |
997 | /* Limit the forward search to 50 instructions. */ |
998 | if (start_pc + 200 < limit_pc) | |
999 | limit_pc = start_pc + 200; | |
c5aa993b | 1000 | |
d2427a71 RH |
1001 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) |
1002 | { | |
1003 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1004 | |
d2427a71 RH |
1005 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
1006 | { | |
1007 | if (word & 0x8000) | |
1008 | { | |
1009 | /* Consider only the first stack allocation instruction | |
1010 | to contain the static size of the frame. */ | |
1011 | if (frame_size == 0) | |
1012 | frame_size = (-word) & 0xffff; | |
1013 | } | |
1014 | else | |
1015 | { | |
1016 | /* Exit loop if a positive stack adjustment is found, which | |
1017 | usually means that the stack cleanup code in the function | |
1018 | epilogue is reached. */ | |
1019 | break; | |
1020 | } | |
1021 | } | |
1022 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ | |
1023 | { | |
1024 | reg = (word & 0x03e00000) >> 21; | |
1025 | ||
1026 | if (reg == 31) | |
1027 | continue; | |
1028 | ||
1029 | /* Do not compute the address where the register was saved yet, | |
1030 | because we don't know yet if the offset will need to be | |
1031 | relative to $sp or $fp (we can not compute the address | |
1032 | relative to $sp if $sp is updated during the execution of | |
1033 | the current subroutine, for instance when doing some alloca). | |
1034 | So just store the offset for the moment, and compute the | |
1035 | address later when we know whether this frame has a frame | |
1036 | pointer or not. */ | |
1037 | /* Hack: temporarily add one, so that the offset is non-zero | |
1038 | and we can tell which registers have save offsets below. */ | |
1039 | info->saved_regs[reg] = (word & 0xffff) + 1; | |
1040 | ||
1041 | /* Starting with OSF/1-3.2C, the system libraries are shipped | |
1042 | without local symbols, but they still contain procedure | |
1043 | descriptors without a symbol reference. GDB is currently | |
1044 | unable to find these procedure descriptors and uses | |
1045 | heuristic_proc_desc instead. | |
1046 | As some low level compiler support routines (__div*, __add*) | |
1047 | use a non-standard return address register, we have to | |
1048 | add some heuristics to determine the return address register, | |
1049 | or stepping over these routines will fail. | |
1050 | Usually the return address register is the first register | |
1051 | saved on the stack, but assembler optimization might | |
1052 | rearrange the register saves. | |
1053 | So we recognize only a few registers (t7, t9, ra) within | |
1054 | the procedure prologue as valid return address registers. | |
1055 | If we encounter a return instruction, we extract the | |
1056 | the return address register from it. | |
1057 | ||
1058 | FIXME: Rewriting GDB to access the procedure descriptors, | |
1059 | e.g. via the minimal symbol table, might obviate this hack. */ | |
1060 | if (return_reg == -1 | |
1061 | && cur_pc < (start_pc + 80) | |
1062 | && (reg == ALPHA_T7_REGNUM | |
1063 | || reg == ALPHA_T9_REGNUM | |
1064 | || reg == ALPHA_RA_REGNUM)) | |
1065 | return_reg = reg; | |
1066 | } | |
1067 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1068 | return_reg = (word >> 16) & 0x1f; | |
1069 | else if (word == 0x47de040f) /* bis sp,sp,fp */ | |
1070 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1071 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ | |
1072 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1073 | } | |
c5aa993b | 1074 | |
d2427a71 RH |
1075 | /* If we haven't found a valid return address register yet, keep |
1076 | searching in the procedure prologue. */ | |
1077 | if (return_reg == -1) | |
1078 | { | |
1079 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) | |
1080 | { | |
1081 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1082 | |
d2427a71 RH |
1083 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
1084 | { | |
1085 | reg = (word & 0x03e00000) >> 21; | |
1086 | if (reg == ALPHA_T7_REGNUM | |
1087 | || reg == ALPHA_T9_REGNUM | |
1088 | || reg == ALPHA_RA_REGNUM) | |
1089 | { | |
1090 | return_reg = reg; | |
1091 | break; | |
1092 | } | |
1093 | } | |
1094 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1095 | { | |
1096 | return_reg = (word >> 16) & 0x1f; | |
1097 | break; | |
1098 | } | |
85b32d22 RH |
1099 | |
1100 | cur_pc += 4; | |
d2427a71 RH |
1101 | } |
1102 | } | |
c906108c | 1103 | } |
c906108c | 1104 | |
d2427a71 RH |
1105 | /* Failing that, do default to the customary RA. */ |
1106 | if (return_reg == -1) | |
1107 | return_reg = ALPHA_RA_REGNUM; | |
1108 | info->return_reg = return_reg; | |
f8453e34 | 1109 | |
d2427a71 RH |
1110 | frame_unwind_unsigned_register (next_frame, frame_reg, &val); |
1111 | info->vfp = val + frame_size; | |
c906108c | 1112 | |
d2427a71 RH |
1113 | /* Convert offsets to absolute addresses. See above about adding |
1114 | one to the offsets to make all detected offsets non-zero. */ | |
1115 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) | |
1116 | if (info->saved_regs[reg]) | |
1117 | info->saved_regs[reg] += val - 1; | |
1118 | ||
1119 | return info; | |
c906108c | 1120 | } |
c906108c | 1121 | |
d2427a71 RH |
1122 | /* Given a GDB frame, determine the address of the calling function's |
1123 | frame. This will be used to create a new GDB frame struct. */ | |
1124 | ||
fbe586ae | 1125 | static void |
d2427a71 RH |
1126 | alpha_heuristic_frame_this_id (struct frame_info *next_frame, |
1127 | void **this_prologue_cache, | |
1128 | struct frame_id *this_id) | |
c906108c | 1129 | { |
d2427a71 RH |
1130 | struct alpha_heuristic_unwind_cache *info |
1131 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1132 | |
fbe586ae RH |
1133 | /* This is meant to halt the backtrace at "_start". Make sure we |
1134 | don't halt it at a generic dummy frame. */ | |
1135 | if (inside_entry_file (info->start_pc)) | |
1136 | return; | |
1137 | ||
d2427a71 | 1138 | *this_id = frame_id_build (info->vfp, info->start_pc); |
c906108c SS |
1139 | } |
1140 | ||
d2427a71 RH |
1141 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
1142 | ||
fbe586ae | 1143 | static void |
d2427a71 RH |
1144 | alpha_heuristic_frame_prev_register (struct frame_info *next_frame, |
1145 | void **this_prologue_cache, | |
1146 | int regnum, int *optimizedp, | |
1147 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1148 | int *realnump, void *bufferp) | |
c906108c | 1149 | { |
d2427a71 RH |
1150 | struct alpha_heuristic_unwind_cache *info |
1151 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
1152 | ||
1153 | /* The PC of the previous frame is stored in the link register of | |
1154 | the current frame. Frob regnum so that we pull the value from | |
1155 | the correct place. */ | |
1156 | if (regnum == ALPHA_PC_REGNUM) | |
1157 | regnum = info->return_reg; | |
1158 | ||
1159 | /* For all registers known to be saved in the current frame, | |
1160 | do the obvious and pull the value out. */ | |
1161 | if (info->saved_regs[regnum]) | |
c906108c | 1162 | { |
d2427a71 RH |
1163 | *optimizedp = 0; |
1164 | *lvalp = lval_memory; | |
1165 | *addrp = info->saved_regs[regnum]; | |
1166 | *realnump = -1; | |
1167 | if (bufferp != NULL) | |
1168 | read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE); | |
c906108c SS |
1169 | return; |
1170 | } | |
1171 | ||
d2427a71 RH |
1172 | /* The stack pointer of the previous frame is computed by popping |
1173 | the current stack frame. */ | |
1174 | if (regnum == ALPHA_SP_REGNUM) | |
c906108c | 1175 | { |
d2427a71 RH |
1176 | *optimizedp = 0; |
1177 | *lvalp = not_lval; | |
1178 | *addrp = 0; | |
1179 | *realnump = -1; | |
1180 | if (bufferp != NULL) | |
1181 | store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); | |
1182 | return; | |
c906108c | 1183 | } |
95b80706 | 1184 | |
d2427a71 RH |
1185 | /* Otherwise assume the next frame has the same register value. */ |
1186 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
1187 | realnump, bufferp); | |
95b80706 JT |
1188 | } |
1189 | ||
d2427a71 RH |
1190 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
1191 | NORMAL_FRAME, | |
1192 | alpha_heuristic_frame_this_id, | |
1193 | alpha_heuristic_frame_prev_register | |
1194 | }; | |
c906108c | 1195 | |
d2427a71 RH |
1196 | static const struct frame_unwind * |
1197 | alpha_heuristic_frame_p (CORE_ADDR pc) | |
c906108c | 1198 | { |
d2427a71 | 1199 | return &alpha_heuristic_frame_unwind; |
c906108c SS |
1200 | } |
1201 | ||
fbe586ae | 1202 | static CORE_ADDR |
d2427a71 RH |
1203 | alpha_heuristic_frame_base_address (struct frame_info *next_frame, |
1204 | void **this_prologue_cache) | |
c906108c | 1205 | { |
d2427a71 RH |
1206 | struct alpha_heuristic_unwind_cache *info |
1207 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1208 | |
d2427a71 | 1209 | return info->vfp; |
c906108c SS |
1210 | } |
1211 | ||
d2427a71 RH |
1212 | static const struct frame_base alpha_heuristic_frame_base = { |
1213 | &alpha_heuristic_frame_unwind, | |
1214 | alpha_heuristic_frame_base_address, | |
1215 | alpha_heuristic_frame_base_address, | |
1216 | alpha_heuristic_frame_base_address | |
1217 | }; | |
1218 | ||
c906108c | 1219 | /* Just like reinit_frame_cache, but with the right arguments to be |
d2427a71 | 1220 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
c906108c SS |
1221 | |
1222 | static void | |
fba45db2 | 1223 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
c906108c SS |
1224 | { |
1225 | reinit_frame_cache (); | |
1226 | } | |
1227 | ||
d2427a71 RH |
1228 | \f |
1229 | /* ALPHA stack frames are almost impenetrable. When execution stops, | |
1230 | we basically have to look at symbol information for the function | |
1231 | that we stopped in, which tells us *which* register (if any) is | |
1232 | the base of the frame pointer, and what offset from that register | |
1233 | the frame itself is at. | |
c906108c | 1234 | |
d2427a71 RH |
1235 | This presents a problem when trying to examine a stack in memory |
1236 | (that isn't executing at the moment), using the "frame" command. We | |
1237 | don't have a PC, nor do we have any registers except SP. | |
c906108c | 1238 | |
d2427a71 RH |
1239 | This routine takes two arguments, SP and PC, and tries to make the |
1240 | cached frames look as if these two arguments defined a frame on the | |
1241 | cache. This allows the rest of info frame to extract the important | |
1242 | arguments without difficulty. */ | |
ec32e4be | 1243 | |
d2427a71 RH |
1244 | struct frame_info * |
1245 | alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv) | |
0d056799 | 1246 | { |
d2427a71 RH |
1247 | if (argc != 2) |
1248 | error ("ALPHA frame specifications require two arguments: sp and pc"); | |
0d056799 | 1249 | |
d2427a71 | 1250 | return create_new_frame (argv[0], argv[1]); |
0d056799 JT |
1251 | } |
1252 | ||
d2427a71 RH |
1253 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1254 | dummy frame. The frame ID's base needs to match the TOS value | |
1255 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1256 | breakpoint. */ | |
d734c450 | 1257 | |
d2427a71 RH |
1258 | static struct frame_id |
1259 | alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
0d056799 | 1260 | { |
d2427a71 RH |
1261 | ULONGEST base; |
1262 | frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); | |
1263 | return frame_id_build (base, frame_pc_unwind (next_frame)); | |
0d056799 JT |
1264 | } |
1265 | ||
dc129d82 | 1266 | static CORE_ADDR |
d2427a71 | 1267 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
accc6d1f | 1268 | { |
d2427a71 RH |
1269 | ULONGEST pc; |
1270 | frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); | |
1271 | return pc; | |
accc6d1f JT |
1272 | } |
1273 | ||
98a8e1e5 RH |
1274 | \f |
1275 | /* Helper routines for alpha*-nat.c files to move register sets to and | |
1276 | from core files. The UNIQUE pointer is allowed to be NULL, as most | |
1277 | targets don't supply this value in their core files. */ | |
1278 | ||
1279 | void | |
1280 | alpha_supply_int_regs (int regno, const void *r0_r30, | |
1281 | const void *pc, const void *unique) | |
1282 | { | |
1283 | int i; | |
1284 | ||
1285 | for (i = 0; i < 31; ++i) | |
1286 | if (regno == i || regno == -1) | |
1287 | supply_register (i, (const char *)r0_r30 + i*8); | |
1288 | ||
1289 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) | |
1290 | supply_register (ALPHA_ZERO_REGNUM, NULL); | |
1291 | ||
1292 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
1293 | supply_register (ALPHA_PC_REGNUM, pc); | |
1294 | ||
1295 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) | |
1296 | supply_register (ALPHA_UNIQUE_REGNUM, unique); | |
1297 | } | |
1298 | ||
1299 | void | |
1300 | alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique) | |
1301 | { | |
1302 | int i; | |
1303 | ||
1304 | for (i = 0; i < 31; ++i) | |
1305 | if (regno == i || regno == -1) | |
1306 | regcache_collect (i, (char *)r0_r30 + i*8); | |
1307 | ||
1308 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
1309 | regcache_collect (ALPHA_PC_REGNUM, pc); | |
1310 | ||
1311 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) | |
1312 | regcache_collect (ALPHA_UNIQUE_REGNUM, unique); | |
1313 | } | |
1314 | ||
1315 | void | |
1316 | alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr) | |
1317 | { | |
1318 | int i; | |
1319 | ||
1320 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1321 | if (regno == i || regno == -1) | |
1322 | supply_register (i, (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
1323 | ||
1324 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
1325 | supply_register (ALPHA_FPCR_REGNUM, fpcr); | |
1326 | } | |
1327 | ||
1328 | void | |
1329 | alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr) | |
1330 | { | |
1331 | int i; | |
1332 | ||
1333 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1334 | if (regno == i || regno == -1) | |
1335 | regcache_collect (i, (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
1336 | ||
1337 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
1338 | regcache_collect (ALPHA_FPCR_REGNUM, fpcr); | |
1339 | } | |
1340 | ||
d2427a71 | 1341 | \f |
ec32e4be JT |
1342 | /* alpha_software_single_step() is called just before we want to resume |
1343 | the inferior, if we want to single-step it but there is no hardware | |
1344 | or kernel single-step support (NetBSD on Alpha, for example). We find | |
1345 | the target of the coming instruction and breakpoint it. | |
1346 | ||
1347 | single_step is also called just after the inferior stops. If we had | |
1348 | set up a simulated single-step, we undo our damage. */ | |
1349 | ||
1350 | static CORE_ADDR | |
1351 | alpha_next_pc (CORE_ADDR pc) | |
1352 | { | |
1353 | unsigned int insn; | |
1354 | unsigned int op; | |
1355 | int offset; | |
1356 | LONGEST rav; | |
1357 | ||
1358 | insn = read_memory_unsigned_integer (pc, sizeof (insn)); | |
1359 | ||
1360 | /* Opcode is top 6 bits. */ | |
1361 | op = (insn >> 26) & 0x3f; | |
1362 | ||
1363 | if (op == 0x1a) | |
1364 | { | |
1365 | /* Jump format: target PC is: | |
1366 | RB & ~3 */ | |
1367 | return (read_register ((insn >> 16) & 0x1f) & ~3); | |
1368 | } | |
1369 | ||
1370 | if ((op & 0x30) == 0x30) | |
1371 | { | |
1372 | /* Branch format: target PC is: | |
1373 | (new PC) + (4 * sext(displacement)) */ | |
1374 | if (op == 0x30 || /* BR */ | |
1375 | op == 0x34) /* BSR */ | |
1376 | { | |
1377 | branch_taken: | |
1378 | offset = (insn & 0x001fffff); | |
1379 | if (offset & 0x00100000) | |
1380 | offset |= 0xffe00000; | |
1381 | offset *= 4; | |
1382 | return (pc + 4 + offset); | |
1383 | } | |
1384 | ||
1385 | /* Need to determine if branch is taken; read RA. */ | |
1386 | rav = (LONGEST) read_register ((insn >> 21) & 0x1f); | |
1387 | switch (op) | |
1388 | { | |
1389 | case 0x38: /* BLBC */ | |
1390 | if ((rav & 1) == 0) | |
1391 | goto branch_taken; | |
1392 | break; | |
1393 | case 0x3c: /* BLBS */ | |
1394 | if (rav & 1) | |
1395 | goto branch_taken; | |
1396 | break; | |
1397 | case 0x39: /* BEQ */ | |
1398 | if (rav == 0) | |
1399 | goto branch_taken; | |
1400 | break; | |
1401 | case 0x3d: /* BNE */ | |
1402 | if (rav != 0) | |
1403 | goto branch_taken; | |
1404 | break; | |
1405 | case 0x3a: /* BLT */ | |
1406 | if (rav < 0) | |
1407 | goto branch_taken; | |
1408 | break; | |
1409 | case 0x3b: /* BLE */ | |
1410 | if (rav <= 0) | |
1411 | goto branch_taken; | |
1412 | break; | |
1413 | case 0x3f: /* BGT */ | |
1414 | if (rav > 0) | |
1415 | goto branch_taken; | |
1416 | break; | |
1417 | case 0x3e: /* BGE */ | |
1418 | if (rav >= 0) | |
1419 | goto branch_taken; | |
1420 | break; | |
d2427a71 RH |
1421 | |
1422 | /* ??? Missing floating-point branches. */ | |
ec32e4be JT |
1423 | } |
1424 | } | |
1425 | ||
1426 | /* Not a branch or branch not taken; target PC is: | |
1427 | pc + 4 */ | |
1428 | return (pc + 4); | |
1429 | } | |
1430 | ||
1431 | void | |
1432 | alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) | |
1433 | { | |
1434 | static CORE_ADDR next_pc; | |
1435 | typedef char binsn_quantum[BREAKPOINT_MAX]; | |
1436 | static binsn_quantum break_mem; | |
1437 | CORE_ADDR pc; | |
1438 | ||
1439 | if (insert_breakpoints_p) | |
1440 | { | |
1441 | pc = read_pc (); | |
1442 | next_pc = alpha_next_pc (pc); | |
1443 | ||
1444 | target_insert_breakpoint (next_pc, break_mem); | |
1445 | } | |
1446 | else | |
1447 | { | |
1448 | target_remove_breakpoint (next_pc, break_mem); | |
1449 | write_pc (next_pc); | |
1450 | } | |
c906108c SS |
1451 | } |
1452 | ||
dc129d82 | 1453 | \f |
dc129d82 JT |
1454 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1455 | architecture from ARCHES, which is a list of architectures already created | |
1456 | during this debugging session. | |
1457 | ||
1458 | Called e.g. at program startup, when reading a core file, and when reading | |
1459 | a binary file. */ | |
1460 | ||
1461 | static struct gdbarch * | |
1462 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1463 | { | |
1464 | struct gdbarch_tdep *tdep; | |
1465 | struct gdbarch *gdbarch; | |
dc129d82 JT |
1466 | |
1467 | /* Try to determine the ABI of the object we are loading. */ | |
4be87837 | 1468 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
dc129d82 | 1469 | { |
4be87837 DJ |
1470 | /* If it's an ECOFF file, assume it's OSF/1. */ |
1471 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) | |
aff87235 | 1472 | info.osabi = GDB_OSABI_OSF1; |
dc129d82 JT |
1473 | } |
1474 | ||
1475 | /* Find a candidate among extant architectures. */ | |
4be87837 DJ |
1476 | arches = gdbarch_list_lookup_by_info (arches, &info); |
1477 | if (arches != NULL) | |
1478 | return arches->gdbarch; | |
dc129d82 JT |
1479 | |
1480 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1481 | gdbarch = gdbarch_alloc (&info, tdep); | |
1482 | ||
d2427a71 RH |
1483 | /* Lowest text address. This is used by heuristic_proc_start() |
1484 | to decide when to stop looking. */ | |
d9b023cc JT |
1485 | tdep->vm_min_address = (CORE_ADDR) 0x120000000; |
1486 | ||
36a6271d | 1487 | tdep->dynamic_sigtramp_offset = NULL; |
5868c862 | 1488 | tdep->sigcontext_addr = NULL; |
36a6271d | 1489 | |
accc6d1f JT |
1490 | tdep->jb_pc = -1; /* longjmp support not enabled by default */ |
1491 | ||
dc129d82 JT |
1492 | /* Type sizes */ |
1493 | set_gdbarch_short_bit (gdbarch, 16); | |
1494 | set_gdbarch_int_bit (gdbarch, 32); | |
1495 | set_gdbarch_long_bit (gdbarch, 64); | |
1496 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1497 | set_gdbarch_float_bit (gdbarch, 32); | |
1498 | set_gdbarch_double_bit (gdbarch, 64); | |
1499 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1500 | set_gdbarch_ptr_bit (gdbarch, 64); | |
1501 | ||
1502 | /* Register info */ | |
1503 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); | |
1504 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); | |
dc129d82 JT |
1505 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
1506 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); | |
1507 | ||
1508 | set_gdbarch_register_name (gdbarch, alpha_register_name); | |
dc129d82 JT |
1509 | set_gdbarch_register_byte (gdbarch, alpha_register_byte); |
1510 | set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size); | |
dc129d82 | 1511 | set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size); |
c483c494 | 1512 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
dc129d82 JT |
1513 | |
1514 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); | |
1515 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); | |
1516 | ||
c483c494 RH |
1517 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
1518 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); | |
1519 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); | |
dc129d82 | 1520 | |
615967cb RH |
1521 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
1522 | ||
d2427a71 | 1523 | /* Prologue heuristics. */ |
dc129d82 JT |
1524 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
1525 | ||
5ef165c2 RH |
1526 | /* Disassembler. */ |
1527 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); | |
1528 | ||
d2427a71 | 1529 | /* Call info. */ |
dc129d82 JT |
1530 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); |
1531 | set_gdbarch_frameless_function_invocation (gdbarch, | |
1532 | generic_frameless_function_invocation_not); | |
1533 | ||
dc129d82 | 1534 | set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention); |
5ec2bb99 RH |
1535 | set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value); |
1536 | set_gdbarch_store_return_value (gdbarch, alpha_store_return_value); | |
1537 | set_gdbarch_extract_struct_value_address (gdbarch, | |
dc129d82 JT |
1538 | alpha_extract_struct_value_address); |
1539 | ||
1540 | /* Settings for calling functions in the inferior. */ | |
c88e30c0 | 1541 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
d2427a71 RH |
1542 | |
1543 | /* Methods for saving / extracting a dummy frame's ID. */ | |
1544 | set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); | |
1545 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); | |
1546 | ||
1547 | /* Return the unwound PC value. */ | |
1548 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); | |
dc129d82 JT |
1549 | |
1550 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
36a6271d | 1551 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
dc129d82 | 1552 | |
95b80706 | 1553 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
dc129d82 | 1554 | set_gdbarch_decr_pc_after_break (gdbarch, 4); |
95b80706 JT |
1555 | |
1556 | set_gdbarch_function_start_offset (gdbarch, 0); | |
dc129d82 JT |
1557 | set_gdbarch_frame_args_skip (gdbarch, 0); |
1558 | ||
44dffaac | 1559 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1560 | gdbarch_init_osabi (info, gdbarch); |
44dffaac | 1561 | |
accc6d1f JT |
1562 | /* Now that we have tuned the configuration, set a few final things |
1563 | based on what the OS ABI has told us. */ | |
1564 | ||
1565 | if (tdep->jb_pc >= 0) | |
1566 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); | |
1567 | ||
d2427a71 RH |
1568 | frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p); |
1569 | frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p); | |
dc129d82 | 1570 | |
d2427a71 | 1571 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
accc6d1f | 1572 | |
d2427a71 | 1573 | return gdbarch; |
dc129d82 JT |
1574 | } |
1575 | ||
c906108c | 1576 | void |
fba45db2 | 1577 | _initialize_alpha_tdep (void) |
c906108c SS |
1578 | { |
1579 | struct cmd_list_element *c; | |
1580 | ||
d2427a71 | 1581 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
c906108c SS |
1582 | |
1583 | /* Let the user set the fence post for heuristic_proc_start. */ | |
1584 | ||
1585 | /* We really would like to have both "0" and "unlimited" work, but | |
1586 | command.c doesn't deal with that. So make it a var_zinteger | |
1587 | because the user can always use "999999" or some such for unlimited. */ | |
1588 | c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger, | |
1589 | (char *) &heuristic_fence_post, | |
1590 | "\ | |
1591 | Set the distance searched for the start of a function.\n\ | |
1592 | If you are debugging a stripped executable, GDB needs to search through the\n\ | |
1593 | program for the start of a function. This command sets the distance of the\n\ | |
1594 | search. The only need to set it is when debugging a stripped executable.", | |
1595 | &setlist); | |
1596 | /* We need to throw away the frame cache when we set this, since it | |
1597 | might change our ability to get backtraces. */ | |
9f60d481 | 1598 | set_cmd_sfunc (c, reinit_frame_cache_sfunc); |
c906108c SS |
1599 | add_show_from_set (c, &showlist); |
1600 | } |