]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/config/m32r/tm-m32r.h
import gdb-1999-07-07 post reformat
[thirdparty/binutils-gdb.git] / gdb / config / m32r / tm-m32r.h
CommitLineData
c906108c
SS
1/* Parameters for execution on a Mitsubishi m32r processor.
2 Copyright 1996, 1997 Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21/* Used by mswin. */
22#define TARGET_M32R 1
23
24/* mvs_check TARGET_BYTE_ORDER BIG_ENDIAN */
25#define TARGET_BYTE_ORDER BIG_ENDIAN
26
27/* mvs_check REGISTER_NAMES */
28#define REGISTER_NAMES \
29{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
30 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
31 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", \
32 /* "cond", "sm", "bsm", "ie", "bie", "bcarry", */ \
33}
34/* mvs_check NUM_REGS */
35#define NUM_REGS 24
36
37/* mvs_check REGISTER_SIZE */
38#define REGISTER_SIZE 4
39/* mvs_check MAX_REGISTER_RAW_SIZE */
40#define MAX_REGISTER_RAW_SIZE 4
41
42/* mvs_check *_REGNUM */
43#define R0_REGNUM 0
44#define STRUCT_RETURN_REGNUM 0
45#define ARG0_REGNUM 0
46#define ARGLAST_REGNUM 3
47#define V0_REGNUM 0
48#define V1_REGNUM 1
49#define FP_REGNUM 13
50#define RP_REGNUM 14
51#define SP_REGNUM 15
52#define PSW_REGNUM 16
53#define CBR_REGNUM 17
54#define SPI_REGNUM 18
55#define SPU_REGNUM 19
56#define BPC_REGNUM 20
57#define PC_REGNUM 21
58#define ACCL_REGNUM 22
59#define ACCH_REGNUM 23
60
61/* mvs_check REGISTER_BYTES */
62#define REGISTER_BYTES (NUM_REGS * 4)
63
64/* mvs_check REGISTER_VIRTUAL_TYPE */
65#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
66
67/* mvs_check REGISTER_BYTE */
68#define REGISTER_BYTE(REG) ((REG) * 4)
69/* mvs_check REGISTER_VIRTUAL_SIZE */
70#define REGISTER_VIRTUAL_SIZE(REG) 4
71/* mvs_check REGISTER_RAW_SIZE */
72#define REGISTER_RAW_SIZE(REG) 4
73
74/* mvs_check MAX_REGISTER_VIRTUAL_SIZE */
75#define MAX_REGISTER_VIRTUAL_SIZE 4
76
77/* mvs_check BREAKPOINT */
78#define BREAKPOINT {0x10, 0xf1}
79
80/* mvs_no_check FUNCTION_START_OFFSET */
81#define FUNCTION_START_OFFSET 0
82
83/* mvs_check DECR_PC_AFTER_BREAK */
84#define DECR_PC_AFTER_BREAK 0
85
86/* mvs_check INNER_THAN */
87#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
88
89/* mvs_check SAVED_PC_AFTER_CALL */
90#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
91
92#ifdef __STDC__
93struct frame_info;
94struct frame_saved_regs;
95struct type;
96struct value;
97#endif
98
99/* Define other aspects of the stack frame.
100 We keep the offsets of all saved registers, 'cause we need 'em a lot!
101 We also keep the current size of the stack frame, and whether
102 the frame pointer is valid (for frameless functions, and when we're
103 still in the prologue of a function with a frame) */
104
105/* mvs_check EXTRA_FRAME_INFO */
106#define EXTRA_FRAME_INFO \
107 struct frame_saved_regs fsr; \
108 int framesize; \
109 int using_frame_pointer;
110
111
c5aa993b 112extern void m32r_init_extra_frame_info PARAMS ((struct frame_info * fi));
c906108c
SS
113/* mvs_check INIT_EXTRA_FRAME_INFO */
114#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) m32r_init_extra_frame_info (fi)
115/* mvs_no_check INIT_FRAME_PC */
116#define INIT_FRAME_PC /* Not necessary */
117
c5aa993b
JM
118extern void
119m32r_frame_find_saved_regs PARAMS ((struct frame_info * fi,
120 struct frame_saved_regs * regaddr));
c906108c
SS
121
122/* Put here the code to store, into a struct frame_saved_regs,
123 the addresses of the saved registers of frame described by FRAME_INFO.
124 This includes special registers such as pc and fp saved in special
125 ways in the stack frame. sp is even more special:
126 the address we return for it IS the sp for the next frame. */
127
128/* mvs_check FRAME_FIND_SAVED_REGS */
129#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
130 m32r_frame_find_saved_regs(frame_info, &(frame_saved_regs))
131
c5aa993b 132extern CORE_ADDR m32r_frame_chain PARAMS ((struct frame_info * fi));
c906108c
SS
133/* mvs_check FRAME_CHAIN */
134#define FRAME_CHAIN(fi) m32r_frame_chain (fi)
135
136#define FRAME_CHAIN_VALID(fp, frame) generic_frame_chain_valid (fp, frame)
137
c5aa993b 138extern CORE_ADDR m32r_find_callers_reg PARAMS ((struct frame_info * fi,
c906108c 139 int regnum));
c5aa993b 140extern CORE_ADDR m32r_frame_saved_pc PARAMS ((struct frame_info *));
c906108c
SS
141/* mvs_check FRAME_SAVED_PC */
142#define FRAME_SAVED_PC(fi) m32r_frame_saved_pc (fi)
143
144/* mvs_check EXTRACT_RETURN_VALUE */
145#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
146 memcpy ((VALBUF), \
147 (char *)(REGBUF) + REGISTER_BYTE (V0_REGNUM) + \
148 ((TYPE_LENGTH (TYPE) > 4 ? 8 : 4) - TYPE_LENGTH (TYPE)), \
149 TYPE_LENGTH (TYPE))
150
151/* mvs_check STORE_RETURN_VALUE */
152#define STORE_RETURN_VALUE(TYPE, VALBUF) \
153 write_register_bytes(REGISTER_BYTE (V0_REGNUM) + \
154 ((TYPE_LENGTH (TYPE) > 4 ? 8:4) - TYPE_LENGTH (TYPE)),\
155 (VALBUF), TYPE_LENGTH (TYPE));
156
157extern CORE_ADDR m32r_skip_prologue PARAMS ((CORE_ADDR pc));
158/* mvs_check SKIP_PROLOGUE */
b83266a0 159#define SKIP_PROLOGUE(pc) (m32r_skip_prologue (pc))
c906108c
SS
160
161/* mvs_no_check FRAME_ARGS_SKIP */
162#define FRAME_ARGS_SKIP 0
163
164/* mvs_no_check FRAME_ARGS_ADDRESS */
165#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
166/* mvs_no_check FRAME_LOCALS_ADDRESS */
167#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
168/* mvs_no_check FRAME_NUM_ARGS */
392a587b 169#define FRAME_NUM_ARGS(fi) (-1)
c906108c
SS
170
171#define COERCE_FLOAT_TO_DOUBLE 1
172
173#define TARGET_WRITE_SP m32r_write_sp
174
175
176
177
178
179
180/* struct passing and returning stuff */
181#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
182 write_register (0, STRUCT_ADDR)
183
184extern use_struct_convention_fn m32r_use_struct_convention;
185#define USE_STRUCT_CONVENTION(GCC_P, TYPE) m32r_use_struct_convention (GCC_P, TYPE)
186
187#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
188 extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
189 REGISTER_RAW_SIZE (V0_REGNUM))
190
191#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 8)
192
193
194/* generic dummy frame stuff */
195
196#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
7a292a7a 197#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
c906108c
SS
198
199
200/* target-specific dummy_frame stuff */
201
c5aa993b 202extern struct frame_info *m32r_pop_frame PARAMS ((struct frame_info * frame));
c906108c
SS
203/* mvs_check POP_FRAME */
204#define POP_FRAME m32r_pop_frame (get_current_frame ())
205
206/* mvs_no_check STACK_ALIGN */
207/* #define STACK_ALIGN(x) ((x + 3) & ~3) */
208
209extern CORE_ADDR m32r_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
c5aa993b
JM
210extern CORE_ADDR m32r_push_arguments PARAMS ((int nargs,
211 struct value ** args,
c906108c
SS
212 CORE_ADDR sp,
213 unsigned char struct_return,
214 CORE_ADDR struct_addr));
215
216
217
218/* mvs_no_check PUSH_ARGUMENTS */
219#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
392a587b 220 (m32r_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
c906108c
SS
221
222#define PUSH_RETURN_ADDRESS(PC, SP) m32r_push_return_address (PC, SP)
223
224/* override the standard get_saved_register function with
225 one that takes account of generic CALL_DUMMY frames */
7a292a7a
SS
226#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
227 generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
c906108c 228
7a292a7a
SS
229
230#define USE_GENERIC_DUMMY_FRAMES 1
c906108c
SS
231#define CALL_DUMMY {0}
232#define CALL_DUMMY_LENGTH (0)
233#define CALL_DUMMY_START_OFFSET (0)
234#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
235#define FIX_CALL_DUMMY(DUMMY1, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
236#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
237#define CALL_DUMMY_ADDRESS() entry_point_address ()