[thirdparty/binutils-gdb.git] / gdb / config / pa / tm-hppa64.h

/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
   Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
   Free Software Foundation, Inc. 

   Contributed by the Center for Software Science at the
   University of Utah (pa-gdb-bugs@cs.utah.edu).

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

/* PA 64-bit specific definitions.  Override those which are in
   tm-hppa.h */

#include "pa/tm-hppah.h"

#define HPUX_1100 1

/* jimb: this must go.  I'm just using it to disable code I haven't
   gotten working yet.  */
#define GDB_TARGET_IS_HPPA_20W

/* The low two bits of the IA are the privilege level of the instruction.  */
#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)

/* Say how long (ordinary) registers are.  This is used in
   push_word and a few other places, but REGISTER_RAW_SIZE is
   the real way to know how big a register is.  */

#undef REGISTER_SIZE
#define REGISTER_SIZE 8

/* Number of bytes of storage in the actual machine representation
   for register N.  On the PA-RISC 2.0, all regs are 8 bytes, including
   the FP registers (they're accessed as two 4 byte halves).  */

#undef REGISTER_RAW_SIZE
#define REGISTER_RAW_SIZE(N) 8

/* Largest value REGISTER_RAW_SIZE can have.  */

#undef MAX_REGISTER_RAW_SIZE
#define MAX_REGISTER_RAW_SIZE 8

/* Total amount of space needed to store our copies of the machine's
   register state, the array `registers'.  */

#undef REGISTER_BYTES
#define REGISTER_BYTES (NUM_REGS * 8)

/* Index within `registers' of the first byte of the space for
   register N.  */

#undef REGISTER_BYTE
#define REGISTER_BYTE(N) ((N) * 8)

#undef REGISTER_VIRTUAL_TYPE
#define REGISTER_VIRTUAL_TYPE(N) \
 ((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)


/* Number of machine registers */
#undef NUM_REGS
#define NUM_REGS 96

/* Initializer for an array of names of registers.
   There should be NUM_REGS strings in this initializer.
   They are in rows of eight entries  */
#undef REGISTER_NAMES
#define REGISTER_NAMES	\
 {"flags",  "r1",      "rp",      "r3",    "r4",     "r5",      "r6",     "r7",    \
  "r8",     "r9",      "r10",     "r11",   "r12",    "r13",     "r14",    "r15",   \
  "r16",    "r17",     "r18",     "r19",   "r20",    "r21",     "r22",    "r23",   \
  "r24",    "r25",     "r26",     "dp",    "ret0",   "ret1",    "sp",     "r31",   \
  "sar",    "pcoqh",   "pcsqh",   "pcoqt", "pcsqt",  "eiem",    "iir",    "isr",   \
  "ior",    "ipsw",    "goto",    "sr4",   "sr0",    "sr1",     "sr2",    "sr3",   \
  "sr5",    "sr6",     "sr7",     "cr0",   "cr8",    "cr9",     "ccr",    "cr12",  \
  "cr13",   "cr24",    "cr25",    "cr26",  "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
  "fpsr",    "fpe1",   "fpe2",    "fpe3",  "fr4",    "fr5",     "fr6",    "fr7", \
  "fr8",     "fr9",    "fr10",    "fr11",  "fr12",   "fr13",    "fr14",   "fr15", \
  "fr16",    "fr17",   "fr18",    "fr19",  "fr20",   "fr21",    "fr22",   "fr23", \
  "fr24",    "fr25",   "fr26",    "fr27",   "fr28",  "fr29",    "fr30",   "fr31"}

#undef FP0_REGNUM
#undef FP4_REGNUM
#define FP0_REGNUM 64		/* floating point reg. 0 (fspr)*/
#define FP4_REGNUM 68

/* Redefine some target bit sizes from the default.  */

/* Number of bits in a long or unsigned long for the target machine. */

#define TARGET_LONG_BIT 64

/* Number of bits in a long long or unsigned long long for the 
   target machine.  */

#define TARGET_LONG_LONG_BIT 64

/* Number of bits in a pointer for the target machine */

#define TARGET_PTR_BIT 64

/* Argument Pointer Register */
#define AP_REGNUM 29

#define DP_REGNUM 27

#define FP5_REGNUM 70

#define SR5_REGNUM 48

#undef FRAME_ARGS_ADDRESS
#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)

/* We access locals from SP. This may not work for frames which call
   alloca; for those, we may need to consult unwind tables.
   jimb: FIXME.  */
#undef FRAME_LOCALS_ADDRESS
#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)

#define INIT_FRAME_AP init_frame_ap
  
#define EXTRA_FRAME_INFO  \
  CORE_ADDR ap;

/* For a number of horrible reasons we may have to adjust the location
   of variables on the stack.  Ugh.  jimb: why? */
#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)

extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));


/* jimb: omitted dynamic linking stuff here */

/* This sequence of words is the instructions

; Call stack frame has already been built by gdb. Since we could be calling
; a varargs function, and we do not have the benefit of a stub to put things in
; the right place, we load the first 8 word of arguments into both the general
; and fp registers.
call_dummy
        copy %r4,%r29
        copy %r5,%r22
        copy %r6,%r27
        fldd -64(0,%r29),%fr4
        fldd -56(0,%r29),%fr5
        fldd -48(0,%r29),%fr6
        fldd -40(0,%r29),%fr7
        fldd -32(0,%r29),%fr8
        fldd -24(0,%r29),%fr9
        fldd -16(0,%r29),%fr10
        fldd -8(0,%r29),%fr11
        copy %r22,%r1
        ldd -64(%r29), %r26
        ldd -56(%r29), %r25
        ldd -48(%r29), %r24
        ldd -40(%r29), %r23
        ldd -32(%r29), %r22
        ldd -24(%r29), %r21
        ldd -16(%r29), %r20
        bve,l (%r1),%r2
        ldd -8(%r29), %r19
        break 4, 8
	mtsp %r21, %sr0
	ble 0(%sr0, %r22)
        nop
*/

#undef CALL_DUMMY
#define CALL_DUMMY {0x349d0000, 0x34b60000, 0x34db0000, \
                    0x53a43f83, 0x53a53f93, 0x53a63fa3, 0x53a73fb3,\
                    0x53a83fc3, 0x53a93fd3, 0x2fa1100a, 0x2fb1100b,\
                    0x36c10000, 0x53ba3f81, 0x53b93f91, 0x53b83fa1,\
                    0x53b73fb1, 0x53b63fc1, 0x53b53fd1, 0x0fa110d4,\
                    0xe820f000, 0x0fb110d3, 0x00010004, 0x00151820,\
                    0xe6c00000, 0x08000240}

#undef CALL_DUMMY_LENGTH
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 25)

#undef FUNC_LDIL_OFFSET
#undef FUNC_LDO_OFFSET
#undef SR4EXPORT_LDIL_OFFSET
#undef SR4EXPORT_LDO_OFFSET
#undef CALL_DUMMY_LOCATION
/* jimb: need to find out what AT_WDB_CALL_DUMMY is about */
#if 0
#define CALL_DUMMY_LOCATION AFTER_TEXT_END
extern CORE_ADDR wdb_call_dummy_addr;
#undef PC_IN_CALL_DUMMY
#define PC_IN_CALL_DUMMY(pc, sp, frame_address) \
   ((pc) >= wdb_call_dummy_addr && \
    (pc) <= wdb_call_dummy_addr + CALL_DUMMY_LENGTH)
#endif

#undef REG_STRUCT_HAS_ADDR

#undef EXTRACT_RETURN_VALUE
/* RM: floats are returned in FR4R, doubles in FR4
 *     integral values are in r28, padded on the left 
 *     aggregates less that 65 bits are in r28, right padded 
 *     aggregates upto 128 bits are in r28 and r29, right padded
 */ 
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
  { \
    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
      memcpy ((VALBUF), \
	      ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
              (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
	      TYPE_LENGTH (TYPE)); \
    else if  (is_integral_type(TYPE) || SOFT_FLOAT)   \
       memcpy ((VALBUF), \
               (char *)(REGBUF) + REGISTER_BYTE (28) + \
               (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
               TYPE_LENGTH (TYPE)); \
    else if (TYPE_LENGTH (TYPE) <= 8)   \
       memcpy ((VALBUF), \
               (char *)(REGBUF) + REGISTER_BYTE (28), \
               TYPE_LENGTH (TYPE)); \
    else if (TYPE_LENGTH (TYPE) <= 16)   \
      { \
        memcpy ((VALBUF), \
                (char *)(REGBUF) + REGISTER_BYTE (28), \
                8); \
        memcpy (((char *) VALBUF + 8), \
                (char *)(REGBUF) + REGISTER_BYTE (29), \
                TYPE_LENGTH (TYPE) - 8); \
       } \
  }

/* RM: struct upto 128 bits are returned in registers */
#undef USE_STRUCT_CONVENTION
#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
  (TYPE_LENGTH (value_type) > 16)                

/* RM: for return command */
#undef STORE_RETURN_VALUE
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
  { \
    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
      write_register_bytes \
	      (REGISTER_BYTE (FP4_REGNUM) + \
              (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
              (VALBUF), \
	      TYPE_LENGTH (TYPE)); \
    else if (is_integral_type(TYPE) || SOFT_FLOAT)   \
       write_register_bytes \
              (REGISTER_BYTE (28) + \
                 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
               (VALBUF), \
               TYPE_LENGTH (TYPE)); \
    else if (TYPE_LENGTH (TYPE) <= 8)   \
       write_register_bytes \
             ( REGISTER_BYTE (28), \
               (VALBUF), \
               TYPE_LENGTH (TYPE)); \
    else if (TYPE_LENGTH (TYPE) <= 16)   \
      { \
        write_register_bytes \
               (REGISTER_BYTE (28), \
                (VALBUF), \
                8); \
        write_register_bytes \
               (REGISTER_BYTE (29), \
                ((char *) VALBUF + 8), \
                TYPE_LENGTH (TYPE) - 8); \
       } \
  }

/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
 * see comments there.  For PA64, the save_state structure is at an
 * offset of 24 32-bit words from the sigcontext structure. The 64 bit
 * general registers are at an offset of 640 bytes from the beginning of the
 * save_state structure, and the floating pointer register are at an offset
 * of 256 bytes from the beginning of the save_state structure.
 */
#undef FRAME_SAVED_PC_IN_SIGTRAMP
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
{ \
  *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
}

#undef FRAME_BASE_BEFORE_SIGTRAMP
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
{ \
  *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
}

#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
{ \
  int i; \
  CORE_ADDR TMP1, TMP2; \
  TMP1 = (FRAME)->frame + (24 * 4) + 640; \
  TMP2 = (FRAME)->frame + (24 * 4) + 256; \
  for (i = 0; i < NUM_REGS; i++) \
    { \
      if (i == SP_REGNUM) \
        (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
      else if (i >= FP0_REGNUM) \
        (FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
      else \
        (FSR)->regs[i] = TMP1 + i * 8; \
    } \
}

/* jimb: omitted purify call support */
Commit	Line	Data
adf40b2e JM	1	/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
	2	Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
	3	Free Software Foundation, Inc.
	4
	5	Contributed by the Center for Software Science at the
	6	University of Utah (pa-gdb-bugs@cs.utah.edu).
	7
	8	This file is part of GDB.
	9
	10	This program is free software; you can redistribute it and/or modify
	11	it under the terms of the GNU General Public License as published by
	12	the Free Software Foundation; either version 2 of the License, or
	13	(at your option) any later version.
	14
	15	This program is distributed in the hope that it will be useful,
	16	but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	GNU General Public License for more details.
	19
	20	You should have received a copy of the GNU General Public License
	21	along with this program; if not, write to the Free Software
	22	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	23
	24	/* PA 64-bit specific definitions. Override those which are in
	25	tm-hppa.h */
	26
	27	#include "pa/tm-hppah.h"
	28
	29	#define HPUX_1100 1
	30
	31	/* jimb: this must go. I'm just using it to disable code I haven't
	32	gotten working yet. */
	33	#define GDB_TARGET_IS_HPPA_20W
	34
	35	/* The low two bits of the IA are the privilege level of the instruction. */
	36	#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
	37
	38	/* Say how long (ordinary) registers are. This is used in
	39	push_word and a few other places, but REGISTER_RAW_SIZE is
	40	the real way to know how big a register is. */
	41
	42	#undef REGISTER_SIZE
	43	#define REGISTER_SIZE 8
	44
	45	/* Number of bytes of storage in the actual machine representation
	46	for register N. On the PA-RISC 2.0, all regs are 8 bytes, including
	47	the FP registers (they're accessed as two 4 byte halves). */
	48
	49	#undef REGISTER_RAW_SIZE
	50	#define REGISTER_RAW_SIZE(N) 8
	51
	52	/* Largest value REGISTER_RAW_SIZE can have. */
	53
	54	#undef MAX_REGISTER_RAW_SIZE
	55	#define MAX_REGISTER_RAW_SIZE 8
	56
	57	/* Total amount of space needed to store our copies of the machine's
	58	register state, the array `registers'. */
	59
	60	#undef REGISTER_BYTES
	61	#define REGISTER_BYTES (NUM_REGS * 8)
	62
	63	/* Index within `registers' of the first byte of the space for
	64	register N. */
65
66	#undef REGISTER_BYTE
67	#define REGISTER_BYTE(N) ((N) * 8)
68
69	#undef REGISTER_VIRTUAL_TYPE
70	#define REGISTER_VIRTUAL_TYPE(N) \
71	((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
72
73
74	/* Number of machine registers */
75	#undef NUM_REGS
76	#define NUM_REGS 96
77
78	/* Initializer for an array of names of registers.
79	There should be NUM_REGS strings in this initializer.
80	They are in rows of eight entries */
81	#undef REGISTER_NAMES
82	#define REGISTER_NAMES \
83	{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
84	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
85	"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
86	"r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
87	"sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
88	"ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
89	"sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
90	"cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
91	"fpsr", "fpe1", "fpe2", "fpe3", "fr4", "fr5", "fr6", "fr7", \
92	"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
93	"fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
94	"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}
95
96	#undef FP0_REGNUM
97	#undef FP4_REGNUM
98	#define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
99	#define FP4_REGNUM 68
100
101	/* Redefine some target bit sizes from the default. */
102
103	/* Number of bits in a long or unsigned long for the target machine. */
104
105	#define TARGET_LONG_BIT 64
106
107	/* Number of bits in a long long or unsigned long long for the
108	target machine. */
109
110	#define TARGET_LONG_LONG_BIT 64
111
112	/* Number of bits in a pointer for the target machine */
113
114	#define TARGET_PTR_BIT 64
115
116	/* Argument Pointer Register */
117	#define AP_REGNUM 29
118
119	#define DP_REGNUM 27
120
121	#define FP5_REGNUM 70
122
123	#define SR5_REGNUM 48
124
125	#undef FRAME_ARGS_ADDRESS
126	#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
127
128	/* We access locals from SP. This may not work for frames which call
129	alloca; for those, we may need to consult unwind tables.
130	jimb: FIXME. */
131	#undef FRAME_LOCALS_ADDRESS
132	#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
133
134	#define INIT_FRAME_AP init_frame_ap
135
136	#define EXTRA_FRAME_INFO \
137	CORE_ADDR ap;
138
139	/* For a number of horrible reasons we may have to adjust the location
140	of variables on the stack. Ugh. jimb: why? */
141	#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
142
143	extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
144
145
146	/* jimb: omitted dynamic linking stuff here */
147
148	/* This sequence of words is the instructions
149
150	; Call stack frame has already been built by gdb. Since we could be calling
151	; a varargs function, and we do not have the benefit of a stub to put things in
152	; the right place, we load the first 8 word of arguments into both the general
153	; and fp registers.
154	call_dummy
155	copy %r4,%r29
156	copy %r5,%r22
157	copy %r6,%r27
158	fldd -64(0,%r29),%fr4
159	fldd -56(0,%r29),%fr5
160	fldd -48(0,%r29),%fr6
161	fldd -40(0,%r29),%fr7
162	fldd -32(0,%r29),%fr8
163	fldd -24(0,%r29),%fr9
164	fldd -16(0,%r29),%fr10
165	fldd -8(0,%r29),%fr11
166	copy %r22,%r1
167	ldd -64(%r29), %r26
168	ldd -56(%r29), %r25
169	ldd -48(%r29), %r24
170	ldd -40(%r29), %r23
171	ldd -32(%r29), %r22
172	ldd -24(%r29), %r21
173	ldd -16(%r29), %r20
174	bve,l (%r1),%r2
175	ldd -8(%r29), %r19
176	break 4, 8
177	mtsp %r21, %sr0
178	ble 0(%sr0, %r22)
179	nop
180	*/
181
182	#undef CALL_DUMMY
183	#define CALL_DUMMY {0x349d0000, 0x34b60000, 0x34db0000, \
184	0x53a43f83, 0x53a53f93, 0x53a63fa3, 0x53a73fb3,\
185	0x53a83fc3, 0x53a93fd3, 0x2fa1100a, 0x2fb1100b,\
186	0x36c10000, 0x53ba3f81, 0x53b93f91, 0x53b83fa1,\
187	0x53b73fb1, 0x53b63fc1, 0x53b53fd1, 0x0fa110d4,\
188	0xe820f000, 0x0fb110d3, 0x00010004, 0x00151820,\
189	0xe6c00000, 0x08000240}
190
191	#undef CALL_DUMMY_LENGTH
192	#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 25)
193
194	#undef FUNC_LDIL_OFFSET
195	#undef FUNC_LDO_OFFSET
196	#undef SR4EXPORT_LDIL_OFFSET
197	#undef SR4EXPORT_LDO_OFFSET
198	#undef CALL_DUMMY_LOCATION
199	/* jimb: need to find out what AT_WDB_CALL_DUMMY is about */
200	#if 0
201	#define CALL_DUMMY_LOCATION AFTER_TEXT_END
202	extern CORE_ADDR wdb_call_dummy_addr;
203	#undef PC_IN_CALL_DUMMY
204	#define PC_IN_CALL_DUMMY(pc, sp, frame_address) \
205	((pc) >= wdb_call_dummy_addr && \
206	(pc) <= wdb_call_dummy_addr + CALL_DUMMY_LENGTH)
207	#endif
208
209	#undef REG_STRUCT_HAS_ADDR
210
211	#undef EXTRACT_RETURN_VALUE
212	/* RM: floats are returned in FR4R, doubles in FR4
213	* integral values are in r28, padded on the left
214	* aggregates less that 65 bits are in r28, right padded
215	* aggregates upto 128 bits are in r28 and r29, right padded
216	*/
217	#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
218	{ \
219	if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
220	memcpy ((VALBUF), \
221	((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
222	(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
223	TYPE_LENGTH (TYPE)); \
224	else if (is_integral_type(TYPE) \|\| SOFT_FLOAT) \
225	memcpy ((VALBUF), \
226	(char *)(REGBUF) + REGISTER_BYTE (28) + \
227	(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
228	TYPE_LENGTH (TYPE)); \
229	else if (TYPE_LENGTH (TYPE) <= 8) \
230	memcpy ((VALBUF), \
231	(char *)(REGBUF) + REGISTER_BYTE (28), \
232	TYPE_LENGTH (TYPE)); \
233	else if (TYPE_LENGTH (TYPE) <= 16) \
234	{ \
235	memcpy ((VALBUF), \
236	(char *)(REGBUF) + REGISTER_BYTE (28), \
237	8); \
238	memcpy (((char *) VALBUF + 8), \
239	(char *)(REGBUF) + REGISTER_BYTE (29), \
240	TYPE_LENGTH (TYPE) - 8); \
241	} \
242	}
243
244	/* RM: struct upto 128 bits are returned in registers */
245	#undef USE_STRUCT_CONVENTION
246	#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
247	(TYPE_LENGTH (value_type) > 16)
248
249	/* RM: for return command */
250	#undef STORE_RETURN_VALUE
251	#define STORE_RETURN_VALUE(TYPE,VALBUF) \
252	{ \
253	if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
254	write_register_bytes \
255	(REGISTER_BYTE (FP4_REGNUM) + \
256	(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
257	(VALBUF), \
258	TYPE_LENGTH (TYPE)); \
259	else if (is_integral_type(TYPE) \|\| SOFT_FLOAT) \
260	write_register_bytes \
261	(REGISTER_BYTE (28) + \
262	(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
263	(VALBUF), \
264	TYPE_LENGTH (TYPE)); \
265	else if (TYPE_LENGTH (TYPE) <= 8) \
266	write_register_bytes \
267	( REGISTER_BYTE (28), \
268	(VALBUF), \
269	TYPE_LENGTH (TYPE)); \
270	else if (TYPE_LENGTH (TYPE) <= 16) \
271	{ \
272	write_register_bytes \
273	(REGISTER_BYTE (28), \
274	(VALBUF), \
275	8); \
276	write_register_bytes \
277	(REGISTER_BYTE (29), \
278	((char *) VALBUF + 8), \
279	TYPE_LENGTH (TYPE) - 8); \
280	} \
281	}
282
283	/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
284	* see comments there. For PA64, the save_state structure is at an
285	* offset of 24 32-bit words from the sigcontext structure. The 64 bit
286	* general registers are at an offset of 640 bytes from the beginning of the
287	* save_state structure, and the floating pointer register are at an offset
288	* of 256 bytes from the beginning of the save_state structure.
289	*/
290	#undef FRAME_SAVED_PC_IN_SIGTRAMP
291	#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
292	{ \
293	(TMP) = read_memory_integer ((FRAME)->frame + (24 4) + 640 + (33 * 8), 8); \
294	}
295
296	#undef FRAME_BASE_BEFORE_SIGTRAMP
297	#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
298	{ \
299	(TMP) = read_memory_integer ((FRAME)->frame + (24 4) + 640 + (30 * 8), 8); \
300	}
301
302	#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
303	#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
304	{ \
305	int i; \
306	CORE_ADDR TMP1, TMP2; \
307	TMP1 = (FRAME)->frame + (24 * 4) + 640; \
308	TMP2 = (FRAME)->frame + (24 * 4) + 256; \
309	for (i = 0; i < NUM_REGS; i++) \
310	{ \
311	if (i == SP_REGNUM) \
312	(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
313	else if (i >= FP0_REGNUM) \
314	(FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
315	else \
316	(FSR)->regs[i] = TMP1 + i * 8; \
317	} \
318	}
319
320	/* jimb: omitted purify call support */